Source file src/cmd/compile/internal/ssa/rewrite/arm64/rewriteARM64.go

     1  // Code generated from _gen/ARM64.rules using 'go generate'; DO NOT EDIT.
     2  
     3  package arm64
     4  
     5  import "cmd/compile/internal/types"
     6  import "cmd/compile/internal/ssa/block"
     7  import "cmd/compile/internal/ssa/ssaop"
     8  import "cmd/compile/internal/ssa"
     9  
    10  func RewriteValue(v *ssa.Value) bool {
    11  	switch v.Op {
    12  	case ssaop.OpARM64ADCSflags:
    13  		return rewriteValue_OpARM64ADCSflags(v)
    14  	case ssaop.OpARM64ADD:
    15  		return rewriteValue_OpARM64ADD(v)
    16  	case ssaop.OpARM64ADDSflags:
    17  		return rewriteValue_OpARM64ADDSflags(v)
    18  	case ssaop.OpARM64ADDconst:
    19  		return rewriteValue_OpARM64ADDconst(v)
    20  	case ssaop.OpARM64ADDshiftLL:
    21  		return rewriteValue_OpARM64ADDshiftLL(v)
    22  	case ssaop.OpARM64ADDshiftRA:
    23  		return rewriteValue_OpARM64ADDshiftRA(v)
    24  	case ssaop.OpARM64ADDshiftRL:
    25  		return rewriteValue_OpARM64ADDshiftRL(v)
    26  	case ssaop.OpARM64AND:
    27  		return rewriteValue_OpARM64AND(v)
    28  	case ssaop.OpARM64ANDconst:
    29  		return rewriteValue_OpARM64ANDconst(v)
    30  	case ssaop.OpARM64ANDshiftLL:
    31  		return rewriteValue_OpARM64ANDshiftLL(v)
    32  	case ssaop.OpARM64ANDshiftRA:
    33  		return rewriteValue_OpARM64ANDshiftRA(v)
    34  	case ssaop.OpARM64ANDshiftRL:
    35  		return rewriteValue_OpARM64ANDshiftRL(v)
    36  	case ssaop.OpARM64ANDshiftRO:
    37  		return rewriteValue_OpARM64ANDshiftRO(v)
    38  	case ssaop.OpARM64BIC:
    39  		return rewriteValue_OpARM64BIC(v)
    40  	case ssaop.OpARM64BICshiftLL:
    41  		return rewriteValue_OpARM64BICshiftLL(v)
    42  	case ssaop.OpARM64BICshiftRA:
    43  		return rewriteValue_OpARM64BICshiftRA(v)
    44  	case ssaop.OpARM64BICshiftRL:
    45  		return rewriteValue_OpARM64BICshiftRL(v)
    46  	case ssaop.OpARM64BICshiftRO:
    47  		return rewriteValue_OpARM64BICshiftRO(v)
    48  	case ssaop.OpARM64CMN:
    49  		return rewriteValue_OpARM64CMN(v)
    50  	case ssaop.OpARM64CMNW:
    51  		return rewriteValue_OpARM64CMNW(v)
    52  	case ssaop.OpARM64CMNWconst:
    53  		return rewriteValue_OpARM64CMNWconst(v)
    54  	case ssaop.OpARM64CMNconst:
    55  		return rewriteValue_OpARM64CMNconst(v)
    56  	case ssaop.OpARM64CMNshiftLL:
    57  		return rewriteValue_OpARM64CMNshiftLL(v)
    58  	case ssaop.OpARM64CMNshiftRA:
    59  		return rewriteValue_OpARM64CMNshiftRA(v)
    60  	case ssaop.OpARM64CMNshiftRL:
    61  		return rewriteValue_OpARM64CMNshiftRL(v)
    62  	case ssaop.OpARM64CMP:
    63  		return rewriteValue_OpARM64CMP(v)
    64  	case ssaop.OpARM64CMPW:
    65  		return rewriteValue_OpARM64CMPW(v)
    66  	case ssaop.OpARM64CMPWconst:
    67  		return rewriteValue_OpARM64CMPWconst(v)
    68  	case ssaop.OpARM64CMPconst:
    69  		return rewriteValue_OpARM64CMPconst(v)
    70  	case ssaop.OpARM64CMPshiftLL:
    71  		return rewriteValue_OpARM64CMPshiftLL(v)
    72  	case ssaop.OpARM64CMPshiftRA:
    73  		return rewriteValue_OpARM64CMPshiftRA(v)
    74  	case ssaop.OpARM64CMPshiftRL:
    75  		return rewriteValue_OpARM64CMPshiftRL(v)
    76  	case ssaop.OpARM64CSEL:
    77  		return rewriteValue_OpARM64CSEL(v)
    78  	case ssaop.OpARM64CSEL0:
    79  		return rewriteValue_OpARM64CSEL0(v)
    80  	case ssaop.OpARM64CSETM:
    81  		return rewriteValue_OpARM64CSETM(v)
    82  	case ssaop.OpARM64CSINC:
    83  		return rewriteValue_OpARM64CSINC(v)
    84  	case ssaop.OpARM64CSINV:
    85  		return rewriteValue_OpARM64CSINV(v)
    86  	case ssaop.OpARM64CSNEG:
    87  		return rewriteValue_OpARM64CSNEG(v)
    88  	case ssaop.OpARM64DIV:
    89  		return rewriteValue_OpARM64DIV(v)
    90  	case ssaop.OpARM64DIVW:
    91  		return rewriteValue_OpARM64DIVW(v)
    92  	case ssaop.OpARM64EON:
    93  		return rewriteValue_OpARM64EON(v)
    94  	case ssaop.OpARM64EONshiftLL:
    95  		return rewriteValue_OpARM64EONshiftLL(v)
    96  	case ssaop.OpARM64EONshiftRA:
    97  		return rewriteValue_OpARM64EONshiftRA(v)
    98  	case ssaop.OpARM64EONshiftRL:
    99  		return rewriteValue_OpARM64EONshiftRL(v)
   100  	case ssaop.OpARM64EONshiftRO:
   101  		return rewriteValue_OpARM64EONshiftRO(v)
   102  	case ssaop.OpARM64Equal:
   103  		return rewriteValue_OpARM64Equal(v)
   104  	case ssaop.OpARM64FADDD:
   105  		return rewriteValue_OpARM64FADDD(v)
   106  	case ssaop.OpARM64FADDS:
   107  		return rewriteValue_OpARM64FADDS(v)
   108  	case ssaop.OpARM64FCMPD:
   109  		return rewriteValue_OpARM64FCMPD(v)
   110  	case ssaop.OpARM64FCMPS:
   111  		return rewriteValue_OpARM64FCMPS(v)
   112  	case ssaop.OpARM64FCSELD:
   113  		return rewriteValue_OpARM64FCSELD(v)
   114  	case ssaop.OpARM64FCSELS:
   115  		return rewriteValue_OpARM64FCSELS(v)
   116  	case ssaop.OpARM64FCVTDS:
   117  		return rewriteValue_OpARM64FCVTDS(v)
   118  	case ssaop.OpARM64FLDPQ:
   119  		return rewriteValue_OpARM64FLDPQ(v)
   120  	case ssaop.OpARM64FMOVDfpgp:
   121  		return rewriteValue_OpARM64FMOVDfpgp(v)
   122  	case ssaop.OpARM64FMOVDgpfp:
   123  		return rewriteValue_OpARM64FMOVDgpfp(v)
   124  	case ssaop.OpARM64FMOVDload:
   125  		return rewriteValue_OpARM64FMOVDload(v)
   126  	case ssaop.OpARM64FMOVDloadidx:
   127  		return rewriteValue_OpARM64FMOVDloadidx(v)
   128  	case ssaop.OpARM64FMOVDloadidx8:
   129  		return rewriteValue_OpARM64FMOVDloadidx8(v)
   130  	case ssaop.OpARM64FMOVDstore:
   131  		return rewriteValue_OpARM64FMOVDstore(v)
   132  	case ssaop.OpARM64FMOVDstoreidx:
   133  		return rewriteValue_OpARM64FMOVDstoreidx(v)
   134  	case ssaop.OpARM64FMOVDstoreidx8:
   135  		return rewriteValue_OpARM64FMOVDstoreidx8(v)
   136  	case ssaop.OpARM64FMOVQload:
   137  		return rewriteValue_OpARM64FMOVQload(v)
   138  	case ssaop.OpARM64FMOVQstore:
   139  		return rewriteValue_OpARM64FMOVQstore(v)
   140  	case ssaop.OpARM64FMOVSload:
   141  		return rewriteValue_OpARM64FMOVSload(v)
   142  	case ssaop.OpARM64FMOVSloadidx:
   143  		return rewriteValue_OpARM64FMOVSloadidx(v)
   144  	case ssaop.OpARM64FMOVSloadidx4:
   145  		return rewriteValue_OpARM64FMOVSloadidx4(v)
   146  	case ssaop.OpARM64FMOVSstore:
   147  		return rewriteValue_OpARM64FMOVSstore(v)
   148  	case ssaop.OpARM64FMOVSstoreidx:
   149  		return rewriteValue_OpARM64FMOVSstoreidx(v)
   150  	case ssaop.OpARM64FMOVSstoreidx4:
   151  		return rewriteValue_OpARM64FMOVSstoreidx4(v)
   152  	case ssaop.OpARM64FMULD:
   153  		return rewriteValue_OpARM64FMULD(v)
   154  	case ssaop.OpARM64FMULS:
   155  		return rewriteValue_OpARM64FMULS(v)
   156  	case ssaop.OpARM64FNEGD:
   157  		return rewriteValue_OpARM64FNEGD(v)
   158  	case ssaop.OpARM64FNEGS:
   159  		return rewriteValue_OpARM64FNEGS(v)
   160  	case ssaop.OpARM64FNMULD:
   161  		return rewriteValue_OpARM64FNMULD(v)
   162  	case ssaop.OpARM64FNMULS:
   163  		return rewriteValue_OpARM64FNMULS(v)
   164  	case ssaop.OpARM64FSTPQ:
   165  		return rewriteValue_OpARM64FSTPQ(v)
   166  	case ssaop.OpARM64FSUBD:
   167  		return rewriteValue_OpARM64FSUBD(v)
   168  	case ssaop.OpARM64FSUBS:
   169  		return rewriteValue_OpARM64FSUBS(v)
   170  	case ssaop.OpARM64GreaterEqual:
   171  		return rewriteValue_OpARM64GreaterEqual(v)
   172  	case ssaop.OpARM64GreaterEqualF:
   173  		return rewriteValue_OpARM64GreaterEqualF(v)
   174  	case ssaop.OpARM64GreaterEqualNoov:
   175  		return rewriteValue_OpARM64GreaterEqualNoov(v)
   176  	case ssaop.OpARM64GreaterEqualU:
   177  		return rewriteValue_OpARM64GreaterEqualU(v)
   178  	case ssaop.OpARM64GreaterThan:
   179  		return rewriteValue_OpARM64GreaterThan(v)
   180  	case ssaop.OpARM64GreaterThanF:
   181  		return rewriteValue_OpARM64GreaterThanF(v)
   182  	case ssaop.OpARM64GreaterThanU:
   183  		return rewriteValue_OpARM64GreaterThanU(v)
   184  	case ssaop.OpARM64LDP:
   185  		return rewriteValue_OpARM64LDP(v)
   186  	case ssaop.OpARM64LessEqual:
   187  		return rewriteValue_OpARM64LessEqual(v)
   188  	case ssaop.OpARM64LessEqualF:
   189  		return rewriteValue_OpARM64LessEqualF(v)
   190  	case ssaop.OpARM64LessEqualU:
   191  		return rewriteValue_OpARM64LessEqualU(v)
   192  	case ssaop.OpARM64LessThan:
   193  		return rewriteValue_OpARM64LessThan(v)
   194  	case ssaop.OpARM64LessThanF:
   195  		return rewriteValue_OpARM64LessThanF(v)
   196  	case ssaop.OpARM64LessThanNoov:
   197  		return rewriteValue_OpARM64LessThanNoov(v)
   198  	case ssaop.OpARM64LessThanU:
   199  		return rewriteValue_OpARM64LessThanU(v)
   200  	case ssaop.OpARM64LoweredPanicBoundsCR:
   201  		return rewriteValue_OpARM64LoweredPanicBoundsCR(v)
   202  	case ssaop.OpARM64LoweredPanicBoundsRC:
   203  		return rewriteValue_OpARM64LoweredPanicBoundsRC(v)
   204  	case ssaop.OpARM64LoweredPanicBoundsRR:
   205  		return rewriteValue_OpARM64LoweredPanicBoundsRR(v)
   206  	case ssaop.OpARM64MADD:
   207  		return rewriteValue_OpARM64MADD(v)
   208  	case ssaop.OpARM64MADDW:
   209  		return rewriteValue_OpARM64MADDW(v)
   210  	case ssaop.OpARM64MNEG:
   211  		return rewriteValue_OpARM64MNEG(v)
   212  	case ssaop.OpARM64MNEGW:
   213  		return rewriteValue_OpARM64MNEGW(v)
   214  	case ssaop.OpARM64MOD:
   215  		return rewriteValue_OpARM64MOD(v)
   216  	case ssaop.OpARM64MODW:
   217  		return rewriteValue_OpARM64MODW(v)
   218  	case ssaop.OpARM64MOVBUload:
   219  		return rewriteValue_OpARM64MOVBUload(v)
   220  	case ssaop.OpARM64MOVBUloadidx:
   221  		return rewriteValue_OpARM64MOVBUloadidx(v)
   222  	case ssaop.OpARM64MOVBUreg:
   223  		return rewriteValue_OpARM64MOVBUreg(v)
   224  	case ssaop.OpARM64MOVBload:
   225  		return rewriteValue_OpARM64MOVBload(v)
   226  	case ssaop.OpARM64MOVBloadidx:
   227  		return rewriteValue_OpARM64MOVBloadidx(v)
   228  	case ssaop.OpARM64MOVBreg:
   229  		return rewriteValue_OpARM64MOVBreg(v)
   230  	case ssaop.OpARM64MOVBstore:
   231  		return rewriteValue_OpARM64MOVBstore(v)
   232  	case ssaop.OpARM64MOVBstoreidx:
   233  		return rewriteValue_OpARM64MOVBstoreidx(v)
   234  	case ssaop.OpARM64MOVDload:
   235  		return rewriteValue_OpARM64MOVDload(v)
   236  	case ssaop.OpARM64MOVDloadidx:
   237  		return rewriteValue_OpARM64MOVDloadidx(v)
   238  	case ssaop.OpARM64MOVDloadidx8:
   239  		return rewriteValue_OpARM64MOVDloadidx8(v)
   240  	case ssaop.OpARM64MOVDnop:
   241  		return rewriteValue_OpARM64MOVDnop(v)
   242  	case ssaop.OpARM64MOVDreg:
   243  		return rewriteValue_OpARM64MOVDreg(v)
   244  	case ssaop.OpARM64MOVDstore:
   245  		return rewriteValue_OpARM64MOVDstore(v)
   246  	case ssaop.OpARM64MOVDstoreidx:
   247  		return rewriteValue_OpARM64MOVDstoreidx(v)
   248  	case ssaop.OpARM64MOVDstoreidx8:
   249  		return rewriteValue_OpARM64MOVDstoreidx8(v)
   250  	case ssaop.OpARM64MOVHUload:
   251  		return rewriteValue_OpARM64MOVHUload(v)
   252  	case ssaop.OpARM64MOVHUloadidx:
   253  		return rewriteValue_OpARM64MOVHUloadidx(v)
   254  	case ssaop.OpARM64MOVHUloadidx2:
   255  		return rewriteValue_OpARM64MOVHUloadidx2(v)
   256  	case ssaop.OpARM64MOVHUreg:
   257  		return rewriteValue_OpARM64MOVHUreg(v)
   258  	case ssaop.OpARM64MOVHload:
   259  		return rewriteValue_OpARM64MOVHload(v)
   260  	case ssaop.OpARM64MOVHloadidx:
   261  		return rewriteValue_OpARM64MOVHloadidx(v)
   262  	case ssaop.OpARM64MOVHloadidx2:
   263  		return rewriteValue_OpARM64MOVHloadidx2(v)
   264  	case ssaop.OpARM64MOVHreg:
   265  		return rewriteValue_OpARM64MOVHreg(v)
   266  	case ssaop.OpARM64MOVHstore:
   267  		return rewriteValue_OpARM64MOVHstore(v)
   268  	case ssaop.OpARM64MOVHstoreidx:
   269  		return rewriteValue_OpARM64MOVHstoreidx(v)
   270  	case ssaop.OpARM64MOVHstoreidx2:
   271  		return rewriteValue_OpARM64MOVHstoreidx2(v)
   272  	case ssaop.OpARM64MOVWUload:
   273  		return rewriteValue_OpARM64MOVWUload(v)
   274  	case ssaop.OpARM64MOVWUloadidx:
   275  		return rewriteValue_OpARM64MOVWUloadidx(v)
   276  	case ssaop.OpARM64MOVWUloadidx4:
   277  		return rewriteValue_OpARM64MOVWUloadidx4(v)
   278  	case ssaop.OpARM64MOVWUreg:
   279  		return rewriteValue_OpARM64MOVWUreg(v)
   280  	case ssaop.OpARM64MOVWload:
   281  		return rewriteValue_OpARM64MOVWload(v)
   282  	case ssaop.OpARM64MOVWloadidx:
   283  		return rewriteValue_OpARM64MOVWloadidx(v)
   284  	case ssaop.OpARM64MOVWloadidx4:
   285  		return rewriteValue_OpARM64MOVWloadidx4(v)
   286  	case ssaop.OpARM64MOVWreg:
   287  		return rewriteValue_OpARM64MOVWreg(v)
   288  	case ssaop.OpARM64MOVWstore:
   289  		return rewriteValue_OpARM64MOVWstore(v)
   290  	case ssaop.OpARM64MOVWstoreidx:
   291  		return rewriteValue_OpARM64MOVWstoreidx(v)
   292  	case ssaop.OpARM64MOVWstoreidx4:
   293  		return rewriteValue_OpARM64MOVWstoreidx4(v)
   294  	case ssaop.OpARM64MSUB:
   295  		return rewriteValue_OpARM64MSUB(v)
   296  	case ssaop.OpARM64MSUBW:
   297  		return rewriteValue_OpARM64MSUBW(v)
   298  	case ssaop.OpARM64MUL:
   299  		return rewriteValue_OpARM64MUL(v)
   300  	case ssaop.OpARM64MULW:
   301  		return rewriteValue_OpARM64MULW(v)
   302  	case ssaop.OpARM64MVN:
   303  		return rewriteValue_OpARM64MVN(v)
   304  	case ssaop.OpARM64MVNshiftLL:
   305  		return rewriteValue_OpARM64MVNshiftLL(v)
   306  	case ssaop.OpARM64MVNshiftRA:
   307  		return rewriteValue_OpARM64MVNshiftRA(v)
   308  	case ssaop.OpARM64MVNshiftRL:
   309  		return rewriteValue_OpARM64MVNshiftRL(v)
   310  	case ssaop.OpARM64MVNshiftRO:
   311  		return rewriteValue_OpARM64MVNshiftRO(v)
   312  	case ssaop.OpARM64NEG:
   313  		return rewriteValue_OpARM64NEG(v)
   314  	case ssaop.OpARM64NEGshiftLL:
   315  		return rewriteValue_OpARM64NEGshiftLL(v)
   316  	case ssaop.OpARM64NEGshiftRA:
   317  		return rewriteValue_OpARM64NEGshiftRA(v)
   318  	case ssaop.OpARM64NEGshiftRL:
   319  		return rewriteValue_OpARM64NEGshiftRL(v)
   320  	case ssaop.OpARM64NotEqual:
   321  		return rewriteValue_OpARM64NotEqual(v)
   322  	case ssaop.OpARM64OR:
   323  		return rewriteValue_OpARM64OR(v)
   324  	case ssaop.OpARM64ORN:
   325  		return rewriteValue_OpARM64ORN(v)
   326  	case ssaop.OpARM64ORNshiftLL:
   327  		return rewriteValue_OpARM64ORNshiftLL(v)
   328  	case ssaop.OpARM64ORNshiftRA:
   329  		return rewriteValue_OpARM64ORNshiftRA(v)
   330  	case ssaop.OpARM64ORNshiftRL:
   331  		return rewriteValue_OpARM64ORNshiftRL(v)
   332  	case ssaop.OpARM64ORNshiftRO:
   333  		return rewriteValue_OpARM64ORNshiftRO(v)
   334  	case ssaop.OpARM64ORconst:
   335  		return rewriteValue_OpARM64ORconst(v)
   336  	case ssaop.OpARM64ORshiftLL:
   337  		return rewriteValue_OpARM64ORshiftLL(v)
   338  	case ssaop.OpARM64ORshiftRA:
   339  		return rewriteValue_OpARM64ORshiftRA(v)
   340  	case ssaop.OpARM64ORshiftRL:
   341  		return rewriteValue_OpARM64ORshiftRL(v)
   342  	case ssaop.OpARM64ORshiftRO:
   343  		return rewriteValue_OpARM64ORshiftRO(v)
   344  	case ssaop.OpARM64REV:
   345  		return rewriteValue_OpARM64REV(v)
   346  	case ssaop.OpARM64REV16:
   347  		return rewriteValue_OpARM64REV16(v)
   348  	case ssaop.OpARM64REVW:
   349  		return rewriteValue_OpARM64REVW(v)
   350  	case ssaop.OpARM64ROR:
   351  		return rewriteValue_OpARM64ROR(v)
   352  	case ssaop.OpARM64RORW:
   353  		return rewriteValue_OpARM64RORW(v)
   354  	case ssaop.OpARM64SBCSflags:
   355  		return rewriteValue_OpARM64SBCSflags(v)
   356  	case ssaop.OpARM64SBFX:
   357  		return rewriteValue_OpARM64SBFX(v)
   358  	case ssaop.OpARM64SLL:
   359  		return rewriteValue_OpARM64SLL(v)
   360  	case ssaop.OpARM64SLLconst:
   361  		return rewriteValue_OpARM64SLLconst(v)
   362  	case ssaop.OpARM64SRA:
   363  		return rewriteValue_OpARM64SRA(v)
   364  	case ssaop.OpARM64SRAconst:
   365  		return rewriteValue_OpARM64SRAconst(v)
   366  	case ssaop.OpARM64SRL:
   367  		return rewriteValue_OpARM64SRL(v)
   368  	case ssaop.OpARM64SRLconst:
   369  		return rewriteValue_OpARM64SRLconst(v)
   370  	case ssaop.OpARM64STP:
   371  		return rewriteValue_OpARM64STP(v)
   372  	case ssaop.OpARM64SUB:
   373  		return rewriteValue_OpARM64SUB(v)
   374  	case ssaop.OpARM64SUBconst:
   375  		return rewriteValue_OpARM64SUBconst(v)
   376  	case ssaop.OpARM64SUBshiftLL:
   377  		return rewriteValue_OpARM64SUBshiftLL(v)
   378  	case ssaop.OpARM64SUBshiftRA:
   379  		return rewriteValue_OpARM64SUBshiftRA(v)
   380  	case ssaop.OpARM64SUBshiftRL:
   381  		return rewriteValue_OpARM64SUBshiftRL(v)
   382  	case ssaop.OpARM64TST:
   383  		return rewriteValue_OpARM64TST(v)
   384  	case ssaop.OpARM64TSTW:
   385  		return rewriteValue_OpARM64TSTW(v)
   386  	case ssaop.OpARM64TSTWconst:
   387  		return rewriteValue_OpARM64TSTWconst(v)
   388  	case ssaop.OpARM64TSTconst:
   389  		return rewriteValue_OpARM64TSTconst(v)
   390  	case ssaop.OpARM64TSTshiftLL:
   391  		return rewriteValue_OpARM64TSTshiftLL(v)
   392  	case ssaop.OpARM64TSTshiftRA:
   393  		return rewriteValue_OpARM64TSTshiftRA(v)
   394  	case ssaop.OpARM64TSTshiftRL:
   395  		return rewriteValue_OpARM64TSTshiftRL(v)
   396  	case ssaop.OpARM64TSTshiftRO:
   397  		return rewriteValue_OpARM64TSTshiftRO(v)
   398  	case ssaop.OpARM64UBFIZ:
   399  		return rewriteValue_OpARM64UBFIZ(v)
   400  	case ssaop.OpARM64UBFX:
   401  		return rewriteValue_OpARM64UBFX(v)
   402  	case ssaop.OpARM64UDIV:
   403  		return rewriteValue_OpARM64UDIV(v)
   404  	case ssaop.OpARM64UDIVW:
   405  		return rewriteValue_OpARM64UDIVW(v)
   406  	case ssaop.OpARM64UMOD:
   407  		return rewriteValue_OpARM64UMOD(v)
   408  	case ssaop.OpARM64UMODW:
   409  		return rewriteValue_OpARM64UMODW(v)
   410  	case ssaop.OpARM64VBIF16B:
   411  		return rewriteValue_OpARM64VBIF16B(v)
   412  	case ssaop.OpARM64VBIT16B:
   413  		return rewriteValue_OpARM64VBIT16B(v)
   414  	case ssaop.OpARM64VDUPBbcast:
   415  		return rewriteValue_OpARM64VDUPBbcast(v)
   416  	case ssaop.OpARM64VEOR16B:
   417  		return rewriteValue_OpARM64VEOR16B(v)
   418  	case ssaop.OpARM64VFCVTL4S:
   419  		return rewriteValue_OpARM64VFCVTL4S(v)
   420  	case ssaop.OpARM64VMOVDins0:
   421  		return rewriteValue_OpARM64VMOVDins0(v)
   422  	case ssaop.OpARM64VMOVSins0:
   423  		return rewriteValue_OpARM64VMOVSins0(v)
   424  	case ssaop.OpARM64VNOT16B:
   425  		return rewriteValue_OpARM64VNOT16B(v)
   426  	case ssaop.OpARM64VPMULL2D:
   427  		return rewriteValue_OpARM64VPMULL2D(v)
   428  	case ssaop.OpARM64VSHL16B:
   429  		return rewriteValue_OpARM64VSHL16B(v)
   430  	case ssaop.OpARM64VSHL2D:
   431  		return rewriteValue_OpARM64VSHL2D(v)
   432  	case ssaop.OpARM64VSHL4S:
   433  		return rewriteValue_OpARM64VSHL4S(v)
   434  	case ssaop.OpARM64VSHL8H:
   435  		return rewriteValue_OpARM64VSHL8H(v)
   436  	case ssaop.OpARM64VSHRN2D:
   437  		return rewriteValue_OpARM64VSHRN2D(v)
   438  	case ssaop.OpARM64VSHRN4S:
   439  		return rewriteValue_OpARM64VSHRN4S(v)
   440  	case ssaop.OpARM64VSHRN8H:
   441  		return rewriteValue_OpARM64VSHRN8H(v)
   442  	case ssaop.OpARM64VSMULL16B:
   443  		return rewriteValue_OpARM64VSMULL16B(v)
   444  	case ssaop.OpARM64VSMULL4S:
   445  		return rewriteValue_OpARM64VSMULL4S(v)
   446  	case ssaop.OpARM64VSMULL8H:
   447  		return rewriteValue_OpARM64VSMULL8H(v)
   448  	case ssaop.OpARM64VSQSHL16Bconst:
   449  		return rewriteValue_OpARM64VSQSHL16Bconst(v)
   450  	case ssaop.OpARM64VSQSHL2Dconst:
   451  		return rewriteValue_OpARM64VSQSHL2Dconst(v)
   452  	case ssaop.OpARM64VSQSHL4Sconst:
   453  		return rewriteValue_OpARM64VSQSHL4Sconst(v)
   454  	case ssaop.OpARM64VSQSHL8Hconst:
   455  		return rewriteValue_OpARM64VSQSHL8Hconst(v)
   456  	case ssaop.OpARM64VSSHLL16B:
   457  		return rewriteValue_OpARM64VSSHLL16B(v)
   458  	case ssaop.OpARM64VSSHLL4S:
   459  		return rewriteValue_OpARM64VSSHLL4S(v)
   460  	case ssaop.OpARM64VSSHLL8H:
   461  		return rewriteValue_OpARM64VSSHLL8H(v)
   462  	case ssaop.OpARM64VSSHR16B:
   463  		return rewriteValue_OpARM64VSSHR16B(v)
   464  	case ssaop.OpARM64VSSHR2D:
   465  		return rewriteValue_OpARM64VSSHR2D(v)
   466  	case ssaop.OpARM64VSSHR4S:
   467  		return rewriteValue_OpARM64VSSHR4S(v)
   468  	case ssaop.OpARM64VSSHR8H:
   469  		return rewriteValue_OpARM64VSSHR8H(v)
   470  	case ssaop.OpARM64VSXTL16B:
   471  		return rewriteValue_OpARM64VSXTL16B(v)
   472  	case ssaop.OpARM64VSXTL4S:
   473  		return rewriteValue_OpARM64VSXTL4S(v)
   474  	case ssaop.OpARM64VSXTL8H:
   475  		return rewriteValue_OpARM64VSXTL8H(v)
   476  	case ssaop.OpARM64VUMULL16B:
   477  		return rewriteValue_OpARM64VUMULL16B(v)
   478  	case ssaop.OpARM64VUMULL4S:
   479  		return rewriteValue_OpARM64VUMULL4S(v)
   480  	case ssaop.OpARM64VUMULL8H:
   481  		return rewriteValue_OpARM64VUMULL8H(v)
   482  	case ssaop.OpARM64VUQSHL16Bconst:
   483  		return rewriteValue_OpARM64VUQSHL16Bconst(v)
   484  	case ssaop.OpARM64VUQSHL2Dconst:
   485  		return rewriteValue_OpARM64VUQSHL2Dconst(v)
   486  	case ssaop.OpARM64VUQSHL4Sconst:
   487  		return rewriteValue_OpARM64VUQSHL4Sconst(v)
   488  	case ssaop.OpARM64VUQSHL8Hconst:
   489  		return rewriteValue_OpARM64VUQSHL8Hconst(v)
   490  	case ssaop.OpARM64VUSHLL16B:
   491  		return rewriteValue_OpARM64VUSHLL16B(v)
   492  	case ssaop.OpARM64VUSHLL4S:
   493  		return rewriteValue_OpARM64VUSHLL4S(v)
   494  	case ssaop.OpARM64VUSHLL8H:
   495  		return rewriteValue_OpARM64VUSHLL8H(v)
   496  	case ssaop.OpARM64VUSHR16B:
   497  		return rewriteValue_OpARM64VUSHR16B(v)
   498  	case ssaop.OpARM64VUSHR2D:
   499  		return rewriteValue_OpARM64VUSHR2D(v)
   500  	case ssaop.OpARM64VUSHR4S:
   501  		return rewriteValue_OpARM64VUSHR4S(v)
   502  	case ssaop.OpARM64VUSHR8H:
   503  		return rewriteValue_OpARM64VUSHR8H(v)
   504  	case ssaop.OpARM64VUXTL16B:
   505  		return rewriteValue_OpARM64VUXTL16B(v)
   506  	case ssaop.OpARM64VUXTL4S:
   507  		return rewriteValue_OpARM64VUXTL4S(v)
   508  	case ssaop.OpARM64VUXTL8H:
   509  		return rewriteValue_OpARM64VUXTL8H(v)
   510  	case ssaop.OpARM64XOR:
   511  		return rewriteValue_OpARM64XOR(v)
   512  	case ssaop.OpARM64XORconst:
   513  		return rewriteValue_OpARM64XORconst(v)
   514  	case ssaop.OpARM64XORshiftLL:
   515  		return rewriteValue_OpARM64XORshiftLL(v)
   516  	case ssaop.OpARM64XORshiftRA:
   517  		return rewriteValue_OpARM64XORshiftRA(v)
   518  	case ssaop.OpARM64XORshiftRL:
   519  		return rewriteValue_OpARM64XORshiftRL(v)
   520  	case ssaop.OpARM64XORshiftRO:
   521  		return rewriteValue_OpARM64XORshiftRO(v)
   522  	case ssaop.OpARM64ZCPYMergingB:
   523  		return rewriteValue_OpARM64ZCPYMergingB(v)
   524  	case ssaop.OpARM64ZCPYMergingBconst:
   525  		return rewriteValue_OpARM64ZCPYMergingBconst(v)
   526  	case ssaop.OpARM64ZCPYMergingD:
   527  		return rewriteValue_OpARM64ZCPYMergingD(v)
   528  	case ssaop.OpARM64ZCPYMergingDconst:
   529  		return rewriteValue_OpARM64ZCPYMergingDconst(v)
   530  	case ssaop.OpARM64ZCPYMergingH:
   531  		return rewriteValue_OpARM64ZCPYMergingH(v)
   532  	case ssaop.OpARM64ZCPYMergingHconst:
   533  		return rewriteValue_OpARM64ZCPYMergingHconst(v)
   534  	case ssaop.OpARM64ZCPYMergingS:
   535  		return rewriteValue_OpARM64ZCPYMergingS(v)
   536  	case ssaop.OpARM64ZCPYMergingSconst:
   537  		return rewriteValue_OpARM64ZCPYMergingSconst(v)
   538  	case ssaop.OpARM64ZDUPB:
   539  		return rewriteValue_OpARM64ZDUPB(v)
   540  	case ssaop.OpARM64ZDUPD:
   541  		return rewriteValue_OpARM64ZDUPD(v)
   542  	case ssaop.OpARM64ZDUPH:
   543  		return rewriteValue_OpARM64ZDUPH(v)
   544  	case ssaop.OpARM64ZDUPS:
   545  		return rewriteValue_OpARM64ZDUPS(v)
   546  	case ssaop.OpARM64ZSELB:
   547  		return rewriteValue_OpARM64ZSELB(v)
   548  	case ssaop.OpARM64ZSELD:
   549  		return rewriteValue_OpARM64ZSELD(v)
   550  	case ssaop.OpARM64ZSELH:
   551  		return rewriteValue_OpARM64ZSELH(v)
   552  	case ssaop.OpARM64ZSELS:
   553  		return rewriteValue_OpARM64ZSELS(v)
   554  	case ssaop.OpAbs:
   555  		v.Op = ssaop.OpARM64FABSD
   556  		return true
   557  	case ssaop.OpAbsFloat32s:
   558  		return rewriteValue_OpAbsFloat32s(v)
   559  	case ssaop.OpAbsFloat32x4:
   560  		v.Op = ssaop.OpARM64VFABS4S
   561  		return true
   562  	case ssaop.OpAbsFloat64s:
   563  		return rewriteValue_OpAbsFloat64s(v)
   564  	case ssaop.OpAbsFloat64x2:
   565  		v.Op = ssaop.OpARM64VFABS2D
   566  		return true
   567  	case ssaop.OpAbsInt16s:
   568  		return rewriteValue_OpAbsInt16s(v)
   569  	case ssaop.OpAbsInt16x8:
   570  		v.Op = ssaop.OpARM64VABS8H
   571  		return true
   572  	case ssaop.OpAbsInt32s:
   573  		return rewriteValue_OpAbsInt32s(v)
   574  	case ssaop.OpAbsInt32x4:
   575  		v.Op = ssaop.OpARM64VABS4S
   576  		return true
   577  	case ssaop.OpAbsInt64s:
   578  		return rewriteValue_OpAbsInt64s(v)
   579  	case ssaop.OpAbsInt64x2:
   580  		v.Op = ssaop.OpARM64VABS2D
   581  		return true
   582  	case ssaop.OpAbsInt8s:
   583  		return rewriteValue_OpAbsInt8s(v)
   584  	case ssaop.OpAbsInt8x16:
   585  		v.Op = ssaop.OpARM64VABS16B
   586  		return true
   587  	case ssaop.OpAdd16:
   588  		v.Op = ssaop.OpARM64ADD
   589  		return true
   590  	case ssaop.OpAdd32:
   591  		v.Op = ssaop.OpARM64ADD
   592  		return true
   593  	case ssaop.OpAdd32F:
   594  		v.Op = ssaop.OpARM64FADDS
   595  		return true
   596  	case ssaop.OpAdd64:
   597  		v.Op = ssaop.OpARM64ADD
   598  		return true
   599  	case ssaop.OpAdd64F:
   600  		v.Op = ssaop.OpARM64FADDD
   601  		return true
   602  	case ssaop.OpAdd8:
   603  		v.Op = ssaop.OpARM64ADD
   604  		return true
   605  	case ssaop.OpAddFloat32s:
   606  		v.Op = ssaop.OpARM64ZFADDS
   607  		return true
   608  	case ssaop.OpAddFloat32x4:
   609  		v.Op = ssaop.OpARM64VFADD4S
   610  		return true
   611  	case ssaop.OpAddFloat64s:
   612  		v.Op = ssaop.OpARM64ZFADDD
   613  		return true
   614  	case ssaop.OpAddFloat64x2:
   615  		v.Op = ssaop.OpARM64VFADD2D
   616  		return true
   617  	case ssaop.OpAddInt16s:
   618  		v.Op = ssaop.OpARM64ZADDH
   619  		return true
   620  	case ssaop.OpAddInt16x8:
   621  		v.Op = ssaop.OpARM64VADD8H
   622  		return true
   623  	case ssaop.OpAddInt32s:
   624  		v.Op = ssaop.OpARM64ZADDS
   625  		return true
   626  	case ssaop.OpAddInt32x4:
   627  		v.Op = ssaop.OpARM64VADD4S
   628  		return true
   629  	case ssaop.OpAddInt64s:
   630  		v.Op = ssaop.OpARM64ZADDD
   631  		return true
   632  	case ssaop.OpAddInt64x2:
   633  		v.Op = ssaop.OpARM64VADD2D
   634  		return true
   635  	case ssaop.OpAddInt8s:
   636  		v.Op = ssaop.OpARM64ZADDB
   637  		return true
   638  	case ssaop.OpAddInt8x16:
   639  		v.Op = ssaop.OpARM64VADD16B
   640  		return true
   641  	case ssaop.OpAddPtr:
   642  		v.Op = ssaop.OpARM64ADD
   643  		return true
   644  	case ssaop.OpAddSaturatedInt16s:
   645  		v.Op = ssaop.OpARM64ZSQADDH
   646  		return true
   647  	case ssaop.OpAddSaturatedInt16x8:
   648  		v.Op = ssaop.OpARM64VSQADD8H
   649  		return true
   650  	case ssaop.OpAddSaturatedInt32s:
   651  		v.Op = ssaop.OpARM64ZSQADDS
   652  		return true
   653  	case ssaop.OpAddSaturatedInt32x4:
   654  		v.Op = ssaop.OpARM64VSQADD4S
   655  		return true
   656  	case ssaop.OpAddSaturatedInt64s:
   657  		v.Op = ssaop.OpARM64ZSQADDD
   658  		return true
   659  	case ssaop.OpAddSaturatedInt64x2:
   660  		v.Op = ssaop.OpARM64VSQADD2D
   661  		return true
   662  	case ssaop.OpAddSaturatedInt8s:
   663  		v.Op = ssaop.OpARM64ZSQADDB
   664  		return true
   665  	case ssaop.OpAddSaturatedInt8x16:
   666  		v.Op = ssaop.OpARM64VSQADD16B
   667  		return true
   668  	case ssaop.OpAddSaturatedUint16s:
   669  		v.Op = ssaop.OpARM64ZUQADDH
   670  		return true
   671  	case ssaop.OpAddSaturatedUint16x8:
   672  		v.Op = ssaop.OpARM64VUQADD8H
   673  		return true
   674  	case ssaop.OpAddSaturatedUint32s:
   675  		v.Op = ssaop.OpARM64ZUQADDS
   676  		return true
   677  	case ssaop.OpAddSaturatedUint32x4:
   678  		v.Op = ssaop.OpARM64VUQADD4S
   679  		return true
   680  	case ssaop.OpAddSaturatedUint64s:
   681  		v.Op = ssaop.OpARM64ZUQADDD
   682  		return true
   683  	case ssaop.OpAddSaturatedUint64x2:
   684  		v.Op = ssaop.OpARM64VUQADD2D
   685  		return true
   686  	case ssaop.OpAddSaturatedUint8s:
   687  		v.Op = ssaop.OpARM64ZUQADDB
   688  		return true
   689  	case ssaop.OpAddSaturatedUint8x16:
   690  		v.Op = ssaop.OpARM64VUQADD16B
   691  		return true
   692  	case ssaop.OpAddUint16s:
   693  		v.Op = ssaop.OpARM64ZADDH
   694  		return true
   695  	case ssaop.OpAddUint16x8:
   696  		v.Op = ssaop.OpARM64VADD8H
   697  		return true
   698  	case ssaop.OpAddUint32s:
   699  		v.Op = ssaop.OpARM64ZADDS
   700  		return true
   701  	case ssaop.OpAddUint32x4:
   702  		v.Op = ssaop.OpARM64VADD4S
   703  		return true
   704  	case ssaop.OpAddUint64s:
   705  		v.Op = ssaop.OpARM64ZADDD
   706  		return true
   707  	case ssaop.OpAddUint64x2:
   708  		v.Op = ssaop.OpARM64VADD2D
   709  		return true
   710  	case ssaop.OpAddUint8s:
   711  		v.Op = ssaop.OpARM64ZADDB
   712  		return true
   713  	case ssaop.OpAddUint8x16:
   714  		v.Op = ssaop.OpARM64VADD16B
   715  		return true
   716  	case ssaop.OpAddr:
   717  		return rewriteValue_OpAddr(v)
   718  	case ssaop.OpAnd16:
   719  		v.Op = ssaop.OpARM64AND
   720  		return true
   721  	case ssaop.OpAnd32:
   722  		v.Op = ssaop.OpARM64AND
   723  		return true
   724  	case ssaop.OpAnd64:
   725  		v.Op = ssaop.OpARM64AND
   726  		return true
   727  	case ssaop.OpAnd8:
   728  		v.Op = ssaop.OpARM64AND
   729  		return true
   730  	case ssaop.OpAndB:
   731  		v.Op = ssaop.OpARM64AND
   732  		return true
   733  	case ssaop.OpAndInt16s:
   734  		v.Op = ssaop.OpARM64ZANDD
   735  		return true
   736  	case ssaop.OpAndInt16x8:
   737  		v.Op = ssaop.OpARM64VAND16B
   738  		return true
   739  	case ssaop.OpAndInt32s:
   740  		v.Op = ssaop.OpARM64ZANDD
   741  		return true
   742  	case ssaop.OpAndInt32x4:
   743  		v.Op = ssaop.OpARM64VAND16B
   744  		return true
   745  	case ssaop.OpAndInt64s:
   746  		v.Op = ssaop.OpARM64ZANDD
   747  		return true
   748  	case ssaop.OpAndInt64x2:
   749  		v.Op = ssaop.OpARM64VAND16B
   750  		return true
   751  	case ssaop.OpAndInt8s:
   752  		v.Op = ssaop.OpARM64ZANDD
   753  		return true
   754  	case ssaop.OpAndInt8x16:
   755  		v.Op = ssaop.OpARM64VAND16B
   756  		return true
   757  	case ssaop.OpAndNotInt16s:
   758  		v.Op = ssaop.OpARM64ZBICD
   759  		return true
   760  	case ssaop.OpAndNotInt16x8:
   761  		v.Op = ssaop.OpARM64VBIC16B
   762  		return true
   763  	case ssaop.OpAndNotInt32s:
   764  		v.Op = ssaop.OpARM64ZBICD
   765  		return true
   766  	case ssaop.OpAndNotInt32x4:
   767  		v.Op = ssaop.OpARM64VBIC16B
   768  		return true
   769  	case ssaop.OpAndNotInt64s:
   770  		v.Op = ssaop.OpARM64ZBICD
   771  		return true
   772  	case ssaop.OpAndNotInt64x2:
   773  		v.Op = ssaop.OpARM64VBIC16B
   774  		return true
   775  	case ssaop.OpAndNotInt8s:
   776  		v.Op = ssaop.OpARM64ZBICD
   777  		return true
   778  	case ssaop.OpAndNotInt8x16:
   779  		v.Op = ssaop.OpARM64VBIC16B
   780  		return true
   781  	case ssaop.OpAndNotUint16s:
   782  		v.Op = ssaop.OpARM64ZBICD
   783  		return true
   784  	case ssaop.OpAndNotUint16x8:
   785  		v.Op = ssaop.OpARM64VBIC16B
   786  		return true
   787  	case ssaop.OpAndNotUint32s:
   788  		v.Op = ssaop.OpARM64ZBICD
   789  		return true
   790  	case ssaop.OpAndNotUint32x4:
   791  		v.Op = ssaop.OpARM64VBIC16B
   792  		return true
   793  	case ssaop.OpAndNotUint64s:
   794  		v.Op = ssaop.OpARM64ZBICD
   795  		return true
   796  	case ssaop.OpAndNotUint64x2:
   797  		v.Op = ssaop.OpARM64VBIC16B
   798  		return true
   799  	case ssaop.OpAndNotUint8s:
   800  		v.Op = ssaop.OpARM64ZBICD
   801  		return true
   802  	case ssaop.OpAndNotUint8x16:
   803  		v.Op = ssaop.OpARM64VBIC16B
   804  		return true
   805  	case ssaop.OpAndUint16s:
   806  		v.Op = ssaop.OpARM64ZANDD
   807  		return true
   808  	case ssaop.OpAndUint16x8:
   809  		v.Op = ssaop.OpARM64VAND16B
   810  		return true
   811  	case ssaop.OpAndUint32s:
   812  		v.Op = ssaop.OpARM64ZANDD
   813  		return true
   814  	case ssaop.OpAndUint32x4:
   815  		v.Op = ssaop.OpARM64VAND16B
   816  		return true
   817  	case ssaop.OpAndUint64s:
   818  		v.Op = ssaop.OpARM64ZANDD
   819  		return true
   820  	case ssaop.OpAndUint64x2:
   821  		v.Op = ssaop.OpARM64VAND16B
   822  		return true
   823  	case ssaop.OpAndUint8s:
   824  		v.Op = ssaop.OpARM64ZANDD
   825  		return true
   826  	case ssaop.OpAndUint8x16:
   827  		v.Op = ssaop.OpARM64VAND16B
   828  		return true
   829  	case ssaop.OpAtomicAdd32:
   830  		v.Op = ssaop.OpARM64LoweredAtomicAdd32
   831  		return true
   832  	case ssaop.OpAtomicAdd32Variant:
   833  		v.Op = ssaop.OpARM64LoweredAtomicAdd32Variant
   834  		return true
   835  	case ssaop.OpAtomicAdd64:
   836  		v.Op = ssaop.OpARM64LoweredAtomicAdd64
   837  		return true
   838  	case ssaop.OpAtomicAdd64Variant:
   839  		v.Op = ssaop.OpARM64LoweredAtomicAdd64Variant
   840  		return true
   841  	case ssaop.OpAtomicAnd32value:
   842  		v.Op = ssaop.OpARM64LoweredAtomicAnd32
   843  		return true
   844  	case ssaop.OpAtomicAnd32valueVariant:
   845  		v.Op = ssaop.OpARM64LoweredAtomicAnd32Variant
   846  		return true
   847  	case ssaop.OpAtomicAnd64value:
   848  		v.Op = ssaop.OpARM64LoweredAtomicAnd64
   849  		return true
   850  	case ssaop.OpAtomicAnd64valueVariant:
   851  		v.Op = ssaop.OpARM64LoweredAtomicAnd64Variant
   852  		return true
   853  	case ssaop.OpAtomicAnd8value:
   854  		v.Op = ssaop.OpARM64LoweredAtomicAnd8
   855  		return true
   856  	case ssaop.OpAtomicAnd8valueVariant:
   857  		v.Op = ssaop.OpARM64LoweredAtomicAnd8Variant
   858  		return true
   859  	case ssaop.OpAtomicCompareAndSwap32:
   860  		v.Op = ssaop.OpARM64LoweredAtomicCas32
   861  		return true
   862  	case ssaop.OpAtomicCompareAndSwap32Variant:
   863  		v.Op = ssaop.OpARM64LoweredAtomicCas32Variant
   864  		return true
   865  	case ssaop.OpAtomicCompareAndSwap64:
   866  		v.Op = ssaop.OpARM64LoweredAtomicCas64
   867  		return true
   868  	case ssaop.OpAtomicCompareAndSwap64Variant:
   869  		v.Op = ssaop.OpARM64LoweredAtomicCas64Variant
   870  		return true
   871  	case ssaop.OpAtomicExchange32:
   872  		v.Op = ssaop.OpARM64LoweredAtomicExchange32
   873  		return true
   874  	case ssaop.OpAtomicExchange32Variant:
   875  		v.Op = ssaop.OpARM64LoweredAtomicExchange32Variant
   876  		return true
   877  	case ssaop.OpAtomicExchange64:
   878  		v.Op = ssaop.OpARM64LoweredAtomicExchange64
   879  		return true
   880  	case ssaop.OpAtomicExchange64Variant:
   881  		v.Op = ssaop.OpARM64LoweredAtomicExchange64Variant
   882  		return true
   883  	case ssaop.OpAtomicExchange8:
   884  		v.Op = ssaop.OpARM64LoweredAtomicExchange8
   885  		return true
   886  	case ssaop.OpAtomicExchange8Variant:
   887  		v.Op = ssaop.OpARM64LoweredAtomicExchange8Variant
   888  		return true
   889  	case ssaop.OpAtomicLoad32:
   890  		v.Op = ssaop.OpARM64LDARW
   891  		return true
   892  	case ssaop.OpAtomicLoad64:
   893  		v.Op = ssaop.OpARM64LDAR
   894  		return true
   895  	case ssaop.OpAtomicLoad8:
   896  		v.Op = ssaop.OpARM64LDARB
   897  		return true
   898  	case ssaop.OpAtomicLoadPtr:
   899  		v.Op = ssaop.OpARM64LDAR
   900  		return true
   901  	case ssaop.OpAtomicOr32value:
   902  		v.Op = ssaop.OpARM64LoweredAtomicOr32
   903  		return true
   904  	case ssaop.OpAtomicOr32valueVariant:
   905  		v.Op = ssaop.OpARM64LoweredAtomicOr32Variant
   906  		return true
   907  	case ssaop.OpAtomicOr64value:
   908  		v.Op = ssaop.OpARM64LoweredAtomicOr64
   909  		return true
   910  	case ssaop.OpAtomicOr64valueVariant:
   911  		v.Op = ssaop.OpARM64LoweredAtomicOr64Variant
   912  		return true
   913  	case ssaop.OpAtomicOr8value:
   914  		v.Op = ssaop.OpARM64LoweredAtomicOr8
   915  		return true
   916  	case ssaop.OpAtomicOr8valueVariant:
   917  		v.Op = ssaop.OpARM64LoweredAtomicOr8Variant
   918  		return true
   919  	case ssaop.OpAtomicStore32:
   920  		v.Op = ssaop.OpARM64STLRW
   921  		return true
   922  	case ssaop.OpAtomicStore64:
   923  		v.Op = ssaop.OpARM64STLR
   924  		return true
   925  	case ssaop.OpAtomicStore8:
   926  		v.Op = ssaop.OpARM64STLRB
   927  		return true
   928  	case ssaop.OpAtomicStorePtrNoWB:
   929  		v.Op = ssaop.OpARM64STLR
   930  		return true
   931  	case ssaop.OpAverageInt16x8:
   932  		v.Op = ssaop.OpARM64VSRHADD8H
   933  		return true
   934  	case ssaop.OpAverageInt32x4:
   935  		v.Op = ssaop.OpARM64VSRHADD4S
   936  		return true
   937  	case ssaop.OpAverageInt8x16:
   938  		v.Op = ssaop.OpARM64VSRHADD16B
   939  		return true
   940  	case ssaop.OpAverageUint16x8:
   941  		v.Op = ssaop.OpARM64VURHADD8H
   942  		return true
   943  	case ssaop.OpAverageUint32x4:
   944  		v.Op = ssaop.OpARM64VURHADD4S
   945  		return true
   946  	case ssaop.OpAverageUint8x16:
   947  		v.Op = ssaop.OpARM64VURHADD16B
   948  		return true
   949  	case ssaop.OpAvg64u:
   950  		return rewriteValue_OpAvg64u(v)
   951  	case ssaop.OpBitLen16:
   952  		return rewriteValue_OpBitLen16(v)
   953  	case ssaop.OpBitLen32:
   954  		return rewriteValue_OpBitLen32(v)
   955  	case ssaop.OpBitLen64:
   956  		return rewriteValue_OpBitLen64(v)
   957  	case ssaop.OpBitLen8:
   958  		return rewriteValue_OpBitLen8(v)
   959  	case ssaop.OpBitRev16:
   960  		return rewriteValue_OpBitRev16(v)
   961  	case ssaop.OpBitRev32:
   962  		v.Op = ssaop.OpARM64RBITW
   963  		return true
   964  	case ssaop.OpBitRev64:
   965  		v.Op = ssaop.OpARM64RBIT
   966  		return true
   967  	case ssaop.OpBitRev8:
   968  		return rewriteValue_OpBitRev8(v)
   969  	case ssaop.OpBroadcastFloat32s:
   970  		return rewriteValue_OpBroadcastFloat32s(v)
   971  	case ssaop.OpBroadcastFloat64s:
   972  		return rewriteValue_OpBroadcastFloat64s(v)
   973  	case ssaop.OpBroadcastInt16s:
   974  		v.Op = ssaop.OpARM64ZDUPH
   975  		return true
   976  	case ssaop.OpBroadcastInt32s:
   977  		v.Op = ssaop.OpARM64ZDUPS
   978  		return true
   979  	case ssaop.OpBroadcastInt64s:
   980  		v.Op = ssaop.OpARM64ZDUPD
   981  		return true
   982  	case ssaop.OpBroadcastInt8s:
   983  		v.Op = ssaop.OpARM64ZDUPB
   984  		return true
   985  	case ssaop.OpBroadcastUint16s:
   986  		v.Op = ssaop.OpARM64ZDUPH
   987  		return true
   988  	case ssaop.OpBroadcastUint32s:
   989  		v.Op = ssaop.OpARM64ZDUPS
   990  		return true
   991  	case ssaop.OpBroadcastUint64s:
   992  		v.Op = ssaop.OpARM64ZDUPD
   993  		return true
   994  	case ssaop.OpBroadcastUint8s:
   995  		v.Op = ssaop.OpARM64ZDUPB
   996  		return true
   997  	case ssaop.OpBswap16:
   998  		v.Op = ssaop.OpARM64REV16W
   999  		return true
  1000  	case ssaop.OpBswap32:
  1001  		v.Op = ssaop.OpARM64REVW
  1002  		return true
  1003  	case ssaop.OpBswap64:
  1004  		v.Op = ssaop.OpARM64REV
  1005  		return true
  1006  	case ssaop.OpCeil:
  1007  		v.Op = ssaop.OpARM64FRINTPD
  1008  		return true
  1009  	case ssaop.OpCeilFloat32s:
  1010  		return rewriteValue_OpCeilFloat32s(v)
  1011  	case ssaop.OpCeilFloat32x4:
  1012  		v.Op = ssaop.OpARM64VFRINTP4S
  1013  		return true
  1014  	case ssaop.OpCeilFloat64s:
  1015  		return rewriteValue_OpCeilFloat64s(v)
  1016  	case ssaop.OpCeilFloat64x2:
  1017  		v.Op = ssaop.OpARM64VFRINTP2D
  1018  		return true
  1019  	case ssaop.OpClosureCall:
  1020  		v.Op = ssaop.OpARM64CALLclosure
  1021  		return true
  1022  	case ssaop.OpCom16:
  1023  		v.Op = ssaop.OpARM64MVN
  1024  		return true
  1025  	case ssaop.OpCom32:
  1026  		v.Op = ssaop.OpARM64MVN
  1027  		return true
  1028  	case ssaop.OpCom64:
  1029  		v.Op = ssaop.OpARM64MVN
  1030  		return true
  1031  	case ssaop.OpCom8:
  1032  		v.Op = ssaop.OpARM64MVN
  1033  		return true
  1034  	case ssaop.OpConcatAddPairsFloat32x4:
  1035  		v.Op = ssaop.OpARM64VFADDP4S
  1036  		return true
  1037  	case ssaop.OpConcatAddPairsFloat64x2:
  1038  		v.Op = ssaop.OpARM64VFADDP2D
  1039  		return true
  1040  	case ssaop.OpConcatAddPairsInt16x8:
  1041  		v.Op = ssaop.OpARM64VADDP8H
  1042  		return true
  1043  	case ssaop.OpConcatAddPairsInt32x4:
  1044  		v.Op = ssaop.OpARM64VADDP4S
  1045  		return true
  1046  	case ssaop.OpConcatAddPairsInt64x2:
  1047  		v.Op = ssaop.OpARM64VADDP2D
  1048  		return true
  1049  	case ssaop.OpConcatAddPairsInt8x16:
  1050  		v.Op = ssaop.OpARM64VADDP16B
  1051  		return true
  1052  	case ssaop.OpConcatAddPairsUint16x8:
  1053  		v.Op = ssaop.OpARM64VADDP8H
  1054  		return true
  1055  	case ssaop.OpConcatAddPairsUint32x4:
  1056  		v.Op = ssaop.OpARM64VADDP4S
  1057  		return true
  1058  	case ssaop.OpConcatAddPairsUint64x2:
  1059  		v.Op = ssaop.OpARM64VADDP2D
  1060  		return true
  1061  	case ssaop.OpConcatAddPairsUint8x16:
  1062  		v.Op = ssaop.OpARM64VADDP16B
  1063  		return true
  1064  	case ssaop.OpConcatEvenInt16x8:
  1065  		v.Op = ssaop.OpARM64VUZP18H
  1066  		return true
  1067  	case ssaop.OpConcatEvenInt32x4:
  1068  		v.Op = ssaop.OpARM64VUZP14S
  1069  		return true
  1070  	case ssaop.OpConcatEvenInt64x2:
  1071  		v.Op = ssaop.OpARM64VUZP12D
  1072  		return true
  1073  	case ssaop.OpConcatEvenInt8x16:
  1074  		v.Op = ssaop.OpARM64VUZP116B
  1075  		return true
  1076  	case ssaop.OpConcatEvenUint16x8:
  1077  		v.Op = ssaop.OpARM64VUZP18H
  1078  		return true
  1079  	case ssaop.OpConcatEvenUint32x4:
  1080  		v.Op = ssaop.OpARM64VUZP14S
  1081  		return true
  1082  	case ssaop.OpConcatEvenUint64x2:
  1083  		v.Op = ssaop.OpARM64VUZP12D
  1084  		return true
  1085  	case ssaop.OpConcatEvenUint8x16:
  1086  		v.Op = ssaop.OpARM64VUZP116B
  1087  		return true
  1088  	case ssaop.OpConcatMaxPairsFloat32x4:
  1089  		v.Op = ssaop.OpARM64VFMAXP4S
  1090  		return true
  1091  	case ssaop.OpConcatMaxPairsFloat64x2:
  1092  		v.Op = ssaop.OpARM64VFMAXP2D
  1093  		return true
  1094  	case ssaop.OpConcatMaxPairsInt16x8:
  1095  		v.Op = ssaop.OpARM64VSMAXP8H
  1096  		return true
  1097  	case ssaop.OpConcatMaxPairsInt32x4:
  1098  		v.Op = ssaop.OpARM64VSMAXP4S
  1099  		return true
  1100  	case ssaop.OpConcatMaxPairsInt8x16:
  1101  		v.Op = ssaop.OpARM64VSMAXP16B
  1102  		return true
  1103  	case ssaop.OpConcatMaxPairsUint16x8:
  1104  		v.Op = ssaop.OpARM64VUMAXP8H
  1105  		return true
  1106  	case ssaop.OpConcatMaxPairsUint32x4:
  1107  		v.Op = ssaop.OpARM64VUMAXP4S
  1108  		return true
  1109  	case ssaop.OpConcatMaxPairsUint8x16:
  1110  		v.Op = ssaop.OpARM64VUMAXP16B
  1111  		return true
  1112  	case ssaop.OpConcatMinPairsFloat32x4:
  1113  		v.Op = ssaop.OpARM64VFMINP4S
  1114  		return true
  1115  	case ssaop.OpConcatMinPairsFloat64x2:
  1116  		v.Op = ssaop.OpARM64VFMINP2D
  1117  		return true
  1118  	case ssaop.OpConcatMinPairsInt16x8:
  1119  		v.Op = ssaop.OpARM64VSMINP8H
  1120  		return true
  1121  	case ssaop.OpConcatMinPairsInt32x4:
  1122  		v.Op = ssaop.OpARM64VSMINP4S
  1123  		return true
  1124  	case ssaop.OpConcatMinPairsInt8x16:
  1125  		v.Op = ssaop.OpARM64VSMINP16B
  1126  		return true
  1127  	case ssaop.OpConcatMinPairsUint16x8:
  1128  		v.Op = ssaop.OpARM64VUMINP8H
  1129  		return true
  1130  	case ssaop.OpConcatMinPairsUint32x4:
  1131  		v.Op = ssaop.OpARM64VUMINP4S
  1132  		return true
  1133  	case ssaop.OpConcatMinPairsUint8x16:
  1134  		v.Op = ssaop.OpARM64VUMINP16B
  1135  		return true
  1136  	case ssaop.OpConcatOddInt16x8:
  1137  		v.Op = ssaop.OpARM64VUZP28H
  1138  		return true
  1139  	case ssaop.OpConcatOddInt32x4:
  1140  		v.Op = ssaop.OpARM64VUZP24S
  1141  		return true
  1142  	case ssaop.OpConcatOddInt64x2:
  1143  		v.Op = ssaop.OpARM64VUZP22D
  1144  		return true
  1145  	case ssaop.OpConcatOddInt8x16:
  1146  		v.Op = ssaop.OpARM64VUZP216B
  1147  		return true
  1148  	case ssaop.OpConcatOddUint16x8:
  1149  		v.Op = ssaop.OpARM64VUZP28H
  1150  		return true
  1151  	case ssaop.OpConcatOddUint32x4:
  1152  		v.Op = ssaop.OpARM64VUZP24S
  1153  		return true
  1154  	case ssaop.OpConcatOddUint64x2:
  1155  		v.Op = ssaop.OpARM64VUZP22D
  1156  		return true
  1157  	case ssaop.OpConcatOddUint8x16:
  1158  		v.Op = ssaop.OpARM64VUZP216B
  1159  		return true
  1160  	case ssaop.OpConcatShiftBytesRightUint8x16:
  1161  		v.Op = ssaop.OpARM64VEXT16B
  1162  		return true
  1163  	case ssaop.OpCondSelect:
  1164  		return rewriteValue_OpCondSelect(v)
  1165  	case ssaop.OpConst16:
  1166  		return rewriteValue_OpConst16(v)
  1167  	case ssaop.OpConst32:
  1168  		return rewriteValue_OpConst32(v)
  1169  	case ssaop.OpConst32F:
  1170  		return rewriteValue_OpConst32F(v)
  1171  	case ssaop.OpConst64:
  1172  		return rewriteValue_OpConst64(v)
  1173  	case ssaop.OpConst64F:
  1174  		return rewriteValue_OpConst64F(v)
  1175  	case ssaop.OpConst8:
  1176  		return rewriteValue_OpConst8(v)
  1177  	case ssaop.OpConstBool:
  1178  		return rewriteValue_OpConstBool(v)
  1179  	case ssaop.OpConstNil:
  1180  		return rewriteValue_OpConstNil(v)
  1181  	case ssaop.OpConvertLo2ToFloat64Float32x4:
  1182  		v.Op = ssaop.OpARM64VFCVTL4S
  1183  		return true
  1184  	case ssaop.OpConvertToFloat32Float64x2:
  1185  		v.Op = ssaop.OpARM64VFCVTN2D
  1186  		return true
  1187  	case ssaop.OpConvertToFloat32Int32x4:
  1188  		v.Op = ssaop.OpARM64VSCVTF4S
  1189  		return true
  1190  	case ssaop.OpConvertToFloat32Uint32x4:
  1191  		v.Op = ssaop.OpARM64VUCVTF4S
  1192  		return true
  1193  	case ssaop.OpConvertToFloat64Int64x2:
  1194  		v.Op = ssaop.OpARM64VSCVTF2D
  1195  		return true
  1196  	case ssaop.OpConvertToFloat64Uint64x2:
  1197  		v.Op = ssaop.OpARM64VUCVTF2D
  1198  		return true
  1199  	case ssaop.OpConvertToInt32Float32x4:
  1200  		v.Op = ssaop.OpARM64VFCVTZS4S
  1201  		return true
  1202  	case ssaop.OpConvertToInt64Float64x2:
  1203  		v.Op = ssaop.OpARM64VFCVTZS2D
  1204  		return true
  1205  	case ssaop.OpConvertToUint32Float32x4:
  1206  		v.Op = ssaop.OpARM64VFCVTZU4S
  1207  		return true
  1208  	case ssaop.OpConvertToUint64Float64x2:
  1209  		v.Op = ssaop.OpARM64VFCVTZU2D
  1210  		return true
  1211  	case ssaop.OpCount8s:
  1212  		return rewriteValue_OpCount8s(v)
  1213  	case ssaop.OpCtz16:
  1214  		return rewriteValue_OpCtz16(v)
  1215  	case ssaop.OpCtz16NonZero:
  1216  		v.Op = ssaop.OpCtz32
  1217  		return true
  1218  	case ssaop.OpCtz32:
  1219  		return rewriteValue_OpCtz32(v)
  1220  	case ssaop.OpCtz32NonZero:
  1221  		v.Op = ssaop.OpCtz32
  1222  		return true
  1223  	case ssaop.OpCtz64:
  1224  		return rewriteValue_OpCtz64(v)
  1225  	case ssaop.OpCtz64NonZero:
  1226  		v.Op = ssaop.OpCtz64
  1227  		return true
  1228  	case ssaop.OpCtz8:
  1229  		return rewriteValue_OpCtz8(v)
  1230  	case ssaop.OpCtz8NonZero:
  1231  		v.Op = ssaop.OpCtz32
  1232  		return true
  1233  	case ssaop.OpCvt32Fto32:
  1234  		v.Op = ssaop.OpARM64FCVTZSSW
  1235  		return true
  1236  	case ssaop.OpCvt32Fto32U:
  1237  		v.Op = ssaop.OpARM64FCVTZUSW
  1238  		return true
  1239  	case ssaop.OpCvt32Fto64:
  1240  		v.Op = ssaop.OpARM64FCVTZSS
  1241  		return true
  1242  	case ssaop.OpCvt32Fto64F:
  1243  		v.Op = ssaop.OpARM64FCVTSD
  1244  		return true
  1245  	case ssaop.OpCvt32Fto64U:
  1246  		v.Op = ssaop.OpARM64FCVTZUS
  1247  		return true
  1248  	case ssaop.OpCvt32Uto32F:
  1249  		v.Op = ssaop.OpARM64UCVTFWS
  1250  		return true
  1251  	case ssaop.OpCvt32Uto64F:
  1252  		v.Op = ssaop.OpARM64UCVTFWD
  1253  		return true
  1254  	case ssaop.OpCvt32to32F:
  1255  		v.Op = ssaop.OpARM64SCVTFWS
  1256  		return true
  1257  	case ssaop.OpCvt32to64F:
  1258  		v.Op = ssaop.OpARM64SCVTFWD
  1259  		return true
  1260  	case ssaop.OpCvt64Fto32:
  1261  		v.Op = ssaop.OpARM64FCVTZSDW
  1262  		return true
  1263  	case ssaop.OpCvt64Fto32F:
  1264  		v.Op = ssaop.OpARM64FCVTDS
  1265  		return true
  1266  	case ssaop.OpCvt64Fto32U:
  1267  		v.Op = ssaop.OpARM64FCVTZUDW
  1268  		return true
  1269  	case ssaop.OpCvt64Fto64:
  1270  		v.Op = ssaop.OpARM64FCVTZSD
  1271  		return true
  1272  	case ssaop.OpCvt64Fto64U:
  1273  		v.Op = ssaop.OpARM64FCVTZUD
  1274  		return true
  1275  	case ssaop.OpCvt64Uto32F:
  1276  		v.Op = ssaop.OpARM64UCVTFS
  1277  		return true
  1278  	case ssaop.OpCvt64Uto64F:
  1279  		v.Op = ssaop.OpARM64UCVTFD
  1280  		return true
  1281  	case ssaop.OpCvt64to32F:
  1282  		v.Op = ssaop.OpARM64SCVTFS
  1283  		return true
  1284  	case ssaop.OpCvt64to64F:
  1285  		v.Op = ssaop.OpARM64SCVTFD
  1286  		return true
  1287  	case ssaop.OpCvtBoolToUint8:
  1288  		v.Op = ssaop.OpCopy
  1289  		return true
  1290  	case ssaop.OpDiv16:
  1291  		return rewriteValue_OpDiv16(v)
  1292  	case ssaop.OpDiv16u:
  1293  		return rewriteValue_OpDiv16u(v)
  1294  	case ssaop.OpDiv32:
  1295  		return rewriteValue_OpDiv32(v)
  1296  	case ssaop.OpDiv32F:
  1297  		v.Op = ssaop.OpARM64FDIVS
  1298  		return true
  1299  	case ssaop.OpDiv32u:
  1300  		v.Op = ssaop.OpARM64UDIVW
  1301  		return true
  1302  	case ssaop.OpDiv64:
  1303  		return rewriteValue_OpDiv64(v)
  1304  	case ssaop.OpDiv64F:
  1305  		v.Op = ssaop.OpARM64FDIVD
  1306  		return true
  1307  	case ssaop.OpDiv64u:
  1308  		v.Op = ssaop.OpARM64UDIV
  1309  		return true
  1310  	case ssaop.OpDiv8:
  1311  		return rewriteValue_OpDiv8(v)
  1312  	case ssaop.OpDiv8u:
  1313  		return rewriteValue_OpDiv8u(v)
  1314  	case ssaop.OpDivFloat32s:
  1315  		return rewriteValue_OpDivFloat32s(v)
  1316  	case ssaop.OpDivFloat32x4:
  1317  		v.Op = ssaop.OpARM64VFDIV4S
  1318  		return true
  1319  	case ssaop.OpDivFloat64s:
  1320  		return rewriteValue_OpDivFloat64s(v)
  1321  	case ssaop.OpDivFloat64x2:
  1322  		v.Op = ssaop.OpARM64VFDIV2D
  1323  		return true
  1324  	case ssaop.OpDivInt32s:
  1325  		return rewriteValue_OpDivInt32s(v)
  1326  	case ssaop.OpDivInt64s:
  1327  		return rewriteValue_OpDivInt64s(v)
  1328  	case ssaop.OpDivUint32s:
  1329  		return rewriteValue_OpDivUint32s(v)
  1330  	case ssaop.OpDivUint64s:
  1331  		return rewriteValue_OpDivUint64s(v)
  1332  	case ssaop.OpEq16:
  1333  		return rewriteValue_OpEq16(v)
  1334  	case ssaop.OpEq32:
  1335  		return rewriteValue_OpEq32(v)
  1336  	case ssaop.OpEq32F:
  1337  		return rewriteValue_OpEq32F(v)
  1338  	case ssaop.OpEq64:
  1339  		return rewriteValue_OpEq64(v)
  1340  	case ssaop.OpEq64F:
  1341  		return rewriteValue_OpEq64F(v)
  1342  	case ssaop.OpEq8:
  1343  		return rewriteValue_OpEq8(v)
  1344  	case ssaop.OpEqB:
  1345  		return rewriteValue_OpEqB(v)
  1346  	case ssaop.OpEqPtr:
  1347  		return rewriteValue_OpEqPtr(v)
  1348  	case ssaop.OpEqualFloat32s:
  1349  		return rewriteValue_OpEqualFloat32s(v)
  1350  	case ssaop.OpEqualFloat32x4:
  1351  		v.Op = ssaop.OpARM64VFCMEQ4S
  1352  		return true
  1353  	case ssaop.OpEqualFloat64s:
  1354  		return rewriteValue_OpEqualFloat64s(v)
  1355  	case ssaop.OpEqualFloat64x2:
  1356  		v.Op = ssaop.OpARM64VFCMEQ2D
  1357  		return true
  1358  	case ssaop.OpEqualInt16s:
  1359  		return rewriteValue_OpEqualInt16s(v)
  1360  	case ssaop.OpEqualInt16x8:
  1361  		v.Op = ssaop.OpARM64VCMEQ8H
  1362  		return true
  1363  	case ssaop.OpEqualInt32s:
  1364  		return rewriteValue_OpEqualInt32s(v)
  1365  	case ssaop.OpEqualInt32x4:
  1366  		v.Op = ssaop.OpARM64VCMEQ4S
  1367  		return true
  1368  	case ssaop.OpEqualInt64s:
  1369  		return rewriteValue_OpEqualInt64s(v)
  1370  	case ssaop.OpEqualInt64x2:
  1371  		v.Op = ssaop.OpARM64VCMEQ2D
  1372  		return true
  1373  	case ssaop.OpEqualInt8s:
  1374  		return rewriteValue_OpEqualInt8s(v)
  1375  	case ssaop.OpEqualInt8x16:
  1376  		v.Op = ssaop.OpARM64VCMEQ16B
  1377  		return true
  1378  	case ssaop.OpEqualUint16s:
  1379  		return rewriteValue_OpEqualUint16s(v)
  1380  	case ssaop.OpEqualUint16x8:
  1381  		v.Op = ssaop.OpARM64VCMEQ8H
  1382  		return true
  1383  	case ssaop.OpEqualUint32s:
  1384  		return rewriteValue_OpEqualUint32s(v)
  1385  	case ssaop.OpEqualUint32x4:
  1386  		v.Op = ssaop.OpARM64VCMEQ4S
  1387  		return true
  1388  	case ssaop.OpEqualUint64s:
  1389  		return rewriteValue_OpEqualUint64s(v)
  1390  	case ssaop.OpEqualUint64x2:
  1391  		v.Op = ssaop.OpARM64VCMEQ2D
  1392  		return true
  1393  	case ssaop.OpEqualUint8s:
  1394  		return rewriteValue_OpEqualUint8s(v)
  1395  	case ssaop.OpEqualUint8x16:
  1396  		v.Op = ssaop.OpARM64VCMEQ16B
  1397  		return true
  1398  	case ssaop.OpExtendLo2ToInt64Int32x4:
  1399  		v.Op = ssaop.OpARM64VSXTL4S
  1400  		return true
  1401  	case ssaop.OpExtendLo2ToUint64Uint32x4:
  1402  		v.Op = ssaop.OpARM64VUXTL4S
  1403  		return true
  1404  	case ssaop.OpExtendLo4ToInt32Int16x8:
  1405  		v.Op = ssaop.OpARM64VSXTL8H
  1406  		return true
  1407  	case ssaop.OpExtendLo4ToUint32Uint16x8:
  1408  		v.Op = ssaop.OpARM64VUXTL8H
  1409  		return true
  1410  	case ssaop.OpExtendLo8ToInt16Int8x16:
  1411  		v.Op = ssaop.OpARM64VSXTL16B
  1412  		return true
  1413  	case ssaop.OpExtendLo8ToUint16Uint8x16:
  1414  		v.Op = ssaop.OpARM64VUXTL16B
  1415  		return true
  1416  	case ssaop.OpFMA:
  1417  		return rewriteValue_OpFMA(v)
  1418  	case ssaop.OpFloor:
  1419  		v.Op = ssaop.OpARM64FRINTMD
  1420  		return true
  1421  	case ssaop.OpFloorFloat32s:
  1422  		return rewriteValue_OpFloorFloat32s(v)
  1423  	case ssaop.OpFloorFloat32x4:
  1424  		v.Op = ssaop.OpARM64VFRINTM4S
  1425  		return true
  1426  	case ssaop.OpFloorFloat64s:
  1427  		return rewriteValue_OpFloorFloat64s(v)
  1428  	case ssaop.OpFloorFloat64x2:
  1429  		v.Op = ssaop.OpARM64VFRINTM2D
  1430  		return true
  1431  	case ssaop.OpGetCallerPC:
  1432  		v.Op = ssaop.OpARM64LoweredGetCallerPC
  1433  		return true
  1434  	case ssaop.OpGetCallerSP:
  1435  		v.Op = ssaop.OpARM64LoweredGetCallerSP
  1436  		return true
  1437  	case ssaop.OpGetClosurePtr:
  1438  		v.Op = ssaop.OpARM64LoweredGetClosurePtr
  1439  		return true
  1440  	case ssaop.OpGetElemFloat32x4:
  1441  		v.Op = ssaop.OpARM64VDUPSextr
  1442  		return true
  1443  	case ssaop.OpGetElemFloat64x2:
  1444  		v.Op = ssaop.OpARM64VDUPDextr
  1445  		return true
  1446  	case ssaop.OpGetElemInt16x8:
  1447  		v.Op = ssaop.OpARM64VMOVHextr
  1448  		return true
  1449  	case ssaop.OpGetElemInt32x4:
  1450  		v.Op = ssaop.OpARM64VMOVSextr
  1451  		return true
  1452  	case ssaop.OpGetElemInt64x2:
  1453  		v.Op = ssaop.OpARM64VMOVDextr
  1454  		return true
  1455  	case ssaop.OpGetElemInt8x16:
  1456  		v.Op = ssaop.OpARM64VMOVBextr
  1457  		return true
  1458  	case ssaop.OpGetElemUint16x8:
  1459  		v.Op = ssaop.OpARM64VMOVHextr
  1460  		return true
  1461  	case ssaop.OpGetElemUint32x4:
  1462  		v.Op = ssaop.OpARM64VMOVSextr
  1463  		return true
  1464  	case ssaop.OpGetElemUint64x2:
  1465  		v.Op = ssaop.OpARM64VMOVDextr
  1466  		return true
  1467  	case ssaop.OpGetElemUint8x16:
  1468  		v.Op = ssaop.OpARM64VMOVBextr
  1469  		return true
  1470  	case ssaop.OpGreaterEqualFloat32s:
  1471  		return rewriteValue_OpGreaterEqualFloat32s(v)
  1472  	case ssaop.OpGreaterEqualFloat32x4:
  1473  		v.Op = ssaop.OpARM64VFCMGE4S
  1474  		return true
  1475  	case ssaop.OpGreaterEqualFloat64s:
  1476  		return rewriteValue_OpGreaterEqualFloat64s(v)
  1477  	case ssaop.OpGreaterEqualFloat64x2:
  1478  		v.Op = ssaop.OpARM64VFCMGE2D
  1479  		return true
  1480  	case ssaop.OpGreaterEqualInt16s:
  1481  		return rewriteValue_OpGreaterEqualInt16s(v)
  1482  	case ssaop.OpGreaterEqualInt16x8:
  1483  		v.Op = ssaop.OpARM64VCMGE8H
  1484  		return true
  1485  	case ssaop.OpGreaterEqualInt32s:
  1486  		return rewriteValue_OpGreaterEqualInt32s(v)
  1487  	case ssaop.OpGreaterEqualInt32x4:
  1488  		v.Op = ssaop.OpARM64VCMGE4S
  1489  		return true
  1490  	case ssaop.OpGreaterEqualInt64s:
  1491  		return rewriteValue_OpGreaterEqualInt64s(v)
  1492  	case ssaop.OpGreaterEqualInt64x2:
  1493  		v.Op = ssaop.OpARM64VCMGE2D
  1494  		return true
  1495  	case ssaop.OpGreaterEqualInt8s:
  1496  		return rewriteValue_OpGreaterEqualInt8s(v)
  1497  	case ssaop.OpGreaterEqualInt8x16:
  1498  		v.Op = ssaop.OpARM64VCMGE16B
  1499  		return true
  1500  	case ssaop.OpGreaterEqualUint16s:
  1501  		return rewriteValue_OpGreaterEqualUint16s(v)
  1502  	case ssaop.OpGreaterEqualUint16x8:
  1503  		v.Op = ssaop.OpARM64VCMHS8H
  1504  		return true
  1505  	case ssaop.OpGreaterEqualUint32s:
  1506  		return rewriteValue_OpGreaterEqualUint32s(v)
  1507  	case ssaop.OpGreaterEqualUint32x4:
  1508  		v.Op = ssaop.OpARM64VCMHS4S
  1509  		return true
  1510  	case ssaop.OpGreaterEqualUint64s:
  1511  		return rewriteValue_OpGreaterEqualUint64s(v)
  1512  	case ssaop.OpGreaterEqualUint64x2:
  1513  		v.Op = ssaop.OpARM64VCMHS2D
  1514  		return true
  1515  	case ssaop.OpGreaterEqualUint8s:
  1516  		return rewriteValue_OpGreaterEqualUint8s(v)
  1517  	case ssaop.OpGreaterEqualUint8x16:
  1518  		v.Op = ssaop.OpARM64VCMHS16B
  1519  		return true
  1520  	case ssaop.OpGreaterFloat32s:
  1521  		return rewriteValue_OpGreaterFloat32s(v)
  1522  	case ssaop.OpGreaterFloat32x4:
  1523  		v.Op = ssaop.OpARM64VFCMGT4S
  1524  		return true
  1525  	case ssaop.OpGreaterFloat64s:
  1526  		return rewriteValue_OpGreaterFloat64s(v)
  1527  	case ssaop.OpGreaterFloat64x2:
  1528  		v.Op = ssaop.OpARM64VFCMGT2D
  1529  		return true
  1530  	case ssaop.OpGreaterInt16s:
  1531  		return rewriteValue_OpGreaterInt16s(v)
  1532  	case ssaop.OpGreaterInt16x8:
  1533  		v.Op = ssaop.OpARM64VCMGT8H
  1534  		return true
  1535  	case ssaop.OpGreaterInt32s:
  1536  		return rewriteValue_OpGreaterInt32s(v)
  1537  	case ssaop.OpGreaterInt32x4:
  1538  		v.Op = ssaop.OpARM64VCMGT4S
  1539  		return true
  1540  	case ssaop.OpGreaterInt64s:
  1541  		return rewriteValue_OpGreaterInt64s(v)
  1542  	case ssaop.OpGreaterInt64x2:
  1543  		v.Op = ssaop.OpARM64VCMGT2D
  1544  		return true
  1545  	case ssaop.OpGreaterInt8s:
  1546  		return rewriteValue_OpGreaterInt8s(v)
  1547  	case ssaop.OpGreaterInt8x16:
  1548  		v.Op = ssaop.OpARM64VCMGT16B
  1549  		return true
  1550  	case ssaop.OpGreaterUint16s:
  1551  		return rewriteValue_OpGreaterUint16s(v)
  1552  	case ssaop.OpGreaterUint16x8:
  1553  		v.Op = ssaop.OpARM64VCMHI8H
  1554  		return true
  1555  	case ssaop.OpGreaterUint32s:
  1556  		return rewriteValue_OpGreaterUint32s(v)
  1557  	case ssaop.OpGreaterUint32x4:
  1558  		v.Op = ssaop.OpARM64VCMHI4S
  1559  		return true
  1560  	case ssaop.OpGreaterUint64s:
  1561  		return rewriteValue_OpGreaterUint64s(v)
  1562  	case ssaop.OpGreaterUint64x2:
  1563  		v.Op = ssaop.OpARM64VCMHI2D
  1564  		return true
  1565  	case ssaop.OpGreaterUint8s:
  1566  		return rewriteValue_OpGreaterUint8s(v)
  1567  	case ssaop.OpGreaterUint8x16:
  1568  		v.Op = ssaop.OpARM64VCMHI16B
  1569  		return true
  1570  	case ssaop.OpHmul32:
  1571  		return rewriteValue_OpHmul32(v)
  1572  	case ssaop.OpHmul32u:
  1573  		return rewriteValue_OpHmul32u(v)
  1574  	case ssaop.OpHmul64:
  1575  		v.Op = ssaop.OpARM64MULH
  1576  		return true
  1577  	case ssaop.OpHmul64u:
  1578  		v.Op = ssaop.OpARM64UMULH
  1579  		return true
  1580  	case ssaop.OpIfElseFloat32s:
  1581  		return rewriteValue_OpIfElseFloat32s(v)
  1582  	case ssaop.OpIfElseFloat64s:
  1583  		return rewriteValue_OpIfElseFloat64s(v)
  1584  	case ssaop.OpIfElseInt16s:
  1585  		return rewriteValue_OpIfElseInt16s(v)
  1586  	case ssaop.OpIfElseInt32s:
  1587  		return rewriteValue_OpIfElseInt32s(v)
  1588  	case ssaop.OpIfElseInt64s:
  1589  		return rewriteValue_OpIfElseInt64s(v)
  1590  	case ssaop.OpIfElseInt8s:
  1591  		return rewriteValue_OpIfElseInt8s(v)
  1592  	case ssaop.OpIfElseUint16s:
  1593  		return rewriteValue_OpIfElseUint16s(v)
  1594  	case ssaop.OpIfElseUint32s:
  1595  		return rewriteValue_OpIfElseUint32s(v)
  1596  	case ssaop.OpIfElseUint64s:
  1597  		return rewriteValue_OpIfElseUint64s(v)
  1598  	case ssaop.OpIfElseUint8s:
  1599  		return rewriteValue_OpIfElseUint8s(v)
  1600  	case ssaop.OpInterCall:
  1601  		v.Op = ssaop.OpARM64CALLinter
  1602  		return true
  1603  	case ssaop.OpInterleaveEvenInt16x8:
  1604  		v.Op = ssaop.OpARM64VTRN18H
  1605  		return true
  1606  	case ssaop.OpInterleaveEvenInt32x4:
  1607  		v.Op = ssaop.OpARM64VTRN14S
  1608  		return true
  1609  	case ssaop.OpInterleaveEvenInt64x2:
  1610  		v.Op = ssaop.OpARM64VTRN12D
  1611  		return true
  1612  	case ssaop.OpInterleaveEvenInt8x16:
  1613  		v.Op = ssaop.OpARM64VTRN116B
  1614  		return true
  1615  	case ssaop.OpInterleaveEvenUint16x8:
  1616  		v.Op = ssaop.OpARM64VTRN18H
  1617  		return true
  1618  	case ssaop.OpInterleaveEvenUint32x4:
  1619  		v.Op = ssaop.OpARM64VTRN14S
  1620  		return true
  1621  	case ssaop.OpInterleaveEvenUint64x2:
  1622  		v.Op = ssaop.OpARM64VTRN12D
  1623  		return true
  1624  	case ssaop.OpInterleaveEvenUint8x16:
  1625  		v.Op = ssaop.OpARM64VTRN116B
  1626  		return true
  1627  	case ssaop.OpInterleaveHiInt16x8:
  1628  		v.Op = ssaop.OpARM64VZIP28H
  1629  		return true
  1630  	case ssaop.OpInterleaveHiInt32x4:
  1631  		v.Op = ssaop.OpARM64VZIP24S
  1632  		return true
  1633  	case ssaop.OpInterleaveHiInt64x2:
  1634  		v.Op = ssaop.OpARM64VZIP22D
  1635  		return true
  1636  	case ssaop.OpInterleaveHiInt8x16:
  1637  		v.Op = ssaop.OpARM64VZIP216B
  1638  		return true
  1639  	case ssaop.OpInterleaveHiUint16x8:
  1640  		v.Op = ssaop.OpARM64VZIP28H
  1641  		return true
  1642  	case ssaop.OpInterleaveHiUint32x4:
  1643  		v.Op = ssaop.OpARM64VZIP24S
  1644  		return true
  1645  	case ssaop.OpInterleaveHiUint64x2:
  1646  		v.Op = ssaop.OpARM64VZIP22D
  1647  		return true
  1648  	case ssaop.OpInterleaveHiUint8x16:
  1649  		v.Op = ssaop.OpARM64VZIP216B
  1650  		return true
  1651  	case ssaop.OpInterleaveLoInt16x8:
  1652  		v.Op = ssaop.OpARM64VZIP18H
  1653  		return true
  1654  	case ssaop.OpInterleaveLoInt32x4:
  1655  		v.Op = ssaop.OpARM64VZIP14S
  1656  		return true
  1657  	case ssaop.OpInterleaveLoInt64x2:
  1658  		v.Op = ssaop.OpARM64VZIP12D
  1659  		return true
  1660  	case ssaop.OpInterleaveLoInt8x16:
  1661  		v.Op = ssaop.OpARM64VZIP116B
  1662  		return true
  1663  	case ssaop.OpInterleaveLoUint16x8:
  1664  		v.Op = ssaop.OpARM64VZIP18H
  1665  		return true
  1666  	case ssaop.OpInterleaveLoUint32x4:
  1667  		v.Op = ssaop.OpARM64VZIP14S
  1668  		return true
  1669  	case ssaop.OpInterleaveLoUint64x2:
  1670  		v.Op = ssaop.OpARM64VZIP12D
  1671  		return true
  1672  	case ssaop.OpInterleaveLoUint8x16:
  1673  		v.Op = ssaop.OpARM64VZIP116B
  1674  		return true
  1675  	case ssaop.OpInterleaveOddInt16x8:
  1676  		v.Op = ssaop.OpARM64VTRN28H
  1677  		return true
  1678  	case ssaop.OpInterleaveOddInt32x4:
  1679  		v.Op = ssaop.OpARM64VTRN24S
  1680  		return true
  1681  	case ssaop.OpInterleaveOddInt64x2:
  1682  		v.Op = ssaop.OpARM64VTRN22D
  1683  		return true
  1684  	case ssaop.OpInterleaveOddInt8x16:
  1685  		v.Op = ssaop.OpARM64VTRN216B
  1686  		return true
  1687  	case ssaop.OpInterleaveOddUint16x8:
  1688  		v.Op = ssaop.OpARM64VTRN28H
  1689  		return true
  1690  	case ssaop.OpInterleaveOddUint32x4:
  1691  		v.Op = ssaop.OpARM64VTRN24S
  1692  		return true
  1693  	case ssaop.OpInterleaveOddUint64x2:
  1694  		v.Op = ssaop.OpARM64VTRN22D
  1695  		return true
  1696  	case ssaop.OpInterleaveOddUint8x16:
  1697  		v.Op = ssaop.OpARM64VTRN216B
  1698  		return true
  1699  	case ssaop.OpIsInBounds:
  1700  		return rewriteValue_OpIsInBounds(v)
  1701  	case ssaop.OpIsNonNil:
  1702  		return rewriteValue_OpIsNonNil(v)
  1703  	case ssaop.OpIsSliceInBounds:
  1704  		return rewriteValue_OpIsSliceInBounds(v)
  1705  	case ssaop.OpLeadingSignBitsInt16x8:
  1706  		v.Op = ssaop.OpARM64VCLS8H
  1707  		return true
  1708  	case ssaop.OpLeadingSignBitsInt32x4:
  1709  		v.Op = ssaop.OpARM64VCLS4S
  1710  		return true
  1711  	case ssaop.OpLeadingSignBitsInt8x16:
  1712  		v.Op = ssaop.OpARM64VCLS16B
  1713  		return true
  1714  	case ssaop.OpLeadingSignBitsUint16x8:
  1715  		v.Op = ssaop.OpARM64VCLS8H
  1716  		return true
  1717  	case ssaop.OpLeadingSignBitsUint32x4:
  1718  		v.Op = ssaop.OpARM64VCLS4S
  1719  		return true
  1720  	case ssaop.OpLeadingSignBitsUint8x16:
  1721  		v.Op = ssaop.OpARM64VCLS16B
  1722  		return true
  1723  	case ssaop.OpLeadingZerosInt16x8:
  1724  		v.Op = ssaop.OpARM64VCLZ8H
  1725  		return true
  1726  	case ssaop.OpLeadingZerosInt32x4:
  1727  		v.Op = ssaop.OpARM64VCLZ4S
  1728  		return true
  1729  	case ssaop.OpLeadingZerosInt8x16:
  1730  		v.Op = ssaop.OpARM64VCLZ16B
  1731  		return true
  1732  	case ssaop.OpLeadingZerosUint16x8:
  1733  		v.Op = ssaop.OpARM64VCLZ8H
  1734  		return true
  1735  	case ssaop.OpLeadingZerosUint32x4:
  1736  		v.Op = ssaop.OpARM64VCLZ4S
  1737  		return true
  1738  	case ssaop.OpLeadingZerosUint8x16:
  1739  		v.Op = ssaop.OpARM64VCLZ16B
  1740  		return true
  1741  	case ssaop.OpLeq16:
  1742  		return rewriteValue_OpLeq16(v)
  1743  	case ssaop.OpLeq16U:
  1744  		return rewriteValue_OpLeq16U(v)
  1745  	case ssaop.OpLeq32:
  1746  		return rewriteValue_OpLeq32(v)
  1747  	case ssaop.OpLeq32F:
  1748  		return rewriteValue_OpLeq32F(v)
  1749  	case ssaop.OpLeq32U:
  1750  		return rewriteValue_OpLeq32U(v)
  1751  	case ssaop.OpLeq64:
  1752  		return rewriteValue_OpLeq64(v)
  1753  	case ssaop.OpLeq64F:
  1754  		return rewriteValue_OpLeq64F(v)
  1755  	case ssaop.OpLeq64U:
  1756  		return rewriteValue_OpLeq64U(v)
  1757  	case ssaop.OpLeq8:
  1758  		return rewriteValue_OpLeq8(v)
  1759  	case ssaop.OpLeq8U:
  1760  		return rewriteValue_OpLeq8U(v)
  1761  	case ssaop.OpLess16:
  1762  		return rewriteValue_OpLess16(v)
  1763  	case ssaop.OpLess16U:
  1764  		return rewriteValue_OpLess16U(v)
  1765  	case ssaop.OpLess32:
  1766  		return rewriteValue_OpLess32(v)
  1767  	case ssaop.OpLess32F:
  1768  		return rewriteValue_OpLess32F(v)
  1769  	case ssaop.OpLess32U:
  1770  		return rewriteValue_OpLess32U(v)
  1771  	case ssaop.OpLess64:
  1772  		return rewriteValue_OpLess64(v)
  1773  	case ssaop.OpLess64F:
  1774  		return rewriteValue_OpLess64F(v)
  1775  	case ssaop.OpLess64U:
  1776  		return rewriteValue_OpLess64U(v)
  1777  	case ssaop.OpLess8:
  1778  		return rewriteValue_OpLess8(v)
  1779  	case ssaop.OpLess8U:
  1780  		return rewriteValue_OpLess8U(v)
  1781  	case ssaop.OpLoad:
  1782  		return rewriteValue_OpLoad(v)
  1783  	case ssaop.OpLoadMasked8:
  1784  		return rewriteValue_OpLoadMasked8(v)
  1785  	case ssaop.OpLocalAddr:
  1786  		return rewriteValue_OpLocalAddr(v)
  1787  	case ssaop.OpLookupOrZeroInt8x16:
  1788  		v.Op = ssaop.OpARM64VTBL16B
  1789  		return true
  1790  	case ssaop.OpLookupOrZeroUint8x16:
  1791  		v.Op = ssaop.OpARM64VTBL16B
  1792  		return true
  1793  	case ssaop.OpLsh16x16:
  1794  		v.Op = ssaop.OpLsh64x16
  1795  		return true
  1796  	case ssaop.OpLsh16x32:
  1797  		v.Op = ssaop.OpLsh64x32
  1798  		return true
  1799  	case ssaop.OpLsh16x64:
  1800  		v.Op = ssaop.OpLsh64x64
  1801  		return true
  1802  	case ssaop.OpLsh16x8:
  1803  		v.Op = ssaop.OpLsh64x8
  1804  		return true
  1805  	case ssaop.OpLsh32x16:
  1806  		v.Op = ssaop.OpLsh64x16
  1807  		return true
  1808  	case ssaop.OpLsh32x32:
  1809  		v.Op = ssaop.OpLsh64x32
  1810  		return true
  1811  	case ssaop.OpLsh32x64:
  1812  		v.Op = ssaop.OpLsh64x64
  1813  		return true
  1814  	case ssaop.OpLsh32x8:
  1815  		v.Op = ssaop.OpLsh64x8
  1816  		return true
  1817  	case ssaop.OpLsh64x16:
  1818  		return rewriteValue_OpLsh64x16(v)
  1819  	case ssaop.OpLsh64x32:
  1820  		return rewriteValue_OpLsh64x32(v)
  1821  	case ssaop.OpLsh64x64:
  1822  		return rewriteValue_OpLsh64x64(v)
  1823  	case ssaop.OpLsh64x8:
  1824  		return rewriteValue_OpLsh64x8(v)
  1825  	case ssaop.OpLsh8x16:
  1826  		v.Op = ssaop.OpLsh64x16
  1827  		return true
  1828  	case ssaop.OpLsh8x32:
  1829  		v.Op = ssaop.OpLsh64x32
  1830  		return true
  1831  	case ssaop.OpLsh8x64:
  1832  		v.Op = ssaop.OpLsh64x64
  1833  		return true
  1834  	case ssaop.OpLsh8x8:
  1835  		v.Op = ssaop.OpLsh64x8
  1836  		return true
  1837  	case ssaop.OpMask16sAll:
  1838  		return rewriteValue_OpMask16sAll(v)
  1839  	case ssaop.OpMask16sAllTrue:
  1840  		return rewriteValue_OpMask16sAllTrue(v)
  1841  	case ssaop.OpMask16sAny:
  1842  		return rewriteValue_OpMask16sAny(v)
  1843  	case ssaop.OpMask16sFirst:
  1844  		return rewriteValue_OpMask16sFirst(v)
  1845  	case ssaop.OpMask16sNext:
  1846  		return rewriteValue_OpMask16sNext(v)
  1847  	case ssaop.OpMask16sNone:
  1848  		return rewriteValue_OpMask16sNone(v)
  1849  	case ssaop.OpMask32sAll:
  1850  		return rewriteValue_OpMask32sAll(v)
  1851  	case ssaop.OpMask32sAllTrue:
  1852  		return rewriteValue_OpMask32sAllTrue(v)
  1853  	case ssaop.OpMask32sAny:
  1854  		return rewriteValue_OpMask32sAny(v)
  1855  	case ssaop.OpMask32sFirst:
  1856  		return rewriteValue_OpMask32sFirst(v)
  1857  	case ssaop.OpMask32sNext:
  1858  		return rewriteValue_OpMask32sNext(v)
  1859  	case ssaop.OpMask32sNone:
  1860  		return rewriteValue_OpMask32sNone(v)
  1861  	case ssaop.OpMask64sAll:
  1862  		return rewriteValue_OpMask64sAll(v)
  1863  	case ssaop.OpMask64sAllTrue:
  1864  		return rewriteValue_OpMask64sAllTrue(v)
  1865  	case ssaop.OpMask64sAny:
  1866  		return rewriteValue_OpMask64sAny(v)
  1867  	case ssaop.OpMask64sFirst:
  1868  		return rewriteValue_OpMask64sFirst(v)
  1869  	case ssaop.OpMask64sNext:
  1870  		return rewriteValue_OpMask64sNext(v)
  1871  	case ssaop.OpMask64sNone:
  1872  		return rewriteValue_OpMask64sNone(v)
  1873  	case ssaop.OpMask8sAll:
  1874  		return rewriteValue_OpMask8sAll(v)
  1875  	case ssaop.OpMask8sAllTrue:
  1876  		return rewriteValue_OpMask8sAllTrue(v)
  1877  	case ssaop.OpMask8sAny:
  1878  		return rewriteValue_OpMask8sAny(v)
  1879  	case ssaop.OpMask8sFirst:
  1880  		return rewriteValue_OpMask8sFirst(v)
  1881  	case ssaop.OpMask8sNext:
  1882  		return rewriteValue_OpMask8sNext(v)
  1883  	case ssaop.OpMask8sNone:
  1884  		return rewriteValue_OpMask8sNone(v)
  1885  	case ssaop.OpMax32F:
  1886  		v.Op = ssaop.OpARM64FMAXS
  1887  		return true
  1888  	case ssaop.OpMax32FSel:
  1889  		return rewriteValue_OpMax32FSel(v)
  1890  	case ssaop.OpMax64F:
  1891  		v.Op = ssaop.OpARM64FMAXD
  1892  		return true
  1893  	case ssaop.OpMax64FSel:
  1894  		return rewriteValue_OpMax64FSel(v)
  1895  	case ssaop.OpMaxFloat32s:
  1896  		return rewriteValue_OpMaxFloat32s(v)
  1897  	case ssaop.OpMaxFloat32x4:
  1898  		v.Op = ssaop.OpARM64VFMAX4S
  1899  		return true
  1900  	case ssaop.OpMaxFloat64s:
  1901  		return rewriteValue_OpMaxFloat64s(v)
  1902  	case ssaop.OpMaxFloat64x2:
  1903  		v.Op = ssaop.OpARM64VFMAX2D
  1904  		return true
  1905  	case ssaop.OpMaxInt16s:
  1906  		return rewriteValue_OpMaxInt16s(v)
  1907  	case ssaop.OpMaxInt16x8:
  1908  		v.Op = ssaop.OpARM64VSMAX8H
  1909  		return true
  1910  	case ssaop.OpMaxInt32s:
  1911  		return rewriteValue_OpMaxInt32s(v)
  1912  	case ssaop.OpMaxInt32x4:
  1913  		v.Op = ssaop.OpARM64VSMAX4S
  1914  		return true
  1915  	case ssaop.OpMaxInt64s:
  1916  		return rewriteValue_OpMaxInt64s(v)
  1917  	case ssaop.OpMaxInt8s:
  1918  		return rewriteValue_OpMaxInt8s(v)
  1919  	case ssaop.OpMaxInt8x16:
  1920  		v.Op = ssaop.OpARM64VSMAX16B
  1921  		return true
  1922  	case ssaop.OpMaxUint16s:
  1923  		return rewriteValue_OpMaxUint16s(v)
  1924  	case ssaop.OpMaxUint16x8:
  1925  		v.Op = ssaop.OpARM64VUMAX8H
  1926  		return true
  1927  	case ssaop.OpMaxUint32s:
  1928  		return rewriteValue_OpMaxUint32s(v)
  1929  	case ssaop.OpMaxUint32x4:
  1930  		v.Op = ssaop.OpARM64VUMAX4S
  1931  		return true
  1932  	case ssaop.OpMaxUint64s:
  1933  		return rewriteValue_OpMaxUint64s(v)
  1934  	case ssaop.OpMaxUint8s:
  1935  		return rewriteValue_OpMaxUint8s(v)
  1936  	case ssaop.OpMaxUint8x16:
  1937  		v.Op = ssaop.OpARM64VUMAX16B
  1938  		return true
  1939  	case ssaop.OpMemEq:
  1940  		v.Op = ssaop.OpARM64LoweredMemEq
  1941  		return true
  1942  	case ssaop.OpMin32F:
  1943  		v.Op = ssaop.OpARM64FMINS
  1944  		return true
  1945  	case ssaop.OpMin32FSel:
  1946  		return rewriteValue_OpMin32FSel(v)
  1947  	case ssaop.OpMin64F:
  1948  		v.Op = ssaop.OpARM64FMIND
  1949  		return true
  1950  	case ssaop.OpMin64FSel:
  1951  		return rewriteValue_OpMin64FSel(v)
  1952  	case ssaop.OpMinFloat32s:
  1953  		return rewriteValue_OpMinFloat32s(v)
  1954  	case ssaop.OpMinFloat32x4:
  1955  		v.Op = ssaop.OpARM64VFMIN4S
  1956  		return true
  1957  	case ssaop.OpMinFloat64s:
  1958  		return rewriteValue_OpMinFloat64s(v)
  1959  	case ssaop.OpMinFloat64x2:
  1960  		v.Op = ssaop.OpARM64VFMIN2D
  1961  		return true
  1962  	case ssaop.OpMinInt16s:
  1963  		return rewriteValue_OpMinInt16s(v)
  1964  	case ssaop.OpMinInt16x8:
  1965  		v.Op = ssaop.OpARM64VSMIN8H
  1966  		return true
  1967  	case ssaop.OpMinInt32s:
  1968  		return rewriteValue_OpMinInt32s(v)
  1969  	case ssaop.OpMinInt32x4:
  1970  		v.Op = ssaop.OpARM64VSMIN4S
  1971  		return true
  1972  	case ssaop.OpMinInt64s:
  1973  		return rewriteValue_OpMinInt64s(v)
  1974  	case ssaop.OpMinInt8s:
  1975  		return rewriteValue_OpMinInt8s(v)
  1976  	case ssaop.OpMinInt8x16:
  1977  		v.Op = ssaop.OpARM64VSMIN16B
  1978  		return true
  1979  	case ssaop.OpMinUint16s:
  1980  		return rewriteValue_OpMinUint16s(v)
  1981  	case ssaop.OpMinUint16x8:
  1982  		v.Op = ssaop.OpARM64VUMIN8H
  1983  		return true
  1984  	case ssaop.OpMinUint32s:
  1985  		return rewriteValue_OpMinUint32s(v)
  1986  	case ssaop.OpMinUint32x4:
  1987  		v.Op = ssaop.OpARM64VUMIN4S
  1988  		return true
  1989  	case ssaop.OpMinUint64s:
  1990  		return rewriteValue_OpMinUint64s(v)
  1991  	case ssaop.OpMinUint8s:
  1992  		return rewriteValue_OpMinUint8s(v)
  1993  	case ssaop.OpMinUint8x16:
  1994  		v.Op = ssaop.OpARM64VUMIN16B
  1995  		return true
  1996  	case ssaop.OpMod16:
  1997  		return rewriteValue_OpMod16(v)
  1998  	case ssaop.OpMod16u:
  1999  		return rewriteValue_OpMod16u(v)
  2000  	case ssaop.OpMod32:
  2001  		return rewriteValue_OpMod32(v)
  2002  	case ssaop.OpMod32u:
  2003  		v.Op = ssaop.OpARM64UMODW
  2004  		return true
  2005  	case ssaop.OpMod64:
  2006  		return rewriteValue_OpMod64(v)
  2007  	case ssaop.OpMod64u:
  2008  		v.Op = ssaop.OpARM64UMOD
  2009  		return true
  2010  	case ssaop.OpMod8:
  2011  		return rewriteValue_OpMod8(v)
  2012  	case ssaop.OpMod8u:
  2013  		return rewriteValue_OpMod8u(v)
  2014  	case ssaop.OpMove:
  2015  		return rewriteValue_OpMove(v)
  2016  	case ssaop.OpMul16:
  2017  		v.Op = ssaop.OpARM64MULW
  2018  		return true
  2019  	case ssaop.OpMul32:
  2020  		v.Op = ssaop.OpARM64MULW
  2021  		return true
  2022  	case ssaop.OpMul32F:
  2023  		v.Op = ssaop.OpARM64FMULS
  2024  		return true
  2025  	case ssaop.OpMul64:
  2026  		v.Op = ssaop.OpARM64MUL
  2027  		return true
  2028  	case ssaop.OpMul64F:
  2029  		v.Op = ssaop.OpARM64FMULD
  2030  		return true
  2031  	case ssaop.OpMul8:
  2032  		v.Op = ssaop.OpARM64MULW
  2033  		return true
  2034  	case ssaop.OpMulAddFloat32s:
  2035  		return rewriteValue_OpMulAddFloat32s(v)
  2036  	case ssaop.OpMulAddFloat32x4:
  2037  		return rewriteValue_OpMulAddFloat32x4(v)
  2038  	case ssaop.OpMulAddFloat64s:
  2039  		return rewriteValue_OpMulAddFloat64s(v)
  2040  	case ssaop.OpMulAddFloat64x2:
  2041  		return rewriteValue_OpMulAddFloat64x2(v)
  2042  	case ssaop.OpMulAddInt16s:
  2043  		return rewriteValue_OpMulAddInt16s(v)
  2044  	case ssaop.OpMulAddInt16x8:
  2045  		return rewriteValue_OpMulAddInt16x8(v)
  2046  	case ssaop.OpMulAddInt32s:
  2047  		return rewriteValue_OpMulAddInt32s(v)
  2048  	case ssaop.OpMulAddInt32x4:
  2049  		return rewriteValue_OpMulAddInt32x4(v)
  2050  	case ssaop.OpMulAddInt64s:
  2051  		return rewriteValue_OpMulAddInt64s(v)
  2052  	case ssaop.OpMulAddInt8s:
  2053  		return rewriteValue_OpMulAddInt8s(v)
  2054  	case ssaop.OpMulAddInt8x16:
  2055  		return rewriteValue_OpMulAddInt8x16(v)
  2056  	case ssaop.OpMulAddUint16s:
  2057  		return rewriteValue_OpMulAddUint16s(v)
  2058  	case ssaop.OpMulAddUint16x8:
  2059  		return rewriteValue_OpMulAddUint16x8(v)
  2060  	case ssaop.OpMulAddUint32s:
  2061  		return rewriteValue_OpMulAddUint32s(v)
  2062  	case ssaop.OpMulAddUint32x4:
  2063  		return rewriteValue_OpMulAddUint32x4(v)
  2064  	case ssaop.OpMulAddUint64s:
  2065  		return rewriteValue_OpMulAddUint64s(v)
  2066  	case ssaop.OpMulAddUint8s:
  2067  		return rewriteValue_OpMulAddUint8s(v)
  2068  	case ssaop.OpMulAddUint8x16:
  2069  		return rewriteValue_OpMulAddUint8x16(v)
  2070  	case ssaop.OpMulFloat32s:
  2071  		v.Op = ssaop.OpARM64ZFMULS
  2072  		return true
  2073  	case ssaop.OpMulFloat32x4:
  2074  		v.Op = ssaop.OpARM64VFMUL4S
  2075  		return true
  2076  	case ssaop.OpMulFloat64s:
  2077  		v.Op = ssaop.OpARM64ZFMULD
  2078  		return true
  2079  	case ssaop.OpMulFloat64x2:
  2080  		v.Op = ssaop.OpARM64VFMUL2D
  2081  		return true
  2082  	case ssaop.OpMulHighInt16s:
  2083  		return rewriteValue_OpMulHighInt16s(v)
  2084  	case ssaop.OpMulHighInt32s:
  2085  		return rewriteValue_OpMulHighInt32s(v)
  2086  	case ssaop.OpMulHighInt64s:
  2087  		return rewriteValue_OpMulHighInt64s(v)
  2088  	case ssaop.OpMulHighInt8s:
  2089  		return rewriteValue_OpMulHighInt8s(v)
  2090  	case ssaop.OpMulHighUint16s:
  2091  		return rewriteValue_OpMulHighUint16s(v)
  2092  	case ssaop.OpMulHighUint32s:
  2093  		return rewriteValue_OpMulHighUint32s(v)
  2094  	case ssaop.OpMulHighUint64s:
  2095  		return rewriteValue_OpMulHighUint64s(v)
  2096  	case ssaop.OpMulHighUint8s:
  2097  		return rewriteValue_OpMulHighUint8s(v)
  2098  	case ssaop.OpMulInt16s:
  2099  		return rewriteValue_OpMulInt16s(v)
  2100  	case ssaop.OpMulInt16x8:
  2101  		v.Op = ssaop.OpARM64VMUL8H
  2102  		return true
  2103  	case ssaop.OpMulInt32s:
  2104  		return rewriteValue_OpMulInt32s(v)
  2105  	case ssaop.OpMulInt32x4:
  2106  		v.Op = ssaop.OpARM64VMUL4S
  2107  		return true
  2108  	case ssaop.OpMulInt64s:
  2109  		return rewriteValue_OpMulInt64s(v)
  2110  	case ssaop.OpMulInt8s:
  2111  		return rewriteValue_OpMulInt8s(v)
  2112  	case ssaop.OpMulInt8x16:
  2113  		v.Op = ssaop.OpARM64VMUL16B
  2114  		return true
  2115  	case ssaop.OpMulUint16s:
  2116  		return rewriteValue_OpMulUint16s(v)
  2117  	case ssaop.OpMulUint16x8:
  2118  		v.Op = ssaop.OpARM64VMUL8H
  2119  		return true
  2120  	case ssaop.OpMulUint32s:
  2121  		return rewriteValue_OpMulUint32s(v)
  2122  	case ssaop.OpMulUint32x4:
  2123  		v.Op = ssaop.OpARM64VMUL4S
  2124  		return true
  2125  	case ssaop.OpMulUint64s:
  2126  		return rewriteValue_OpMulUint64s(v)
  2127  	case ssaop.OpMulUint8s:
  2128  		return rewriteValue_OpMulUint8s(v)
  2129  	case ssaop.OpMulUint8x16:
  2130  		v.Op = ssaop.OpARM64VMUL16B
  2131  		return true
  2132  	case ssaop.OpMulWidenLoInt16x8:
  2133  		v.Op = ssaop.OpARM64VSMULL8H
  2134  		return true
  2135  	case ssaop.OpMulWidenLoInt32x4:
  2136  		v.Op = ssaop.OpARM64VSMULL4S
  2137  		return true
  2138  	case ssaop.OpMulWidenLoInt8x16:
  2139  		v.Op = ssaop.OpARM64VSMULL16B
  2140  		return true
  2141  	case ssaop.OpMulWidenLoUint16x8:
  2142  		v.Op = ssaop.OpARM64VUMULL8H
  2143  		return true
  2144  	case ssaop.OpMulWidenLoUint32x4:
  2145  		v.Op = ssaop.OpARM64VUMULL4S
  2146  		return true
  2147  	case ssaop.OpMulWidenLoUint8x16:
  2148  		v.Op = ssaop.OpARM64VUMULL16B
  2149  		return true
  2150  	case ssaop.OpNeg16:
  2151  		v.Op = ssaop.OpARM64NEG
  2152  		return true
  2153  	case ssaop.OpNeg32:
  2154  		v.Op = ssaop.OpARM64NEG
  2155  		return true
  2156  	case ssaop.OpNeg32F:
  2157  		v.Op = ssaop.OpARM64FNEGS
  2158  		return true
  2159  	case ssaop.OpNeg64:
  2160  		v.Op = ssaop.OpARM64NEG
  2161  		return true
  2162  	case ssaop.OpNeg64F:
  2163  		v.Op = ssaop.OpARM64FNEGD
  2164  		return true
  2165  	case ssaop.OpNeg8:
  2166  		v.Op = ssaop.OpARM64NEG
  2167  		return true
  2168  	case ssaop.OpNegFloat32s:
  2169  		return rewriteValue_OpNegFloat32s(v)
  2170  	case ssaop.OpNegFloat32x4:
  2171  		v.Op = ssaop.OpARM64VFNEG4S
  2172  		return true
  2173  	case ssaop.OpNegFloat64s:
  2174  		return rewriteValue_OpNegFloat64s(v)
  2175  	case ssaop.OpNegFloat64x2:
  2176  		v.Op = ssaop.OpARM64VFNEG2D
  2177  		return true
  2178  	case ssaop.OpNegInt16s:
  2179  		return rewriteValue_OpNegInt16s(v)
  2180  	case ssaop.OpNegInt16x8:
  2181  		v.Op = ssaop.OpARM64VNEG8H
  2182  		return true
  2183  	case ssaop.OpNegInt32s:
  2184  		return rewriteValue_OpNegInt32s(v)
  2185  	case ssaop.OpNegInt32x4:
  2186  		v.Op = ssaop.OpARM64VNEG4S
  2187  		return true
  2188  	case ssaop.OpNegInt64s:
  2189  		return rewriteValue_OpNegInt64s(v)
  2190  	case ssaop.OpNegInt64x2:
  2191  		v.Op = ssaop.OpARM64VNEG2D
  2192  		return true
  2193  	case ssaop.OpNegInt8s:
  2194  		return rewriteValue_OpNegInt8s(v)
  2195  	case ssaop.OpNegInt8x16:
  2196  		v.Op = ssaop.OpARM64VNEG16B
  2197  		return true
  2198  	case ssaop.OpNeq16:
  2199  		return rewriteValue_OpNeq16(v)
  2200  	case ssaop.OpNeq32:
  2201  		return rewriteValue_OpNeq32(v)
  2202  	case ssaop.OpNeq32F:
  2203  		return rewriteValue_OpNeq32F(v)
  2204  	case ssaop.OpNeq64:
  2205  		return rewriteValue_OpNeq64(v)
  2206  	case ssaop.OpNeq64F:
  2207  		return rewriteValue_OpNeq64F(v)
  2208  	case ssaop.OpNeq8:
  2209  		return rewriteValue_OpNeq8(v)
  2210  	case ssaop.OpNeqB:
  2211  		v.Op = ssaop.OpARM64XOR
  2212  		return true
  2213  	case ssaop.OpNeqPtr:
  2214  		return rewriteValue_OpNeqPtr(v)
  2215  	case ssaop.OpNilCheck:
  2216  		v.Op = ssaop.OpARM64LoweredNilCheck
  2217  		return true
  2218  	case ssaop.OpNot:
  2219  		return rewriteValue_OpNot(v)
  2220  	case ssaop.OpNotEqualFloat32s:
  2221  		return rewriteValue_OpNotEqualFloat32s(v)
  2222  	case ssaop.OpNotEqualFloat64s:
  2223  		return rewriteValue_OpNotEqualFloat64s(v)
  2224  	case ssaop.OpNotEqualInt16s:
  2225  		return rewriteValue_OpNotEqualInt16s(v)
  2226  	case ssaop.OpNotEqualInt32s:
  2227  		return rewriteValue_OpNotEqualInt32s(v)
  2228  	case ssaop.OpNotEqualInt64s:
  2229  		return rewriteValue_OpNotEqualInt64s(v)
  2230  	case ssaop.OpNotEqualInt8s:
  2231  		return rewriteValue_OpNotEqualInt8s(v)
  2232  	case ssaop.OpNotEqualUint16s:
  2233  		return rewriteValue_OpNotEqualUint16s(v)
  2234  	case ssaop.OpNotEqualUint32s:
  2235  		return rewriteValue_OpNotEqualUint32s(v)
  2236  	case ssaop.OpNotEqualUint64s:
  2237  		return rewriteValue_OpNotEqualUint64s(v)
  2238  	case ssaop.OpNotEqualUint8s:
  2239  		return rewriteValue_OpNotEqualUint8s(v)
  2240  	case ssaop.OpNotInt16x8:
  2241  		v.Op = ssaop.OpARM64VNOT16B
  2242  		return true
  2243  	case ssaop.OpNotInt32x4:
  2244  		v.Op = ssaop.OpARM64VNOT16B
  2245  		return true
  2246  	case ssaop.OpNotInt64x2:
  2247  		v.Op = ssaop.OpARM64VNOT16B
  2248  		return true
  2249  	case ssaop.OpNotInt8x16:
  2250  		v.Op = ssaop.OpARM64VNOT16B
  2251  		return true
  2252  	case ssaop.OpNotUint16x8:
  2253  		v.Op = ssaop.OpARM64VNOT16B
  2254  		return true
  2255  	case ssaop.OpNotUint32x4:
  2256  		v.Op = ssaop.OpARM64VNOT16B
  2257  		return true
  2258  	case ssaop.OpNotUint64x2:
  2259  		v.Op = ssaop.OpARM64VNOT16B
  2260  		return true
  2261  	case ssaop.OpNotUint8x16:
  2262  		v.Op = ssaop.OpARM64VNOT16B
  2263  		return true
  2264  	case ssaop.OpOffPtr:
  2265  		return rewriteValue_OpOffPtr(v)
  2266  	case ssaop.OpOnesCountInt8x16:
  2267  		v.Op = ssaop.OpARM64VCNT16B
  2268  		return true
  2269  	case ssaop.OpOnesCountUint8x16:
  2270  		v.Op = ssaop.OpARM64VCNT16B
  2271  		return true
  2272  	case ssaop.OpOr16:
  2273  		v.Op = ssaop.OpARM64OR
  2274  		return true
  2275  	case ssaop.OpOr32:
  2276  		v.Op = ssaop.OpARM64OR
  2277  		return true
  2278  	case ssaop.OpOr64:
  2279  		v.Op = ssaop.OpARM64OR
  2280  		return true
  2281  	case ssaop.OpOr8:
  2282  		v.Op = ssaop.OpARM64OR
  2283  		return true
  2284  	case ssaop.OpOrB:
  2285  		v.Op = ssaop.OpARM64OR
  2286  		return true
  2287  	case ssaop.OpOrInt16s:
  2288  		v.Op = ssaop.OpARM64ZORRD
  2289  		return true
  2290  	case ssaop.OpOrInt16x8:
  2291  		v.Op = ssaop.OpARM64VORR16B
  2292  		return true
  2293  	case ssaop.OpOrInt32s:
  2294  		v.Op = ssaop.OpARM64ZORRD
  2295  		return true
  2296  	case ssaop.OpOrInt32x4:
  2297  		v.Op = ssaop.OpARM64VORR16B
  2298  		return true
  2299  	case ssaop.OpOrInt64s:
  2300  		v.Op = ssaop.OpARM64ZORRD
  2301  		return true
  2302  	case ssaop.OpOrInt64x2:
  2303  		v.Op = ssaop.OpARM64VORR16B
  2304  		return true
  2305  	case ssaop.OpOrInt8s:
  2306  		v.Op = ssaop.OpARM64ZORRD
  2307  		return true
  2308  	case ssaop.OpOrInt8x16:
  2309  		v.Op = ssaop.OpARM64VORR16B
  2310  		return true
  2311  	case ssaop.OpOrNotInt16x8:
  2312  		v.Op = ssaop.OpARM64VORN16B
  2313  		return true
  2314  	case ssaop.OpOrNotInt32x4:
  2315  		v.Op = ssaop.OpARM64VORN16B
  2316  		return true
  2317  	case ssaop.OpOrNotInt64x2:
  2318  		v.Op = ssaop.OpARM64VORN16B
  2319  		return true
  2320  	case ssaop.OpOrNotInt8x16:
  2321  		v.Op = ssaop.OpARM64VORN16B
  2322  		return true
  2323  	case ssaop.OpOrNotUint16x8:
  2324  		v.Op = ssaop.OpARM64VORN16B
  2325  		return true
  2326  	case ssaop.OpOrNotUint32x4:
  2327  		v.Op = ssaop.OpARM64VORN16B
  2328  		return true
  2329  	case ssaop.OpOrNotUint64x2:
  2330  		v.Op = ssaop.OpARM64VORN16B
  2331  		return true
  2332  	case ssaop.OpOrNotUint8x16:
  2333  		v.Op = ssaop.OpARM64VORN16B
  2334  		return true
  2335  	case ssaop.OpOrUint16s:
  2336  		v.Op = ssaop.OpARM64ZORRD
  2337  		return true
  2338  	case ssaop.OpOrUint16x8:
  2339  		v.Op = ssaop.OpARM64VORR16B
  2340  		return true
  2341  	case ssaop.OpOrUint32s:
  2342  		v.Op = ssaop.OpARM64ZORRD
  2343  		return true
  2344  	case ssaop.OpOrUint32x4:
  2345  		v.Op = ssaop.OpARM64VORR16B
  2346  		return true
  2347  	case ssaop.OpOrUint64s:
  2348  		v.Op = ssaop.OpARM64ZORRD
  2349  		return true
  2350  	case ssaop.OpOrUint64x2:
  2351  		v.Op = ssaop.OpARM64VORR16B
  2352  		return true
  2353  	case ssaop.OpOrUint8s:
  2354  		v.Op = ssaop.OpARM64ZORRD
  2355  		return true
  2356  	case ssaop.OpOrUint8x16:
  2357  		v.Op = ssaop.OpARM64VORR16B
  2358  		return true
  2359  	case ssaop.OpPanicBounds:
  2360  		v.Op = ssaop.OpARM64LoweredPanicBoundsRR
  2361  		return true
  2362  	case ssaop.OpPopCount16:
  2363  		return rewriteValue_OpPopCount16(v)
  2364  	case ssaop.OpPopCount32:
  2365  		return rewriteValue_OpPopCount32(v)
  2366  	case ssaop.OpPopCount64:
  2367  		return rewriteValue_OpPopCount64(v)
  2368  	case ssaop.OpPrefetchCache:
  2369  		return rewriteValue_OpPrefetchCache(v)
  2370  	case ssaop.OpPrefetchCacheStreamed:
  2371  		return rewriteValue_OpPrefetchCacheStreamed(v)
  2372  	case ssaop.OpPubBarrier:
  2373  		return rewriteValue_OpPubBarrier(v)
  2374  	case ssaop.OpRotateLeft16:
  2375  		return rewriteValue_OpRotateLeft16(v)
  2376  	case ssaop.OpRotateLeft32:
  2377  		return rewriteValue_OpRotateLeft32(v)
  2378  	case ssaop.OpRotateLeft64:
  2379  		return rewriteValue_OpRotateLeft64(v)
  2380  	case ssaop.OpRotateLeft8:
  2381  		return rewriteValue_OpRotateLeft8(v)
  2382  	case ssaop.OpRound:
  2383  		v.Op = ssaop.OpARM64FRINTAD
  2384  		return true
  2385  	case ssaop.OpRound32F:
  2386  		v.Op = ssaop.OpARM64LoweredRound32F
  2387  		return true
  2388  	case ssaop.OpRound64F:
  2389  		v.Op = ssaop.OpARM64LoweredRound64F
  2390  		return true
  2391  	case ssaop.OpRoundFloat32s:
  2392  		return rewriteValue_OpRoundFloat32s(v)
  2393  	case ssaop.OpRoundFloat32x4:
  2394  		v.Op = ssaop.OpARM64VFRINTN4S
  2395  		return true
  2396  	case ssaop.OpRoundFloat64s:
  2397  		return rewriteValue_OpRoundFloat64s(v)
  2398  	case ssaop.OpRoundFloat64x2:
  2399  		v.Op = ssaop.OpARM64VFRINTN2D
  2400  		return true
  2401  	case ssaop.OpRoundToEven:
  2402  		v.Op = ssaop.OpARM64FRINTND
  2403  		return true
  2404  	case ssaop.OpRsh16Ux16:
  2405  		return rewriteValue_OpRsh16Ux16(v)
  2406  	case ssaop.OpRsh16Ux32:
  2407  		return rewriteValue_OpRsh16Ux32(v)
  2408  	case ssaop.OpRsh16Ux64:
  2409  		return rewriteValue_OpRsh16Ux64(v)
  2410  	case ssaop.OpRsh16Ux8:
  2411  		return rewriteValue_OpRsh16Ux8(v)
  2412  	case ssaop.OpRsh16x16:
  2413  		return rewriteValue_OpRsh16x16(v)
  2414  	case ssaop.OpRsh16x32:
  2415  		return rewriteValue_OpRsh16x32(v)
  2416  	case ssaop.OpRsh16x64:
  2417  		return rewriteValue_OpRsh16x64(v)
  2418  	case ssaop.OpRsh16x8:
  2419  		return rewriteValue_OpRsh16x8(v)
  2420  	case ssaop.OpRsh32Ux16:
  2421  		return rewriteValue_OpRsh32Ux16(v)
  2422  	case ssaop.OpRsh32Ux32:
  2423  		return rewriteValue_OpRsh32Ux32(v)
  2424  	case ssaop.OpRsh32Ux64:
  2425  		return rewriteValue_OpRsh32Ux64(v)
  2426  	case ssaop.OpRsh32Ux8:
  2427  		return rewriteValue_OpRsh32Ux8(v)
  2428  	case ssaop.OpRsh32x16:
  2429  		return rewriteValue_OpRsh32x16(v)
  2430  	case ssaop.OpRsh32x32:
  2431  		return rewriteValue_OpRsh32x32(v)
  2432  	case ssaop.OpRsh32x64:
  2433  		return rewriteValue_OpRsh32x64(v)
  2434  	case ssaop.OpRsh32x8:
  2435  		return rewriteValue_OpRsh32x8(v)
  2436  	case ssaop.OpRsh64Ux16:
  2437  		return rewriteValue_OpRsh64Ux16(v)
  2438  	case ssaop.OpRsh64Ux32:
  2439  		return rewriteValue_OpRsh64Ux32(v)
  2440  	case ssaop.OpRsh64Ux64:
  2441  		return rewriteValue_OpRsh64Ux64(v)
  2442  	case ssaop.OpRsh64Ux8:
  2443  		return rewriteValue_OpRsh64Ux8(v)
  2444  	case ssaop.OpRsh64x16:
  2445  		return rewriteValue_OpRsh64x16(v)
  2446  	case ssaop.OpRsh64x32:
  2447  		return rewriteValue_OpRsh64x32(v)
  2448  	case ssaop.OpRsh64x64:
  2449  		return rewriteValue_OpRsh64x64(v)
  2450  	case ssaop.OpRsh64x8:
  2451  		return rewriteValue_OpRsh64x8(v)
  2452  	case ssaop.OpRsh8Ux16:
  2453  		return rewriteValue_OpRsh8Ux16(v)
  2454  	case ssaop.OpRsh8Ux32:
  2455  		return rewriteValue_OpRsh8Ux32(v)
  2456  	case ssaop.OpRsh8Ux64:
  2457  		return rewriteValue_OpRsh8Ux64(v)
  2458  	case ssaop.OpRsh8Ux8:
  2459  		return rewriteValue_OpRsh8Ux8(v)
  2460  	case ssaop.OpRsh8x16:
  2461  		return rewriteValue_OpRsh8x16(v)
  2462  	case ssaop.OpRsh8x32:
  2463  		return rewriteValue_OpRsh8x32(v)
  2464  	case ssaop.OpRsh8x64:
  2465  		return rewriteValue_OpRsh8x64(v)
  2466  	case ssaop.OpRsh8x8:
  2467  		return rewriteValue_OpRsh8x8(v)
  2468  	case ssaop.OpSaturateToInt16Int32x4:
  2469  		v.Op = ssaop.OpARM64VSQXTN4S
  2470  		return true
  2471  	case ssaop.OpSaturateToInt32Int64x2:
  2472  		v.Op = ssaop.OpARM64VSQXTN2D
  2473  		return true
  2474  	case ssaop.OpSaturateToInt8Int16x8:
  2475  		v.Op = ssaop.OpARM64VSQXTN8H
  2476  		return true
  2477  	case ssaop.OpSaturateToUint16Int32x4:
  2478  		v.Op = ssaop.OpARM64VSQXTUN4S
  2479  		return true
  2480  	case ssaop.OpSaturateToUint16Uint32x4:
  2481  		v.Op = ssaop.OpARM64VUQXTN4S
  2482  		return true
  2483  	case ssaop.OpSaturateToUint32Int64x2:
  2484  		v.Op = ssaop.OpARM64VSQXTUN2D
  2485  		return true
  2486  	case ssaop.OpSaturateToUint32Uint64x2:
  2487  		v.Op = ssaop.OpARM64VUQXTN2D
  2488  		return true
  2489  	case ssaop.OpSaturateToUint8Int16x8:
  2490  		v.Op = ssaop.OpARM64VSQXTUN8H
  2491  		return true
  2492  	case ssaop.OpSaturateToUint8Uint16x8:
  2493  		v.Op = ssaop.OpARM64VUQXTN8H
  2494  		return true
  2495  	case ssaop.OpScalableVectorLen:
  2496  		return rewriteValue_OpScalableVectorLen(v)
  2497  	case ssaop.OpScaleSaturatedInt16x8:
  2498  		v.Op = ssaop.OpARM64VSQSHL8H
  2499  		return true
  2500  	case ssaop.OpScaleSaturatedInt32x4:
  2501  		v.Op = ssaop.OpARM64VSQSHL4S
  2502  		return true
  2503  	case ssaop.OpScaleSaturatedInt64x2:
  2504  		v.Op = ssaop.OpARM64VSQSHL2D
  2505  		return true
  2506  	case ssaop.OpScaleSaturatedInt8x16:
  2507  		v.Op = ssaop.OpARM64VSQSHL16B
  2508  		return true
  2509  	case ssaop.OpScaleSaturatedUint16x8:
  2510  		v.Op = ssaop.OpARM64VUQSHL8H
  2511  		return true
  2512  	case ssaop.OpScaleSaturatedUint32x4:
  2513  		v.Op = ssaop.OpARM64VUQSHL4S
  2514  		return true
  2515  	case ssaop.OpScaleSaturatedUint64x2:
  2516  		v.Op = ssaop.OpARM64VUQSHL2D
  2517  		return true
  2518  	case ssaop.OpScaleSaturatedUint8x16:
  2519  		v.Op = ssaop.OpARM64VUQSHL16B
  2520  		return true
  2521  	case ssaop.OpSelect0:
  2522  		return rewriteValue_OpSelect0(v)
  2523  	case ssaop.OpSelect1:
  2524  		return rewriteValue_OpSelect1(v)
  2525  	case ssaop.OpSelectN:
  2526  		return rewriteValue_OpSelectN(v)
  2527  	case ssaop.OpSetElemFloat32x4:
  2528  		v.Op = ssaop.OpARM64VMOVSins0
  2529  		return true
  2530  	case ssaop.OpSetElemFloat64x2:
  2531  		v.Op = ssaop.OpARM64VMOVDins0
  2532  		return true
  2533  	case ssaop.OpSetElemInt16x8:
  2534  		v.Op = ssaop.OpARM64VMOVHins
  2535  		return true
  2536  	case ssaop.OpSetElemInt32x4:
  2537  		v.Op = ssaop.OpARM64VMOVSins
  2538  		return true
  2539  	case ssaop.OpSetElemInt64x2:
  2540  		v.Op = ssaop.OpARM64VMOVDins
  2541  		return true
  2542  	case ssaop.OpSetElemInt8x16:
  2543  		v.Op = ssaop.OpARM64VMOVBins
  2544  		return true
  2545  	case ssaop.OpSetElemUint16x8:
  2546  		v.Op = ssaop.OpARM64VMOVHins
  2547  		return true
  2548  	case ssaop.OpSetElemUint32x4:
  2549  		v.Op = ssaop.OpARM64VMOVSins
  2550  		return true
  2551  	case ssaop.OpSetElemUint64x2:
  2552  		v.Op = ssaop.OpARM64VMOVDins
  2553  		return true
  2554  	case ssaop.OpSetElemUint8x16:
  2555  		v.Op = ssaop.OpARM64VMOVBins
  2556  		return true
  2557  	case ssaop.OpShiftAllLeftInt16x8:
  2558  		return rewriteValue_OpShiftAllLeftInt16x8(v)
  2559  	case ssaop.OpShiftAllLeftInt32x4:
  2560  		return rewriteValue_OpShiftAllLeftInt32x4(v)
  2561  	case ssaop.OpShiftAllLeftInt64x2:
  2562  		return rewriteValue_OpShiftAllLeftInt64x2(v)
  2563  	case ssaop.OpShiftAllLeftInt8x16:
  2564  		return rewriteValue_OpShiftAllLeftInt8x16(v)
  2565  	case ssaop.OpShiftAllLeftUint16x8:
  2566  		return rewriteValue_OpShiftAllLeftUint16x8(v)
  2567  	case ssaop.OpShiftAllLeftUint32x4:
  2568  		return rewriteValue_OpShiftAllLeftUint32x4(v)
  2569  	case ssaop.OpShiftAllLeftUint64x2:
  2570  		return rewriteValue_OpShiftAllLeftUint64x2(v)
  2571  	case ssaop.OpShiftAllLeftUint8x16:
  2572  		return rewriteValue_OpShiftAllLeftUint8x16(v)
  2573  	case ssaop.OpShiftAllRightInt16x8:
  2574  		return rewriteValue_OpShiftAllRightInt16x8(v)
  2575  	case ssaop.OpShiftAllRightInt32x4:
  2576  		return rewriteValue_OpShiftAllRightInt32x4(v)
  2577  	case ssaop.OpShiftAllRightInt64x2:
  2578  		return rewriteValue_OpShiftAllRightInt64x2(v)
  2579  	case ssaop.OpShiftAllRightInt8x16:
  2580  		return rewriteValue_OpShiftAllRightInt8x16(v)
  2581  	case ssaop.OpShiftAllRightUint16x8:
  2582  		return rewriteValue_OpShiftAllRightUint16x8(v)
  2583  	case ssaop.OpShiftAllRightUint32x4:
  2584  		return rewriteValue_OpShiftAllRightUint32x4(v)
  2585  	case ssaop.OpShiftAllRightUint64x2:
  2586  		return rewriteValue_OpShiftAllRightUint64x2(v)
  2587  	case ssaop.OpShiftAllRightUint8x16:
  2588  		return rewriteValue_OpShiftAllRightUint8x16(v)
  2589  	case ssaop.OpShiftInt16x8:
  2590  		v.Op = ssaop.OpARM64VSSHL8H
  2591  		return true
  2592  	case ssaop.OpShiftInt32x4:
  2593  		v.Op = ssaop.OpARM64VSSHL4S
  2594  		return true
  2595  	case ssaop.OpShiftInt64x2:
  2596  		v.Op = ssaop.OpARM64VSSHL2D
  2597  		return true
  2598  	case ssaop.OpShiftInt8x16:
  2599  		v.Op = ssaop.OpARM64VSSHL16B
  2600  		return true
  2601  	case ssaop.OpShiftUint16x8:
  2602  		v.Op = ssaop.OpARM64VUSHL8H
  2603  		return true
  2604  	case ssaop.OpShiftUint32x4:
  2605  		v.Op = ssaop.OpARM64VUSHL4S
  2606  		return true
  2607  	case ssaop.OpShiftUint64x2:
  2608  		v.Op = ssaop.OpARM64VUSHL2D
  2609  		return true
  2610  	case ssaop.OpShiftUint8x16:
  2611  		v.Op = ssaop.OpARM64VUSHL16B
  2612  		return true
  2613  	case ssaop.OpSignExt16to32:
  2614  		v.Op = ssaop.OpARM64MOVHreg
  2615  		return true
  2616  	case ssaop.OpSignExt16to64:
  2617  		v.Op = ssaop.OpARM64MOVHreg
  2618  		return true
  2619  	case ssaop.OpSignExt32to64:
  2620  		v.Op = ssaop.OpARM64MOVWreg
  2621  		return true
  2622  	case ssaop.OpSignExt8to16:
  2623  		v.Op = ssaop.OpARM64MOVBreg
  2624  		return true
  2625  	case ssaop.OpSignExt8to32:
  2626  		v.Op = ssaop.OpARM64MOVBreg
  2627  		return true
  2628  	case ssaop.OpSignExt8to64:
  2629  		v.Op = ssaop.OpARM64MOVBreg
  2630  		return true
  2631  	case ssaop.OpSlicemask:
  2632  		return rewriteValue_OpSlicemask(v)
  2633  	case ssaop.OpSqrt:
  2634  		v.Op = ssaop.OpARM64FSQRTD
  2635  		return true
  2636  	case ssaop.OpSqrt32:
  2637  		v.Op = ssaop.OpARM64FSQRTS
  2638  		return true
  2639  	case ssaop.OpSqrtFloat32s:
  2640  		return rewriteValue_OpSqrtFloat32s(v)
  2641  	case ssaop.OpSqrtFloat32x4:
  2642  		v.Op = ssaop.OpARM64VFSQRT4S
  2643  		return true
  2644  	case ssaop.OpSqrtFloat64s:
  2645  		return rewriteValue_OpSqrtFloat64s(v)
  2646  	case ssaop.OpSqrtFloat64x2:
  2647  		v.Op = ssaop.OpARM64VFSQRT2D
  2648  		return true
  2649  	case ssaop.OpStaticCall:
  2650  		v.Op = ssaop.OpARM64CALLstatic
  2651  		return true
  2652  	case ssaop.OpStore:
  2653  		return rewriteValue_OpStore(v)
  2654  	case ssaop.OpStoreMasked8:
  2655  		return rewriteValue_OpStoreMasked8(v)
  2656  	case ssaop.OpSub16:
  2657  		v.Op = ssaop.OpARM64SUB
  2658  		return true
  2659  	case ssaop.OpSub32:
  2660  		v.Op = ssaop.OpARM64SUB
  2661  		return true
  2662  	case ssaop.OpSub32F:
  2663  		v.Op = ssaop.OpARM64FSUBS
  2664  		return true
  2665  	case ssaop.OpSub64:
  2666  		v.Op = ssaop.OpARM64SUB
  2667  		return true
  2668  	case ssaop.OpSub64F:
  2669  		v.Op = ssaop.OpARM64FSUBD
  2670  		return true
  2671  	case ssaop.OpSub8:
  2672  		v.Op = ssaop.OpARM64SUB
  2673  		return true
  2674  	case ssaop.OpSubFloat32s:
  2675  		v.Op = ssaop.OpARM64ZFSUBS
  2676  		return true
  2677  	case ssaop.OpSubFloat32x4:
  2678  		v.Op = ssaop.OpARM64VFSUB4S
  2679  		return true
  2680  	case ssaop.OpSubFloat64s:
  2681  		v.Op = ssaop.OpARM64ZFSUBD
  2682  		return true
  2683  	case ssaop.OpSubFloat64x2:
  2684  		v.Op = ssaop.OpARM64VFSUB2D
  2685  		return true
  2686  	case ssaop.OpSubInt16s:
  2687  		v.Op = ssaop.OpARM64ZSUBH
  2688  		return true
  2689  	case ssaop.OpSubInt16x8:
  2690  		v.Op = ssaop.OpARM64VSUB8H
  2691  		return true
  2692  	case ssaop.OpSubInt32s:
  2693  		v.Op = ssaop.OpARM64ZSUBS
  2694  		return true
  2695  	case ssaop.OpSubInt32x4:
  2696  		v.Op = ssaop.OpARM64VSUB4S
  2697  		return true
  2698  	case ssaop.OpSubInt64s:
  2699  		v.Op = ssaop.OpARM64ZSUBD
  2700  		return true
  2701  	case ssaop.OpSubInt64x2:
  2702  		v.Op = ssaop.OpARM64VSUB2D
  2703  		return true
  2704  	case ssaop.OpSubInt8s:
  2705  		v.Op = ssaop.OpARM64ZSUBB
  2706  		return true
  2707  	case ssaop.OpSubInt8x16:
  2708  		v.Op = ssaop.OpARM64VSUB16B
  2709  		return true
  2710  	case ssaop.OpSubPtr:
  2711  		v.Op = ssaop.OpARM64SUB
  2712  		return true
  2713  	case ssaop.OpSubSaturatedInt16s:
  2714  		v.Op = ssaop.OpARM64ZSQSUBH
  2715  		return true
  2716  	case ssaop.OpSubSaturatedInt16x8:
  2717  		v.Op = ssaop.OpARM64VSQSUB8H
  2718  		return true
  2719  	case ssaop.OpSubSaturatedInt32s:
  2720  		v.Op = ssaop.OpARM64ZSQSUBS
  2721  		return true
  2722  	case ssaop.OpSubSaturatedInt32x4:
  2723  		v.Op = ssaop.OpARM64VSQSUB4S
  2724  		return true
  2725  	case ssaop.OpSubSaturatedInt64s:
  2726  		v.Op = ssaop.OpARM64ZSQSUBD
  2727  		return true
  2728  	case ssaop.OpSubSaturatedInt64x2:
  2729  		v.Op = ssaop.OpARM64VSQSUB2D
  2730  		return true
  2731  	case ssaop.OpSubSaturatedInt8s:
  2732  		v.Op = ssaop.OpARM64ZSQSUBB
  2733  		return true
  2734  	case ssaop.OpSubSaturatedInt8x16:
  2735  		v.Op = ssaop.OpARM64VSQSUB16B
  2736  		return true
  2737  	case ssaop.OpSubSaturatedUint16s:
  2738  		v.Op = ssaop.OpARM64ZUQSUBH
  2739  		return true
  2740  	case ssaop.OpSubSaturatedUint16x8:
  2741  		v.Op = ssaop.OpARM64VUQSUB8H
  2742  		return true
  2743  	case ssaop.OpSubSaturatedUint32s:
  2744  		v.Op = ssaop.OpARM64ZUQSUBS
  2745  		return true
  2746  	case ssaop.OpSubSaturatedUint32x4:
  2747  		v.Op = ssaop.OpARM64VUQSUB4S
  2748  		return true
  2749  	case ssaop.OpSubSaturatedUint64s:
  2750  		v.Op = ssaop.OpARM64ZUQSUBD
  2751  		return true
  2752  	case ssaop.OpSubSaturatedUint64x2:
  2753  		v.Op = ssaop.OpARM64VUQSUB2D
  2754  		return true
  2755  	case ssaop.OpSubSaturatedUint8s:
  2756  		v.Op = ssaop.OpARM64ZUQSUBB
  2757  		return true
  2758  	case ssaop.OpSubSaturatedUint8x16:
  2759  		v.Op = ssaop.OpARM64VUQSUB16B
  2760  		return true
  2761  	case ssaop.OpSubUint16s:
  2762  		v.Op = ssaop.OpARM64ZSUBH
  2763  		return true
  2764  	case ssaop.OpSubUint16x8:
  2765  		v.Op = ssaop.OpARM64VSUB8H
  2766  		return true
  2767  	case ssaop.OpSubUint32s:
  2768  		v.Op = ssaop.OpARM64ZSUBS
  2769  		return true
  2770  	case ssaop.OpSubUint32x4:
  2771  		v.Op = ssaop.OpARM64VSUB4S
  2772  		return true
  2773  	case ssaop.OpSubUint64s:
  2774  		v.Op = ssaop.OpARM64ZSUBD
  2775  		return true
  2776  	case ssaop.OpSubUint64x2:
  2777  		v.Op = ssaop.OpARM64VSUB2D
  2778  		return true
  2779  	case ssaop.OpSubUint8s:
  2780  		v.Op = ssaop.OpARM64ZSUBB
  2781  		return true
  2782  	case ssaop.OpSubUint8x16:
  2783  		v.Op = ssaop.OpARM64VSUB16B
  2784  		return true
  2785  	case ssaop.OpTailCall:
  2786  		v.Op = ssaop.OpARM64CALLtail
  2787  		return true
  2788  	case ssaop.OpTailCallInter:
  2789  		v.Op = ssaop.OpARM64CALLtailinter
  2790  		return true
  2791  	case ssaop.OpTrunc:
  2792  		v.Op = ssaop.OpARM64FRINTZD
  2793  		return true
  2794  	case ssaop.OpTrunc16to8:
  2795  		v.Op = ssaop.OpCopy
  2796  		return true
  2797  	case ssaop.OpTrunc32to16:
  2798  		v.Op = ssaop.OpCopy
  2799  		return true
  2800  	case ssaop.OpTrunc32to8:
  2801  		v.Op = ssaop.OpCopy
  2802  		return true
  2803  	case ssaop.OpTrunc64to16:
  2804  		v.Op = ssaop.OpCopy
  2805  		return true
  2806  	case ssaop.OpTrunc64to32:
  2807  		v.Op = ssaop.OpCopy
  2808  		return true
  2809  	case ssaop.OpTrunc64to8:
  2810  		v.Op = ssaop.OpCopy
  2811  		return true
  2812  	case ssaop.OpTruncFloat32s:
  2813  		return rewriteValue_OpTruncFloat32s(v)
  2814  	case ssaop.OpTruncFloat32x4:
  2815  		v.Op = ssaop.OpARM64VFRINTZ4S
  2816  		return true
  2817  	case ssaop.OpTruncFloat64s:
  2818  		return rewriteValue_OpTruncFloat64s(v)
  2819  	case ssaop.OpTruncFloat64x2:
  2820  		v.Op = ssaop.OpARM64VFRINTZ2D
  2821  		return true
  2822  	case ssaop.OpTruncToInt16Int32x4:
  2823  		v.Op = ssaop.OpARM64VXTN4S
  2824  		return true
  2825  	case ssaop.OpTruncToInt32Int64x2:
  2826  		v.Op = ssaop.OpARM64VXTN2D
  2827  		return true
  2828  	case ssaop.OpTruncToInt8Int16x8:
  2829  		v.Op = ssaop.OpARM64VXTN8H
  2830  		return true
  2831  	case ssaop.OpTruncToUint16Uint32x4:
  2832  		v.Op = ssaop.OpARM64VXTN4S
  2833  		return true
  2834  	case ssaop.OpTruncToUint32Uint64x2:
  2835  		v.Op = ssaop.OpARM64VXTN2D
  2836  		return true
  2837  	case ssaop.OpTruncToUint8Uint16x8:
  2838  		v.Op = ssaop.OpARM64VXTN8H
  2839  		return true
  2840  	case ssaop.OpWB:
  2841  		v.Op = ssaop.OpARM64LoweredWB
  2842  		return true
  2843  	case ssaop.OpXor16:
  2844  		v.Op = ssaop.OpARM64XOR
  2845  		return true
  2846  	case ssaop.OpXor32:
  2847  		v.Op = ssaop.OpARM64XOR
  2848  		return true
  2849  	case ssaop.OpXor64:
  2850  		v.Op = ssaop.OpARM64XOR
  2851  		return true
  2852  	case ssaop.OpXor8:
  2853  		v.Op = ssaop.OpARM64XOR
  2854  		return true
  2855  	case ssaop.OpXorInt16s:
  2856  		v.Op = ssaop.OpARM64ZEORD
  2857  		return true
  2858  	case ssaop.OpXorInt16x8:
  2859  		v.Op = ssaop.OpARM64VEOR16B
  2860  		return true
  2861  	case ssaop.OpXorInt32s:
  2862  		v.Op = ssaop.OpARM64ZEORD
  2863  		return true
  2864  	case ssaop.OpXorInt32x4:
  2865  		v.Op = ssaop.OpARM64VEOR16B
  2866  		return true
  2867  	case ssaop.OpXorInt64s:
  2868  		v.Op = ssaop.OpARM64ZEORD
  2869  		return true
  2870  	case ssaop.OpXorInt64x2:
  2871  		v.Op = ssaop.OpARM64VEOR16B
  2872  		return true
  2873  	case ssaop.OpXorInt8s:
  2874  		v.Op = ssaop.OpARM64ZEORD
  2875  		return true
  2876  	case ssaop.OpXorInt8x16:
  2877  		v.Op = ssaop.OpARM64VEOR16B
  2878  		return true
  2879  	case ssaop.OpXorUint16s:
  2880  		v.Op = ssaop.OpARM64ZEORD
  2881  		return true
  2882  	case ssaop.OpXorUint16x8:
  2883  		v.Op = ssaop.OpARM64VEOR16B
  2884  		return true
  2885  	case ssaop.OpXorUint32s:
  2886  		v.Op = ssaop.OpARM64ZEORD
  2887  		return true
  2888  	case ssaop.OpXorUint32x4:
  2889  		v.Op = ssaop.OpARM64VEOR16B
  2890  		return true
  2891  	case ssaop.OpXorUint64s:
  2892  		v.Op = ssaop.OpARM64ZEORD
  2893  		return true
  2894  	case ssaop.OpXorUint64x2:
  2895  		v.Op = ssaop.OpARM64VEOR16B
  2896  		return true
  2897  	case ssaop.OpXorUint8s:
  2898  		v.Op = ssaop.OpARM64ZEORD
  2899  		return true
  2900  	case ssaop.OpXorUint8x16:
  2901  		v.Op = ssaop.OpARM64VEOR16B
  2902  		return true
  2903  	case ssaop.OpZero:
  2904  		return rewriteValue_OpZero(v)
  2905  	case ssaop.OpZeroExt16to32:
  2906  		v.Op = ssaop.OpARM64MOVHUreg
  2907  		return true
  2908  	case ssaop.OpZeroExt16to64:
  2909  		v.Op = ssaop.OpARM64MOVHUreg
  2910  		return true
  2911  	case ssaop.OpZeroExt32to64:
  2912  		v.Op = ssaop.OpARM64MOVWUreg
  2913  		return true
  2914  	case ssaop.OpZeroExt8to16:
  2915  		v.Op = ssaop.OpARM64MOVBUreg
  2916  		return true
  2917  	case ssaop.OpZeroExt8to32:
  2918  		v.Op = ssaop.OpARM64MOVBUreg
  2919  		return true
  2920  	case ssaop.OpZeroExt8to64:
  2921  		v.Op = ssaop.OpARM64MOVBUreg
  2922  		return true
  2923  	case ssaop.OpZeroSIMD:
  2924  		return rewriteValue_OpZeroSIMD(v)
  2925  	case ssaop.OpbitSelectInt8x16:
  2926  		v.Op = ssaop.OpARM64VBIF16B
  2927  		return true
  2928  	case ssaop.OpbitSelectNotInt8x16:
  2929  		v.Op = ssaop.OpARM64VBIT16B
  2930  		return true
  2931  	case ssaop.Opbroadcast1To16Int8x16:
  2932  		return rewriteValue_Opbroadcast1To16Int8x16(v)
  2933  	case ssaop.Opbroadcast1To16Uint8x16:
  2934  		return rewriteValue_Opbroadcast1To16Uint8x16(v)
  2935  	case ssaop.Opbroadcast1To2Float64x2:
  2936  		return rewriteValue_Opbroadcast1To2Float64x2(v)
  2937  	case ssaop.Opbroadcast1To2Int64x2:
  2938  		return rewriteValue_Opbroadcast1To2Int64x2(v)
  2939  	case ssaop.Opbroadcast1To2Uint64x2:
  2940  		return rewriteValue_Opbroadcast1To2Uint64x2(v)
  2941  	case ssaop.Opbroadcast1To4Float32x4:
  2942  		return rewriteValue_Opbroadcast1To4Float32x4(v)
  2943  	case ssaop.Opbroadcast1To4Int32x4:
  2944  		return rewriteValue_Opbroadcast1To4Int32x4(v)
  2945  	case ssaop.Opbroadcast1To4Uint32x4:
  2946  		return rewriteValue_Opbroadcast1To4Uint32x4(v)
  2947  	case ssaop.Opbroadcast1To8Int16x8:
  2948  		return rewriteValue_Opbroadcast1To8Int16x8(v)
  2949  	case ssaop.Opbroadcast1To8Uint16x8:
  2950  		return rewriteValue_Opbroadcast1To8Uint16x8(v)
  2951  	case ssaop.OpcarrylessMultiplyWidenLoUint64x2:
  2952  		v.Op = ssaop.OpARM64VPMULL2D
  2953  		return true
  2954  	case ssaop.OpreduceMaxFloat32x4:
  2955  		v.Op = ssaop.OpARM64VFMAXV4S
  2956  		return true
  2957  	case ssaop.OpreduceMaxInt16x8:
  2958  		v.Op = ssaop.OpARM64VSMAXV8H
  2959  		return true
  2960  	case ssaop.OpreduceMaxInt32x4:
  2961  		v.Op = ssaop.OpARM64VSMAXV4S
  2962  		return true
  2963  	case ssaop.OpreduceMaxInt8x16:
  2964  		v.Op = ssaop.OpARM64VSMAXV16B
  2965  		return true
  2966  	case ssaop.OpreduceMaxUint16x8:
  2967  		v.Op = ssaop.OpARM64VUMAXV8H
  2968  		return true
  2969  	case ssaop.OpreduceMaxUint32x4:
  2970  		v.Op = ssaop.OpARM64VUMAXV4S
  2971  		return true
  2972  	case ssaop.OpreduceMaxUint8x16:
  2973  		v.Op = ssaop.OpARM64VUMAXV16B
  2974  		return true
  2975  	case ssaop.OpreduceMinFloat32x4:
  2976  		v.Op = ssaop.OpARM64VFMINV4S
  2977  		return true
  2978  	case ssaop.OpreduceMinInt16x8:
  2979  		v.Op = ssaop.OpARM64VSMINV8H
  2980  		return true
  2981  	case ssaop.OpreduceMinInt32x4:
  2982  		v.Op = ssaop.OpARM64VSMINV4S
  2983  		return true
  2984  	case ssaop.OpreduceMinInt8x16:
  2985  		v.Op = ssaop.OpARM64VSMINV16B
  2986  		return true
  2987  	case ssaop.OpreduceMinUint16x8:
  2988  		v.Op = ssaop.OpARM64VUMINV8H
  2989  		return true
  2990  	case ssaop.OpreduceMinUint32x4:
  2991  		v.Op = ssaop.OpARM64VUMINV4S
  2992  		return true
  2993  	case ssaop.OpreduceMinUint8x16:
  2994  		v.Op = ssaop.OpARM64VUMINV16B
  2995  		return true
  2996  	case ssaop.OpreduceSumInt16x8:
  2997  		v.Op = ssaop.OpARM64VADDV8H
  2998  		return true
  2999  	case ssaop.OpreduceSumInt32x4:
  3000  		v.Op = ssaop.OpARM64VADDV4S
  3001  		return true
  3002  	case ssaop.OpreduceSumInt8x16:
  3003  		v.Op = ssaop.OpARM64VADDV16B
  3004  		return true
  3005  	case ssaop.OpreduceSumUint16x8:
  3006  		v.Op = ssaop.OpARM64VADDV8H
  3007  		return true
  3008  	case ssaop.OpreduceSumUint32x4:
  3009  		v.Op = ssaop.OpARM64VADDV4S
  3010  		return true
  3011  	case ssaop.OpreduceSumUint8x16:
  3012  		v.Op = ssaop.OpARM64VADDV16B
  3013  		return true
  3014  	}
  3015  	return false
  3016  }
  3017  func rewriteValue_OpARM64ADCSflags(v *ssa.Value) bool {
  3018  	v_2 := v.Args[2]
  3019  	v_1 := v.Args[1]
  3020  	v_0 := v.Args[0]
  3021  	b := v.Block
  3022  	typ := &b.Func.Config.Types
  3023  	// match: (ADCSflags x y (Select1 <types.TypeFlags> (ADDSconstflags [-1] (ADCzerocarry <typ.UInt64> c))))
  3024  	// result: (ADCSflags x y c)
  3025  	for {
  3026  		x := v_0
  3027  		y := v_1
  3028  		if v_2.Op != ssaop.OpSelect1 || v_2.Type != types.TypeFlags {
  3029  			break
  3030  		}
  3031  		v_2_0 := v_2.Args[0]
  3032  		if v_2_0.Op != ssaop.OpARM64ADDSconstflags || ssa.AuxIntToInt64(v_2_0.AuxInt) != -1 {
  3033  			break
  3034  		}
  3035  		v_2_0_0 := v_2_0.Args[0]
  3036  		if v_2_0_0.Op != ssaop.OpARM64ADCzerocarry || v_2_0_0.Type != typ.UInt64 {
  3037  			break
  3038  		}
  3039  		c := v_2_0_0.Args[0]
  3040  		v.Reset(ssaop.OpARM64ADCSflags)
  3041  		v.AddArg3(x, y, c)
  3042  		return true
  3043  	}
  3044  	// match: (ADCSflags x y (Select1 <types.TypeFlags> (ADDSconstflags [-1] (MOVDconst [0]))))
  3045  	// result: (ADDSflags x y)
  3046  	for {
  3047  		x := v_0
  3048  		y := v_1
  3049  		if v_2.Op != ssaop.OpSelect1 || v_2.Type != types.TypeFlags {
  3050  			break
  3051  		}
  3052  		v_2_0 := v_2.Args[0]
  3053  		if v_2_0.Op != ssaop.OpARM64ADDSconstflags || ssa.AuxIntToInt64(v_2_0.AuxInt) != -1 {
  3054  			break
  3055  		}
  3056  		v_2_0_0 := v_2_0.Args[0]
  3057  		if v_2_0_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_2_0_0.AuxInt) != 0 {
  3058  			break
  3059  		}
  3060  		v.Reset(ssaop.OpARM64ADDSflags)
  3061  		v.AddArg2(x, y)
  3062  		return true
  3063  	}
  3064  	return false
  3065  }
  3066  func rewriteValue_OpARM64ADD(v *ssa.Value) bool {
  3067  	v_1 := v.Args[1]
  3068  	v_0 := v.Args[0]
  3069  	b := v.Block
  3070  	// match: (ADD x (MOVDconst <t> [c]))
  3071  	// cond: !t.IsPtr()
  3072  	// result: (ADDconst [c] x)
  3073  	for {
  3074  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  3075  			x := v_0
  3076  			if v_1.Op != ssaop.OpARM64MOVDconst {
  3077  				continue
  3078  			}
  3079  			t := v_1.Type
  3080  			c := ssa.AuxIntToInt64(v_1.AuxInt)
  3081  			if !(!t.IsPtr()) {
  3082  				continue
  3083  			}
  3084  			v.Reset(ssaop.OpARM64ADDconst)
  3085  			v.AuxInt = ssa.Int64ToAuxInt(c)
  3086  			v.AddArg(x)
  3087  			return true
  3088  		}
  3089  		break
  3090  	}
  3091  	// match: (ADD a l:(MUL x y))
  3092  	// cond: l.Uses==1 && ssa.Clobber(l)
  3093  	// result: (MADD a x y)
  3094  	for {
  3095  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  3096  			a := v_0
  3097  			l := v_1
  3098  			if l.Op != ssaop.OpARM64MUL {
  3099  				continue
  3100  			}
  3101  			y := l.Args[1]
  3102  			x := l.Args[0]
  3103  			if !(l.Uses == 1 && ssa.Clobber(l)) {
  3104  				continue
  3105  			}
  3106  			v.Reset(ssaop.OpARM64MADD)
  3107  			v.AddArg3(a, x, y)
  3108  			return true
  3109  		}
  3110  		break
  3111  	}
  3112  	// match: (ADD a l:(MNEG x y))
  3113  	// cond: l.Uses==1 && ssa.Clobber(l)
  3114  	// result: (MSUB a x y)
  3115  	for {
  3116  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  3117  			a := v_0
  3118  			l := v_1
  3119  			if l.Op != ssaop.OpARM64MNEG {
  3120  				continue
  3121  			}
  3122  			y := l.Args[1]
  3123  			x := l.Args[0]
  3124  			if !(l.Uses == 1 && ssa.Clobber(l)) {
  3125  				continue
  3126  			}
  3127  			v.Reset(ssaop.OpARM64MSUB)
  3128  			v.AddArg3(a, x, y)
  3129  			return true
  3130  		}
  3131  		break
  3132  	}
  3133  	// match: (ADD a l:(MULW x y))
  3134  	// cond: v.Type.Size() <= 4 && l.Uses==1 && ssa.Clobber(l)
  3135  	// result: (MADDW a x y)
  3136  	for {
  3137  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  3138  			a := v_0
  3139  			l := v_1
  3140  			if l.Op != ssaop.OpARM64MULW {
  3141  				continue
  3142  			}
  3143  			y := l.Args[1]
  3144  			x := l.Args[0]
  3145  			if !(v.Type.Size() <= 4 && l.Uses == 1 && ssa.Clobber(l)) {
  3146  				continue
  3147  			}
  3148  			v.Reset(ssaop.OpARM64MADDW)
  3149  			v.AddArg3(a, x, y)
  3150  			return true
  3151  		}
  3152  		break
  3153  	}
  3154  	// match: (ADD a l:(MNEGW x y))
  3155  	// cond: v.Type.Size() <= 4 && l.Uses==1 && ssa.Clobber(l)
  3156  	// result: (MSUBW a x y)
  3157  	for {
  3158  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  3159  			a := v_0
  3160  			l := v_1
  3161  			if l.Op != ssaop.OpARM64MNEGW {
  3162  				continue
  3163  			}
  3164  			y := l.Args[1]
  3165  			x := l.Args[0]
  3166  			if !(v.Type.Size() <= 4 && l.Uses == 1 && ssa.Clobber(l)) {
  3167  				continue
  3168  			}
  3169  			v.Reset(ssaop.OpARM64MSUBW)
  3170  			v.AddArg3(a, x, y)
  3171  			return true
  3172  		}
  3173  		break
  3174  	}
  3175  	// match: (ADD <t> a p:(ADDconst [c] m:(MUL _ _)))
  3176  	// cond: p.Uses==1 && m.Uses==1 && !t.IsPtrShaped()
  3177  	// result: (ADDconst [c] (ADD <v.Type> a m))
  3178  	for {
  3179  		t := v.Type
  3180  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  3181  			a := v_0
  3182  			p := v_1
  3183  			if p.Op != ssaop.OpARM64ADDconst {
  3184  				continue
  3185  			}
  3186  			c := ssa.AuxIntToInt64(p.AuxInt)
  3187  			m := p.Args[0]
  3188  			if m.Op != ssaop.OpARM64MUL || !(p.Uses == 1 && m.Uses == 1 && !t.IsPtrShaped()) {
  3189  				continue
  3190  			}
  3191  			v.Reset(ssaop.OpARM64ADDconst)
  3192  			v.AuxInt = ssa.Int64ToAuxInt(c)
  3193  			v0 := b.NewValue0(v.Pos, ssaop.OpARM64ADD, v.Type)
  3194  			v0.AddArg2(a, m)
  3195  			v.AddArg(v0)
  3196  			return true
  3197  		}
  3198  		break
  3199  	}
  3200  	// match: (ADD <t> a p:(ADDconst [c] m:(MULW _ _)))
  3201  	// cond: p.Uses==1 && m.Uses==1 && !t.IsPtrShaped()
  3202  	// result: (ADDconst [c] (ADD <v.Type> a m))
  3203  	for {
  3204  		t := v.Type
  3205  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  3206  			a := v_0
  3207  			p := v_1
  3208  			if p.Op != ssaop.OpARM64ADDconst {
  3209  				continue
  3210  			}
  3211  			c := ssa.AuxIntToInt64(p.AuxInt)
  3212  			m := p.Args[0]
  3213  			if m.Op != ssaop.OpARM64MULW || !(p.Uses == 1 && m.Uses == 1 && !t.IsPtrShaped()) {
  3214  				continue
  3215  			}
  3216  			v.Reset(ssaop.OpARM64ADDconst)
  3217  			v.AuxInt = ssa.Int64ToAuxInt(c)
  3218  			v0 := b.NewValue0(v.Pos, ssaop.OpARM64ADD, v.Type)
  3219  			v0.AddArg2(a, m)
  3220  			v.AddArg(v0)
  3221  			return true
  3222  		}
  3223  		break
  3224  	}
  3225  	// match: (ADD <t> a p:(ADDconst [c] m:(MNEG _ _)))
  3226  	// cond: p.Uses==1 && m.Uses==1 && !t.IsPtrShaped()
  3227  	// result: (ADDconst [c] (ADD <v.Type> a m))
  3228  	for {
  3229  		t := v.Type
  3230  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  3231  			a := v_0
  3232  			p := v_1
  3233  			if p.Op != ssaop.OpARM64ADDconst {
  3234  				continue
  3235  			}
  3236  			c := ssa.AuxIntToInt64(p.AuxInt)
  3237  			m := p.Args[0]
  3238  			if m.Op != ssaop.OpARM64MNEG || !(p.Uses == 1 && m.Uses == 1 && !t.IsPtrShaped()) {
  3239  				continue
  3240  			}
  3241  			v.Reset(ssaop.OpARM64ADDconst)
  3242  			v.AuxInt = ssa.Int64ToAuxInt(c)
  3243  			v0 := b.NewValue0(v.Pos, ssaop.OpARM64ADD, v.Type)
  3244  			v0.AddArg2(a, m)
  3245  			v.AddArg(v0)
  3246  			return true
  3247  		}
  3248  		break
  3249  	}
  3250  	// match: (ADD <t> a p:(ADDconst [c] m:(MNEGW _ _)))
  3251  	// cond: p.Uses==1 && m.Uses==1 && !t.IsPtrShaped()
  3252  	// result: (ADDconst [c] (ADD <v.Type> a m))
  3253  	for {
  3254  		t := v.Type
  3255  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  3256  			a := v_0
  3257  			p := v_1
  3258  			if p.Op != ssaop.OpARM64ADDconst {
  3259  				continue
  3260  			}
  3261  			c := ssa.AuxIntToInt64(p.AuxInt)
  3262  			m := p.Args[0]
  3263  			if m.Op != ssaop.OpARM64MNEGW || !(p.Uses == 1 && m.Uses == 1 && !t.IsPtrShaped()) {
  3264  				continue
  3265  			}
  3266  			v.Reset(ssaop.OpARM64ADDconst)
  3267  			v.AuxInt = ssa.Int64ToAuxInt(c)
  3268  			v0 := b.NewValue0(v.Pos, ssaop.OpARM64ADD, v.Type)
  3269  			v0.AddArg2(a, m)
  3270  			v.AddArg(v0)
  3271  			return true
  3272  		}
  3273  		break
  3274  	}
  3275  	// match: (ADD <t> a p:(SUBconst [c] m:(MUL _ _)))
  3276  	// cond: p.Uses==1 && m.Uses==1 && !t.IsPtrShaped()
  3277  	// result: (SUBconst [c] (ADD <v.Type> a m))
  3278  	for {
  3279  		t := v.Type
  3280  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  3281  			a := v_0
  3282  			p := v_1
  3283  			if p.Op != ssaop.OpARM64SUBconst {
  3284  				continue
  3285  			}
  3286  			c := ssa.AuxIntToInt64(p.AuxInt)
  3287  			m := p.Args[0]
  3288  			if m.Op != ssaop.OpARM64MUL || !(p.Uses == 1 && m.Uses == 1 && !t.IsPtrShaped()) {
  3289  				continue
  3290  			}
  3291  			v.Reset(ssaop.OpARM64SUBconst)
  3292  			v.AuxInt = ssa.Int64ToAuxInt(c)
  3293  			v0 := b.NewValue0(v.Pos, ssaop.OpARM64ADD, v.Type)
  3294  			v0.AddArg2(a, m)
  3295  			v.AddArg(v0)
  3296  			return true
  3297  		}
  3298  		break
  3299  	}
  3300  	// match: (ADD <t> a p:(SUBconst [c] m:(MULW _ _)))
  3301  	// cond: p.Uses==1 && m.Uses==1 && !t.IsPtrShaped()
  3302  	// result: (SUBconst [c] (ADD <v.Type> a m))
  3303  	for {
  3304  		t := v.Type
  3305  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  3306  			a := v_0
  3307  			p := v_1
  3308  			if p.Op != ssaop.OpARM64SUBconst {
  3309  				continue
  3310  			}
  3311  			c := ssa.AuxIntToInt64(p.AuxInt)
  3312  			m := p.Args[0]
  3313  			if m.Op != ssaop.OpARM64MULW || !(p.Uses == 1 && m.Uses == 1 && !t.IsPtrShaped()) {
  3314  				continue
  3315  			}
  3316  			v.Reset(ssaop.OpARM64SUBconst)
  3317  			v.AuxInt = ssa.Int64ToAuxInt(c)
  3318  			v0 := b.NewValue0(v.Pos, ssaop.OpARM64ADD, v.Type)
  3319  			v0.AddArg2(a, m)
  3320  			v.AddArg(v0)
  3321  			return true
  3322  		}
  3323  		break
  3324  	}
  3325  	// match: (ADD <t> a p:(SUBconst [c] m:(MNEG _ _)))
  3326  	// cond: p.Uses==1 && m.Uses==1 && !t.IsPtrShaped()
  3327  	// result: (SUBconst [c] (ADD <v.Type> a m))
  3328  	for {
  3329  		t := v.Type
  3330  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  3331  			a := v_0
  3332  			p := v_1
  3333  			if p.Op != ssaop.OpARM64SUBconst {
  3334  				continue
  3335  			}
  3336  			c := ssa.AuxIntToInt64(p.AuxInt)
  3337  			m := p.Args[0]
  3338  			if m.Op != ssaop.OpARM64MNEG || !(p.Uses == 1 && m.Uses == 1 && !t.IsPtrShaped()) {
  3339  				continue
  3340  			}
  3341  			v.Reset(ssaop.OpARM64SUBconst)
  3342  			v.AuxInt = ssa.Int64ToAuxInt(c)
  3343  			v0 := b.NewValue0(v.Pos, ssaop.OpARM64ADD, v.Type)
  3344  			v0.AddArg2(a, m)
  3345  			v.AddArg(v0)
  3346  			return true
  3347  		}
  3348  		break
  3349  	}
  3350  	// match: (ADD <t> a p:(SUBconst [c] m:(MNEGW _ _)))
  3351  	// cond: p.Uses==1 && m.Uses==1 && !t.IsPtrShaped()
  3352  	// result: (SUBconst [c] (ADD <v.Type> a m))
  3353  	for {
  3354  		t := v.Type
  3355  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  3356  			a := v_0
  3357  			p := v_1
  3358  			if p.Op != ssaop.OpARM64SUBconst {
  3359  				continue
  3360  			}
  3361  			c := ssa.AuxIntToInt64(p.AuxInt)
  3362  			m := p.Args[0]
  3363  			if m.Op != ssaop.OpARM64MNEGW || !(p.Uses == 1 && m.Uses == 1 && !t.IsPtrShaped()) {
  3364  				continue
  3365  			}
  3366  			v.Reset(ssaop.OpARM64SUBconst)
  3367  			v.AuxInt = ssa.Int64ToAuxInt(c)
  3368  			v0 := b.NewValue0(v.Pos, ssaop.OpARM64ADD, v.Type)
  3369  			v0.AddArg2(a, m)
  3370  			v.AddArg(v0)
  3371  			return true
  3372  		}
  3373  		break
  3374  	}
  3375  	// match: (ADD x (NEG y))
  3376  	// result: (SUB x y)
  3377  	for {
  3378  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  3379  			x := v_0
  3380  			if v_1.Op != ssaop.OpARM64NEG {
  3381  				continue
  3382  			}
  3383  			y := v_1.Args[0]
  3384  			v.Reset(ssaop.OpARM64SUB)
  3385  			v.AddArg2(x, y)
  3386  			return true
  3387  		}
  3388  		break
  3389  	}
  3390  	// match: (ADD x0 x1:(SLLconst [c] y))
  3391  	// cond: ssa.ClobberIfDead(x1)
  3392  	// result: (ADDshiftLL x0 y [c])
  3393  	for {
  3394  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  3395  			x0 := v_0
  3396  			x1 := v_1
  3397  			if x1.Op != ssaop.OpARM64SLLconst {
  3398  				continue
  3399  			}
  3400  			c := ssa.AuxIntToInt64(x1.AuxInt)
  3401  			y := x1.Args[0]
  3402  			if !(ssa.ClobberIfDead(x1)) {
  3403  				continue
  3404  			}
  3405  			v.Reset(ssaop.OpARM64ADDshiftLL)
  3406  			v.AuxInt = ssa.Int64ToAuxInt(c)
  3407  			v.AddArg2(x0, y)
  3408  			return true
  3409  		}
  3410  		break
  3411  	}
  3412  	// match: (ADD x0 x1:(SRLconst [c] y))
  3413  	// cond: ssa.ClobberIfDead(x1)
  3414  	// result: (ADDshiftRL x0 y [c])
  3415  	for {
  3416  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  3417  			x0 := v_0
  3418  			x1 := v_1
  3419  			if x1.Op != ssaop.OpARM64SRLconst {
  3420  				continue
  3421  			}
  3422  			c := ssa.AuxIntToInt64(x1.AuxInt)
  3423  			y := x1.Args[0]
  3424  			if !(ssa.ClobberIfDead(x1)) {
  3425  				continue
  3426  			}
  3427  			v.Reset(ssaop.OpARM64ADDshiftRL)
  3428  			v.AuxInt = ssa.Int64ToAuxInt(c)
  3429  			v.AddArg2(x0, y)
  3430  			return true
  3431  		}
  3432  		break
  3433  	}
  3434  	// match: (ADD x0 x1:(SRAconst [c] y))
  3435  	// cond: ssa.ClobberIfDead(x1)
  3436  	// result: (ADDshiftRA x0 y [c])
  3437  	for {
  3438  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  3439  			x0 := v_0
  3440  			x1 := v_1
  3441  			if x1.Op != ssaop.OpARM64SRAconst {
  3442  				continue
  3443  			}
  3444  			c := ssa.AuxIntToInt64(x1.AuxInt)
  3445  			y := x1.Args[0]
  3446  			if !(ssa.ClobberIfDead(x1)) {
  3447  				continue
  3448  			}
  3449  			v.Reset(ssaop.OpARM64ADDshiftRA)
  3450  			v.AuxInt = ssa.Int64ToAuxInt(c)
  3451  			v.AddArg2(x0, y)
  3452  			return true
  3453  		}
  3454  		break
  3455  	}
  3456  	// match: (ADD x0 x1:(ANDshiftRA x2:(SLLconst [sl] y) z [63]))
  3457  	// cond: x1.Uses == 1 && x2.Uses == 1
  3458  	// result: (ADDshiftLL x0 (ANDshiftRA <y.Type> y z [63]) [sl])
  3459  	for {
  3460  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  3461  			x0 := v_0
  3462  			x1 := v_1
  3463  			if x1.Op != ssaop.OpARM64ANDshiftRA || ssa.AuxIntToInt64(x1.AuxInt) != 63 {
  3464  				continue
  3465  			}
  3466  			z := x1.Args[1]
  3467  			x2 := x1.Args[0]
  3468  			if x2.Op != ssaop.OpARM64SLLconst {
  3469  				continue
  3470  			}
  3471  			sl := ssa.AuxIntToInt64(x2.AuxInt)
  3472  			y := x2.Args[0]
  3473  			if !(x1.Uses == 1 && x2.Uses == 1) {
  3474  				continue
  3475  			}
  3476  			v.Reset(ssaop.OpARM64ADDshiftLL)
  3477  			v.AuxInt = ssa.Int64ToAuxInt(sl)
  3478  			v0 := b.NewValue0(v.Pos, ssaop.OpARM64ANDshiftRA, y.Type)
  3479  			v0.AuxInt = ssa.Int64ToAuxInt(63)
  3480  			v0.AddArg2(y, z)
  3481  			v.AddArg2(x0, v0)
  3482  			return true
  3483  		}
  3484  		break
  3485  	}
  3486  	// match: (ADD x0 x1:(ANDshiftLL x2:(SRAconst [63] z) y [sl]))
  3487  	// cond: x1.Uses == 1 && x2.Uses == 1
  3488  	// result: (ADDshiftLL x0 (ANDshiftRA <y.Type> y z [63]) [sl])
  3489  	for {
  3490  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  3491  			x0 := v_0
  3492  			x1 := v_1
  3493  			if x1.Op != ssaop.OpARM64ANDshiftLL {
  3494  				continue
  3495  			}
  3496  			sl := ssa.AuxIntToInt64(x1.AuxInt)
  3497  			y := x1.Args[1]
  3498  			x2 := x1.Args[0]
  3499  			if x2.Op != ssaop.OpARM64SRAconst || ssa.AuxIntToInt64(x2.AuxInt) != 63 {
  3500  				continue
  3501  			}
  3502  			z := x2.Args[0]
  3503  			if !(x1.Uses == 1 && x2.Uses == 1) {
  3504  				continue
  3505  			}
  3506  			v.Reset(ssaop.OpARM64ADDshiftLL)
  3507  			v.AuxInt = ssa.Int64ToAuxInt(sl)
  3508  			v0 := b.NewValue0(v.Pos, ssaop.OpARM64ANDshiftRA, y.Type)
  3509  			v0.AuxInt = ssa.Int64ToAuxInt(63)
  3510  			v0.AddArg2(y, z)
  3511  			v.AddArg2(x0, v0)
  3512  			return true
  3513  		}
  3514  		break
  3515  	}
  3516  	return false
  3517  }
  3518  func rewriteValue_OpARM64ADDSflags(v *ssa.Value) bool {
  3519  	v_1 := v.Args[1]
  3520  	v_0 := v.Args[0]
  3521  	// match: (ADDSflags x (MOVDconst [c]))
  3522  	// result: (ADDSconstflags [c] x)
  3523  	for {
  3524  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  3525  			x := v_0
  3526  			if v_1.Op != ssaop.OpARM64MOVDconst {
  3527  				continue
  3528  			}
  3529  			c := ssa.AuxIntToInt64(v_1.AuxInt)
  3530  			v.Reset(ssaop.OpARM64ADDSconstflags)
  3531  			v.AuxInt = ssa.Int64ToAuxInt(c)
  3532  			v.AddArg(x)
  3533  			return true
  3534  		}
  3535  		break
  3536  	}
  3537  	return false
  3538  }
  3539  func rewriteValue_OpARM64ADDconst(v *ssa.Value) bool {
  3540  	v_0 := v.Args[0]
  3541  	// match: (ADDconst [off1] (MOVDaddr [off2] {sym} ptr))
  3542  	// cond: ssa.Is32Bit(off1+int64(off2))
  3543  	// result: (MOVDaddr [int32(off1)+off2] {sym} ptr)
  3544  	for {
  3545  		off1 := ssa.AuxIntToInt64(v.AuxInt)
  3546  		if v_0.Op != ssaop.OpARM64MOVDaddr {
  3547  			break
  3548  		}
  3549  		off2 := ssa.AuxIntToInt32(v_0.AuxInt)
  3550  		sym := ssa.AuxToSym(v_0.Aux)
  3551  		ptr := v_0.Args[0]
  3552  		if !(ssa.Is32Bit(off1 + int64(off2))) {
  3553  			break
  3554  		}
  3555  		v.Reset(ssaop.OpARM64MOVDaddr)
  3556  		v.AuxInt = ssa.Int32ToAuxInt(int32(off1) + off2)
  3557  		v.Aux = ssa.SymToAux(sym)
  3558  		v.AddArg(ptr)
  3559  		return true
  3560  	}
  3561  	// match: (ADDconst [c] y)
  3562  	// cond: c < 0
  3563  	// result: (SUBconst [-c] y)
  3564  	for {
  3565  		c := ssa.AuxIntToInt64(v.AuxInt)
  3566  		y := v_0
  3567  		if !(c < 0) {
  3568  			break
  3569  		}
  3570  		v.Reset(ssaop.OpARM64SUBconst)
  3571  		v.AuxInt = ssa.Int64ToAuxInt(-c)
  3572  		v.AddArg(y)
  3573  		return true
  3574  	}
  3575  	// match: (ADDconst [0] x)
  3576  	// result: x
  3577  	for {
  3578  		if ssa.AuxIntToInt64(v.AuxInt) != 0 {
  3579  			break
  3580  		}
  3581  		x := v_0
  3582  		v.CopyOf(x)
  3583  		return true
  3584  	}
  3585  	// match: (ADDconst [c] (MOVDconst [d]))
  3586  	// result: (MOVDconst [c+d])
  3587  	for {
  3588  		c := ssa.AuxIntToInt64(v.AuxInt)
  3589  		if v_0.Op != ssaop.OpARM64MOVDconst {
  3590  			break
  3591  		}
  3592  		d := ssa.AuxIntToInt64(v_0.AuxInt)
  3593  		v.Reset(ssaop.OpARM64MOVDconst)
  3594  		v.AuxInt = ssa.Int64ToAuxInt(c + d)
  3595  		return true
  3596  	}
  3597  	// match: (ADDconst [c] (ADDconst [d] x))
  3598  	// result: (ADDconst [c+d] x)
  3599  	for {
  3600  		c := ssa.AuxIntToInt64(v.AuxInt)
  3601  		if v_0.Op != ssaop.OpARM64ADDconst {
  3602  			break
  3603  		}
  3604  		d := ssa.AuxIntToInt64(v_0.AuxInt)
  3605  		x := v_0.Args[0]
  3606  		v.Reset(ssaop.OpARM64ADDconst)
  3607  		v.AuxInt = ssa.Int64ToAuxInt(c + d)
  3608  		v.AddArg(x)
  3609  		return true
  3610  	}
  3611  	// match: (ADDconst [c] (SUBconst [d] x))
  3612  	// result: (ADDconst [c-d] x)
  3613  	for {
  3614  		c := ssa.AuxIntToInt64(v.AuxInt)
  3615  		if v_0.Op != ssaop.OpARM64SUBconst {
  3616  			break
  3617  		}
  3618  		d := ssa.AuxIntToInt64(v_0.AuxInt)
  3619  		x := v_0.Args[0]
  3620  		v.Reset(ssaop.OpARM64ADDconst)
  3621  		v.AuxInt = ssa.Int64ToAuxInt(c - d)
  3622  		v.AddArg(x)
  3623  		return true
  3624  	}
  3625  	return false
  3626  }
  3627  func rewriteValue_OpARM64ADDshiftLL(v *ssa.Value) bool {
  3628  	v_1 := v.Args[1]
  3629  	v_0 := v.Args[0]
  3630  	b := v.Block
  3631  	typ := &b.Func.Config.Types
  3632  	// match: (ADDshiftLL (MOVDconst [c]) x [d])
  3633  	// result: (ADDconst [c] (SLLconst <x.Type> x [d]))
  3634  	for {
  3635  		d := ssa.AuxIntToInt64(v.AuxInt)
  3636  		if v_0.Op != ssaop.OpARM64MOVDconst {
  3637  			break
  3638  		}
  3639  		c := ssa.AuxIntToInt64(v_0.AuxInt)
  3640  		x := v_1
  3641  		v.Reset(ssaop.OpARM64ADDconst)
  3642  		v.AuxInt = ssa.Int64ToAuxInt(c)
  3643  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SLLconst, x.Type)
  3644  		v0.AuxInt = ssa.Int64ToAuxInt(d)
  3645  		v0.AddArg(x)
  3646  		v.AddArg(v0)
  3647  		return true
  3648  	}
  3649  	// match: (ADDshiftLL x (MOVDconst [c]) [d])
  3650  	// result: (ADDconst x [int64(uint64(c)<<uint64(d))])
  3651  	for {
  3652  		d := ssa.AuxIntToInt64(v.AuxInt)
  3653  		x := v_0
  3654  		if v_1.Op != ssaop.OpARM64MOVDconst {
  3655  			break
  3656  		}
  3657  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  3658  		v.Reset(ssaop.OpARM64ADDconst)
  3659  		v.AuxInt = ssa.Int64ToAuxInt(int64(uint64(c) << uint64(d)))
  3660  		v.AddArg(x)
  3661  		return true
  3662  	}
  3663  	// match: (ADDshiftLL <typ.UInt16> [8] (UBFX <typ.UInt16> [ssa.ArmBFAuxInt(8, 8)] x) x)
  3664  	// result: (REV16W x)
  3665  	for {
  3666  		if v.Type != typ.UInt16 || ssa.AuxIntToInt64(v.AuxInt) != 8 || v_0.Op != ssaop.OpARM64UBFX || v_0.Type != typ.UInt16 || ssa.AuxIntToArm64BitField(v_0.AuxInt) != ssa.ArmBFAuxInt(8, 8) {
  3667  			break
  3668  		}
  3669  		x := v_0.Args[0]
  3670  		if x != v_1 {
  3671  			break
  3672  		}
  3673  		v.Reset(ssaop.OpARM64REV16W)
  3674  		v.AddArg(x)
  3675  		return true
  3676  	}
  3677  	// match: (ADDshiftLL [8] (UBFX [ssa.ArmBFAuxInt(8, 24)] (ANDconst [c1] x)) (ANDconst [c2] x))
  3678  	// cond: uint32(c1) == 0xff00ff00 && uint32(c2) == 0x00ff00ff
  3679  	// result: (REV16W x)
  3680  	for {
  3681  		if ssa.AuxIntToInt64(v.AuxInt) != 8 || v_0.Op != ssaop.OpARM64UBFX || ssa.AuxIntToArm64BitField(v_0.AuxInt) != ssa.ArmBFAuxInt(8, 24) {
  3682  			break
  3683  		}
  3684  		v_0_0 := v_0.Args[0]
  3685  		if v_0_0.Op != ssaop.OpARM64ANDconst {
  3686  			break
  3687  		}
  3688  		c1 := ssa.AuxIntToInt64(v_0_0.AuxInt)
  3689  		x := v_0_0.Args[0]
  3690  		if v_1.Op != ssaop.OpARM64ANDconst {
  3691  			break
  3692  		}
  3693  		c2 := ssa.AuxIntToInt64(v_1.AuxInt)
  3694  		if x != v_1.Args[0] || !(uint32(c1) == 0xff00ff00 && uint32(c2) == 0x00ff00ff) {
  3695  			break
  3696  		}
  3697  		v.Reset(ssaop.OpARM64REV16W)
  3698  		v.AddArg(x)
  3699  		return true
  3700  	}
  3701  	// match: (ADDshiftLL [8] (SRLconst [8] (ANDconst [c1] x)) (ANDconst [c2] x))
  3702  	// cond: (uint64(c1) == 0xff00ff00ff00ff00 && uint64(c2) == 0x00ff00ff00ff00ff)
  3703  	// result: (REV16 x)
  3704  	for {
  3705  		if ssa.AuxIntToInt64(v.AuxInt) != 8 || v_0.Op != ssaop.OpARM64SRLconst || ssa.AuxIntToInt64(v_0.AuxInt) != 8 {
  3706  			break
  3707  		}
  3708  		v_0_0 := v_0.Args[0]
  3709  		if v_0_0.Op != ssaop.OpARM64ANDconst {
  3710  			break
  3711  		}
  3712  		c1 := ssa.AuxIntToInt64(v_0_0.AuxInt)
  3713  		x := v_0_0.Args[0]
  3714  		if v_1.Op != ssaop.OpARM64ANDconst {
  3715  			break
  3716  		}
  3717  		c2 := ssa.AuxIntToInt64(v_1.AuxInt)
  3718  		if x != v_1.Args[0] || !(uint64(c1) == 0xff00ff00ff00ff00 && uint64(c2) == 0x00ff00ff00ff00ff) {
  3719  			break
  3720  		}
  3721  		v.Reset(ssaop.OpARM64REV16)
  3722  		v.AddArg(x)
  3723  		return true
  3724  	}
  3725  	// match: (ADDshiftLL [8] (SRLconst [8] (ANDconst [c1] x)) (ANDconst [c2] x))
  3726  	// cond: (uint64(c1) == 0xff00ff00 && uint64(c2) == 0x00ff00ff)
  3727  	// result: (REV16 (ANDconst <x.Type> [0xffffffff] x))
  3728  	for {
  3729  		if ssa.AuxIntToInt64(v.AuxInt) != 8 || v_0.Op != ssaop.OpARM64SRLconst || ssa.AuxIntToInt64(v_0.AuxInt) != 8 {
  3730  			break
  3731  		}
  3732  		v_0_0 := v_0.Args[0]
  3733  		if v_0_0.Op != ssaop.OpARM64ANDconst {
  3734  			break
  3735  		}
  3736  		c1 := ssa.AuxIntToInt64(v_0_0.AuxInt)
  3737  		x := v_0_0.Args[0]
  3738  		if v_1.Op != ssaop.OpARM64ANDconst {
  3739  			break
  3740  		}
  3741  		c2 := ssa.AuxIntToInt64(v_1.AuxInt)
  3742  		if x != v_1.Args[0] || !(uint64(c1) == 0xff00ff00 && uint64(c2) == 0x00ff00ff) {
  3743  			break
  3744  		}
  3745  		v.Reset(ssaop.OpARM64REV16)
  3746  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64ANDconst, x.Type)
  3747  		v0.AuxInt = ssa.Int64ToAuxInt(0xffffffff)
  3748  		v0.AddArg(x)
  3749  		v.AddArg(v0)
  3750  		return true
  3751  	}
  3752  	// match: (ADDshiftLL [c] (SRLconst x [64-c]) x2)
  3753  	// result: (EXTRconst [64-c] x2 x)
  3754  	for {
  3755  		c := ssa.AuxIntToInt64(v.AuxInt)
  3756  		if v_0.Op != ssaop.OpARM64SRLconst || ssa.AuxIntToInt64(v_0.AuxInt) != 64-c {
  3757  			break
  3758  		}
  3759  		x := v_0.Args[0]
  3760  		x2 := v_1
  3761  		v.Reset(ssaop.OpARM64EXTRconst)
  3762  		v.AuxInt = ssa.Int64ToAuxInt(64 - c)
  3763  		v.AddArg2(x2, x)
  3764  		return true
  3765  	}
  3766  	// match: (ADDshiftLL <t> [c] (UBFX [bfc] x) x2)
  3767  	// cond: c < 32 && t.Size() == 4 && bfc == ssa.ArmBFAuxInt(32-c, c)
  3768  	// result: (EXTRWconst [32-c] x2 x)
  3769  	for {
  3770  		t := v.Type
  3771  		c := ssa.AuxIntToInt64(v.AuxInt)
  3772  		if v_0.Op != ssaop.OpARM64UBFX {
  3773  			break
  3774  		}
  3775  		bfc := ssa.AuxIntToArm64BitField(v_0.AuxInt)
  3776  		x := v_0.Args[0]
  3777  		x2 := v_1
  3778  		if !(c < 32 && t.Size() == 4 && bfc == ssa.ArmBFAuxInt(32-c, c)) {
  3779  			break
  3780  		}
  3781  		v.Reset(ssaop.OpARM64EXTRWconst)
  3782  		v.AuxInt = ssa.Int64ToAuxInt(32 - c)
  3783  		v.AddArg2(x2, x)
  3784  		return true
  3785  	}
  3786  	return false
  3787  }
  3788  func rewriteValue_OpARM64ADDshiftRA(v *ssa.Value) bool {
  3789  	v_1 := v.Args[1]
  3790  	v_0 := v.Args[0]
  3791  	b := v.Block
  3792  	// match: (ADDshiftRA (MOVDconst [c]) x [d])
  3793  	// result: (ADDconst [c] (SRAconst <x.Type> x [d]))
  3794  	for {
  3795  		d := ssa.AuxIntToInt64(v.AuxInt)
  3796  		if v_0.Op != ssaop.OpARM64MOVDconst {
  3797  			break
  3798  		}
  3799  		c := ssa.AuxIntToInt64(v_0.AuxInt)
  3800  		x := v_1
  3801  		v.Reset(ssaop.OpARM64ADDconst)
  3802  		v.AuxInt = ssa.Int64ToAuxInt(c)
  3803  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SRAconst, x.Type)
  3804  		v0.AuxInt = ssa.Int64ToAuxInt(d)
  3805  		v0.AddArg(x)
  3806  		v.AddArg(v0)
  3807  		return true
  3808  	}
  3809  	// match: (ADDshiftRA x (MOVDconst [c]) [d])
  3810  	// result: (ADDconst x [c>>uint64(d)])
  3811  	for {
  3812  		d := ssa.AuxIntToInt64(v.AuxInt)
  3813  		x := v_0
  3814  		if v_1.Op != ssaop.OpARM64MOVDconst {
  3815  			break
  3816  		}
  3817  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  3818  		v.Reset(ssaop.OpARM64ADDconst)
  3819  		v.AuxInt = ssa.Int64ToAuxInt(c >> uint64(d))
  3820  		v.AddArg(x)
  3821  		return true
  3822  	}
  3823  	return false
  3824  }
  3825  func rewriteValue_OpARM64ADDshiftRL(v *ssa.Value) bool {
  3826  	v_1 := v.Args[1]
  3827  	v_0 := v.Args[0]
  3828  	b := v.Block
  3829  	// match: (ADDshiftRL (MOVDconst [c]) x [d])
  3830  	// result: (ADDconst [c] (SRLconst <x.Type> x [d]))
  3831  	for {
  3832  		d := ssa.AuxIntToInt64(v.AuxInt)
  3833  		if v_0.Op != ssaop.OpARM64MOVDconst {
  3834  			break
  3835  		}
  3836  		c := ssa.AuxIntToInt64(v_0.AuxInt)
  3837  		x := v_1
  3838  		v.Reset(ssaop.OpARM64ADDconst)
  3839  		v.AuxInt = ssa.Int64ToAuxInt(c)
  3840  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SRLconst, x.Type)
  3841  		v0.AuxInt = ssa.Int64ToAuxInt(d)
  3842  		v0.AddArg(x)
  3843  		v.AddArg(v0)
  3844  		return true
  3845  	}
  3846  	// match: (ADDshiftRL x (MOVDconst [c]) [d])
  3847  	// result: (ADDconst x [int64(uint64(c)>>uint64(d))])
  3848  	for {
  3849  		d := ssa.AuxIntToInt64(v.AuxInt)
  3850  		x := v_0
  3851  		if v_1.Op != ssaop.OpARM64MOVDconst {
  3852  			break
  3853  		}
  3854  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  3855  		v.Reset(ssaop.OpARM64ADDconst)
  3856  		v.AuxInt = ssa.Int64ToAuxInt(int64(uint64(c) >> uint64(d)))
  3857  		v.AddArg(x)
  3858  		return true
  3859  	}
  3860  	return false
  3861  }
  3862  func rewriteValue_OpARM64AND(v *ssa.Value) bool {
  3863  	v_1 := v.Args[1]
  3864  	v_0 := v.Args[0]
  3865  	// match: (AND x (MOVDconst [c]))
  3866  	// result: (ANDconst [c] x)
  3867  	for {
  3868  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  3869  			x := v_0
  3870  			if v_1.Op != ssaop.OpARM64MOVDconst {
  3871  				continue
  3872  			}
  3873  			c := ssa.AuxIntToInt64(v_1.AuxInt)
  3874  			v.Reset(ssaop.OpARM64ANDconst)
  3875  			v.AuxInt = ssa.Int64ToAuxInt(c)
  3876  			v.AddArg(x)
  3877  			return true
  3878  		}
  3879  		break
  3880  	}
  3881  	// match: (AND x x)
  3882  	// result: x
  3883  	for {
  3884  		x := v_0
  3885  		if x != v_1 {
  3886  			break
  3887  		}
  3888  		v.CopyOf(x)
  3889  		return true
  3890  	}
  3891  	// match: (AND x (MVN y))
  3892  	// result: (BIC x y)
  3893  	for {
  3894  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  3895  			x := v_0
  3896  			if v_1.Op != ssaop.OpARM64MVN {
  3897  				continue
  3898  			}
  3899  			y := v_1.Args[0]
  3900  			v.Reset(ssaop.OpARM64BIC)
  3901  			v.AddArg2(x, y)
  3902  			return true
  3903  		}
  3904  		break
  3905  	}
  3906  	// match: (AND x0 x1:(SLLconst [c] y))
  3907  	// cond: ssa.ClobberIfDead(x1)
  3908  	// result: (ANDshiftLL x0 y [c])
  3909  	for {
  3910  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  3911  			x0 := v_0
  3912  			x1 := v_1
  3913  			if x1.Op != ssaop.OpARM64SLLconst {
  3914  				continue
  3915  			}
  3916  			c := ssa.AuxIntToInt64(x1.AuxInt)
  3917  			y := x1.Args[0]
  3918  			if !(ssa.ClobberIfDead(x1)) {
  3919  				continue
  3920  			}
  3921  			v.Reset(ssaop.OpARM64ANDshiftLL)
  3922  			v.AuxInt = ssa.Int64ToAuxInt(c)
  3923  			v.AddArg2(x0, y)
  3924  			return true
  3925  		}
  3926  		break
  3927  	}
  3928  	// match: (AND x0 x1:(SRLconst [c] y))
  3929  	// cond: ssa.ClobberIfDead(x1)
  3930  	// result: (ANDshiftRL x0 y [c])
  3931  	for {
  3932  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  3933  			x0 := v_0
  3934  			x1 := v_1
  3935  			if x1.Op != ssaop.OpARM64SRLconst {
  3936  				continue
  3937  			}
  3938  			c := ssa.AuxIntToInt64(x1.AuxInt)
  3939  			y := x1.Args[0]
  3940  			if !(ssa.ClobberIfDead(x1)) {
  3941  				continue
  3942  			}
  3943  			v.Reset(ssaop.OpARM64ANDshiftRL)
  3944  			v.AuxInt = ssa.Int64ToAuxInt(c)
  3945  			v.AddArg2(x0, y)
  3946  			return true
  3947  		}
  3948  		break
  3949  	}
  3950  	// match: (AND x0 x1:(SRAconst [c] y))
  3951  	// cond: ssa.ClobberIfDead(x1)
  3952  	// result: (ANDshiftRA x0 y [c])
  3953  	for {
  3954  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  3955  			x0 := v_0
  3956  			x1 := v_1
  3957  			if x1.Op != ssaop.OpARM64SRAconst {
  3958  				continue
  3959  			}
  3960  			c := ssa.AuxIntToInt64(x1.AuxInt)
  3961  			y := x1.Args[0]
  3962  			if !(ssa.ClobberIfDead(x1)) {
  3963  				continue
  3964  			}
  3965  			v.Reset(ssaop.OpARM64ANDshiftRA)
  3966  			v.AuxInt = ssa.Int64ToAuxInt(c)
  3967  			v.AddArg2(x0, y)
  3968  			return true
  3969  		}
  3970  		break
  3971  	}
  3972  	// match: (AND x0 x1:(RORconst [c] y))
  3973  	// cond: ssa.ClobberIfDead(x1)
  3974  	// result: (ANDshiftRO x0 y [c])
  3975  	for {
  3976  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  3977  			x0 := v_0
  3978  			x1 := v_1
  3979  			if x1.Op != ssaop.OpARM64RORconst {
  3980  				continue
  3981  			}
  3982  			c := ssa.AuxIntToInt64(x1.AuxInt)
  3983  			y := x1.Args[0]
  3984  			if !(ssa.ClobberIfDead(x1)) {
  3985  				continue
  3986  			}
  3987  			v.Reset(ssaop.OpARM64ANDshiftRO)
  3988  			v.AuxInt = ssa.Int64ToAuxInt(c)
  3989  			v.AddArg2(x0, y)
  3990  			return true
  3991  		}
  3992  		break
  3993  	}
  3994  	return false
  3995  }
  3996  func rewriteValue_OpARM64ANDconst(v *ssa.Value) bool {
  3997  	v_0 := v.Args[0]
  3998  	// match: (ANDconst [0] _)
  3999  	// result: (MOVDconst [0])
  4000  	for {
  4001  		if ssa.AuxIntToInt64(v.AuxInt) != 0 {
  4002  			break
  4003  		}
  4004  		v.Reset(ssaop.OpARM64MOVDconst)
  4005  		v.AuxInt = ssa.Int64ToAuxInt(0)
  4006  		return true
  4007  	}
  4008  	// match: (ANDconst [-1] x)
  4009  	// result: x
  4010  	for {
  4011  		if ssa.AuxIntToInt64(v.AuxInt) != -1 {
  4012  			break
  4013  		}
  4014  		x := v_0
  4015  		v.CopyOf(x)
  4016  		return true
  4017  	}
  4018  	// match: (ANDconst [c] (MOVDconst [d]))
  4019  	// result: (MOVDconst [c&d])
  4020  	for {
  4021  		c := ssa.AuxIntToInt64(v.AuxInt)
  4022  		if v_0.Op != ssaop.OpARM64MOVDconst {
  4023  			break
  4024  		}
  4025  		d := ssa.AuxIntToInt64(v_0.AuxInt)
  4026  		v.Reset(ssaop.OpARM64MOVDconst)
  4027  		v.AuxInt = ssa.Int64ToAuxInt(c & d)
  4028  		return true
  4029  	}
  4030  	// match: (ANDconst [c] (ANDconst [d] x))
  4031  	// result: (ANDconst [c&d] x)
  4032  	for {
  4033  		c := ssa.AuxIntToInt64(v.AuxInt)
  4034  		if v_0.Op != ssaop.OpARM64ANDconst {
  4035  			break
  4036  		}
  4037  		d := ssa.AuxIntToInt64(v_0.AuxInt)
  4038  		x := v_0.Args[0]
  4039  		v.Reset(ssaop.OpARM64ANDconst)
  4040  		v.AuxInt = ssa.Int64ToAuxInt(c & d)
  4041  		v.AddArg(x)
  4042  		return true
  4043  	}
  4044  	// match: (ANDconst [c] (MOVWUreg x))
  4045  	// result: (ANDconst [c&(1<<32-1)] x)
  4046  	for {
  4047  		c := ssa.AuxIntToInt64(v.AuxInt)
  4048  		if v_0.Op != ssaop.OpARM64MOVWUreg {
  4049  			break
  4050  		}
  4051  		x := v_0.Args[0]
  4052  		v.Reset(ssaop.OpARM64ANDconst)
  4053  		v.AuxInt = ssa.Int64ToAuxInt(c & (1<<32 - 1))
  4054  		v.AddArg(x)
  4055  		return true
  4056  	}
  4057  	// match: (ANDconst [c] (MOVHUreg x))
  4058  	// result: (ANDconst [c&(1<<16-1)] x)
  4059  	for {
  4060  		c := ssa.AuxIntToInt64(v.AuxInt)
  4061  		if v_0.Op != ssaop.OpARM64MOVHUreg {
  4062  			break
  4063  		}
  4064  		x := v_0.Args[0]
  4065  		v.Reset(ssaop.OpARM64ANDconst)
  4066  		v.AuxInt = ssa.Int64ToAuxInt(c & (1<<16 - 1))
  4067  		v.AddArg(x)
  4068  		return true
  4069  	}
  4070  	// match: (ANDconst [c] (MOVBUreg x))
  4071  	// result: (ANDconst [c&(1<<8-1)] x)
  4072  	for {
  4073  		c := ssa.AuxIntToInt64(v.AuxInt)
  4074  		if v_0.Op != ssaop.OpARM64MOVBUreg {
  4075  			break
  4076  		}
  4077  		x := v_0.Args[0]
  4078  		v.Reset(ssaop.OpARM64ANDconst)
  4079  		v.AuxInt = ssa.Int64ToAuxInt(c & (1<<8 - 1))
  4080  		v.AddArg(x)
  4081  		return true
  4082  	}
  4083  	// match: (ANDconst [ac] (SLLconst [sc] x))
  4084  	// cond: isARM64BFMask(sc, ac, sc)
  4085  	// result: (UBFIZ [ssa.ArmBFAuxInt(sc, arm64BFWidth(ac, sc))] x)
  4086  	for {
  4087  		ac := ssa.AuxIntToInt64(v.AuxInt)
  4088  		if v_0.Op != ssaop.OpARM64SLLconst {
  4089  			break
  4090  		}
  4091  		sc := ssa.AuxIntToInt64(v_0.AuxInt)
  4092  		x := v_0.Args[0]
  4093  		if !(isARM64BFMask(sc, ac, sc)) {
  4094  			break
  4095  		}
  4096  		v.Reset(ssaop.OpARM64UBFIZ)
  4097  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(sc, arm64BFWidth(ac, sc)))
  4098  		v.AddArg(x)
  4099  		return true
  4100  	}
  4101  	// match: (ANDconst [ac] (SRLconst [sc] x))
  4102  	// cond: isARM64BFMask(sc, ac, 0)
  4103  	// result: (UBFX [ssa.ArmBFAuxInt(sc, arm64BFWidth(ac, 0))] x)
  4104  	for {
  4105  		ac := ssa.AuxIntToInt64(v.AuxInt)
  4106  		if v_0.Op != ssaop.OpARM64SRLconst {
  4107  			break
  4108  		}
  4109  		sc := ssa.AuxIntToInt64(v_0.AuxInt)
  4110  		x := v_0.Args[0]
  4111  		if !(isARM64BFMask(sc, ac, 0)) {
  4112  			break
  4113  		}
  4114  		v.Reset(ssaop.OpARM64UBFX)
  4115  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(sc, arm64BFWidth(ac, 0)))
  4116  		v.AddArg(x)
  4117  		return true
  4118  	}
  4119  	// match: (ANDconst [c] (UBFX [bfc] x))
  4120  	// cond: isARM64BFMask(0, c, 0)
  4121  	// result: (UBFX [ssa.ArmBFAuxInt(bfc.Lsb(), min(bfc.Width(), arm64BFWidth(c, 0)))] x)
  4122  	for {
  4123  		c := ssa.AuxIntToInt64(v.AuxInt)
  4124  		if v_0.Op != ssaop.OpARM64UBFX {
  4125  			break
  4126  		}
  4127  		bfc := ssa.AuxIntToArm64BitField(v_0.AuxInt)
  4128  		x := v_0.Args[0]
  4129  		if !(isARM64BFMask(0, c, 0)) {
  4130  			break
  4131  		}
  4132  		v.Reset(ssaop.OpARM64UBFX)
  4133  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(bfc.Lsb(), min(bfc.Width(), arm64BFWidth(c, 0))))
  4134  		v.AddArg(x)
  4135  		return true
  4136  	}
  4137  	// match: (ANDconst [0xffffffff] x)
  4138  	// result: (MOVWUreg x)
  4139  	for {
  4140  		if ssa.AuxIntToInt64(v.AuxInt) != 0xffffffff {
  4141  			break
  4142  		}
  4143  		x := v_0
  4144  		v.Reset(ssaop.OpARM64MOVWUreg)
  4145  		v.AddArg(x)
  4146  		return true
  4147  	}
  4148  	// match: (ANDconst [0xffff ] x)
  4149  	// result: (MOVHUreg x)
  4150  	for {
  4151  		if ssa.AuxIntToInt64(v.AuxInt) != 0xffff {
  4152  			break
  4153  		}
  4154  		x := v_0
  4155  		v.Reset(ssaop.OpARM64MOVHUreg)
  4156  		v.AddArg(x)
  4157  		return true
  4158  	}
  4159  	// match: (ANDconst [0xff ] x)
  4160  	// result: (MOVBUreg x)
  4161  	for {
  4162  		if ssa.AuxIntToInt64(v.AuxInt) != 0xff {
  4163  			break
  4164  		}
  4165  		x := v_0
  4166  		v.Reset(ssaop.OpARM64MOVBUreg)
  4167  		v.AddArg(x)
  4168  		return true
  4169  	}
  4170  	return false
  4171  }
  4172  func rewriteValue_OpARM64ANDshiftLL(v *ssa.Value) bool {
  4173  	v_1 := v.Args[1]
  4174  	v_0 := v.Args[0]
  4175  	b := v.Block
  4176  	// match: (ANDshiftLL (MOVDconst [c]) x [d])
  4177  	// result: (ANDconst [c] (SLLconst <x.Type> x [d]))
  4178  	for {
  4179  		d := ssa.AuxIntToInt64(v.AuxInt)
  4180  		if v_0.Op != ssaop.OpARM64MOVDconst {
  4181  			break
  4182  		}
  4183  		c := ssa.AuxIntToInt64(v_0.AuxInt)
  4184  		x := v_1
  4185  		v.Reset(ssaop.OpARM64ANDconst)
  4186  		v.AuxInt = ssa.Int64ToAuxInt(c)
  4187  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SLLconst, x.Type)
  4188  		v0.AuxInt = ssa.Int64ToAuxInt(d)
  4189  		v0.AddArg(x)
  4190  		v.AddArg(v0)
  4191  		return true
  4192  	}
  4193  	// match: (ANDshiftLL x (MOVDconst [c]) [d])
  4194  	// result: (ANDconst x [int64(uint64(c)<<uint64(d))])
  4195  	for {
  4196  		d := ssa.AuxIntToInt64(v.AuxInt)
  4197  		x := v_0
  4198  		if v_1.Op != ssaop.OpARM64MOVDconst {
  4199  			break
  4200  		}
  4201  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  4202  		v.Reset(ssaop.OpARM64ANDconst)
  4203  		v.AuxInt = ssa.Int64ToAuxInt(int64(uint64(c) << uint64(d)))
  4204  		v.AddArg(x)
  4205  		return true
  4206  	}
  4207  	// match: (ANDshiftLL y:(SLLconst x [c]) x [c])
  4208  	// result: y
  4209  	for {
  4210  		c := ssa.AuxIntToInt64(v.AuxInt)
  4211  		y := v_0
  4212  		if y.Op != ssaop.OpARM64SLLconst || ssa.AuxIntToInt64(y.AuxInt) != c {
  4213  			break
  4214  		}
  4215  		x := y.Args[0]
  4216  		if x != v_1 {
  4217  			break
  4218  		}
  4219  		v.CopyOf(y)
  4220  		return true
  4221  	}
  4222  	return false
  4223  }
  4224  func rewriteValue_OpARM64ANDshiftRA(v *ssa.Value) bool {
  4225  	v_1 := v.Args[1]
  4226  	v_0 := v.Args[0]
  4227  	b := v.Block
  4228  	// match: (ANDshiftRA (MOVDconst [c]) x [d])
  4229  	// result: (ANDconst [c] (SRAconst <x.Type> x [d]))
  4230  	for {
  4231  		d := ssa.AuxIntToInt64(v.AuxInt)
  4232  		if v_0.Op != ssaop.OpARM64MOVDconst {
  4233  			break
  4234  		}
  4235  		c := ssa.AuxIntToInt64(v_0.AuxInt)
  4236  		x := v_1
  4237  		v.Reset(ssaop.OpARM64ANDconst)
  4238  		v.AuxInt = ssa.Int64ToAuxInt(c)
  4239  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SRAconst, x.Type)
  4240  		v0.AuxInt = ssa.Int64ToAuxInt(d)
  4241  		v0.AddArg(x)
  4242  		v.AddArg(v0)
  4243  		return true
  4244  	}
  4245  	// match: (ANDshiftRA x (MOVDconst [c]) [d])
  4246  	// result: (ANDconst x [c>>uint64(d)])
  4247  	for {
  4248  		d := ssa.AuxIntToInt64(v.AuxInt)
  4249  		x := v_0
  4250  		if v_1.Op != ssaop.OpARM64MOVDconst {
  4251  			break
  4252  		}
  4253  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  4254  		v.Reset(ssaop.OpARM64ANDconst)
  4255  		v.AuxInt = ssa.Int64ToAuxInt(c >> uint64(d))
  4256  		v.AddArg(x)
  4257  		return true
  4258  	}
  4259  	// match: (ANDshiftRA y:(SRAconst x [c]) x [c])
  4260  	// result: y
  4261  	for {
  4262  		c := ssa.AuxIntToInt64(v.AuxInt)
  4263  		y := v_0
  4264  		if y.Op != ssaop.OpARM64SRAconst || ssa.AuxIntToInt64(y.AuxInt) != c {
  4265  			break
  4266  		}
  4267  		x := y.Args[0]
  4268  		if x != v_1 {
  4269  			break
  4270  		}
  4271  		v.CopyOf(y)
  4272  		return true
  4273  	}
  4274  	return false
  4275  }
  4276  func rewriteValue_OpARM64ANDshiftRL(v *ssa.Value) bool {
  4277  	v_1 := v.Args[1]
  4278  	v_0 := v.Args[0]
  4279  	b := v.Block
  4280  	// match: (ANDshiftRL (MOVDconst [c]) x [d])
  4281  	// result: (ANDconst [c] (SRLconst <x.Type> x [d]))
  4282  	for {
  4283  		d := ssa.AuxIntToInt64(v.AuxInt)
  4284  		if v_0.Op != ssaop.OpARM64MOVDconst {
  4285  			break
  4286  		}
  4287  		c := ssa.AuxIntToInt64(v_0.AuxInt)
  4288  		x := v_1
  4289  		v.Reset(ssaop.OpARM64ANDconst)
  4290  		v.AuxInt = ssa.Int64ToAuxInt(c)
  4291  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SRLconst, x.Type)
  4292  		v0.AuxInt = ssa.Int64ToAuxInt(d)
  4293  		v0.AddArg(x)
  4294  		v.AddArg(v0)
  4295  		return true
  4296  	}
  4297  	// match: (ANDshiftRL x (MOVDconst [c]) [d])
  4298  	// result: (ANDconst x [int64(uint64(c)>>uint64(d))])
  4299  	for {
  4300  		d := ssa.AuxIntToInt64(v.AuxInt)
  4301  		x := v_0
  4302  		if v_1.Op != ssaop.OpARM64MOVDconst {
  4303  			break
  4304  		}
  4305  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  4306  		v.Reset(ssaop.OpARM64ANDconst)
  4307  		v.AuxInt = ssa.Int64ToAuxInt(int64(uint64(c) >> uint64(d)))
  4308  		v.AddArg(x)
  4309  		return true
  4310  	}
  4311  	// match: (ANDshiftRL y:(SRLconst x [c]) x [c])
  4312  	// result: y
  4313  	for {
  4314  		c := ssa.AuxIntToInt64(v.AuxInt)
  4315  		y := v_0
  4316  		if y.Op != ssaop.OpARM64SRLconst || ssa.AuxIntToInt64(y.AuxInt) != c {
  4317  			break
  4318  		}
  4319  		x := y.Args[0]
  4320  		if x != v_1 {
  4321  			break
  4322  		}
  4323  		v.CopyOf(y)
  4324  		return true
  4325  	}
  4326  	return false
  4327  }
  4328  func rewriteValue_OpARM64ANDshiftRO(v *ssa.Value) bool {
  4329  	v_1 := v.Args[1]
  4330  	v_0 := v.Args[0]
  4331  	b := v.Block
  4332  	// match: (ANDshiftRO (MOVDconst [c]) x [d])
  4333  	// result: (ANDconst [c] (RORconst <x.Type> x [d]))
  4334  	for {
  4335  		d := ssa.AuxIntToInt64(v.AuxInt)
  4336  		if v_0.Op != ssaop.OpARM64MOVDconst {
  4337  			break
  4338  		}
  4339  		c := ssa.AuxIntToInt64(v_0.AuxInt)
  4340  		x := v_1
  4341  		v.Reset(ssaop.OpARM64ANDconst)
  4342  		v.AuxInt = ssa.Int64ToAuxInt(c)
  4343  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64RORconst, x.Type)
  4344  		v0.AuxInt = ssa.Int64ToAuxInt(d)
  4345  		v0.AddArg(x)
  4346  		v.AddArg(v0)
  4347  		return true
  4348  	}
  4349  	// match: (ANDshiftRO x (MOVDconst [c]) [d])
  4350  	// result: (ANDconst x [rotateRight64(c, d)])
  4351  	for {
  4352  		d := ssa.AuxIntToInt64(v.AuxInt)
  4353  		x := v_0
  4354  		if v_1.Op != ssaop.OpARM64MOVDconst {
  4355  			break
  4356  		}
  4357  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  4358  		v.Reset(ssaop.OpARM64ANDconst)
  4359  		v.AuxInt = ssa.Int64ToAuxInt(rotateRight64(c, d))
  4360  		v.AddArg(x)
  4361  		return true
  4362  	}
  4363  	// match: (ANDshiftRO y:(RORconst x [c]) x [c])
  4364  	// result: y
  4365  	for {
  4366  		c := ssa.AuxIntToInt64(v.AuxInt)
  4367  		y := v_0
  4368  		if y.Op != ssaop.OpARM64RORconst || ssa.AuxIntToInt64(y.AuxInt) != c {
  4369  			break
  4370  		}
  4371  		x := y.Args[0]
  4372  		if x != v_1 {
  4373  			break
  4374  		}
  4375  		v.CopyOf(y)
  4376  		return true
  4377  	}
  4378  	return false
  4379  }
  4380  func rewriteValue_OpARM64BIC(v *ssa.Value) bool {
  4381  	v_1 := v.Args[1]
  4382  	v_0 := v.Args[0]
  4383  	// match: (BIC x (MOVDconst [c]))
  4384  	// result: (ANDconst [^c] x)
  4385  	for {
  4386  		x := v_0
  4387  		if v_1.Op != ssaop.OpARM64MOVDconst {
  4388  			break
  4389  		}
  4390  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  4391  		v.Reset(ssaop.OpARM64ANDconst)
  4392  		v.AuxInt = ssa.Int64ToAuxInt(^c)
  4393  		v.AddArg(x)
  4394  		return true
  4395  	}
  4396  	// match: (BIC x x)
  4397  	// result: (MOVDconst [0])
  4398  	for {
  4399  		x := v_0
  4400  		if x != v_1 {
  4401  			break
  4402  		}
  4403  		v.Reset(ssaop.OpARM64MOVDconst)
  4404  		v.AuxInt = ssa.Int64ToAuxInt(0)
  4405  		return true
  4406  	}
  4407  	// match: (BIC x0 x1:(SLLconst [c] y))
  4408  	// cond: ssa.ClobberIfDead(x1)
  4409  	// result: (BICshiftLL x0 y [c])
  4410  	for {
  4411  		x0 := v_0
  4412  		x1 := v_1
  4413  		if x1.Op != ssaop.OpARM64SLLconst {
  4414  			break
  4415  		}
  4416  		c := ssa.AuxIntToInt64(x1.AuxInt)
  4417  		y := x1.Args[0]
  4418  		if !(ssa.ClobberIfDead(x1)) {
  4419  			break
  4420  		}
  4421  		v.Reset(ssaop.OpARM64BICshiftLL)
  4422  		v.AuxInt = ssa.Int64ToAuxInt(c)
  4423  		v.AddArg2(x0, y)
  4424  		return true
  4425  	}
  4426  	// match: (BIC x0 x1:(SRLconst [c] y))
  4427  	// cond: ssa.ClobberIfDead(x1)
  4428  	// result: (BICshiftRL x0 y [c])
  4429  	for {
  4430  		x0 := v_0
  4431  		x1 := v_1
  4432  		if x1.Op != ssaop.OpARM64SRLconst {
  4433  			break
  4434  		}
  4435  		c := ssa.AuxIntToInt64(x1.AuxInt)
  4436  		y := x1.Args[0]
  4437  		if !(ssa.ClobberIfDead(x1)) {
  4438  			break
  4439  		}
  4440  		v.Reset(ssaop.OpARM64BICshiftRL)
  4441  		v.AuxInt = ssa.Int64ToAuxInt(c)
  4442  		v.AddArg2(x0, y)
  4443  		return true
  4444  	}
  4445  	// match: (BIC x0 x1:(SRAconst [c] y))
  4446  	// cond: ssa.ClobberIfDead(x1)
  4447  	// result: (BICshiftRA x0 y [c])
  4448  	for {
  4449  		x0 := v_0
  4450  		x1 := v_1
  4451  		if x1.Op != ssaop.OpARM64SRAconst {
  4452  			break
  4453  		}
  4454  		c := ssa.AuxIntToInt64(x1.AuxInt)
  4455  		y := x1.Args[0]
  4456  		if !(ssa.ClobberIfDead(x1)) {
  4457  			break
  4458  		}
  4459  		v.Reset(ssaop.OpARM64BICshiftRA)
  4460  		v.AuxInt = ssa.Int64ToAuxInt(c)
  4461  		v.AddArg2(x0, y)
  4462  		return true
  4463  	}
  4464  	// match: (BIC x0 x1:(RORconst [c] y))
  4465  	// cond: ssa.ClobberIfDead(x1)
  4466  	// result: (BICshiftRO x0 y [c])
  4467  	for {
  4468  		x0 := v_0
  4469  		x1 := v_1
  4470  		if x1.Op != ssaop.OpARM64RORconst {
  4471  			break
  4472  		}
  4473  		c := ssa.AuxIntToInt64(x1.AuxInt)
  4474  		y := x1.Args[0]
  4475  		if !(ssa.ClobberIfDead(x1)) {
  4476  			break
  4477  		}
  4478  		v.Reset(ssaop.OpARM64BICshiftRO)
  4479  		v.AuxInt = ssa.Int64ToAuxInt(c)
  4480  		v.AddArg2(x0, y)
  4481  		return true
  4482  	}
  4483  	return false
  4484  }
  4485  func rewriteValue_OpARM64BICshiftLL(v *ssa.Value) bool {
  4486  	v_1 := v.Args[1]
  4487  	v_0 := v.Args[0]
  4488  	// match: (BICshiftLL x (MOVDconst [c]) [d])
  4489  	// result: (ANDconst x [^int64(uint64(c)<<uint64(d))])
  4490  	for {
  4491  		d := ssa.AuxIntToInt64(v.AuxInt)
  4492  		x := v_0
  4493  		if v_1.Op != ssaop.OpARM64MOVDconst {
  4494  			break
  4495  		}
  4496  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  4497  		v.Reset(ssaop.OpARM64ANDconst)
  4498  		v.AuxInt = ssa.Int64ToAuxInt(^int64(uint64(c) << uint64(d)))
  4499  		v.AddArg(x)
  4500  		return true
  4501  	}
  4502  	// match: (BICshiftLL (SLLconst x [c]) x [c])
  4503  	// result: (MOVDconst [0])
  4504  	for {
  4505  		c := ssa.AuxIntToInt64(v.AuxInt)
  4506  		if v_0.Op != ssaop.OpARM64SLLconst || ssa.AuxIntToInt64(v_0.AuxInt) != c {
  4507  			break
  4508  		}
  4509  		x := v_0.Args[0]
  4510  		if x != v_1 {
  4511  			break
  4512  		}
  4513  		v.Reset(ssaop.OpARM64MOVDconst)
  4514  		v.AuxInt = ssa.Int64ToAuxInt(0)
  4515  		return true
  4516  	}
  4517  	return false
  4518  }
  4519  func rewriteValue_OpARM64BICshiftRA(v *ssa.Value) bool {
  4520  	v_1 := v.Args[1]
  4521  	v_0 := v.Args[0]
  4522  	// match: (BICshiftRA x (MOVDconst [c]) [d])
  4523  	// result: (ANDconst x [^(c>>uint64(d))])
  4524  	for {
  4525  		d := ssa.AuxIntToInt64(v.AuxInt)
  4526  		x := v_0
  4527  		if v_1.Op != ssaop.OpARM64MOVDconst {
  4528  			break
  4529  		}
  4530  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  4531  		v.Reset(ssaop.OpARM64ANDconst)
  4532  		v.AuxInt = ssa.Int64ToAuxInt(^(c >> uint64(d)))
  4533  		v.AddArg(x)
  4534  		return true
  4535  	}
  4536  	// match: (BICshiftRA (SRAconst x [c]) x [c])
  4537  	// result: (MOVDconst [0])
  4538  	for {
  4539  		c := ssa.AuxIntToInt64(v.AuxInt)
  4540  		if v_0.Op != ssaop.OpARM64SRAconst || ssa.AuxIntToInt64(v_0.AuxInt) != c {
  4541  			break
  4542  		}
  4543  		x := v_0.Args[0]
  4544  		if x != v_1 {
  4545  			break
  4546  		}
  4547  		v.Reset(ssaop.OpARM64MOVDconst)
  4548  		v.AuxInt = ssa.Int64ToAuxInt(0)
  4549  		return true
  4550  	}
  4551  	return false
  4552  }
  4553  func rewriteValue_OpARM64BICshiftRL(v *ssa.Value) bool {
  4554  	v_1 := v.Args[1]
  4555  	v_0 := v.Args[0]
  4556  	// match: (BICshiftRL x (MOVDconst [c]) [d])
  4557  	// result: (ANDconst x [^int64(uint64(c)>>uint64(d))])
  4558  	for {
  4559  		d := ssa.AuxIntToInt64(v.AuxInt)
  4560  		x := v_0
  4561  		if v_1.Op != ssaop.OpARM64MOVDconst {
  4562  			break
  4563  		}
  4564  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  4565  		v.Reset(ssaop.OpARM64ANDconst)
  4566  		v.AuxInt = ssa.Int64ToAuxInt(^int64(uint64(c) >> uint64(d)))
  4567  		v.AddArg(x)
  4568  		return true
  4569  	}
  4570  	// match: (BICshiftRL (SRLconst x [c]) x [c])
  4571  	// result: (MOVDconst [0])
  4572  	for {
  4573  		c := ssa.AuxIntToInt64(v.AuxInt)
  4574  		if v_0.Op != ssaop.OpARM64SRLconst || ssa.AuxIntToInt64(v_0.AuxInt) != c {
  4575  			break
  4576  		}
  4577  		x := v_0.Args[0]
  4578  		if x != v_1 {
  4579  			break
  4580  		}
  4581  		v.Reset(ssaop.OpARM64MOVDconst)
  4582  		v.AuxInt = ssa.Int64ToAuxInt(0)
  4583  		return true
  4584  	}
  4585  	return false
  4586  }
  4587  func rewriteValue_OpARM64BICshiftRO(v *ssa.Value) bool {
  4588  	v_1 := v.Args[1]
  4589  	v_0 := v.Args[0]
  4590  	// match: (BICshiftRO x (MOVDconst [c]) [d])
  4591  	// result: (ANDconst x [^rotateRight64(c, d)])
  4592  	for {
  4593  		d := ssa.AuxIntToInt64(v.AuxInt)
  4594  		x := v_0
  4595  		if v_1.Op != ssaop.OpARM64MOVDconst {
  4596  			break
  4597  		}
  4598  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  4599  		v.Reset(ssaop.OpARM64ANDconst)
  4600  		v.AuxInt = ssa.Int64ToAuxInt(^rotateRight64(c, d))
  4601  		v.AddArg(x)
  4602  		return true
  4603  	}
  4604  	// match: (BICshiftRO (RORconst x [c]) x [c])
  4605  	// result: (MOVDconst [0])
  4606  	for {
  4607  		c := ssa.AuxIntToInt64(v.AuxInt)
  4608  		if v_0.Op != ssaop.OpARM64RORconst || ssa.AuxIntToInt64(v_0.AuxInt) != c {
  4609  			break
  4610  		}
  4611  		x := v_0.Args[0]
  4612  		if x != v_1 {
  4613  			break
  4614  		}
  4615  		v.Reset(ssaop.OpARM64MOVDconst)
  4616  		v.AuxInt = ssa.Int64ToAuxInt(0)
  4617  		return true
  4618  	}
  4619  	return false
  4620  }
  4621  func rewriteValue_OpARM64CMN(v *ssa.Value) bool {
  4622  	v_1 := v.Args[1]
  4623  	v_0 := v.Args[0]
  4624  	// match: (CMN x (MOVDconst [c]))
  4625  	// result: (CMNconst [c] x)
  4626  	for {
  4627  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  4628  			x := v_0
  4629  			if v_1.Op != ssaop.OpARM64MOVDconst {
  4630  				continue
  4631  			}
  4632  			c := ssa.AuxIntToInt64(v_1.AuxInt)
  4633  			v.Reset(ssaop.OpARM64CMNconst)
  4634  			v.AuxInt = ssa.Int64ToAuxInt(c)
  4635  			v.AddArg(x)
  4636  			return true
  4637  		}
  4638  		break
  4639  	}
  4640  	// match: (CMN x0 x1:(SLLconst [c] y))
  4641  	// cond: ssa.ClobberIfDead(x1)
  4642  	// result: (CMNshiftLL x0 y [c])
  4643  	for {
  4644  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  4645  			x0 := v_0
  4646  			x1 := v_1
  4647  			if x1.Op != ssaop.OpARM64SLLconst {
  4648  				continue
  4649  			}
  4650  			c := ssa.AuxIntToInt64(x1.AuxInt)
  4651  			y := x1.Args[0]
  4652  			if !(ssa.ClobberIfDead(x1)) {
  4653  				continue
  4654  			}
  4655  			v.Reset(ssaop.OpARM64CMNshiftLL)
  4656  			v.AuxInt = ssa.Int64ToAuxInt(c)
  4657  			v.AddArg2(x0, y)
  4658  			return true
  4659  		}
  4660  		break
  4661  	}
  4662  	// match: (CMN x0 x1:(SRLconst [c] y))
  4663  	// cond: ssa.ClobberIfDead(x1)
  4664  	// result: (CMNshiftRL x0 y [c])
  4665  	for {
  4666  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  4667  			x0 := v_0
  4668  			x1 := v_1
  4669  			if x1.Op != ssaop.OpARM64SRLconst {
  4670  				continue
  4671  			}
  4672  			c := ssa.AuxIntToInt64(x1.AuxInt)
  4673  			y := x1.Args[0]
  4674  			if !(ssa.ClobberIfDead(x1)) {
  4675  				continue
  4676  			}
  4677  			v.Reset(ssaop.OpARM64CMNshiftRL)
  4678  			v.AuxInt = ssa.Int64ToAuxInt(c)
  4679  			v.AddArg2(x0, y)
  4680  			return true
  4681  		}
  4682  		break
  4683  	}
  4684  	// match: (CMN x0 x1:(SRAconst [c] y))
  4685  	// cond: ssa.ClobberIfDead(x1)
  4686  	// result: (CMNshiftRA x0 y [c])
  4687  	for {
  4688  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  4689  			x0 := v_0
  4690  			x1 := v_1
  4691  			if x1.Op != ssaop.OpARM64SRAconst {
  4692  				continue
  4693  			}
  4694  			c := ssa.AuxIntToInt64(x1.AuxInt)
  4695  			y := x1.Args[0]
  4696  			if !(ssa.ClobberIfDead(x1)) {
  4697  				continue
  4698  			}
  4699  			v.Reset(ssaop.OpARM64CMNshiftRA)
  4700  			v.AuxInt = ssa.Int64ToAuxInt(c)
  4701  			v.AddArg2(x0, y)
  4702  			return true
  4703  		}
  4704  		break
  4705  	}
  4706  	return false
  4707  }
  4708  func rewriteValue_OpARM64CMNW(v *ssa.Value) bool {
  4709  	v_1 := v.Args[1]
  4710  	v_0 := v.Args[0]
  4711  	// match: (CMNW x (MOVDconst [c]))
  4712  	// result: (CMNWconst [int32(c)] x)
  4713  	for {
  4714  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  4715  			x := v_0
  4716  			if v_1.Op != ssaop.OpARM64MOVDconst {
  4717  				continue
  4718  			}
  4719  			c := ssa.AuxIntToInt64(v_1.AuxInt)
  4720  			v.Reset(ssaop.OpARM64CMNWconst)
  4721  			v.AuxInt = ssa.Int32ToAuxInt(int32(c))
  4722  			v.AddArg(x)
  4723  			return true
  4724  		}
  4725  		break
  4726  	}
  4727  	return false
  4728  }
  4729  func rewriteValue_OpARM64CMNWconst(v *ssa.Value) bool {
  4730  	v_0 := v.Args[0]
  4731  	// match: (CMNWconst [c] y)
  4732  	// cond: c < 0 && c != -1<<31
  4733  	// result: (CMPWconst [-c] y)
  4734  	for {
  4735  		c := ssa.AuxIntToInt32(v.AuxInt)
  4736  		y := v_0
  4737  		if !(c < 0 && c != -1<<31) {
  4738  			break
  4739  		}
  4740  		v.Reset(ssaop.OpARM64CMPWconst)
  4741  		v.AuxInt = ssa.Int32ToAuxInt(-c)
  4742  		v.AddArg(y)
  4743  		return true
  4744  	}
  4745  	// match: (CMNWconst (MOVDconst [x]) [y])
  4746  	// result: (FlagConstant [ssa.AddFlags32(int32(x),y)])
  4747  	for {
  4748  		y := ssa.AuxIntToInt32(v.AuxInt)
  4749  		if v_0.Op != ssaop.OpARM64MOVDconst {
  4750  			break
  4751  		}
  4752  		x := ssa.AuxIntToInt64(v_0.AuxInt)
  4753  		v.Reset(ssaop.OpARM64FlagConstant)
  4754  		v.AuxInt = ssa.FlagConstantToAuxInt(ssa.AddFlags32(int32(x), y))
  4755  		return true
  4756  	}
  4757  	return false
  4758  }
  4759  func rewriteValue_OpARM64CMNconst(v *ssa.Value) bool {
  4760  	v_0 := v.Args[0]
  4761  	// match: (CMNconst [c] y)
  4762  	// cond: c < 0 && c != -1<<63
  4763  	// result: (CMPconst [-c] y)
  4764  	for {
  4765  		c := ssa.AuxIntToInt64(v.AuxInt)
  4766  		y := v_0
  4767  		if !(c < 0 && c != -1<<63) {
  4768  			break
  4769  		}
  4770  		v.Reset(ssaop.OpARM64CMPconst)
  4771  		v.AuxInt = ssa.Int64ToAuxInt(-c)
  4772  		v.AddArg(y)
  4773  		return true
  4774  	}
  4775  	// match: (CMNconst (MOVDconst [x]) [y])
  4776  	// result: (FlagConstant [ssa.AddFlags64(x,y)])
  4777  	for {
  4778  		y := ssa.AuxIntToInt64(v.AuxInt)
  4779  		if v_0.Op != ssaop.OpARM64MOVDconst {
  4780  			break
  4781  		}
  4782  		x := ssa.AuxIntToInt64(v_0.AuxInt)
  4783  		v.Reset(ssaop.OpARM64FlagConstant)
  4784  		v.AuxInt = ssa.FlagConstantToAuxInt(ssa.AddFlags64(x, y))
  4785  		return true
  4786  	}
  4787  	return false
  4788  }
  4789  func rewriteValue_OpARM64CMNshiftLL(v *ssa.Value) bool {
  4790  	v_1 := v.Args[1]
  4791  	v_0 := v.Args[0]
  4792  	b := v.Block
  4793  	// match: (CMNshiftLL (MOVDconst [c]) x [d])
  4794  	// result: (CMNconst [c] (SLLconst <x.Type> x [d]))
  4795  	for {
  4796  		d := ssa.AuxIntToInt64(v.AuxInt)
  4797  		if v_0.Op != ssaop.OpARM64MOVDconst {
  4798  			break
  4799  		}
  4800  		c := ssa.AuxIntToInt64(v_0.AuxInt)
  4801  		x := v_1
  4802  		v.Reset(ssaop.OpARM64CMNconst)
  4803  		v.AuxInt = ssa.Int64ToAuxInt(c)
  4804  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SLLconst, x.Type)
  4805  		v0.AuxInt = ssa.Int64ToAuxInt(d)
  4806  		v0.AddArg(x)
  4807  		v.AddArg(v0)
  4808  		return true
  4809  	}
  4810  	// match: (CMNshiftLL x (MOVDconst [c]) [d])
  4811  	// result: (CMNconst x [int64(uint64(c)<<uint64(d))])
  4812  	for {
  4813  		d := ssa.AuxIntToInt64(v.AuxInt)
  4814  		x := v_0
  4815  		if v_1.Op != ssaop.OpARM64MOVDconst {
  4816  			break
  4817  		}
  4818  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  4819  		v.Reset(ssaop.OpARM64CMNconst)
  4820  		v.AuxInt = ssa.Int64ToAuxInt(int64(uint64(c) << uint64(d)))
  4821  		v.AddArg(x)
  4822  		return true
  4823  	}
  4824  	return false
  4825  }
  4826  func rewriteValue_OpARM64CMNshiftRA(v *ssa.Value) bool {
  4827  	v_1 := v.Args[1]
  4828  	v_0 := v.Args[0]
  4829  	b := v.Block
  4830  	// match: (CMNshiftRA (MOVDconst [c]) x [d])
  4831  	// result: (CMNconst [c] (SRAconst <x.Type> x [d]))
  4832  	for {
  4833  		d := ssa.AuxIntToInt64(v.AuxInt)
  4834  		if v_0.Op != ssaop.OpARM64MOVDconst {
  4835  			break
  4836  		}
  4837  		c := ssa.AuxIntToInt64(v_0.AuxInt)
  4838  		x := v_1
  4839  		v.Reset(ssaop.OpARM64CMNconst)
  4840  		v.AuxInt = ssa.Int64ToAuxInt(c)
  4841  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SRAconst, x.Type)
  4842  		v0.AuxInt = ssa.Int64ToAuxInt(d)
  4843  		v0.AddArg(x)
  4844  		v.AddArg(v0)
  4845  		return true
  4846  	}
  4847  	// match: (CMNshiftRA x (MOVDconst [c]) [d])
  4848  	// result: (CMNconst x [c>>uint64(d)])
  4849  	for {
  4850  		d := ssa.AuxIntToInt64(v.AuxInt)
  4851  		x := v_0
  4852  		if v_1.Op != ssaop.OpARM64MOVDconst {
  4853  			break
  4854  		}
  4855  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  4856  		v.Reset(ssaop.OpARM64CMNconst)
  4857  		v.AuxInt = ssa.Int64ToAuxInt(c >> uint64(d))
  4858  		v.AddArg(x)
  4859  		return true
  4860  	}
  4861  	return false
  4862  }
  4863  func rewriteValue_OpARM64CMNshiftRL(v *ssa.Value) bool {
  4864  	v_1 := v.Args[1]
  4865  	v_0 := v.Args[0]
  4866  	b := v.Block
  4867  	// match: (CMNshiftRL (MOVDconst [c]) x [d])
  4868  	// result: (CMNconst [c] (SRLconst <x.Type> x [d]))
  4869  	for {
  4870  		d := ssa.AuxIntToInt64(v.AuxInt)
  4871  		if v_0.Op != ssaop.OpARM64MOVDconst {
  4872  			break
  4873  		}
  4874  		c := ssa.AuxIntToInt64(v_0.AuxInt)
  4875  		x := v_1
  4876  		v.Reset(ssaop.OpARM64CMNconst)
  4877  		v.AuxInt = ssa.Int64ToAuxInt(c)
  4878  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SRLconst, x.Type)
  4879  		v0.AuxInt = ssa.Int64ToAuxInt(d)
  4880  		v0.AddArg(x)
  4881  		v.AddArg(v0)
  4882  		return true
  4883  	}
  4884  	// match: (CMNshiftRL x (MOVDconst [c]) [d])
  4885  	// result: (CMNconst x [int64(uint64(c)>>uint64(d))])
  4886  	for {
  4887  		d := ssa.AuxIntToInt64(v.AuxInt)
  4888  		x := v_0
  4889  		if v_1.Op != ssaop.OpARM64MOVDconst {
  4890  			break
  4891  		}
  4892  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  4893  		v.Reset(ssaop.OpARM64CMNconst)
  4894  		v.AuxInt = ssa.Int64ToAuxInt(int64(uint64(c) >> uint64(d)))
  4895  		v.AddArg(x)
  4896  		return true
  4897  	}
  4898  	return false
  4899  }
  4900  func rewriteValue_OpARM64CMP(v *ssa.Value) bool {
  4901  	v_1 := v.Args[1]
  4902  	v_0 := v.Args[0]
  4903  	b := v.Block
  4904  	// match: (CMP x (MOVDconst [c]))
  4905  	// result: (CMPconst [c] x)
  4906  	for {
  4907  		x := v_0
  4908  		if v_1.Op != ssaop.OpARM64MOVDconst {
  4909  			break
  4910  		}
  4911  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  4912  		v.Reset(ssaop.OpARM64CMPconst)
  4913  		v.AuxInt = ssa.Int64ToAuxInt(c)
  4914  		v.AddArg(x)
  4915  		return true
  4916  	}
  4917  	// match: (CMP (MOVDconst [c]) x)
  4918  	// result: (InvertFlags (CMPconst [c] x))
  4919  	for {
  4920  		if v_0.Op != ssaop.OpARM64MOVDconst {
  4921  			break
  4922  		}
  4923  		c := ssa.AuxIntToInt64(v_0.AuxInt)
  4924  		x := v_1
  4925  		v.Reset(ssaop.OpARM64InvertFlags)
  4926  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMPconst, types.TypeFlags)
  4927  		v0.AuxInt = ssa.Int64ToAuxInt(c)
  4928  		v0.AddArg(x)
  4929  		v.AddArg(v0)
  4930  		return true
  4931  	}
  4932  	// match: (CMP x y)
  4933  	// cond: ssa.CanonLessThan(x,y)
  4934  	// result: (InvertFlags (CMP y x))
  4935  	for {
  4936  		x := v_0
  4937  		y := v_1
  4938  		if !(ssa.CanonLessThan(x, y)) {
  4939  			break
  4940  		}
  4941  		v.Reset(ssaop.OpARM64InvertFlags)
  4942  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMP, types.TypeFlags)
  4943  		v0.AddArg2(y, x)
  4944  		v.AddArg(v0)
  4945  		return true
  4946  	}
  4947  	// match: (CMP x0 x1:(SLLconst [c] y))
  4948  	// cond: ssa.ClobberIfDead(x1)
  4949  	// result: (CMPshiftLL x0 y [c])
  4950  	for {
  4951  		x0 := v_0
  4952  		x1 := v_1
  4953  		if x1.Op != ssaop.OpARM64SLLconst {
  4954  			break
  4955  		}
  4956  		c := ssa.AuxIntToInt64(x1.AuxInt)
  4957  		y := x1.Args[0]
  4958  		if !(ssa.ClobberIfDead(x1)) {
  4959  			break
  4960  		}
  4961  		v.Reset(ssaop.OpARM64CMPshiftLL)
  4962  		v.AuxInt = ssa.Int64ToAuxInt(c)
  4963  		v.AddArg2(x0, y)
  4964  		return true
  4965  	}
  4966  	// match: (CMP x0:(SLLconst [c] y) x1)
  4967  	// cond: ssa.ClobberIfDead(x0)
  4968  	// result: (InvertFlags (CMPshiftLL x1 y [c]))
  4969  	for {
  4970  		x0 := v_0
  4971  		if x0.Op != ssaop.OpARM64SLLconst {
  4972  			break
  4973  		}
  4974  		c := ssa.AuxIntToInt64(x0.AuxInt)
  4975  		y := x0.Args[0]
  4976  		x1 := v_1
  4977  		if !(ssa.ClobberIfDead(x0)) {
  4978  			break
  4979  		}
  4980  		v.Reset(ssaop.OpARM64InvertFlags)
  4981  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMPshiftLL, types.TypeFlags)
  4982  		v0.AuxInt = ssa.Int64ToAuxInt(c)
  4983  		v0.AddArg2(x1, y)
  4984  		v.AddArg(v0)
  4985  		return true
  4986  	}
  4987  	// match: (CMP x0 x1:(SRLconst [c] y))
  4988  	// cond: ssa.ClobberIfDead(x1)
  4989  	// result: (CMPshiftRL x0 y [c])
  4990  	for {
  4991  		x0 := v_0
  4992  		x1 := v_1
  4993  		if x1.Op != ssaop.OpARM64SRLconst {
  4994  			break
  4995  		}
  4996  		c := ssa.AuxIntToInt64(x1.AuxInt)
  4997  		y := x1.Args[0]
  4998  		if !(ssa.ClobberIfDead(x1)) {
  4999  			break
  5000  		}
  5001  		v.Reset(ssaop.OpARM64CMPshiftRL)
  5002  		v.AuxInt = ssa.Int64ToAuxInt(c)
  5003  		v.AddArg2(x0, y)
  5004  		return true
  5005  	}
  5006  	// match: (CMP x0:(SRLconst [c] y) x1)
  5007  	// cond: ssa.ClobberIfDead(x0)
  5008  	// result: (InvertFlags (CMPshiftRL x1 y [c]))
  5009  	for {
  5010  		x0 := v_0
  5011  		if x0.Op != ssaop.OpARM64SRLconst {
  5012  			break
  5013  		}
  5014  		c := ssa.AuxIntToInt64(x0.AuxInt)
  5015  		y := x0.Args[0]
  5016  		x1 := v_1
  5017  		if !(ssa.ClobberIfDead(x0)) {
  5018  			break
  5019  		}
  5020  		v.Reset(ssaop.OpARM64InvertFlags)
  5021  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMPshiftRL, types.TypeFlags)
  5022  		v0.AuxInt = ssa.Int64ToAuxInt(c)
  5023  		v0.AddArg2(x1, y)
  5024  		v.AddArg(v0)
  5025  		return true
  5026  	}
  5027  	// match: (CMP x0 x1:(SRAconst [c] y))
  5028  	// cond: ssa.ClobberIfDead(x1)
  5029  	// result: (CMPshiftRA x0 y [c])
  5030  	for {
  5031  		x0 := v_0
  5032  		x1 := v_1
  5033  		if x1.Op != ssaop.OpARM64SRAconst {
  5034  			break
  5035  		}
  5036  		c := ssa.AuxIntToInt64(x1.AuxInt)
  5037  		y := x1.Args[0]
  5038  		if !(ssa.ClobberIfDead(x1)) {
  5039  			break
  5040  		}
  5041  		v.Reset(ssaop.OpARM64CMPshiftRA)
  5042  		v.AuxInt = ssa.Int64ToAuxInt(c)
  5043  		v.AddArg2(x0, y)
  5044  		return true
  5045  	}
  5046  	// match: (CMP x0:(SRAconst [c] y) x1)
  5047  	// cond: ssa.ClobberIfDead(x0)
  5048  	// result: (InvertFlags (CMPshiftRA x1 y [c]))
  5049  	for {
  5050  		x0 := v_0
  5051  		if x0.Op != ssaop.OpARM64SRAconst {
  5052  			break
  5053  		}
  5054  		c := ssa.AuxIntToInt64(x0.AuxInt)
  5055  		y := x0.Args[0]
  5056  		x1 := v_1
  5057  		if !(ssa.ClobberIfDead(x0)) {
  5058  			break
  5059  		}
  5060  		v.Reset(ssaop.OpARM64InvertFlags)
  5061  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMPshiftRA, types.TypeFlags)
  5062  		v0.AuxInt = ssa.Int64ToAuxInt(c)
  5063  		v0.AddArg2(x1, y)
  5064  		v.AddArg(v0)
  5065  		return true
  5066  	}
  5067  	return false
  5068  }
  5069  func rewriteValue_OpARM64CMPW(v *ssa.Value) bool {
  5070  	v_1 := v.Args[1]
  5071  	v_0 := v.Args[0]
  5072  	b := v.Block
  5073  	// match: (CMPW x (MOVDconst [c]))
  5074  	// result: (CMPWconst [int32(c)] x)
  5075  	for {
  5076  		x := v_0
  5077  		if v_1.Op != ssaop.OpARM64MOVDconst {
  5078  			break
  5079  		}
  5080  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  5081  		v.Reset(ssaop.OpARM64CMPWconst)
  5082  		v.AuxInt = ssa.Int32ToAuxInt(int32(c))
  5083  		v.AddArg(x)
  5084  		return true
  5085  	}
  5086  	// match: (CMPW (MOVDconst [c]) x)
  5087  	// result: (InvertFlags (CMPWconst [int32(c)] x))
  5088  	for {
  5089  		if v_0.Op != ssaop.OpARM64MOVDconst {
  5090  			break
  5091  		}
  5092  		c := ssa.AuxIntToInt64(v_0.AuxInt)
  5093  		x := v_1
  5094  		v.Reset(ssaop.OpARM64InvertFlags)
  5095  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMPWconst, types.TypeFlags)
  5096  		v0.AuxInt = ssa.Int32ToAuxInt(int32(c))
  5097  		v0.AddArg(x)
  5098  		v.AddArg(v0)
  5099  		return true
  5100  	}
  5101  	// match: (CMPW x y)
  5102  	// cond: ssa.CanonLessThan(x,y)
  5103  	// result: (InvertFlags (CMPW y x))
  5104  	for {
  5105  		x := v_0
  5106  		y := v_1
  5107  		if !(ssa.CanonLessThan(x, y)) {
  5108  			break
  5109  		}
  5110  		v.Reset(ssaop.OpARM64InvertFlags)
  5111  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMPW, types.TypeFlags)
  5112  		v0.AddArg2(y, x)
  5113  		v.AddArg(v0)
  5114  		return true
  5115  	}
  5116  	return false
  5117  }
  5118  func rewriteValue_OpARM64CMPWconst(v *ssa.Value) bool {
  5119  	v_0 := v.Args[0]
  5120  	// match: (CMPWconst [c] y)
  5121  	// cond: c < 0 && c != -1<<31
  5122  	// result: (CMNWconst [-c] y)
  5123  	for {
  5124  		c := ssa.AuxIntToInt32(v.AuxInt)
  5125  		y := v_0
  5126  		if !(c < 0 && c != -1<<31) {
  5127  			break
  5128  		}
  5129  		v.Reset(ssaop.OpARM64CMNWconst)
  5130  		v.AuxInt = ssa.Int32ToAuxInt(-c)
  5131  		v.AddArg(y)
  5132  		return true
  5133  	}
  5134  	// match: (CMPWconst (MOVDconst [x]) [y])
  5135  	// result: (FlagConstant [ssa.SubFlags32(int32(x),y)])
  5136  	for {
  5137  		y := ssa.AuxIntToInt32(v.AuxInt)
  5138  		if v_0.Op != ssaop.OpARM64MOVDconst {
  5139  			break
  5140  		}
  5141  		x := ssa.AuxIntToInt64(v_0.AuxInt)
  5142  		v.Reset(ssaop.OpARM64FlagConstant)
  5143  		v.AuxInt = ssa.FlagConstantToAuxInt(ssa.SubFlags32(int32(x), y))
  5144  		return true
  5145  	}
  5146  	// match: (CMPWconst (MOVBUreg _) [c])
  5147  	// cond: 0xff < c
  5148  	// result: (FlagConstant [ssa.SubFlags64(0,1)])
  5149  	for {
  5150  		c := ssa.AuxIntToInt32(v.AuxInt)
  5151  		if v_0.Op != ssaop.OpARM64MOVBUreg || !(0xff < c) {
  5152  			break
  5153  		}
  5154  		v.Reset(ssaop.OpARM64FlagConstant)
  5155  		v.AuxInt = ssa.FlagConstantToAuxInt(ssa.SubFlags64(0, 1))
  5156  		return true
  5157  	}
  5158  	// match: (CMPWconst (MOVHUreg _) [c])
  5159  	// cond: 0xffff < c
  5160  	// result: (FlagConstant [ssa.SubFlags64(0,1)])
  5161  	for {
  5162  		c := ssa.AuxIntToInt32(v.AuxInt)
  5163  		if v_0.Op != ssaop.OpARM64MOVHUreg || !(0xffff < c) {
  5164  			break
  5165  		}
  5166  		v.Reset(ssaop.OpARM64FlagConstant)
  5167  		v.AuxInt = ssa.FlagConstantToAuxInt(ssa.SubFlags64(0, 1))
  5168  		return true
  5169  	}
  5170  	return false
  5171  }
  5172  func rewriteValue_OpARM64CMPconst(v *ssa.Value) bool {
  5173  	v_0 := v.Args[0]
  5174  	// match: (CMPconst [c] y)
  5175  	// cond: c < 0 && c != -1<<63
  5176  	// result: (CMNconst [-c] y)
  5177  	for {
  5178  		c := ssa.AuxIntToInt64(v.AuxInt)
  5179  		y := v_0
  5180  		if !(c < 0 && c != -1<<63) {
  5181  			break
  5182  		}
  5183  		v.Reset(ssaop.OpARM64CMNconst)
  5184  		v.AuxInt = ssa.Int64ToAuxInt(-c)
  5185  		v.AddArg(y)
  5186  		return true
  5187  	}
  5188  	// match: (CMPconst (MOVDconst [x]) [y])
  5189  	// result: (FlagConstant [ssa.SubFlags64(x,y)])
  5190  	for {
  5191  		y := ssa.AuxIntToInt64(v.AuxInt)
  5192  		if v_0.Op != ssaop.OpARM64MOVDconst {
  5193  			break
  5194  		}
  5195  		x := ssa.AuxIntToInt64(v_0.AuxInt)
  5196  		v.Reset(ssaop.OpARM64FlagConstant)
  5197  		v.AuxInt = ssa.FlagConstantToAuxInt(ssa.SubFlags64(x, y))
  5198  		return true
  5199  	}
  5200  	// match: (CMPconst (MOVBUreg _) [c])
  5201  	// cond: 0xff < c
  5202  	// result: (FlagConstant [ssa.SubFlags64(0,1)])
  5203  	for {
  5204  		c := ssa.AuxIntToInt64(v.AuxInt)
  5205  		if v_0.Op != ssaop.OpARM64MOVBUreg || !(0xff < c) {
  5206  			break
  5207  		}
  5208  		v.Reset(ssaop.OpARM64FlagConstant)
  5209  		v.AuxInt = ssa.FlagConstantToAuxInt(ssa.SubFlags64(0, 1))
  5210  		return true
  5211  	}
  5212  	// match: (CMPconst (MOVHUreg _) [c])
  5213  	// cond: 0xffff < c
  5214  	// result: (FlagConstant [ssa.SubFlags64(0,1)])
  5215  	for {
  5216  		c := ssa.AuxIntToInt64(v.AuxInt)
  5217  		if v_0.Op != ssaop.OpARM64MOVHUreg || !(0xffff < c) {
  5218  			break
  5219  		}
  5220  		v.Reset(ssaop.OpARM64FlagConstant)
  5221  		v.AuxInt = ssa.FlagConstantToAuxInt(ssa.SubFlags64(0, 1))
  5222  		return true
  5223  	}
  5224  	// match: (CMPconst (MOVWUreg _) [c])
  5225  	// cond: 0xffffffff < c
  5226  	// result: (FlagConstant [ssa.SubFlags64(0,1)])
  5227  	for {
  5228  		c := ssa.AuxIntToInt64(v.AuxInt)
  5229  		if v_0.Op != ssaop.OpARM64MOVWUreg || !(0xffffffff < c) {
  5230  			break
  5231  		}
  5232  		v.Reset(ssaop.OpARM64FlagConstant)
  5233  		v.AuxInt = ssa.FlagConstantToAuxInt(ssa.SubFlags64(0, 1))
  5234  		return true
  5235  	}
  5236  	// match: (CMPconst (ANDconst _ [m]) [n])
  5237  	// cond: 0 <= m && m < n
  5238  	// result: (FlagConstant [ssa.SubFlags64(0,1)])
  5239  	for {
  5240  		n := ssa.AuxIntToInt64(v.AuxInt)
  5241  		if v_0.Op != ssaop.OpARM64ANDconst {
  5242  			break
  5243  		}
  5244  		m := ssa.AuxIntToInt64(v_0.AuxInt)
  5245  		if !(0 <= m && m < n) {
  5246  			break
  5247  		}
  5248  		v.Reset(ssaop.OpARM64FlagConstant)
  5249  		v.AuxInt = ssa.FlagConstantToAuxInt(ssa.SubFlags64(0, 1))
  5250  		return true
  5251  	}
  5252  	// match: (CMPconst (SRLconst _ [c]) [n])
  5253  	// cond: 0 <= n && 0 < c && c <= 63 && (1<<uint64(64-c)) <= uint64(n)
  5254  	// result: (FlagConstant [ssa.SubFlags64(0,1)])
  5255  	for {
  5256  		n := ssa.AuxIntToInt64(v.AuxInt)
  5257  		if v_0.Op != ssaop.OpARM64SRLconst {
  5258  			break
  5259  		}
  5260  		c := ssa.AuxIntToInt64(v_0.AuxInt)
  5261  		if !(0 <= n && 0 < c && c <= 63 && (1<<uint64(64-c)) <= uint64(n)) {
  5262  			break
  5263  		}
  5264  		v.Reset(ssaop.OpARM64FlagConstant)
  5265  		v.AuxInt = ssa.FlagConstantToAuxInt(ssa.SubFlags64(0, 1))
  5266  		return true
  5267  	}
  5268  	return false
  5269  }
  5270  func rewriteValue_OpARM64CMPshiftLL(v *ssa.Value) bool {
  5271  	v_1 := v.Args[1]
  5272  	v_0 := v.Args[0]
  5273  	b := v.Block
  5274  	// match: (CMPshiftLL (MOVDconst [c]) x [d])
  5275  	// result: (InvertFlags (CMPconst [c] (SLLconst <x.Type> x [d])))
  5276  	for {
  5277  		d := ssa.AuxIntToInt64(v.AuxInt)
  5278  		if v_0.Op != ssaop.OpARM64MOVDconst {
  5279  			break
  5280  		}
  5281  		c := ssa.AuxIntToInt64(v_0.AuxInt)
  5282  		x := v_1
  5283  		v.Reset(ssaop.OpARM64InvertFlags)
  5284  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMPconst, types.TypeFlags)
  5285  		v0.AuxInt = ssa.Int64ToAuxInt(c)
  5286  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64SLLconst, x.Type)
  5287  		v1.AuxInt = ssa.Int64ToAuxInt(d)
  5288  		v1.AddArg(x)
  5289  		v0.AddArg(v1)
  5290  		v.AddArg(v0)
  5291  		return true
  5292  	}
  5293  	// match: (CMPshiftLL x (MOVDconst [c]) [d])
  5294  	// result: (CMPconst x [int64(uint64(c)<<uint64(d))])
  5295  	for {
  5296  		d := ssa.AuxIntToInt64(v.AuxInt)
  5297  		x := v_0
  5298  		if v_1.Op != ssaop.OpARM64MOVDconst {
  5299  			break
  5300  		}
  5301  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  5302  		v.Reset(ssaop.OpARM64CMPconst)
  5303  		v.AuxInt = ssa.Int64ToAuxInt(int64(uint64(c) << uint64(d)))
  5304  		v.AddArg(x)
  5305  		return true
  5306  	}
  5307  	return false
  5308  }
  5309  func rewriteValue_OpARM64CMPshiftRA(v *ssa.Value) bool {
  5310  	v_1 := v.Args[1]
  5311  	v_0 := v.Args[0]
  5312  	b := v.Block
  5313  	// match: (CMPshiftRA (MOVDconst [c]) x [d])
  5314  	// result: (InvertFlags (CMPconst [c] (SRAconst <x.Type> x [d])))
  5315  	for {
  5316  		d := ssa.AuxIntToInt64(v.AuxInt)
  5317  		if v_0.Op != ssaop.OpARM64MOVDconst {
  5318  			break
  5319  		}
  5320  		c := ssa.AuxIntToInt64(v_0.AuxInt)
  5321  		x := v_1
  5322  		v.Reset(ssaop.OpARM64InvertFlags)
  5323  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMPconst, types.TypeFlags)
  5324  		v0.AuxInt = ssa.Int64ToAuxInt(c)
  5325  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64SRAconst, x.Type)
  5326  		v1.AuxInt = ssa.Int64ToAuxInt(d)
  5327  		v1.AddArg(x)
  5328  		v0.AddArg(v1)
  5329  		v.AddArg(v0)
  5330  		return true
  5331  	}
  5332  	// match: (CMPshiftRA x (MOVDconst [c]) [d])
  5333  	// result: (CMPconst x [c>>uint64(d)])
  5334  	for {
  5335  		d := ssa.AuxIntToInt64(v.AuxInt)
  5336  		x := v_0
  5337  		if v_1.Op != ssaop.OpARM64MOVDconst {
  5338  			break
  5339  		}
  5340  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  5341  		v.Reset(ssaop.OpARM64CMPconst)
  5342  		v.AuxInt = ssa.Int64ToAuxInt(c >> uint64(d))
  5343  		v.AddArg(x)
  5344  		return true
  5345  	}
  5346  	return false
  5347  }
  5348  func rewriteValue_OpARM64CMPshiftRL(v *ssa.Value) bool {
  5349  	v_1 := v.Args[1]
  5350  	v_0 := v.Args[0]
  5351  	b := v.Block
  5352  	// match: (CMPshiftRL (MOVDconst [c]) x [d])
  5353  	// result: (InvertFlags (CMPconst [c] (SRLconst <x.Type> x [d])))
  5354  	for {
  5355  		d := ssa.AuxIntToInt64(v.AuxInt)
  5356  		if v_0.Op != ssaop.OpARM64MOVDconst {
  5357  			break
  5358  		}
  5359  		c := ssa.AuxIntToInt64(v_0.AuxInt)
  5360  		x := v_1
  5361  		v.Reset(ssaop.OpARM64InvertFlags)
  5362  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMPconst, types.TypeFlags)
  5363  		v0.AuxInt = ssa.Int64ToAuxInt(c)
  5364  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64SRLconst, x.Type)
  5365  		v1.AuxInt = ssa.Int64ToAuxInt(d)
  5366  		v1.AddArg(x)
  5367  		v0.AddArg(v1)
  5368  		v.AddArg(v0)
  5369  		return true
  5370  	}
  5371  	// match: (CMPshiftRL x (MOVDconst [c]) [d])
  5372  	// result: (CMPconst x [int64(uint64(c)>>uint64(d))])
  5373  	for {
  5374  		d := ssa.AuxIntToInt64(v.AuxInt)
  5375  		x := v_0
  5376  		if v_1.Op != ssaop.OpARM64MOVDconst {
  5377  			break
  5378  		}
  5379  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  5380  		v.Reset(ssaop.OpARM64CMPconst)
  5381  		v.AuxInt = ssa.Int64ToAuxInt(int64(uint64(c) >> uint64(d)))
  5382  		v.AddArg(x)
  5383  		return true
  5384  	}
  5385  	return false
  5386  }
  5387  func rewriteValue_OpARM64CSEL(v *ssa.Value) bool {
  5388  	v_2 := v.Args[2]
  5389  	v_1 := v.Args[1]
  5390  	v_0 := v.Args[0]
  5391  	// match: (CSEL [cc] (MOVDconst [-1]) (MOVDconst [0]) flag)
  5392  	// result: (CSETM [cc] flag)
  5393  	for {
  5394  		cc := ssa.AuxIntToOp(v.AuxInt)
  5395  		if v_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0.AuxInt) != -1 || v_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_1.AuxInt) != 0 {
  5396  			break
  5397  		}
  5398  		flag := v_2
  5399  		v.Reset(ssaop.OpARM64CSETM)
  5400  		v.AuxInt = ssa.OpToAuxInt(cc)
  5401  		v.AddArg(flag)
  5402  		return true
  5403  	}
  5404  	// match: (CSEL [cc] (MOVDconst [0]) (MOVDconst [-1]) flag)
  5405  	// result: (CSETM [arm64Negate(cc)] flag)
  5406  	for {
  5407  		cc := ssa.AuxIntToOp(v.AuxInt)
  5408  		if v_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0.AuxInt) != 0 || v_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_1.AuxInt) != -1 {
  5409  			break
  5410  		}
  5411  		flag := v_2
  5412  		v.Reset(ssaop.OpARM64CSETM)
  5413  		v.AuxInt = ssa.OpToAuxInt(arm64Negate(cc))
  5414  		v.AddArg(flag)
  5415  		return true
  5416  	}
  5417  	// match: (CSEL [cc] x (MOVDconst [0]) flag)
  5418  	// result: (CSEL0 [cc] x flag)
  5419  	for {
  5420  		cc := ssa.AuxIntToOp(v.AuxInt)
  5421  		x := v_0
  5422  		if v_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_1.AuxInt) != 0 {
  5423  			break
  5424  		}
  5425  		flag := v_2
  5426  		v.Reset(ssaop.OpARM64CSEL0)
  5427  		v.AuxInt = ssa.OpToAuxInt(cc)
  5428  		v.AddArg2(x, flag)
  5429  		return true
  5430  	}
  5431  	// match: (CSEL [cc] (MOVDconst [0]) y flag)
  5432  	// result: (CSEL0 [arm64Negate(cc)] y flag)
  5433  	for {
  5434  		cc := ssa.AuxIntToOp(v.AuxInt)
  5435  		if v_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
  5436  			break
  5437  		}
  5438  		y := v_1
  5439  		flag := v_2
  5440  		v.Reset(ssaop.OpARM64CSEL0)
  5441  		v.AuxInt = ssa.OpToAuxInt(arm64Negate(cc))
  5442  		v.AddArg2(y, flag)
  5443  		return true
  5444  	}
  5445  	// match: (CSEL [cc] x (ADDconst [1] a) flag)
  5446  	// result: (CSINC [cc] x a flag)
  5447  	for {
  5448  		cc := ssa.AuxIntToOp(v.AuxInt)
  5449  		x := v_0
  5450  		if v_1.Op != ssaop.OpARM64ADDconst || ssa.AuxIntToInt64(v_1.AuxInt) != 1 {
  5451  			break
  5452  		}
  5453  		a := v_1.Args[0]
  5454  		flag := v_2
  5455  		v.Reset(ssaop.OpARM64CSINC)
  5456  		v.AuxInt = ssa.OpToAuxInt(cc)
  5457  		v.AddArg3(x, a, flag)
  5458  		return true
  5459  	}
  5460  	// match: (CSEL [cc] (ADDconst [1] a) x flag)
  5461  	// result: (CSINC [arm64Negate(cc)] x a flag)
  5462  	for {
  5463  		cc := ssa.AuxIntToOp(v.AuxInt)
  5464  		if v_0.Op != ssaop.OpARM64ADDconst || ssa.AuxIntToInt64(v_0.AuxInt) != 1 {
  5465  			break
  5466  		}
  5467  		a := v_0.Args[0]
  5468  		x := v_1
  5469  		flag := v_2
  5470  		v.Reset(ssaop.OpARM64CSINC)
  5471  		v.AuxInt = ssa.OpToAuxInt(arm64Negate(cc))
  5472  		v.AddArg3(x, a, flag)
  5473  		return true
  5474  	}
  5475  	// match: (CSEL [cc] x (MVN a) flag)
  5476  	// result: (CSINV [cc] x a flag)
  5477  	for {
  5478  		cc := ssa.AuxIntToOp(v.AuxInt)
  5479  		x := v_0
  5480  		if v_1.Op != ssaop.OpARM64MVN {
  5481  			break
  5482  		}
  5483  		a := v_1.Args[0]
  5484  		flag := v_2
  5485  		v.Reset(ssaop.OpARM64CSINV)
  5486  		v.AuxInt = ssa.OpToAuxInt(cc)
  5487  		v.AddArg3(x, a, flag)
  5488  		return true
  5489  	}
  5490  	// match: (CSEL [cc] (MVN a) x flag)
  5491  	// result: (CSINV [arm64Negate(cc)] x a flag)
  5492  	for {
  5493  		cc := ssa.AuxIntToOp(v.AuxInt)
  5494  		if v_0.Op != ssaop.OpARM64MVN {
  5495  			break
  5496  		}
  5497  		a := v_0.Args[0]
  5498  		x := v_1
  5499  		flag := v_2
  5500  		v.Reset(ssaop.OpARM64CSINV)
  5501  		v.AuxInt = ssa.OpToAuxInt(arm64Negate(cc))
  5502  		v.AddArg3(x, a, flag)
  5503  		return true
  5504  	}
  5505  	// match: (CSEL [cc] x (NEG a) flag)
  5506  	// result: (CSNEG [cc] x a flag)
  5507  	for {
  5508  		cc := ssa.AuxIntToOp(v.AuxInt)
  5509  		x := v_0
  5510  		if v_1.Op != ssaop.OpARM64NEG {
  5511  			break
  5512  		}
  5513  		a := v_1.Args[0]
  5514  		flag := v_2
  5515  		v.Reset(ssaop.OpARM64CSNEG)
  5516  		v.AuxInt = ssa.OpToAuxInt(cc)
  5517  		v.AddArg3(x, a, flag)
  5518  		return true
  5519  	}
  5520  	// match: (CSEL [cc] (NEG a) x flag)
  5521  	// result: (CSNEG [arm64Negate(cc)] x a flag)
  5522  	for {
  5523  		cc := ssa.AuxIntToOp(v.AuxInt)
  5524  		if v_0.Op != ssaop.OpARM64NEG {
  5525  			break
  5526  		}
  5527  		a := v_0.Args[0]
  5528  		x := v_1
  5529  		flag := v_2
  5530  		v.Reset(ssaop.OpARM64CSNEG)
  5531  		v.AuxInt = ssa.OpToAuxInt(arm64Negate(cc))
  5532  		v.AddArg3(x, a, flag)
  5533  		return true
  5534  	}
  5535  	// match: (CSEL [cc] x y (InvertFlags cmp))
  5536  	// result: (CSEL [arm64Invert(cc)] x y cmp)
  5537  	for {
  5538  		cc := ssa.AuxIntToOp(v.AuxInt)
  5539  		x := v_0
  5540  		y := v_1
  5541  		if v_2.Op != ssaop.OpARM64InvertFlags {
  5542  			break
  5543  		}
  5544  		cmp := v_2.Args[0]
  5545  		v.Reset(ssaop.OpARM64CSEL)
  5546  		v.AuxInt = ssa.OpToAuxInt(arm64Invert(cc))
  5547  		v.AddArg3(x, y, cmp)
  5548  		return true
  5549  	}
  5550  	// match: (CSEL [cc] x _ flag)
  5551  	// cond: ccARM64Eval(cc, flag) > 0
  5552  	// result: x
  5553  	for {
  5554  		cc := ssa.AuxIntToOp(v.AuxInt)
  5555  		x := v_0
  5556  		flag := v_2
  5557  		if !(ccARM64Eval(cc, flag) > 0) {
  5558  			break
  5559  		}
  5560  		v.CopyOf(x)
  5561  		return true
  5562  	}
  5563  	// match: (CSEL [cc] _ y flag)
  5564  	// cond: ccARM64Eval(cc, flag) < 0
  5565  	// result: y
  5566  	for {
  5567  		cc := ssa.AuxIntToOp(v.AuxInt)
  5568  		y := v_1
  5569  		flag := v_2
  5570  		if !(ccARM64Eval(cc, flag) < 0) {
  5571  			break
  5572  		}
  5573  		v.CopyOf(y)
  5574  		return true
  5575  	}
  5576  	// match: (CSEL [cc] x y (CMPWconst [0] boolval))
  5577  	// cond: cc == ssaop.OpARM64NotEqual && ssa.FlagArg(boolval) != nil
  5578  	// result: (CSEL [boolval.Op] x y ssa.FlagArg(boolval))
  5579  	for {
  5580  		cc := ssa.AuxIntToOp(v.AuxInt)
  5581  		x := v_0
  5582  		y := v_1
  5583  		if v_2.Op != ssaop.OpARM64CMPWconst || ssa.AuxIntToInt32(v_2.AuxInt) != 0 {
  5584  			break
  5585  		}
  5586  		boolval := v_2.Args[0]
  5587  		if !(cc == ssaop.OpARM64NotEqual && ssa.FlagArg(boolval) != nil) {
  5588  			break
  5589  		}
  5590  		v.Reset(ssaop.OpARM64CSEL)
  5591  		v.AuxInt = ssa.OpToAuxInt(boolval.Op)
  5592  		v.AddArg3(x, y, ssa.FlagArg(boolval))
  5593  		return true
  5594  	}
  5595  	// match: (CSEL [cc] x y (CMPWconst [0] boolval))
  5596  	// cond: cc == ssaop.OpARM64Equal && ssa.FlagArg(boolval) != nil
  5597  	// result: (CSEL [arm64Negate(boolval.Op)] x y ssa.FlagArg(boolval))
  5598  	for {
  5599  		cc := ssa.AuxIntToOp(v.AuxInt)
  5600  		x := v_0
  5601  		y := v_1
  5602  		if v_2.Op != ssaop.OpARM64CMPWconst || ssa.AuxIntToInt32(v_2.AuxInt) != 0 {
  5603  			break
  5604  		}
  5605  		boolval := v_2.Args[0]
  5606  		if !(cc == ssaop.OpARM64Equal && ssa.FlagArg(boolval) != nil) {
  5607  			break
  5608  		}
  5609  		v.Reset(ssaop.OpARM64CSEL)
  5610  		v.AuxInt = ssa.OpToAuxInt(arm64Negate(boolval.Op))
  5611  		v.AddArg3(x, y, ssa.FlagArg(boolval))
  5612  		return true
  5613  	}
  5614  	return false
  5615  }
  5616  func rewriteValue_OpARM64CSEL0(v *ssa.Value) bool {
  5617  	v_1 := v.Args[1]
  5618  	v_0 := v.Args[0]
  5619  	// match: (CSEL0 [cc] x (InvertFlags cmp))
  5620  	// result: (CSEL0 [arm64Invert(cc)] x cmp)
  5621  	for {
  5622  		cc := ssa.AuxIntToOp(v.AuxInt)
  5623  		x := v_0
  5624  		if v_1.Op != ssaop.OpARM64InvertFlags {
  5625  			break
  5626  		}
  5627  		cmp := v_1.Args[0]
  5628  		v.Reset(ssaop.OpARM64CSEL0)
  5629  		v.AuxInt = ssa.OpToAuxInt(arm64Invert(cc))
  5630  		v.AddArg2(x, cmp)
  5631  		return true
  5632  	}
  5633  	// match: (CSEL0 [cc] x flag)
  5634  	// cond: ccARM64Eval(cc, flag) > 0
  5635  	// result: x
  5636  	for {
  5637  		cc := ssa.AuxIntToOp(v.AuxInt)
  5638  		x := v_0
  5639  		flag := v_1
  5640  		if !(ccARM64Eval(cc, flag) > 0) {
  5641  			break
  5642  		}
  5643  		v.CopyOf(x)
  5644  		return true
  5645  	}
  5646  	// match: (CSEL0 [cc] _ flag)
  5647  	// cond: ccARM64Eval(cc, flag) < 0
  5648  	// result: (MOVDconst [0])
  5649  	for {
  5650  		cc := ssa.AuxIntToOp(v.AuxInt)
  5651  		flag := v_1
  5652  		if !(ccARM64Eval(cc, flag) < 0) {
  5653  			break
  5654  		}
  5655  		v.Reset(ssaop.OpARM64MOVDconst)
  5656  		v.AuxInt = ssa.Int64ToAuxInt(0)
  5657  		return true
  5658  	}
  5659  	// match: (CSEL0 [cc] x (CMPWconst [0] boolval))
  5660  	// cond: cc == ssaop.OpARM64NotEqual && ssa.FlagArg(boolval) != nil
  5661  	// result: (CSEL0 [boolval.Op] x ssa.FlagArg(boolval))
  5662  	for {
  5663  		cc := ssa.AuxIntToOp(v.AuxInt)
  5664  		x := v_0
  5665  		if v_1.Op != ssaop.OpARM64CMPWconst || ssa.AuxIntToInt32(v_1.AuxInt) != 0 {
  5666  			break
  5667  		}
  5668  		boolval := v_1.Args[0]
  5669  		if !(cc == ssaop.OpARM64NotEqual && ssa.FlagArg(boolval) != nil) {
  5670  			break
  5671  		}
  5672  		v.Reset(ssaop.OpARM64CSEL0)
  5673  		v.AuxInt = ssa.OpToAuxInt(boolval.Op)
  5674  		v.AddArg2(x, ssa.FlagArg(boolval))
  5675  		return true
  5676  	}
  5677  	// match: (CSEL0 [cc] x (CMPWconst [0] boolval))
  5678  	// cond: cc == ssaop.OpARM64Equal && ssa.FlagArg(boolval) != nil
  5679  	// result: (CSEL0 [arm64Negate(boolval.Op)] x ssa.FlagArg(boolval))
  5680  	for {
  5681  		cc := ssa.AuxIntToOp(v.AuxInt)
  5682  		x := v_0
  5683  		if v_1.Op != ssaop.OpARM64CMPWconst || ssa.AuxIntToInt32(v_1.AuxInt) != 0 {
  5684  			break
  5685  		}
  5686  		boolval := v_1.Args[0]
  5687  		if !(cc == ssaop.OpARM64Equal && ssa.FlagArg(boolval) != nil) {
  5688  			break
  5689  		}
  5690  		v.Reset(ssaop.OpARM64CSEL0)
  5691  		v.AuxInt = ssa.OpToAuxInt(arm64Negate(boolval.Op))
  5692  		v.AddArg2(x, ssa.FlagArg(boolval))
  5693  		return true
  5694  	}
  5695  	return false
  5696  }
  5697  func rewriteValue_OpARM64CSETM(v *ssa.Value) bool {
  5698  	v_0 := v.Args[0]
  5699  	// match: (CSETM [cc] (InvertFlags cmp))
  5700  	// result: (CSETM [arm64Invert(cc)] cmp)
  5701  	for {
  5702  		cc := ssa.AuxIntToOp(v.AuxInt)
  5703  		if v_0.Op != ssaop.OpARM64InvertFlags {
  5704  			break
  5705  		}
  5706  		cmp := v_0.Args[0]
  5707  		v.Reset(ssaop.OpARM64CSETM)
  5708  		v.AuxInt = ssa.OpToAuxInt(arm64Invert(cc))
  5709  		v.AddArg(cmp)
  5710  		return true
  5711  	}
  5712  	// match: (CSETM [cc] flag)
  5713  	// cond: ccARM64Eval(cc, flag) > 0
  5714  	// result: (MOVDconst [-1])
  5715  	for {
  5716  		cc := ssa.AuxIntToOp(v.AuxInt)
  5717  		flag := v_0
  5718  		if !(ccARM64Eval(cc, flag) > 0) {
  5719  			break
  5720  		}
  5721  		v.Reset(ssaop.OpARM64MOVDconst)
  5722  		v.AuxInt = ssa.Int64ToAuxInt(-1)
  5723  		return true
  5724  	}
  5725  	// match: (CSETM [cc] flag)
  5726  	// cond: ccARM64Eval(cc, flag) < 0
  5727  	// result: (MOVDconst [0])
  5728  	for {
  5729  		cc := ssa.AuxIntToOp(v.AuxInt)
  5730  		flag := v_0
  5731  		if !(ccARM64Eval(cc, flag) < 0) {
  5732  			break
  5733  		}
  5734  		v.Reset(ssaop.OpARM64MOVDconst)
  5735  		v.AuxInt = ssa.Int64ToAuxInt(0)
  5736  		return true
  5737  	}
  5738  	return false
  5739  }
  5740  func rewriteValue_OpARM64CSINC(v *ssa.Value) bool {
  5741  	v_2 := v.Args[2]
  5742  	v_1 := v.Args[1]
  5743  	v_0 := v.Args[0]
  5744  	// match: (CSINC [cc] x y (InvertFlags cmp))
  5745  	// result: (CSINC [arm64Invert(cc)] x y cmp)
  5746  	for {
  5747  		cc := ssa.AuxIntToOp(v.AuxInt)
  5748  		x := v_0
  5749  		y := v_1
  5750  		if v_2.Op != ssaop.OpARM64InvertFlags {
  5751  			break
  5752  		}
  5753  		cmp := v_2.Args[0]
  5754  		v.Reset(ssaop.OpARM64CSINC)
  5755  		v.AuxInt = ssa.OpToAuxInt(arm64Invert(cc))
  5756  		v.AddArg3(x, y, cmp)
  5757  		return true
  5758  	}
  5759  	// match: (CSINC [cc] x _ flag)
  5760  	// cond: ccARM64Eval(cc, flag) > 0
  5761  	// result: x
  5762  	for {
  5763  		cc := ssa.AuxIntToOp(v.AuxInt)
  5764  		x := v_0
  5765  		flag := v_2
  5766  		if !(ccARM64Eval(cc, flag) > 0) {
  5767  			break
  5768  		}
  5769  		v.CopyOf(x)
  5770  		return true
  5771  	}
  5772  	// match: (CSINC [cc] _ y flag)
  5773  	// cond: ccARM64Eval(cc, flag) < 0
  5774  	// result: (ADDconst [1] y)
  5775  	for {
  5776  		cc := ssa.AuxIntToOp(v.AuxInt)
  5777  		y := v_1
  5778  		flag := v_2
  5779  		if !(ccARM64Eval(cc, flag) < 0) {
  5780  			break
  5781  		}
  5782  		v.Reset(ssaop.OpARM64ADDconst)
  5783  		v.AuxInt = ssa.Int64ToAuxInt(1)
  5784  		v.AddArg(y)
  5785  		return true
  5786  	}
  5787  	return false
  5788  }
  5789  func rewriteValue_OpARM64CSINV(v *ssa.Value) bool {
  5790  	v_2 := v.Args[2]
  5791  	v_1 := v.Args[1]
  5792  	v_0 := v.Args[0]
  5793  	// match: (CSINV [cc] x y (InvertFlags cmp))
  5794  	// result: (CSINV [arm64Invert(cc)] x y cmp)
  5795  	for {
  5796  		cc := ssa.AuxIntToOp(v.AuxInt)
  5797  		x := v_0
  5798  		y := v_1
  5799  		if v_2.Op != ssaop.OpARM64InvertFlags {
  5800  			break
  5801  		}
  5802  		cmp := v_2.Args[0]
  5803  		v.Reset(ssaop.OpARM64CSINV)
  5804  		v.AuxInt = ssa.OpToAuxInt(arm64Invert(cc))
  5805  		v.AddArg3(x, y, cmp)
  5806  		return true
  5807  	}
  5808  	// match: (CSINV [cc] x _ flag)
  5809  	// cond: ccARM64Eval(cc, flag) > 0
  5810  	// result: x
  5811  	for {
  5812  		cc := ssa.AuxIntToOp(v.AuxInt)
  5813  		x := v_0
  5814  		flag := v_2
  5815  		if !(ccARM64Eval(cc, flag) > 0) {
  5816  			break
  5817  		}
  5818  		v.CopyOf(x)
  5819  		return true
  5820  	}
  5821  	// match: (CSINV [cc] _ y flag)
  5822  	// cond: ccARM64Eval(cc, flag) < 0
  5823  	// result: (Not y)
  5824  	for {
  5825  		cc := ssa.AuxIntToOp(v.AuxInt)
  5826  		y := v_1
  5827  		flag := v_2
  5828  		if !(ccARM64Eval(cc, flag) < 0) {
  5829  			break
  5830  		}
  5831  		v.Reset(ssaop.OpNot)
  5832  		v.AddArg(y)
  5833  		return true
  5834  	}
  5835  	return false
  5836  }
  5837  func rewriteValue_OpARM64CSNEG(v *ssa.Value) bool {
  5838  	v_2 := v.Args[2]
  5839  	v_1 := v.Args[1]
  5840  	v_0 := v.Args[0]
  5841  	// match: (CSNEG [cc] x y (InvertFlags cmp))
  5842  	// result: (CSNEG [arm64Invert(cc)] x y cmp)
  5843  	for {
  5844  		cc := ssa.AuxIntToOp(v.AuxInt)
  5845  		x := v_0
  5846  		y := v_1
  5847  		if v_2.Op != ssaop.OpARM64InvertFlags {
  5848  			break
  5849  		}
  5850  		cmp := v_2.Args[0]
  5851  		v.Reset(ssaop.OpARM64CSNEG)
  5852  		v.AuxInt = ssa.OpToAuxInt(arm64Invert(cc))
  5853  		v.AddArg3(x, y, cmp)
  5854  		return true
  5855  	}
  5856  	// match: (CSNEG [cc] x _ flag)
  5857  	// cond: ccARM64Eval(cc, flag) > 0
  5858  	// result: x
  5859  	for {
  5860  		cc := ssa.AuxIntToOp(v.AuxInt)
  5861  		x := v_0
  5862  		flag := v_2
  5863  		if !(ccARM64Eval(cc, flag) > 0) {
  5864  			break
  5865  		}
  5866  		v.CopyOf(x)
  5867  		return true
  5868  	}
  5869  	// match: (CSNEG [cc] _ y flag)
  5870  	// cond: ccARM64Eval(cc, flag) < 0
  5871  	// result: (NEG y)
  5872  	for {
  5873  		cc := ssa.AuxIntToOp(v.AuxInt)
  5874  		y := v_1
  5875  		flag := v_2
  5876  		if !(ccARM64Eval(cc, flag) < 0) {
  5877  			break
  5878  		}
  5879  		v.Reset(ssaop.OpARM64NEG)
  5880  		v.AddArg(y)
  5881  		return true
  5882  	}
  5883  	return false
  5884  }
  5885  func rewriteValue_OpARM64DIV(v *ssa.Value) bool {
  5886  	v_1 := v.Args[1]
  5887  	v_0 := v.Args[0]
  5888  	// match: (DIV (MOVDconst [c]) (MOVDconst [d]))
  5889  	// cond: d != 0
  5890  	// result: (MOVDconst [c/d])
  5891  	for {
  5892  		if v_0.Op != ssaop.OpARM64MOVDconst {
  5893  			break
  5894  		}
  5895  		c := ssa.AuxIntToInt64(v_0.AuxInt)
  5896  		if v_1.Op != ssaop.OpARM64MOVDconst {
  5897  			break
  5898  		}
  5899  		d := ssa.AuxIntToInt64(v_1.AuxInt)
  5900  		if !(d != 0) {
  5901  			break
  5902  		}
  5903  		v.Reset(ssaop.OpARM64MOVDconst)
  5904  		v.AuxInt = ssa.Int64ToAuxInt(c / d)
  5905  		return true
  5906  	}
  5907  	return false
  5908  }
  5909  func rewriteValue_OpARM64DIVW(v *ssa.Value) bool {
  5910  	v_1 := v.Args[1]
  5911  	v_0 := v.Args[0]
  5912  	// match: (DIVW (MOVDconst [c]) (MOVDconst [d]))
  5913  	// cond: d != 0
  5914  	// result: (MOVDconst [int64(uint32(int32(c)/int32(d)))])
  5915  	for {
  5916  		if v_0.Op != ssaop.OpARM64MOVDconst {
  5917  			break
  5918  		}
  5919  		c := ssa.AuxIntToInt64(v_0.AuxInt)
  5920  		if v_1.Op != ssaop.OpARM64MOVDconst {
  5921  			break
  5922  		}
  5923  		d := ssa.AuxIntToInt64(v_1.AuxInt)
  5924  		if !(d != 0) {
  5925  			break
  5926  		}
  5927  		v.Reset(ssaop.OpARM64MOVDconst)
  5928  		v.AuxInt = ssa.Int64ToAuxInt(int64(uint32(int32(c) / int32(d))))
  5929  		return true
  5930  	}
  5931  	return false
  5932  }
  5933  func rewriteValue_OpARM64EON(v *ssa.Value) bool {
  5934  	v_1 := v.Args[1]
  5935  	v_0 := v.Args[0]
  5936  	// match: (EON x (MOVDconst [c]))
  5937  	// result: (XORconst [^c] x)
  5938  	for {
  5939  		x := v_0
  5940  		if v_1.Op != ssaop.OpARM64MOVDconst {
  5941  			break
  5942  		}
  5943  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  5944  		v.Reset(ssaop.OpARM64XORconst)
  5945  		v.AuxInt = ssa.Int64ToAuxInt(^c)
  5946  		v.AddArg(x)
  5947  		return true
  5948  	}
  5949  	// match: (EON x x)
  5950  	// result: (MOVDconst [-1])
  5951  	for {
  5952  		x := v_0
  5953  		if x != v_1 {
  5954  			break
  5955  		}
  5956  		v.Reset(ssaop.OpARM64MOVDconst)
  5957  		v.AuxInt = ssa.Int64ToAuxInt(-1)
  5958  		return true
  5959  	}
  5960  	// match: (EON x0 x1:(SLLconst [c] y))
  5961  	// cond: ssa.ClobberIfDead(x1)
  5962  	// result: (EONshiftLL x0 y [c])
  5963  	for {
  5964  		x0 := v_0
  5965  		x1 := v_1
  5966  		if x1.Op != ssaop.OpARM64SLLconst {
  5967  			break
  5968  		}
  5969  		c := ssa.AuxIntToInt64(x1.AuxInt)
  5970  		y := x1.Args[0]
  5971  		if !(ssa.ClobberIfDead(x1)) {
  5972  			break
  5973  		}
  5974  		v.Reset(ssaop.OpARM64EONshiftLL)
  5975  		v.AuxInt = ssa.Int64ToAuxInt(c)
  5976  		v.AddArg2(x0, y)
  5977  		return true
  5978  	}
  5979  	// match: (EON x0 x1:(SRLconst [c] y))
  5980  	// cond: ssa.ClobberIfDead(x1)
  5981  	// result: (EONshiftRL x0 y [c])
  5982  	for {
  5983  		x0 := v_0
  5984  		x1 := v_1
  5985  		if x1.Op != ssaop.OpARM64SRLconst {
  5986  			break
  5987  		}
  5988  		c := ssa.AuxIntToInt64(x1.AuxInt)
  5989  		y := x1.Args[0]
  5990  		if !(ssa.ClobberIfDead(x1)) {
  5991  			break
  5992  		}
  5993  		v.Reset(ssaop.OpARM64EONshiftRL)
  5994  		v.AuxInt = ssa.Int64ToAuxInt(c)
  5995  		v.AddArg2(x0, y)
  5996  		return true
  5997  	}
  5998  	// match: (EON x0 x1:(SRAconst [c] y))
  5999  	// cond: ssa.ClobberIfDead(x1)
  6000  	// result: (EONshiftRA x0 y [c])
  6001  	for {
  6002  		x0 := v_0
  6003  		x1 := v_1
  6004  		if x1.Op != ssaop.OpARM64SRAconst {
  6005  			break
  6006  		}
  6007  		c := ssa.AuxIntToInt64(x1.AuxInt)
  6008  		y := x1.Args[0]
  6009  		if !(ssa.ClobberIfDead(x1)) {
  6010  			break
  6011  		}
  6012  		v.Reset(ssaop.OpARM64EONshiftRA)
  6013  		v.AuxInt = ssa.Int64ToAuxInt(c)
  6014  		v.AddArg2(x0, y)
  6015  		return true
  6016  	}
  6017  	// match: (EON x0 x1:(RORconst [c] y))
  6018  	// cond: ssa.ClobberIfDead(x1)
  6019  	// result: (EONshiftRO x0 y [c])
  6020  	for {
  6021  		x0 := v_0
  6022  		x1 := v_1
  6023  		if x1.Op != ssaop.OpARM64RORconst {
  6024  			break
  6025  		}
  6026  		c := ssa.AuxIntToInt64(x1.AuxInt)
  6027  		y := x1.Args[0]
  6028  		if !(ssa.ClobberIfDead(x1)) {
  6029  			break
  6030  		}
  6031  		v.Reset(ssaop.OpARM64EONshiftRO)
  6032  		v.AuxInt = ssa.Int64ToAuxInt(c)
  6033  		v.AddArg2(x0, y)
  6034  		return true
  6035  	}
  6036  	return false
  6037  }
  6038  func rewriteValue_OpARM64EONshiftLL(v *ssa.Value) bool {
  6039  	v_1 := v.Args[1]
  6040  	v_0 := v.Args[0]
  6041  	// match: (EONshiftLL x (MOVDconst [c]) [d])
  6042  	// result: (XORconst x [^int64(uint64(c)<<uint64(d))])
  6043  	for {
  6044  		d := ssa.AuxIntToInt64(v.AuxInt)
  6045  		x := v_0
  6046  		if v_1.Op != ssaop.OpARM64MOVDconst {
  6047  			break
  6048  		}
  6049  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  6050  		v.Reset(ssaop.OpARM64XORconst)
  6051  		v.AuxInt = ssa.Int64ToAuxInt(^int64(uint64(c) << uint64(d)))
  6052  		v.AddArg(x)
  6053  		return true
  6054  	}
  6055  	// match: (EONshiftLL (SLLconst x [c]) x [c])
  6056  	// result: (MOVDconst [-1])
  6057  	for {
  6058  		c := ssa.AuxIntToInt64(v.AuxInt)
  6059  		if v_0.Op != ssaop.OpARM64SLLconst || ssa.AuxIntToInt64(v_0.AuxInt) != c {
  6060  			break
  6061  		}
  6062  		x := v_0.Args[0]
  6063  		if x != v_1 {
  6064  			break
  6065  		}
  6066  		v.Reset(ssaop.OpARM64MOVDconst)
  6067  		v.AuxInt = ssa.Int64ToAuxInt(-1)
  6068  		return true
  6069  	}
  6070  	return false
  6071  }
  6072  func rewriteValue_OpARM64EONshiftRA(v *ssa.Value) bool {
  6073  	v_1 := v.Args[1]
  6074  	v_0 := v.Args[0]
  6075  	// match: (EONshiftRA x (MOVDconst [c]) [d])
  6076  	// result: (XORconst x [^(c>>uint64(d))])
  6077  	for {
  6078  		d := ssa.AuxIntToInt64(v.AuxInt)
  6079  		x := v_0
  6080  		if v_1.Op != ssaop.OpARM64MOVDconst {
  6081  			break
  6082  		}
  6083  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  6084  		v.Reset(ssaop.OpARM64XORconst)
  6085  		v.AuxInt = ssa.Int64ToAuxInt(^(c >> uint64(d)))
  6086  		v.AddArg(x)
  6087  		return true
  6088  	}
  6089  	// match: (EONshiftRA (SRAconst x [c]) x [c])
  6090  	// result: (MOVDconst [-1])
  6091  	for {
  6092  		c := ssa.AuxIntToInt64(v.AuxInt)
  6093  		if v_0.Op != ssaop.OpARM64SRAconst || ssa.AuxIntToInt64(v_0.AuxInt) != c {
  6094  			break
  6095  		}
  6096  		x := v_0.Args[0]
  6097  		if x != v_1 {
  6098  			break
  6099  		}
  6100  		v.Reset(ssaop.OpARM64MOVDconst)
  6101  		v.AuxInt = ssa.Int64ToAuxInt(-1)
  6102  		return true
  6103  	}
  6104  	return false
  6105  }
  6106  func rewriteValue_OpARM64EONshiftRL(v *ssa.Value) bool {
  6107  	v_1 := v.Args[1]
  6108  	v_0 := v.Args[0]
  6109  	// match: (EONshiftRL x (MOVDconst [c]) [d])
  6110  	// result: (XORconst x [^int64(uint64(c)>>uint64(d))])
  6111  	for {
  6112  		d := ssa.AuxIntToInt64(v.AuxInt)
  6113  		x := v_0
  6114  		if v_1.Op != ssaop.OpARM64MOVDconst {
  6115  			break
  6116  		}
  6117  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  6118  		v.Reset(ssaop.OpARM64XORconst)
  6119  		v.AuxInt = ssa.Int64ToAuxInt(^int64(uint64(c) >> uint64(d)))
  6120  		v.AddArg(x)
  6121  		return true
  6122  	}
  6123  	// match: (EONshiftRL (SRLconst x [c]) x [c])
  6124  	// result: (MOVDconst [-1])
  6125  	for {
  6126  		c := ssa.AuxIntToInt64(v.AuxInt)
  6127  		if v_0.Op != ssaop.OpARM64SRLconst || ssa.AuxIntToInt64(v_0.AuxInt) != c {
  6128  			break
  6129  		}
  6130  		x := v_0.Args[0]
  6131  		if x != v_1 {
  6132  			break
  6133  		}
  6134  		v.Reset(ssaop.OpARM64MOVDconst)
  6135  		v.AuxInt = ssa.Int64ToAuxInt(-1)
  6136  		return true
  6137  	}
  6138  	return false
  6139  }
  6140  func rewriteValue_OpARM64EONshiftRO(v *ssa.Value) bool {
  6141  	v_1 := v.Args[1]
  6142  	v_0 := v.Args[0]
  6143  	// match: (EONshiftRO x (MOVDconst [c]) [d])
  6144  	// result: (XORconst x [^rotateRight64(c, d)])
  6145  	for {
  6146  		d := ssa.AuxIntToInt64(v.AuxInt)
  6147  		x := v_0
  6148  		if v_1.Op != ssaop.OpARM64MOVDconst {
  6149  			break
  6150  		}
  6151  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  6152  		v.Reset(ssaop.OpARM64XORconst)
  6153  		v.AuxInt = ssa.Int64ToAuxInt(^rotateRight64(c, d))
  6154  		v.AddArg(x)
  6155  		return true
  6156  	}
  6157  	// match: (EONshiftRO (RORconst x [c]) x [c])
  6158  	// result: (MOVDconst [-1])
  6159  	for {
  6160  		c := ssa.AuxIntToInt64(v.AuxInt)
  6161  		if v_0.Op != ssaop.OpARM64RORconst || ssa.AuxIntToInt64(v_0.AuxInt) != c {
  6162  			break
  6163  		}
  6164  		x := v_0.Args[0]
  6165  		if x != v_1 {
  6166  			break
  6167  		}
  6168  		v.Reset(ssaop.OpARM64MOVDconst)
  6169  		v.AuxInt = ssa.Int64ToAuxInt(-1)
  6170  		return true
  6171  	}
  6172  	return false
  6173  }
  6174  func rewriteValue_OpARM64Equal(v *ssa.Value) bool {
  6175  	v_0 := v.Args[0]
  6176  	b := v.Block
  6177  	// match: (Equal (CMPconst [0] z:(AND x y)))
  6178  	// cond: z.Uses == 1
  6179  	// result: (Equal (TST x y))
  6180  	for {
  6181  		if v_0.Op != ssaop.OpARM64CMPconst || ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
  6182  			break
  6183  		}
  6184  		z := v_0.Args[0]
  6185  		if z.Op != ssaop.OpARM64AND {
  6186  			break
  6187  		}
  6188  		y := z.Args[1]
  6189  		x := z.Args[0]
  6190  		if !(z.Uses == 1) {
  6191  			break
  6192  		}
  6193  		v.Reset(ssaop.OpARM64Equal)
  6194  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64TST, types.TypeFlags)
  6195  		v0.AddArg2(x, y)
  6196  		v.AddArg(v0)
  6197  		return true
  6198  	}
  6199  	// match: (Equal (CMPWconst [0] x:(ANDconst [c] y)))
  6200  	// cond: x.Uses == 1
  6201  	// result: (Equal (TSTWconst [int32(c)] y))
  6202  	for {
  6203  		if v_0.Op != ssaop.OpARM64CMPWconst || ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
  6204  			break
  6205  		}
  6206  		x := v_0.Args[0]
  6207  		if x.Op != ssaop.OpARM64ANDconst {
  6208  			break
  6209  		}
  6210  		c := ssa.AuxIntToInt64(x.AuxInt)
  6211  		y := x.Args[0]
  6212  		if !(x.Uses == 1) {
  6213  			break
  6214  		}
  6215  		v.Reset(ssaop.OpARM64Equal)
  6216  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64TSTWconst, types.TypeFlags)
  6217  		v0.AuxInt = ssa.Int32ToAuxInt(int32(c))
  6218  		v0.AddArg(y)
  6219  		v.AddArg(v0)
  6220  		return true
  6221  	}
  6222  	// match: (Equal (CMPWconst [0] z:(AND x y)))
  6223  	// cond: z.Uses == 1
  6224  	// result: (Equal (TSTW x y))
  6225  	for {
  6226  		if v_0.Op != ssaop.OpARM64CMPWconst || ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
  6227  			break
  6228  		}
  6229  		z := v_0.Args[0]
  6230  		if z.Op != ssaop.OpARM64AND {
  6231  			break
  6232  		}
  6233  		y := z.Args[1]
  6234  		x := z.Args[0]
  6235  		if !(z.Uses == 1) {
  6236  			break
  6237  		}
  6238  		v.Reset(ssaop.OpARM64Equal)
  6239  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64TSTW, types.TypeFlags)
  6240  		v0.AddArg2(x, y)
  6241  		v.AddArg(v0)
  6242  		return true
  6243  	}
  6244  	// match: (Equal (CMPconst [0] x:(ANDconst [c] y)))
  6245  	// cond: x.Uses == 1
  6246  	// result: (Equal (TSTconst [c] y))
  6247  	for {
  6248  		if v_0.Op != ssaop.OpARM64CMPconst || ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
  6249  			break
  6250  		}
  6251  		x := v_0.Args[0]
  6252  		if x.Op != ssaop.OpARM64ANDconst {
  6253  			break
  6254  		}
  6255  		c := ssa.AuxIntToInt64(x.AuxInt)
  6256  		y := x.Args[0]
  6257  		if !(x.Uses == 1) {
  6258  			break
  6259  		}
  6260  		v.Reset(ssaop.OpARM64Equal)
  6261  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64TSTconst, types.TypeFlags)
  6262  		v0.AuxInt = ssa.Int64ToAuxInt(c)
  6263  		v0.AddArg(y)
  6264  		v.AddArg(v0)
  6265  		return true
  6266  	}
  6267  	// match: (Equal (CMP x z:(NEG y)))
  6268  	// cond: z.Uses == 1
  6269  	// result: (Equal (CMN x y))
  6270  	for {
  6271  		if v_0.Op != ssaop.OpARM64CMP {
  6272  			break
  6273  		}
  6274  		_ = v_0.Args[1]
  6275  		x := v_0.Args[0]
  6276  		z := v_0.Args[1]
  6277  		if z.Op != ssaop.OpARM64NEG {
  6278  			break
  6279  		}
  6280  		y := z.Args[0]
  6281  		if !(z.Uses == 1) {
  6282  			break
  6283  		}
  6284  		v.Reset(ssaop.OpARM64Equal)
  6285  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMN, types.TypeFlags)
  6286  		v0.AddArg2(x, y)
  6287  		v.AddArg(v0)
  6288  		return true
  6289  	}
  6290  	// match: (Equal (CMPW x z:(NEG y)))
  6291  	// cond: z.Uses == 1
  6292  	// result: (Equal (CMNW x y))
  6293  	for {
  6294  		if v_0.Op != ssaop.OpARM64CMPW {
  6295  			break
  6296  		}
  6297  		_ = v_0.Args[1]
  6298  		x := v_0.Args[0]
  6299  		z := v_0.Args[1]
  6300  		if z.Op != ssaop.OpARM64NEG {
  6301  			break
  6302  		}
  6303  		y := z.Args[0]
  6304  		if !(z.Uses == 1) {
  6305  			break
  6306  		}
  6307  		v.Reset(ssaop.OpARM64Equal)
  6308  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMNW, types.TypeFlags)
  6309  		v0.AddArg2(x, y)
  6310  		v.AddArg(v0)
  6311  		return true
  6312  	}
  6313  	// match: (Equal (CMPconst [0] x:(ADDconst [c] y)))
  6314  	// cond: x.Uses == 1
  6315  	// result: (Equal (CMNconst [c] y))
  6316  	for {
  6317  		if v_0.Op != ssaop.OpARM64CMPconst || ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
  6318  			break
  6319  		}
  6320  		x := v_0.Args[0]
  6321  		if x.Op != ssaop.OpARM64ADDconst {
  6322  			break
  6323  		}
  6324  		c := ssa.AuxIntToInt64(x.AuxInt)
  6325  		y := x.Args[0]
  6326  		if !(x.Uses == 1) {
  6327  			break
  6328  		}
  6329  		v.Reset(ssaop.OpARM64Equal)
  6330  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMNconst, types.TypeFlags)
  6331  		v0.AuxInt = ssa.Int64ToAuxInt(c)
  6332  		v0.AddArg(y)
  6333  		v.AddArg(v0)
  6334  		return true
  6335  	}
  6336  	// match: (Equal (CMPWconst [0] x:(ADDconst [c] y)))
  6337  	// cond: x.Uses == 1
  6338  	// result: (Equal (CMNWconst [int32(c)] y))
  6339  	for {
  6340  		if v_0.Op != ssaop.OpARM64CMPWconst || ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
  6341  			break
  6342  		}
  6343  		x := v_0.Args[0]
  6344  		if x.Op != ssaop.OpARM64ADDconst {
  6345  			break
  6346  		}
  6347  		c := ssa.AuxIntToInt64(x.AuxInt)
  6348  		y := x.Args[0]
  6349  		if !(x.Uses == 1) {
  6350  			break
  6351  		}
  6352  		v.Reset(ssaop.OpARM64Equal)
  6353  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMNWconst, types.TypeFlags)
  6354  		v0.AuxInt = ssa.Int32ToAuxInt(int32(c))
  6355  		v0.AddArg(y)
  6356  		v.AddArg(v0)
  6357  		return true
  6358  	}
  6359  	// match: (Equal (CMPconst [0] z:(ADD x y)))
  6360  	// cond: z.Uses == 1
  6361  	// result: (Equal (CMN x y))
  6362  	for {
  6363  		if v_0.Op != ssaop.OpARM64CMPconst || ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
  6364  			break
  6365  		}
  6366  		z := v_0.Args[0]
  6367  		if z.Op != ssaop.OpARM64ADD {
  6368  			break
  6369  		}
  6370  		y := z.Args[1]
  6371  		x := z.Args[0]
  6372  		if !(z.Uses == 1) {
  6373  			break
  6374  		}
  6375  		v.Reset(ssaop.OpARM64Equal)
  6376  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMN, types.TypeFlags)
  6377  		v0.AddArg2(x, y)
  6378  		v.AddArg(v0)
  6379  		return true
  6380  	}
  6381  	// match: (Equal (CMPWconst [0] z:(ADD x y)))
  6382  	// cond: z.Uses == 1
  6383  	// result: (Equal (CMNW x y))
  6384  	for {
  6385  		if v_0.Op != ssaop.OpARM64CMPWconst || ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
  6386  			break
  6387  		}
  6388  		z := v_0.Args[0]
  6389  		if z.Op != ssaop.OpARM64ADD {
  6390  			break
  6391  		}
  6392  		y := z.Args[1]
  6393  		x := z.Args[0]
  6394  		if !(z.Uses == 1) {
  6395  			break
  6396  		}
  6397  		v.Reset(ssaop.OpARM64Equal)
  6398  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMNW, types.TypeFlags)
  6399  		v0.AddArg2(x, y)
  6400  		v.AddArg(v0)
  6401  		return true
  6402  	}
  6403  	// match: (Equal (CMPconst [0] z:(MADD a x y)))
  6404  	// cond: z.Uses == 1
  6405  	// result: (Equal (CMN a (MUL <x.Type> x y)))
  6406  	for {
  6407  		if v_0.Op != ssaop.OpARM64CMPconst || ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
  6408  			break
  6409  		}
  6410  		z := v_0.Args[0]
  6411  		if z.Op != ssaop.OpARM64MADD {
  6412  			break
  6413  		}
  6414  		y := z.Args[2]
  6415  		a := z.Args[0]
  6416  		x := z.Args[1]
  6417  		if !(z.Uses == 1) {
  6418  			break
  6419  		}
  6420  		v.Reset(ssaop.OpARM64Equal)
  6421  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMN, types.TypeFlags)
  6422  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64MUL, x.Type)
  6423  		v1.AddArg2(x, y)
  6424  		v0.AddArg2(a, v1)
  6425  		v.AddArg(v0)
  6426  		return true
  6427  	}
  6428  	// match: (Equal (CMPWconst [0] z:(MADDW a x y)))
  6429  	// cond: z.Uses == 1
  6430  	// result: (Equal (CMNW a (MULW <x.Type> x y)))
  6431  	for {
  6432  		if v_0.Op != ssaop.OpARM64CMPWconst || ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
  6433  			break
  6434  		}
  6435  		z := v_0.Args[0]
  6436  		if z.Op != ssaop.OpARM64MADDW {
  6437  			break
  6438  		}
  6439  		y := z.Args[2]
  6440  		a := z.Args[0]
  6441  		x := z.Args[1]
  6442  		if !(z.Uses == 1) {
  6443  			break
  6444  		}
  6445  		v.Reset(ssaop.OpARM64Equal)
  6446  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMNW, types.TypeFlags)
  6447  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64MULW, x.Type)
  6448  		v1.AddArg2(x, y)
  6449  		v0.AddArg2(a, v1)
  6450  		v.AddArg(v0)
  6451  		return true
  6452  	}
  6453  	// match: (Equal (CMPconst [0] z:(MSUB a x y)))
  6454  	// cond: z.Uses == 1
  6455  	// result: (Equal (CMP a (MUL <x.Type> x y)))
  6456  	for {
  6457  		if v_0.Op != ssaop.OpARM64CMPconst || ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
  6458  			break
  6459  		}
  6460  		z := v_0.Args[0]
  6461  		if z.Op != ssaop.OpARM64MSUB {
  6462  			break
  6463  		}
  6464  		y := z.Args[2]
  6465  		a := z.Args[0]
  6466  		x := z.Args[1]
  6467  		if !(z.Uses == 1) {
  6468  			break
  6469  		}
  6470  		v.Reset(ssaop.OpARM64Equal)
  6471  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMP, types.TypeFlags)
  6472  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64MUL, x.Type)
  6473  		v1.AddArg2(x, y)
  6474  		v0.AddArg2(a, v1)
  6475  		v.AddArg(v0)
  6476  		return true
  6477  	}
  6478  	// match: (Equal (CMPWconst [0] z:(MSUBW a x y)))
  6479  	// cond: z.Uses == 1
  6480  	// result: (Equal (CMPW a (MULW <x.Type> x y)))
  6481  	for {
  6482  		if v_0.Op != ssaop.OpARM64CMPWconst || ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
  6483  			break
  6484  		}
  6485  		z := v_0.Args[0]
  6486  		if z.Op != ssaop.OpARM64MSUBW {
  6487  			break
  6488  		}
  6489  		y := z.Args[2]
  6490  		a := z.Args[0]
  6491  		x := z.Args[1]
  6492  		if !(z.Uses == 1) {
  6493  			break
  6494  		}
  6495  		v.Reset(ssaop.OpARM64Equal)
  6496  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMPW, types.TypeFlags)
  6497  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64MULW, x.Type)
  6498  		v1.AddArg2(x, y)
  6499  		v0.AddArg2(a, v1)
  6500  		v.AddArg(v0)
  6501  		return true
  6502  	}
  6503  	// match: (Equal (FlagConstant [fc]))
  6504  	// result: (MOVDconst [ssa.B2i(fc.Eq())])
  6505  	for {
  6506  		if v_0.Op != ssaop.OpARM64FlagConstant {
  6507  			break
  6508  		}
  6509  		fc := ssa.AuxIntToFlagConstant(v_0.AuxInt)
  6510  		v.Reset(ssaop.OpARM64MOVDconst)
  6511  		v.AuxInt = ssa.Int64ToAuxInt(ssa.B2i(fc.Eq()))
  6512  		return true
  6513  	}
  6514  	// match: (Equal (InvertFlags x))
  6515  	// result: (Equal x)
  6516  	for {
  6517  		if v_0.Op != ssaop.OpARM64InvertFlags {
  6518  			break
  6519  		}
  6520  		x := v_0.Args[0]
  6521  		v.Reset(ssaop.OpARM64Equal)
  6522  		v.AddArg(x)
  6523  		return true
  6524  	}
  6525  	return false
  6526  }
  6527  func rewriteValue_OpARM64FADDD(v *ssa.Value) bool {
  6528  	v_1 := v.Args[1]
  6529  	v_0 := v.Args[0]
  6530  	// match: (FADDD a (FMULD x y))
  6531  	// cond: a.Block.Func.UseFMA(v)
  6532  	// result: (FMADDD a x y)
  6533  	for {
  6534  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  6535  			a := v_0
  6536  			if v_1.Op != ssaop.OpARM64FMULD {
  6537  				continue
  6538  			}
  6539  			y := v_1.Args[1]
  6540  			x := v_1.Args[0]
  6541  			if !(a.Block.Func.UseFMA(v)) {
  6542  				continue
  6543  			}
  6544  			v.Reset(ssaop.OpARM64FMADDD)
  6545  			v.AddArg3(a, x, y)
  6546  			return true
  6547  		}
  6548  		break
  6549  	}
  6550  	// match: (FADDD a (FNMULD x y))
  6551  	// cond: a.Block.Func.UseFMA(v)
  6552  	// result: (FMSUBD a x y)
  6553  	for {
  6554  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  6555  			a := v_0
  6556  			if v_1.Op != ssaop.OpARM64FNMULD {
  6557  				continue
  6558  			}
  6559  			y := v_1.Args[1]
  6560  			x := v_1.Args[0]
  6561  			if !(a.Block.Func.UseFMA(v)) {
  6562  				continue
  6563  			}
  6564  			v.Reset(ssaop.OpARM64FMSUBD)
  6565  			v.AddArg3(a, x, y)
  6566  			return true
  6567  		}
  6568  		break
  6569  	}
  6570  	return false
  6571  }
  6572  func rewriteValue_OpARM64FADDS(v *ssa.Value) bool {
  6573  	v_1 := v.Args[1]
  6574  	v_0 := v.Args[0]
  6575  	// match: (FADDS a (FMULS x y))
  6576  	// cond: a.Block.Func.UseFMA(v)
  6577  	// result: (FMADDS a x y)
  6578  	for {
  6579  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  6580  			a := v_0
  6581  			if v_1.Op != ssaop.OpARM64FMULS {
  6582  				continue
  6583  			}
  6584  			y := v_1.Args[1]
  6585  			x := v_1.Args[0]
  6586  			if !(a.Block.Func.UseFMA(v)) {
  6587  				continue
  6588  			}
  6589  			v.Reset(ssaop.OpARM64FMADDS)
  6590  			v.AddArg3(a, x, y)
  6591  			return true
  6592  		}
  6593  		break
  6594  	}
  6595  	// match: (FADDS a (FNMULS x y))
  6596  	// cond: a.Block.Func.UseFMA(v)
  6597  	// result: (FMSUBS a x y)
  6598  	for {
  6599  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  6600  			a := v_0
  6601  			if v_1.Op != ssaop.OpARM64FNMULS {
  6602  				continue
  6603  			}
  6604  			y := v_1.Args[1]
  6605  			x := v_1.Args[0]
  6606  			if !(a.Block.Func.UseFMA(v)) {
  6607  				continue
  6608  			}
  6609  			v.Reset(ssaop.OpARM64FMSUBS)
  6610  			v.AddArg3(a, x, y)
  6611  			return true
  6612  		}
  6613  		break
  6614  	}
  6615  	return false
  6616  }
  6617  func rewriteValue_OpARM64FCMPD(v *ssa.Value) bool {
  6618  	v_1 := v.Args[1]
  6619  	v_0 := v.Args[0]
  6620  	b := v.Block
  6621  	// match: (FCMPD x (FMOVDconst [0]))
  6622  	// result: (FCMPD0 x)
  6623  	for {
  6624  		x := v_0
  6625  		if v_1.Op != ssaop.OpARM64FMOVDconst || ssa.AuxIntToFloat64(v_1.AuxInt) != 0 {
  6626  			break
  6627  		}
  6628  		v.Reset(ssaop.OpARM64FCMPD0)
  6629  		v.AddArg(x)
  6630  		return true
  6631  	}
  6632  	// match: (FCMPD (FMOVDconst [0]) x)
  6633  	// result: (InvertFlags (FCMPD0 x))
  6634  	for {
  6635  		if v_0.Op != ssaop.OpARM64FMOVDconst || ssa.AuxIntToFloat64(v_0.AuxInt) != 0 {
  6636  			break
  6637  		}
  6638  		x := v_1
  6639  		v.Reset(ssaop.OpARM64InvertFlags)
  6640  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64FCMPD0, types.TypeFlags)
  6641  		v0.AddArg(x)
  6642  		v.AddArg(v0)
  6643  		return true
  6644  	}
  6645  	return false
  6646  }
  6647  func rewriteValue_OpARM64FCMPS(v *ssa.Value) bool {
  6648  	v_1 := v.Args[1]
  6649  	v_0 := v.Args[0]
  6650  	b := v.Block
  6651  	// match: (FCMPS x (FMOVSconst [0]))
  6652  	// result: (FCMPS0 x)
  6653  	for {
  6654  		x := v_0
  6655  		if v_1.Op != ssaop.OpARM64FMOVSconst || ssa.AuxIntToFloat64(v_1.AuxInt) != 0 {
  6656  			break
  6657  		}
  6658  		v.Reset(ssaop.OpARM64FCMPS0)
  6659  		v.AddArg(x)
  6660  		return true
  6661  	}
  6662  	// match: (FCMPS (FMOVSconst [0]) x)
  6663  	// result: (InvertFlags (FCMPS0 x))
  6664  	for {
  6665  		if v_0.Op != ssaop.OpARM64FMOVSconst || ssa.AuxIntToFloat64(v_0.AuxInt) != 0 {
  6666  			break
  6667  		}
  6668  		x := v_1
  6669  		v.Reset(ssaop.OpARM64InvertFlags)
  6670  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64FCMPS0, types.TypeFlags)
  6671  		v0.AddArg(x)
  6672  		v.AddArg(v0)
  6673  		return true
  6674  	}
  6675  	return false
  6676  }
  6677  func rewriteValue_OpARM64FCSELD(v *ssa.Value) bool {
  6678  	v_2 := v.Args[2]
  6679  	v_1 := v.Args[1]
  6680  	v_0 := v.Args[0]
  6681  	// match: (FCSELD [cc] x y (InvertFlags cmp))
  6682  	// result: (FCSELD [arm64Invert(cc)] x y cmp)
  6683  	for {
  6684  		cc := ssa.AuxIntToOp(v.AuxInt)
  6685  		x := v_0
  6686  		y := v_1
  6687  		if v_2.Op != ssaop.OpARM64InvertFlags {
  6688  			break
  6689  		}
  6690  		cmp := v_2.Args[0]
  6691  		v.Reset(ssaop.OpARM64FCSELD)
  6692  		v.AuxInt = ssa.OpToAuxInt(arm64Invert(cc))
  6693  		v.AddArg3(x, y, cmp)
  6694  		return true
  6695  	}
  6696  	return false
  6697  }
  6698  func rewriteValue_OpARM64FCSELS(v *ssa.Value) bool {
  6699  	v_2 := v.Args[2]
  6700  	v_1 := v.Args[1]
  6701  	v_0 := v.Args[0]
  6702  	// match: (FCSELS [cc] x y (InvertFlags cmp))
  6703  	// result: (FCSELS [arm64Invert(cc)] x y cmp)
  6704  	for {
  6705  		cc := ssa.AuxIntToOp(v.AuxInt)
  6706  		x := v_0
  6707  		y := v_1
  6708  		if v_2.Op != ssaop.OpARM64InvertFlags {
  6709  			break
  6710  		}
  6711  		cmp := v_2.Args[0]
  6712  		v.Reset(ssaop.OpARM64FCSELS)
  6713  		v.AuxInt = ssa.OpToAuxInt(arm64Invert(cc))
  6714  		v.AddArg3(x, y, cmp)
  6715  		return true
  6716  	}
  6717  	return false
  6718  }
  6719  func rewriteValue_OpARM64FCVTDS(v *ssa.Value) bool {
  6720  	v_0 := v.Args[0]
  6721  	// match: (FCVTDS (FABSD (FCVTSD x)))
  6722  	// result: (FABSS x)
  6723  	for {
  6724  		if v_0.Op != ssaop.OpARM64FABSD {
  6725  			break
  6726  		}
  6727  		v_0_0 := v_0.Args[0]
  6728  		if v_0_0.Op != ssaop.OpARM64FCVTSD {
  6729  			break
  6730  		}
  6731  		x := v_0_0.Args[0]
  6732  		v.Reset(ssaop.OpARM64FABSS)
  6733  		v.AddArg(x)
  6734  		return true
  6735  	}
  6736  	// match: (FCVTDS (FSQRTD (FCVTSD x)))
  6737  	// result: (FSQRTS x)
  6738  	for {
  6739  		if v_0.Op != ssaop.OpARM64FSQRTD {
  6740  			break
  6741  		}
  6742  		v_0_0 := v_0.Args[0]
  6743  		if v_0_0.Op != ssaop.OpARM64FCVTSD {
  6744  			break
  6745  		}
  6746  		x := v_0_0.Args[0]
  6747  		v.Reset(ssaop.OpARM64FSQRTS)
  6748  		v.AddArg(x)
  6749  		return true
  6750  	}
  6751  	// match: (FCVTDS (FRINTPD (FCVTSD x)))
  6752  	// result: (FRINTPS x)
  6753  	for {
  6754  		if v_0.Op != ssaop.OpARM64FRINTPD {
  6755  			break
  6756  		}
  6757  		v_0_0 := v_0.Args[0]
  6758  		if v_0_0.Op != ssaop.OpARM64FCVTSD {
  6759  			break
  6760  		}
  6761  		x := v_0_0.Args[0]
  6762  		v.Reset(ssaop.OpARM64FRINTPS)
  6763  		v.AddArg(x)
  6764  		return true
  6765  	}
  6766  	// match: (FCVTDS (FRINTMD (FCVTSD x)))
  6767  	// result: (FRINTMS x)
  6768  	for {
  6769  		if v_0.Op != ssaop.OpARM64FRINTMD {
  6770  			break
  6771  		}
  6772  		v_0_0 := v_0.Args[0]
  6773  		if v_0_0.Op != ssaop.OpARM64FCVTSD {
  6774  			break
  6775  		}
  6776  		x := v_0_0.Args[0]
  6777  		v.Reset(ssaop.OpARM64FRINTMS)
  6778  		v.AddArg(x)
  6779  		return true
  6780  	}
  6781  	// match: (FCVTDS (FRINTAD (FCVTSD x)))
  6782  	// result: (FRINTAS x)
  6783  	for {
  6784  		if v_0.Op != ssaop.OpARM64FRINTAD {
  6785  			break
  6786  		}
  6787  		v_0_0 := v_0.Args[0]
  6788  		if v_0_0.Op != ssaop.OpARM64FCVTSD {
  6789  			break
  6790  		}
  6791  		x := v_0_0.Args[0]
  6792  		v.Reset(ssaop.OpARM64FRINTAS)
  6793  		v.AddArg(x)
  6794  		return true
  6795  	}
  6796  	// match: (FCVTDS (FRINTND (FCVTSD x)))
  6797  	// result: (FRINTNS x)
  6798  	for {
  6799  		if v_0.Op != ssaop.OpARM64FRINTND {
  6800  			break
  6801  		}
  6802  		v_0_0 := v_0.Args[0]
  6803  		if v_0_0.Op != ssaop.OpARM64FCVTSD {
  6804  			break
  6805  		}
  6806  		x := v_0_0.Args[0]
  6807  		v.Reset(ssaop.OpARM64FRINTNS)
  6808  		v.AddArg(x)
  6809  		return true
  6810  	}
  6811  	// match: (FCVTDS (FRINTZD (FCVTSD x)))
  6812  	// result: (FRINTZS x)
  6813  	for {
  6814  		if v_0.Op != ssaop.OpARM64FRINTZD {
  6815  			break
  6816  		}
  6817  		v_0_0 := v_0.Args[0]
  6818  		if v_0_0.Op != ssaop.OpARM64FCVTSD {
  6819  			break
  6820  		}
  6821  		x := v_0_0.Args[0]
  6822  		v.Reset(ssaop.OpARM64FRINTZS)
  6823  		v.AddArg(x)
  6824  		return true
  6825  	}
  6826  	return false
  6827  }
  6828  func rewriteValue_OpARM64FLDPQ(v *ssa.Value) bool {
  6829  	v_1 := v.Args[1]
  6830  	v_0 := v.Args[0]
  6831  	b := v.Block
  6832  	config := b.Func.Config
  6833  	// match: (FLDPQ [off1] {sym} (ADDconst [off2] ptr) mem)
  6834  	// cond: ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)
  6835  	// result: (FLDPQ [off1+int32(off2)] {sym} ptr mem)
  6836  	for {
  6837  		off1 := ssa.AuxIntToInt32(v.AuxInt)
  6838  		sym := ssa.AuxToSym(v.Aux)
  6839  		if v_0.Op != ssaop.OpARM64ADDconst {
  6840  			break
  6841  		}
  6842  		off2 := ssa.AuxIntToInt64(v_0.AuxInt)
  6843  		ptr := v_0.Args[0]
  6844  		mem := v_1
  6845  		if !(ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)) {
  6846  			break
  6847  		}
  6848  		v.Reset(ssaop.OpARM64FLDPQ)
  6849  		v.AuxInt = ssa.Int32ToAuxInt(off1 + int32(off2))
  6850  		v.Aux = ssa.SymToAux(sym)
  6851  		v.AddArg2(ptr, mem)
  6852  		return true
  6853  	}
  6854  	// match: (FLDPQ [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) mem)
  6855  	// cond: ssa.CanMergeSym(sym1,sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)
  6856  	// result: (FLDPQ [off1+off2] {ssa.MergeSym(sym1,sym2)} ptr mem)
  6857  	for {
  6858  		off1 := ssa.AuxIntToInt32(v.AuxInt)
  6859  		sym1 := ssa.AuxToSym(v.Aux)
  6860  		if v_0.Op != ssaop.OpARM64MOVDaddr {
  6861  			break
  6862  		}
  6863  		off2 := ssa.AuxIntToInt32(v_0.AuxInt)
  6864  		sym2 := ssa.AuxToSym(v_0.Aux)
  6865  		ptr := v_0.Args[0]
  6866  		mem := v_1
  6867  		if !(ssa.CanMergeSym(sym1, sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)) {
  6868  			break
  6869  		}
  6870  		v.Reset(ssaop.OpARM64FLDPQ)
  6871  		v.AuxInt = ssa.Int32ToAuxInt(off1 + off2)
  6872  		v.Aux = ssa.SymToAux(ssa.MergeSym(sym1, sym2))
  6873  		v.AddArg2(ptr, mem)
  6874  		return true
  6875  	}
  6876  	return false
  6877  }
  6878  func rewriteValue_OpARM64FMOVDfpgp(v *ssa.Value) bool {
  6879  	v_0 := v.Args[0]
  6880  	b := v.Block
  6881  	// match: (FMOVDfpgp <t> (Arg [off] {sym}))
  6882  	// result: @b.Func.Entry (Arg <t> [off] {sym})
  6883  	for {
  6884  		t := v.Type
  6885  		if v_0.Op != ssaop.OpArg {
  6886  			break
  6887  		}
  6888  		off := ssa.AuxIntToInt32(v_0.AuxInt)
  6889  		sym := ssa.AuxToSym(v_0.Aux)
  6890  		b = b.Func.Entry
  6891  		v0 := b.NewValue0(v.Pos, ssaop.OpArg, t)
  6892  		v.CopyOf(v0)
  6893  		v0.AuxInt = ssa.Int32ToAuxInt(off)
  6894  		v0.Aux = ssa.SymToAux(sym)
  6895  		return true
  6896  	}
  6897  	return false
  6898  }
  6899  func rewriteValue_OpARM64FMOVDgpfp(v *ssa.Value) bool {
  6900  	v_0 := v.Args[0]
  6901  	b := v.Block
  6902  	// match: (FMOVDgpfp <t> (Arg [off] {sym}))
  6903  	// result: @b.Func.Entry (Arg <t> [off] {sym})
  6904  	for {
  6905  		t := v.Type
  6906  		if v_0.Op != ssaop.OpArg {
  6907  			break
  6908  		}
  6909  		off := ssa.AuxIntToInt32(v_0.AuxInt)
  6910  		sym := ssa.AuxToSym(v_0.Aux)
  6911  		b = b.Func.Entry
  6912  		v0 := b.NewValue0(v.Pos, ssaop.OpArg, t)
  6913  		v.CopyOf(v0)
  6914  		v0.AuxInt = ssa.Int32ToAuxInt(off)
  6915  		v0.Aux = ssa.SymToAux(sym)
  6916  		return true
  6917  	}
  6918  	return false
  6919  }
  6920  func rewriteValue_OpARM64FMOVDload(v *ssa.Value) bool {
  6921  	v_1 := v.Args[1]
  6922  	v_0 := v.Args[0]
  6923  	b := v.Block
  6924  	config := b.Func.Config
  6925  	// match: (FMOVDload [off] {sym} ptr (MOVDstore [off] {sym} ptr val _))
  6926  	// result: (FMOVDgpfp val)
  6927  	for {
  6928  		off := ssa.AuxIntToInt32(v.AuxInt)
  6929  		sym := ssa.AuxToSym(v.Aux)
  6930  		ptr := v_0
  6931  		if v_1.Op != ssaop.OpARM64MOVDstore || ssa.AuxIntToInt32(v_1.AuxInt) != off || ssa.AuxToSym(v_1.Aux) != sym {
  6932  			break
  6933  		}
  6934  		val := v_1.Args[1]
  6935  		if ptr != v_1.Args[0] {
  6936  			break
  6937  		}
  6938  		v.Reset(ssaop.OpARM64FMOVDgpfp)
  6939  		v.AddArg(val)
  6940  		return true
  6941  	}
  6942  	// match: (FMOVDload [off1] {sym} (ADDconst [off2] ptr) mem)
  6943  	// cond: ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)
  6944  	// result: (FMOVDload [off1+int32(off2)] {sym} ptr mem)
  6945  	for {
  6946  		off1 := ssa.AuxIntToInt32(v.AuxInt)
  6947  		sym := ssa.AuxToSym(v.Aux)
  6948  		if v_0.Op != ssaop.OpARM64ADDconst {
  6949  			break
  6950  		}
  6951  		off2 := ssa.AuxIntToInt64(v_0.AuxInt)
  6952  		ptr := v_0.Args[0]
  6953  		mem := v_1
  6954  		if !(ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)) {
  6955  			break
  6956  		}
  6957  		v.Reset(ssaop.OpARM64FMOVDload)
  6958  		v.AuxInt = ssa.Int32ToAuxInt(off1 + int32(off2))
  6959  		v.Aux = ssa.SymToAux(sym)
  6960  		v.AddArg2(ptr, mem)
  6961  		return true
  6962  	}
  6963  	// match: (FMOVDload [off] {sym} (ADD ptr idx) mem)
  6964  	// cond: off == 0 && sym == nil
  6965  	// result: (FMOVDloadidx ptr idx mem)
  6966  	for {
  6967  		off := ssa.AuxIntToInt32(v.AuxInt)
  6968  		sym := ssa.AuxToSym(v.Aux)
  6969  		if v_0.Op != ssaop.OpARM64ADD {
  6970  			break
  6971  		}
  6972  		idx := v_0.Args[1]
  6973  		ptr := v_0.Args[0]
  6974  		mem := v_1
  6975  		if !(off == 0 && sym == nil) {
  6976  			break
  6977  		}
  6978  		v.Reset(ssaop.OpARM64FMOVDloadidx)
  6979  		v.AddArg3(ptr, idx, mem)
  6980  		return true
  6981  	}
  6982  	// match: (FMOVDload [off] {sym} (ADDshiftLL [3] ptr idx) mem)
  6983  	// cond: off == 0 && sym == nil
  6984  	// result: (FMOVDloadidx8 ptr idx mem)
  6985  	for {
  6986  		off := ssa.AuxIntToInt32(v.AuxInt)
  6987  		sym := ssa.AuxToSym(v.Aux)
  6988  		if v_0.Op != ssaop.OpARM64ADDshiftLL || ssa.AuxIntToInt64(v_0.AuxInt) != 3 {
  6989  			break
  6990  		}
  6991  		idx := v_0.Args[1]
  6992  		ptr := v_0.Args[0]
  6993  		mem := v_1
  6994  		if !(off == 0 && sym == nil) {
  6995  			break
  6996  		}
  6997  		v.Reset(ssaop.OpARM64FMOVDloadidx8)
  6998  		v.AddArg3(ptr, idx, mem)
  6999  		return true
  7000  	}
  7001  	// match: (FMOVDload [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) mem)
  7002  	// cond: ssa.CanMergeSym(sym1,sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)
  7003  	// result: (FMOVDload [off1+off2] {ssa.MergeSym(sym1,sym2)} ptr mem)
  7004  	for {
  7005  		off1 := ssa.AuxIntToInt32(v.AuxInt)
  7006  		sym1 := ssa.AuxToSym(v.Aux)
  7007  		if v_0.Op != ssaop.OpARM64MOVDaddr {
  7008  			break
  7009  		}
  7010  		off2 := ssa.AuxIntToInt32(v_0.AuxInt)
  7011  		sym2 := ssa.AuxToSym(v_0.Aux)
  7012  		ptr := v_0.Args[0]
  7013  		mem := v_1
  7014  		if !(ssa.CanMergeSym(sym1, sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)) {
  7015  			break
  7016  		}
  7017  		v.Reset(ssaop.OpARM64FMOVDload)
  7018  		v.AuxInt = ssa.Int32ToAuxInt(off1 + off2)
  7019  		v.Aux = ssa.SymToAux(ssa.MergeSym(sym1, sym2))
  7020  		v.AddArg2(ptr, mem)
  7021  		return true
  7022  	}
  7023  	return false
  7024  }
  7025  func rewriteValue_OpARM64FMOVDloadidx(v *ssa.Value) bool {
  7026  	v_2 := v.Args[2]
  7027  	v_1 := v.Args[1]
  7028  	v_0 := v.Args[0]
  7029  	// match: (FMOVDloadidx ptr (MOVDconst [c]) mem)
  7030  	// cond: ssa.Is32Bit(c)
  7031  	// result: (FMOVDload [int32(c)] ptr mem)
  7032  	for {
  7033  		ptr := v_0
  7034  		if v_1.Op != ssaop.OpARM64MOVDconst {
  7035  			break
  7036  		}
  7037  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  7038  		mem := v_2
  7039  		if !(ssa.Is32Bit(c)) {
  7040  			break
  7041  		}
  7042  		v.Reset(ssaop.OpARM64FMOVDload)
  7043  		v.AuxInt = ssa.Int32ToAuxInt(int32(c))
  7044  		v.AddArg2(ptr, mem)
  7045  		return true
  7046  	}
  7047  	// match: (FMOVDloadidx (MOVDconst [c]) ptr mem)
  7048  	// cond: ssa.Is32Bit(c)
  7049  	// result: (FMOVDload [int32(c)] ptr mem)
  7050  	for {
  7051  		if v_0.Op != ssaop.OpARM64MOVDconst {
  7052  			break
  7053  		}
  7054  		c := ssa.AuxIntToInt64(v_0.AuxInt)
  7055  		ptr := v_1
  7056  		mem := v_2
  7057  		if !(ssa.Is32Bit(c)) {
  7058  			break
  7059  		}
  7060  		v.Reset(ssaop.OpARM64FMOVDload)
  7061  		v.AuxInt = ssa.Int32ToAuxInt(int32(c))
  7062  		v.AddArg2(ptr, mem)
  7063  		return true
  7064  	}
  7065  	// match: (FMOVDloadidx ptr (SLLconst [3] idx) mem)
  7066  	// result: (FMOVDloadidx8 ptr idx mem)
  7067  	for {
  7068  		ptr := v_0
  7069  		if v_1.Op != ssaop.OpARM64SLLconst || ssa.AuxIntToInt64(v_1.AuxInt) != 3 {
  7070  			break
  7071  		}
  7072  		idx := v_1.Args[0]
  7073  		mem := v_2
  7074  		v.Reset(ssaop.OpARM64FMOVDloadidx8)
  7075  		v.AddArg3(ptr, idx, mem)
  7076  		return true
  7077  	}
  7078  	// match: (FMOVDloadidx (SLLconst [3] idx) ptr mem)
  7079  	// result: (FMOVDloadidx8 ptr idx mem)
  7080  	for {
  7081  		if v_0.Op != ssaop.OpARM64SLLconst || ssa.AuxIntToInt64(v_0.AuxInt) != 3 {
  7082  			break
  7083  		}
  7084  		idx := v_0.Args[0]
  7085  		ptr := v_1
  7086  		mem := v_2
  7087  		v.Reset(ssaop.OpARM64FMOVDloadidx8)
  7088  		v.AddArg3(ptr, idx, mem)
  7089  		return true
  7090  	}
  7091  	return false
  7092  }
  7093  func rewriteValue_OpARM64FMOVDloadidx8(v *ssa.Value) bool {
  7094  	v_2 := v.Args[2]
  7095  	v_1 := v.Args[1]
  7096  	v_0 := v.Args[0]
  7097  	// match: (FMOVDloadidx8 ptr (MOVDconst [c]) mem)
  7098  	// cond: ssa.Is32Bit(c<<3)
  7099  	// result: (FMOVDload ptr [int32(c)<<3] mem)
  7100  	for {
  7101  		ptr := v_0
  7102  		if v_1.Op != ssaop.OpARM64MOVDconst {
  7103  			break
  7104  		}
  7105  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  7106  		mem := v_2
  7107  		if !(ssa.Is32Bit(c << 3)) {
  7108  			break
  7109  		}
  7110  		v.Reset(ssaop.OpARM64FMOVDload)
  7111  		v.AuxInt = ssa.Int32ToAuxInt(int32(c) << 3)
  7112  		v.AddArg2(ptr, mem)
  7113  		return true
  7114  	}
  7115  	return false
  7116  }
  7117  func rewriteValue_OpARM64FMOVDstore(v *ssa.Value) bool {
  7118  	v_2 := v.Args[2]
  7119  	v_1 := v.Args[1]
  7120  	v_0 := v.Args[0]
  7121  	b := v.Block
  7122  	config := b.Func.Config
  7123  	// match: (FMOVDstore [off] {sym} ptr (FMOVDgpfp val) mem)
  7124  	// result: (MOVDstore [off] {sym} ptr val mem)
  7125  	for {
  7126  		off := ssa.AuxIntToInt32(v.AuxInt)
  7127  		sym := ssa.AuxToSym(v.Aux)
  7128  		ptr := v_0
  7129  		if v_1.Op != ssaop.OpARM64FMOVDgpfp {
  7130  			break
  7131  		}
  7132  		val := v_1.Args[0]
  7133  		mem := v_2
  7134  		v.Reset(ssaop.OpARM64MOVDstore)
  7135  		v.AuxInt = ssa.Int32ToAuxInt(off)
  7136  		v.Aux = ssa.SymToAux(sym)
  7137  		v.AddArg3(ptr, val, mem)
  7138  		return true
  7139  	}
  7140  	// match: (FMOVDstore [off1] {sym} (ADDconst [off2] ptr) val mem)
  7141  	// cond: ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)
  7142  	// result: (FMOVDstore [off1+int32(off2)] {sym} ptr val mem)
  7143  	for {
  7144  		off1 := ssa.AuxIntToInt32(v.AuxInt)
  7145  		sym := ssa.AuxToSym(v.Aux)
  7146  		if v_0.Op != ssaop.OpARM64ADDconst {
  7147  			break
  7148  		}
  7149  		off2 := ssa.AuxIntToInt64(v_0.AuxInt)
  7150  		ptr := v_0.Args[0]
  7151  		val := v_1
  7152  		mem := v_2
  7153  		if !(ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)) {
  7154  			break
  7155  		}
  7156  		v.Reset(ssaop.OpARM64FMOVDstore)
  7157  		v.AuxInt = ssa.Int32ToAuxInt(off1 + int32(off2))
  7158  		v.Aux = ssa.SymToAux(sym)
  7159  		v.AddArg3(ptr, val, mem)
  7160  		return true
  7161  	}
  7162  	// match: (FMOVDstore [off] {sym} (ADD ptr idx) val mem)
  7163  	// cond: off == 0 && sym == nil
  7164  	// result: (FMOVDstoreidx ptr idx val mem)
  7165  	for {
  7166  		off := ssa.AuxIntToInt32(v.AuxInt)
  7167  		sym := ssa.AuxToSym(v.Aux)
  7168  		if v_0.Op != ssaop.OpARM64ADD {
  7169  			break
  7170  		}
  7171  		idx := v_0.Args[1]
  7172  		ptr := v_0.Args[0]
  7173  		val := v_1
  7174  		mem := v_2
  7175  		if !(off == 0 && sym == nil) {
  7176  			break
  7177  		}
  7178  		v.Reset(ssaop.OpARM64FMOVDstoreidx)
  7179  		v.AddArg4(ptr, idx, val, mem)
  7180  		return true
  7181  	}
  7182  	// match: (FMOVDstore [off] {sym} (ADDshiftLL [3] ptr idx) val mem)
  7183  	// cond: off == 0 && sym == nil
  7184  	// result: (FMOVDstoreidx8 ptr idx val mem)
  7185  	for {
  7186  		off := ssa.AuxIntToInt32(v.AuxInt)
  7187  		sym := ssa.AuxToSym(v.Aux)
  7188  		if v_0.Op != ssaop.OpARM64ADDshiftLL || ssa.AuxIntToInt64(v_0.AuxInt) != 3 {
  7189  			break
  7190  		}
  7191  		idx := v_0.Args[1]
  7192  		ptr := v_0.Args[0]
  7193  		val := v_1
  7194  		mem := v_2
  7195  		if !(off == 0 && sym == nil) {
  7196  			break
  7197  		}
  7198  		v.Reset(ssaop.OpARM64FMOVDstoreidx8)
  7199  		v.AddArg4(ptr, idx, val, mem)
  7200  		return true
  7201  	}
  7202  	// match: (FMOVDstore [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) val mem)
  7203  	// cond: ssa.CanMergeSym(sym1,sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)
  7204  	// result: (FMOVDstore [off1+off2] {ssa.MergeSym(sym1,sym2)} ptr val mem)
  7205  	for {
  7206  		off1 := ssa.AuxIntToInt32(v.AuxInt)
  7207  		sym1 := ssa.AuxToSym(v.Aux)
  7208  		if v_0.Op != ssaop.OpARM64MOVDaddr {
  7209  			break
  7210  		}
  7211  		off2 := ssa.AuxIntToInt32(v_0.AuxInt)
  7212  		sym2 := ssa.AuxToSym(v_0.Aux)
  7213  		ptr := v_0.Args[0]
  7214  		val := v_1
  7215  		mem := v_2
  7216  		if !(ssa.CanMergeSym(sym1, sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)) {
  7217  			break
  7218  		}
  7219  		v.Reset(ssaop.OpARM64FMOVDstore)
  7220  		v.AuxInt = ssa.Int32ToAuxInt(off1 + off2)
  7221  		v.Aux = ssa.SymToAux(ssa.MergeSym(sym1, sym2))
  7222  		v.AddArg3(ptr, val, mem)
  7223  		return true
  7224  	}
  7225  	return false
  7226  }
  7227  func rewriteValue_OpARM64FMOVDstoreidx(v *ssa.Value) bool {
  7228  	v_3 := v.Args[3]
  7229  	v_2 := v.Args[2]
  7230  	v_1 := v.Args[1]
  7231  	v_0 := v.Args[0]
  7232  	// match: (FMOVDstoreidx ptr (MOVDconst [c]) val mem)
  7233  	// cond: ssa.Is32Bit(c)
  7234  	// result: (FMOVDstore [int32(c)] ptr val mem)
  7235  	for {
  7236  		ptr := v_0
  7237  		if v_1.Op != ssaop.OpARM64MOVDconst {
  7238  			break
  7239  		}
  7240  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  7241  		val := v_2
  7242  		mem := v_3
  7243  		if !(ssa.Is32Bit(c)) {
  7244  			break
  7245  		}
  7246  		v.Reset(ssaop.OpARM64FMOVDstore)
  7247  		v.AuxInt = ssa.Int32ToAuxInt(int32(c))
  7248  		v.AddArg3(ptr, val, mem)
  7249  		return true
  7250  	}
  7251  	// match: (FMOVDstoreidx (MOVDconst [c]) idx val mem)
  7252  	// cond: ssa.Is32Bit(c)
  7253  	// result: (FMOVDstore [int32(c)] idx val mem)
  7254  	for {
  7255  		if v_0.Op != ssaop.OpARM64MOVDconst {
  7256  			break
  7257  		}
  7258  		c := ssa.AuxIntToInt64(v_0.AuxInt)
  7259  		idx := v_1
  7260  		val := v_2
  7261  		mem := v_3
  7262  		if !(ssa.Is32Bit(c)) {
  7263  			break
  7264  		}
  7265  		v.Reset(ssaop.OpARM64FMOVDstore)
  7266  		v.AuxInt = ssa.Int32ToAuxInt(int32(c))
  7267  		v.AddArg3(idx, val, mem)
  7268  		return true
  7269  	}
  7270  	// match: (FMOVDstoreidx ptr (SLLconst [3] idx) val mem)
  7271  	// result: (FMOVDstoreidx8 ptr idx val mem)
  7272  	for {
  7273  		ptr := v_0
  7274  		if v_1.Op != ssaop.OpARM64SLLconst || ssa.AuxIntToInt64(v_1.AuxInt) != 3 {
  7275  			break
  7276  		}
  7277  		idx := v_1.Args[0]
  7278  		val := v_2
  7279  		mem := v_3
  7280  		v.Reset(ssaop.OpARM64FMOVDstoreidx8)
  7281  		v.AddArg4(ptr, idx, val, mem)
  7282  		return true
  7283  	}
  7284  	// match: (FMOVDstoreidx (SLLconst [3] idx) ptr val mem)
  7285  	// result: (FMOVDstoreidx8 ptr idx val mem)
  7286  	for {
  7287  		if v_0.Op != ssaop.OpARM64SLLconst || ssa.AuxIntToInt64(v_0.AuxInt) != 3 {
  7288  			break
  7289  		}
  7290  		idx := v_0.Args[0]
  7291  		ptr := v_1
  7292  		val := v_2
  7293  		mem := v_3
  7294  		v.Reset(ssaop.OpARM64FMOVDstoreidx8)
  7295  		v.AddArg4(ptr, idx, val, mem)
  7296  		return true
  7297  	}
  7298  	return false
  7299  }
  7300  func rewriteValue_OpARM64FMOVDstoreidx8(v *ssa.Value) bool {
  7301  	v_3 := v.Args[3]
  7302  	v_2 := v.Args[2]
  7303  	v_1 := v.Args[1]
  7304  	v_0 := v.Args[0]
  7305  	// match: (FMOVDstoreidx8 ptr (MOVDconst [c]) val mem)
  7306  	// cond: ssa.Is32Bit(c<<3)
  7307  	// result: (FMOVDstore [int32(c)<<3] ptr val mem)
  7308  	for {
  7309  		ptr := v_0
  7310  		if v_1.Op != ssaop.OpARM64MOVDconst {
  7311  			break
  7312  		}
  7313  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  7314  		val := v_2
  7315  		mem := v_3
  7316  		if !(ssa.Is32Bit(c << 3)) {
  7317  			break
  7318  		}
  7319  		v.Reset(ssaop.OpARM64FMOVDstore)
  7320  		v.AuxInt = ssa.Int32ToAuxInt(int32(c) << 3)
  7321  		v.AddArg3(ptr, val, mem)
  7322  		return true
  7323  	}
  7324  	return false
  7325  }
  7326  func rewriteValue_OpARM64FMOVQload(v *ssa.Value) bool {
  7327  	v_1 := v.Args[1]
  7328  	v_0 := v.Args[0]
  7329  	b := v.Block
  7330  	config := b.Func.Config
  7331  	// match: (FMOVQload [off1] {sym} (ADDconst [off2] ptr) mem)
  7332  	// cond: ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)
  7333  	// result: (FMOVQload [off1+int32(off2)] {sym} ptr mem)
  7334  	for {
  7335  		off1 := ssa.AuxIntToInt32(v.AuxInt)
  7336  		sym := ssa.AuxToSym(v.Aux)
  7337  		if v_0.Op != ssaop.OpARM64ADDconst {
  7338  			break
  7339  		}
  7340  		off2 := ssa.AuxIntToInt64(v_0.AuxInt)
  7341  		ptr := v_0.Args[0]
  7342  		mem := v_1
  7343  		if !(ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)) {
  7344  			break
  7345  		}
  7346  		v.Reset(ssaop.OpARM64FMOVQload)
  7347  		v.AuxInt = ssa.Int32ToAuxInt(off1 + int32(off2))
  7348  		v.Aux = ssa.SymToAux(sym)
  7349  		v.AddArg2(ptr, mem)
  7350  		return true
  7351  	}
  7352  	// match: (FMOVQload [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) mem)
  7353  	// cond: ssa.CanMergeSym(sym1,sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)
  7354  	// result: (FMOVQload [off1+off2] {ssa.MergeSym(sym1,sym2)} ptr mem)
  7355  	for {
  7356  		off1 := ssa.AuxIntToInt32(v.AuxInt)
  7357  		sym1 := ssa.AuxToSym(v.Aux)
  7358  		if v_0.Op != ssaop.OpARM64MOVDaddr {
  7359  			break
  7360  		}
  7361  		off2 := ssa.AuxIntToInt32(v_0.AuxInt)
  7362  		sym2 := ssa.AuxToSym(v_0.Aux)
  7363  		ptr := v_0.Args[0]
  7364  		mem := v_1
  7365  		if !(ssa.CanMergeSym(sym1, sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)) {
  7366  			break
  7367  		}
  7368  		v.Reset(ssaop.OpARM64FMOVQload)
  7369  		v.AuxInt = ssa.Int32ToAuxInt(off1 + off2)
  7370  		v.Aux = ssa.SymToAux(ssa.MergeSym(sym1, sym2))
  7371  		v.AddArg2(ptr, mem)
  7372  		return true
  7373  	}
  7374  	return false
  7375  }
  7376  func rewriteValue_OpARM64FMOVQstore(v *ssa.Value) bool {
  7377  	v_2 := v.Args[2]
  7378  	v_1 := v.Args[1]
  7379  	v_0 := v.Args[0]
  7380  	b := v.Block
  7381  	config := b.Func.Config
  7382  	// match: (FMOVQstore [off1] {sym} (ADDconst [off2] ptr) val mem)
  7383  	// cond: ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)
  7384  	// result: (FMOVQstore [off1+int32(off2)] {sym} ptr val mem)
  7385  	for {
  7386  		off1 := ssa.AuxIntToInt32(v.AuxInt)
  7387  		sym := ssa.AuxToSym(v.Aux)
  7388  		if v_0.Op != ssaop.OpARM64ADDconst {
  7389  			break
  7390  		}
  7391  		off2 := ssa.AuxIntToInt64(v_0.AuxInt)
  7392  		ptr := v_0.Args[0]
  7393  		val := v_1
  7394  		mem := v_2
  7395  		if !(ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)) {
  7396  			break
  7397  		}
  7398  		v.Reset(ssaop.OpARM64FMOVQstore)
  7399  		v.AuxInt = ssa.Int32ToAuxInt(off1 + int32(off2))
  7400  		v.Aux = ssa.SymToAux(sym)
  7401  		v.AddArg3(ptr, val, mem)
  7402  		return true
  7403  	}
  7404  	// match: (FMOVQstore [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) val mem)
  7405  	// cond: ssa.CanMergeSym(sym1,sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)
  7406  	// result: (FMOVQstore [off1+off2] {ssa.MergeSym(sym1,sym2)} ptr val mem)
  7407  	for {
  7408  		off1 := ssa.AuxIntToInt32(v.AuxInt)
  7409  		sym1 := ssa.AuxToSym(v.Aux)
  7410  		if v_0.Op != ssaop.OpARM64MOVDaddr {
  7411  			break
  7412  		}
  7413  		off2 := ssa.AuxIntToInt32(v_0.AuxInt)
  7414  		sym2 := ssa.AuxToSym(v_0.Aux)
  7415  		ptr := v_0.Args[0]
  7416  		val := v_1
  7417  		mem := v_2
  7418  		if !(ssa.CanMergeSym(sym1, sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)) {
  7419  			break
  7420  		}
  7421  		v.Reset(ssaop.OpARM64FMOVQstore)
  7422  		v.AuxInt = ssa.Int32ToAuxInt(off1 + off2)
  7423  		v.Aux = ssa.SymToAux(ssa.MergeSym(sym1, sym2))
  7424  		v.AddArg3(ptr, val, mem)
  7425  		return true
  7426  	}
  7427  	return false
  7428  }
  7429  func rewriteValue_OpARM64FMOVSload(v *ssa.Value) bool {
  7430  	v_1 := v.Args[1]
  7431  	v_0 := v.Args[0]
  7432  	b := v.Block
  7433  	config := b.Func.Config
  7434  	// match: (FMOVSload [off] {sym} ptr (MOVWstore [off] {sym} ptr val _))
  7435  	// result: (FMOVSgpfp val)
  7436  	for {
  7437  		off := ssa.AuxIntToInt32(v.AuxInt)
  7438  		sym := ssa.AuxToSym(v.Aux)
  7439  		ptr := v_0
  7440  		if v_1.Op != ssaop.OpARM64MOVWstore || ssa.AuxIntToInt32(v_1.AuxInt) != off || ssa.AuxToSym(v_1.Aux) != sym {
  7441  			break
  7442  		}
  7443  		val := v_1.Args[1]
  7444  		if ptr != v_1.Args[0] {
  7445  			break
  7446  		}
  7447  		v.Reset(ssaop.OpARM64FMOVSgpfp)
  7448  		v.AddArg(val)
  7449  		return true
  7450  	}
  7451  	// match: (FMOVSload [off1] {sym} (ADDconst [off2] ptr) mem)
  7452  	// cond: ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)
  7453  	// result: (FMOVSload [off1+int32(off2)] {sym} ptr mem)
  7454  	for {
  7455  		off1 := ssa.AuxIntToInt32(v.AuxInt)
  7456  		sym := ssa.AuxToSym(v.Aux)
  7457  		if v_0.Op != ssaop.OpARM64ADDconst {
  7458  			break
  7459  		}
  7460  		off2 := ssa.AuxIntToInt64(v_0.AuxInt)
  7461  		ptr := v_0.Args[0]
  7462  		mem := v_1
  7463  		if !(ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)) {
  7464  			break
  7465  		}
  7466  		v.Reset(ssaop.OpARM64FMOVSload)
  7467  		v.AuxInt = ssa.Int32ToAuxInt(off1 + int32(off2))
  7468  		v.Aux = ssa.SymToAux(sym)
  7469  		v.AddArg2(ptr, mem)
  7470  		return true
  7471  	}
  7472  	// match: (FMOVSload [off] {sym} (ADD ptr idx) mem)
  7473  	// cond: off == 0 && sym == nil
  7474  	// result: (FMOVSloadidx ptr idx mem)
  7475  	for {
  7476  		off := ssa.AuxIntToInt32(v.AuxInt)
  7477  		sym := ssa.AuxToSym(v.Aux)
  7478  		if v_0.Op != ssaop.OpARM64ADD {
  7479  			break
  7480  		}
  7481  		idx := v_0.Args[1]
  7482  		ptr := v_0.Args[0]
  7483  		mem := v_1
  7484  		if !(off == 0 && sym == nil) {
  7485  			break
  7486  		}
  7487  		v.Reset(ssaop.OpARM64FMOVSloadidx)
  7488  		v.AddArg3(ptr, idx, mem)
  7489  		return true
  7490  	}
  7491  	// match: (FMOVSload [off] {sym} (ADDshiftLL [2] ptr idx) mem)
  7492  	// cond: off == 0 && sym == nil
  7493  	// result: (FMOVSloadidx4 ptr idx mem)
  7494  	for {
  7495  		off := ssa.AuxIntToInt32(v.AuxInt)
  7496  		sym := ssa.AuxToSym(v.Aux)
  7497  		if v_0.Op != ssaop.OpARM64ADDshiftLL || ssa.AuxIntToInt64(v_0.AuxInt) != 2 {
  7498  			break
  7499  		}
  7500  		idx := v_0.Args[1]
  7501  		ptr := v_0.Args[0]
  7502  		mem := v_1
  7503  		if !(off == 0 && sym == nil) {
  7504  			break
  7505  		}
  7506  		v.Reset(ssaop.OpARM64FMOVSloadidx4)
  7507  		v.AddArg3(ptr, idx, mem)
  7508  		return true
  7509  	}
  7510  	// match: (FMOVSload [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) mem)
  7511  	// cond: ssa.CanMergeSym(sym1,sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)
  7512  	// result: (FMOVSload [off1+off2] {ssa.MergeSym(sym1,sym2)} ptr mem)
  7513  	for {
  7514  		off1 := ssa.AuxIntToInt32(v.AuxInt)
  7515  		sym1 := ssa.AuxToSym(v.Aux)
  7516  		if v_0.Op != ssaop.OpARM64MOVDaddr {
  7517  			break
  7518  		}
  7519  		off2 := ssa.AuxIntToInt32(v_0.AuxInt)
  7520  		sym2 := ssa.AuxToSym(v_0.Aux)
  7521  		ptr := v_0.Args[0]
  7522  		mem := v_1
  7523  		if !(ssa.CanMergeSym(sym1, sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)) {
  7524  			break
  7525  		}
  7526  		v.Reset(ssaop.OpARM64FMOVSload)
  7527  		v.AuxInt = ssa.Int32ToAuxInt(off1 + off2)
  7528  		v.Aux = ssa.SymToAux(ssa.MergeSym(sym1, sym2))
  7529  		v.AddArg2(ptr, mem)
  7530  		return true
  7531  	}
  7532  	return false
  7533  }
  7534  func rewriteValue_OpARM64FMOVSloadidx(v *ssa.Value) bool {
  7535  	v_2 := v.Args[2]
  7536  	v_1 := v.Args[1]
  7537  	v_0 := v.Args[0]
  7538  	// match: (FMOVSloadidx ptr (MOVDconst [c]) mem)
  7539  	// cond: ssa.Is32Bit(c)
  7540  	// result: (FMOVSload [int32(c)] ptr mem)
  7541  	for {
  7542  		ptr := v_0
  7543  		if v_1.Op != ssaop.OpARM64MOVDconst {
  7544  			break
  7545  		}
  7546  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  7547  		mem := v_2
  7548  		if !(ssa.Is32Bit(c)) {
  7549  			break
  7550  		}
  7551  		v.Reset(ssaop.OpARM64FMOVSload)
  7552  		v.AuxInt = ssa.Int32ToAuxInt(int32(c))
  7553  		v.AddArg2(ptr, mem)
  7554  		return true
  7555  	}
  7556  	// match: (FMOVSloadidx (MOVDconst [c]) ptr mem)
  7557  	// cond: ssa.Is32Bit(c)
  7558  	// result: (FMOVSload [int32(c)] ptr mem)
  7559  	for {
  7560  		if v_0.Op != ssaop.OpARM64MOVDconst {
  7561  			break
  7562  		}
  7563  		c := ssa.AuxIntToInt64(v_0.AuxInt)
  7564  		ptr := v_1
  7565  		mem := v_2
  7566  		if !(ssa.Is32Bit(c)) {
  7567  			break
  7568  		}
  7569  		v.Reset(ssaop.OpARM64FMOVSload)
  7570  		v.AuxInt = ssa.Int32ToAuxInt(int32(c))
  7571  		v.AddArg2(ptr, mem)
  7572  		return true
  7573  	}
  7574  	// match: (FMOVSloadidx ptr (SLLconst [2] idx) mem)
  7575  	// result: (FMOVSloadidx4 ptr idx mem)
  7576  	for {
  7577  		ptr := v_0
  7578  		if v_1.Op != ssaop.OpARM64SLLconst || ssa.AuxIntToInt64(v_1.AuxInt) != 2 {
  7579  			break
  7580  		}
  7581  		idx := v_1.Args[0]
  7582  		mem := v_2
  7583  		v.Reset(ssaop.OpARM64FMOVSloadidx4)
  7584  		v.AddArg3(ptr, idx, mem)
  7585  		return true
  7586  	}
  7587  	// match: (FMOVSloadidx (SLLconst [2] idx) ptr mem)
  7588  	// result: (FMOVSloadidx4 ptr idx mem)
  7589  	for {
  7590  		if v_0.Op != ssaop.OpARM64SLLconst || ssa.AuxIntToInt64(v_0.AuxInt) != 2 {
  7591  			break
  7592  		}
  7593  		idx := v_0.Args[0]
  7594  		ptr := v_1
  7595  		mem := v_2
  7596  		v.Reset(ssaop.OpARM64FMOVSloadidx4)
  7597  		v.AddArg3(ptr, idx, mem)
  7598  		return true
  7599  	}
  7600  	return false
  7601  }
  7602  func rewriteValue_OpARM64FMOVSloadidx4(v *ssa.Value) bool {
  7603  	v_2 := v.Args[2]
  7604  	v_1 := v.Args[1]
  7605  	v_0 := v.Args[0]
  7606  	// match: (FMOVSloadidx4 ptr (MOVDconst [c]) mem)
  7607  	// cond: ssa.Is32Bit(c<<2)
  7608  	// result: (FMOVSload ptr [int32(c)<<2] mem)
  7609  	for {
  7610  		ptr := v_0
  7611  		if v_1.Op != ssaop.OpARM64MOVDconst {
  7612  			break
  7613  		}
  7614  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  7615  		mem := v_2
  7616  		if !(ssa.Is32Bit(c << 2)) {
  7617  			break
  7618  		}
  7619  		v.Reset(ssaop.OpARM64FMOVSload)
  7620  		v.AuxInt = ssa.Int32ToAuxInt(int32(c) << 2)
  7621  		v.AddArg2(ptr, mem)
  7622  		return true
  7623  	}
  7624  	return false
  7625  }
  7626  func rewriteValue_OpARM64FMOVSstore(v *ssa.Value) bool {
  7627  	v_2 := v.Args[2]
  7628  	v_1 := v.Args[1]
  7629  	v_0 := v.Args[0]
  7630  	b := v.Block
  7631  	config := b.Func.Config
  7632  	// match: (FMOVSstore [off] {sym} ptr (FMOVSgpfp val) mem)
  7633  	// result: (MOVWstore [off] {sym} ptr val mem)
  7634  	for {
  7635  		off := ssa.AuxIntToInt32(v.AuxInt)
  7636  		sym := ssa.AuxToSym(v.Aux)
  7637  		ptr := v_0
  7638  		if v_1.Op != ssaop.OpARM64FMOVSgpfp {
  7639  			break
  7640  		}
  7641  		val := v_1.Args[0]
  7642  		mem := v_2
  7643  		v.Reset(ssaop.OpARM64MOVWstore)
  7644  		v.AuxInt = ssa.Int32ToAuxInt(off)
  7645  		v.Aux = ssa.SymToAux(sym)
  7646  		v.AddArg3(ptr, val, mem)
  7647  		return true
  7648  	}
  7649  	// match: (FMOVSstore [off1] {sym} (ADDconst [off2] ptr) val mem)
  7650  	// cond: ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)
  7651  	// result: (FMOVSstore [off1+int32(off2)] {sym} ptr val mem)
  7652  	for {
  7653  		off1 := ssa.AuxIntToInt32(v.AuxInt)
  7654  		sym := ssa.AuxToSym(v.Aux)
  7655  		if v_0.Op != ssaop.OpARM64ADDconst {
  7656  			break
  7657  		}
  7658  		off2 := ssa.AuxIntToInt64(v_0.AuxInt)
  7659  		ptr := v_0.Args[0]
  7660  		val := v_1
  7661  		mem := v_2
  7662  		if !(ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)) {
  7663  			break
  7664  		}
  7665  		v.Reset(ssaop.OpARM64FMOVSstore)
  7666  		v.AuxInt = ssa.Int32ToAuxInt(off1 + int32(off2))
  7667  		v.Aux = ssa.SymToAux(sym)
  7668  		v.AddArg3(ptr, val, mem)
  7669  		return true
  7670  	}
  7671  	// match: (FMOVSstore [off] {sym} (ADD ptr idx) val mem)
  7672  	// cond: off == 0 && sym == nil
  7673  	// result: (FMOVSstoreidx ptr idx val mem)
  7674  	for {
  7675  		off := ssa.AuxIntToInt32(v.AuxInt)
  7676  		sym := ssa.AuxToSym(v.Aux)
  7677  		if v_0.Op != ssaop.OpARM64ADD {
  7678  			break
  7679  		}
  7680  		idx := v_0.Args[1]
  7681  		ptr := v_0.Args[0]
  7682  		val := v_1
  7683  		mem := v_2
  7684  		if !(off == 0 && sym == nil) {
  7685  			break
  7686  		}
  7687  		v.Reset(ssaop.OpARM64FMOVSstoreidx)
  7688  		v.AddArg4(ptr, idx, val, mem)
  7689  		return true
  7690  	}
  7691  	// match: (FMOVSstore [off] {sym} (ADDshiftLL [2] ptr idx) val mem)
  7692  	// cond: off == 0 && sym == nil
  7693  	// result: (FMOVSstoreidx4 ptr idx val mem)
  7694  	for {
  7695  		off := ssa.AuxIntToInt32(v.AuxInt)
  7696  		sym := ssa.AuxToSym(v.Aux)
  7697  		if v_0.Op != ssaop.OpARM64ADDshiftLL || ssa.AuxIntToInt64(v_0.AuxInt) != 2 {
  7698  			break
  7699  		}
  7700  		idx := v_0.Args[1]
  7701  		ptr := v_0.Args[0]
  7702  		val := v_1
  7703  		mem := v_2
  7704  		if !(off == 0 && sym == nil) {
  7705  			break
  7706  		}
  7707  		v.Reset(ssaop.OpARM64FMOVSstoreidx4)
  7708  		v.AddArg4(ptr, idx, val, mem)
  7709  		return true
  7710  	}
  7711  	// match: (FMOVSstore [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) val mem)
  7712  	// cond: ssa.CanMergeSym(sym1,sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)
  7713  	// result: (FMOVSstore [off1+off2] {ssa.MergeSym(sym1,sym2)} ptr val mem)
  7714  	for {
  7715  		off1 := ssa.AuxIntToInt32(v.AuxInt)
  7716  		sym1 := ssa.AuxToSym(v.Aux)
  7717  		if v_0.Op != ssaop.OpARM64MOVDaddr {
  7718  			break
  7719  		}
  7720  		off2 := ssa.AuxIntToInt32(v_0.AuxInt)
  7721  		sym2 := ssa.AuxToSym(v_0.Aux)
  7722  		ptr := v_0.Args[0]
  7723  		val := v_1
  7724  		mem := v_2
  7725  		if !(ssa.CanMergeSym(sym1, sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)) {
  7726  			break
  7727  		}
  7728  		v.Reset(ssaop.OpARM64FMOVSstore)
  7729  		v.AuxInt = ssa.Int32ToAuxInt(off1 + off2)
  7730  		v.Aux = ssa.SymToAux(ssa.MergeSym(sym1, sym2))
  7731  		v.AddArg3(ptr, val, mem)
  7732  		return true
  7733  	}
  7734  	return false
  7735  }
  7736  func rewriteValue_OpARM64FMOVSstoreidx(v *ssa.Value) bool {
  7737  	v_3 := v.Args[3]
  7738  	v_2 := v.Args[2]
  7739  	v_1 := v.Args[1]
  7740  	v_0 := v.Args[0]
  7741  	// match: (FMOVSstoreidx ptr (MOVDconst [c]) val mem)
  7742  	// cond: ssa.Is32Bit(c)
  7743  	// result: (FMOVSstore [int32(c)] ptr val mem)
  7744  	for {
  7745  		ptr := v_0
  7746  		if v_1.Op != ssaop.OpARM64MOVDconst {
  7747  			break
  7748  		}
  7749  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  7750  		val := v_2
  7751  		mem := v_3
  7752  		if !(ssa.Is32Bit(c)) {
  7753  			break
  7754  		}
  7755  		v.Reset(ssaop.OpARM64FMOVSstore)
  7756  		v.AuxInt = ssa.Int32ToAuxInt(int32(c))
  7757  		v.AddArg3(ptr, val, mem)
  7758  		return true
  7759  	}
  7760  	// match: (FMOVSstoreidx (MOVDconst [c]) idx val mem)
  7761  	// cond: ssa.Is32Bit(c)
  7762  	// result: (FMOVSstore [int32(c)] idx val mem)
  7763  	for {
  7764  		if v_0.Op != ssaop.OpARM64MOVDconst {
  7765  			break
  7766  		}
  7767  		c := ssa.AuxIntToInt64(v_0.AuxInt)
  7768  		idx := v_1
  7769  		val := v_2
  7770  		mem := v_3
  7771  		if !(ssa.Is32Bit(c)) {
  7772  			break
  7773  		}
  7774  		v.Reset(ssaop.OpARM64FMOVSstore)
  7775  		v.AuxInt = ssa.Int32ToAuxInt(int32(c))
  7776  		v.AddArg3(idx, val, mem)
  7777  		return true
  7778  	}
  7779  	// match: (FMOVSstoreidx ptr (SLLconst [2] idx) val mem)
  7780  	// result: (FMOVSstoreidx4 ptr idx val mem)
  7781  	for {
  7782  		ptr := v_0
  7783  		if v_1.Op != ssaop.OpARM64SLLconst || ssa.AuxIntToInt64(v_1.AuxInt) != 2 {
  7784  			break
  7785  		}
  7786  		idx := v_1.Args[0]
  7787  		val := v_2
  7788  		mem := v_3
  7789  		v.Reset(ssaop.OpARM64FMOVSstoreidx4)
  7790  		v.AddArg4(ptr, idx, val, mem)
  7791  		return true
  7792  	}
  7793  	// match: (FMOVSstoreidx (SLLconst [2] idx) ptr val mem)
  7794  	// result: (FMOVSstoreidx4 ptr idx val mem)
  7795  	for {
  7796  		if v_0.Op != ssaop.OpARM64SLLconst || ssa.AuxIntToInt64(v_0.AuxInt) != 2 {
  7797  			break
  7798  		}
  7799  		idx := v_0.Args[0]
  7800  		ptr := v_1
  7801  		val := v_2
  7802  		mem := v_3
  7803  		v.Reset(ssaop.OpARM64FMOVSstoreidx4)
  7804  		v.AddArg4(ptr, idx, val, mem)
  7805  		return true
  7806  	}
  7807  	return false
  7808  }
  7809  func rewriteValue_OpARM64FMOVSstoreidx4(v *ssa.Value) bool {
  7810  	v_3 := v.Args[3]
  7811  	v_2 := v.Args[2]
  7812  	v_1 := v.Args[1]
  7813  	v_0 := v.Args[0]
  7814  	// match: (FMOVSstoreidx4 ptr (MOVDconst [c]) val mem)
  7815  	// cond: ssa.Is32Bit(c<<2)
  7816  	// result: (FMOVSstore [int32(c)<<2] ptr val mem)
  7817  	for {
  7818  		ptr := v_0
  7819  		if v_1.Op != ssaop.OpARM64MOVDconst {
  7820  			break
  7821  		}
  7822  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  7823  		val := v_2
  7824  		mem := v_3
  7825  		if !(ssa.Is32Bit(c << 2)) {
  7826  			break
  7827  		}
  7828  		v.Reset(ssaop.OpARM64FMOVSstore)
  7829  		v.AuxInt = ssa.Int32ToAuxInt(int32(c) << 2)
  7830  		v.AddArg3(ptr, val, mem)
  7831  		return true
  7832  	}
  7833  	return false
  7834  }
  7835  func rewriteValue_OpARM64FMULD(v *ssa.Value) bool {
  7836  	v_1 := v.Args[1]
  7837  	v_0 := v.Args[0]
  7838  	// match: (FMULD (FNEGD x) y)
  7839  	// result: (FNMULD x y)
  7840  	for {
  7841  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  7842  			if v_0.Op != ssaop.OpARM64FNEGD {
  7843  				continue
  7844  			}
  7845  			x := v_0.Args[0]
  7846  			y := v_1
  7847  			v.Reset(ssaop.OpARM64FNMULD)
  7848  			v.AddArg2(x, y)
  7849  			return true
  7850  		}
  7851  		break
  7852  	}
  7853  	return false
  7854  }
  7855  func rewriteValue_OpARM64FMULS(v *ssa.Value) bool {
  7856  	v_1 := v.Args[1]
  7857  	v_0 := v.Args[0]
  7858  	// match: (FMULS (FNEGS x) y)
  7859  	// result: (FNMULS x y)
  7860  	for {
  7861  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  7862  			if v_0.Op != ssaop.OpARM64FNEGS {
  7863  				continue
  7864  			}
  7865  			x := v_0.Args[0]
  7866  			y := v_1
  7867  			v.Reset(ssaop.OpARM64FNMULS)
  7868  			v.AddArg2(x, y)
  7869  			return true
  7870  		}
  7871  		break
  7872  	}
  7873  	return false
  7874  }
  7875  func rewriteValue_OpARM64FNEGD(v *ssa.Value) bool {
  7876  	v_0 := v.Args[0]
  7877  	// match: (FNEGD (FMULD x y))
  7878  	// result: (FNMULD x y)
  7879  	for {
  7880  		if v_0.Op != ssaop.OpARM64FMULD {
  7881  			break
  7882  		}
  7883  		y := v_0.Args[1]
  7884  		x := v_0.Args[0]
  7885  		v.Reset(ssaop.OpARM64FNMULD)
  7886  		v.AddArg2(x, y)
  7887  		return true
  7888  	}
  7889  	// match: (FNEGD (FNMULD x y))
  7890  	// result: (FMULD x y)
  7891  	for {
  7892  		if v_0.Op != ssaop.OpARM64FNMULD {
  7893  			break
  7894  		}
  7895  		y := v_0.Args[1]
  7896  		x := v_0.Args[0]
  7897  		v.Reset(ssaop.OpARM64FMULD)
  7898  		v.AddArg2(x, y)
  7899  		return true
  7900  	}
  7901  	return false
  7902  }
  7903  func rewriteValue_OpARM64FNEGS(v *ssa.Value) bool {
  7904  	v_0 := v.Args[0]
  7905  	// match: (FNEGS (FMULS x y))
  7906  	// result: (FNMULS x y)
  7907  	for {
  7908  		if v_0.Op != ssaop.OpARM64FMULS {
  7909  			break
  7910  		}
  7911  		y := v_0.Args[1]
  7912  		x := v_0.Args[0]
  7913  		v.Reset(ssaop.OpARM64FNMULS)
  7914  		v.AddArg2(x, y)
  7915  		return true
  7916  	}
  7917  	// match: (FNEGS (FNMULS x y))
  7918  	// result: (FMULS x y)
  7919  	for {
  7920  		if v_0.Op != ssaop.OpARM64FNMULS {
  7921  			break
  7922  		}
  7923  		y := v_0.Args[1]
  7924  		x := v_0.Args[0]
  7925  		v.Reset(ssaop.OpARM64FMULS)
  7926  		v.AddArg2(x, y)
  7927  		return true
  7928  	}
  7929  	return false
  7930  }
  7931  func rewriteValue_OpARM64FNMULD(v *ssa.Value) bool {
  7932  	v_1 := v.Args[1]
  7933  	v_0 := v.Args[0]
  7934  	// match: (FNMULD (FNEGD x) y)
  7935  	// result: (FMULD x y)
  7936  	for {
  7937  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  7938  			if v_0.Op != ssaop.OpARM64FNEGD {
  7939  				continue
  7940  			}
  7941  			x := v_0.Args[0]
  7942  			y := v_1
  7943  			v.Reset(ssaop.OpARM64FMULD)
  7944  			v.AddArg2(x, y)
  7945  			return true
  7946  		}
  7947  		break
  7948  	}
  7949  	return false
  7950  }
  7951  func rewriteValue_OpARM64FNMULS(v *ssa.Value) bool {
  7952  	v_1 := v.Args[1]
  7953  	v_0 := v.Args[0]
  7954  	// match: (FNMULS (FNEGS x) y)
  7955  	// result: (FMULS x y)
  7956  	for {
  7957  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  7958  			if v_0.Op != ssaop.OpARM64FNEGS {
  7959  				continue
  7960  			}
  7961  			x := v_0.Args[0]
  7962  			y := v_1
  7963  			v.Reset(ssaop.OpARM64FMULS)
  7964  			v.AddArg2(x, y)
  7965  			return true
  7966  		}
  7967  		break
  7968  	}
  7969  	return false
  7970  }
  7971  func rewriteValue_OpARM64FSTPQ(v *ssa.Value) bool {
  7972  	v_3 := v.Args[3]
  7973  	v_2 := v.Args[2]
  7974  	v_1 := v.Args[1]
  7975  	v_0 := v.Args[0]
  7976  	b := v.Block
  7977  	config := b.Func.Config
  7978  	// match: (FSTPQ [off1] {sym} (ADDconst [off2] ptr) val1 val2 mem)
  7979  	// cond: ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)
  7980  	// result: (FSTPQ [off1+int32(off2)] {sym} ptr val1 val2 mem)
  7981  	for {
  7982  		off1 := ssa.AuxIntToInt32(v.AuxInt)
  7983  		sym := ssa.AuxToSym(v.Aux)
  7984  		if v_0.Op != ssaop.OpARM64ADDconst {
  7985  			break
  7986  		}
  7987  		off2 := ssa.AuxIntToInt64(v_0.AuxInt)
  7988  		ptr := v_0.Args[0]
  7989  		val1 := v_1
  7990  		val2 := v_2
  7991  		mem := v_3
  7992  		if !(ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)) {
  7993  			break
  7994  		}
  7995  		v.Reset(ssaop.OpARM64FSTPQ)
  7996  		v.AuxInt = ssa.Int32ToAuxInt(off1 + int32(off2))
  7997  		v.Aux = ssa.SymToAux(sym)
  7998  		v.AddArg4(ptr, val1, val2, mem)
  7999  		return true
  8000  	}
  8001  	// match: (FSTPQ [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) val1 val2 mem)
  8002  	// cond: ssa.CanMergeSym(sym1,sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)
  8003  	// result: (FSTPQ [off1+off2] {ssa.MergeSym(sym1,sym2)} ptr val1 val2 mem)
  8004  	for {
  8005  		off1 := ssa.AuxIntToInt32(v.AuxInt)
  8006  		sym1 := ssa.AuxToSym(v.Aux)
  8007  		if v_0.Op != ssaop.OpARM64MOVDaddr {
  8008  			break
  8009  		}
  8010  		off2 := ssa.AuxIntToInt32(v_0.AuxInt)
  8011  		sym2 := ssa.AuxToSym(v_0.Aux)
  8012  		ptr := v_0.Args[0]
  8013  		val1 := v_1
  8014  		val2 := v_2
  8015  		mem := v_3
  8016  		if !(ssa.CanMergeSym(sym1, sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)) {
  8017  			break
  8018  		}
  8019  		v.Reset(ssaop.OpARM64FSTPQ)
  8020  		v.AuxInt = ssa.Int32ToAuxInt(off1 + off2)
  8021  		v.Aux = ssa.SymToAux(ssa.MergeSym(sym1, sym2))
  8022  		v.AddArg4(ptr, val1, val2, mem)
  8023  		return true
  8024  	}
  8025  	return false
  8026  }
  8027  func rewriteValue_OpARM64FSUBD(v *ssa.Value) bool {
  8028  	v_1 := v.Args[1]
  8029  	v_0 := v.Args[0]
  8030  	// match: (FSUBD a (FMULD x y))
  8031  	// cond: a.Block.Func.UseFMA(v)
  8032  	// result: (FMSUBD a x y)
  8033  	for {
  8034  		a := v_0
  8035  		if v_1.Op != ssaop.OpARM64FMULD {
  8036  			break
  8037  		}
  8038  		y := v_1.Args[1]
  8039  		x := v_1.Args[0]
  8040  		if !(a.Block.Func.UseFMA(v)) {
  8041  			break
  8042  		}
  8043  		v.Reset(ssaop.OpARM64FMSUBD)
  8044  		v.AddArg3(a, x, y)
  8045  		return true
  8046  	}
  8047  	// match: (FSUBD (FMULD x y) a)
  8048  	// cond: a.Block.Func.UseFMA(v)
  8049  	// result: (FNMSUBD a x y)
  8050  	for {
  8051  		if v_0.Op != ssaop.OpARM64FMULD {
  8052  			break
  8053  		}
  8054  		y := v_0.Args[1]
  8055  		x := v_0.Args[0]
  8056  		a := v_1
  8057  		if !(a.Block.Func.UseFMA(v)) {
  8058  			break
  8059  		}
  8060  		v.Reset(ssaop.OpARM64FNMSUBD)
  8061  		v.AddArg3(a, x, y)
  8062  		return true
  8063  	}
  8064  	// match: (FSUBD a (FNMULD x y))
  8065  	// cond: a.Block.Func.UseFMA(v)
  8066  	// result: (FMADDD a x y)
  8067  	for {
  8068  		a := v_0
  8069  		if v_1.Op != ssaop.OpARM64FNMULD {
  8070  			break
  8071  		}
  8072  		y := v_1.Args[1]
  8073  		x := v_1.Args[0]
  8074  		if !(a.Block.Func.UseFMA(v)) {
  8075  			break
  8076  		}
  8077  		v.Reset(ssaop.OpARM64FMADDD)
  8078  		v.AddArg3(a, x, y)
  8079  		return true
  8080  	}
  8081  	// match: (FSUBD (FNMULD x y) a)
  8082  	// cond: a.Block.Func.UseFMA(v)
  8083  	// result: (FNMADDD a x y)
  8084  	for {
  8085  		if v_0.Op != ssaop.OpARM64FNMULD {
  8086  			break
  8087  		}
  8088  		y := v_0.Args[1]
  8089  		x := v_0.Args[0]
  8090  		a := v_1
  8091  		if !(a.Block.Func.UseFMA(v)) {
  8092  			break
  8093  		}
  8094  		v.Reset(ssaop.OpARM64FNMADDD)
  8095  		v.AddArg3(a, x, y)
  8096  		return true
  8097  	}
  8098  	return false
  8099  }
  8100  func rewriteValue_OpARM64FSUBS(v *ssa.Value) bool {
  8101  	v_1 := v.Args[1]
  8102  	v_0 := v.Args[0]
  8103  	// match: (FSUBS a (FMULS x y))
  8104  	// cond: a.Block.Func.UseFMA(v)
  8105  	// result: (FMSUBS a x y)
  8106  	for {
  8107  		a := v_0
  8108  		if v_1.Op != ssaop.OpARM64FMULS {
  8109  			break
  8110  		}
  8111  		y := v_1.Args[1]
  8112  		x := v_1.Args[0]
  8113  		if !(a.Block.Func.UseFMA(v)) {
  8114  			break
  8115  		}
  8116  		v.Reset(ssaop.OpARM64FMSUBS)
  8117  		v.AddArg3(a, x, y)
  8118  		return true
  8119  	}
  8120  	// match: (FSUBS (FMULS x y) a)
  8121  	// cond: a.Block.Func.UseFMA(v)
  8122  	// result: (FNMSUBS a x y)
  8123  	for {
  8124  		if v_0.Op != ssaop.OpARM64FMULS {
  8125  			break
  8126  		}
  8127  		y := v_0.Args[1]
  8128  		x := v_0.Args[0]
  8129  		a := v_1
  8130  		if !(a.Block.Func.UseFMA(v)) {
  8131  			break
  8132  		}
  8133  		v.Reset(ssaop.OpARM64FNMSUBS)
  8134  		v.AddArg3(a, x, y)
  8135  		return true
  8136  	}
  8137  	// match: (FSUBS a (FNMULS x y))
  8138  	// cond: a.Block.Func.UseFMA(v)
  8139  	// result: (FMADDS a x y)
  8140  	for {
  8141  		a := v_0
  8142  		if v_1.Op != ssaop.OpARM64FNMULS {
  8143  			break
  8144  		}
  8145  		y := v_1.Args[1]
  8146  		x := v_1.Args[0]
  8147  		if !(a.Block.Func.UseFMA(v)) {
  8148  			break
  8149  		}
  8150  		v.Reset(ssaop.OpARM64FMADDS)
  8151  		v.AddArg3(a, x, y)
  8152  		return true
  8153  	}
  8154  	// match: (FSUBS (FNMULS x y) a)
  8155  	// cond: a.Block.Func.UseFMA(v)
  8156  	// result: (FNMADDS a x y)
  8157  	for {
  8158  		if v_0.Op != ssaop.OpARM64FNMULS {
  8159  			break
  8160  		}
  8161  		y := v_0.Args[1]
  8162  		x := v_0.Args[0]
  8163  		a := v_1
  8164  		if !(a.Block.Func.UseFMA(v)) {
  8165  			break
  8166  		}
  8167  		v.Reset(ssaop.OpARM64FNMADDS)
  8168  		v.AddArg3(a, x, y)
  8169  		return true
  8170  	}
  8171  	return false
  8172  }
  8173  func rewriteValue_OpARM64GreaterEqual(v *ssa.Value) bool {
  8174  	v_0 := v.Args[0]
  8175  	b := v.Block
  8176  	// match: (GreaterEqual (CMPconst [0] z:(AND x y)))
  8177  	// cond: z.Uses == 1
  8178  	// result: (GreaterEqual (TST x y))
  8179  	for {
  8180  		if v_0.Op != ssaop.OpARM64CMPconst || ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
  8181  			break
  8182  		}
  8183  		z := v_0.Args[0]
  8184  		if z.Op != ssaop.OpARM64AND {
  8185  			break
  8186  		}
  8187  		y := z.Args[1]
  8188  		x := z.Args[0]
  8189  		if !(z.Uses == 1) {
  8190  			break
  8191  		}
  8192  		v.Reset(ssaop.OpARM64GreaterEqual)
  8193  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64TST, types.TypeFlags)
  8194  		v0.AddArg2(x, y)
  8195  		v.AddArg(v0)
  8196  		return true
  8197  	}
  8198  	// match: (GreaterEqual (CMPWconst [0] x:(ANDconst [c] y)))
  8199  	// cond: x.Uses == 1
  8200  	// result: (GreaterEqual (TSTWconst [int32(c)] y))
  8201  	for {
  8202  		if v_0.Op != ssaop.OpARM64CMPWconst || ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
  8203  			break
  8204  		}
  8205  		x := v_0.Args[0]
  8206  		if x.Op != ssaop.OpARM64ANDconst {
  8207  			break
  8208  		}
  8209  		c := ssa.AuxIntToInt64(x.AuxInt)
  8210  		y := x.Args[0]
  8211  		if !(x.Uses == 1) {
  8212  			break
  8213  		}
  8214  		v.Reset(ssaop.OpARM64GreaterEqual)
  8215  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64TSTWconst, types.TypeFlags)
  8216  		v0.AuxInt = ssa.Int32ToAuxInt(int32(c))
  8217  		v0.AddArg(y)
  8218  		v.AddArg(v0)
  8219  		return true
  8220  	}
  8221  	// match: (GreaterEqual (CMPWconst [0] z:(AND x y)))
  8222  	// cond: z.Uses == 1
  8223  	// result: (GreaterEqual (TSTW x y))
  8224  	for {
  8225  		if v_0.Op != ssaop.OpARM64CMPWconst || ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
  8226  			break
  8227  		}
  8228  		z := v_0.Args[0]
  8229  		if z.Op != ssaop.OpARM64AND {
  8230  			break
  8231  		}
  8232  		y := z.Args[1]
  8233  		x := z.Args[0]
  8234  		if !(z.Uses == 1) {
  8235  			break
  8236  		}
  8237  		v.Reset(ssaop.OpARM64GreaterEqual)
  8238  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64TSTW, types.TypeFlags)
  8239  		v0.AddArg2(x, y)
  8240  		v.AddArg(v0)
  8241  		return true
  8242  	}
  8243  	// match: (GreaterEqual (CMPconst [0] x:(ANDconst [c] y)))
  8244  	// cond: x.Uses == 1
  8245  	// result: (GreaterEqual (TSTconst [c] y))
  8246  	for {
  8247  		if v_0.Op != ssaop.OpARM64CMPconst || ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
  8248  			break
  8249  		}
  8250  		x := v_0.Args[0]
  8251  		if x.Op != ssaop.OpARM64ANDconst {
  8252  			break
  8253  		}
  8254  		c := ssa.AuxIntToInt64(x.AuxInt)
  8255  		y := x.Args[0]
  8256  		if !(x.Uses == 1) {
  8257  			break
  8258  		}
  8259  		v.Reset(ssaop.OpARM64GreaterEqual)
  8260  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64TSTconst, types.TypeFlags)
  8261  		v0.AuxInt = ssa.Int64ToAuxInt(c)
  8262  		v0.AddArg(y)
  8263  		v.AddArg(v0)
  8264  		return true
  8265  	}
  8266  	// match: (GreaterEqual (CMPconst [0] x:(ADDconst [c] y)))
  8267  	// cond: x.Uses == 1
  8268  	// result: (GreaterEqualNoov (CMNconst [c] y))
  8269  	for {
  8270  		if v_0.Op != ssaop.OpARM64CMPconst || ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
  8271  			break
  8272  		}
  8273  		x := v_0.Args[0]
  8274  		if x.Op != ssaop.OpARM64ADDconst {
  8275  			break
  8276  		}
  8277  		c := ssa.AuxIntToInt64(x.AuxInt)
  8278  		y := x.Args[0]
  8279  		if !(x.Uses == 1) {
  8280  			break
  8281  		}
  8282  		v.Reset(ssaop.OpARM64GreaterEqualNoov)
  8283  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMNconst, types.TypeFlags)
  8284  		v0.AuxInt = ssa.Int64ToAuxInt(c)
  8285  		v0.AddArg(y)
  8286  		v.AddArg(v0)
  8287  		return true
  8288  	}
  8289  	// match: (GreaterEqual (CMPWconst [0] x:(ADDconst [c] y)))
  8290  	// cond: x.Uses == 1
  8291  	// result: (GreaterEqualNoov (CMNWconst [int32(c)] y))
  8292  	for {
  8293  		if v_0.Op != ssaop.OpARM64CMPWconst || ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
  8294  			break
  8295  		}
  8296  		x := v_0.Args[0]
  8297  		if x.Op != ssaop.OpARM64ADDconst {
  8298  			break
  8299  		}
  8300  		c := ssa.AuxIntToInt64(x.AuxInt)
  8301  		y := x.Args[0]
  8302  		if !(x.Uses == 1) {
  8303  			break
  8304  		}
  8305  		v.Reset(ssaop.OpARM64GreaterEqualNoov)
  8306  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMNWconst, types.TypeFlags)
  8307  		v0.AuxInt = ssa.Int32ToAuxInt(int32(c))
  8308  		v0.AddArg(y)
  8309  		v.AddArg(v0)
  8310  		return true
  8311  	}
  8312  	// match: (GreaterEqual (CMPconst [0] z:(ADD x y)))
  8313  	// cond: z.Uses == 1
  8314  	// result: (GreaterEqualNoov (CMN x y))
  8315  	for {
  8316  		if v_0.Op != ssaop.OpARM64CMPconst || ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
  8317  			break
  8318  		}
  8319  		z := v_0.Args[0]
  8320  		if z.Op != ssaop.OpARM64ADD {
  8321  			break
  8322  		}
  8323  		y := z.Args[1]
  8324  		x := z.Args[0]
  8325  		if !(z.Uses == 1) {
  8326  			break
  8327  		}
  8328  		v.Reset(ssaop.OpARM64GreaterEqualNoov)
  8329  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMN, types.TypeFlags)
  8330  		v0.AddArg2(x, y)
  8331  		v.AddArg(v0)
  8332  		return true
  8333  	}
  8334  	// match: (GreaterEqual (CMPWconst [0] z:(ADD x y)))
  8335  	// cond: z.Uses == 1
  8336  	// result: (GreaterEqualNoov (CMNW x y))
  8337  	for {
  8338  		if v_0.Op != ssaop.OpARM64CMPWconst || ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
  8339  			break
  8340  		}
  8341  		z := v_0.Args[0]
  8342  		if z.Op != ssaop.OpARM64ADD {
  8343  			break
  8344  		}
  8345  		y := z.Args[1]
  8346  		x := z.Args[0]
  8347  		if !(z.Uses == 1) {
  8348  			break
  8349  		}
  8350  		v.Reset(ssaop.OpARM64GreaterEqualNoov)
  8351  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMNW, types.TypeFlags)
  8352  		v0.AddArg2(x, y)
  8353  		v.AddArg(v0)
  8354  		return true
  8355  	}
  8356  	// match: (GreaterEqual (CMPconst [0] z:(MADD a x y)))
  8357  	// cond: z.Uses == 1
  8358  	// result: (GreaterEqualNoov (CMN a (MUL <x.Type> x y)))
  8359  	for {
  8360  		if v_0.Op != ssaop.OpARM64CMPconst || ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
  8361  			break
  8362  		}
  8363  		z := v_0.Args[0]
  8364  		if z.Op != ssaop.OpARM64MADD {
  8365  			break
  8366  		}
  8367  		y := z.Args[2]
  8368  		a := z.Args[0]
  8369  		x := z.Args[1]
  8370  		if !(z.Uses == 1) {
  8371  			break
  8372  		}
  8373  		v.Reset(ssaop.OpARM64GreaterEqualNoov)
  8374  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMN, types.TypeFlags)
  8375  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64MUL, x.Type)
  8376  		v1.AddArg2(x, y)
  8377  		v0.AddArg2(a, v1)
  8378  		v.AddArg(v0)
  8379  		return true
  8380  	}
  8381  	// match: (GreaterEqual (CMPWconst [0] z:(MADDW a x y)))
  8382  	// cond: z.Uses == 1
  8383  	// result: (GreaterEqualNoov (CMNW a (MULW <x.Type> x y)))
  8384  	for {
  8385  		if v_0.Op != ssaop.OpARM64CMPWconst || ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
  8386  			break
  8387  		}
  8388  		z := v_0.Args[0]
  8389  		if z.Op != ssaop.OpARM64MADDW {
  8390  			break
  8391  		}
  8392  		y := z.Args[2]
  8393  		a := z.Args[0]
  8394  		x := z.Args[1]
  8395  		if !(z.Uses == 1) {
  8396  			break
  8397  		}
  8398  		v.Reset(ssaop.OpARM64GreaterEqualNoov)
  8399  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMNW, types.TypeFlags)
  8400  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64MULW, x.Type)
  8401  		v1.AddArg2(x, y)
  8402  		v0.AddArg2(a, v1)
  8403  		v.AddArg(v0)
  8404  		return true
  8405  	}
  8406  	// match: (GreaterEqual (FlagConstant [fc]))
  8407  	// result: (MOVDconst [ssa.B2i(fc.Ge())])
  8408  	for {
  8409  		if v_0.Op != ssaop.OpARM64FlagConstant {
  8410  			break
  8411  		}
  8412  		fc := ssa.AuxIntToFlagConstant(v_0.AuxInt)
  8413  		v.Reset(ssaop.OpARM64MOVDconst)
  8414  		v.AuxInt = ssa.Int64ToAuxInt(ssa.B2i(fc.Ge()))
  8415  		return true
  8416  	}
  8417  	// match: (GreaterEqual (InvertFlags x))
  8418  	// result: (LessEqual x)
  8419  	for {
  8420  		if v_0.Op != ssaop.OpARM64InvertFlags {
  8421  			break
  8422  		}
  8423  		x := v_0.Args[0]
  8424  		v.Reset(ssaop.OpARM64LessEqual)
  8425  		v.AddArg(x)
  8426  		return true
  8427  	}
  8428  	// match: (GreaterEqual (CMPconst x [0]))
  8429  	// result: (XORconst [1] (SRLconst <v.Type> [63] x))
  8430  	for {
  8431  		if v_0.Op != ssaop.OpARM64CMPconst || ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
  8432  			break
  8433  		}
  8434  		x := v_0.Args[0]
  8435  		v.Reset(ssaop.OpARM64XORconst)
  8436  		v.AuxInt = ssa.Int64ToAuxInt(1)
  8437  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SRLconst, v.Type)
  8438  		v0.AuxInt = ssa.Int64ToAuxInt(63)
  8439  		v0.AddArg(x)
  8440  		v.AddArg(v0)
  8441  		return true
  8442  	}
  8443  	// match: (GreaterEqual (CMPWconst x [0]))
  8444  	// result: (XORconst [1] (UBFX <v.Type> [ssa.ArmBFAuxInt(31,1)] x))
  8445  	for {
  8446  		if v_0.Op != ssaop.OpARM64CMPWconst || ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
  8447  			break
  8448  		}
  8449  		x := v_0.Args[0]
  8450  		v.Reset(ssaop.OpARM64XORconst)
  8451  		v.AuxInt = ssa.Int64ToAuxInt(1)
  8452  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64UBFX, v.Type)
  8453  		v0.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(31, 1))
  8454  		v0.AddArg(x)
  8455  		v.AddArg(v0)
  8456  		return true
  8457  	}
  8458  	return false
  8459  }
  8460  func rewriteValue_OpARM64GreaterEqualF(v *ssa.Value) bool {
  8461  	v_0 := v.Args[0]
  8462  	// match: (GreaterEqualF (InvertFlags x))
  8463  	// result: (LessEqualF x)
  8464  	for {
  8465  		if v_0.Op != ssaop.OpARM64InvertFlags {
  8466  			break
  8467  		}
  8468  		x := v_0.Args[0]
  8469  		v.Reset(ssaop.OpARM64LessEqualF)
  8470  		v.AddArg(x)
  8471  		return true
  8472  	}
  8473  	return false
  8474  }
  8475  func rewriteValue_OpARM64GreaterEqualNoov(v *ssa.Value) bool {
  8476  	v_0 := v.Args[0]
  8477  	// match: (GreaterEqualNoov (FlagConstant [fc]))
  8478  	// result: (MOVDconst [ssa.B2i(fc.GeNoov())])
  8479  	for {
  8480  		if v_0.Op != ssaop.OpARM64FlagConstant {
  8481  			break
  8482  		}
  8483  		fc := ssa.AuxIntToFlagConstant(v_0.AuxInt)
  8484  		v.Reset(ssaop.OpARM64MOVDconst)
  8485  		v.AuxInt = ssa.Int64ToAuxInt(ssa.B2i(fc.GeNoov()))
  8486  		return true
  8487  	}
  8488  	return false
  8489  }
  8490  func rewriteValue_OpARM64GreaterEqualU(v *ssa.Value) bool {
  8491  	v_0 := v.Args[0]
  8492  	// match: (GreaterEqualU (FlagConstant [fc]))
  8493  	// result: (MOVDconst [ssa.B2i(fc.Uge())])
  8494  	for {
  8495  		if v_0.Op != ssaop.OpARM64FlagConstant {
  8496  			break
  8497  		}
  8498  		fc := ssa.AuxIntToFlagConstant(v_0.AuxInt)
  8499  		v.Reset(ssaop.OpARM64MOVDconst)
  8500  		v.AuxInt = ssa.Int64ToAuxInt(ssa.B2i(fc.Uge()))
  8501  		return true
  8502  	}
  8503  	// match: (GreaterEqualU (InvertFlags x))
  8504  	// result: (LessEqualU x)
  8505  	for {
  8506  		if v_0.Op != ssaop.OpARM64InvertFlags {
  8507  			break
  8508  		}
  8509  		x := v_0.Args[0]
  8510  		v.Reset(ssaop.OpARM64LessEqualU)
  8511  		v.AddArg(x)
  8512  		return true
  8513  	}
  8514  	return false
  8515  }
  8516  func rewriteValue_OpARM64GreaterThan(v *ssa.Value) bool {
  8517  	v_0 := v.Args[0]
  8518  	b := v.Block
  8519  	// match: (GreaterThan (CMPconst [0] z:(AND x y)))
  8520  	// cond: z.Uses == 1
  8521  	// result: (GreaterThan (TST x y))
  8522  	for {
  8523  		if v_0.Op != ssaop.OpARM64CMPconst || ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
  8524  			break
  8525  		}
  8526  		z := v_0.Args[0]
  8527  		if z.Op != ssaop.OpARM64AND {
  8528  			break
  8529  		}
  8530  		y := z.Args[1]
  8531  		x := z.Args[0]
  8532  		if !(z.Uses == 1) {
  8533  			break
  8534  		}
  8535  		v.Reset(ssaop.OpARM64GreaterThan)
  8536  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64TST, types.TypeFlags)
  8537  		v0.AddArg2(x, y)
  8538  		v.AddArg(v0)
  8539  		return true
  8540  	}
  8541  	// match: (GreaterThan (CMPWconst [0] x:(ANDconst [c] y)))
  8542  	// cond: x.Uses == 1
  8543  	// result: (GreaterThan (TSTWconst [int32(c)] y))
  8544  	for {
  8545  		if v_0.Op != ssaop.OpARM64CMPWconst || ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
  8546  			break
  8547  		}
  8548  		x := v_0.Args[0]
  8549  		if x.Op != ssaop.OpARM64ANDconst {
  8550  			break
  8551  		}
  8552  		c := ssa.AuxIntToInt64(x.AuxInt)
  8553  		y := x.Args[0]
  8554  		if !(x.Uses == 1) {
  8555  			break
  8556  		}
  8557  		v.Reset(ssaop.OpARM64GreaterThan)
  8558  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64TSTWconst, types.TypeFlags)
  8559  		v0.AuxInt = ssa.Int32ToAuxInt(int32(c))
  8560  		v0.AddArg(y)
  8561  		v.AddArg(v0)
  8562  		return true
  8563  	}
  8564  	// match: (GreaterThan (CMPWconst [0] z:(AND x y)))
  8565  	// cond: z.Uses == 1
  8566  	// result: (GreaterThan (TSTW x y))
  8567  	for {
  8568  		if v_0.Op != ssaop.OpARM64CMPWconst || ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
  8569  			break
  8570  		}
  8571  		z := v_0.Args[0]
  8572  		if z.Op != ssaop.OpARM64AND {
  8573  			break
  8574  		}
  8575  		y := z.Args[1]
  8576  		x := z.Args[0]
  8577  		if !(z.Uses == 1) {
  8578  			break
  8579  		}
  8580  		v.Reset(ssaop.OpARM64GreaterThan)
  8581  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64TSTW, types.TypeFlags)
  8582  		v0.AddArg2(x, y)
  8583  		v.AddArg(v0)
  8584  		return true
  8585  	}
  8586  	// match: (GreaterThan (CMPconst [0] x:(ANDconst [c] y)))
  8587  	// cond: x.Uses == 1
  8588  	// result: (GreaterThan (TSTconst [c] y))
  8589  	for {
  8590  		if v_0.Op != ssaop.OpARM64CMPconst || ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
  8591  			break
  8592  		}
  8593  		x := v_0.Args[0]
  8594  		if x.Op != ssaop.OpARM64ANDconst {
  8595  			break
  8596  		}
  8597  		c := ssa.AuxIntToInt64(x.AuxInt)
  8598  		y := x.Args[0]
  8599  		if !(x.Uses == 1) {
  8600  			break
  8601  		}
  8602  		v.Reset(ssaop.OpARM64GreaterThan)
  8603  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64TSTconst, types.TypeFlags)
  8604  		v0.AuxInt = ssa.Int64ToAuxInt(c)
  8605  		v0.AddArg(y)
  8606  		v.AddArg(v0)
  8607  		return true
  8608  	}
  8609  	// match: (GreaterThan (FlagConstant [fc]))
  8610  	// result: (MOVDconst [ssa.B2i(fc.Gt())])
  8611  	for {
  8612  		if v_0.Op != ssaop.OpARM64FlagConstant {
  8613  			break
  8614  		}
  8615  		fc := ssa.AuxIntToFlagConstant(v_0.AuxInt)
  8616  		v.Reset(ssaop.OpARM64MOVDconst)
  8617  		v.AuxInt = ssa.Int64ToAuxInt(ssa.B2i(fc.Gt()))
  8618  		return true
  8619  	}
  8620  	// match: (GreaterThan (InvertFlags x))
  8621  	// result: (LessThan x)
  8622  	for {
  8623  		if v_0.Op != ssaop.OpARM64InvertFlags {
  8624  			break
  8625  		}
  8626  		x := v_0.Args[0]
  8627  		v.Reset(ssaop.OpARM64LessThan)
  8628  		v.AddArg(x)
  8629  		return true
  8630  	}
  8631  	return false
  8632  }
  8633  func rewriteValue_OpARM64GreaterThanF(v *ssa.Value) bool {
  8634  	v_0 := v.Args[0]
  8635  	// match: (GreaterThanF (InvertFlags x))
  8636  	// result: (LessThanF x)
  8637  	for {
  8638  		if v_0.Op != ssaop.OpARM64InvertFlags {
  8639  			break
  8640  		}
  8641  		x := v_0.Args[0]
  8642  		v.Reset(ssaop.OpARM64LessThanF)
  8643  		v.AddArg(x)
  8644  		return true
  8645  	}
  8646  	return false
  8647  }
  8648  func rewriteValue_OpARM64GreaterThanU(v *ssa.Value) bool {
  8649  	v_0 := v.Args[0]
  8650  	// match: (GreaterThanU (FlagConstant [fc]))
  8651  	// result: (MOVDconst [ssa.B2i(fc.Ugt())])
  8652  	for {
  8653  		if v_0.Op != ssaop.OpARM64FlagConstant {
  8654  			break
  8655  		}
  8656  		fc := ssa.AuxIntToFlagConstant(v_0.AuxInt)
  8657  		v.Reset(ssaop.OpARM64MOVDconst)
  8658  		v.AuxInt = ssa.Int64ToAuxInt(ssa.B2i(fc.Ugt()))
  8659  		return true
  8660  	}
  8661  	// match: (GreaterThanU (InvertFlags x))
  8662  	// result: (LessThanU x)
  8663  	for {
  8664  		if v_0.Op != ssaop.OpARM64InvertFlags {
  8665  			break
  8666  		}
  8667  		x := v_0.Args[0]
  8668  		v.Reset(ssaop.OpARM64LessThanU)
  8669  		v.AddArg(x)
  8670  		return true
  8671  	}
  8672  	return false
  8673  }
  8674  func rewriteValue_OpARM64LDP(v *ssa.Value) bool {
  8675  	v_1 := v.Args[1]
  8676  	v_0 := v.Args[0]
  8677  	b := v.Block
  8678  	config := b.Func.Config
  8679  	// match: (LDP [off1] {sym} (ADDconst [off2] ptr) mem)
  8680  	// cond: ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)
  8681  	// result: (LDP [off1+int32(off2)] {sym} ptr mem)
  8682  	for {
  8683  		off1 := ssa.AuxIntToInt32(v.AuxInt)
  8684  		sym := ssa.AuxToSym(v.Aux)
  8685  		if v_0.Op != ssaop.OpARM64ADDconst {
  8686  			break
  8687  		}
  8688  		off2 := ssa.AuxIntToInt64(v_0.AuxInt)
  8689  		ptr := v_0.Args[0]
  8690  		mem := v_1
  8691  		if !(ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)) {
  8692  			break
  8693  		}
  8694  		v.Reset(ssaop.OpARM64LDP)
  8695  		v.AuxInt = ssa.Int32ToAuxInt(off1 + int32(off2))
  8696  		v.Aux = ssa.SymToAux(sym)
  8697  		v.AddArg2(ptr, mem)
  8698  		return true
  8699  	}
  8700  	// match: (LDP [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) mem)
  8701  	// cond: ssa.CanMergeSym(sym1,sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)
  8702  	// result: (LDP [off1+off2] {ssa.MergeSym(sym1,sym2)} ptr mem)
  8703  	for {
  8704  		off1 := ssa.AuxIntToInt32(v.AuxInt)
  8705  		sym1 := ssa.AuxToSym(v.Aux)
  8706  		if v_0.Op != ssaop.OpARM64MOVDaddr {
  8707  			break
  8708  		}
  8709  		off2 := ssa.AuxIntToInt32(v_0.AuxInt)
  8710  		sym2 := ssa.AuxToSym(v_0.Aux)
  8711  		ptr := v_0.Args[0]
  8712  		mem := v_1
  8713  		if !(ssa.CanMergeSym(sym1, sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)) {
  8714  			break
  8715  		}
  8716  		v.Reset(ssaop.OpARM64LDP)
  8717  		v.AuxInt = ssa.Int32ToAuxInt(off1 + off2)
  8718  		v.Aux = ssa.SymToAux(ssa.MergeSym(sym1, sym2))
  8719  		v.AddArg2(ptr, mem)
  8720  		return true
  8721  	}
  8722  	return false
  8723  }
  8724  func rewriteValue_OpARM64LessEqual(v *ssa.Value) bool {
  8725  	v_0 := v.Args[0]
  8726  	b := v.Block
  8727  	// match: (LessEqual (CMPconst [0] z:(AND x y)))
  8728  	// cond: z.Uses == 1
  8729  	// result: (LessEqual (TST x y))
  8730  	for {
  8731  		if v_0.Op != ssaop.OpARM64CMPconst || ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
  8732  			break
  8733  		}
  8734  		z := v_0.Args[0]
  8735  		if z.Op != ssaop.OpARM64AND {
  8736  			break
  8737  		}
  8738  		y := z.Args[1]
  8739  		x := z.Args[0]
  8740  		if !(z.Uses == 1) {
  8741  			break
  8742  		}
  8743  		v.Reset(ssaop.OpARM64LessEqual)
  8744  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64TST, types.TypeFlags)
  8745  		v0.AddArg2(x, y)
  8746  		v.AddArg(v0)
  8747  		return true
  8748  	}
  8749  	// match: (LessEqual (CMPWconst [0] x:(ANDconst [c] y)))
  8750  	// cond: x.Uses == 1
  8751  	// result: (LessEqual (TSTWconst [int32(c)] y))
  8752  	for {
  8753  		if v_0.Op != ssaop.OpARM64CMPWconst || ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
  8754  			break
  8755  		}
  8756  		x := v_0.Args[0]
  8757  		if x.Op != ssaop.OpARM64ANDconst {
  8758  			break
  8759  		}
  8760  		c := ssa.AuxIntToInt64(x.AuxInt)
  8761  		y := x.Args[0]
  8762  		if !(x.Uses == 1) {
  8763  			break
  8764  		}
  8765  		v.Reset(ssaop.OpARM64LessEqual)
  8766  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64TSTWconst, types.TypeFlags)
  8767  		v0.AuxInt = ssa.Int32ToAuxInt(int32(c))
  8768  		v0.AddArg(y)
  8769  		v.AddArg(v0)
  8770  		return true
  8771  	}
  8772  	// match: (LessEqual (CMPWconst [0] z:(AND x y)))
  8773  	// cond: z.Uses == 1
  8774  	// result: (LessEqual (TSTW x y))
  8775  	for {
  8776  		if v_0.Op != ssaop.OpARM64CMPWconst || ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
  8777  			break
  8778  		}
  8779  		z := v_0.Args[0]
  8780  		if z.Op != ssaop.OpARM64AND {
  8781  			break
  8782  		}
  8783  		y := z.Args[1]
  8784  		x := z.Args[0]
  8785  		if !(z.Uses == 1) {
  8786  			break
  8787  		}
  8788  		v.Reset(ssaop.OpARM64LessEqual)
  8789  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64TSTW, types.TypeFlags)
  8790  		v0.AddArg2(x, y)
  8791  		v.AddArg(v0)
  8792  		return true
  8793  	}
  8794  	// match: (LessEqual (CMPconst [0] x:(ANDconst [c] y)))
  8795  	// cond: x.Uses == 1
  8796  	// result: (LessEqual (TSTconst [c] y))
  8797  	for {
  8798  		if v_0.Op != ssaop.OpARM64CMPconst || ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
  8799  			break
  8800  		}
  8801  		x := v_0.Args[0]
  8802  		if x.Op != ssaop.OpARM64ANDconst {
  8803  			break
  8804  		}
  8805  		c := ssa.AuxIntToInt64(x.AuxInt)
  8806  		y := x.Args[0]
  8807  		if !(x.Uses == 1) {
  8808  			break
  8809  		}
  8810  		v.Reset(ssaop.OpARM64LessEqual)
  8811  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64TSTconst, types.TypeFlags)
  8812  		v0.AuxInt = ssa.Int64ToAuxInt(c)
  8813  		v0.AddArg(y)
  8814  		v.AddArg(v0)
  8815  		return true
  8816  	}
  8817  	// match: (LessEqual (FlagConstant [fc]))
  8818  	// result: (MOVDconst [ssa.B2i(fc.Le())])
  8819  	for {
  8820  		if v_0.Op != ssaop.OpARM64FlagConstant {
  8821  			break
  8822  		}
  8823  		fc := ssa.AuxIntToFlagConstant(v_0.AuxInt)
  8824  		v.Reset(ssaop.OpARM64MOVDconst)
  8825  		v.AuxInt = ssa.Int64ToAuxInt(ssa.B2i(fc.Le()))
  8826  		return true
  8827  	}
  8828  	// match: (LessEqual (InvertFlags x))
  8829  	// result: (GreaterEqual x)
  8830  	for {
  8831  		if v_0.Op != ssaop.OpARM64InvertFlags {
  8832  			break
  8833  		}
  8834  		x := v_0.Args[0]
  8835  		v.Reset(ssaop.OpARM64GreaterEqual)
  8836  		v.AddArg(x)
  8837  		return true
  8838  	}
  8839  	return false
  8840  }
  8841  func rewriteValue_OpARM64LessEqualF(v *ssa.Value) bool {
  8842  	v_0 := v.Args[0]
  8843  	// match: (LessEqualF (InvertFlags x))
  8844  	// result: (GreaterEqualF x)
  8845  	for {
  8846  		if v_0.Op != ssaop.OpARM64InvertFlags {
  8847  			break
  8848  		}
  8849  		x := v_0.Args[0]
  8850  		v.Reset(ssaop.OpARM64GreaterEqualF)
  8851  		v.AddArg(x)
  8852  		return true
  8853  	}
  8854  	return false
  8855  }
  8856  func rewriteValue_OpARM64LessEqualU(v *ssa.Value) bool {
  8857  	v_0 := v.Args[0]
  8858  	// match: (LessEqualU (FlagConstant [fc]))
  8859  	// result: (MOVDconst [ssa.B2i(fc.Ule())])
  8860  	for {
  8861  		if v_0.Op != ssaop.OpARM64FlagConstant {
  8862  			break
  8863  		}
  8864  		fc := ssa.AuxIntToFlagConstant(v_0.AuxInt)
  8865  		v.Reset(ssaop.OpARM64MOVDconst)
  8866  		v.AuxInt = ssa.Int64ToAuxInt(ssa.B2i(fc.Ule()))
  8867  		return true
  8868  	}
  8869  	// match: (LessEqualU (InvertFlags x))
  8870  	// result: (GreaterEqualU x)
  8871  	for {
  8872  		if v_0.Op != ssaop.OpARM64InvertFlags {
  8873  			break
  8874  		}
  8875  		x := v_0.Args[0]
  8876  		v.Reset(ssaop.OpARM64GreaterEqualU)
  8877  		v.AddArg(x)
  8878  		return true
  8879  	}
  8880  	return false
  8881  }
  8882  func rewriteValue_OpARM64LessThan(v *ssa.Value) bool {
  8883  	v_0 := v.Args[0]
  8884  	b := v.Block
  8885  	// match: (LessThan (CMPconst [0] z:(AND x y)))
  8886  	// cond: z.Uses == 1
  8887  	// result: (LessThan (TST x y))
  8888  	for {
  8889  		if v_0.Op != ssaop.OpARM64CMPconst || ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
  8890  			break
  8891  		}
  8892  		z := v_0.Args[0]
  8893  		if z.Op != ssaop.OpARM64AND {
  8894  			break
  8895  		}
  8896  		y := z.Args[1]
  8897  		x := z.Args[0]
  8898  		if !(z.Uses == 1) {
  8899  			break
  8900  		}
  8901  		v.Reset(ssaop.OpARM64LessThan)
  8902  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64TST, types.TypeFlags)
  8903  		v0.AddArg2(x, y)
  8904  		v.AddArg(v0)
  8905  		return true
  8906  	}
  8907  	// match: (LessThan (CMPWconst [0] x:(ANDconst [c] y)))
  8908  	// cond: x.Uses == 1
  8909  	// result: (LessThan (TSTWconst [int32(c)] y))
  8910  	for {
  8911  		if v_0.Op != ssaop.OpARM64CMPWconst || ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
  8912  			break
  8913  		}
  8914  		x := v_0.Args[0]
  8915  		if x.Op != ssaop.OpARM64ANDconst {
  8916  			break
  8917  		}
  8918  		c := ssa.AuxIntToInt64(x.AuxInt)
  8919  		y := x.Args[0]
  8920  		if !(x.Uses == 1) {
  8921  			break
  8922  		}
  8923  		v.Reset(ssaop.OpARM64LessThan)
  8924  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64TSTWconst, types.TypeFlags)
  8925  		v0.AuxInt = ssa.Int32ToAuxInt(int32(c))
  8926  		v0.AddArg(y)
  8927  		v.AddArg(v0)
  8928  		return true
  8929  	}
  8930  	// match: (LessThan (CMPWconst [0] z:(AND x y)))
  8931  	// cond: z.Uses == 1
  8932  	// result: (LessThan (TSTW x y))
  8933  	for {
  8934  		if v_0.Op != ssaop.OpARM64CMPWconst || ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
  8935  			break
  8936  		}
  8937  		z := v_0.Args[0]
  8938  		if z.Op != ssaop.OpARM64AND {
  8939  			break
  8940  		}
  8941  		y := z.Args[1]
  8942  		x := z.Args[0]
  8943  		if !(z.Uses == 1) {
  8944  			break
  8945  		}
  8946  		v.Reset(ssaop.OpARM64LessThan)
  8947  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64TSTW, types.TypeFlags)
  8948  		v0.AddArg2(x, y)
  8949  		v.AddArg(v0)
  8950  		return true
  8951  	}
  8952  	// match: (LessThan (CMPconst [0] x:(ANDconst [c] y)))
  8953  	// cond: x.Uses == 1
  8954  	// result: (LessThan (TSTconst [c] y))
  8955  	for {
  8956  		if v_0.Op != ssaop.OpARM64CMPconst || ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
  8957  			break
  8958  		}
  8959  		x := v_0.Args[0]
  8960  		if x.Op != ssaop.OpARM64ANDconst {
  8961  			break
  8962  		}
  8963  		c := ssa.AuxIntToInt64(x.AuxInt)
  8964  		y := x.Args[0]
  8965  		if !(x.Uses == 1) {
  8966  			break
  8967  		}
  8968  		v.Reset(ssaop.OpARM64LessThan)
  8969  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64TSTconst, types.TypeFlags)
  8970  		v0.AuxInt = ssa.Int64ToAuxInt(c)
  8971  		v0.AddArg(y)
  8972  		v.AddArg(v0)
  8973  		return true
  8974  	}
  8975  	// match: (LessThan (CMPconst [0] x:(ADDconst [c] y)))
  8976  	// cond: x.Uses == 1
  8977  	// result: (LessThanNoov (CMNconst [c] y))
  8978  	for {
  8979  		if v_0.Op != ssaop.OpARM64CMPconst || ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
  8980  			break
  8981  		}
  8982  		x := v_0.Args[0]
  8983  		if x.Op != ssaop.OpARM64ADDconst {
  8984  			break
  8985  		}
  8986  		c := ssa.AuxIntToInt64(x.AuxInt)
  8987  		y := x.Args[0]
  8988  		if !(x.Uses == 1) {
  8989  			break
  8990  		}
  8991  		v.Reset(ssaop.OpARM64LessThanNoov)
  8992  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMNconst, types.TypeFlags)
  8993  		v0.AuxInt = ssa.Int64ToAuxInt(c)
  8994  		v0.AddArg(y)
  8995  		v.AddArg(v0)
  8996  		return true
  8997  	}
  8998  	// match: (LessThan (CMPWconst [0] x:(ADDconst [c] y)))
  8999  	// cond: x.Uses == 1
  9000  	// result: (LessThanNoov (CMNWconst [int32(c)] y))
  9001  	for {
  9002  		if v_0.Op != ssaop.OpARM64CMPWconst || ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
  9003  			break
  9004  		}
  9005  		x := v_0.Args[0]
  9006  		if x.Op != ssaop.OpARM64ADDconst {
  9007  			break
  9008  		}
  9009  		c := ssa.AuxIntToInt64(x.AuxInt)
  9010  		y := x.Args[0]
  9011  		if !(x.Uses == 1) {
  9012  			break
  9013  		}
  9014  		v.Reset(ssaop.OpARM64LessThanNoov)
  9015  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMNWconst, types.TypeFlags)
  9016  		v0.AuxInt = ssa.Int32ToAuxInt(int32(c))
  9017  		v0.AddArg(y)
  9018  		v.AddArg(v0)
  9019  		return true
  9020  	}
  9021  	// match: (LessThan (CMPconst [0] z:(ADD x y)))
  9022  	// cond: z.Uses == 1
  9023  	// result: (LessThanNoov (CMN x y))
  9024  	for {
  9025  		if v_0.Op != ssaop.OpARM64CMPconst || ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
  9026  			break
  9027  		}
  9028  		z := v_0.Args[0]
  9029  		if z.Op != ssaop.OpARM64ADD {
  9030  			break
  9031  		}
  9032  		y := z.Args[1]
  9033  		x := z.Args[0]
  9034  		if !(z.Uses == 1) {
  9035  			break
  9036  		}
  9037  		v.Reset(ssaop.OpARM64LessThanNoov)
  9038  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMN, types.TypeFlags)
  9039  		v0.AddArg2(x, y)
  9040  		v.AddArg(v0)
  9041  		return true
  9042  	}
  9043  	// match: (LessThan (CMPWconst [0] z:(ADD x y)))
  9044  	// cond: z.Uses == 1
  9045  	// result: (LessThanNoov (CMNW x y))
  9046  	for {
  9047  		if v_0.Op != ssaop.OpARM64CMPWconst || ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
  9048  			break
  9049  		}
  9050  		z := v_0.Args[0]
  9051  		if z.Op != ssaop.OpARM64ADD {
  9052  			break
  9053  		}
  9054  		y := z.Args[1]
  9055  		x := z.Args[0]
  9056  		if !(z.Uses == 1) {
  9057  			break
  9058  		}
  9059  		v.Reset(ssaop.OpARM64LessThanNoov)
  9060  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMNW, types.TypeFlags)
  9061  		v0.AddArg2(x, y)
  9062  		v.AddArg(v0)
  9063  		return true
  9064  	}
  9065  	// match: (LessThan (CMPconst [0] z:(MADD a x y)))
  9066  	// cond: z.Uses == 1
  9067  	// result: (LessThanNoov (CMN a (MUL <x.Type> x y)))
  9068  	for {
  9069  		if v_0.Op != ssaop.OpARM64CMPconst || ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
  9070  			break
  9071  		}
  9072  		z := v_0.Args[0]
  9073  		if z.Op != ssaop.OpARM64MADD {
  9074  			break
  9075  		}
  9076  		y := z.Args[2]
  9077  		a := z.Args[0]
  9078  		x := z.Args[1]
  9079  		if !(z.Uses == 1) {
  9080  			break
  9081  		}
  9082  		v.Reset(ssaop.OpARM64LessThanNoov)
  9083  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMN, types.TypeFlags)
  9084  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64MUL, x.Type)
  9085  		v1.AddArg2(x, y)
  9086  		v0.AddArg2(a, v1)
  9087  		v.AddArg(v0)
  9088  		return true
  9089  	}
  9090  	// match: (LessThan (CMPWconst [0] z:(MADDW a x y)))
  9091  	// cond: z.Uses == 1
  9092  	// result: (LessThanNoov (CMNW a (MULW <x.Type> x y)))
  9093  	for {
  9094  		if v_0.Op != ssaop.OpARM64CMPWconst || ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
  9095  			break
  9096  		}
  9097  		z := v_0.Args[0]
  9098  		if z.Op != ssaop.OpARM64MADDW {
  9099  			break
  9100  		}
  9101  		y := z.Args[2]
  9102  		a := z.Args[0]
  9103  		x := z.Args[1]
  9104  		if !(z.Uses == 1) {
  9105  			break
  9106  		}
  9107  		v.Reset(ssaop.OpARM64LessThanNoov)
  9108  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMNW, types.TypeFlags)
  9109  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64MULW, x.Type)
  9110  		v1.AddArg2(x, y)
  9111  		v0.AddArg2(a, v1)
  9112  		v.AddArg(v0)
  9113  		return true
  9114  	}
  9115  	// match: (LessThan (FlagConstant [fc]))
  9116  	// result: (MOVDconst [ssa.B2i(fc.Lt())])
  9117  	for {
  9118  		if v_0.Op != ssaop.OpARM64FlagConstant {
  9119  			break
  9120  		}
  9121  		fc := ssa.AuxIntToFlagConstant(v_0.AuxInt)
  9122  		v.Reset(ssaop.OpARM64MOVDconst)
  9123  		v.AuxInt = ssa.Int64ToAuxInt(ssa.B2i(fc.Lt()))
  9124  		return true
  9125  	}
  9126  	// match: (LessThan (InvertFlags x))
  9127  	// result: (GreaterThan x)
  9128  	for {
  9129  		if v_0.Op != ssaop.OpARM64InvertFlags {
  9130  			break
  9131  		}
  9132  		x := v_0.Args[0]
  9133  		v.Reset(ssaop.OpARM64GreaterThan)
  9134  		v.AddArg(x)
  9135  		return true
  9136  	}
  9137  	// match: (LessThan (CMPconst x [0]))
  9138  	// result: (SRLconst [63] x)
  9139  	for {
  9140  		if v_0.Op != ssaop.OpARM64CMPconst || ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
  9141  			break
  9142  		}
  9143  		x := v_0.Args[0]
  9144  		v.Reset(ssaop.OpARM64SRLconst)
  9145  		v.AuxInt = ssa.Int64ToAuxInt(63)
  9146  		v.AddArg(x)
  9147  		return true
  9148  	}
  9149  	// match: (LessThan (CMPWconst x [0]))
  9150  	// result: (UBFX [ssa.ArmBFAuxInt(31,1)] x)
  9151  	for {
  9152  		if v_0.Op != ssaop.OpARM64CMPWconst || ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
  9153  			break
  9154  		}
  9155  		x := v_0.Args[0]
  9156  		v.Reset(ssaop.OpARM64UBFX)
  9157  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(31, 1))
  9158  		v.AddArg(x)
  9159  		return true
  9160  	}
  9161  	return false
  9162  }
  9163  func rewriteValue_OpARM64LessThanF(v *ssa.Value) bool {
  9164  	v_0 := v.Args[0]
  9165  	// match: (LessThanF (InvertFlags x))
  9166  	// result: (GreaterThanF x)
  9167  	for {
  9168  		if v_0.Op != ssaop.OpARM64InvertFlags {
  9169  			break
  9170  		}
  9171  		x := v_0.Args[0]
  9172  		v.Reset(ssaop.OpARM64GreaterThanF)
  9173  		v.AddArg(x)
  9174  		return true
  9175  	}
  9176  	return false
  9177  }
  9178  func rewriteValue_OpARM64LessThanNoov(v *ssa.Value) bool {
  9179  	v_0 := v.Args[0]
  9180  	// match: (LessThanNoov (FlagConstant [fc]))
  9181  	// result: (MOVDconst [ssa.B2i(fc.LtNoov())])
  9182  	for {
  9183  		if v_0.Op != ssaop.OpARM64FlagConstant {
  9184  			break
  9185  		}
  9186  		fc := ssa.AuxIntToFlagConstant(v_0.AuxInt)
  9187  		v.Reset(ssaop.OpARM64MOVDconst)
  9188  		v.AuxInt = ssa.Int64ToAuxInt(ssa.B2i(fc.LtNoov()))
  9189  		return true
  9190  	}
  9191  	return false
  9192  }
  9193  func rewriteValue_OpARM64LessThanU(v *ssa.Value) bool {
  9194  	v_0 := v.Args[0]
  9195  	// match: (LessThanU (FlagConstant [fc]))
  9196  	// result: (MOVDconst [ssa.B2i(fc.Ult())])
  9197  	for {
  9198  		if v_0.Op != ssaop.OpARM64FlagConstant {
  9199  			break
  9200  		}
  9201  		fc := ssa.AuxIntToFlagConstant(v_0.AuxInt)
  9202  		v.Reset(ssaop.OpARM64MOVDconst)
  9203  		v.AuxInt = ssa.Int64ToAuxInt(ssa.B2i(fc.Ult()))
  9204  		return true
  9205  	}
  9206  	// match: (LessThanU (InvertFlags x))
  9207  	// result: (GreaterThanU x)
  9208  	for {
  9209  		if v_0.Op != ssaop.OpARM64InvertFlags {
  9210  			break
  9211  		}
  9212  		x := v_0.Args[0]
  9213  		v.Reset(ssaop.OpARM64GreaterThanU)
  9214  		v.AddArg(x)
  9215  		return true
  9216  	}
  9217  	return false
  9218  }
  9219  func rewriteValue_OpARM64LoweredPanicBoundsCR(v *ssa.Value) bool {
  9220  	v_1 := v.Args[1]
  9221  	v_0 := v.Args[0]
  9222  	// match: (LoweredPanicBoundsCR [kind] {p} (MOVDconst [c]) mem)
  9223  	// result: (LoweredPanicBoundsCC [kind] {ssa.PanicBoundsCC{Cx:p.C, Cy:c}} mem)
  9224  	for {
  9225  		kind := ssa.AuxIntToInt64(v.AuxInt)
  9226  		p := ssa.AuxToPanicBoundsC(v.Aux)
  9227  		if v_0.Op != ssaop.OpARM64MOVDconst {
  9228  			break
  9229  		}
  9230  		c := ssa.AuxIntToInt64(v_0.AuxInt)
  9231  		mem := v_1
  9232  		v.Reset(ssaop.OpARM64LoweredPanicBoundsCC)
  9233  		v.AuxInt = ssa.Int64ToAuxInt(kind)
  9234  		v.Aux = ssa.PanicBoundsCCToAux(ssa.PanicBoundsCC{Cx: p.C, Cy: c})
  9235  		v.AddArg(mem)
  9236  		return true
  9237  	}
  9238  	return false
  9239  }
  9240  func rewriteValue_OpARM64LoweredPanicBoundsRC(v *ssa.Value) bool {
  9241  	v_1 := v.Args[1]
  9242  	v_0 := v.Args[0]
  9243  	// match: (LoweredPanicBoundsRC [kind] {p} (MOVDconst [c]) mem)
  9244  	// result: (LoweredPanicBoundsCC [kind] {ssa.PanicBoundsCC{Cx:c, Cy:p.C}} mem)
  9245  	for {
  9246  		kind := ssa.AuxIntToInt64(v.AuxInt)
  9247  		p := ssa.AuxToPanicBoundsC(v.Aux)
  9248  		if v_0.Op != ssaop.OpARM64MOVDconst {
  9249  			break
  9250  		}
  9251  		c := ssa.AuxIntToInt64(v_0.AuxInt)
  9252  		mem := v_1
  9253  		v.Reset(ssaop.OpARM64LoweredPanicBoundsCC)
  9254  		v.AuxInt = ssa.Int64ToAuxInt(kind)
  9255  		v.Aux = ssa.PanicBoundsCCToAux(ssa.PanicBoundsCC{Cx: c, Cy: p.C})
  9256  		v.AddArg(mem)
  9257  		return true
  9258  	}
  9259  	return false
  9260  }
  9261  func rewriteValue_OpARM64LoweredPanicBoundsRR(v *ssa.Value) bool {
  9262  	v_2 := v.Args[2]
  9263  	v_1 := v.Args[1]
  9264  	v_0 := v.Args[0]
  9265  	// match: (LoweredPanicBoundsRR [kind] x (MOVDconst [c]) mem)
  9266  	// result: (LoweredPanicBoundsRC [kind] x {ssa.PanicBoundsC{C:c}} mem)
  9267  	for {
  9268  		kind := ssa.AuxIntToInt64(v.AuxInt)
  9269  		x := v_0
  9270  		if v_1.Op != ssaop.OpARM64MOVDconst {
  9271  			break
  9272  		}
  9273  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  9274  		mem := v_2
  9275  		v.Reset(ssaop.OpARM64LoweredPanicBoundsRC)
  9276  		v.AuxInt = ssa.Int64ToAuxInt(kind)
  9277  		v.Aux = ssa.PanicBoundsCToAux(ssa.PanicBoundsC{C: c})
  9278  		v.AddArg2(x, mem)
  9279  		return true
  9280  	}
  9281  	// match: (LoweredPanicBoundsRR [kind] (MOVDconst [c]) y mem)
  9282  	// result: (LoweredPanicBoundsCR [kind] {ssa.PanicBoundsC{C:c}} y mem)
  9283  	for {
  9284  		kind := ssa.AuxIntToInt64(v.AuxInt)
  9285  		if v_0.Op != ssaop.OpARM64MOVDconst {
  9286  			break
  9287  		}
  9288  		c := ssa.AuxIntToInt64(v_0.AuxInt)
  9289  		y := v_1
  9290  		mem := v_2
  9291  		v.Reset(ssaop.OpARM64LoweredPanicBoundsCR)
  9292  		v.AuxInt = ssa.Int64ToAuxInt(kind)
  9293  		v.Aux = ssa.PanicBoundsCToAux(ssa.PanicBoundsC{C: c})
  9294  		v.AddArg2(y, mem)
  9295  		return true
  9296  	}
  9297  	return false
  9298  }
  9299  func rewriteValue_OpARM64MADD(v *ssa.Value) bool {
  9300  	v_2 := v.Args[2]
  9301  	v_1 := v.Args[1]
  9302  	v_0 := v.Args[0]
  9303  	b := v.Block
  9304  	// match: (MADD a x (MOVDconst [-1]))
  9305  	// result: (SUB a x)
  9306  	for {
  9307  		a := v_0
  9308  		x := v_1
  9309  		if v_2.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_2.AuxInt) != -1 {
  9310  			break
  9311  		}
  9312  		v.Reset(ssaop.OpARM64SUB)
  9313  		v.AddArg2(a, x)
  9314  		return true
  9315  	}
  9316  	// match: (MADD a _ (MOVDconst [0]))
  9317  	// result: a
  9318  	for {
  9319  		a := v_0
  9320  		if v_2.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_2.AuxInt) != 0 {
  9321  			break
  9322  		}
  9323  		v.CopyOf(a)
  9324  		return true
  9325  	}
  9326  	// match: (MADD a x (MOVDconst [1]))
  9327  	// result: (ADD a x)
  9328  	for {
  9329  		a := v_0
  9330  		x := v_1
  9331  		if v_2.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_2.AuxInt) != 1 {
  9332  			break
  9333  		}
  9334  		v.Reset(ssaop.OpARM64ADD)
  9335  		v.AddArg2(a, x)
  9336  		return true
  9337  	}
  9338  	// match: (MADD a x (MOVDconst [c]))
  9339  	// cond: ssa.IsPowerOfTwo(c)
  9340  	// result: (ADDshiftLL a x [ssa.Log64(c)])
  9341  	for {
  9342  		a := v_0
  9343  		x := v_1
  9344  		if v_2.Op != ssaop.OpARM64MOVDconst {
  9345  			break
  9346  		}
  9347  		c := ssa.AuxIntToInt64(v_2.AuxInt)
  9348  		if !(ssa.IsPowerOfTwo(c)) {
  9349  			break
  9350  		}
  9351  		v.Reset(ssaop.OpARM64ADDshiftLL)
  9352  		v.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c))
  9353  		v.AddArg2(a, x)
  9354  		return true
  9355  	}
  9356  	// match: (MADD a x (MOVDconst [c]))
  9357  	// cond: ssa.IsPowerOfTwo(c-1) && c>=3
  9358  	// result: (ADD a (ADDshiftLL <x.Type> x x [ssa.Log64(c-1)]))
  9359  	for {
  9360  		a := v_0
  9361  		x := v_1
  9362  		if v_2.Op != ssaop.OpARM64MOVDconst {
  9363  			break
  9364  		}
  9365  		c := ssa.AuxIntToInt64(v_2.AuxInt)
  9366  		if !(ssa.IsPowerOfTwo(c-1) && c >= 3) {
  9367  			break
  9368  		}
  9369  		v.Reset(ssaop.OpARM64ADD)
  9370  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64ADDshiftLL, x.Type)
  9371  		v0.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c - 1))
  9372  		v0.AddArg2(x, x)
  9373  		v.AddArg2(a, v0)
  9374  		return true
  9375  	}
  9376  	// match: (MADD a x (MOVDconst [c]))
  9377  	// cond: ssa.IsPowerOfTwo(c+1) && c>=7
  9378  	// result: (SUB a (SUBshiftLL <x.Type> x x [ssa.Log64(c+1)]))
  9379  	for {
  9380  		a := v_0
  9381  		x := v_1
  9382  		if v_2.Op != ssaop.OpARM64MOVDconst {
  9383  			break
  9384  		}
  9385  		c := ssa.AuxIntToInt64(v_2.AuxInt)
  9386  		if !(ssa.IsPowerOfTwo(c+1) && c >= 7) {
  9387  			break
  9388  		}
  9389  		v.Reset(ssaop.OpARM64SUB)
  9390  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SUBshiftLL, x.Type)
  9391  		v0.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c + 1))
  9392  		v0.AddArg2(x, x)
  9393  		v.AddArg2(a, v0)
  9394  		return true
  9395  	}
  9396  	// match: (MADD a x (MOVDconst [c]))
  9397  	// cond: c%3 == 0 && ssa.IsPowerOfTwo(c/3)
  9398  	// result: (SUBshiftLL a (SUBshiftLL <x.Type> x x [2]) [ssa.Log64(c/3)])
  9399  	for {
  9400  		a := v_0
  9401  		x := v_1
  9402  		if v_2.Op != ssaop.OpARM64MOVDconst {
  9403  			break
  9404  		}
  9405  		c := ssa.AuxIntToInt64(v_2.AuxInt)
  9406  		if !(c%3 == 0 && ssa.IsPowerOfTwo(c/3)) {
  9407  			break
  9408  		}
  9409  		v.Reset(ssaop.OpARM64SUBshiftLL)
  9410  		v.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c / 3))
  9411  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SUBshiftLL, x.Type)
  9412  		v0.AuxInt = ssa.Int64ToAuxInt(2)
  9413  		v0.AddArg2(x, x)
  9414  		v.AddArg2(a, v0)
  9415  		return true
  9416  	}
  9417  	// match: (MADD a x (MOVDconst [c]))
  9418  	// cond: c%5 == 0 && ssa.IsPowerOfTwo(c/5)
  9419  	// result: (ADDshiftLL a (ADDshiftLL <x.Type> x x [2]) [ssa.Log64(c/5)])
  9420  	for {
  9421  		a := v_0
  9422  		x := v_1
  9423  		if v_2.Op != ssaop.OpARM64MOVDconst {
  9424  			break
  9425  		}
  9426  		c := ssa.AuxIntToInt64(v_2.AuxInt)
  9427  		if !(c%5 == 0 && ssa.IsPowerOfTwo(c/5)) {
  9428  			break
  9429  		}
  9430  		v.Reset(ssaop.OpARM64ADDshiftLL)
  9431  		v.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c / 5))
  9432  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64ADDshiftLL, x.Type)
  9433  		v0.AuxInt = ssa.Int64ToAuxInt(2)
  9434  		v0.AddArg2(x, x)
  9435  		v.AddArg2(a, v0)
  9436  		return true
  9437  	}
  9438  	// match: (MADD a x (MOVDconst [c]))
  9439  	// cond: c%7 == 0 && ssa.IsPowerOfTwo(c/7)
  9440  	// result: (SUBshiftLL a (SUBshiftLL <x.Type> x x [3]) [ssa.Log64(c/7)])
  9441  	for {
  9442  		a := v_0
  9443  		x := v_1
  9444  		if v_2.Op != ssaop.OpARM64MOVDconst {
  9445  			break
  9446  		}
  9447  		c := ssa.AuxIntToInt64(v_2.AuxInt)
  9448  		if !(c%7 == 0 && ssa.IsPowerOfTwo(c/7)) {
  9449  			break
  9450  		}
  9451  		v.Reset(ssaop.OpARM64SUBshiftLL)
  9452  		v.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c / 7))
  9453  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SUBshiftLL, x.Type)
  9454  		v0.AuxInt = ssa.Int64ToAuxInt(3)
  9455  		v0.AddArg2(x, x)
  9456  		v.AddArg2(a, v0)
  9457  		return true
  9458  	}
  9459  	// match: (MADD a x (MOVDconst [c]))
  9460  	// cond: c%9 == 0 && ssa.IsPowerOfTwo(c/9)
  9461  	// result: (ADDshiftLL a (ADDshiftLL <x.Type> x x [3]) [ssa.Log64(c/9)])
  9462  	for {
  9463  		a := v_0
  9464  		x := v_1
  9465  		if v_2.Op != ssaop.OpARM64MOVDconst {
  9466  			break
  9467  		}
  9468  		c := ssa.AuxIntToInt64(v_2.AuxInt)
  9469  		if !(c%9 == 0 && ssa.IsPowerOfTwo(c/9)) {
  9470  			break
  9471  		}
  9472  		v.Reset(ssaop.OpARM64ADDshiftLL)
  9473  		v.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c / 9))
  9474  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64ADDshiftLL, x.Type)
  9475  		v0.AuxInt = ssa.Int64ToAuxInt(3)
  9476  		v0.AddArg2(x, x)
  9477  		v.AddArg2(a, v0)
  9478  		return true
  9479  	}
  9480  	// match: (MADD a (MOVDconst [-1]) x)
  9481  	// result: (SUB a x)
  9482  	for {
  9483  		a := v_0
  9484  		if v_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_1.AuxInt) != -1 {
  9485  			break
  9486  		}
  9487  		x := v_2
  9488  		v.Reset(ssaop.OpARM64SUB)
  9489  		v.AddArg2(a, x)
  9490  		return true
  9491  	}
  9492  	// match: (MADD a (MOVDconst [0]) _)
  9493  	// result: a
  9494  	for {
  9495  		a := v_0
  9496  		if v_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_1.AuxInt) != 0 {
  9497  			break
  9498  		}
  9499  		v.CopyOf(a)
  9500  		return true
  9501  	}
  9502  	// match: (MADD a (MOVDconst [1]) x)
  9503  	// result: (ADD a x)
  9504  	for {
  9505  		a := v_0
  9506  		if v_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_1.AuxInt) != 1 {
  9507  			break
  9508  		}
  9509  		x := v_2
  9510  		v.Reset(ssaop.OpARM64ADD)
  9511  		v.AddArg2(a, x)
  9512  		return true
  9513  	}
  9514  	// match: (MADD a (MOVDconst [c]) x)
  9515  	// cond: ssa.IsPowerOfTwo(c)
  9516  	// result: (ADDshiftLL a x [ssa.Log64(c)])
  9517  	for {
  9518  		a := v_0
  9519  		if v_1.Op != ssaop.OpARM64MOVDconst {
  9520  			break
  9521  		}
  9522  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  9523  		x := v_2
  9524  		if !(ssa.IsPowerOfTwo(c)) {
  9525  			break
  9526  		}
  9527  		v.Reset(ssaop.OpARM64ADDshiftLL)
  9528  		v.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c))
  9529  		v.AddArg2(a, x)
  9530  		return true
  9531  	}
  9532  	// match: (MADD a (MOVDconst [c]) x)
  9533  	// cond: ssa.IsPowerOfTwo(c-1) && c>=3
  9534  	// result: (ADD a (ADDshiftLL <x.Type> x x [ssa.Log64(c-1)]))
  9535  	for {
  9536  		a := v_0
  9537  		if v_1.Op != ssaop.OpARM64MOVDconst {
  9538  			break
  9539  		}
  9540  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  9541  		x := v_2
  9542  		if !(ssa.IsPowerOfTwo(c-1) && c >= 3) {
  9543  			break
  9544  		}
  9545  		v.Reset(ssaop.OpARM64ADD)
  9546  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64ADDshiftLL, x.Type)
  9547  		v0.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c - 1))
  9548  		v0.AddArg2(x, x)
  9549  		v.AddArg2(a, v0)
  9550  		return true
  9551  	}
  9552  	// match: (MADD a (MOVDconst [c]) x)
  9553  	// cond: ssa.IsPowerOfTwo(c+1) && c>=7
  9554  	// result: (SUB a (SUBshiftLL <x.Type> x x [ssa.Log64(c+1)]))
  9555  	for {
  9556  		a := v_0
  9557  		if v_1.Op != ssaop.OpARM64MOVDconst {
  9558  			break
  9559  		}
  9560  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  9561  		x := v_2
  9562  		if !(ssa.IsPowerOfTwo(c+1) && c >= 7) {
  9563  			break
  9564  		}
  9565  		v.Reset(ssaop.OpARM64SUB)
  9566  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SUBshiftLL, x.Type)
  9567  		v0.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c + 1))
  9568  		v0.AddArg2(x, x)
  9569  		v.AddArg2(a, v0)
  9570  		return true
  9571  	}
  9572  	// match: (MADD a (MOVDconst [c]) x)
  9573  	// cond: c%3 == 0 && ssa.IsPowerOfTwo(c/3)
  9574  	// result: (SUBshiftLL a (SUBshiftLL <x.Type> x x [2]) [ssa.Log64(c/3)])
  9575  	for {
  9576  		a := v_0
  9577  		if v_1.Op != ssaop.OpARM64MOVDconst {
  9578  			break
  9579  		}
  9580  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  9581  		x := v_2
  9582  		if !(c%3 == 0 && ssa.IsPowerOfTwo(c/3)) {
  9583  			break
  9584  		}
  9585  		v.Reset(ssaop.OpARM64SUBshiftLL)
  9586  		v.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c / 3))
  9587  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SUBshiftLL, x.Type)
  9588  		v0.AuxInt = ssa.Int64ToAuxInt(2)
  9589  		v0.AddArg2(x, x)
  9590  		v.AddArg2(a, v0)
  9591  		return true
  9592  	}
  9593  	// match: (MADD a (MOVDconst [c]) x)
  9594  	// cond: c%5 == 0 && ssa.IsPowerOfTwo(c/5)
  9595  	// result: (ADDshiftLL a (ADDshiftLL <x.Type> x x [2]) [ssa.Log64(c/5)])
  9596  	for {
  9597  		a := v_0
  9598  		if v_1.Op != ssaop.OpARM64MOVDconst {
  9599  			break
  9600  		}
  9601  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  9602  		x := v_2
  9603  		if !(c%5 == 0 && ssa.IsPowerOfTwo(c/5)) {
  9604  			break
  9605  		}
  9606  		v.Reset(ssaop.OpARM64ADDshiftLL)
  9607  		v.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c / 5))
  9608  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64ADDshiftLL, x.Type)
  9609  		v0.AuxInt = ssa.Int64ToAuxInt(2)
  9610  		v0.AddArg2(x, x)
  9611  		v.AddArg2(a, v0)
  9612  		return true
  9613  	}
  9614  	// match: (MADD a (MOVDconst [c]) x)
  9615  	// cond: c%7 == 0 && ssa.IsPowerOfTwo(c/7)
  9616  	// result: (SUBshiftLL a (SUBshiftLL <x.Type> x x [3]) [ssa.Log64(c/7)])
  9617  	for {
  9618  		a := v_0
  9619  		if v_1.Op != ssaop.OpARM64MOVDconst {
  9620  			break
  9621  		}
  9622  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  9623  		x := v_2
  9624  		if !(c%7 == 0 && ssa.IsPowerOfTwo(c/7)) {
  9625  			break
  9626  		}
  9627  		v.Reset(ssaop.OpARM64SUBshiftLL)
  9628  		v.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c / 7))
  9629  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SUBshiftLL, x.Type)
  9630  		v0.AuxInt = ssa.Int64ToAuxInt(3)
  9631  		v0.AddArg2(x, x)
  9632  		v.AddArg2(a, v0)
  9633  		return true
  9634  	}
  9635  	// match: (MADD a (MOVDconst [c]) x)
  9636  	// cond: c%9 == 0 && ssa.IsPowerOfTwo(c/9)
  9637  	// result: (ADDshiftLL a (ADDshiftLL <x.Type> x x [3]) [ssa.Log64(c/9)])
  9638  	for {
  9639  		a := v_0
  9640  		if v_1.Op != ssaop.OpARM64MOVDconst {
  9641  			break
  9642  		}
  9643  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  9644  		x := v_2
  9645  		if !(c%9 == 0 && ssa.IsPowerOfTwo(c/9)) {
  9646  			break
  9647  		}
  9648  		v.Reset(ssaop.OpARM64ADDshiftLL)
  9649  		v.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c / 9))
  9650  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64ADDshiftLL, x.Type)
  9651  		v0.AuxInt = ssa.Int64ToAuxInt(3)
  9652  		v0.AddArg2(x, x)
  9653  		v.AddArg2(a, v0)
  9654  		return true
  9655  	}
  9656  	// match: (MADD (MOVDconst [c]) x y)
  9657  	// result: (ADDconst [c] (MUL <x.Type> x y))
  9658  	for {
  9659  		if v_0.Op != ssaop.OpARM64MOVDconst {
  9660  			break
  9661  		}
  9662  		c := ssa.AuxIntToInt64(v_0.AuxInt)
  9663  		x := v_1
  9664  		y := v_2
  9665  		v.Reset(ssaop.OpARM64ADDconst)
  9666  		v.AuxInt = ssa.Int64ToAuxInt(c)
  9667  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MUL, x.Type)
  9668  		v0.AddArg2(x, y)
  9669  		v.AddArg(v0)
  9670  		return true
  9671  	}
  9672  	// match: (MADD a (MOVDconst [c]) (MOVDconst [d]))
  9673  	// result: (ADDconst [c*d] a)
  9674  	for {
  9675  		a := v_0
  9676  		if v_1.Op != ssaop.OpARM64MOVDconst {
  9677  			break
  9678  		}
  9679  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  9680  		if v_2.Op != ssaop.OpARM64MOVDconst {
  9681  			break
  9682  		}
  9683  		d := ssa.AuxIntToInt64(v_2.AuxInt)
  9684  		v.Reset(ssaop.OpARM64ADDconst)
  9685  		v.AuxInt = ssa.Int64ToAuxInt(c * d)
  9686  		v.AddArg(a)
  9687  		return true
  9688  	}
  9689  	return false
  9690  }
  9691  func rewriteValue_OpARM64MADDW(v *ssa.Value) bool {
  9692  	v_2 := v.Args[2]
  9693  	v_1 := v.Args[1]
  9694  	v_0 := v.Args[0]
  9695  	b := v.Block
  9696  	// match: (MADDW a x (MOVDconst [c]))
  9697  	// cond: int32(c)==-1
  9698  	// result: (MOVWUreg (SUB <a.Type> a x))
  9699  	for {
  9700  		a := v_0
  9701  		x := v_1
  9702  		if v_2.Op != ssaop.OpARM64MOVDconst {
  9703  			break
  9704  		}
  9705  		c := ssa.AuxIntToInt64(v_2.AuxInt)
  9706  		if !(int32(c) == -1) {
  9707  			break
  9708  		}
  9709  		v.Reset(ssaop.OpARM64MOVWUreg)
  9710  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SUB, a.Type)
  9711  		v0.AddArg2(a, x)
  9712  		v.AddArg(v0)
  9713  		return true
  9714  	}
  9715  	// match: (MADDW a _ (MOVDconst [c]))
  9716  	// cond: int32(c)==0
  9717  	// result: (MOVWUreg a)
  9718  	for {
  9719  		a := v_0
  9720  		if v_2.Op != ssaop.OpARM64MOVDconst {
  9721  			break
  9722  		}
  9723  		c := ssa.AuxIntToInt64(v_2.AuxInt)
  9724  		if !(int32(c) == 0) {
  9725  			break
  9726  		}
  9727  		v.Reset(ssaop.OpARM64MOVWUreg)
  9728  		v.AddArg(a)
  9729  		return true
  9730  	}
  9731  	// match: (MADDW a x (MOVDconst [c]))
  9732  	// cond: int32(c)==1
  9733  	// result: (MOVWUreg (ADD <a.Type> a x))
  9734  	for {
  9735  		a := v_0
  9736  		x := v_1
  9737  		if v_2.Op != ssaop.OpARM64MOVDconst {
  9738  			break
  9739  		}
  9740  		c := ssa.AuxIntToInt64(v_2.AuxInt)
  9741  		if !(int32(c) == 1) {
  9742  			break
  9743  		}
  9744  		v.Reset(ssaop.OpARM64MOVWUreg)
  9745  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64ADD, a.Type)
  9746  		v0.AddArg2(a, x)
  9747  		v.AddArg(v0)
  9748  		return true
  9749  	}
  9750  	// match: (MADDW a x (MOVDconst [c]))
  9751  	// cond: ssa.IsPowerOfTwo(c)
  9752  	// result: (MOVWUreg (ADDshiftLL <a.Type> a x [ssa.Log64(c)]))
  9753  	for {
  9754  		a := v_0
  9755  		x := v_1
  9756  		if v_2.Op != ssaop.OpARM64MOVDconst {
  9757  			break
  9758  		}
  9759  		c := ssa.AuxIntToInt64(v_2.AuxInt)
  9760  		if !(ssa.IsPowerOfTwo(c)) {
  9761  			break
  9762  		}
  9763  		v.Reset(ssaop.OpARM64MOVWUreg)
  9764  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64ADDshiftLL, a.Type)
  9765  		v0.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c))
  9766  		v0.AddArg2(a, x)
  9767  		v.AddArg(v0)
  9768  		return true
  9769  	}
  9770  	// match: (MADDW a x (MOVDconst [c]))
  9771  	// cond: ssa.IsPowerOfTwo(c-1) && int32(c)>=3
  9772  	// result: (MOVWUreg (ADD <a.Type> a (ADDshiftLL <x.Type> x x [ssa.Log64(c-1)])))
  9773  	for {
  9774  		a := v_0
  9775  		x := v_1
  9776  		if v_2.Op != ssaop.OpARM64MOVDconst {
  9777  			break
  9778  		}
  9779  		c := ssa.AuxIntToInt64(v_2.AuxInt)
  9780  		if !(ssa.IsPowerOfTwo(c-1) && int32(c) >= 3) {
  9781  			break
  9782  		}
  9783  		v.Reset(ssaop.OpARM64MOVWUreg)
  9784  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64ADD, a.Type)
  9785  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64ADDshiftLL, x.Type)
  9786  		v1.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c - 1))
  9787  		v1.AddArg2(x, x)
  9788  		v0.AddArg2(a, v1)
  9789  		v.AddArg(v0)
  9790  		return true
  9791  	}
  9792  	// match: (MADDW a x (MOVDconst [c]))
  9793  	// cond: ssa.IsPowerOfTwo(c+1) && int32(c)>=7
  9794  	// result: (MOVWUreg (SUB <a.Type> a (SUBshiftLL <x.Type> x x [ssa.Log64(c+1)])))
  9795  	for {
  9796  		a := v_0
  9797  		x := v_1
  9798  		if v_2.Op != ssaop.OpARM64MOVDconst {
  9799  			break
  9800  		}
  9801  		c := ssa.AuxIntToInt64(v_2.AuxInt)
  9802  		if !(ssa.IsPowerOfTwo(c+1) && int32(c) >= 7) {
  9803  			break
  9804  		}
  9805  		v.Reset(ssaop.OpARM64MOVWUreg)
  9806  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SUB, a.Type)
  9807  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64SUBshiftLL, x.Type)
  9808  		v1.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c + 1))
  9809  		v1.AddArg2(x, x)
  9810  		v0.AddArg2(a, v1)
  9811  		v.AddArg(v0)
  9812  		return true
  9813  	}
  9814  	// match: (MADDW a x (MOVDconst [c]))
  9815  	// cond: c%3 == 0 && ssa.IsPowerOfTwo(c/3) && ssa.Is32Bit(c)
  9816  	// result: (MOVWUreg (SUBshiftLL <a.Type> a (SUBshiftLL <x.Type> x x [2]) [ssa.Log64(c/3)]))
  9817  	for {
  9818  		a := v_0
  9819  		x := v_1
  9820  		if v_2.Op != ssaop.OpARM64MOVDconst {
  9821  			break
  9822  		}
  9823  		c := ssa.AuxIntToInt64(v_2.AuxInt)
  9824  		if !(c%3 == 0 && ssa.IsPowerOfTwo(c/3) && ssa.Is32Bit(c)) {
  9825  			break
  9826  		}
  9827  		v.Reset(ssaop.OpARM64MOVWUreg)
  9828  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SUBshiftLL, a.Type)
  9829  		v0.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c / 3))
  9830  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64SUBshiftLL, x.Type)
  9831  		v1.AuxInt = ssa.Int64ToAuxInt(2)
  9832  		v1.AddArg2(x, x)
  9833  		v0.AddArg2(a, v1)
  9834  		v.AddArg(v0)
  9835  		return true
  9836  	}
  9837  	// match: (MADDW a x (MOVDconst [c]))
  9838  	// cond: c%5 == 0 && ssa.IsPowerOfTwo(c/5) && ssa.Is32Bit(c)
  9839  	// result: (MOVWUreg (ADDshiftLL <a.Type> a (ADDshiftLL <x.Type> x x [2]) [ssa.Log64(c/5)]))
  9840  	for {
  9841  		a := v_0
  9842  		x := v_1
  9843  		if v_2.Op != ssaop.OpARM64MOVDconst {
  9844  			break
  9845  		}
  9846  		c := ssa.AuxIntToInt64(v_2.AuxInt)
  9847  		if !(c%5 == 0 && ssa.IsPowerOfTwo(c/5) && ssa.Is32Bit(c)) {
  9848  			break
  9849  		}
  9850  		v.Reset(ssaop.OpARM64MOVWUreg)
  9851  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64ADDshiftLL, a.Type)
  9852  		v0.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c / 5))
  9853  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64ADDshiftLL, x.Type)
  9854  		v1.AuxInt = ssa.Int64ToAuxInt(2)
  9855  		v1.AddArg2(x, x)
  9856  		v0.AddArg2(a, v1)
  9857  		v.AddArg(v0)
  9858  		return true
  9859  	}
  9860  	// match: (MADDW a x (MOVDconst [c]))
  9861  	// cond: c%7 == 0 && ssa.IsPowerOfTwo(c/7) && ssa.Is32Bit(c)
  9862  	// result: (MOVWUreg (SUBshiftLL <a.Type> a (SUBshiftLL <x.Type> x x [3]) [ssa.Log64(c/7)]))
  9863  	for {
  9864  		a := v_0
  9865  		x := v_1
  9866  		if v_2.Op != ssaop.OpARM64MOVDconst {
  9867  			break
  9868  		}
  9869  		c := ssa.AuxIntToInt64(v_2.AuxInt)
  9870  		if !(c%7 == 0 && ssa.IsPowerOfTwo(c/7) && ssa.Is32Bit(c)) {
  9871  			break
  9872  		}
  9873  		v.Reset(ssaop.OpARM64MOVWUreg)
  9874  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SUBshiftLL, a.Type)
  9875  		v0.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c / 7))
  9876  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64SUBshiftLL, x.Type)
  9877  		v1.AuxInt = ssa.Int64ToAuxInt(3)
  9878  		v1.AddArg2(x, x)
  9879  		v0.AddArg2(a, v1)
  9880  		v.AddArg(v0)
  9881  		return true
  9882  	}
  9883  	// match: (MADDW a x (MOVDconst [c]))
  9884  	// cond: c%9 == 0 && ssa.IsPowerOfTwo(c/9) && ssa.Is32Bit(c)
  9885  	// result: (MOVWUreg (ADDshiftLL <a.Type> a (ADDshiftLL <x.Type> x x [3]) [ssa.Log64(c/9)]))
  9886  	for {
  9887  		a := v_0
  9888  		x := v_1
  9889  		if v_2.Op != ssaop.OpARM64MOVDconst {
  9890  			break
  9891  		}
  9892  		c := ssa.AuxIntToInt64(v_2.AuxInt)
  9893  		if !(c%9 == 0 && ssa.IsPowerOfTwo(c/9) && ssa.Is32Bit(c)) {
  9894  			break
  9895  		}
  9896  		v.Reset(ssaop.OpARM64MOVWUreg)
  9897  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64ADDshiftLL, a.Type)
  9898  		v0.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c / 9))
  9899  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64ADDshiftLL, x.Type)
  9900  		v1.AuxInt = ssa.Int64ToAuxInt(3)
  9901  		v1.AddArg2(x, x)
  9902  		v0.AddArg2(a, v1)
  9903  		v.AddArg(v0)
  9904  		return true
  9905  	}
  9906  	// match: (MADDW a (MOVDconst [c]) x)
  9907  	// cond: int32(c)==-1
  9908  	// result: (MOVWUreg (SUB <a.Type> a x))
  9909  	for {
  9910  		a := v_0
  9911  		if v_1.Op != ssaop.OpARM64MOVDconst {
  9912  			break
  9913  		}
  9914  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  9915  		x := v_2
  9916  		if !(int32(c) == -1) {
  9917  			break
  9918  		}
  9919  		v.Reset(ssaop.OpARM64MOVWUreg)
  9920  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SUB, a.Type)
  9921  		v0.AddArg2(a, x)
  9922  		v.AddArg(v0)
  9923  		return true
  9924  	}
  9925  	// match: (MADDW a (MOVDconst [c]) _)
  9926  	// cond: int32(c)==0
  9927  	// result: (MOVWUreg a)
  9928  	for {
  9929  		a := v_0
  9930  		if v_1.Op != ssaop.OpARM64MOVDconst {
  9931  			break
  9932  		}
  9933  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  9934  		if !(int32(c) == 0) {
  9935  			break
  9936  		}
  9937  		v.Reset(ssaop.OpARM64MOVWUreg)
  9938  		v.AddArg(a)
  9939  		return true
  9940  	}
  9941  	// match: (MADDW a (MOVDconst [c]) x)
  9942  	// cond: int32(c)==1
  9943  	// result: (MOVWUreg (ADD <a.Type> a x))
  9944  	for {
  9945  		a := v_0
  9946  		if v_1.Op != ssaop.OpARM64MOVDconst {
  9947  			break
  9948  		}
  9949  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  9950  		x := v_2
  9951  		if !(int32(c) == 1) {
  9952  			break
  9953  		}
  9954  		v.Reset(ssaop.OpARM64MOVWUreg)
  9955  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64ADD, a.Type)
  9956  		v0.AddArg2(a, x)
  9957  		v.AddArg(v0)
  9958  		return true
  9959  	}
  9960  	// match: (MADDW a (MOVDconst [c]) x)
  9961  	// cond: ssa.IsPowerOfTwo(c)
  9962  	// result: (MOVWUreg (ADDshiftLL <a.Type> a x [ssa.Log64(c)]))
  9963  	for {
  9964  		a := v_0
  9965  		if v_1.Op != ssaop.OpARM64MOVDconst {
  9966  			break
  9967  		}
  9968  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  9969  		x := v_2
  9970  		if !(ssa.IsPowerOfTwo(c)) {
  9971  			break
  9972  		}
  9973  		v.Reset(ssaop.OpARM64MOVWUreg)
  9974  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64ADDshiftLL, a.Type)
  9975  		v0.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c))
  9976  		v0.AddArg2(a, x)
  9977  		v.AddArg(v0)
  9978  		return true
  9979  	}
  9980  	// match: (MADDW a (MOVDconst [c]) x)
  9981  	// cond: ssa.IsPowerOfTwo(c-1) && int32(c)>=3
  9982  	// result: (MOVWUreg (ADD <a.Type> a (ADDshiftLL <x.Type> x x [ssa.Log64(c-1)])))
  9983  	for {
  9984  		a := v_0
  9985  		if v_1.Op != ssaop.OpARM64MOVDconst {
  9986  			break
  9987  		}
  9988  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  9989  		x := v_2
  9990  		if !(ssa.IsPowerOfTwo(c-1) && int32(c) >= 3) {
  9991  			break
  9992  		}
  9993  		v.Reset(ssaop.OpARM64MOVWUreg)
  9994  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64ADD, a.Type)
  9995  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64ADDshiftLL, x.Type)
  9996  		v1.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c - 1))
  9997  		v1.AddArg2(x, x)
  9998  		v0.AddArg2(a, v1)
  9999  		v.AddArg(v0)
 10000  		return true
 10001  	}
 10002  	// match: (MADDW a (MOVDconst [c]) x)
 10003  	// cond: ssa.IsPowerOfTwo(c+1) && int32(c)>=7
 10004  	// result: (MOVWUreg (SUB <a.Type> a (SUBshiftLL <x.Type> x x [ssa.Log64(c+1)])))
 10005  	for {
 10006  		a := v_0
 10007  		if v_1.Op != ssaop.OpARM64MOVDconst {
 10008  			break
 10009  		}
 10010  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 10011  		x := v_2
 10012  		if !(ssa.IsPowerOfTwo(c+1) && int32(c) >= 7) {
 10013  			break
 10014  		}
 10015  		v.Reset(ssaop.OpARM64MOVWUreg)
 10016  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SUB, a.Type)
 10017  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64SUBshiftLL, x.Type)
 10018  		v1.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c + 1))
 10019  		v1.AddArg2(x, x)
 10020  		v0.AddArg2(a, v1)
 10021  		v.AddArg(v0)
 10022  		return true
 10023  	}
 10024  	// match: (MADDW a (MOVDconst [c]) x)
 10025  	// cond: c%3 == 0 && ssa.IsPowerOfTwo(c/3) && ssa.Is32Bit(c)
 10026  	// result: (MOVWUreg (SUBshiftLL <a.Type> a (SUBshiftLL <x.Type> x x [2]) [ssa.Log64(c/3)]))
 10027  	for {
 10028  		a := v_0
 10029  		if v_1.Op != ssaop.OpARM64MOVDconst {
 10030  			break
 10031  		}
 10032  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 10033  		x := v_2
 10034  		if !(c%3 == 0 && ssa.IsPowerOfTwo(c/3) && ssa.Is32Bit(c)) {
 10035  			break
 10036  		}
 10037  		v.Reset(ssaop.OpARM64MOVWUreg)
 10038  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SUBshiftLL, a.Type)
 10039  		v0.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c / 3))
 10040  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64SUBshiftLL, x.Type)
 10041  		v1.AuxInt = ssa.Int64ToAuxInt(2)
 10042  		v1.AddArg2(x, x)
 10043  		v0.AddArg2(a, v1)
 10044  		v.AddArg(v0)
 10045  		return true
 10046  	}
 10047  	// match: (MADDW a (MOVDconst [c]) x)
 10048  	// cond: c%5 == 0 && ssa.IsPowerOfTwo(c/5) && ssa.Is32Bit(c)
 10049  	// result: (MOVWUreg (ADDshiftLL <a.Type> a (ADDshiftLL <x.Type> x x [2]) [ssa.Log64(c/5)]))
 10050  	for {
 10051  		a := v_0
 10052  		if v_1.Op != ssaop.OpARM64MOVDconst {
 10053  			break
 10054  		}
 10055  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 10056  		x := v_2
 10057  		if !(c%5 == 0 && ssa.IsPowerOfTwo(c/5) && ssa.Is32Bit(c)) {
 10058  			break
 10059  		}
 10060  		v.Reset(ssaop.OpARM64MOVWUreg)
 10061  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64ADDshiftLL, a.Type)
 10062  		v0.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c / 5))
 10063  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64ADDshiftLL, x.Type)
 10064  		v1.AuxInt = ssa.Int64ToAuxInt(2)
 10065  		v1.AddArg2(x, x)
 10066  		v0.AddArg2(a, v1)
 10067  		v.AddArg(v0)
 10068  		return true
 10069  	}
 10070  	// match: (MADDW a (MOVDconst [c]) x)
 10071  	// cond: c%7 == 0 && ssa.IsPowerOfTwo(c/7) && ssa.Is32Bit(c)
 10072  	// result: (MOVWUreg (SUBshiftLL <a.Type> a (SUBshiftLL <x.Type> x x [3]) [ssa.Log64(c/7)]))
 10073  	for {
 10074  		a := v_0
 10075  		if v_1.Op != ssaop.OpARM64MOVDconst {
 10076  			break
 10077  		}
 10078  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 10079  		x := v_2
 10080  		if !(c%7 == 0 && ssa.IsPowerOfTwo(c/7) && ssa.Is32Bit(c)) {
 10081  			break
 10082  		}
 10083  		v.Reset(ssaop.OpARM64MOVWUreg)
 10084  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SUBshiftLL, a.Type)
 10085  		v0.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c / 7))
 10086  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64SUBshiftLL, x.Type)
 10087  		v1.AuxInt = ssa.Int64ToAuxInt(3)
 10088  		v1.AddArg2(x, x)
 10089  		v0.AddArg2(a, v1)
 10090  		v.AddArg(v0)
 10091  		return true
 10092  	}
 10093  	// match: (MADDW a (MOVDconst [c]) x)
 10094  	// cond: c%9 == 0 && ssa.IsPowerOfTwo(c/9) && ssa.Is32Bit(c)
 10095  	// result: (MOVWUreg (ADDshiftLL <a.Type> a (ADDshiftLL <x.Type> x x [3]) [ssa.Log64(c/9)]))
 10096  	for {
 10097  		a := v_0
 10098  		if v_1.Op != ssaop.OpARM64MOVDconst {
 10099  			break
 10100  		}
 10101  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 10102  		x := v_2
 10103  		if !(c%9 == 0 && ssa.IsPowerOfTwo(c/9) && ssa.Is32Bit(c)) {
 10104  			break
 10105  		}
 10106  		v.Reset(ssaop.OpARM64MOVWUreg)
 10107  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64ADDshiftLL, a.Type)
 10108  		v0.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c / 9))
 10109  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64ADDshiftLL, x.Type)
 10110  		v1.AuxInt = ssa.Int64ToAuxInt(3)
 10111  		v1.AddArg2(x, x)
 10112  		v0.AddArg2(a, v1)
 10113  		v.AddArg(v0)
 10114  		return true
 10115  	}
 10116  	// match: (MADDW (MOVDconst [c]) x y)
 10117  	// result: (MOVWUreg (ADDconst <x.Type> [c] (MULW <x.Type> x y)))
 10118  	for {
 10119  		if v_0.Op != ssaop.OpARM64MOVDconst {
 10120  			break
 10121  		}
 10122  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 10123  		x := v_1
 10124  		y := v_2
 10125  		v.Reset(ssaop.OpARM64MOVWUreg)
 10126  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64ADDconst, x.Type)
 10127  		v0.AuxInt = ssa.Int64ToAuxInt(c)
 10128  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64MULW, x.Type)
 10129  		v1.AddArg2(x, y)
 10130  		v0.AddArg(v1)
 10131  		v.AddArg(v0)
 10132  		return true
 10133  	}
 10134  	// match: (MADDW a (MOVDconst [c]) (MOVDconst [d]))
 10135  	// result: (MOVWUreg (ADDconst <a.Type> [c*d] a))
 10136  	for {
 10137  		a := v_0
 10138  		if v_1.Op != ssaop.OpARM64MOVDconst {
 10139  			break
 10140  		}
 10141  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 10142  		if v_2.Op != ssaop.OpARM64MOVDconst {
 10143  			break
 10144  		}
 10145  		d := ssa.AuxIntToInt64(v_2.AuxInt)
 10146  		v.Reset(ssaop.OpARM64MOVWUreg)
 10147  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64ADDconst, a.Type)
 10148  		v0.AuxInt = ssa.Int64ToAuxInt(c * d)
 10149  		v0.AddArg(a)
 10150  		v.AddArg(v0)
 10151  		return true
 10152  	}
 10153  	return false
 10154  }
 10155  func rewriteValue_OpARM64MNEG(v *ssa.Value) bool {
 10156  	v_1 := v.Args[1]
 10157  	v_0 := v.Args[0]
 10158  	b := v.Block
 10159  	// match: (MNEG x (MOVDconst [-1]))
 10160  	// result: x
 10161  	for {
 10162  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 10163  			x := v_0
 10164  			if v_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_1.AuxInt) != -1 {
 10165  				continue
 10166  			}
 10167  			v.CopyOf(x)
 10168  			return true
 10169  		}
 10170  		break
 10171  	}
 10172  	// match: (MNEG _ (MOVDconst [0]))
 10173  	// result: (MOVDconst [0])
 10174  	for {
 10175  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 10176  			if v_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_1.AuxInt) != 0 {
 10177  				continue
 10178  			}
 10179  			v.Reset(ssaop.OpARM64MOVDconst)
 10180  			v.AuxInt = ssa.Int64ToAuxInt(0)
 10181  			return true
 10182  		}
 10183  		break
 10184  	}
 10185  	// match: (MNEG x (MOVDconst [1]))
 10186  	// result: (NEG x)
 10187  	for {
 10188  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 10189  			x := v_0
 10190  			if v_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_1.AuxInt) != 1 {
 10191  				continue
 10192  			}
 10193  			v.Reset(ssaop.OpARM64NEG)
 10194  			v.AddArg(x)
 10195  			return true
 10196  		}
 10197  		break
 10198  	}
 10199  	// match: (MNEG x (MOVDconst [c]))
 10200  	// cond: ssa.IsPowerOfTwo(c)
 10201  	// result: (NEG (SLLconst <x.Type> [ssa.Log64(c)] x))
 10202  	for {
 10203  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 10204  			x := v_0
 10205  			if v_1.Op != ssaop.OpARM64MOVDconst {
 10206  				continue
 10207  			}
 10208  			c := ssa.AuxIntToInt64(v_1.AuxInt)
 10209  			if !(ssa.IsPowerOfTwo(c)) {
 10210  				continue
 10211  			}
 10212  			v.Reset(ssaop.OpARM64NEG)
 10213  			v0 := b.NewValue0(v.Pos, ssaop.OpARM64SLLconst, x.Type)
 10214  			v0.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c))
 10215  			v0.AddArg(x)
 10216  			v.AddArg(v0)
 10217  			return true
 10218  		}
 10219  		break
 10220  	}
 10221  	// match: (MNEG x (MOVDconst [c]))
 10222  	// cond: ssa.IsPowerOfTwo(c-1) && c >= 3
 10223  	// result: (NEG (ADDshiftLL <x.Type> x x [ssa.Log64(c-1)]))
 10224  	for {
 10225  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 10226  			x := v_0
 10227  			if v_1.Op != ssaop.OpARM64MOVDconst {
 10228  				continue
 10229  			}
 10230  			c := ssa.AuxIntToInt64(v_1.AuxInt)
 10231  			if !(ssa.IsPowerOfTwo(c-1) && c >= 3) {
 10232  				continue
 10233  			}
 10234  			v.Reset(ssaop.OpARM64NEG)
 10235  			v0 := b.NewValue0(v.Pos, ssaop.OpARM64ADDshiftLL, x.Type)
 10236  			v0.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c - 1))
 10237  			v0.AddArg2(x, x)
 10238  			v.AddArg(v0)
 10239  			return true
 10240  		}
 10241  		break
 10242  	}
 10243  	// match: (MNEG x (MOVDconst [c]))
 10244  	// cond: ssa.IsPowerOfTwo(c+1) && c >= 7
 10245  	// result: (NEG (ADDshiftLL <x.Type> (NEG <x.Type> x) x [ssa.Log64(c+1)]))
 10246  	for {
 10247  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 10248  			x := v_0
 10249  			if v_1.Op != ssaop.OpARM64MOVDconst {
 10250  				continue
 10251  			}
 10252  			c := ssa.AuxIntToInt64(v_1.AuxInt)
 10253  			if !(ssa.IsPowerOfTwo(c+1) && c >= 7) {
 10254  				continue
 10255  			}
 10256  			v.Reset(ssaop.OpARM64NEG)
 10257  			v0 := b.NewValue0(v.Pos, ssaop.OpARM64ADDshiftLL, x.Type)
 10258  			v0.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c + 1))
 10259  			v1 := b.NewValue0(v.Pos, ssaop.OpARM64NEG, x.Type)
 10260  			v1.AddArg(x)
 10261  			v0.AddArg2(v1, x)
 10262  			v.AddArg(v0)
 10263  			return true
 10264  		}
 10265  		break
 10266  	}
 10267  	// match: (MNEG x (MOVDconst [c]))
 10268  	// cond: c%3 == 0 && ssa.IsPowerOfTwo(c/3)
 10269  	// result: (SLLconst <x.Type> [ssa.Log64(c/3)] (SUBshiftLL <x.Type> x x [2]))
 10270  	for {
 10271  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 10272  			x := v_0
 10273  			if v_1.Op != ssaop.OpARM64MOVDconst {
 10274  				continue
 10275  			}
 10276  			c := ssa.AuxIntToInt64(v_1.AuxInt)
 10277  			if !(c%3 == 0 && ssa.IsPowerOfTwo(c/3)) {
 10278  				continue
 10279  			}
 10280  			v.Reset(ssaop.OpARM64SLLconst)
 10281  			v.Type = x.Type
 10282  			v.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c / 3))
 10283  			v0 := b.NewValue0(v.Pos, ssaop.OpARM64SUBshiftLL, x.Type)
 10284  			v0.AuxInt = ssa.Int64ToAuxInt(2)
 10285  			v0.AddArg2(x, x)
 10286  			v.AddArg(v0)
 10287  			return true
 10288  		}
 10289  		break
 10290  	}
 10291  	// match: (MNEG x (MOVDconst [c]))
 10292  	// cond: c%5 == 0 && ssa.IsPowerOfTwo(c/5)
 10293  	// result: (NEG (SLLconst <x.Type> [ssa.Log64(c/5)] (ADDshiftLL <x.Type> x x [2])))
 10294  	for {
 10295  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 10296  			x := v_0
 10297  			if v_1.Op != ssaop.OpARM64MOVDconst {
 10298  				continue
 10299  			}
 10300  			c := ssa.AuxIntToInt64(v_1.AuxInt)
 10301  			if !(c%5 == 0 && ssa.IsPowerOfTwo(c/5)) {
 10302  				continue
 10303  			}
 10304  			v.Reset(ssaop.OpARM64NEG)
 10305  			v0 := b.NewValue0(v.Pos, ssaop.OpARM64SLLconst, x.Type)
 10306  			v0.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c / 5))
 10307  			v1 := b.NewValue0(v.Pos, ssaop.OpARM64ADDshiftLL, x.Type)
 10308  			v1.AuxInt = ssa.Int64ToAuxInt(2)
 10309  			v1.AddArg2(x, x)
 10310  			v0.AddArg(v1)
 10311  			v.AddArg(v0)
 10312  			return true
 10313  		}
 10314  		break
 10315  	}
 10316  	// match: (MNEG x (MOVDconst [c]))
 10317  	// cond: c%7 == 0 && ssa.IsPowerOfTwo(c/7)
 10318  	// result: (SLLconst <x.Type> [ssa.Log64(c/7)] (SUBshiftLL <x.Type> x x [3]))
 10319  	for {
 10320  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 10321  			x := v_0
 10322  			if v_1.Op != ssaop.OpARM64MOVDconst {
 10323  				continue
 10324  			}
 10325  			c := ssa.AuxIntToInt64(v_1.AuxInt)
 10326  			if !(c%7 == 0 && ssa.IsPowerOfTwo(c/7)) {
 10327  				continue
 10328  			}
 10329  			v.Reset(ssaop.OpARM64SLLconst)
 10330  			v.Type = x.Type
 10331  			v.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c / 7))
 10332  			v0 := b.NewValue0(v.Pos, ssaop.OpARM64SUBshiftLL, x.Type)
 10333  			v0.AuxInt = ssa.Int64ToAuxInt(3)
 10334  			v0.AddArg2(x, x)
 10335  			v.AddArg(v0)
 10336  			return true
 10337  		}
 10338  		break
 10339  	}
 10340  	// match: (MNEG x (MOVDconst [c]))
 10341  	// cond: c%9 == 0 && ssa.IsPowerOfTwo(c/9)
 10342  	// result: (NEG (SLLconst <x.Type> [ssa.Log64(c/9)] (ADDshiftLL <x.Type> x x [3])))
 10343  	for {
 10344  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 10345  			x := v_0
 10346  			if v_1.Op != ssaop.OpARM64MOVDconst {
 10347  				continue
 10348  			}
 10349  			c := ssa.AuxIntToInt64(v_1.AuxInt)
 10350  			if !(c%9 == 0 && ssa.IsPowerOfTwo(c/9)) {
 10351  				continue
 10352  			}
 10353  			v.Reset(ssaop.OpARM64NEG)
 10354  			v0 := b.NewValue0(v.Pos, ssaop.OpARM64SLLconst, x.Type)
 10355  			v0.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c / 9))
 10356  			v1 := b.NewValue0(v.Pos, ssaop.OpARM64ADDshiftLL, x.Type)
 10357  			v1.AuxInt = ssa.Int64ToAuxInt(3)
 10358  			v1.AddArg2(x, x)
 10359  			v0.AddArg(v1)
 10360  			v.AddArg(v0)
 10361  			return true
 10362  		}
 10363  		break
 10364  	}
 10365  	// match: (MNEG (MOVDconst [c]) (MOVDconst [d]))
 10366  	// result: (MOVDconst [-c*d])
 10367  	for {
 10368  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 10369  			if v_0.Op != ssaop.OpARM64MOVDconst {
 10370  				continue
 10371  			}
 10372  			c := ssa.AuxIntToInt64(v_0.AuxInt)
 10373  			if v_1.Op != ssaop.OpARM64MOVDconst {
 10374  				continue
 10375  			}
 10376  			d := ssa.AuxIntToInt64(v_1.AuxInt)
 10377  			v.Reset(ssaop.OpARM64MOVDconst)
 10378  			v.AuxInt = ssa.Int64ToAuxInt(-c * d)
 10379  			return true
 10380  		}
 10381  		break
 10382  	}
 10383  	return false
 10384  }
 10385  func rewriteValue_OpARM64MNEGW(v *ssa.Value) bool {
 10386  	v_1 := v.Args[1]
 10387  	v_0 := v.Args[0]
 10388  	b := v.Block
 10389  	// match: (MNEGW x (MOVDconst [c]))
 10390  	// cond: int32(c)==-1
 10391  	// result: (MOVWUreg x)
 10392  	for {
 10393  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 10394  			x := v_0
 10395  			if v_1.Op != ssaop.OpARM64MOVDconst {
 10396  				continue
 10397  			}
 10398  			c := ssa.AuxIntToInt64(v_1.AuxInt)
 10399  			if !(int32(c) == -1) {
 10400  				continue
 10401  			}
 10402  			v.Reset(ssaop.OpARM64MOVWUreg)
 10403  			v.AddArg(x)
 10404  			return true
 10405  		}
 10406  		break
 10407  	}
 10408  	// match: (MNEGW _ (MOVDconst [c]))
 10409  	// cond: int32(c)==0
 10410  	// result: (MOVDconst [0])
 10411  	for {
 10412  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 10413  			if v_1.Op != ssaop.OpARM64MOVDconst {
 10414  				continue
 10415  			}
 10416  			c := ssa.AuxIntToInt64(v_1.AuxInt)
 10417  			if !(int32(c) == 0) {
 10418  				continue
 10419  			}
 10420  			v.Reset(ssaop.OpARM64MOVDconst)
 10421  			v.AuxInt = ssa.Int64ToAuxInt(0)
 10422  			return true
 10423  		}
 10424  		break
 10425  	}
 10426  	// match: (MNEGW x (MOVDconst [c]))
 10427  	// cond: int32(c)==1
 10428  	// result: (MOVWUreg (NEG <x.Type> x))
 10429  	for {
 10430  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 10431  			x := v_0
 10432  			if v_1.Op != ssaop.OpARM64MOVDconst {
 10433  				continue
 10434  			}
 10435  			c := ssa.AuxIntToInt64(v_1.AuxInt)
 10436  			if !(int32(c) == 1) {
 10437  				continue
 10438  			}
 10439  			v.Reset(ssaop.OpARM64MOVWUreg)
 10440  			v0 := b.NewValue0(v.Pos, ssaop.OpARM64NEG, x.Type)
 10441  			v0.AddArg(x)
 10442  			v.AddArg(v0)
 10443  			return true
 10444  		}
 10445  		break
 10446  	}
 10447  	// match: (MNEGW x (MOVDconst [c]))
 10448  	// cond: ssa.IsPowerOfTwo(c)
 10449  	// result: (NEG (SLLconst <x.Type> [ssa.Log64(c)] x))
 10450  	for {
 10451  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 10452  			x := v_0
 10453  			if v_1.Op != ssaop.OpARM64MOVDconst {
 10454  				continue
 10455  			}
 10456  			c := ssa.AuxIntToInt64(v_1.AuxInt)
 10457  			if !(ssa.IsPowerOfTwo(c)) {
 10458  				continue
 10459  			}
 10460  			v.Reset(ssaop.OpARM64NEG)
 10461  			v0 := b.NewValue0(v.Pos, ssaop.OpARM64SLLconst, x.Type)
 10462  			v0.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c))
 10463  			v0.AddArg(x)
 10464  			v.AddArg(v0)
 10465  			return true
 10466  		}
 10467  		break
 10468  	}
 10469  	// match: (MNEGW x (MOVDconst [c]))
 10470  	// cond: ssa.IsPowerOfTwo(c-1) && int32(c) >= 3
 10471  	// result: (MOVWUreg (NEG <x.Type> (ADDshiftLL <x.Type> x x [ssa.Log64(c-1)])))
 10472  	for {
 10473  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 10474  			x := v_0
 10475  			if v_1.Op != ssaop.OpARM64MOVDconst {
 10476  				continue
 10477  			}
 10478  			c := ssa.AuxIntToInt64(v_1.AuxInt)
 10479  			if !(ssa.IsPowerOfTwo(c-1) && int32(c) >= 3) {
 10480  				continue
 10481  			}
 10482  			v.Reset(ssaop.OpARM64MOVWUreg)
 10483  			v0 := b.NewValue0(v.Pos, ssaop.OpARM64NEG, x.Type)
 10484  			v1 := b.NewValue0(v.Pos, ssaop.OpARM64ADDshiftLL, x.Type)
 10485  			v1.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c - 1))
 10486  			v1.AddArg2(x, x)
 10487  			v0.AddArg(v1)
 10488  			v.AddArg(v0)
 10489  			return true
 10490  		}
 10491  		break
 10492  	}
 10493  	// match: (MNEGW x (MOVDconst [c]))
 10494  	// cond: ssa.IsPowerOfTwo(c+1) && int32(c) >= 7
 10495  	// result: (MOVWUreg (NEG <x.Type> (ADDshiftLL <x.Type> (NEG <x.Type> x) x [ssa.Log64(c+1)])))
 10496  	for {
 10497  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 10498  			x := v_0
 10499  			if v_1.Op != ssaop.OpARM64MOVDconst {
 10500  				continue
 10501  			}
 10502  			c := ssa.AuxIntToInt64(v_1.AuxInt)
 10503  			if !(ssa.IsPowerOfTwo(c+1) && int32(c) >= 7) {
 10504  				continue
 10505  			}
 10506  			v.Reset(ssaop.OpARM64MOVWUreg)
 10507  			v0 := b.NewValue0(v.Pos, ssaop.OpARM64NEG, x.Type)
 10508  			v1 := b.NewValue0(v.Pos, ssaop.OpARM64ADDshiftLL, x.Type)
 10509  			v1.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c + 1))
 10510  			v2 := b.NewValue0(v.Pos, ssaop.OpARM64NEG, x.Type)
 10511  			v2.AddArg(x)
 10512  			v1.AddArg2(v2, x)
 10513  			v0.AddArg(v1)
 10514  			v.AddArg(v0)
 10515  			return true
 10516  		}
 10517  		break
 10518  	}
 10519  	// match: (MNEGW x (MOVDconst [c]))
 10520  	// cond: c%3 == 0 && ssa.IsPowerOfTwo(c/3) && ssa.Is32Bit(c)
 10521  	// result: (MOVWUreg (SLLconst <x.Type> [ssa.Log64(c/3)] (SUBshiftLL <x.Type> x x [2])))
 10522  	for {
 10523  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 10524  			x := v_0
 10525  			if v_1.Op != ssaop.OpARM64MOVDconst {
 10526  				continue
 10527  			}
 10528  			c := ssa.AuxIntToInt64(v_1.AuxInt)
 10529  			if !(c%3 == 0 && ssa.IsPowerOfTwo(c/3) && ssa.Is32Bit(c)) {
 10530  				continue
 10531  			}
 10532  			v.Reset(ssaop.OpARM64MOVWUreg)
 10533  			v0 := b.NewValue0(v.Pos, ssaop.OpARM64SLLconst, x.Type)
 10534  			v0.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c / 3))
 10535  			v1 := b.NewValue0(v.Pos, ssaop.OpARM64SUBshiftLL, x.Type)
 10536  			v1.AuxInt = ssa.Int64ToAuxInt(2)
 10537  			v1.AddArg2(x, x)
 10538  			v0.AddArg(v1)
 10539  			v.AddArg(v0)
 10540  			return true
 10541  		}
 10542  		break
 10543  	}
 10544  	// match: (MNEGW x (MOVDconst [c]))
 10545  	// cond: c%5 == 0 && ssa.IsPowerOfTwo(c/5) && ssa.Is32Bit(c)
 10546  	// result: (MOVWUreg (NEG <x.Type> (SLLconst <x.Type> [ssa.Log64(c/5)] (ADDshiftLL <x.Type> x x [2]))))
 10547  	for {
 10548  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 10549  			x := v_0
 10550  			if v_1.Op != ssaop.OpARM64MOVDconst {
 10551  				continue
 10552  			}
 10553  			c := ssa.AuxIntToInt64(v_1.AuxInt)
 10554  			if !(c%5 == 0 && ssa.IsPowerOfTwo(c/5) && ssa.Is32Bit(c)) {
 10555  				continue
 10556  			}
 10557  			v.Reset(ssaop.OpARM64MOVWUreg)
 10558  			v0 := b.NewValue0(v.Pos, ssaop.OpARM64NEG, x.Type)
 10559  			v1 := b.NewValue0(v.Pos, ssaop.OpARM64SLLconst, x.Type)
 10560  			v1.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c / 5))
 10561  			v2 := b.NewValue0(v.Pos, ssaop.OpARM64ADDshiftLL, x.Type)
 10562  			v2.AuxInt = ssa.Int64ToAuxInt(2)
 10563  			v2.AddArg2(x, x)
 10564  			v1.AddArg(v2)
 10565  			v0.AddArg(v1)
 10566  			v.AddArg(v0)
 10567  			return true
 10568  		}
 10569  		break
 10570  	}
 10571  	// match: (MNEGW x (MOVDconst [c]))
 10572  	// cond: c%7 == 0 && ssa.IsPowerOfTwo(c/7) && ssa.Is32Bit(c)
 10573  	// result: (MOVWUreg (SLLconst <x.Type> [ssa.Log64(c/7)] (SUBshiftLL <x.Type> x x [3])))
 10574  	for {
 10575  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 10576  			x := v_0
 10577  			if v_1.Op != ssaop.OpARM64MOVDconst {
 10578  				continue
 10579  			}
 10580  			c := ssa.AuxIntToInt64(v_1.AuxInt)
 10581  			if !(c%7 == 0 && ssa.IsPowerOfTwo(c/7) && ssa.Is32Bit(c)) {
 10582  				continue
 10583  			}
 10584  			v.Reset(ssaop.OpARM64MOVWUreg)
 10585  			v0 := b.NewValue0(v.Pos, ssaop.OpARM64SLLconst, x.Type)
 10586  			v0.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c / 7))
 10587  			v1 := b.NewValue0(v.Pos, ssaop.OpARM64SUBshiftLL, x.Type)
 10588  			v1.AuxInt = ssa.Int64ToAuxInt(3)
 10589  			v1.AddArg2(x, x)
 10590  			v0.AddArg(v1)
 10591  			v.AddArg(v0)
 10592  			return true
 10593  		}
 10594  		break
 10595  	}
 10596  	// match: (MNEGW x (MOVDconst [c]))
 10597  	// cond: c%9 == 0 && ssa.IsPowerOfTwo(c/9) && ssa.Is32Bit(c)
 10598  	// result: (MOVWUreg (NEG <x.Type> (SLLconst <x.Type> [ssa.Log64(c/9)] (ADDshiftLL <x.Type> x x [3]))))
 10599  	for {
 10600  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 10601  			x := v_0
 10602  			if v_1.Op != ssaop.OpARM64MOVDconst {
 10603  				continue
 10604  			}
 10605  			c := ssa.AuxIntToInt64(v_1.AuxInt)
 10606  			if !(c%9 == 0 && ssa.IsPowerOfTwo(c/9) && ssa.Is32Bit(c)) {
 10607  				continue
 10608  			}
 10609  			v.Reset(ssaop.OpARM64MOVWUreg)
 10610  			v0 := b.NewValue0(v.Pos, ssaop.OpARM64NEG, x.Type)
 10611  			v1 := b.NewValue0(v.Pos, ssaop.OpARM64SLLconst, x.Type)
 10612  			v1.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c / 9))
 10613  			v2 := b.NewValue0(v.Pos, ssaop.OpARM64ADDshiftLL, x.Type)
 10614  			v2.AuxInt = ssa.Int64ToAuxInt(3)
 10615  			v2.AddArg2(x, x)
 10616  			v1.AddArg(v2)
 10617  			v0.AddArg(v1)
 10618  			v.AddArg(v0)
 10619  			return true
 10620  		}
 10621  		break
 10622  	}
 10623  	// match: (MNEGW (MOVDconst [c]) (MOVDconst [d]))
 10624  	// result: (MOVDconst [int64(uint32(-c*d))])
 10625  	for {
 10626  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 10627  			if v_0.Op != ssaop.OpARM64MOVDconst {
 10628  				continue
 10629  			}
 10630  			c := ssa.AuxIntToInt64(v_0.AuxInt)
 10631  			if v_1.Op != ssaop.OpARM64MOVDconst {
 10632  				continue
 10633  			}
 10634  			d := ssa.AuxIntToInt64(v_1.AuxInt)
 10635  			v.Reset(ssaop.OpARM64MOVDconst)
 10636  			v.AuxInt = ssa.Int64ToAuxInt(int64(uint32(-c * d)))
 10637  			return true
 10638  		}
 10639  		break
 10640  	}
 10641  	return false
 10642  }
 10643  func rewriteValue_OpARM64MOD(v *ssa.Value) bool {
 10644  	v_1 := v.Args[1]
 10645  	v_0 := v.Args[0]
 10646  	// match: (MOD (MOVDconst [c]) (MOVDconst [d]))
 10647  	// cond: d != 0
 10648  	// result: (MOVDconst [c%d])
 10649  	for {
 10650  		if v_0.Op != ssaop.OpARM64MOVDconst {
 10651  			break
 10652  		}
 10653  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 10654  		if v_1.Op != ssaop.OpARM64MOVDconst {
 10655  			break
 10656  		}
 10657  		d := ssa.AuxIntToInt64(v_1.AuxInt)
 10658  		if !(d != 0) {
 10659  			break
 10660  		}
 10661  		v.Reset(ssaop.OpARM64MOVDconst)
 10662  		v.AuxInt = ssa.Int64ToAuxInt(c % d)
 10663  		return true
 10664  	}
 10665  	return false
 10666  }
 10667  func rewriteValue_OpARM64MODW(v *ssa.Value) bool {
 10668  	v_1 := v.Args[1]
 10669  	v_0 := v.Args[0]
 10670  	// match: (MODW (MOVDconst [c]) (MOVDconst [d]))
 10671  	// cond: d != 0
 10672  	// result: (MOVDconst [int64(uint32(int32(c)%int32(d)))])
 10673  	for {
 10674  		if v_0.Op != ssaop.OpARM64MOVDconst {
 10675  			break
 10676  		}
 10677  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 10678  		if v_1.Op != ssaop.OpARM64MOVDconst {
 10679  			break
 10680  		}
 10681  		d := ssa.AuxIntToInt64(v_1.AuxInt)
 10682  		if !(d != 0) {
 10683  			break
 10684  		}
 10685  		v.Reset(ssaop.OpARM64MOVDconst)
 10686  		v.AuxInt = ssa.Int64ToAuxInt(int64(uint32(int32(c) % int32(d))))
 10687  		return true
 10688  	}
 10689  	return false
 10690  }
 10691  func rewriteValue_OpARM64MOVBUload(v *ssa.Value) bool {
 10692  	v_1 := v.Args[1]
 10693  	v_0 := v.Args[0]
 10694  	b := v.Block
 10695  	config := b.Func.Config
 10696  	// match: (MOVBUload [off1] {sym} (ADDconst [off2] ptr) mem)
 10697  	// cond: ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)
 10698  	// result: (MOVBUload [off1+int32(off2)] {sym} ptr mem)
 10699  	for {
 10700  		off1 := ssa.AuxIntToInt32(v.AuxInt)
 10701  		sym := ssa.AuxToSym(v.Aux)
 10702  		if v_0.Op != ssaop.OpARM64ADDconst {
 10703  			break
 10704  		}
 10705  		off2 := ssa.AuxIntToInt64(v_0.AuxInt)
 10706  		ptr := v_0.Args[0]
 10707  		mem := v_1
 10708  		if !(ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)) {
 10709  			break
 10710  		}
 10711  		v.Reset(ssaop.OpARM64MOVBUload)
 10712  		v.AuxInt = ssa.Int32ToAuxInt(off1 + int32(off2))
 10713  		v.Aux = ssa.SymToAux(sym)
 10714  		v.AddArg2(ptr, mem)
 10715  		return true
 10716  	}
 10717  	// match: (MOVBUload [off] {sym} (ADD ptr idx) mem)
 10718  	// cond: off == 0 && sym == nil
 10719  	// result: (MOVBUloadidx ptr idx mem)
 10720  	for {
 10721  		off := ssa.AuxIntToInt32(v.AuxInt)
 10722  		sym := ssa.AuxToSym(v.Aux)
 10723  		if v_0.Op != ssaop.OpARM64ADD {
 10724  			break
 10725  		}
 10726  		idx := v_0.Args[1]
 10727  		ptr := v_0.Args[0]
 10728  		mem := v_1
 10729  		if !(off == 0 && sym == nil) {
 10730  			break
 10731  		}
 10732  		v.Reset(ssaop.OpARM64MOVBUloadidx)
 10733  		v.AddArg3(ptr, idx, mem)
 10734  		return true
 10735  	}
 10736  	// match: (MOVBUload [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) mem)
 10737  	// cond: ssa.CanMergeSym(sym1,sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)
 10738  	// result: (MOVBUload [off1+off2] {ssa.MergeSym(sym1,sym2)} ptr mem)
 10739  	for {
 10740  		off1 := ssa.AuxIntToInt32(v.AuxInt)
 10741  		sym1 := ssa.AuxToSym(v.Aux)
 10742  		if v_0.Op != ssaop.OpARM64MOVDaddr {
 10743  			break
 10744  		}
 10745  		off2 := ssa.AuxIntToInt32(v_0.AuxInt)
 10746  		sym2 := ssa.AuxToSym(v_0.Aux)
 10747  		ptr := v_0.Args[0]
 10748  		mem := v_1
 10749  		if !(ssa.CanMergeSym(sym1, sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)) {
 10750  			break
 10751  		}
 10752  		v.Reset(ssaop.OpARM64MOVBUload)
 10753  		v.AuxInt = ssa.Int32ToAuxInt(off1 + off2)
 10754  		v.Aux = ssa.SymToAux(ssa.MergeSym(sym1, sym2))
 10755  		v.AddArg2(ptr, mem)
 10756  		return true
 10757  	}
 10758  	// match: (MOVBUload [off] {sym} (SB) _)
 10759  	// cond: ssa.SymIsRO(sym)
 10760  	// result: (MOVDconst [int64(ssa.Read8(sym, int64(off)))])
 10761  	for {
 10762  		off := ssa.AuxIntToInt32(v.AuxInt)
 10763  		sym := ssa.AuxToSym(v.Aux)
 10764  		if v_0.Op != ssaop.OpSB || !(ssa.SymIsRO(sym)) {
 10765  			break
 10766  		}
 10767  		v.Reset(ssaop.OpARM64MOVDconst)
 10768  		v.AuxInt = ssa.Int64ToAuxInt(int64(ssa.Read8(sym, int64(off))))
 10769  		return true
 10770  	}
 10771  	return false
 10772  }
 10773  func rewriteValue_OpARM64MOVBUloadidx(v *ssa.Value) bool {
 10774  	v_2 := v.Args[2]
 10775  	v_1 := v.Args[1]
 10776  	v_0 := v.Args[0]
 10777  	// match: (MOVBUloadidx ptr (MOVDconst [c]) mem)
 10778  	// cond: ssa.Is32Bit(c)
 10779  	// result: (MOVBUload [int32(c)] ptr mem)
 10780  	for {
 10781  		ptr := v_0
 10782  		if v_1.Op != ssaop.OpARM64MOVDconst {
 10783  			break
 10784  		}
 10785  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 10786  		mem := v_2
 10787  		if !(ssa.Is32Bit(c)) {
 10788  			break
 10789  		}
 10790  		v.Reset(ssaop.OpARM64MOVBUload)
 10791  		v.AuxInt = ssa.Int32ToAuxInt(int32(c))
 10792  		v.AddArg2(ptr, mem)
 10793  		return true
 10794  	}
 10795  	// match: (MOVBUloadidx (MOVDconst [c]) ptr mem)
 10796  	// cond: ssa.Is32Bit(c)
 10797  	// result: (MOVBUload [int32(c)] ptr mem)
 10798  	for {
 10799  		if v_0.Op != ssaop.OpARM64MOVDconst {
 10800  			break
 10801  		}
 10802  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 10803  		ptr := v_1
 10804  		mem := v_2
 10805  		if !(ssa.Is32Bit(c)) {
 10806  			break
 10807  		}
 10808  		v.Reset(ssaop.OpARM64MOVBUload)
 10809  		v.AuxInt = ssa.Int32ToAuxInt(int32(c))
 10810  		v.AddArg2(ptr, mem)
 10811  		return true
 10812  	}
 10813  	return false
 10814  }
 10815  func rewriteValue_OpARM64MOVBUreg(v *ssa.Value) bool {
 10816  	v_0 := v.Args[0]
 10817  	// match: (MOVBUreg (ANDconst [c] x))
 10818  	// result: (ANDconst [c&(1<<8-1)] x)
 10819  	for {
 10820  		if v_0.Op != ssaop.OpARM64ANDconst {
 10821  			break
 10822  		}
 10823  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 10824  		x := v_0.Args[0]
 10825  		v.Reset(ssaop.OpARM64ANDconst)
 10826  		v.AuxInt = ssa.Int64ToAuxInt(c & (1<<8 - 1))
 10827  		v.AddArg(x)
 10828  		return true
 10829  	}
 10830  	// match: (MOVBUreg (MOVDconst [c]))
 10831  	// result: (MOVDconst [int64(uint8(c))])
 10832  	for {
 10833  		if v_0.Op != ssaop.OpARM64MOVDconst {
 10834  			break
 10835  		}
 10836  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 10837  		v.Reset(ssaop.OpARM64MOVDconst)
 10838  		v.AuxInt = ssa.Int64ToAuxInt(int64(uint8(c)))
 10839  		return true
 10840  	}
 10841  	// match: (MOVBUreg x)
 10842  	// cond: v.Type.Size() <= 1
 10843  	// result: x
 10844  	for {
 10845  		x := v_0
 10846  		if !(v.Type.Size() <= 1) {
 10847  			break
 10848  		}
 10849  		v.CopyOf(x)
 10850  		return true
 10851  	}
 10852  	// match: (MOVBUreg (SLLconst [lc] x))
 10853  	// cond: lc >= 8
 10854  	// result: (MOVDconst [0])
 10855  	for {
 10856  		if v_0.Op != ssaop.OpARM64SLLconst {
 10857  			break
 10858  		}
 10859  		lc := ssa.AuxIntToInt64(v_0.AuxInt)
 10860  		if !(lc >= 8) {
 10861  			break
 10862  		}
 10863  		v.Reset(ssaop.OpARM64MOVDconst)
 10864  		v.AuxInt = ssa.Int64ToAuxInt(0)
 10865  		return true
 10866  	}
 10867  	// match: (MOVBUreg (SLLconst [lc] x))
 10868  	// cond: lc < 8
 10869  	// result: (UBFIZ [ssa.ArmBFAuxInt(lc, 8-lc)] x)
 10870  	for {
 10871  		if v_0.Op != ssaop.OpARM64SLLconst {
 10872  			break
 10873  		}
 10874  		lc := ssa.AuxIntToInt64(v_0.AuxInt)
 10875  		x := v_0.Args[0]
 10876  		if !(lc < 8) {
 10877  			break
 10878  		}
 10879  		v.Reset(ssaop.OpARM64UBFIZ)
 10880  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(lc, 8-lc))
 10881  		v.AddArg(x)
 10882  		return true
 10883  	}
 10884  	// match: (MOVBUreg (SRLconst [rc] x))
 10885  	// cond: rc < 8
 10886  	// result: (UBFX [ssa.ArmBFAuxInt(rc, 8)] x)
 10887  	for {
 10888  		if v_0.Op != ssaop.OpARM64SRLconst {
 10889  			break
 10890  		}
 10891  		rc := ssa.AuxIntToInt64(v_0.AuxInt)
 10892  		x := v_0.Args[0]
 10893  		if !(rc < 8) {
 10894  			break
 10895  		}
 10896  		v.Reset(ssaop.OpARM64UBFX)
 10897  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(rc, 8))
 10898  		v.AddArg(x)
 10899  		return true
 10900  	}
 10901  	// match: (MOVBUreg (UBFX [bfc] x))
 10902  	// cond: bfc.Width() <= 8
 10903  	// result: (UBFX [bfc] x)
 10904  	for {
 10905  		if v_0.Op != ssaop.OpARM64UBFX {
 10906  			break
 10907  		}
 10908  		bfc := ssa.AuxIntToArm64BitField(v_0.AuxInt)
 10909  		x := v_0.Args[0]
 10910  		if !(bfc.Width() <= 8) {
 10911  			break
 10912  		}
 10913  		v.Reset(ssaop.OpARM64UBFX)
 10914  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(bfc)
 10915  		v.AddArg(x)
 10916  		return true
 10917  	}
 10918  	return false
 10919  }
 10920  func rewriteValue_OpARM64MOVBload(v *ssa.Value) bool {
 10921  	v_1 := v.Args[1]
 10922  	v_0 := v.Args[0]
 10923  	b := v.Block
 10924  	config := b.Func.Config
 10925  	// match: (MOVBload [off1] {sym} (ADDconst [off2] ptr) mem)
 10926  	// cond: ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)
 10927  	// result: (MOVBload [off1+int32(off2)] {sym} ptr mem)
 10928  	for {
 10929  		off1 := ssa.AuxIntToInt32(v.AuxInt)
 10930  		sym := ssa.AuxToSym(v.Aux)
 10931  		if v_0.Op != ssaop.OpARM64ADDconst {
 10932  			break
 10933  		}
 10934  		off2 := ssa.AuxIntToInt64(v_0.AuxInt)
 10935  		ptr := v_0.Args[0]
 10936  		mem := v_1
 10937  		if !(ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)) {
 10938  			break
 10939  		}
 10940  		v.Reset(ssaop.OpARM64MOVBload)
 10941  		v.AuxInt = ssa.Int32ToAuxInt(off1 + int32(off2))
 10942  		v.Aux = ssa.SymToAux(sym)
 10943  		v.AddArg2(ptr, mem)
 10944  		return true
 10945  	}
 10946  	// match: (MOVBload [off] {sym} (ADD ptr idx) mem)
 10947  	// cond: off == 0 && sym == nil
 10948  	// result: (MOVBloadidx ptr idx mem)
 10949  	for {
 10950  		off := ssa.AuxIntToInt32(v.AuxInt)
 10951  		sym := ssa.AuxToSym(v.Aux)
 10952  		if v_0.Op != ssaop.OpARM64ADD {
 10953  			break
 10954  		}
 10955  		idx := v_0.Args[1]
 10956  		ptr := v_0.Args[0]
 10957  		mem := v_1
 10958  		if !(off == 0 && sym == nil) {
 10959  			break
 10960  		}
 10961  		v.Reset(ssaop.OpARM64MOVBloadidx)
 10962  		v.AddArg3(ptr, idx, mem)
 10963  		return true
 10964  	}
 10965  	// match: (MOVBload [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) mem)
 10966  	// cond: ssa.CanMergeSym(sym1,sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)
 10967  	// result: (MOVBload [off1+off2] {ssa.MergeSym(sym1,sym2)} ptr mem)
 10968  	for {
 10969  		off1 := ssa.AuxIntToInt32(v.AuxInt)
 10970  		sym1 := ssa.AuxToSym(v.Aux)
 10971  		if v_0.Op != ssaop.OpARM64MOVDaddr {
 10972  			break
 10973  		}
 10974  		off2 := ssa.AuxIntToInt32(v_0.AuxInt)
 10975  		sym2 := ssa.AuxToSym(v_0.Aux)
 10976  		ptr := v_0.Args[0]
 10977  		mem := v_1
 10978  		if !(ssa.CanMergeSym(sym1, sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)) {
 10979  			break
 10980  		}
 10981  		v.Reset(ssaop.OpARM64MOVBload)
 10982  		v.AuxInt = ssa.Int32ToAuxInt(off1 + off2)
 10983  		v.Aux = ssa.SymToAux(ssa.MergeSym(sym1, sym2))
 10984  		v.AddArg2(ptr, mem)
 10985  		return true
 10986  	}
 10987  	// match: (MOVBload [off] {sym} (SB) _)
 10988  	// cond: ssa.SymIsRO(sym)
 10989  	// result: (MOVDconst [int64(int8(ssa.Read8(sym, int64(off))))])
 10990  	for {
 10991  		off := ssa.AuxIntToInt32(v.AuxInt)
 10992  		sym := ssa.AuxToSym(v.Aux)
 10993  		if v_0.Op != ssaop.OpSB || !(ssa.SymIsRO(sym)) {
 10994  			break
 10995  		}
 10996  		v.Reset(ssaop.OpARM64MOVDconst)
 10997  		v.AuxInt = ssa.Int64ToAuxInt(int64(int8(ssa.Read8(sym, int64(off)))))
 10998  		return true
 10999  	}
 11000  	return false
 11001  }
 11002  func rewriteValue_OpARM64MOVBloadidx(v *ssa.Value) bool {
 11003  	v_2 := v.Args[2]
 11004  	v_1 := v.Args[1]
 11005  	v_0 := v.Args[0]
 11006  	// match: (MOVBloadidx ptr (MOVDconst [c]) mem)
 11007  	// cond: ssa.Is32Bit(c)
 11008  	// result: (MOVBload [int32(c)] ptr mem)
 11009  	for {
 11010  		ptr := v_0
 11011  		if v_1.Op != ssaop.OpARM64MOVDconst {
 11012  			break
 11013  		}
 11014  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 11015  		mem := v_2
 11016  		if !(ssa.Is32Bit(c)) {
 11017  			break
 11018  		}
 11019  		v.Reset(ssaop.OpARM64MOVBload)
 11020  		v.AuxInt = ssa.Int32ToAuxInt(int32(c))
 11021  		v.AddArg2(ptr, mem)
 11022  		return true
 11023  	}
 11024  	// match: (MOVBloadidx (MOVDconst [c]) ptr mem)
 11025  	// cond: ssa.Is32Bit(c)
 11026  	// result: (MOVBload [int32(c)] ptr mem)
 11027  	for {
 11028  		if v_0.Op != ssaop.OpARM64MOVDconst {
 11029  			break
 11030  		}
 11031  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 11032  		ptr := v_1
 11033  		mem := v_2
 11034  		if !(ssa.Is32Bit(c)) {
 11035  			break
 11036  		}
 11037  		v.Reset(ssaop.OpARM64MOVBload)
 11038  		v.AuxInt = ssa.Int32ToAuxInt(int32(c))
 11039  		v.AddArg2(ptr, mem)
 11040  		return true
 11041  	}
 11042  	return false
 11043  }
 11044  func rewriteValue_OpARM64MOVBreg(v *ssa.Value) bool {
 11045  	v_0 := v.Args[0]
 11046  	// match: (MOVBreg (MOVDconst [c]))
 11047  	// result: (MOVDconst [int64(int8(c))])
 11048  	for {
 11049  		if v_0.Op != ssaop.OpARM64MOVDconst {
 11050  			break
 11051  		}
 11052  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 11053  		v.Reset(ssaop.OpARM64MOVDconst)
 11054  		v.AuxInt = ssa.Int64ToAuxInt(int64(int8(c)))
 11055  		return true
 11056  	}
 11057  	// match: (MOVBreg x)
 11058  	// cond: v.Type.Size() <= 1
 11059  	// result: x
 11060  	for {
 11061  		x := v_0
 11062  		if !(v.Type.Size() <= 1) {
 11063  			break
 11064  		}
 11065  		v.CopyOf(x)
 11066  		return true
 11067  	}
 11068  	// match: (MOVBreg <t> (ANDconst x [c]))
 11069  	// cond: uint64(c) & uint64(0xffffffffffffff80) == 0
 11070  	// result: (ANDconst <t> x [c])
 11071  	for {
 11072  		t := v.Type
 11073  		if v_0.Op != ssaop.OpARM64ANDconst {
 11074  			break
 11075  		}
 11076  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 11077  		x := v_0.Args[0]
 11078  		if !(uint64(c)&uint64(0xffffffffffffff80) == 0) {
 11079  			break
 11080  		}
 11081  		v.Reset(ssaop.OpARM64ANDconst)
 11082  		v.Type = t
 11083  		v.AuxInt = ssa.Int64ToAuxInt(c)
 11084  		v.AddArg(x)
 11085  		return true
 11086  	}
 11087  	// match: (MOVBreg (SLLconst [lc] x))
 11088  	// cond: lc < 8
 11089  	// result: (SBFIZ [ssa.ArmBFAuxInt(lc, 8-lc)] x)
 11090  	for {
 11091  		if v_0.Op != ssaop.OpARM64SLLconst {
 11092  			break
 11093  		}
 11094  		lc := ssa.AuxIntToInt64(v_0.AuxInt)
 11095  		x := v_0.Args[0]
 11096  		if !(lc < 8) {
 11097  			break
 11098  		}
 11099  		v.Reset(ssaop.OpARM64SBFIZ)
 11100  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(lc, 8-lc))
 11101  		v.AddArg(x)
 11102  		return true
 11103  	}
 11104  	// match: (MOVBreg (SBFX [bfc] x))
 11105  	// cond: bfc.Width() <= 8
 11106  	// result: (SBFX [bfc] x)
 11107  	for {
 11108  		if v_0.Op != ssaop.OpARM64SBFX {
 11109  			break
 11110  		}
 11111  		bfc := ssa.AuxIntToArm64BitField(v_0.AuxInt)
 11112  		x := v_0.Args[0]
 11113  		if !(bfc.Width() <= 8) {
 11114  			break
 11115  		}
 11116  		v.Reset(ssaop.OpARM64SBFX)
 11117  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(bfc)
 11118  		v.AddArg(x)
 11119  		return true
 11120  	}
 11121  	return false
 11122  }
 11123  func rewriteValue_OpARM64MOVBstore(v *ssa.Value) bool {
 11124  	v_2 := v.Args[2]
 11125  	v_1 := v.Args[1]
 11126  	v_0 := v.Args[0]
 11127  	b := v.Block
 11128  	config := b.Func.Config
 11129  	// match: (MOVBstore [off1] {sym} (ADDconst [off2] ptr) val mem)
 11130  	// cond: ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)
 11131  	// result: (MOVBstore [off1+int32(off2)] {sym} ptr val mem)
 11132  	for {
 11133  		off1 := ssa.AuxIntToInt32(v.AuxInt)
 11134  		sym := ssa.AuxToSym(v.Aux)
 11135  		if v_0.Op != ssaop.OpARM64ADDconst {
 11136  			break
 11137  		}
 11138  		off2 := ssa.AuxIntToInt64(v_0.AuxInt)
 11139  		ptr := v_0.Args[0]
 11140  		val := v_1
 11141  		mem := v_2
 11142  		if !(ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)) {
 11143  			break
 11144  		}
 11145  		v.Reset(ssaop.OpARM64MOVBstore)
 11146  		v.AuxInt = ssa.Int32ToAuxInt(off1 + int32(off2))
 11147  		v.Aux = ssa.SymToAux(sym)
 11148  		v.AddArg3(ptr, val, mem)
 11149  		return true
 11150  	}
 11151  	// match: (MOVBstore [off] {sym} (ADD ptr idx) val mem)
 11152  	// cond: off == 0 && sym == nil
 11153  	// result: (MOVBstoreidx ptr idx val mem)
 11154  	for {
 11155  		off := ssa.AuxIntToInt32(v.AuxInt)
 11156  		sym := ssa.AuxToSym(v.Aux)
 11157  		if v_0.Op != ssaop.OpARM64ADD {
 11158  			break
 11159  		}
 11160  		idx := v_0.Args[1]
 11161  		ptr := v_0.Args[0]
 11162  		val := v_1
 11163  		mem := v_2
 11164  		if !(off == 0 && sym == nil) {
 11165  			break
 11166  		}
 11167  		v.Reset(ssaop.OpARM64MOVBstoreidx)
 11168  		v.AddArg4(ptr, idx, val, mem)
 11169  		return true
 11170  	}
 11171  	// match: (MOVBstore [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) val mem)
 11172  	// cond: ssa.CanMergeSym(sym1,sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)
 11173  	// result: (MOVBstore [off1+off2] {ssa.MergeSym(sym1,sym2)} ptr val mem)
 11174  	for {
 11175  		off1 := ssa.AuxIntToInt32(v.AuxInt)
 11176  		sym1 := ssa.AuxToSym(v.Aux)
 11177  		if v_0.Op != ssaop.OpARM64MOVDaddr {
 11178  			break
 11179  		}
 11180  		off2 := ssa.AuxIntToInt32(v_0.AuxInt)
 11181  		sym2 := ssa.AuxToSym(v_0.Aux)
 11182  		ptr := v_0.Args[0]
 11183  		val := v_1
 11184  		mem := v_2
 11185  		if !(ssa.CanMergeSym(sym1, sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)) {
 11186  			break
 11187  		}
 11188  		v.Reset(ssaop.OpARM64MOVBstore)
 11189  		v.AuxInt = ssa.Int32ToAuxInt(off1 + off2)
 11190  		v.Aux = ssa.SymToAux(ssa.MergeSym(sym1, sym2))
 11191  		v.AddArg3(ptr, val, mem)
 11192  		return true
 11193  	}
 11194  	// match: (MOVBstore [off] {sym} ptr (MOVBreg x) mem)
 11195  	// result: (MOVBstore [off] {sym} ptr x mem)
 11196  	for {
 11197  		off := ssa.AuxIntToInt32(v.AuxInt)
 11198  		sym := ssa.AuxToSym(v.Aux)
 11199  		ptr := v_0
 11200  		if v_1.Op != ssaop.OpARM64MOVBreg {
 11201  			break
 11202  		}
 11203  		x := v_1.Args[0]
 11204  		mem := v_2
 11205  		v.Reset(ssaop.OpARM64MOVBstore)
 11206  		v.AuxInt = ssa.Int32ToAuxInt(off)
 11207  		v.Aux = ssa.SymToAux(sym)
 11208  		v.AddArg3(ptr, x, mem)
 11209  		return true
 11210  	}
 11211  	// match: (MOVBstore [off] {sym} ptr (MOVBUreg x) mem)
 11212  	// result: (MOVBstore [off] {sym} ptr x mem)
 11213  	for {
 11214  		off := ssa.AuxIntToInt32(v.AuxInt)
 11215  		sym := ssa.AuxToSym(v.Aux)
 11216  		ptr := v_0
 11217  		if v_1.Op != ssaop.OpARM64MOVBUreg {
 11218  			break
 11219  		}
 11220  		x := v_1.Args[0]
 11221  		mem := v_2
 11222  		v.Reset(ssaop.OpARM64MOVBstore)
 11223  		v.AuxInt = ssa.Int32ToAuxInt(off)
 11224  		v.Aux = ssa.SymToAux(sym)
 11225  		v.AddArg3(ptr, x, mem)
 11226  		return true
 11227  	}
 11228  	// match: (MOVBstore [off] {sym} ptr (MOVHreg x) mem)
 11229  	// result: (MOVBstore [off] {sym} ptr x mem)
 11230  	for {
 11231  		off := ssa.AuxIntToInt32(v.AuxInt)
 11232  		sym := ssa.AuxToSym(v.Aux)
 11233  		ptr := v_0
 11234  		if v_1.Op != ssaop.OpARM64MOVHreg {
 11235  			break
 11236  		}
 11237  		x := v_1.Args[0]
 11238  		mem := v_2
 11239  		v.Reset(ssaop.OpARM64MOVBstore)
 11240  		v.AuxInt = ssa.Int32ToAuxInt(off)
 11241  		v.Aux = ssa.SymToAux(sym)
 11242  		v.AddArg3(ptr, x, mem)
 11243  		return true
 11244  	}
 11245  	// match: (MOVBstore [off] {sym} ptr (MOVHUreg x) mem)
 11246  	// result: (MOVBstore [off] {sym} ptr x mem)
 11247  	for {
 11248  		off := ssa.AuxIntToInt32(v.AuxInt)
 11249  		sym := ssa.AuxToSym(v.Aux)
 11250  		ptr := v_0
 11251  		if v_1.Op != ssaop.OpARM64MOVHUreg {
 11252  			break
 11253  		}
 11254  		x := v_1.Args[0]
 11255  		mem := v_2
 11256  		v.Reset(ssaop.OpARM64MOVBstore)
 11257  		v.AuxInt = ssa.Int32ToAuxInt(off)
 11258  		v.Aux = ssa.SymToAux(sym)
 11259  		v.AddArg3(ptr, x, mem)
 11260  		return true
 11261  	}
 11262  	// match: (MOVBstore [off] {sym} ptr (MOVWreg x) mem)
 11263  	// result: (MOVBstore [off] {sym} ptr x mem)
 11264  	for {
 11265  		off := ssa.AuxIntToInt32(v.AuxInt)
 11266  		sym := ssa.AuxToSym(v.Aux)
 11267  		ptr := v_0
 11268  		if v_1.Op != ssaop.OpARM64MOVWreg {
 11269  			break
 11270  		}
 11271  		x := v_1.Args[0]
 11272  		mem := v_2
 11273  		v.Reset(ssaop.OpARM64MOVBstore)
 11274  		v.AuxInt = ssa.Int32ToAuxInt(off)
 11275  		v.Aux = ssa.SymToAux(sym)
 11276  		v.AddArg3(ptr, x, mem)
 11277  		return true
 11278  	}
 11279  	// match: (MOVBstore [off] {sym} ptr (MOVWUreg x) mem)
 11280  	// result: (MOVBstore [off] {sym} ptr x mem)
 11281  	for {
 11282  		off := ssa.AuxIntToInt32(v.AuxInt)
 11283  		sym := ssa.AuxToSym(v.Aux)
 11284  		ptr := v_0
 11285  		if v_1.Op != ssaop.OpARM64MOVWUreg {
 11286  			break
 11287  		}
 11288  		x := v_1.Args[0]
 11289  		mem := v_2
 11290  		v.Reset(ssaop.OpARM64MOVBstore)
 11291  		v.AuxInt = ssa.Int32ToAuxInt(off)
 11292  		v.Aux = ssa.SymToAux(sym)
 11293  		v.AddArg3(ptr, x, mem)
 11294  		return true
 11295  	}
 11296  	return false
 11297  }
 11298  func rewriteValue_OpARM64MOVBstoreidx(v *ssa.Value) bool {
 11299  	v_3 := v.Args[3]
 11300  	v_2 := v.Args[2]
 11301  	v_1 := v.Args[1]
 11302  	v_0 := v.Args[0]
 11303  	// match: (MOVBstoreidx ptr (MOVDconst [c]) val mem)
 11304  	// cond: ssa.Is32Bit(c)
 11305  	// result: (MOVBstore [int32(c)] ptr val mem)
 11306  	for {
 11307  		ptr := v_0
 11308  		if v_1.Op != ssaop.OpARM64MOVDconst {
 11309  			break
 11310  		}
 11311  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 11312  		val := v_2
 11313  		mem := v_3
 11314  		if !(ssa.Is32Bit(c)) {
 11315  			break
 11316  		}
 11317  		v.Reset(ssaop.OpARM64MOVBstore)
 11318  		v.AuxInt = ssa.Int32ToAuxInt(int32(c))
 11319  		v.AddArg3(ptr, val, mem)
 11320  		return true
 11321  	}
 11322  	// match: (MOVBstoreidx (MOVDconst [c]) idx val mem)
 11323  	// cond: ssa.Is32Bit(c)
 11324  	// result: (MOVBstore [int32(c)] idx val mem)
 11325  	for {
 11326  		if v_0.Op != ssaop.OpARM64MOVDconst {
 11327  			break
 11328  		}
 11329  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 11330  		idx := v_1
 11331  		val := v_2
 11332  		mem := v_3
 11333  		if !(ssa.Is32Bit(c)) {
 11334  			break
 11335  		}
 11336  		v.Reset(ssaop.OpARM64MOVBstore)
 11337  		v.AuxInt = ssa.Int32ToAuxInt(int32(c))
 11338  		v.AddArg3(idx, val, mem)
 11339  		return true
 11340  	}
 11341  	// match: (MOVBstoreidx ptr idx (MOVBreg x) mem)
 11342  	// result: (MOVBstoreidx ptr idx x mem)
 11343  	for {
 11344  		ptr := v_0
 11345  		idx := v_1
 11346  		if v_2.Op != ssaop.OpARM64MOVBreg {
 11347  			break
 11348  		}
 11349  		x := v_2.Args[0]
 11350  		mem := v_3
 11351  		v.Reset(ssaop.OpARM64MOVBstoreidx)
 11352  		v.AddArg4(ptr, idx, x, mem)
 11353  		return true
 11354  	}
 11355  	// match: (MOVBstoreidx ptr idx (MOVBUreg x) mem)
 11356  	// result: (MOVBstoreidx ptr idx x mem)
 11357  	for {
 11358  		ptr := v_0
 11359  		idx := v_1
 11360  		if v_2.Op != ssaop.OpARM64MOVBUreg {
 11361  			break
 11362  		}
 11363  		x := v_2.Args[0]
 11364  		mem := v_3
 11365  		v.Reset(ssaop.OpARM64MOVBstoreidx)
 11366  		v.AddArg4(ptr, idx, x, mem)
 11367  		return true
 11368  	}
 11369  	// match: (MOVBstoreidx ptr idx (MOVHreg x) mem)
 11370  	// result: (MOVBstoreidx ptr idx x mem)
 11371  	for {
 11372  		ptr := v_0
 11373  		idx := v_1
 11374  		if v_2.Op != ssaop.OpARM64MOVHreg {
 11375  			break
 11376  		}
 11377  		x := v_2.Args[0]
 11378  		mem := v_3
 11379  		v.Reset(ssaop.OpARM64MOVBstoreidx)
 11380  		v.AddArg4(ptr, idx, x, mem)
 11381  		return true
 11382  	}
 11383  	// match: (MOVBstoreidx ptr idx (MOVHUreg x) mem)
 11384  	// result: (MOVBstoreidx ptr idx x mem)
 11385  	for {
 11386  		ptr := v_0
 11387  		idx := v_1
 11388  		if v_2.Op != ssaop.OpARM64MOVHUreg {
 11389  			break
 11390  		}
 11391  		x := v_2.Args[0]
 11392  		mem := v_3
 11393  		v.Reset(ssaop.OpARM64MOVBstoreidx)
 11394  		v.AddArg4(ptr, idx, x, mem)
 11395  		return true
 11396  	}
 11397  	// match: (MOVBstoreidx ptr idx (MOVWreg x) mem)
 11398  	// result: (MOVBstoreidx ptr idx x mem)
 11399  	for {
 11400  		ptr := v_0
 11401  		idx := v_1
 11402  		if v_2.Op != ssaop.OpARM64MOVWreg {
 11403  			break
 11404  		}
 11405  		x := v_2.Args[0]
 11406  		mem := v_3
 11407  		v.Reset(ssaop.OpARM64MOVBstoreidx)
 11408  		v.AddArg4(ptr, idx, x, mem)
 11409  		return true
 11410  	}
 11411  	// match: (MOVBstoreidx ptr idx (MOVWUreg x) mem)
 11412  	// result: (MOVBstoreidx ptr idx x mem)
 11413  	for {
 11414  		ptr := v_0
 11415  		idx := v_1
 11416  		if v_2.Op != ssaop.OpARM64MOVWUreg {
 11417  			break
 11418  		}
 11419  		x := v_2.Args[0]
 11420  		mem := v_3
 11421  		v.Reset(ssaop.OpARM64MOVBstoreidx)
 11422  		v.AddArg4(ptr, idx, x, mem)
 11423  		return true
 11424  	}
 11425  	return false
 11426  }
 11427  func rewriteValue_OpARM64MOVDload(v *ssa.Value) bool {
 11428  	v_1 := v.Args[1]
 11429  	v_0 := v.Args[0]
 11430  	b := v.Block
 11431  	config := b.Func.Config
 11432  	// match: (MOVDload [off] {sym} ptr (FMOVDstore [off] {sym} ptr val _))
 11433  	// result: (FMOVDfpgp val)
 11434  	for {
 11435  		off := ssa.AuxIntToInt32(v.AuxInt)
 11436  		sym := ssa.AuxToSym(v.Aux)
 11437  		ptr := v_0
 11438  		if v_1.Op != ssaop.OpARM64FMOVDstore || ssa.AuxIntToInt32(v_1.AuxInt) != off || ssa.AuxToSym(v_1.Aux) != sym {
 11439  			break
 11440  		}
 11441  		val := v_1.Args[1]
 11442  		if ptr != v_1.Args[0] {
 11443  			break
 11444  		}
 11445  		v.Reset(ssaop.OpARM64FMOVDfpgp)
 11446  		v.AddArg(val)
 11447  		return true
 11448  	}
 11449  	// match: (MOVDload [off1] {sym} (ADDconst [off2] ptr) mem)
 11450  	// cond: ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)
 11451  	// result: (MOVDload [off1+int32(off2)] {sym} ptr mem)
 11452  	for {
 11453  		off1 := ssa.AuxIntToInt32(v.AuxInt)
 11454  		sym := ssa.AuxToSym(v.Aux)
 11455  		if v_0.Op != ssaop.OpARM64ADDconst {
 11456  			break
 11457  		}
 11458  		off2 := ssa.AuxIntToInt64(v_0.AuxInt)
 11459  		ptr := v_0.Args[0]
 11460  		mem := v_1
 11461  		if !(ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)) {
 11462  			break
 11463  		}
 11464  		v.Reset(ssaop.OpARM64MOVDload)
 11465  		v.AuxInt = ssa.Int32ToAuxInt(off1 + int32(off2))
 11466  		v.Aux = ssa.SymToAux(sym)
 11467  		v.AddArg2(ptr, mem)
 11468  		return true
 11469  	}
 11470  	// match: (MOVDload [off] {sym} (ADD ptr idx) mem)
 11471  	// cond: off == 0 && sym == nil
 11472  	// result: (MOVDloadidx ptr idx mem)
 11473  	for {
 11474  		off := ssa.AuxIntToInt32(v.AuxInt)
 11475  		sym := ssa.AuxToSym(v.Aux)
 11476  		if v_0.Op != ssaop.OpARM64ADD {
 11477  			break
 11478  		}
 11479  		idx := v_0.Args[1]
 11480  		ptr := v_0.Args[0]
 11481  		mem := v_1
 11482  		if !(off == 0 && sym == nil) {
 11483  			break
 11484  		}
 11485  		v.Reset(ssaop.OpARM64MOVDloadidx)
 11486  		v.AddArg3(ptr, idx, mem)
 11487  		return true
 11488  	}
 11489  	// match: (MOVDload [off] {sym} (ADDshiftLL [3] ptr idx) mem)
 11490  	// cond: off == 0 && sym == nil
 11491  	// result: (MOVDloadidx8 ptr idx mem)
 11492  	for {
 11493  		off := ssa.AuxIntToInt32(v.AuxInt)
 11494  		sym := ssa.AuxToSym(v.Aux)
 11495  		if v_0.Op != ssaop.OpARM64ADDshiftLL || ssa.AuxIntToInt64(v_0.AuxInt) != 3 {
 11496  			break
 11497  		}
 11498  		idx := v_0.Args[1]
 11499  		ptr := v_0.Args[0]
 11500  		mem := v_1
 11501  		if !(off == 0 && sym == nil) {
 11502  			break
 11503  		}
 11504  		v.Reset(ssaop.OpARM64MOVDloadidx8)
 11505  		v.AddArg3(ptr, idx, mem)
 11506  		return true
 11507  	}
 11508  	// match: (MOVDload [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) mem)
 11509  	// cond: ssa.CanMergeSym(sym1,sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)
 11510  	// result: (MOVDload [off1+off2] {ssa.MergeSym(sym1,sym2)} ptr mem)
 11511  	for {
 11512  		off1 := ssa.AuxIntToInt32(v.AuxInt)
 11513  		sym1 := ssa.AuxToSym(v.Aux)
 11514  		if v_0.Op != ssaop.OpARM64MOVDaddr {
 11515  			break
 11516  		}
 11517  		off2 := ssa.AuxIntToInt32(v_0.AuxInt)
 11518  		sym2 := ssa.AuxToSym(v_0.Aux)
 11519  		ptr := v_0.Args[0]
 11520  		mem := v_1
 11521  		if !(ssa.CanMergeSym(sym1, sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)) {
 11522  			break
 11523  		}
 11524  		v.Reset(ssaop.OpARM64MOVDload)
 11525  		v.AuxInt = ssa.Int32ToAuxInt(off1 + off2)
 11526  		v.Aux = ssa.SymToAux(ssa.MergeSym(sym1, sym2))
 11527  		v.AddArg2(ptr, mem)
 11528  		return true
 11529  	}
 11530  	// match: (MOVDload [off] {sym} (SB) _)
 11531  	// cond: ssa.SymIsRO(sym)
 11532  	// result: (MOVDconst [int64(ssa.Read64(sym, int64(off), config.Ctxt.Arch.ByteOrder))])
 11533  	for {
 11534  		off := ssa.AuxIntToInt32(v.AuxInt)
 11535  		sym := ssa.AuxToSym(v.Aux)
 11536  		if v_0.Op != ssaop.OpSB || !(ssa.SymIsRO(sym)) {
 11537  			break
 11538  		}
 11539  		v.Reset(ssaop.OpARM64MOVDconst)
 11540  		v.AuxInt = ssa.Int64ToAuxInt(int64(ssa.Read64(sym, int64(off), config.Ctxt.Arch.ByteOrder)))
 11541  		return true
 11542  	}
 11543  	return false
 11544  }
 11545  func rewriteValue_OpARM64MOVDloadidx(v *ssa.Value) bool {
 11546  	v_2 := v.Args[2]
 11547  	v_1 := v.Args[1]
 11548  	v_0 := v.Args[0]
 11549  	// match: (MOVDloadidx ptr (MOVDconst [c]) mem)
 11550  	// cond: ssa.Is32Bit(c)
 11551  	// result: (MOVDload [int32(c)] ptr mem)
 11552  	for {
 11553  		ptr := v_0
 11554  		if v_1.Op != ssaop.OpARM64MOVDconst {
 11555  			break
 11556  		}
 11557  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 11558  		mem := v_2
 11559  		if !(ssa.Is32Bit(c)) {
 11560  			break
 11561  		}
 11562  		v.Reset(ssaop.OpARM64MOVDload)
 11563  		v.AuxInt = ssa.Int32ToAuxInt(int32(c))
 11564  		v.AddArg2(ptr, mem)
 11565  		return true
 11566  	}
 11567  	// match: (MOVDloadidx (MOVDconst [c]) ptr mem)
 11568  	// cond: ssa.Is32Bit(c)
 11569  	// result: (MOVDload [int32(c)] ptr mem)
 11570  	for {
 11571  		if v_0.Op != ssaop.OpARM64MOVDconst {
 11572  			break
 11573  		}
 11574  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 11575  		ptr := v_1
 11576  		mem := v_2
 11577  		if !(ssa.Is32Bit(c)) {
 11578  			break
 11579  		}
 11580  		v.Reset(ssaop.OpARM64MOVDload)
 11581  		v.AuxInt = ssa.Int32ToAuxInt(int32(c))
 11582  		v.AddArg2(ptr, mem)
 11583  		return true
 11584  	}
 11585  	// match: (MOVDloadidx ptr (SLLconst [3] idx) mem)
 11586  	// result: (MOVDloadidx8 ptr idx mem)
 11587  	for {
 11588  		ptr := v_0
 11589  		if v_1.Op != ssaop.OpARM64SLLconst || ssa.AuxIntToInt64(v_1.AuxInt) != 3 {
 11590  			break
 11591  		}
 11592  		idx := v_1.Args[0]
 11593  		mem := v_2
 11594  		v.Reset(ssaop.OpARM64MOVDloadidx8)
 11595  		v.AddArg3(ptr, idx, mem)
 11596  		return true
 11597  	}
 11598  	// match: (MOVDloadidx (SLLconst [3] idx) ptr mem)
 11599  	// result: (MOVDloadidx8 ptr idx mem)
 11600  	for {
 11601  		if v_0.Op != ssaop.OpARM64SLLconst || ssa.AuxIntToInt64(v_0.AuxInt) != 3 {
 11602  			break
 11603  		}
 11604  		idx := v_0.Args[0]
 11605  		ptr := v_1
 11606  		mem := v_2
 11607  		v.Reset(ssaop.OpARM64MOVDloadidx8)
 11608  		v.AddArg3(ptr, idx, mem)
 11609  		return true
 11610  	}
 11611  	return false
 11612  }
 11613  func rewriteValue_OpARM64MOVDloadidx8(v *ssa.Value) bool {
 11614  	v_2 := v.Args[2]
 11615  	v_1 := v.Args[1]
 11616  	v_0 := v.Args[0]
 11617  	// match: (MOVDloadidx8 ptr (MOVDconst [c]) mem)
 11618  	// cond: ssa.Is32Bit(c<<3)
 11619  	// result: (MOVDload [int32(c)<<3] ptr mem)
 11620  	for {
 11621  		ptr := v_0
 11622  		if v_1.Op != ssaop.OpARM64MOVDconst {
 11623  			break
 11624  		}
 11625  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 11626  		mem := v_2
 11627  		if !(ssa.Is32Bit(c << 3)) {
 11628  			break
 11629  		}
 11630  		v.Reset(ssaop.OpARM64MOVDload)
 11631  		v.AuxInt = ssa.Int32ToAuxInt(int32(c) << 3)
 11632  		v.AddArg2(ptr, mem)
 11633  		return true
 11634  	}
 11635  	return false
 11636  }
 11637  func rewriteValue_OpARM64MOVDnop(v *ssa.Value) bool {
 11638  	v_0 := v.Args[0]
 11639  	// match: (MOVDnop (MOVDconst [c]))
 11640  	// result: (MOVDconst [c])
 11641  	for {
 11642  		if v_0.Op != ssaop.OpARM64MOVDconst {
 11643  			break
 11644  		}
 11645  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 11646  		v.Reset(ssaop.OpARM64MOVDconst)
 11647  		v.AuxInt = ssa.Int64ToAuxInt(c)
 11648  		return true
 11649  	}
 11650  	return false
 11651  }
 11652  func rewriteValue_OpARM64MOVDreg(v *ssa.Value) bool {
 11653  	v_0 := v.Args[0]
 11654  	// match: (MOVDreg x)
 11655  	// cond: x.Uses == 1
 11656  	// result: (MOVDnop x)
 11657  	for {
 11658  		x := v_0
 11659  		if !(x.Uses == 1) {
 11660  			break
 11661  		}
 11662  		v.Reset(ssaop.OpARM64MOVDnop)
 11663  		v.AddArg(x)
 11664  		return true
 11665  	}
 11666  	// match: (MOVDreg (MOVDconst [c]))
 11667  	// result: (MOVDconst [c])
 11668  	for {
 11669  		if v_0.Op != ssaop.OpARM64MOVDconst {
 11670  			break
 11671  		}
 11672  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 11673  		v.Reset(ssaop.OpARM64MOVDconst)
 11674  		v.AuxInt = ssa.Int64ToAuxInt(c)
 11675  		return true
 11676  	}
 11677  	return false
 11678  }
 11679  func rewriteValue_OpARM64MOVDstore(v *ssa.Value) bool {
 11680  	v_2 := v.Args[2]
 11681  	v_1 := v.Args[1]
 11682  	v_0 := v.Args[0]
 11683  	b := v.Block
 11684  	config := b.Func.Config
 11685  	// match: (MOVDstore [off] {sym} ptr (FMOVDfpgp val) mem)
 11686  	// result: (FMOVDstore [off] {sym} ptr val mem)
 11687  	for {
 11688  		off := ssa.AuxIntToInt32(v.AuxInt)
 11689  		sym := ssa.AuxToSym(v.Aux)
 11690  		ptr := v_0
 11691  		if v_1.Op != ssaop.OpARM64FMOVDfpgp {
 11692  			break
 11693  		}
 11694  		val := v_1.Args[0]
 11695  		mem := v_2
 11696  		v.Reset(ssaop.OpARM64FMOVDstore)
 11697  		v.AuxInt = ssa.Int32ToAuxInt(off)
 11698  		v.Aux = ssa.SymToAux(sym)
 11699  		v.AddArg3(ptr, val, mem)
 11700  		return true
 11701  	}
 11702  	// match: (MOVDstore [off1] {sym} (ADDconst [off2] ptr) val mem)
 11703  	// cond: ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)
 11704  	// result: (MOVDstore [off1+int32(off2)] {sym} ptr val mem)
 11705  	for {
 11706  		off1 := ssa.AuxIntToInt32(v.AuxInt)
 11707  		sym := ssa.AuxToSym(v.Aux)
 11708  		if v_0.Op != ssaop.OpARM64ADDconst {
 11709  			break
 11710  		}
 11711  		off2 := ssa.AuxIntToInt64(v_0.AuxInt)
 11712  		ptr := v_0.Args[0]
 11713  		val := v_1
 11714  		mem := v_2
 11715  		if !(ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)) {
 11716  			break
 11717  		}
 11718  		v.Reset(ssaop.OpARM64MOVDstore)
 11719  		v.AuxInt = ssa.Int32ToAuxInt(off1 + int32(off2))
 11720  		v.Aux = ssa.SymToAux(sym)
 11721  		v.AddArg3(ptr, val, mem)
 11722  		return true
 11723  	}
 11724  	// match: (MOVDstore [off] {sym} (ADD ptr idx) val mem)
 11725  	// cond: off == 0 && sym == nil
 11726  	// result: (MOVDstoreidx ptr idx val mem)
 11727  	for {
 11728  		off := ssa.AuxIntToInt32(v.AuxInt)
 11729  		sym := ssa.AuxToSym(v.Aux)
 11730  		if v_0.Op != ssaop.OpARM64ADD {
 11731  			break
 11732  		}
 11733  		idx := v_0.Args[1]
 11734  		ptr := v_0.Args[0]
 11735  		val := v_1
 11736  		mem := v_2
 11737  		if !(off == 0 && sym == nil) {
 11738  			break
 11739  		}
 11740  		v.Reset(ssaop.OpARM64MOVDstoreidx)
 11741  		v.AddArg4(ptr, idx, val, mem)
 11742  		return true
 11743  	}
 11744  	// match: (MOVDstore [off] {sym} (ADDshiftLL [3] ptr idx) val mem)
 11745  	// cond: off == 0 && sym == nil
 11746  	// result: (MOVDstoreidx8 ptr idx val mem)
 11747  	for {
 11748  		off := ssa.AuxIntToInt32(v.AuxInt)
 11749  		sym := ssa.AuxToSym(v.Aux)
 11750  		if v_0.Op != ssaop.OpARM64ADDshiftLL || ssa.AuxIntToInt64(v_0.AuxInt) != 3 {
 11751  			break
 11752  		}
 11753  		idx := v_0.Args[1]
 11754  		ptr := v_0.Args[0]
 11755  		val := v_1
 11756  		mem := v_2
 11757  		if !(off == 0 && sym == nil) {
 11758  			break
 11759  		}
 11760  		v.Reset(ssaop.OpARM64MOVDstoreidx8)
 11761  		v.AddArg4(ptr, idx, val, mem)
 11762  		return true
 11763  	}
 11764  	// match: (MOVDstore [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) val mem)
 11765  	// cond: ssa.CanMergeSym(sym1,sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)
 11766  	// result: (MOVDstore [off1+off2] {ssa.MergeSym(sym1,sym2)} ptr val mem)
 11767  	for {
 11768  		off1 := ssa.AuxIntToInt32(v.AuxInt)
 11769  		sym1 := ssa.AuxToSym(v.Aux)
 11770  		if v_0.Op != ssaop.OpARM64MOVDaddr {
 11771  			break
 11772  		}
 11773  		off2 := ssa.AuxIntToInt32(v_0.AuxInt)
 11774  		sym2 := ssa.AuxToSym(v_0.Aux)
 11775  		ptr := v_0.Args[0]
 11776  		val := v_1
 11777  		mem := v_2
 11778  		if !(ssa.CanMergeSym(sym1, sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)) {
 11779  			break
 11780  		}
 11781  		v.Reset(ssaop.OpARM64MOVDstore)
 11782  		v.AuxInt = ssa.Int32ToAuxInt(off1 + off2)
 11783  		v.Aux = ssa.SymToAux(ssa.MergeSym(sym1, sym2))
 11784  		v.AddArg3(ptr, val, mem)
 11785  		return true
 11786  	}
 11787  	return false
 11788  }
 11789  func rewriteValue_OpARM64MOVDstoreidx(v *ssa.Value) bool {
 11790  	v_3 := v.Args[3]
 11791  	v_2 := v.Args[2]
 11792  	v_1 := v.Args[1]
 11793  	v_0 := v.Args[0]
 11794  	// match: (MOVDstoreidx ptr (MOVDconst [c]) val mem)
 11795  	// cond: ssa.Is32Bit(c)
 11796  	// result: (MOVDstore [int32(c)] ptr val mem)
 11797  	for {
 11798  		ptr := v_0
 11799  		if v_1.Op != ssaop.OpARM64MOVDconst {
 11800  			break
 11801  		}
 11802  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 11803  		val := v_2
 11804  		mem := v_3
 11805  		if !(ssa.Is32Bit(c)) {
 11806  			break
 11807  		}
 11808  		v.Reset(ssaop.OpARM64MOVDstore)
 11809  		v.AuxInt = ssa.Int32ToAuxInt(int32(c))
 11810  		v.AddArg3(ptr, val, mem)
 11811  		return true
 11812  	}
 11813  	// match: (MOVDstoreidx (MOVDconst [c]) idx val mem)
 11814  	// cond: ssa.Is32Bit(c)
 11815  	// result: (MOVDstore [int32(c)] idx val mem)
 11816  	for {
 11817  		if v_0.Op != ssaop.OpARM64MOVDconst {
 11818  			break
 11819  		}
 11820  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 11821  		idx := v_1
 11822  		val := v_2
 11823  		mem := v_3
 11824  		if !(ssa.Is32Bit(c)) {
 11825  			break
 11826  		}
 11827  		v.Reset(ssaop.OpARM64MOVDstore)
 11828  		v.AuxInt = ssa.Int32ToAuxInt(int32(c))
 11829  		v.AddArg3(idx, val, mem)
 11830  		return true
 11831  	}
 11832  	// match: (MOVDstoreidx ptr (SLLconst [3] idx) val mem)
 11833  	// result: (MOVDstoreidx8 ptr idx val mem)
 11834  	for {
 11835  		ptr := v_0
 11836  		if v_1.Op != ssaop.OpARM64SLLconst || ssa.AuxIntToInt64(v_1.AuxInt) != 3 {
 11837  			break
 11838  		}
 11839  		idx := v_1.Args[0]
 11840  		val := v_2
 11841  		mem := v_3
 11842  		v.Reset(ssaop.OpARM64MOVDstoreidx8)
 11843  		v.AddArg4(ptr, idx, val, mem)
 11844  		return true
 11845  	}
 11846  	// match: (MOVDstoreidx (SLLconst [3] idx) ptr val mem)
 11847  	// result: (MOVDstoreidx8 ptr idx val mem)
 11848  	for {
 11849  		if v_0.Op != ssaop.OpARM64SLLconst || ssa.AuxIntToInt64(v_0.AuxInt) != 3 {
 11850  			break
 11851  		}
 11852  		idx := v_0.Args[0]
 11853  		ptr := v_1
 11854  		val := v_2
 11855  		mem := v_3
 11856  		v.Reset(ssaop.OpARM64MOVDstoreidx8)
 11857  		v.AddArg4(ptr, idx, val, mem)
 11858  		return true
 11859  	}
 11860  	return false
 11861  }
 11862  func rewriteValue_OpARM64MOVDstoreidx8(v *ssa.Value) bool {
 11863  	v_3 := v.Args[3]
 11864  	v_2 := v.Args[2]
 11865  	v_1 := v.Args[1]
 11866  	v_0 := v.Args[0]
 11867  	// match: (MOVDstoreidx8 ptr (MOVDconst [c]) val mem)
 11868  	// cond: ssa.Is32Bit(c<<3)
 11869  	// result: (MOVDstore [int32(c)<<3] ptr val mem)
 11870  	for {
 11871  		ptr := v_0
 11872  		if v_1.Op != ssaop.OpARM64MOVDconst {
 11873  			break
 11874  		}
 11875  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 11876  		val := v_2
 11877  		mem := v_3
 11878  		if !(ssa.Is32Bit(c << 3)) {
 11879  			break
 11880  		}
 11881  		v.Reset(ssaop.OpARM64MOVDstore)
 11882  		v.AuxInt = ssa.Int32ToAuxInt(int32(c) << 3)
 11883  		v.AddArg3(ptr, val, mem)
 11884  		return true
 11885  	}
 11886  	return false
 11887  }
 11888  func rewriteValue_OpARM64MOVHUload(v *ssa.Value) bool {
 11889  	v_1 := v.Args[1]
 11890  	v_0 := v.Args[0]
 11891  	b := v.Block
 11892  	config := b.Func.Config
 11893  	// match: (MOVHUload [off1] {sym} (ADDconst [off2] ptr) mem)
 11894  	// cond: ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)
 11895  	// result: (MOVHUload [off1+int32(off2)] {sym} ptr mem)
 11896  	for {
 11897  		off1 := ssa.AuxIntToInt32(v.AuxInt)
 11898  		sym := ssa.AuxToSym(v.Aux)
 11899  		if v_0.Op != ssaop.OpARM64ADDconst {
 11900  			break
 11901  		}
 11902  		off2 := ssa.AuxIntToInt64(v_0.AuxInt)
 11903  		ptr := v_0.Args[0]
 11904  		mem := v_1
 11905  		if !(ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)) {
 11906  			break
 11907  		}
 11908  		v.Reset(ssaop.OpARM64MOVHUload)
 11909  		v.AuxInt = ssa.Int32ToAuxInt(off1 + int32(off2))
 11910  		v.Aux = ssa.SymToAux(sym)
 11911  		v.AddArg2(ptr, mem)
 11912  		return true
 11913  	}
 11914  	// match: (MOVHUload [off] {sym} (ADD ptr idx) mem)
 11915  	// cond: off == 0 && sym == nil
 11916  	// result: (MOVHUloadidx ptr idx mem)
 11917  	for {
 11918  		off := ssa.AuxIntToInt32(v.AuxInt)
 11919  		sym := ssa.AuxToSym(v.Aux)
 11920  		if v_0.Op != ssaop.OpARM64ADD {
 11921  			break
 11922  		}
 11923  		idx := v_0.Args[1]
 11924  		ptr := v_0.Args[0]
 11925  		mem := v_1
 11926  		if !(off == 0 && sym == nil) {
 11927  			break
 11928  		}
 11929  		v.Reset(ssaop.OpARM64MOVHUloadidx)
 11930  		v.AddArg3(ptr, idx, mem)
 11931  		return true
 11932  	}
 11933  	// match: (MOVHUload [off] {sym} (ADDshiftLL [1] ptr idx) mem)
 11934  	// cond: off == 0 && sym == nil
 11935  	// result: (MOVHUloadidx2 ptr idx mem)
 11936  	for {
 11937  		off := ssa.AuxIntToInt32(v.AuxInt)
 11938  		sym := ssa.AuxToSym(v.Aux)
 11939  		if v_0.Op != ssaop.OpARM64ADDshiftLL || ssa.AuxIntToInt64(v_0.AuxInt) != 1 {
 11940  			break
 11941  		}
 11942  		idx := v_0.Args[1]
 11943  		ptr := v_0.Args[0]
 11944  		mem := v_1
 11945  		if !(off == 0 && sym == nil) {
 11946  			break
 11947  		}
 11948  		v.Reset(ssaop.OpARM64MOVHUloadidx2)
 11949  		v.AddArg3(ptr, idx, mem)
 11950  		return true
 11951  	}
 11952  	// match: (MOVHUload [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) mem)
 11953  	// cond: ssa.CanMergeSym(sym1,sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)
 11954  	// result: (MOVHUload [off1+off2] {ssa.MergeSym(sym1,sym2)} ptr mem)
 11955  	for {
 11956  		off1 := ssa.AuxIntToInt32(v.AuxInt)
 11957  		sym1 := ssa.AuxToSym(v.Aux)
 11958  		if v_0.Op != ssaop.OpARM64MOVDaddr {
 11959  			break
 11960  		}
 11961  		off2 := ssa.AuxIntToInt32(v_0.AuxInt)
 11962  		sym2 := ssa.AuxToSym(v_0.Aux)
 11963  		ptr := v_0.Args[0]
 11964  		mem := v_1
 11965  		if !(ssa.CanMergeSym(sym1, sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)) {
 11966  			break
 11967  		}
 11968  		v.Reset(ssaop.OpARM64MOVHUload)
 11969  		v.AuxInt = ssa.Int32ToAuxInt(off1 + off2)
 11970  		v.Aux = ssa.SymToAux(ssa.MergeSym(sym1, sym2))
 11971  		v.AddArg2(ptr, mem)
 11972  		return true
 11973  	}
 11974  	// match: (MOVHUload [off] {sym} (SB) _)
 11975  	// cond: ssa.SymIsRO(sym)
 11976  	// result: (MOVDconst [int64(ssa.Read16(sym, int64(off), config.Ctxt.Arch.ByteOrder))])
 11977  	for {
 11978  		off := ssa.AuxIntToInt32(v.AuxInt)
 11979  		sym := ssa.AuxToSym(v.Aux)
 11980  		if v_0.Op != ssaop.OpSB || !(ssa.SymIsRO(sym)) {
 11981  			break
 11982  		}
 11983  		v.Reset(ssaop.OpARM64MOVDconst)
 11984  		v.AuxInt = ssa.Int64ToAuxInt(int64(ssa.Read16(sym, int64(off), config.Ctxt.Arch.ByteOrder)))
 11985  		return true
 11986  	}
 11987  	return false
 11988  }
 11989  func rewriteValue_OpARM64MOVHUloadidx(v *ssa.Value) bool {
 11990  	v_2 := v.Args[2]
 11991  	v_1 := v.Args[1]
 11992  	v_0 := v.Args[0]
 11993  	// match: (MOVHUloadidx ptr (MOVDconst [c]) mem)
 11994  	// cond: ssa.Is32Bit(c)
 11995  	// result: (MOVHUload [int32(c)] ptr mem)
 11996  	for {
 11997  		ptr := v_0
 11998  		if v_1.Op != ssaop.OpARM64MOVDconst {
 11999  			break
 12000  		}
 12001  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 12002  		mem := v_2
 12003  		if !(ssa.Is32Bit(c)) {
 12004  			break
 12005  		}
 12006  		v.Reset(ssaop.OpARM64MOVHUload)
 12007  		v.AuxInt = ssa.Int32ToAuxInt(int32(c))
 12008  		v.AddArg2(ptr, mem)
 12009  		return true
 12010  	}
 12011  	// match: (MOVHUloadidx (MOVDconst [c]) ptr mem)
 12012  	// cond: ssa.Is32Bit(c)
 12013  	// result: (MOVHUload [int32(c)] ptr mem)
 12014  	for {
 12015  		if v_0.Op != ssaop.OpARM64MOVDconst {
 12016  			break
 12017  		}
 12018  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 12019  		ptr := v_1
 12020  		mem := v_2
 12021  		if !(ssa.Is32Bit(c)) {
 12022  			break
 12023  		}
 12024  		v.Reset(ssaop.OpARM64MOVHUload)
 12025  		v.AuxInt = ssa.Int32ToAuxInt(int32(c))
 12026  		v.AddArg2(ptr, mem)
 12027  		return true
 12028  	}
 12029  	// match: (MOVHUloadidx ptr (SLLconst [1] idx) mem)
 12030  	// result: (MOVHUloadidx2 ptr idx mem)
 12031  	for {
 12032  		ptr := v_0
 12033  		if v_1.Op != ssaop.OpARM64SLLconst || ssa.AuxIntToInt64(v_1.AuxInt) != 1 {
 12034  			break
 12035  		}
 12036  		idx := v_1.Args[0]
 12037  		mem := v_2
 12038  		v.Reset(ssaop.OpARM64MOVHUloadidx2)
 12039  		v.AddArg3(ptr, idx, mem)
 12040  		return true
 12041  	}
 12042  	// match: (MOVHUloadidx ptr (ADD idx idx) mem)
 12043  	// result: (MOVHUloadidx2 ptr idx mem)
 12044  	for {
 12045  		ptr := v_0
 12046  		if v_1.Op != ssaop.OpARM64ADD {
 12047  			break
 12048  		}
 12049  		idx := v_1.Args[1]
 12050  		if idx != v_1.Args[0] {
 12051  			break
 12052  		}
 12053  		mem := v_2
 12054  		v.Reset(ssaop.OpARM64MOVHUloadidx2)
 12055  		v.AddArg3(ptr, idx, mem)
 12056  		return true
 12057  	}
 12058  	// match: (MOVHUloadidx (ADD idx idx) ptr mem)
 12059  	// result: (MOVHUloadidx2 ptr idx mem)
 12060  	for {
 12061  		if v_0.Op != ssaop.OpARM64ADD {
 12062  			break
 12063  		}
 12064  		idx := v_0.Args[1]
 12065  		if idx != v_0.Args[0] {
 12066  			break
 12067  		}
 12068  		ptr := v_1
 12069  		mem := v_2
 12070  		v.Reset(ssaop.OpARM64MOVHUloadidx2)
 12071  		v.AddArg3(ptr, idx, mem)
 12072  		return true
 12073  	}
 12074  	return false
 12075  }
 12076  func rewriteValue_OpARM64MOVHUloadidx2(v *ssa.Value) bool {
 12077  	v_2 := v.Args[2]
 12078  	v_1 := v.Args[1]
 12079  	v_0 := v.Args[0]
 12080  	// match: (MOVHUloadidx2 ptr (MOVDconst [c]) mem)
 12081  	// cond: ssa.Is32Bit(c<<1)
 12082  	// result: (MOVHUload [int32(c)<<1] ptr mem)
 12083  	for {
 12084  		ptr := v_0
 12085  		if v_1.Op != ssaop.OpARM64MOVDconst {
 12086  			break
 12087  		}
 12088  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 12089  		mem := v_2
 12090  		if !(ssa.Is32Bit(c << 1)) {
 12091  			break
 12092  		}
 12093  		v.Reset(ssaop.OpARM64MOVHUload)
 12094  		v.AuxInt = ssa.Int32ToAuxInt(int32(c) << 1)
 12095  		v.AddArg2(ptr, mem)
 12096  		return true
 12097  	}
 12098  	return false
 12099  }
 12100  func rewriteValue_OpARM64MOVHUreg(v *ssa.Value) bool {
 12101  	v_0 := v.Args[0]
 12102  	// match: (MOVHUreg (ANDconst [c] x))
 12103  	// result: (ANDconst [c&(1<<16-1)] x)
 12104  	for {
 12105  		if v_0.Op != ssaop.OpARM64ANDconst {
 12106  			break
 12107  		}
 12108  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 12109  		x := v_0.Args[0]
 12110  		v.Reset(ssaop.OpARM64ANDconst)
 12111  		v.AuxInt = ssa.Int64ToAuxInt(c & (1<<16 - 1))
 12112  		v.AddArg(x)
 12113  		return true
 12114  	}
 12115  	// match: (MOVHUreg (MOVDconst [c]))
 12116  	// result: (MOVDconst [int64(uint16(c))])
 12117  	for {
 12118  		if v_0.Op != ssaop.OpARM64MOVDconst {
 12119  			break
 12120  		}
 12121  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 12122  		v.Reset(ssaop.OpARM64MOVDconst)
 12123  		v.AuxInt = ssa.Int64ToAuxInt(int64(uint16(c)))
 12124  		return true
 12125  	}
 12126  	// match: (MOVHUreg x)
 12127  	// cond: v.Type.Size() <= 2
 12128  	// result: x
 12129  	for {
 12130  		x := v_0
 12131  		if !(v.Type.Size() <= 2) {
 12132  			break
 12133  		}
 12134  		v.CopyOf(x)
 12135  		return true
 12136  	}
 12137  	// match: (MOVHUreg (SLLconst [lc] x))
 12138  	// cond: lc >= 16
 12139  	// result: (MOVDconst [0])
 12140  	for {
 12141  		if v_0.Op != ssaop.OpARM64SLLconst {
 12142  			break
 12143  		}
 12144  		lc := ssa.AuxIntToInt64(v_0.AuxInt)
 12145  		if !(lc >= 16) {
 12146  			break
 12147  		}
 12148  		v.Reset(ssaop.OpARM64MOVDconst)
 12149  		v.AuxInt = ssa.Int64ToAuxInt(0)
 12150  		return true
 12151  	}
 12152  	// match: (MOVHUreg (SLLconst [lc] x))
 12153  	// cond: lc < 16
 12154  	// result: (UBFIZ [ssa.ArmBFAuxInt(lc, 16-lc)] x)
 12155  	for {
 12156  		if v_0.Op != ssaop.OpARM64SLLconst {
 12157  			break
 12158  		}
 12159  		lc := ssa.AuxIntToInt64(v_0.AuxInt)
 12160  		x := v_0.Args[0]
 12161  		if !(lc < 16) {
 12162  			break
 12163  		}
 12164  		v.Reset(ssaop.OpARM64UBFIZ)
 12165  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(lc, 16-lc))
 12166  		v.AddArg(x)
 12167  		return true
 12168  	}
 12169  	// match: (MOVHUreg (SRLconst [rc] x))
 12170  	// cond: rc < 16
 12171  	// result: (UBFX [ssa.ArmBFAuxInt(rc, 16)] x)
 12172  	for {
 12173  		if v_0.Op != ssaop.OpARM64SRLconst {
 12174  			break
 12175  		}
 12176  		rc := ssa.AuxIntToInt64(v_0.AuxInt)
 12177  		x := v_0.Args[0]
 12178  		if !(rc < 16) {
 12179  			break
 12180  		}
 12181  		v.Reset(ssaop.OpARM64UBFX)
 12182  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(rc, 16))
 12183  		v.AddArg(x)
 12184  		return true
 12185  	}
 12186  	// match: (MOVHUreg (UBFX [bfc] x))
 12187  	// cond: bfc.Width() <= 16
 12188  	// result: (UBFX [bfc] x)
 12189  	for {
 12190  		if v_0.Op != ssaop.OpARM64UBFX {
 12191  			break
 12192  		}
 12193  		bfc := ssa.AuxIntToArm64BitField(v_0.AuxInt)
 12194  		x := v_0.Args[0]
 12195  		if !(bfc.Width() <= 16) {
 12196  			break
 12197  		}
 12198  		v.Reset(ssaop.OpARM64UBFX)
 12199  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(bfc)
 12200  		v.AddArg(x)
 12201  		return true
 12202  	}
 12203  	return false
 12204  }
 12205  func rewriteValue_OpARM64MOVHload(v *ssa.Value) bool {
 12206  	v_1 := v.Args[1]
 12207  	v_0 := v.Args[0]
 12208  	b := v.Block
 12209  	config := b.Func.Config
 12210  	// match: (MOVHload [off1] {sym} (ADDconst [off2] ptr) mem)
 12211  	// cond: ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)
 12212  	// result: (MOVHload [off1+int32(off2)] {sym} ptr mem)
 12213  	for {
 12214  		off1 := ssa.AuxIntToInt32(v.AuxInt)
 12215  		sym := ssa.AuxToSym(v.Aux)
 12216  		if v_0.Op != ssaop.OpARM64ADDconst {
 12217  			break
 12218  		}
 12219  		off2 := ssa.AuxIntToInt64(v_0.AuxInt)
 12220  		ptr := v_0.Args[0]
 12221  		mem := v_1
 12222  		if !(ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)) {
 12223  			break
 12224  		}
 12225  		v.Reset(ssaop.OpARM64MOVHload)
 12226  		v.AuxInt = ssa.Int32ToAuxInt(off1 + int32(off2))
 12227  		v.Aux = ssa.SymToAux(sym)
 12228  		v.AddArg2(ptr, mem)
 12229  		return true
 12230  	}
 12231  	// match: (MOVHload [off] {sym} (ADD ptr idx) mem)
 12232  	// cond: off == 0 && sym == nil
 12233  	// result: (MOVHloadidx ptr idx mem)
 12234  	for {
 12235  		off := ssa.AuxIntToInt32(v.AuxInt)
 12236  		sym := ssa.AuxToSym(v.Aux)
 12237  		if v_0.Op != ssaop.OpARM64ADD {
 12238  			break
 12239  		}
 12240  		idx := v_0.Args[1]
 12241  		ptr := v_0.Args[0]
 12242  		mem := v_1
 12243  		if !(off == 0 && sym == nil) {
 12244  			break
 12245  		}
 12246  		v.Reset(ssaop.OpARM64MOVHloadidx)
 12247  		v.AddArg3(ptr, idx, mem)
 12248  		return true
 12249  	}
 12250  	// match: (MOVHload [off] {sym} (ADDshiftLL [1] ptr idx) mem)
 12251  	// cond: off == 0 && sym == nil
 12252  	// result: (MOVHloadidx2 ptr idx mem)
 12253  	for {
 12254  		off := ssa.AuxIntToInt32(v.AuxInt)
 12255  		sym := ssa.AuxToSym(v.Aux)
 12256  		if v_0.Op != ssaop.OpARM64ADDshiftLL || ssa.AuxIntToInt64(v_0.AuxInt) != 1 {
 12257  			break
 12258  		}
 12259  		idx := v_0.Args[1]
 12260  		ptr := v_0.Args[0]
 12261  		mem := v_1
 12262  		if !(off == 0 && sym == nil) {
 12263  			break
 12264  		}
 12265  		v.Reset(ssaop.OpARM64MOVHloadidx2)
 12266  		v.AddArg3(ptr, idx, mem)
 12267  		return true
 12268  	}
 12269  	// match: (MOVHload [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) mem)
 12270  	// cond: ssa.CanMergeSym(sym1,sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)
 12271  	// result: (MOVHload [off1+off2] {ssa.MergeSym(sym1,sym2)} ptr mem)
 12272  	for {
 12273  		off1 := ssa.AuxIntToInt32(v.AuxInt)
 12274  		sym1 := ssa.AuxToSym(v.Aux)
 12275  		if v_0.Op != ssaop.OpARM64MOVDaddr {
 12276  			break
 12277  		}
 12278  		off2 := ssa.AuxIntToInt32(v_0.AuxInt)
 12279  		sym2 := ssa.AuxToSym(v_0.Aux)
 12280  		ptr := v_0.Args[0]
 12281  		mem := v_1
 12282  		if !(ssa.CanMergeSym(sym1, sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)) {
 12283  			break
 12284  		}
 12285  		v.Reset(ssaop.OpARM64MOVHload)
 12286  		v.AuxInt = ssa.Int32ToAuxInt(off1 + off2)
 12287  		v.Aux = ssa.SymToAux(ssa.MergeSym(sym1, sym2))
 12288  		v.AddArg2(ptr, mem)
 12289  		return true
 12290  	}
 12291  	// match: (MOVHload [off] {sym} (SB) _)
 12292  	// cond: ssa.SymIsRO(sym)
 12293  	// result: (MOVDconst [int64(int16(ssa.Read16(sym, int64(off), config.Ctxt.Arch.ByteOrder)))])
 12294  	for {
 12295  		off := ssa.AuxIntToInt32(v.AuxInt)
 12296  		sym := ssa.AuxToSym(v.Aux)
 12297  		if v_0.Op != ssaop.OpSB || !(ssa.SymIsRO(sym)) {
 12298  			break
 12299  		}
 12300  		v.Reset(ssaop.OpARM64MOVDconst)
 12301  		v.AuxInt = ssa.Int64ToAuxInt(int64(int16(ssa.Read16(sym, int64(off), config.Ctxt.Arch.ByteOrder))))
 12302  		return true
 12303  	}
 12304  	return false
 12305  }
 12306  func rewriteValue_OpARM64MOVHloadidx(v *ssa.Value) bool {
 12307  	v_2 := v.Args[2]
 12308  	v_1 := v.Args[1]
 12309  	v_0 := v.Args[0]
 12310  	// match: (MOVHloadidx ptr (MOVDconst [c]) mem)
 12311  	// cond: ssa.Is32Bit(c)
 12312  	// result: (MOVHload [int32(c)] ptr mem)
 12313  	for {
 12314  		ptr := v_0
 12315  		if v_1.Op != ssaop.OpARM64MOVDconst {
 12316  			break
 12317  		}
 12318  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 12319  		mem := v_2
 12320  		if !(ssa.Is32Bit(c)) {
 12321  			break
 12322  		}
 12323  		v.Reset(ssaop.OpARM64MOVHload)
 12324  		v.AuxInt = ssa.Int32ToAuxInt(int32(c))
 12325  		v.AddArg2(ptr, mem)
 12326  		return true
 12327  	}
 12328  	// match: (MOVHloadidx (MOVDconst [c]) ptr mem)
 12329  	// cond: ssa.Is32Bit(c)
 12330  	// result: (MOVHload [int32(c)] ptr mem)
 12331  	for {
 12332  		if v_0.Op != ssaop.OpARM64MOVDconst {
 12333  			break
 12334  		}
 12335  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 12336  		ptr := v_1
 12337  		mem := v_2
 12338  		if !(ssa.Is32Bit(c)) {
 12339  			break
 12340  		}
 12341  		v.Reset(ssaop.OpARM64MOVHload)
 12342  		v.AuxInt = ssa.Int32ToAuxInt(int32(c))
 12343  		v.AddArg2(ptr, mem)
 12344  		return true
 12345  	}
 12346  	// match: (MOVHloadidx ptr (SLLconst [1] idx) mem)
 12347  	// result: (MOVHloadidx2 ptr idx mem)
 12348  	for {
 12349  		ptr := v_0
 12350  		if v_1.Op != ssaop.OpARM64SLLconst || ssa.AuxIntToInt64(v_1.AuxInt) != 1 {
 12351  			break
 12352  		}
 12353  		idx := v_1.Args[0]
 12354  		mem := v_2
 12355  		v.Reset(ssaop.OpARM64MOVHloadidx2)
 12356  		v.AddArg3(ptr, idx, mem)
 12357  		return true
 12358  	}
 12359  	// match: (MOVHloadidx ptr (ADD idx idx) mem)
 12360  	// result: (MOVHloadidx2 ptr idx mem)
 12361  	for {
 12362  		ptr := v_0
 12363  		if v_1.Op != ssaop.OpARM64ADD {
 12364  			break
 12365  		}
 12366  		idx := v_1.Args[1]
 12367  		if idx != v_1.Args[0] {
 12368  			break
 12369  		}
 12370  		mem := v_2
 12371  		v.Reset(ssaop.OpARM64MOVHloadidx2)
 12372  		v.AddArg3(ptr, idx, mem)
 12373  		return true
 12374  	}
 12375  	// match: (MOVHloadidx (ADD idx idx) ptr mem)
 12376  	// result: (MOVHloadidx2 ptr idx mem)
 12377  	for {
 12378  		if v_0.Op != ssaop.OpARM64ADD {
 12379  			break
 12380  		}
 12381  		idx := v_0.Args[1]
 12382  		if idx != v_0.Args[0] {
 12383  			break
 12384  		}
 12385  		ptr := v_1
 12386  		mem := v_2
 12387  		v.Reset(ssaop.OpARM64MOVHloadidx2)
 12388  		v.AddArg3(ptr, idx, mem)
 12389  		return true
 12390  	}
 12391  	return false
 12392  }
 12393  func rewriteValue_OpARM64MOVHloadidx2(v *ssa.Value) bool {
 12394  	v_2 := v.Args[2]
 12395  	v_1 := v.Args[1]
 12396  	v_0 := v.Args[0]
 12397  	// match: (MOVHloadidx2 ptr (MOVDconst [c]) mem)
 12398  	// cond: ssa.Is32Bit(c<<1)
 12399  	// result: (MOVHload [int32(c)<<1] ptr mem)
 12400  	for {
 12401  		ptr := v_0
 12402  		if v_1.Op != ssaop.OpARM64MOVDconst {
 12403  			break
 12404  		}
 12405  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 12406  		mem := v_2
 12407  		if !(ssa.Is32Bit(c << 1)) {
 12408  			break
 12409  		}
 12410  		v.Reset(ssaop.OpARM64MOVHload)
 12411  		v.AuxInt = ssa.Int32ToAuxInt(int32(c) << 1)
 12412  		v.AddArg2(ptr, mem)
 12413  		return true
 12414  	}
 12415  	return false
 12416  }
 12417  func rewriteValue_OpARM64MOVHreg(v *ssa.Value) bool {
 12418  	v_0 := v.Args[0]
 12419  	// match: (MOVHreg (MOVDconst [c]))
 12420  	// result: (MOVDconst [int64(int16(c))])
 12421  	for {
 12422  		if v_0.Op != ssaop.OpARM64MOVDconst {
 12423  			break
 12424  		}
 12425  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 12426  		v.Reset(ssaop.OpARM64MOVDconst)
 12427  		v.AuxInt = ssa.Int64ToAuxInt(int64(int16(c)))
 12428  		return true
 12429  	}
 12430  	// match: (MOVHreg x)
 12431  	// cond: v.Type.Size() <= 2
 12432  	// result: x
 12433  	for {
 12434  		x := v_0
 12435  		if !(v.Type.Size() <= 2) {
 12436  			break
 12437  		}
 12438  		v.CopyOf(x)
 12439  		return true
 12440  	}
 12441  	// match: (MOVHreg <t> (ANDconst x [c]))
 12442  	// cond: uint64(c) & uint64(0xffffffffffff8000) == 0
 12443  	// result: (ANDconst <t> x [c])
 12444  	for {
 12445  		t := v.Type
 12446  		if v_0.Op != ssaop.OpARM64ANDconst {
 12447  			break
 12448  		}
 12449  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 12450  		x := v_0.Args[0]
 12451  		if !(uint64(c)&uint64(0xffffffffffff8000) == 0) {
 12452  			break
 12453  		}
 12454  		v.Reset(ssaop.OpARM64ANDconst)
 12455  		v.Type = t
 12456  		v.AuxInt = ssa.Int64ToAuxInt(c)
 12457  		v.AddArg(x)
 12458  		return true
 12459  	}
 12460  	// match: (MOVHreg (SLLconst [lc] x))
 12461  	// cond: lc < 16
 12462  	// result: (SBFIZ [ssa.ArmBFAuxInt(lc, 16-lc)] x)
 12463  	for {
 12464  		if v_0.Op != ssaop.OpARM64SLLconst {
 12465  			break
 12466  		}
 12467  		lc := ssa.AuxIntToInt64(v_0.AuxInt)
 12468  		x := v_0.Args[0]
 12469  		if !(lc < 16) {
 12470  			break
 12471  		}
 12472  		v.Reset(ssaop.OpARM64SBFIZ)
 12473  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(lc, 16-lc))
 12474  		v.AddArg(x)
 12475  		return true
 12476  	}
 12477  	// match: (MOVHreg (SBFX [bfc] x))
 12478  	// cond: bfc.Width() <= 16
 12479  	// result: (SBFX [bfc] x)
 12480  	for {
 12481  		if v_0.Op != ssaop.OpARM64SBFX {
 12482  			break
 12483  		}
 12484  		bfc := ssa.AuxIntToArm64BitField(v_0.AuxInt)
 12485  		x := v_0.Args[0]
 12486  		if !(bfc.Width() <= 16) {
 12487  			break
 12488  		}
 12489  		v.Reset(ssaop.OpARM64SBFX)
 12490  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(bfc)
 12491  		v.AddArg(x)
 12492  		return true
 12493  	}
 12494  	return false
 12495  }
 12496  func rewriteValue_OpARM64MOVHstore(v *ssa.Value) bool {
 12497  	v_2 := v.Args[2]
 12498  	v_1 := v.Args[1]
 12499  	v_0 := v.Args[0]
 12500  	b := v.Block
 12501  	config := b.Func.Config
 12502  	// match: (MOVHstore [off1] {sym} (ADDconst [off2] ptr) val mem)
 12503  	// cond: ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)
 12504  	// result: (MOVHstore [off1+int32(off2)] {sym} ptr val mem)
 12505  	for {
 12506  		off1 := ssa.AuxIntToInt32(v.AuxInt)
 12507  		sym := ssa.AuxToSym(v.Aux)
 12508  		if v_0.Op != ssaop.OpARM64ADDconst {
 12509  			break
 12510  		}
 12511  		off2 := ssa.AuxIntToInt64(v_0.AuxInt)
 12512  		ptr := v_0.Args[0]
 12513  		val := v_1
 12514  		mem := v_2
 12515  		if !(ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)) {
 12516  			break
 12517  		}
 12518  		v.Reset(ssaop.OpARM64MOVHstore)
 12519  		v.AuxInt = ssa.Int32ToAuxInt(off1 + int32(off2))
 12520  		v.Aux = ssa.SymToAux(sym)
 12521  		v.AddArg3(ptr, val, mem)
 12522  		return true
 12523  	}
 12524  	// match: (MOVHstore [off] {sym} (ADD ptr idx) val mem)
 12525  	// cond: off == 0 && sym == nil
 12526  	// result: (MOVHstoreidx ptr idx val mem)
 12527  	for {
 12528  		off := ssa.AuxIntToInt32(v.AuxInt)
 12529  		sym := ssa.AuxToSym(v.Aux)
 12530  		if v_0.Op != ssaop.OpARM64ADD {
 12531  			break
 12532  		}
 12533  		idx := v_0.Args[1]
 12534  		ptr := v_0.Args[0]
 12535  		val := v_1
 12536  		mem := v_2
 12537  		if !(off == 0 && sym == nil) {
 12538  			break
 12539  		}
 12540  		v.Reset(ssaop.OpARM64MOVHstoreidx)
 12541  		v.AddArg4(ptr, idx, val, mem)
 12542  		return true
 12543  	}
 12544  	// match: (MOVHstore [off] {sym} (ADDshiftLL [1] ptr idx) val mem)
 12545  	// cond: off == 0 && sym == nil
 12546  	// result: (MOVHstoreidx2 ptr idx val mem)
 12547  	for {
 12548  		off := ssa.AuxIntToInt32(v.AuxInt)
 12549  		sym := ssa.AuxToSym(v.Aux)
 12550  		if v_0.Op != ssaop.OpARM64ADDshiftLL || ssa.AuxIntToInt64(v_0.AuxInt) != 1 {
 12551  			break
 12552  		}
 12553  		idx := v_0.Args[1]
 12554  		ptr := v_0.Args[0]
 12555  		val := v_1
 12556  		mem := v_2
 12557  		if !(off == 0 && sym == nil) {
 12558  			break
 12559  		}
 12560  		v.Reset(ssaop.OpARM64MOVHstoreidx2)
 12561  		v.AddArg4(ptr, idx, val, mem)
 12562  		return true
 12563  	}
 12564  	// match: (MOVHstore [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) val mem)
 12565  	// cond: ssa.CanMergeSym(sym1,sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)
 12566  	// result: (MOVHstore [off1+off2] {ssa.MergeSym(sym1,sym2)} ptr val mem)
 12567  	for {
 12568  		off1 := ssa.AuxIntToInt32(v.AuxInt)
 12569  		sym1 := ssa.AuxToSym(v.Aux)
 12570  		if v_0.Op != ssaop.OpARM64MOVDaddr {
 12571  			break
 12572  		}
 12573  		off2 := ssa.AuxIntToInt32(v_0.AuxInt)
 12574  		sym2 := ssa.AuxToSym(v_0.Aux)
 12575  		ptr := v_0.Args[0]
 12576  		val := v_1
 12577  		mem := v_2
 12578  		if !(ssa.CanMergeSym(sym1, sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)) {
 12579  			break
 12580  		}
 12581  		v.Reset(ssaop.OpARM64MOVHstore)
 12582  		v.AuxInt = ssa.Int32ToAuxInt(off1 + off2)
 12583  		v.Aux = ssa.SymToAux(ssa.MergeSym(sym1, sym2))
 12584  		v.AddArg3(ptr, val, mem)
 12585  		return true
 12586  	}
 12587  	// match: (MOVHstore [off] {sym} ptr (MOVHreg x) mem)
 12588  	// result: (MOVHstore [off] {sym} ptr x mem)
 12589  	for {
 12590  		off := ssa.AuxIntToInt32(v.AuxInt)
 12591  		sym := ssa.AuxToSym(v.Aux)
 12592  		ptr := v_0
 12593  		if v_1.Op != ssaop.OpARM64MOVHreg {
 12594  			break
 12595  		}
 12596  		x := v_1.Args[0]
 12597  		mem := v_2
 12598  		v.Reset(ssaop.OpARM64MOVHstore)
 12599  		v.AuxInt = ssa.Int32ToAuxInt(off)
 12600  		v.Aux = ssa.SymToAux(sym)
 12601  		v.AddArg3(ptr, x, mem)
 12602  		return true
 12603  	}
 12604  	// match: (MOVHstore [off] {sym} ptr (MOVHUreg x) mem)
 12605  	// result: (MOVHstore [off] {sym} ptr x mem)
 12606  	for {
 12607  		off := ssa.AuxIntToInt32(v.AuxInt)
 12608  		sym := ssa.AuxToSym(v.Aux)
 12609  		ptr := v_0
 12610  		if v_1.Op != ssaop.OpARM64MOVHUreg {
 12611  			break
 12612  		}
 12613  		x := v_1.Args[0]
 12614  		mem := v_2
 12615  		v.Reset(ssaop.OpARM64MOVHstore)
 12616  		v.AuxInt = ssa.Int32ToAuxInt(off)
 12617  		v.Aux = ssa.SymToAux(sym)
 12618  		v.AddArg3(ptr, x, mem)
 12619  		return true
 12620  	}
 12621  	// match: (MOVHstore [off] {sym} ptr (MOVWreg x) mem)
 12622  	// result: (MOVHstore [off] {sym} ptr x mem)
 12623  	for {
 12624  		off := ssa.AuxIntToInt32(v.AuxInt)
 12625  		sym := ssa.AuxToSym(v.Aux)
 12626  		ptr := v_0
 12627  		if v_1.Op != ssaop.OpARM64MOVWreg {
 12628  			break
 12629  		}
 12630  		x := v_1.Args[0]
 12631  		mem := v_2
 12632  		v.Reset(ssaop.OpARM64MOVHstore)
 12633  		v.AuxInt = ssa.Int32ToAuxInt(off)
 12634  		v.Aux = ssa.SymToAux(sym)
 12635  		v.AddArg3(ptr, x, mem)
 12636  		return true
 12637  	}
 12638  	// match: (MOVHstore [off] {sym} ptr (MOVWUreg x) mem)
 12639  	// result: (MOVHstore [off] {sym} ptr x mem)
 12640  	for {
 12641  		off := ssa.AuxIntToInt32(v.AuxInt)
 12642  		sym := ssa.AuxToSym(v.Aux)
 12643  		ptr := v_0
 12644  		if v_1.Op != ssaop.OpARM64MOVWUreg {
 12645  			break
 12646  		}
 12647  		x := v_1.Args[0]
 12648  		mem := v_2
 12649  		v.Reset(ssaop.OpARM64MOVHstore)
 12650  		v.AuxInt = ssa.Int32ToAuxInt(off)
 12651  		v.Aux = ssa.SymToAux(sym)
 12652  		v.AddArg3(ptr, x, mem)
 12653  		return true
 12654  	}
 12655  	return false
 12656  }
 12657  func rewriteValue_OpARM64MOVHstoreidx(v *ssa.Value) bool {
 12658  	v_3 := v.Args[3]
 12659  	v_2 := v.Args[2]
 12660  	v_1 := v.Args[1]
 12661  	v_0 := v.Args[0]
 12662  	// match: (MOVHstoreidx ptr (MOVDconst [c]) val mem)
 12663  	// cond: ssa.Is32Bit(c)
 12664  	// result: (MOVHstore [int32(c)] ptr val mem)
 12665  	for {
 12666  		ptr := v_0
 12667  		if v_1.Op != ssaop.OpARM64MOVDconst {
 12668  			break
 12669  		}
 12670  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 12671  		val := v_2
 12672  		mem := v_3
 12673  		if !(ssa.Is32Bit(c)) {
 12674  			break
 12675  		}
 12676  		v.Reset(ssaop.OpARM64MOVHstore)
 12677  		v.AuxInt = ssa.Int32ToAuxInt(int32(c))
 12678  		v.AddArg3(ptr, val, mem)
 12679  		return true
 12680  	}
 12681  	// match: (MOVHstoreidx (MOVDconst [c]) idx val mem)
 12682  	// cond: ssa.Is32Bit(c)
 12683  	// result: (MOVHstore [int32(c)] idx val mem)
 12684  	for {
 12685  		if v_0.Op != ssaop.OpARM64MOVDconst {
 12686  			break
 12687  		}
 12688  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 12689  		idx := v_1
 12690  		val := v_2
 12691  		mem := v_3
 12692  		if !(ssa.Is32Bit(c)) {
 12693  			break
 12694  		}
 12695  		v.Reset(ssaop.OpARM64MOVHstore)
 12696  		v.AuxInt = ssa.Int32ToAuxInt(int32(c))
 12697  		v.AddArg3(idx, val, mem)
 12698  		return true
 12699  	}
 12700  	// match: (MOVHstoreidx ptr (SLLconst [1] idx) val mem)
 12701  	// result: (MOVHstoreidx2 ptr idx val mem)
 12702  	for {
 12703  		ptr := v_0
 12704  		if v_1.Op != ssaop.OpARM64SLLconst || ssa.AuxIntToInt64(v_1.AuxInt) != 1 {
 12705  			break
 12706  		}
 12707  		idx := v_1.Args[0]
 12708  		val := v_2
 12709  		mem := v_3
 12710  		v.Reset(ssaop.OpARM64MOVHstoreidx2)
 12711  		v.AddArg4(ptr, idx, val, mem)
 12712  		return true
 12713  	}
 12714  	// match: (MOVHstoreidx ptr (ADD idx idx) val mem)
 12715  	// result: (MOVHstoreidx2 ptr idx val mem)
 12716  	for {
 12717  		ptr := v_0
 12718  		if v_1.Op != ssaop.OpARM64ADD {
 12719  			break
 12720  		}
 12721  		idx := v_1.Args[1]
 12722  		if idx != v_1.Args[0] {
 12723  			break
 12724  		}
 12725  		val := v_2
 12726  		mem := v_3
 12727  		v.Reset(ssaop.OpARM64MOVHstoreidx2)
 12728  		v.AddArg4(ptr, idx, val, mem)
 12729  		return true
 12730  	}
 12731  	// match: (MOVHstoreidx (SLLconst [1] idx) ptr val mem)
 12732  	// result: (MOVHstoreidx2 ptr idx val mem)
 12733  	for {
 12734  		if v_0.Op != ssaop.OpARM64SLLconst || ssa.AuxIntToInt64(v_0.AuxInt) != 1 {
 12735  			break
 12736  		}
 12737  		idx := v_0.Args[0]
 12738  		ptr := v_1
 12739  		val := v_2
 12740  		mem := v_3
 12741  		v.Reset(ssaop.OpARM64MOVHstoreidx2)
 12742  		v.AddArg4(ptr, idx, val, mem)
 12743  		return true
 12744  	}
 12745  	// match: (MOVHstoreidx (ADD idx idx) ptr val mem)
 12746  	// result: (MOVHstoreidx2 ptr idx val mem)
 12747  	for {
 12748  		if v_0.Op != ssaop.OpARM64ADD {
 12749  			break
 12750  		}
 12751  		idx := v_0.Args[1]
 12752  		if idx != v_0.Args[0] {
 12753  			break
 12754  		}
 12755  		ptr := v_1
 12756  		val := v_2
 12757  		mem := v_3
 12758  		v.Reset(ssaop.OpARM64MOVHstoreidx2)
 12759  		v.AddArg4(ptr, idx, val, mem)
 12760  		return true
 12761  	}
 12762  	// match: (MOVHstoreidx ptr idx (MOVHreg x) mem)
 12763  	// result: (MOVHstoreidx ptr idx x mem)
 12764  	for {
 12765  		ptr := v_0
 12766  		idx := v_1
 12767  		if v_2.Op != ssaop.OpARM64MOVHreg {
 12768  			break
 12769  		}
 12770  		x := v_2.Args[0]
 12771  		mem := v_3
 12772  		v.Reset(ssaop.OpARM64MOVHstoreidx)
 12773  		v.AddArg4(ptr, idx, x, mem)
 12774  		return true
 12775  	}
 12776  	// match: (MOVHstoreidx ptr idx (MOVHUreg x) mem)
 12777  	// result: (MOVHstoreidx ptr idx x mem)
 12778  	for {
 12779  		ptr := v_0
 12780  		idx := v_1
 12781  		if v_2.Op != ssaop.OpARM64MOVHUreg {
 12782  			break
 12783  		}
 12784  		x := v_2.Args[0]
 12785  		mem := v_3
 12786  		v.Reset(ssaop.OpARM64MOVHstoreidx)
 12787  		v.AddArg4(ptr, idx, x, mem)
 12788  		return true
 12789  	}
 12790  	// match: (MOVHstoreidx ptr idx (MOVWreg x) mem)
 12791  	// result: (MOVHstoreidx ptr idx x mem)
 12792  	for {
 12793  		ptr := v_0
 12794  		idx := v_1
 12795  		if v_2.Op != ssaop.OpARM64MOVWreg {
 12796  			break
 12797  		}
 12798  		x := v_2.Args[0]
 12799  		mem := v_3
 12800  		v.Reset(ssaop.OpARM64MOVHstoreidx)
 12801  		v.AddArg4(ptr, idx, x, mem)
 12802  		return true
 12803  	}
 12804  	// match: (MOVHstoreidx ptr idx (MOVWUreg x) mem)
 12805  	// result: (MOVHstoreidx ptr idx x mem)
 12806  	for {
 12807  		ptr := v_0
 12808  		idx := v_1
 12809  		if v_2.Op != ssaop.OpARM64MOVWUreg {
 12810  			break
 12811  		}
 12812  		x := v_2.Args[0]
 12813  		mem := v_3
 12814  		v.Reset(ssaop.OpARM64MOVHstoreidx)
 12815  		v.AddArg4(ptr, idx, x, mem)
 12816  		return true
 12817  	}
 12818  	return false
 12819  }
 12820  func rewriteValue_OpARM64MOVHstoreidx2(v *ssa.Value) bool {
 12821  	v_3 := v.Args[3]
 12822  	v_2 := v.Args[2]
 12823  	v_1 := v.Args[1]
 12824  	v_0 := v.Args[0]
 12825  	// match: (MOVHstoreidx2 ptr (MOVDconst [c]) val mem)
 12826  	// cond: ssa.Is32Bit(c<<1)
 12827  	// result: (MOVHstore [int32(c)<<1] ptr val mem)
 12828  	for {
 12829  		ptr := v_0
 12830  		if v_1.Op != ssaop.OpARM64MOVDconst {
 12831  			break
 12832  		}
 12833  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 12834  		val := v_2
 12835  		mem := v_3
 12836  		if !(ssa.Is32Bit(c << 1)) {
 12837  			break
 12838  		}
 12839  		v.Reset(ssaop.OpARM64MOVHstore)
 12840  		v.AuxInt = ssa.Int32ToAuxInt(int32(c) << 1)
 12841  		v.AddArg3(ptr, val, mem)
 12842  		return true
 12843  	}
 12844  	// match: (MOVHstoreidx2 ptr idx (MOVHreg x) mem)
 12845  	// result: (MOVHstoreidx2 ptr idx x mem)
 12846  	for {
 12847  		ptr := v_0
 12848  		idx := v_1
 12849  		if v_2.Op != ssaop.OpARM64MOVHreg {
 12850  			break
 12851  		}
 12852  		x := v_2.Args[0]
 12853  		mem := v_3
 12854  		v.Reset(ssaop.OpARM64MOVHstoreidx2)
 12855  		v.AddArg4(ptr, idx, x, mem)
 12856  		return true
 12857  	}
 12858  	// match: (MOVHstoreidx2 ptr idx (MOVHUreg x) mem)
 12859  	// result: (MOVHstoreidx2 ptr idx x mem)
 12860  	for {
 12861  		ptr := v_0
 12862  		idx := v_1
 12863  		if v_2.Op != ssaop.OpARM64MOVHUreg {
 12864  			break
 12865  		}
 12866  		x := v_2.Args[0]
 12867  		mem := v_3
 12868  		v.Reset(ssaop.OpARM64MOVHstoreidx2)
 12869  		v.AddArg4(ptr, idx, x, mem)
 12870  		return true
 12871  	}
 12872  	// match: (MOVHstoreidx2 ptr idx (MOVWreg x) mem)
 12873  	// result: (MOVHstoreidx2 ptr idx x mem)
 12874  	for {
 12875  		ptr := v_0
 12876  		idx := v_1
 12877  		if v_2.Op != ssaop.OpARM64MOVWreg {
 12878  			break
 12879  		}
 12880  		x := v_2.Args[0]
 12881  		mem := v_3
 12882  		v.Reset(ssaop.OpARM64MOVHstoreidx2)
 12883  		v.AddArg4(ptr, idx, x, mem)
 12884  		return true
 12885  	}
 12886  	// match: (MOVHstoreidx2 ptr idx (MOVWUreg x) mem)
 12887  	// result: (MOVHstoreidx2 ptr idx x mem)
 12888  	for {
 12889  		ptr := v_0
 12890  		idx := v_1
 12891  		if v_2.Op != ssaop.OpARM64MOVWUreg {
 12892  			break
 12893  		}
 12894  		x := v_2.Args[0]
 12895  		mem := v_3
 12896  		v.Reset(ssaop.OpARM64MOVHstoreidx2)
 12897  		v.AddArg4(ptr, idx, x, mem)
 12898  		return true
 12899  	}
 12900  	return false
 12901  }
 12902  func rewriteValue_OpARM64MOVWUload(v *ssa.Value) bool {
 12903  	v_1 := v.Args[1]
 12904  	v_0 := v.Args[0]
 12905  	b := v.Block
 12906  	config := b.Func.Config
 12907  	// match: (MOVWUload [off] {sym} ptr (FMOVSstore [off] {sym} ptr val _))
 12908  	// result: (FMOVSfpgp val)
 12909  	for {
 12910  		off := ssa.AuxIntToInt32(v.AuxInt)
 12911  		sym := ssa.AuxToSym(v.Aux)
 12912  		ptr := v_0
 12913  		if v_1.Op != ssaop.OpARM64FMOVSstore || ssa.AuxIntToInt32(v_1.AuxInt) != off || ssa.AuxToSym(v_1.Aux) != sym {
 12914  			break
 12915  		}
 12916  		val := v_1.Args[1]
 12917  		if ptr != v_1.Args[0] {
 12918  			break
 12919  		}
 12920  		v.Reset(ssaop.OpARM64FMOVSfpgp)
 12921  		v.AddArg(val)
 12922  		return true
 12923  	}
 12924  	// match: (MOVWUload [off1] {sym} (ADDconst [off2] ptr) mem)
 12925  	// cond: ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)
 12926  	// result: (MOVWUload [off1+int32(off2)] {sym} ptr mem)
 12927  	for {
 12928  		off1 := ssa.AuxIntToInt32(v.AuxInt)
 12929  		sym := ssa.AuxToSym(v.Aux)
 12930  		if v_0.Op != ssaop.OpARM64ADDconst {
 12931  			break
 12932  		}
 12933  		off2 := ssa.AuxIntToInt64(v_0.AuxInt)
 12934  		ptr := v_0.Args[0]
 12935  		mem := v_1
 12936  		if !(ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)) {
 12937  			break
 12938  		}
 12939  		v.Reset(ssaop.OpARM64MOVWUload)
 12940  		v.AuxInt = ssa.Int32ToAuxInt(off1 + int32(off2))
 12941  		v.Aux = ssa.SymToAux(sym)
 12942  		v.AddArg2(ptr, mem)
 12943  		return true
 12944  	}
 12945  	// match: (MOVWUload [off] {sym} (ADD ptr idx) mem)
 12946  	// cond: off == 0 && sym == nil
 12947  	// result: (MOVWUloadidx ptr idx mem)
 12948  	for {
 12949  		off := ssa.AuxIntToInt32(v.AuxInt)
 12950  		sym := ssa.AuxToSym(v.Aux)
 12951  		if v_0.Op != ssaop.OpARM64ADD {
 12952  			break
 12953  		}
 12954  		idx := v_0.Args[1]
 12955  		ptr := v_0.Args[0]
 12956  		mem := v_1
 12957  		if !(off == 0 && sym == nil) {
 12958  			break
 12959  		}
 12960  		v.Reset(ssaop.OpARM64MOVWUloadidx)
 12961  		v.AddArg3(ptr, idx, mem)
 12962  		return true
 12963  	}
 12964  	// match: (MOVWUload [off] {sym} (ADDshiftLL [2] ptr idx) mem)
 12965  	// cond: off == 0 && sym == nil
 12966  	// result: (MOVWUloadidx4 ptr idx mem)
 12967  	for {
 12968  		off := ssa.AuxIntToInt32(v.AuxInt)
 12969  		sym := ssa.AuxToSym(v.Aux)
 12970  		if v_0.Op != ssaop.OpARM64ADDshiftLL || ssa.AuxIntToInt64(v_0.AuxInt) != 2 {
 12971  			break
 12972  		}
 12973  		idx := v_0.Args[1]
 12974  		ptr := v_0.Args[0]
 12975  		mem := v_1
 12976  		if !(off == 0 && sym == nil) {
 12977  			break
 12978  		}
 12979  		v.Reset(ssaop.OpARM64MOVWUloadidx4)
 12980  		v.AddArg3(ptr, idx, mem)
 12981  		return true
 12982  	}
 12983  	// match: (MOVWUload [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) mem)
 12984  	// cond: ssa.CanMergeSym(sym1,sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)
 12985  	// result: (MOVWUload [off1+off2] {ssa.MergeSym(sym1,sym2)} ptr mem)
 12986  	for {
 12987  		off1 := ssa.AuxIntToInt32(v.AuxInt)
 12988  		sym1 := ssa.AuxToSym(v.Aux)
 12989  		if v_0.Op != ssaop.OpARM64MOVDaddr {
 12990  			break
 12991  		}
 12992  		off2 := ssa.AuxIntToInt32(v_0.AuxInt)
 12993  		sym2 := ssa.AuxToSym(v_0.Aux)
 12994  		ptr := v_0.Args[0]
 12995  		mem := v_1
 12996  		if !(ssa.CanMergeSym(sym1, sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)) {
 12997  			break
 12998  		}
 12999  		v.Reset(ssaop.OpARM64MOVWUload)
 13000  		v.AuxInt = ssa.Int32ToAuxInt(off1 + off2)
 13001  		v.Aux = ssa.SymToAux(ssa.MergeSym(sym1, sym2))
 13002  		v.AddArg2(ptr, mem)
 13003  		return true
 13004  	}
 13005  	// match: (MOVWUload [off] {sym} (SB) _)
 13006  	// cond: ssa.SymIsRO(sym)
 13007  	// result: (MOVDconst [int64(ssa.Read32(sym, int64(off), config.Ctxt.Arch.ByteOrder))])
 13008  	for {
 13009  		off := ssa.AuxIntToInt32(v.AuxInt)
 13010  		sym := ssa.AuxToSym(v.Aux)
 13011  		if v_0.Op != ssaop.OpSB || !(ssa.SymIsRO(sym)) {
 13012  			break
 13013  		}
 13014  		v.Reset(ssaop.OpARM64MOVDconst)
 13015  		v.AuxInt = ssa.Int64ToAuxInt(int64(ssa.Read32(sym, int64(off), config.Ctxt.Arch.ByteOrder)))
 13016  		return true
 13017  	}
 13018  	return false
 13019  }
 13020  func rewriteValue_OpARM64MOVWUloadidx(v *ssa.Value) bool {
 13021  	v_2 := v.Args[2]
 13022  	v_1 := v.Args[1]
 13023  	v_0 := v.Args[0]
 13024  	// match: (MOVWUloadidx ptr (MOVDconst [c]) mem)
 13025  	// cond: ssa.Is32Bit(c)
 13026  	// result: (MOVWUload [int32(c)] ptr mem)
 13027  	for {
 13028  		ptr := v_0
 13029  		if v_1.Op != ssaop.OpARM64MOVDconst {
 13030  			break
 13031  		}
 13032  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 13033  		mem := v_2
 13034  		if !(ssa.Is32Bit(c)) {
 13035  			break
 13036  		}
 13037  		v.Reset(ssaop.OpARM64MOVWUload)
 13038  		v.AuxInt = ssa.Int32ToAuxInt(int32(c))
 13039  		v.AddArg2(ptr, mem)
 13040  		return true
 13041  	}
 13042  	// match: (MOVWUloadidx (MOVDconst [c]) ptr mem)
 13043  	// cond: ssa.Is32Bit(c)
 13044  	// result: (MOVWUload [int32(c)] ptr mem)
 13045  	for {
 13046  		if v_0.Op != ssaop.OpARM64MOVDconst {
 13047  			break
 13048  		}
 13049  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 13050  		ptr := v_1
 13051  		mem := v_2
 13052  		if !(ssa.Is32Bit(c)) {
 13053  			break
 13054  		}
 13055  		v.Reset(ssaop.OpARM64MOVWUload)
 13056  		v.AuxInt = ssa.Int32ToAuxInt(int32(c))
 13057  		v.AddArg2(ptr, mem)
 13058  		return true
 13059  	}
 13060  	// match: (MOVWUloadidx ptr (SLLconst [2] idx) mem)
 13061  	// result: (MOVWUloadidx4 ptr idx mem)
 13062  	for {
 13063  		ptr := v_0
 13064  		if v_1.Op != ssaop.OpARM64SLLconst || ssa.AuxIntToInt64(v_1.AuxInt) != 2 {
 13065  			break
 13066  		}
 13067  		idx := v_1.Args[0]
 13068  		mem := v_2
 13069  		v.Reset(ssaop.OpARM64MOVWUloadidx4)
 13070  		v.AddArg3(ptr, idx, mem)
 13071  		return true
 13072  	}
 13073  	// match: (MOVWUloadidx (SLLconst [2] idx) ptr mem)
 13074  	// result: (MOVWUloadidx4 ptr idx mem)
 13075  	for {
 13076  		if v_0.Op != ssaop.OpARM64SLLconst || ssa.AuxIntToInt64(v_0.AuxInt) != 2 {
 13077  			break
 13078  		}
 13079  		idx := v_0.Args[0]
 13080  		ptr := v_1
 13081  		mem := v_2
 13082  		v.Reset(ssaop.OpARM64MOVWUloadidx4)
 13083  		v.AddArg3(ptr, idx, mem)
 13084  		return true
 13085  	}
 13086  	return false
 13087  }
 13088  func rewriteValue_OpARM64MOVWUloadidx4(v *ssa.Value) bool {
 13089  	v_2 := v.Args[2]
 13090  	v_1 := v.Args[1]
 13091  	v_0 := v.Args[0]
 13092  	// match: (MOVWUloadidx4 ptr (MOVDconst [c]) mem)
 13093  	// cond: ssa.Is32Bit(c<<2)
 13094  	// result: (MOVWUload [int32(c)<<2] ptr mem)
 13095  	for {
 13096  		ptr := v_0
 13097  		if v_1.Op != ssaop.OpARM64MOVDconst {
 13098  			break
 13099  		}
 13100  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 13101  		mem := v_2
 13102  		if !(ssa.Is32Bit(c << 2)) {
 13103  			break
 13104  		}
 13105  		v.Reset(ssaop.OpARM64MOVWUload)
 13106  		v.AuxInt = ssa.Int32ToAuxInt(int32(c) << 2)
 13107  		v.AddArg2(ptr, mem)
 13108  		return true
 13109  	}
 13110  	return false
 13111  }
 13112  func rewriteValue_OpARM64MOVWUreg(v *ssa.Value) bool {
 13113  	v_0 := v.Args[0]
 13114  	// match: (MOVWUreg (ANDconst [c] x))
 13115  	// result: (ANDconst [c&(1<<32-1)] x)
 13116  	for {
 13117  		if v_0.Op != ssaop.OpARM64ANDconst {
 13118  			break
 13119  		}
 13120  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 13121  		x := v_0.Args[0]
 13122  		v.Reset(ssaop.OpARM64ANDconst)
 13123  		v.AuxInt = ssa.Int64ToAuxInt(c & (1<<32 - 1))
 13124  		v.AddArg(x)
 13125  		return true
 13126  	}
 13127  	// match: (MOVWUreg (MOVDconst [c]))
 13128  	// result: (MOVDconst [int64(uint32(c))])
 13129  	for {
 13130  		if v_0.Op != ssaop.OpARM64MOVDconst {
 13131  			break
 13132  		}
 13133  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 13134  		v.Reset(ssaop.OpARM64MOVDconst)
 13135  		v.AuxInt = ssa.Int64ToAuxInt(int64(uint32(c)))
 13136  		return true
 13137  	}
 13138  	// match: (MOVWUreg x)
 13139  	// cond: v.Type.Size() <= 4
 13140  	// result: x
 13141  	for {
 13142  		x := v_0
 13143  		if !(v.Type.Size() <= 4) {
 13144  			break
 13145  		}
 13146  		v.CopyOf(x)
 13147  		return true
 13148  	}
 13149  	// match: (MOVWUreg (SLLconst [lc] x))
 13150  	// cond: lc >= 32
 13151  	// result: (MOVDconst [0])
 13152  	for {
 13153  		if v_0.Op != ssaop.OpARM64SLLconst {
 13154  			break
 13155  		}
 13156  		lc := ssa.AuxIntToInt64(v_0.AuxInt)
 13157  		if !(lc >= 32) {
 13158  			break
 13159  		}
 13160  		v.Reset(ssaop.OpARM64MOVDconst)
 13161  		v.AuxInt = ssa.Int64ToAuxInt(0)
 13162  		return true
 13163  	}
 13164  	// match: (MOVWUreg (SLLconst [lc] x))
 13165  	// cond: lc < 32
 13166  	// result: (UBFIZ [ssa.ArmBFAuxInt(lc, 32-lc)] x)
 13167  	for {
 13168  		if v_0.Op != ssaop.OpARM64SLLconst {
 13169  			break
 13170  		}
 13171  		lc := ssa.AuxIntToInt64(v_0.AuxInt)
 13172  		x := v_0.Args[0]
 13173  		if !(lc < 32) {
 13174  			break
 13175  		}
 13176  		v.Reset(ssaop.OpARM64UBFIZ)
 13177  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(lc, 32-lc))
 13178  		v.AddArg(x)
 13179  		return true
 13180  	}
 13181  	// match: (MOVWUreg (SRLconst [rc] x))
 13182  	// cond: rc < 32
 13183  	// result: (UBFX [ssa.ArmBFAuxInt(rc, 32)] x)
 13184  	for {
 13185  		if v_0.Op != ssaop.OpARM64SRLconst {
 13186  			break
 13187  		}
 13188  		rc := ssa.AuxIntToInt64(v_0.AuxInt)
 13189  		x := v_0.Args[0]
 13190  		if !(rc < 32) {
 13191  			break
 13192  		}
 13193  		v.Reset(ssaop.OpARM64UBFX)
 13194  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(rc, 32))
 13195  		v.AddArg(x)
 13196  		return true
 13197  	}
 13198  	// match: (MOVWUreg (UBFX [bfc] x))
 13199  	// cond: bfc.Width() <= 32
 13200  	// result: (UBFX [bfc] x)
 13201  	for {
 13202  		if v_0.Op != ssaop.OpARM64UBFX {
 13203  			break
 13204  		}
 13205  		bfc := ssa.AuxIntToArm64BitField(v_0.AuxInt)
 13206  		x := v_0.Args[0]
 13207  		if !(bfc.Width() <= 32) {
 13208  			break
 13209  		}
 13210  		v.Reset(ssaop.OpARM64UBFX)
 13211  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(bfc)
 13212  		v.AddArg(x)
 13213  		return true
 13214  	}
 13215  	return false
 13216  }
 13217  func rewriteValue_OpARM64MOVWload(v *ssa.Value) bool {
 13218  	v_1 := v.Args[1]
 13219  	v_0 := v.Args[0]
 13220  	b := v.Block
 13221  	config := b.Func.Config
 13222  	// match: (MOVWload [off1] {sym} (ADDconst [off2] ptr) mem)
 13223  	// cond: ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)
 13224  	// result: (MOVWload [off1+int32(off2)] {sym} ptr mem)
 13225  	for {
 13226  		off1 := ssa.AuxIntToInt32(v.AuxInt)
 13227  		sym := ssa.AuxToSym(v.Aux)
 13228  		if v_0.Op != ssaop.OpARM64ADDconst {
 13229  			break
 13230  		}
 13231  		off2 := ssa.AuxIntToInt64(v_0.AuxInt)
 13232  		ptr := v_0.Args[0]
 13233  		mem := v_1
 13234  		if !(ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)) {
 13235  			break
 13236  		}
 13237  		v.Reset(ssaop.OpARM64MOVWload)
 13238  		v.AuxInt = ssa.Int32ToAuxInt(off1 + int32(off2))
 13239  		v.Aux = ssa.SymToAux(sym)
 13240  		v.AddArg2(ptr, mem)
 13241  		return true
 13242  	}
 13243  	// match: (MOVWload [off] {sym} (ADD ptr idx) mem)
 13244  	// cond: off == 0 && sym == nil
 13245  	// result: (MOVWloadidx ptr idx mem)
 13246  	for {
 13247  		off := ssa.AuxIntToInt32(v.AuxInt)
 13248  		sym := ssa.AuxToSym(v.Aux)
 13249  		if v_0.Op != ssaop.OpARM64ADD {
 13250  			break
 13251  		}
 13252  		idx := v_0.Args[1]
 13253  		ptr := v_0.Args[0]
 13254  		mem := v_1
 13255  		if !(off == 0 && sym == nil) {
 13256  			break
 13257  		}
 13258  		v.Reset(ssaop.OpARM64MOVWloadidx)
 13259  		v.AddArg3(ptr, idx, mem)
 13260  		return true
 13261  	}
 13262  	// match: (MOVWload [off] {sym} (ADDshiftLL [2] ptr idx) mem)
 13263  	// cond: off == 0 && sym == nil
 13264  	// result: (MOVWloadidx4 ptr idx mem)
 13265  	for {
 13266  		off := ssa.AuxIntToInt32(v.AuxInt)
 13267  		sym := ssa.AuxToSym(v.Aux)
 13268  		if v_0.Op != ssaop.OpARM64ADDshiftLL || ssa.AuxIntToInt64(v_0.AuxInt) != 2 {
 13269  			break
 13270  		}
 13271  		idx := v_0.Args[1]
 13272  		ptr := v_0.Args[0]
 13273  		mem := v_1
 13274  		if !(off == 0 && sym == nil) {
 13275  			break
 13276  		}
 13277  		v.Reset(ssaop.OpARM64MOVWloadidx4)
 13278  		v.AddArg3(ptr, idx, mem)
 13279  		return true
 13280  	}
 13281  	// match: (MOVWload [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) mem)
 13282  	// cond: ssa.CanMergeSym(sym1,sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)
 13283  	// result: (MOVWload [off1+off2] {ssa.MergeSym(sym1,sym2)} ptr mem)
 13284  	for {
 13285  		off1 := ssa.AuxIntToInt32(v.AuxInt)
 13286  		sym1 := ssa.AuxToSym(v.Aux)
 13287  		if v_0.Op != ssaop.OpARM64MOVDaddr {
 13288  			break
 13289  		}
 13290  		off2 := ssa.AuxIntToInt32(v_0.AuxInt)
 13291  		sym2 := ssa.AuxToSym(v_0.Aux)
 13292  		ptr := v_0.Args[0]
 13293  		mem := v_1
 13294  		if !(ssa.CanMergeSym(sym1, sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)) {
 13295  			break
 13296  		}
 13297  		v.Reset(ssaop.OpARM64MOVWload)
 13298  		v.AuxInt = ssa.Int32ToAuxInt(off1 + off2)
 13299  		v.Aux = ssa.SymToAux(ssa.MergeSym(sym1, sym2))
 13300  		v.AddArg2(ptr, mem)
 13301  		return true
 13302  	}
 13303  	// match: (MOVWload [off] {sym} (SB) _)
 13304  	// cond: ssa.SymIsRO(sym)
 13305  	// result: (MOVDconst [int64(int32(ssa.Read32(sym, int64(off), config.Ctxt.Arch.ByteOrder)))])
 13306  	for {
 13307  		off := ssa.AuxIntToInt32(v.AuxInt)
 13308  		sym := ssa.AuxToSym(v.Aux)
 13309  		if v_0.Op != ssaop.OpSB || !(ssa.SymIsRO(sym)) {
 13310  			break
 13311  		}
 13312  		v.Reset(ssaop.OpARM64MOVDconst)
 13313  		v.AuxInt = ssa.Int64ToAuxInt(int64(int32(ssa.Read32(sym, int64(off), config.Ctxt.Arch.ByteOrder))))
 13314  		return true
 13315  	}
 13316  	return false
 13317  }
 13318  func rewriteValue_OpARM64MOVWloadidx(v *ssa.Value) bool {
 13319  	v_2 := v.Args[2]
 13320  	v_1 := v.Args[1]
 13321  	v_0 := v.Args[0]
 13322  	// match: (MOVWloadidx ptr (MOVDconst [c]) mem)
 13323  	// cond: ssa.Is32Bit(c)
 13324  	// result: (MOVWload [int32(c)] ptr mem)
 13325  	for {
 13326  		ptr := v_0
 13327  		if v_1.Op != ssaop.OpARM64MOVDconst {
 13328  			break
 13329  		}
 13330  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 13331  		mem := v_2
 13332  		if !(ssa.Is32Bit(c)) {
 13333  			break
 13334  		}
 13335  		v.Reset(ssaop.OpARM64MOVWload)
 13336  		v.AuxInt = ssa.Int32ToAuxInt(int32(c))
 13337  		v.AddArg2(ptr, mem)
 13338  		return true
 13339  	}
 13340  	// match: (MOVWloadidx (MOVDconst [c]) ptr mem)
 13341  	// cond: ssa.Is32Bit(c)
 13342  	// result: (MOVWload [int32(c)] ptr mem)
 13343  	for {
 13344  		if v_0.Op != ssaop.OpARM64MOVDconst {
 13345  			break
 13346  		}
 13347  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 13348  		ptr := v_1
 13349  		mem := v_2
 13350  		if !(ssa.Is32Bit(c)) {
 13351  			break
 13352  		}
 13353  		v.Reset(ssaop.OpARM64MOVWload)
 13354  		v.AuxInt = ssa.Int32ToAuxInt(int32(c))
 13355  		v.AddArg2(ptr, mem)
 13356  		return true
 13357  	}
 13358  	// match: (MOVWloadidx ptr (SLLconst [2] idx) mem)
 13359  	// result: (MOVWloadidx4 ptr idx mem)
 13360  	for {
 13361  		ptr := v_0
 13362  		if v_1.Op != ssaop.OpARM64SLLconst || ssa.AuxIntToInt64(v_1.AuxInt) != 2 {
 13363  			break
 13364  		}
 13365  		idx := v_1.Args[0]
 13366  		mem := v_2
 13367  		v.Reset(ssaop.OpARM64MOVWloadidx4)
 13368  		v.AddArg3(ptr, idx, mem)
 13369  		return true
 13370  	}
 13371  	// match: (MOVWloadidx (SLLconst [2] idx) ptr mem)
 13372  	// result: (MOVWloadidx4 ptr idx mem)
 13373  	for {
 13374  		if v_0.Op != ssaop.OpARM64SLLconst || ssa.AuxIntToInt64(v_0.AuxInt) != 2 {
 13375  			break
 13376  		}
 13377  		idx := v_0.Args[0]
 13378  		ptr := v_1
 13379  		mem := v_2
 13380  		v.Reset(ssaop.OpARM64MOVWloadidx4)
 13381  		v.AddArg3(ptr, idx, mem)
 13382  		return true
 13383  	}
 13384  	return false
 13385  }
 13386  func rewriteValue_OpARM64MOVWloadidx4(v *ssa.Value) bool {
 13387  	v_2 := v.Args[2]
 13388  	v_1 := v.Args[1]
 13389  	v_0 := v.Args[0]
 13390  	// match: (MOVWloadidx4 ptr (MOVDconst [c]) mem)
 13391  	// cond: ssa.Is32Bit(c<<2)
 13392  	// result: (MOVWload [int32(c)<<2] ptr mem)
 13393  	for {
 13394  		ptr := v_0
 13395  		if v_1.Op != ssaop.OpARM64MOVDconst {
 13396  			break
 13397  		}
 13398  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 13399  		mem := v_2
 13400  		if !(ssa.Is32Bit(c << 2)) {
 13401  			break
 13402  		}
 13403  		v.Reset(ssaop.OpARM64MOVWload)
 13404  		v.AuxInt = ssa.Int32ToAuxInt(int32(c) << 2)
 13405  		v.AddArg2(ptr, mem)
 13406  		return true
 13407  	}
 13408  	return false
 13409  }
 13410  func rewriteValue_OpARM64MOVWreg(v *ssa.Value) bool {
 13411  	v_0 := v.Args[0]
 13412  	// match: (MOVWreg (MOVDconst [c]))
 13413  	// result: (MOVDconst [int64(int32(c))])
 13414  	for {
 13415  		if v_0.Op != ssaop.OpARM64MOVDconst {
 13416  			break
 13417  		}
 13418  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 13419  		v.Reset(ssaop.OpARM64MOVDconst)
 13420  		v.AuxInt = ssa.Int64ToAuxInt(int64(int32(c)))
 13421  		return true
 13422  	}
 13423  	// match: (MOVWreg x)
 13424  	// cond: v.Type.Size() <= 4
 13425  	// result: x
 13426  	for {
 13427  		x := v_0
 13428  		if !(v.Type.Size() <= 4) {
 13429  			break
 13430  		}
 13431  		v.CopyOf(x)
 13432  		return true
 13433  	}
 13434  	// match: (MOVWreg <t> (ANDconst x [c]))
 13435  	// cond: uint64(c) & uint64(0xffffffff80000000) == 0
 13436  	// result: (ANDconst <t> x [c])
 13437  	for {
 13438  		t := v.Type
 13439  		if v_0.Op != ssaop.OpARM64ANDconst {
 13440  			break
 13441  		}
 13442  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 13443  		x := v_0.Args[0]
 13444  		if !(uint64(c)&uint64(0xffffffff80000000) == 0) {
 13445  			break
 13446  		}
 13447  		v.Reset(ssaop.OpARM64ANDconst)
 13448  		v.Type = t
 13449  		v.AuxInt = ssa.Int64ToAuxInt(c)
 13450  		v.AddArg(x)
 13451  		return true
 13452  	}
 13453  	// match: (MOVWreg (SLLconst [lc] x))
 13454  	// cond: lc < 32
 13455  	// result: (SBFIZ [ssa.ArmBFAuxInt(lc, 32-lc)] x)
 13456  	for {
 13457  		if v_0.Op != ssaop.OpARM64SLLconst {
 13458  			break
 13459  		}
 13460  		lc := ssa.AuxIntToInt64(v_0.AuxInt)
 13461  		x := v_0.Args[0]
 13462  		if !(lc < 32) {
 13463  			break
 13464  		}
 13465  		v.Reset(ssaop.OpARM64SBFIZ)
 13466  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(lc, 32-lc))
 13467  		v.AddArg(x)
 13468  		return true
 13469  	}
 13470  	// match: (MOVWreg (SBFX [bfc] x))
 13471  	// cond: bfc.Width() <= 32
 13472  	// result: (SBFX [bfc] x)
 13473  	for {
 13474  		if v_0.Op != ssaop.OpARM64SBFX {
 13475  			break
 13476  		}
 13477  		bfc := ssa.AuxIntToArm64BitField(v_0.AuxInt)
 13478  		x := v_0.Args[0]
 13479  		if !(bfc.Width() <= 32) {
 13480  			break
 13481  		}
 13482  		v.Reset(ssaop.OpARM64SBFX)
 13483  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(bfc)
 13484  		v.AddArg(x)
 13485  		return true
 13486  	}
 13487  	return false
 13488  }
 13489  func rewriteValue_OpARM64MOVWstore(v *ssa.Value) bool {
 13490  	v_2 := v.Args[2]
 13491  	v_1 := v.Args[1]
 13492  	v_0 := v.Args[0]
 13493  	b := v.Block
 13494  	config := b.Func.Config
 13495  	// match: (MOVWstore [off] {sym} ptr (FMOVSfpgp val) mem)
 13496  	// result: (FMOVSstore [off] {sym} ptr val mem)
 13497  	for {
 13498  		off := ssa.AuxIntToInt32(v.AuxInt)
 13499  		sym := ssa.AuxToSym(v.Aux)
 13500  		ptr := v_0
 13501  		if v_1.Op != ssaop.OpARM64FMOVSfpgp {
 13502  			break
 13503  		}
 13504  		val := v_1.Args[0]
 13505  		mem := v_2
 13506  		v.Reset(ssaop.OpARM64FMOVSstore)
 13507  		v.AuxInt = ssa.Int32ToAuxInt(off)
 13508  		v.Aux = ssa.SymToAux(sym)
 13509  		v.AddArg3(ptr, val, mem)
 13510  		return true
 13511  	}
 13512  	// match: (MOVWstore [off1] {sym} (ADDconst [off2] ptr) val mem)
 13513  	// cond: ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)
 13514  	// result: (MOVWstore [off1+int32(off2)] {sym} ptr val mem)
 13515  	for {
 13516  		off1 := ssa.AuxIntToInt32(v.AuxInt)
 13517  		sym := ssa.AuxToSym(v.Aux)
 13518  		if v_0.Op != ssaop.OpARM64ADDconst {
 13519  			break
 13520  		}
 13521  		off2 := ssa.AuxIntToInt64(v_0.AuxInt)
 13522  		ptr := v_0.Args[0]
 13523  		val := v_1
 13524  		mem := v_2
 13525  		if !(ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)) {
 13526  			break
 13527  		}
 13528  		v.Reset(ssaop.OpARM64MOVWstore)
 13529  		v.AuxInt = ssa.Int32ToAuxInt(off1 + int32(off2))
 13530  		v.Aux = ssa.SymToAux(sym)
 13531  		v.AddArg3(ptr, val, mem)
 13532  		return true
 13533  	}
 13534  	// match: (MOVWstore [off] {sym} (ADD ptr idx) val mem)
 13535  	// cond: off == 0 && sym == nil
 13536  	// result: (MOVWstoreidx ptr idx val mem)
 13537  	for {
 13538  		off := ssa.AuxIntToInt32(v.AuxInt)
 13539  		sym := ssa.AuxToSym(v.Aux)
 13540  		if v_0.Op != ssaop.OpARM64ADD {
 13541  			break
 13542  		}
 13543  		idx := v_0.Args[1]
 13544  		ptr := v_0.Args[0]
 13545  		val := v_1
 13546  		mem := v_2
 13547  		if !(off == 0 && sym == nil) {
 13548  			break
 13549  		}
 13550  		v.Reset(ssaop.OpARM64MOVWstoreidx)
 13551  		v.AddArg4(ptr, idx, val, mem)
 13552  		return true
 13553  	}
 13554  	// match: (MOVWstore [off] {sym} (ADDshiftLL [2] ptr idx) val mem)
 13555  	// cond: off == 0 && sym == nil
 13556  	// result: (MOVWstoreidx4 ptr idx val mem)
 13557  	for {
 13558  		off := ssa.AuxIntToInt32(v.AuxInt)
 13559  		sym := ssa.AuxToSym(v.Aux)
 13560  		if v_0.Op != ssaop.OpARM64ADDshiftLL || ssa.AuxIntToInt64(v_0.AuxInt) != 2 {
 13561  			break
 13562  		}
 13563  		idx := v_0.Args[1]
 13564  		ptr := v_0.Args[0]
 13565  		val := v_1
 13566  		mem := v_2
 13567  		if !(off == 0 && sym == nil) {
 13568  			break
 13569  		}
 13570  		v.Reset(ssaop.OpARM64MOVWstoreidx4)
 13571  		v.AddArg4(ptr, idx, val, mem)
 13572  		return true
 13573  	}
 13574  	// match: (MOVWstore [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) val mem)
 13575  	// cond: ssa.CanMergeSym(sym1,sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)
 13576  	// result: (MOVWstore [off1+off2] {ssa.MergeSym(sym1,sym2)} ptr val mem)
 13577  	for {
 13578  		off1 := ssa.AuxIntToInt32(v.AuxInt)
 13579  		sym1 := ssa.AuxToSym(v.Aux)
 13580  		if v_0.Op != ssaop.OpARM64MOVDaddr {
 13581  			break
 13582  		}
 13583  		off2 := ssa.AuxIntToInt32(v_0.AuxInt)
 13584  		sym2 := ssa.AuxToSym(v_0.Aux)
 13585  		ptr := v_0.Args[0]
 13586  		val := v_1
 13587  		mem := v_2
 13588  		if !(ssa.CanMergeSym(sym1, sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)) {
 13589  			break
 13590  		}
 13591  		v.Reset(ssaop.OpARM64MOVWstore)
 13592  		v.AuxInt = ssa.Int32ToAuxInt(off1 + off2)
 13593  		v.Aux = ssa.SymToAux(ssa.MergeSym(sym1, sym2))
 13594  		v.AddArg3(ptr, val, mem)
 13595  		return true
 13596  	}
 13597  	// match: (MOVWstore [off] {sym} ptr (MOVWreg x) mem)
 13598  	// result: (MOVWstore [off] {sym} ptr x mem)
 13599  	for {
 13600  		off := ssa.AuxIntToInt32(v.AuxInt)
 13601  		sym := ssa.AuxToSym(v.Aux)
 13602  		ptr := v_0
 13603  		if v_1.Op != ssaop.OpARM64MOVWreg {
 13604  			break
 13605  		}
 13606  		x := v_1.Args[0]
 13607  		mem := v_2
 13608  		v.Reset(ssaop.OpARM64MOVWstore)
 13609  		v.AuxInt = ssa.Int32ToAuxInt(off)
 13610  		v.Aux = ssa.SymToAux(sym)
 13611  		v.AddArg3(ptr, x, mem)
 13612  		return true
 13613  	}
 13614  	// match: (MOVWstore [off] {sym} ptr (MOVWUreg x) mem)
 13615  	// result: (MOVWstore [off] {sym} ptr x mem)
 13616  	for {
 13617  		off := ssa.AuxIntToInt32(v.AuxInt)
 13618  		sym := ssa.AuxToSym(v.Aux)
 13619  		ptr := v_0
 13620  		if v_1.Op != ssaop.OpARM64MOVWUreg {
 13621  			break
 13622  		}
 13623  		x := v_1.Args[0]
 13624  		mem := v_2
 13625  		v.Reset(ssaop.OpARM64MOVWstore)
 13626  		v.AuxInt = ssa.Int32ToAuxInt(off)
 13627  		v.Aux = ssa.SymToAux(sym)
 13628  		v.AddArg3(ptr, x, mem)
 13629  		return true
 13630  	}
 13631  	return false
 13632  }
 13633  func rewriteValue_OpARM64MOVWstoreidx(v *ssa.Value) bool {
 13634  	v_3 := v.Args[3]
 13635  	v_2 := v.Args[2]
 13636  	v_1 := v.Args[1]
 13637  	v_0 := v.Args[0]
 13638  	// match: (MOVWstoreidx ptr (MOVDconst [c]) val mem)
 13639  	// cond: ssa.Is32Bit(c)
 13640  	// result: (MOVWstore [int32(c)] ptr val mem)
 13641  	for {
 13642  		ptr := v_0
 13643  		if v_1.Op != ssaop.OpARM64MOVDconst {
 13644  			break
 13645  		}
 13646  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 13647  		val := v_2
 13648  		mem := v_3
 13649  		if !(ssa.Is32Bit(c)) {
 13650  			break
 13651  		}
 13652  		v.Reset(ssaop.OpARM64MOVWstore)
 13653  		v.AuxInt = ssa.Int32ToAuxInt(int32(c))
 13654  		v.AddArg3(ptr, val, mem)
 13655  		return true
 13656  	}
 13657  	// match: (MOVWstoreidx (MOVDconst [c]) idx val mem)
 13658  	// cond: ssa.Is32Bit(c)
 13659  	// result: (MOVWstore [int32(c)] idx val mem)
 13660  	for {
 13661  		if v_0.Op != ssaop.OpARM64MOVDconst {
 13662  			break
 13663  		}
 13664  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 13665  		idx := v_1
 13666  		val := v_2
 13667  		mem := v_3
 13668  		if !(ssa.Is32Bit(c)) {
 13669  			break
 13670  		}
 13671  		v.Reset(ssaop.OpARM64MOVWstore)
 13672  		v.AuxInt = ssa.Int32ToAuxInt(int32(c))
 13673  		v.AddArg3(idx, val, mem)
 13674  		return true
 13675  	}
 13676  	// match: (MOVWstoreidx ptr (SLLconst [2] idx) val mem)
 13677  	// result: (MOVWstoreidx4 ptr idx val mem)
 13678  	for {
 13679  		ptr := v_0
 13680  		if v_1.Op != ssaop.OpARM64SLLconst || ssa.AuxIntToInt64(v_1.AuxInt) != 2 {
 13681  			break
 13682  		}
 13683  		idx := v_1.Args[0]
 13684  		val := v_2
 13685  		mem := v_3
 13686  		v.Reset(ssaop.OpARM64MOVWstoreidx4)
 13687  		v.AddArg4(ptr, idx, val, mem)
 13688  		return true
 13689  	}
 13690  	// match: (MOVWstoreidx (SLLconst [2] idx) ptr val mem)
 13691  	// result: (MOVWstoreidx4 ptr idx val mem)
 13692  	for {
 13693  		if v_0.Op != ssaop.OpARM64SLLconst || ssa.AuxIntToInt64(v_0.AuxInt) != 2 {
 13694  			break
 13695  		}
 13696  		idx := v_0.Args[0]
 13697  		ptr := v_1
 13698  		val := v_2
 13699  		mem := v_3
 13700  		v.Reset(ssaop.OpARM64MOVWstoreidx4)
 13701  		v.AddArg4(ptr, idx, val, mem)
 13702  		return true
 13703  	}
 13704  	// match: (MOVWstoreidx ptr idx (MOVWreg x) mem)
 13705  	// result: (MOVWstoreidx ptr idx x mem)
 13706  	for {
 13707  		ptr := v_0
 13708  		idx := v_1
 13709  		if v_2.Op != ssaop.OpARM64MOVWreg {
 13710  			break
 13711  		}
 13712  		x := v_2.Args[0]
 13713  		mem := v_3
 13714  		v.Reset(ssaop.OpARM64MOVWstoreidx)
 13715  		v.AddArg4(ptr, idx, x, mem)
 13716  		return true
 13717  	}
 13718  	// match: (MOVWstoreidx ptr idx (MOVWUreg x) mem)
 13719  	// result: (MOVWstoreidx ptr idx x mem)
 13720  	for {
 13721  		ptr := v_0
 13722  		idx := v_1
 13723  		if v_2.Op != ssaop.OpARM64MOVWUreg {
 13724  			break
 13725  		}
 13726  		x := v_2.Args[0]
 13727  		mem := v_3
 13728  		v.Reset(ssaop.OpARM64MOVWstoreidx)
 13729  		v.AddArg4(ptr, idx, x, mem)
 13730  		return true
 13731  	}
 13732  	return false
 13733  }
 13734  func rewriteValue_OpARM64MOVWstoreidx4(v *ssa.Value) bool {
 13735  	v_3 := v.Args[3]
 13736  	v_2 := v.Args[2]
 13737  	v_1 := v.Args[1]
 13738  	v_0 := v.Args[0]
 13739  	// match: (MOVWstoreidx4 ptr (MOVDconst [c]) val mem)
 13740  	// cond: ssa.Is32Bit(c<<2)
 13741  	// result: (MOVWstore [int32(c)<<2] ptr val mem)
 13742  	for {
 13743  		ptr := v_0
 13744  		if v_1.Op != ssaop.OpARM64MOVDconst {
 13745  			break
 13746  		}
 13747  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 13748  		val := v_2
 13749  		mem := v_3
 13750  		if !(ssa.Is32Bit(c << 2)) {
 13751  			break
 13752  		}
 13753  		v.Reset(ssaop.OpARM64MOVWstore)
 13754  		v.AuxInt = ssa.Int32ToAuxInt(int32(c) << 2)
 13755  		v.AddArg3(ptr, val, mem)
 13756  		return true
 13757  	}
 13758  	// match: (MOVWstoreidx4 ptr idx (MOVWreg x) mem)
 13759  	// result: (MOVWstoreidx4 ptr idx x mem)
 13760  	for {
 13761  		ptr := v_0
 13762  		idx := v_1
 13763  		if v_2.Op != ssaop.OpARM64MOVWreg {
 13764  			break
 13765  		}
 13766  		x := v_2.Args[0]
 13767  		mem := v_3
 13768  		v.Reset(ssaop.OpARM64MOVWstoreidx4)
 13769  		v.AddArg4(ptr, idx, x, mem)
 13770  		return true
 13771  	}
 13772  	// match: (MOVWstoreidx4 ptr idx (MOVWUreg x) mem)
 13773  	// result: (MOVWstoreidx4 ptr idx x mem)
 13774  	for {
 13775  		ptr := v_0
 13776  		idx := v_1
 13777  		if v_2.Op != ssaop.OpARM64MOVWUreg {
 13778  			break
 13779  		}
 13780  		x := v_2.Args[0]
 13781  		mem := v_3
 13782  		v.Reset(ssaop.OpARM64MOVWstoreidx4)
 13783  		v.AddArg4(ptr, idx, x, mem)
 13784  		return true
 13785  	}
 13786  	return false
 13787  }
 13788  func rewriteValue_OpARM64MSUB(v *ssa.Value) bool {
 13789  	v_2 := v.Args[2]
 13790  	v_1 := v.Args[1]
 13791  	v_0 := v.Args[0]
 13792  	b := v.Block
 13793  	// match: (MSUB a x (MOVDconst [-1]))
 13794  	// result: (ADD a x)
 13795  	for {
 13796  		a := v_0
 13797  		x := v_1
 13798  		if v_2.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_2.AuxInt) != -1 {
 13799  			break
 13800  		}
 13801  		v.Reset(ssaop.OpARM64ADD)
 13802  		v.AddArg2(a, x)
 13803  		return true
 13804  	}
 13805  	// match: (MSUB a _ (MOVDconst [0]))
 13806  	// result: a
 13807  	for {
 13808  		a := v_0
 13809  		if v_2.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_2.AuxInt) != 0 {
 13810  			break
 13811  		}
 13812  		v.CopyOf(a)
 13813  		return true
 13814  	}
 13815  	// match: (MSUB a x (MOVDconst [1]))
 13816  	// result: (SUB a x)
 13817  	for {
 13818  		a := v_0
 13819  		x := v_1
 13820  		if v_2.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_2.AuxInt) != 1 {
 13821  			break
 13822  		}
 13823  		v.Reset(ssaop.OpARM64SUB)
 13824  		v.AddArg2(a, x)
 13825  		return true
 13826  	}
 13827  	// match: (MSUB a x (MOVDconst [c]))
 13828  	// cond: ssa.IsPowerOfTwo(c)
 13829  	// result: (SUBshiftLL a x [ssa.Log64(c)])
 13830  	for {
 13831  		a := v_0
 13832  		x := v_1
 13833  		if v_2.Op != ssaop.OpARM64MOVDconst {
 13834  			break
 13835  		}
 13836  		c := ssa.AuxIntToInt64(v_2.AuxInt)
 13837  		if !(ssa.IsPowerOfTwo(c)) {
 13838  			break
 13839  		}
 13840  		v.Reset(ssaop.OpARM64SUBshiftLL)
 13841  		v.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c))
 13842  		v.AddArg2(a, x)
 13843  		return true
 13844  	}
 13845  	// match: (MSUB a x (MOVDconst [c]))
 13846  	// cond: ssa.IsPowerOfTwo(c-1) && c>=3
 13847  	// result: (SUB a (ADDshiftLL <x.Type> x x [ssa.Log64(c-1)]))
 13848  	for {
 13849  		a := v_0
 13850  		x := v_1
 13851  		if v_2.Op != ssaop.OpARM64MOVDconst {
 13852  			break
 13853  		}
 13854  		c := ssa.AuxIntToInt64(v_2.AuxInt)
 13855  		if !(ssa.IsPowerOfTwo(c-1) && c >= 3) {
 13856  			break
 13857  		}
 13858  		v.Reset(ssaop.OpARM64SUB)
 13859  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64ADDshiftLL, x.Type)
 13860  		v0.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c - 1))
 13861  		v0.AddArg2(x, x)
 13862  		v.AddArg2(a, v0)
 13863  		return true
 13864  	}
 13865  	// match: (MSUB a x (MOVDconst [c]))
 13866  	// cond: ssa.IsPowerOfTwo(c+1) && c>=7
 13867  	// result: (ADD a (SUBshiftLL <x.Type> x x [ssa.Log64(c+1)]))
 13868  	for {
 13869  		a := v_0
 13870  		x := v_1
 13871  		if v_2.Op != ssaop.OpARM64MOVDconst {
 13872  			break
 13873  		}
 13874  		c := ssa.AuxIntToInt64(v_2.AuxInt)
 13875  		if !(ssa.IsPowerOfTwo(c+1) && c >= 7) {
 13876  			break
 13877  		}
 13878  		v.Reset(ssaop.OpARM64ADD)
 13879  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SUBshiftLL, x.Type)
 13880  		v0.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c + 1))
 13881  		v0.AddArg2(x, x)
 13882  		v.AddArg2(a, v0)
 13883  		return true
 13884  	}
 13885  	// match: (MSUB a x (MOVDconst [c]))
 13886  	// cond: c%3 == 0 && ssa.IsPowerOfTwo(c/3)
 13887  	// result: (ADDshiftLL a (SUBshiftLL <x.Type> x x [2]) [ssa.Log64(c/3)])
 13888  	for {
 13889  		a := v_0
 13890  		x := v_1
 13891  		if v_2.Op != ssaop.OpARM64MOVDconst {
 13892  			break
 13893  		}
 13894  		c := ssa.AuxIntToInt64(v_2.AuxInt)
 13895  		if !(c%3 == 0 && ssa.IsPowerOfTwo(c/3)) {
 13896  			break
 13897  		}
 13898  		v.Reset(ssaop.OpARM64ADDshiftLL)
 13899  		v.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c / 3))
 13900  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SUBshiftLL, x.Type)
 13901  		v0.AuxInt = ssa.Int64ToAuxInt(2)
 13902  		v0.AddArg2(x, x)
 13903  		v.AddArg2(a, v0)
 13904  		return true
 13905  	}
 13906  	// match: (MSUB a x (MOVDconst [c]))
 13907  	// cond: c%5 == 0 && ssa.IsPowerOfTwo(c/5)
 13908  	// result: (SUBshiftLL a (ADDshiftLL <x.Type> x x [2]) [ssa.Log64(c/5)])
 13909  	for {
 13910  		a := v_0
 13911  		x := v_1
 13912  		if v_2.Op != ssaop.OpARM64MOVDconst {
 13913  			break
 13914  		}
 13915  		c := ssa.AuxIntToInt64(v_2.AuxInt)
 13916  		if !(c%5 == 0 && ssa.IsPowerOfTwo(c/5)) {
 13917  			break
 13918  		}
 13919  		v.Reset(ssaop.OpARM64SUBshiftLL)
 13920  		v.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c / 5))
 13921  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64ADDshiftLL, x.Type)
 13922  		v0.AuxInt = ssa.Int64ToAuxInt(2)
 13923  		v0.AddArg2(x, x)
 13924  		v.AddArg2(a, v0)
 13925  		return true
 13926  	}
 13927  	// match: (MSUB a x (MOVDconst [c]))
 13928  	// cond: c%7 == 0 && ssa.IsPowerOfTwo(c/7)
 13929  	// result: (ADDshiftLL a (SUBshiftLL <x.Type> x x [3]) [ssa.Log64(c/7)])
 13930  	for {
 13931  		a := v_0
 13932  		x := v_1
 13933  		if v_2.Op != ssaop.OpARM64MOVDconst {
 13934  			break
 13935  		}
 13936  		c := ssa.AuxIntToInt64(v_2.AuxInt)
 13937  		if !(c%7 == 0 && ssa.IsPowerOfTwo(c/7)) {
 13938  			break
 13939  		}
 13940  		v.Reset(ssaop.OpARM64ADDshiftLL)
 13941  		v.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c / 7))
 13942  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SUBshiftLL, x.Type)
 13943  		v0.AuxInt = ssa.Int64ToAuxInt(3)
 13944  		v0.AddArg2(x, x)
 13945  		v.AddArg2(a, v0)
 13946  		return true
 13947  	}
 13948  	// match: (MSUB a x (MOVDconst [c]))
 13949  	// cond: c%9 == 0 && ssa.IsPowerOfTwo(c/9)
 13950  	// result: (SUBshiftLL a (ADDshiftLL <x.Type> x x [3]) [ssa.Log64(c/9)])
 13951  	for {
 13952  		a := v_0
 13953  		x := v_1
 13954  		if v_2.Op != ssaop.OpARM64MOVDconst {
 13955  			break
 13956  		}
 13957  		c := ssa.AuxIntToInt64(v_2.AuxInt)
 13958  		if !(c%9 == 0 && ssa.IsPowerOfTwo(c/9)) {
 13959  			break
 13960  		}
 13961  		v.Reset(ssaop.OpARM64SUBshiftLL)
 13962  		v.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c / 9))
 13963  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64ADDshiftLL, x.Type)
 13964  		v0.AuxInt = ssa.Int64ToAuxInt(3)
 13965  		v0.AddArg2(x, x)
 13966  		v.AddArg2(a, v0)
 13967  		return true
 13968  	}
 13969  	// match: (MSUB a (MOVDconst [-1]) x)
 13970  	// result: (ADD a x)
 13971  	for {
 13972  		a := v_0
 13973  		if v_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_1.AuxInt) != -1 {
 13974  			break
 13975  		}
 13976  		x := v_2
 13977  		v.Reset(ssaop.OpARM64ADD)
 13978  		v.AddArg2(a, x)
 13979  		return true
 13980  	}
 13981  	// match: (MSUB a (MOVDconst [0]) _)
 13982  	// result: a
 13983  	for {
 13984  		a := v_0
 13985  		if v_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_1.AuxInt) != 0 {
 13986  			break
 13987  		}
 13988  		v.CopyOf(a)
 13989  		return true
 13990  	}
 13991  	// match: (MSUB a (MOVDconst [1]) x)
 13992  	// result: (SUB a x)
 13993  	for {
 13994  		a := v_0
 13995  		if v_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_1.AuxInt) != 1 {
 13996  			break
 13997  		}
 13998  		x := v_2
 13999  		v.Reset(ssaop.OpARM64SUB)
 14000  		v.AddArg2(a, x)
 14001  		return true
 14002  	}
 14003  	// match: (MSUB a (MOVDconst [c]) x)
 14004  	// cond: ssa.IsPowerOfTwo(c)
 14005  	// result: (SUBshiftLL a x [ssa.Log64(c)])
 14006  	for {
 14007  		a := v_0
 14008  		if v_1.Op != ssaop.OpARM64MOVDconst {
 14009  			break
 14010  		}
 14011  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 14012  		x := v_2
 14013  		if !(ssa.IsPowerOfTwo(c)) {
 14014  			break
 14015  		}
 14016  		v.Reset(ssaop.OpARM64SUBshiftLL)
 14017  		v.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c))
 14018  		v.AddArg2(a, x)
 14019  		return true
 14020  	}
 14021  	// match: (MSUB a (MOVDconst [c]) x)
 14022  	// cond: ssa.IsPowerOfTwo(c-1) && c>=3
 14023  	// result: (SUB a (ADDshiftLL <x.Type> x x [ssa.Log64(c-1)]))
 14024  	for {
 14025  		a := v_0
 14026  		if v_1.Op != ssaop.OpARM64MOVDconst {
 14027  			break
 14028  		}
 14029  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 14030  		x := v_2
 14031  		if !(ssa.IsPowerOfTwo(c-1) && c >= 3) {
 14032  			break
 14033  		}
 14034  		v.Reset(ssaop.OpARM64SUB)
 14035  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64ADDshiftLL, x.Type)
 14036  		v0.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c - 1))
 14037  		v0.AddArg2(x, x)
 14038  		v.AddArg2(a, v0)
 14039  		return true
 14040  	}
 14041  	// match: (MSUB a (MOVDconst [c]) x)
 14042  	// cond: ssa.IsPowerOfTwo(c+1) && c>=7
 14043  	// result: (ADD a (SUBshiftLL <x.Type> x x [ssa.Log64(c+1)]))
 14044  	for {
 14045  		a := v_0
 14046  		if v_1.Op != ssaop.OpARM64MOVDconst {
 14047  			break
 14048  		}
 14049  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 14050  		x := v_2
 14051  		if !(ssa.IsPowerOfTwo(c+1) && c >= 7) {
 14052  			break
 14053  		}
 14054  		v.Reset(ssaop.OpARM64ADD)
 14055  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SUBshiftLL, x.Type)
 14056  		v0.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c + 1))
 14057  		v0.AddArg2(x, x)
 14058  		v.AddArg2(a, v0)
 14059  		return true
 14060  	}
 14061  	// match: (MSUB a (MOVDconst [c]) x)
 14062  	// cond: c%3 == 0 && ssa.IsPowerOfTwo(c/3)
 14063  	// result: (ADDshiftLL a (SUBshiftLL <x.Type> x x [2]) [ssa.Log64(c/3)])
 14064  	for {
 14065  		a := v_0
 14066  		if v_1.Op != ssaop.OpARM64MOVDconst {
 14067  			break
 14068  		}
 14069  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 14070  		x := v_2
 14071  		if !(c%3 == 0 && ssa.IsPowerOfTwo(c/3)) {
 14072  			break
 14073  		}
 14074  		v.Reset(ssaop.OpARM64ADDshiftLL)
 14075  		v.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c / 3))
 14076  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SUBshiftLL, x.Type)
 14077  		v0.AuxInt = ssa.Int64ToAuxInt(2)
 14078  		v0.AddArg2(x, x)
 14079  		v.AddArg2(a, v0)
 14080  		return true
 14081  	}
 14082  	// match: (MSUB a (MOVDconst [c]) x)
 14083  	// cond: c%5 == 0 && ssa.IsPowerOfTwo(c/5)
 14084  	// result: (SUBshiftLL a (ADDshiftLL <x.Type> x x [2]) [ssa.Log64(c/5)])
 14085  	for {
 14086  		a := v_0
 14087  		if v_1.Op != ssaop.OpARM64MOVDconst {
 14088  			break
 14089  		}
 14090  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 14091  		x := v_2
 14092  		if !(c%5 == 0 && ssa.IsPowerOfTwo(c/5)) {
 14093  			break
 14094  		}
 14095  		v.Reset(ssaop.OpARM64SUBshiftLL)
 14096  		v.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c / 5))
 14097  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64ADDshiftLL, x.Type)
 14098  		v0.AuxInt = ssa.Int64ToAuxInt(2)
 14099  		v0.AddArg2(x, x)
 14100  		v.AddArg2(a, v0)
 14101  		return true
 14102  	}
 14103  	// match: (MSUB a (MOVDconst [c]) x)
 14104  	// cond: c%7 == 0 && ssa.IsPowerOfTwo(c/7)
 14105  	// result: (ADDshiftLL a (SUBshiftLL <x.Type> x x [3]) [ssa.Log64(c/7)])
 14106  	for {
 14107  		a := v_0
 14108  		if v_1.Op != ssaop.OpARM64MOVDconst {
 14109  			break
 14110  		}
 14111  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 14112  		x := v_2
 14113  		if !(c%7 == 0 && ssa.IsPowerOfTwo(c/7)) {
 14114  			break
 14115  		}
 14116  		v.Reset(ssaop.OpARM64ADDshiftLL)
 14117  		v.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c / 7))
 14118  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SUBshiftLL, x.Type)
 14119  		v0.AuxInt = ssa.Int64ToAuxInt(3)
 14120  		v0.AddArg2(x, x)
 14121  		v.AddArg2(a, v0)
 14122  		return true
 14123  	}
 14124  	// match: (MSUB a (MOVDconst [c]) x)
 14125  	// cond: c%9 == 0 && ssa.IsPowerOfTwo(c/9)
 14126  	// result: (SUBshiftLL a (ADDshiftLL <x.Type> x x [3]) [ssa.Log64(c/9)])
 14127  	for {
 14128  		a := v_0
 14129  		if v_1.Op != ssaop.OpARM64MOVDconst {
 14130  			break
 14131  		}
 14132  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 14133  		x := v_2
 14134  		if !(c%9 == 0 && ssa.IsPowerOfTwo(c/9)) {
 14135  			break
 14136  		}
 14137  		v.Reset(ssaop.OpARM64SUBshiftLL)
 14138  		v.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c / 9))
 14139  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64ADDshiftLL, x.Type)
 14140  		v0.AuxInt = ssa.Int64ToAuxInt(3)
 14141  		v0.AddArg2(x, x)
 14142  		v.AddArg2(a, v0)
 14143  		return true
 14144  	}
 14145  	// match: (MSUB (MOVDconst [c]) x y)
 14146  	// result: (ADDconst [c] (MNEG <x.Type> x y))
 14147  	for {
 14148  		if v_0.Op != ssaop.OpARM64MOVDconst {
 14149  			break
 14150  		}
 14151  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 14152  		x := v_1
 14153  		y := v_2
 14154  		v.Reset(ssaop.OpARM64ADDconst)
 14155  		v.AuxInt = ssa.Int64ToAuxInt(c)
 14156  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MNEG, x.Type)
 14157  		v0.AddArg2(x, y)
 14158  		v.AddArg(v0)
 14159  		return true
 14160  	}
 14161  	// match: (MSUB a (MOVDconst [c]) (MOVDconst [d]))
 14162  	// result: (SUBconst [c*d] a)
 14163  	for {
 14164  		a := v_0
 14165  		if v_1.Op != ssaop.OpARM64MOVDconst {
 14166  			break
 14167  		}
 14168  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 14169  		if v_2.Op != ssaop.OpARM64MOVDconst {
 14170  			break
 14171  		}
 14172  		d := ssa.AuxIntToInt64(v_2.AuxInt)
 14173  		v.Reset(ssaop.OpARM64SUBconst)
 14174  		v.AuxInt = ssa.Int64ToAuxInt(c * d)
 14175  		v.AddArg(a)
 14176  		return true
 14177  	}
 14178  	return false
 14179  }
 14180  func rewriteValue_OpARM64MSUBW(v *ssa.Value) bool {
 14181  	v_2 := v.Args[2]
 14182  	v_1 := v.Args[1]
 14183  	v_0 := v.Args[0]
 14184  	b := v.Block
 14185  	// match: (MSUBW a x (MOVDconst [c]))
 14186  	// cond: int32(c)==-1
 14187  	// result: (MOVWUreg (ADD <a.Type> a x))
 14188  	for {
 14189  		a := v_0
 14190  		x := v_1
 14191  		if v_2.Op != ssaop.OpARM64MOVDconst {
 14192  			break
 14193  		}
 14194  		c := ssa.AuxIntToInt64(v_2.AuxInt)
 14195  		if !(int32(c) == -1) {
 14196  			break
 14197  		}
 14198  		v.Reset(ssaop.OpARM64MOVWUreg)
 14199  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64ADD, a.Type)
 14200  		v0.AddArg2(a, x)
 14201  		v.AddArg(v0)
 14202  		return true
 14203  	}
 14204  	// match: (MSUBW a _ (MOVDconst [c]))
 14205  	// cond: int32(c)==0
 14206  	// result: (MOVWUreg a)
 14207  	for {
 14208  		a := v_0
 14209  		if v_2.Op != ssaop.OpARM64MOVDconst {
 14210  			break
 14211  		}
 14212  		c := ssa.AuxIntToInt64(v_2.AuxInt)
 14213  		if !(int32(c) == 0) {
 14214  			break
 14215  		}
 14216  		v.Reset(ssaop.OpARM64MOVWUreg)
 14217  		v.AddArg(a)
 14218  		return true
 14219  	}
 14220  	// match: (MSUBW a x (MOVDconst [c]))
 14221  	// cond: int32(c)==1
 14222  	// result: (MOVWUreg (SUB <a.Type> a x))
 14223  	for {
 14224  		a := v_0
 14225  		x := v_1
 14226  		if v_2.Op != ssaop.OpARM64MOVDconst {
 14227  			break
 14228  		}
 14229  		c := ssa.AuxIntToInt64(v_2.AuxInt)
 14230  		if !(int32(c) == 1) {
 14231  			break
 14232  		}
 14233  		v.Reset(ssaop.OpARM64MOVWUreg)
 14234  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SUB, a.Type)
 14235  		v0.AddArg2(a, x)
 14236  		v.AddArg(v0)
 14237  		return true
 14238  	}
 14239  	// match: (MSUBW a x (MOVDconst [c]))
 14240  	// cond: ssa.IsPowerOfTwo(c)
 14241  	// result: (MOVWUreg (SUBshiftLL <a.Type> a x [ssa.Log64(c)]))
 14242  	for {
 14243  		a := v_0
 14244  		x := v_1
 14245  		if v_2.Op != ssaop.OpARM64MOVDconst {
 14246  			break
 14247  		}
 14248  		c := ssa.AuxIntToInt64(v_2.AuxInt)
 14249  		if !(ssa.IsPowerOfTwo(c)) {
 14250  			break
 14251  		}
 14252  		v.Reset(ssaop.OpARM64MOVWUreg)
 14253  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SUBshiftLL, a.Type)
 14254  		v0.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c))
 14255  		v0.AddArg2(a, x)
 14256  		v.AddArg(v0)
 14257  		return true
 14258  	}
 14259  	// match: (MSUBW a x (MOVDconst [c]))
 14260  	// cond: ssa.IsPowerOfTwo(c-1) && int32(c)>=3
 14261  	// result: (MOVWUreg (SUB <a.Type> a (ADDshiftLL <x.Type> x x [ssa.Log64(c-1)])))
 14262  	for {
 14263  		a := v_0
 14264  		x := v_1
 14265  		if v_2.Op != ssaop.OpARM64MOVDconst {
 14266  			break
 14267  		}
 14268  		c := ssa.AuxIntToInt64(v_2.AuxInt)
 14269  		if !(ssa.IsPowerOfTwo(c-1) && int32(c) >= 3) {
 14270  			break
 14271  		}
 14272  		v.Reset(ssaop.OpARM64MOVWUreg)
 14273  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SUB, a.Type)
 14274  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64ADDshiftLL, x.Type)
 14275  		v1.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c - 1))
 14276  		v1.AddArg2(x, x)
 14277  		v0.AddArg2(a, v1)
 14278  		v.AddArg(v0)
 14279  		return true
 14280  	}
 14281  	// match: (MSUBW a x (MOVDconst [c]))
 14282  	// cond: ssa.IsPowerOfTwo(c+1) && int32(c)>=7
 14283  	// result: (MOVWUreg (ADD <a.Type> a (SUBshiftLL <x.Type> x x [ssa.Log64(c+1)])))
 14284  	for {
 14285  		a := v_0
 14286  		x := v_1
 14287  		if v_2.Op != ssaop.OpARM64MOVDconst {
 14288  			break
 14289  		}
 14290  		c := ssa.AuxIntToInt64(v_2.AuxInt)
 14291  		if !(ssa.IsPowerOfTwo(c+1) && int32(c) >= 7) {
 14292  			break
 14293  		}
 14294  		v.Reset(ssaop.OpARM64MOVWUreg)
 14295  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64ADD, a.Type)
 14296  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64SUBshiftLL, x.Type)
 14297  		v1.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c + 1))
 14298  		v1.AddArg2(x, x)
 14299  		v0.AddArg2(a, v1)
 14300  		v.AddArg(v0)
 14301  		return true
 14302  	}
 14303  	// match: (MSUBW a x (MOVDconst [c]))
 14304  	// cond: c%3 == 0 && ssa.IsPowerOfTwo(c/3) && ssa.Is32Bit(c)
 14305  	// result: (MOVWUreg (ADDshiftLL <a.Type> a (SUBshiftLL <x.Type> x x [2]) [ssa.Log64(c/3)]))
 14306  	for {
 14307  		a := v_0
 14308  		x := v_1
 14309  		if v_2.Op != ssaop.OpARM64MOVDconst {
 14310  			break
 14311  		}
 14312  		c := ssa.AuxIntToInt64(v_2.AuxInt)
 14313  		if !(c%3 == 0 && ssa.IsPowerOfTwo(c/3) && ssa.Is32Bit(c)) {
 14314  			break
 14315  		}
 14316  		v.Reset(ssaop.OpARM64MOVWUreg)
 14317  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64ADDshiftLL, a.Type)
 14318  		v0.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c / 3))
 14319  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64SUBshiftLL, x.Type)
 14320  		v1.AuxInt = ssa.Int64ToAuxInt(2)
 14321  		v1.AddArg2(x, x)
 14322  		v0.AddArg2(a, v1)
 14323  		v.AddArg(v0)
 14324  		return true
 14325  	}
 14326  	// match: (MSUBW a x (MOVDconst [c]))
 14327  	// cond: c%5 == 0 && ssa.IsPowerOfTwo(c/5) && ssa.Is32Bit(c)
 14328  	// result: (MOVWUreg (SUBshiftLL <a.Type> a (ADDshiftLL <x.Type> x x [2]) [ssa.Log64(c/5)]))
 14329  	for {
 14330  		a := v_0
 14331  		x := v_1
 14332  		if v_2.Op != ssaop.OpARM64MOVDconst {
 14333  			break
 14334  		}
 14335  		c := ssa.AuxIntToInt64(v_2.AuxInt)
 14336  		if !(c%5 == 0 && ssa.IsPowerOfTwo(c/5) && ssa.Is32Bit(c)) {
 14337  			break
 14338  		}
 14339  		v.Reset(ssaop.OpARM64MOVWUreg)
 14340  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SUBshiftLL, a.Type)
 14341  		v0.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c / 5))
 14342  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64ADDshiftLL, x.Type)
 14343  		v1.AuxInt = ssa.Int64ToAuxInt(2)
 14344  		v1.AddArg2(x, x)
 14345  		v0.AddArg2(a, v1)
 14346  		v.AddArg(v0)
 14347  		return true
 14348  	}
 14349  	// match: (MSUBW a x (MOVDconst [c]))
 14350  	// cond: c%7 == 0 && ssa.IsPowerOfTwo(c/7) && ssa.Is32Bit(c)
 14351  	// result: (MOVWUreg (ADDshiftLL <a.Type> a (SUBshiftLL <x.Type> x x [3]) [ssa.Log64(c/7)]))
 14352  	for {
 14353  		a := v_0
 14354  		x := v_1
 14355  		if v_2.Op != ssaop.OpARM64MOVDconst {
 14356  			break
 14357  		}
 14358  		c := ssa.AuxIntToInt64(v_2.AuxInt)
 14359  		if !(c%7 == 0 && ssa.IsPowerOfTwo(c/7) && ssa.Is32Bit(c)) {
 14360  			break
 14361  		}
 14362  		v.Reset(ssaop.OpARM64MOVWUreg)
 14363  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64ADDshiftLL, a.Type)
 14364  		v0.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c / 7))
 14365  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64SUBshiftLL, x.Type)
 14366  		v1.AuxInt = ssa.Int64ToAuxInt(3)
 14367  		v1.AddArg2(x, x)
 14368  		v0.AddArg2(a, v1)
 14369  		v.AddArg(v0)
 14370  		return true
 14371  	}
 14372  	// match: (MSUBW a x (MOVDconst [c]))
 14373  	// cond: c%9 == 0 && ssa.IsPowerOfTwo(c/9) && ssa.Is32Bit(c)
 14374  	// result: (MOVWUreg (SUBshiftLL <a.Type> a (ADDshiftLL <x.Type> x x [3]) [ssa.Log64(c/9)]))
 14375  	for {
 14376  		a := v_0
 14377  		x := v_1
 14378  		if v_2.Op != ssaop.OpARM64MOVDconst {
 14379  			break
 14380  		}
 14381  		c := ssa.AuxIntToInt64(v_2.AuxInt)
 14382  		if !(c%9 == 0 && ssa.IsPowerOfTwo(c/9) && ssa.Is32Bit(c)) {
 14383  			break
 14384  		}
 14385  		v.Reset(ssaop.OpARM64MOVWUreg)
 14386  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SUBshiftLL, a.Type)
 14387  		v0.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c / 9))
 14388  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64ADDshiftLL, x.Type)
 14389  		v1.AuxInt = ssa.Int64ToAuxInt(3)
 14390  		v1.AddArg2(x, x)
 14391  		v0.AddArg2(a, v1)
 14392  		v.AddArg(v0)
 14393  		return true
 14394  	}
 14395  	// match: (MSUBW a (MOVDconst [c]) x)
 14396  	// cond: int32(c)==-1
 14397  	// result: (MOVWUreg (ADD <a.Type> a x))
 14398  	for {
 14399  		a := v_0
 14400  		if v_1.Op != ssaop.OpARM64MOVDconst {
 14401  			break
 14402  		}
 14403  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 14404  		x := v_2
 14405  		if !(int32(c) == -1) {
 14406  			break
 14407  		}
 14408  		v.Reset(ssaop.OpARM64MOVWUreg)
 14409  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64ADD, a.Type)
 14410  		v0.AddArg2(a, x)
 14411  		v.AddArg(v0)
 14412  		return true
 14413  	}
 14414  	// match: (MSUBW a (MOVDconst [c]) _)
 14415  	// cond: int32(c)==0
 14416  	// result: (MOVWUreg a)
 14417  	for {
 14418  		a := v_0
 14419  		if v_1.Op != ssaop.OpARM64MOVDconst {
 14420  			break
 14421  		}
 14422  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 14423  		if !(int32(c) == 0) {
 14424  			break
 14425  		}
 14426  		v.Reset(ssaop.OpARM64MOVWUreg)
 14427  		v.AddArg(a)
 14428  		return true
 14429  	}
 14430  	// match: (MSUBW a (MOVDconst [c]) x)
 14431  	// cond: int32(c)==1
 14432  	// result: (MOVWUreg (SUB <a.Type> a x))
 14433  	for {
 14434  		a := v_0
 14435  		if v_1.Op != ssaop.OpARM64MOVDconst {
 14436  			break
 14437  		}
 14438  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 14439  		x := v_2
 14440  		if !(int32(c) == 1) {
 14441  			break
 14442  		}
 14443  		v.Reset(ssaop.OpARM64MOVWUreg)
 14444  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SUB, a.Type)
 14445  		v0.AddArg2(a, x)
 14446  		v.AddArg(v0)
 14447  		return true
 14448  	}
 14449  	// match: (MSUBW a (MOVDconst [c]) x)
 14450  	// cond: ssa.IsPowerOfTwo(c)
 14451  	// result: (MOVWUreg (SUBshiftLL <a.Type> a x [ssa.Log64(c)]))
 14452  	for {
 14453  		a := v_0
 14454  		if v_1.Op != ssaop.OpARM64MOVDconst {
 14455  			break
 14456  		}
 14457  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 14458  		x := v_2
 14459  		if !(ssa.IsPowerOfTwo(c)) {
 14460  			break
 14461  		}
 14462  		v.Reset(ssaop.OpARM64MOVWUreg)
 14463  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SUBshiftLL, a.Type)
 14464  		v0.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c))
 14465  		v0.AddArg2(a, x)
 14466  		v.AddArg(v0)
 14467  		return true
 14468  	}
 14469  	// match: (MSUBW a (MOVDconst [c]) x)
 14470  	// cond: ssa.IsPowerOfTwo(c-1) && int32(c)>=3
 14471  	// result: (MOVWUreg (SUB <a.Type> a (ADDshiftLL <x.Type> x x [ssa.Log64(c-1)])))
 14472  	for {
 14473  		a := v_0
 14474  		if v_1.Op != ssaop.OpARM64MOVDconst {
 14475  			break
 14476  		}
 14477  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 14478  		x := v_2
 14479  		if !(ssa.IsPowerOfTwo(c-1) && int32(c) >= 3) {
 14480  			break
 14481  		}
 14482  		v.Reset(ssaop.OpARM64MOVWUreg)
 14483  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SUB, a.Type)
 14484  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64ADDshiftLL, x.Type)
 14485  		v1.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c - 1))
 14486  		v1.AddArg2(x, x)
 14487  		v0.AddArg2(a, v1)
 14488  		v.AddArg(v0)
 14489  		return true
 14490  	}
 14491  	// match: (MSUBW a (MOVDconst [c]) x)
 14492  	// cond: ssa.IsPowerOfTwo(c+1) && int32(c)>=7
 14493  	// result: (MOVWUreg (ADD <a.Type> a (SUBshiftLL <x.Type> x x [ssa.Log64(c+1)])))
 14494  	for {
 14495  		a := v_0
 14496  		if v_1.Op != ssaop.OpARM64MOVDconst {
 14497  			break
 14498  		}
 14499  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 14500  		x := v_2
 14501  		if !(ssa.IsPowerOfTwo(c+1) && int32(c) >= 7) {
 14502  			break
 14503  		}
 14504  		v.Reset(ssaop.OpARM64MOVWUreg)
 14505  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64ADD, a.Type)
 14506  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64SUBshiftLL, x.Type)
 14507  		v1.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c + 1))
 14508  		v1.AddArg2(x, x)
 14509  		v0.AddArg2(a, v1)
 14510  		v.AddArg(v0)
 14511  		return true
 14512  	}
 14513  	// match: (MSUBW a (MOVDconst [c]) x)
 14514  	// cond: c%3 == 0 && ssa.IsPowerOfTwo(c/3) && ssa.Is32Bit(c)
 14515  	// result: (MOVWUreg (ADDshiftLL <a.Type> a (SUBshiftLL <x.Type> x x [2]) [ssa.Log64(c/3)]))
 14516  	for {
 14517  		a := v_0
 14518  		if v_1.Op != ssaop.OpARM64MOVDconst {
 14519  			break
 14520  		}
 14521  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 14522  		x := v_2
 14523  		if !(c%3 == 0 && ssa.IsPowerOfTwo(c/3) && ssa.Is32Bit(c)) {
 14524  			break
 14525  		}
 14526  		v.Reset(ssaop.OpARM64MOVWUreg)
 14527  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64ADDshiftLL, a.Type)
 14528  		v0.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c / 3))
 14529  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64SUBshiftLL, x.Type)
 14530  		v1.AuxInt = ssa.Int64ToAuxInt(2)
 14531  		v1.AddArg2(x, x)
 14532  		v0.AddArg2(a, v1)
 14533  		v.AddArg(v0)
 14534  		return true
 14535  	}
 14536  	// match: (MSUBW a (MOVDconst [c]) x)
 14537  	// cond: c%5 == 0 && ssa.IsPowerOfTwo(c/5) && ssa.Is32Bit(c)
 14538  	// result: (MOVWUreg (SUBshiftLL <a.Type> a (ADDshiftLL <x.Type> x x [2]) [ssa.Log64(c/5)]))
 14539  	for {
 14540  		a := v_0
 14541  		if v_1.Op != ssaop.OpARM64MOVDconst {
 14542  			break
 14543  		}
 14544  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 14545  		x := v_2
 14546  		if !(c%5 == 0 && ssa.IsPowerOfTwo(c/5) && ssa.Is32Bit(c)) {
 14547  			break
 14548  		}
 14549  		v.Reset(ssaop.OpARM64MOVWUreg)
 14550  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SUBshiftLL, a.Type)
 14551  		v0.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c / 5))
 14552  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64ADDshiftLL, x.Type)
 14553  		v1.AuxInt = ssa.Int64ToAuxInt(2)
 14554  		v1.AddArg2(x, x)
 14555  		v0.AddArg2(a, v1)
 14556  		v.AddArg(v0)
 14557  		return true
 14558  	}
 14559  	// match: (MSUBW a (MOVDconst [c]) x)
 14560  	// cond: c%7 == 0 && ssa.IsPowerOfTwo(c/7) && ssa.Is32Bit(c)
 14561  	// result: (MOVWUreg (ADDshiftLL <a.Type> a (SUBshiftLL <x.Type> x x [3]) [ssa.Log64(c/7)]))
 14562  	for {
 14563  		a := v_0
 14564  		if v_1.Op != ssaop.OpARM64MOVDconst {
 14565  			break
 14566  		}
 14567  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 14568  		x := v_2
 14569  		if !(c%7 == 0 && ssa.IsPowerOfTwo(c/7) && ssa.Is32Bit(c)) {
 14570  			break
 14571  		}
 14572  		v.Reset(ssaop.OpARM64MOVWUreg)
 14573  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64ADDshiftLL, a.Type)
 14574  		v0.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c / 7))
 14575  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64SUBshiftLL, x.Type)
 14576  		v1.AuxInt = ssa.Int64ToAuxInt(3)
 14577  		v1.AddArg2(x, x)
 14578  		v0.AddArg2(a, v1)
 14579  		v.AddArg(v0)
 14580  		return true
 14581  	}
 14582  	// match: (MSUBW a (MOVDconst [c]) x)
 14583  	// cond: c%9 == 0 && ssa.IsPowerOfTwo(c/9) && ssa.Is32Bit(c)
 14584  	// result: (MOVWUreg (SUBshiftLL <a.Type> a (ADDshiftLL <x.Type> x x [3]) [ssa.Log64(c/9)]))
 14585  	for {
 14586  		a := v_0
 14587  		if v_1.Op != ssaop.OpARM64MOVDconst {
 14588  			break
 14589  		}
 14590  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 14591  		x := v_2
 14592  		if !(c%9 == 0 && ssa.IsPowerOfTwo(c/9) && ssa.Is32Bit(c)) {
 14593  			break
 14594  		}
 14595  		v.Reset(ssaop.OpARM64MOVWUreg)
 14596  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SUBshiftLL, a.Type)
 14597  		v0.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c / 9))
 14598  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64ADDshiftLL, x.Type)
 14599  		v1.AuxInt = ssa.Int64ToAuxInt(3)
 14600  		v1.AddArg2(x, x)
 14601  		v0.AddArg2(a, v1)
 14602  		v.AddArg(v0)
 14603  		return true
 14604  	}
 14605  	// match: (MSUBW (MOVDconst [c]) x y)
 14606  	// result: (MOVWUreg (ADDconst <x.Type> [c] (MNEGW <x.Type> x y)))
 14607  	for {
 14608  		if v_0.Op != ssaop.OpARM64MOVDconst {
 14609  			break
 14610  		}
 14611  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 14612  		x := v_1
 14613  		y := v_2
 14614  		v.Reset(ssaop.OpARM64MOVWUreg)
 14615  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64ADDconst, x.Type)
 14616  		v0.AuxInt = ssa.Int64ToAuxInt(c)
 14617  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64MNEGW, x.Type)
 14618  		v1.AddArg2(x, y)
 14619  		v0.AddArg(v1)
 14620  		v.AddArg(v0)
 14621  		return true
 14622  	}
 14623  	// match: (MSUBW a (MOVDconst [c]) (MOVDconst [d]))
 14624  	// result: (MOVWUreg (SUBconst <a.Type> [c*d] a))
 14625  	for {
 14626  		a := v_0
 14627  		if v_1.Op != ssaop.OpARM64MOVDconst {
 14628  			break
 14629  		}
 14630  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 14631  		if v_2.Op != ssaop.OpARM64MOVDconst {
 14632  			break
 14633  		}
 14634  		d := ssa.AuxIntToInt64(v_2.AuxInt)
 14635  		v.Reset(ssaop.OpARM64MOVWUreg)
 14636  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SUBconst, a.Type)
 14637  		v0.AuxInt = ssa.Int64ToAuxInt(c * d)
 14638  		v0.AddArg(a)
 14639  		v.AddArg(v0)
 14640  		return true
 14641  	}
 14642  	return false
 14643  }
 14644  func rewriteValue_OpARM64MUL(v *ssa.Value) bool {
 14645  	v_1 := v.Args[1]
 14646  	v_0 := v.Args[0]
 14647  	b := v.Block
 14648  	config := b.Func.Config
 14649  	// match: (MUL (NEG x) y)
 14650  	// result: (MNEG x y)
 14651  	for {
 14652  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 14653  			if v_0.Op != ssaop.OpARM64NEG {
 14654  				continue
 14655  			}
 14656  			x := v_0.Args[0]
 14657  			y := v_1
 14658  			v.Reset(ssaop.OpARM64MNEG)
 14659  			v.AddArg2(x, y)
 14660  			return true
 14661  		}
 14662  		break
 14663  	}
 14664  	// match: (MUL _ (MOVDconst [0]))
 14665  	// result: (MOVDconst [0])
 14666  	for {
 14667  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 14668  			if v_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_1.AuxInt) != 0 {
 14669  				continue
 14670  			}
 14671  			v.Reset(ssaop.OpARM64MOVDconst)
 14672  			v.AuxInt = ssa.Int64ToAuxInt(0)
 14673  			return true
 14674  		}
 14675  		break
 14676  	}
 14677  	// match: (MUL x (MOVDconst [1]))
 14678  	// result: x
 14679  	for {
 14680  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 14681  			x := v_0
 14682  			if v_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_1.AuxInt) != 1 {
 14683  				continue
 14684  			}
 14685  			v.CopyOf(x)
 14686  			return true
 14687  		}
 14688  		break
 14689  	}
 14690  	// match: (MUL x (MOVDconst [c]))
 14691  	// cond: ssa.CanMulStrengthReduce(config, c)
 14692  	// result: {ssa.MulStrengthReduce(v, x, c)}
 14693  	for {
 14694  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 14695  			x := v_0
 14696  			if v_1.Op != ssaop.OpARM64MOVDconst {
 14697  				continue
 14698  			}
 14699  			c := ssa.AuxIntToInt64(v_1.AuxInt)
 14700  			if !(ssa.CanMulStrengthReduce(config, c)) {
 14701  				continue
 14702  			}
 14703  			v.CopyOf(ssa.MulStrengthReduce(v, x, c))
 14704  			return true
 14705  		}
 14706  		break
 14707  	}
 14708  	// match: (MUL (MOVDconst [c]) (MOVDconst [d]))
 14709  	// result: (MOVDconst [c*d])
 14710  	for {
 14711  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 14712  			if v_0.Op != ssaop.OpARM64MOVDconst {
 14713  				continue
 14714  			}
 14715  			c := ssa.AuxIntToInt64(v_0.AuxInt)
 14716  			if v_1.Op != ssaop.OpARM64MOVDconst {
 14717  				continue
 14718  			}
 14719  			d := ssa.AuxIntToInt64(v_1.AuxInt)
 14720  			v.Reset(ssaop.OpARM64MOVDconst)
 14721  			v.AuxInt = ssa.Int64ToAuxInt(c * d)
 14722  			return true
 14723  		}
 14724  		break
 14725  	}
 14726  	// match: (MUL r:(MOVWUreg x) s:(MOVWUreg y))
 14727  	// cond: r.Uses == 1 && s.Uses == 1
 14728  	// result: (UMULL x y)
 14729  	for {
 14730  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 14731  			r := v_0
 14732  			if r.Op != ssaop.OpARM64MOVWUreg {
 14733  				continue
 14734  			}
 14735  			x := r.Args[0]
 14736  			s := v_1
 14737  			if s.Op != ssaop.OpARM64MOVWUreg {
 14738  				continue
 14739  			}
 14740  			y := s.Args[0]
 14741  			if !(r.Uses == 1 && s.Uses == 1) {
 14742  				continue
 14743  			}
 14744  			v.Reset(ssaop.OpARM64UMULL)
 14745  			v.AddArg2(x, y)
 14746  			return true
 14747  		}
 14748  		break
 14749  	}
 14750  	// match: (MUL r:(MOVWreg x) s:(MOVWreg y))
 14751  	// cond: r.Uses == 1 && s.Uses == 1
 14752  	// result: (MULL x y)
 14753  	for {
 14754  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 14755  			r := v_0
 14756  			if r.Op != ssaop.OpARM64MOVWreg {
 14757  				continue
 14758  			}
 14759  			x := r.Args[0]
 14760  			s := v_1
 14761  			if s.Op != ssaop.OpARM64MOVWreg {
 14762  				continue
 14763  			}
 14764  			y := s.Args[0]
 14765  			if !(r.Uses == 1 && s.Uses == 1) {
 14766  				continue
 14767  			}
 14768  			v.Reset(ssaop.OpARM64MULL)
 14769  			v.AddArg2(x, y)
 14770  			return true
 14771  		}
 14772  		break
 14773  	}
 14774  	return false
 14775  }
 14776  func rewriteValue_OpARM64MULW(v *ssa.Value) bool {
 14777  	v_1 := v.Args[1]
 14778  	v_0 := v.Args[0]
 14779  	b := v.Block
 14780  	config := b.Func.Config
 14781  	// match: (MULW (NEG x) y)
 14782  	// result: (MNEGW x y)
 14783  	for {
 14784  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 14785  			if v_0.Op != ssaop.OpARM64NEG {
 14786  				continue
 14787  			}
 14788  			x := v_0.Args[0]
 14789  			y := v_1
 14790  			v.Reset(ssaop.OpARM64MNEGW)
 14791  			v.AddArg2(x, y)
 14792  			return true
 14793  		}
 14794  		break
 14795  	}
 14796  	// match: (MULW _ (MOVDconst [c]))
 14797  	// cond: int32(c)==0
 14798  	// result: (MOVDconst [0])
 14799  	for {
 14800  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 14801  			if v_1.Op != ssaop.OpARM64MOVDconst {
 14802  				continue
 14803  			}
 14804  			c := ssa.AuxIntToInt64(v_1.AuxInt)
 14805  			if !(int32(c) == 0) {
 14806  				continue
 14807  			}
 14808  			v.Reset(ssaop.OpARM64MOVDconst)
 14809  			v.AuxInt = ssa.Int64ToAuxInt(0)
 14810  			return true
 14811  		}
 14812  		break
 14813  	}
 14814  	// match: (MULW x (MOVDconst [c]))
 14815  	// cond: int32(c)==1
 14816  	// result: (MOVWUreg x)
 14817  	for {
 14818  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 14819  			x := v_0
 14820  			if v_1.Op != ssaop.OpARM64MOVDconst {
 14821  				continue
 14822  			}
 14823  			c := ssa.AuxIntToInt64(v_1.AuxInt)
 14824  			if !(int32(c) == 1) {
 14825  				continue
 14826  			}
 14827  			v.Reset(ssaop.OpARM64MOVWUreg)
 14828  			v.AddArg(x)
 14829  			return true
 14830  		}
 14831  		break
 14832  	}
 14833  	// match: (MULW x (MOVDconst [c]))
 14834  	// cond: v.Type.Size() <= 4 && ssa.CanMulStrengthReduce32(config, int32(c))
 14835  	// result: {ssa.MulStrengthReduce32(v, x, int32(c))}
 14836  	for {
 14837  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 14838  			x := v_0
 14839  			if v_1.Op != ssaop.OpARM64MOVDconst {
 14840  				continue
 14841  			}
 14842  			c := ssa.AuxIntToInt64(v_1.AuxInt)
 14843  			if !(v.Type.Size() <= 4 && ssa.CanMulStrengthReduce32(config, int32(c))) {
 14844  				continue
 14845  			}
 14846  			v.CopyOf(ssa.MulStrengthReduce32(v, x, int32(c)))
 14847  			return true
 14848  		}
 14849  		break
 14850  	}
 14851  	// match: (MULW (MOVDconst [c]) (MOVDconst [d]))
 14852  	// result: (MOVDconst [int64(uint32(c*d))])
 14853  	for {
 14854  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 14855  			if v_0.Op != ssaop.OpARM64MOVDconst {
 14856  				continue
 14857  			}
 14858  			c := ssa.AuxIntToInt64(v_0.AuxInt)
 14859  			if v_1.Op != ssaop.OpARM64MOVDconst {
 14860  				continue
 14861  			}
 14862  			d := ssa.AuxIntToInt64(v_1.AuxInt)
 14863  			v.Reset(ssaop.OpARM64MOVDconst)
 14864  			v.AuxInt = ssa.Int64ToAuxInt(int64(uint32(c * d)))
 14865  			return true
 14866  		}
 14867  		break
 14868  	}
 14869  	return false
 14870  }
 14871  func rewriteValue_OpARM64MVN(v *ssa.Value) bool {
 14872  	v_0 := v.Args[0]
 14873  	// match: (MVN (XOR x y))
 14874  	// result: (EON x y)
 14875  	for {
 14876  		if v_0.Op != ssaop.OpARM64XOR {
 14877  			break
 14878  		}
 14879  		y := v_0.Args[1]
 14880  		x := v_0.Args[0]
 14881  		v.Reset(ssaop.OpARM64EON)
 14882  		v.AddArg2(x, y)
 14883  		return true
 14884  	}
 14885  	// match: (MVN (MOVDconst [c]))
 14886  	// result: (MOVDconst [^c])
 14887  	for {
 14888  		if v_0.Op != ssaop.OpARM64MOVDconst {
 14889  			break
 14890  		}
 14891  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 14892  		v.Reset(ssaop.OpARM64MOVDconst)
 14893  		v.AuxInt = ssa.Int64ToAuxInt(^c)
 14894  		return true
 14895  	}
 14896  	// match: (MVN x:(SLLconst [c] y))
 14897  	// cond: ssa.ClobberIfDead(x)
 14898  	// result: (MVNshiftLL [c] y)
 14899  	for {
 14900  		x := v_0
 14901  		if x.Op != ssaop.OpARM64SLLconst {
 14902  			break
 14903  		}
 14904  		c := ssa.AuxIntToInt64(x.AuxInt)
 14905  		y := x.Args[0]
 14906  		if !(ssa.ClobberIfDead(x)) {
 14907  			break
 14908  		}
 14909  		v.Reset(ssaop.OpARM64MVNshiftLL)
 14910  		v.AuxInt = ssa.Int64ToAuxInt(c)
 14911  		v.AddArg(y)
 14912  		return true
 14913  	}
 14914  	// match: (MVN x:(SRLconst [c] y))
 14915  	// cond: ssa.ClobberIfDead(x)
 14916  	// result: (MVNshiftRL [c] y)
 14917  	for {
 14918  		x := v_0
 14919  		if x.Op != ssaop.OpARM64SRLconst {
 14920  			break
 14921  		}
 14922  		c := ssa.AuxIntToInt64(x.AuxInt)
 14923  		y := x.Args[0]
 14924  		if !(ssa.ClobberIfDead(x)) {
 14925  			break
 14926  		}
 14927  		v.Reset(ssaop.OpARM64MVNshiftRL)
 14928  		v.AuxInt = ssa.Int64ToAuxInt(c)
 14929  		v.AddArg(y)
 14930  		return true
 14931  	}
 14932  	// match: (MVN x:(SRAconst [c] y))
 14933  	// cond: ssa.ClobberIfDead(x)
 14934  	// result: (MVNshiftRA [c] y)
 14935  	for {
 14936  		x := v_0
 14937  		if x.Op != ssaop.OpARM64SRAconst {
 14938  			break
 14939  		}
 14940  		c := ssa.AuxIntToInt64(x.AuxInt)
 14941  		y := x.Args[0]
 14942  		if !(ssa.ClobberIfDead(x)) {
 14943  			break
 14944  		}
 14945  		v.Reset(ssaop.OpARM64MVNshiftRA)
 14946  		v.AuxInt = ssa.Int64ToAuxInt(c)
 14947  		v.AddArg(y)
 14948  		return true
 14949  	}
 14950  	// match: (MVN x:(RORconst [c] y))
 14951  	// cond: ssa.ClobberIfDead(x)
 14952  	// result: (MVNshiftRO [c] y)
 14953  	for {
 14954  		x := v_0
 14955  		if x.Op != ssaop.OpARM64RORconst {
 14956  			break
 14957  		}
 14958  		c := ssa.AuxIntToInt64(x.AuxInt)
 14959  		y := x.Args[0]
 14960  		if !(ssa.ClobberIfDead(x)) {
 14961  			break
 14962  		}
 14963  		v.Reset(ssaop.OpARM64MVNshiftRO)
 14964  		v.AuxInt = ssa.Int64ToAuxInt(c)
 14965  		v.AddArg(y)
 14966  		return true
 14967  	}
 14968  	return false
 14969  }
 14970  func rewriteValue_OpARM64MVNshiftLL(v *ssa.Value) bool {
 14971  	v_0 := v.Args[0]
 14972  	// match: (MVNshiftLL (MOVDconst [c]) [d])
 14973  	// result: (MOVDconst [^int64(uint64(c)<<uint64(d))])
 14974  	for {
 14975  		d := ssa.AuxIntToInt64(v.AuxInt)
 14976  		if v_0.Op != ssaop.OpARM64MOVDconst {
 14977  			break
 14978  		}
 14979  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 14980  		v.Reset(ssaop.OpARM64MOVDconst)
 14981  		v.AuxInt = ssa.Int64ToAuxInt(^int64(uint64(c) << uint64(d)))
 14982  		return true
 14983  	}
 14984  	return false
 14985  }
 14986  func rewriteValue_OpARM64MVNshiftRA(v *ssa.Value) bool {
 14987  	v_0 := v.Args[0]
 14988  	// match: (MVNshiftRA (MOVDconst [c]) [d])
 14989  	// result: (MOVDconst [^(c>>uint64(d))])
 14990  	for {
 14991  		d := ssa.AuxIntToInt64(v.AuxInt)
 14992  		if v_0.Op != ssaop.OpARM64MOVDconst {
 14993  			break
 14994  		}
 14995  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 14996  		v.Reset(ssaop.OpARM64MOVDconst)
 14997  		v.AuxInt = ssa.Int64ToAuxInt(^(c >> uint64(d)))
 14998  		return true
 14999  	}
 15000  	return false
 15001  }
 15002  func rewriteValue_OpARM64MVNshiftRL(v *ssa.Value) bool {
 15003  	v_0 := v.Args[0]
 15004  	// match: (MVNshiftRL (MOVDconst [c]) [d])
 15005  	// result: (MOVDconst [^int64(uint64(c)>>uint64(d))])
 15006  	for {
 15007  		d := ssa.AuxIntToInt64(v.AuxInt)
 15008  		if v_0.Op != ssaop.OpARM64MOVDconst {
 15009  			break
 15010  		}
 15011  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 15012  		v.Reset(ssaop.OpARM64MOVDconst)
 15013  		v.AuxInt = ssa.Int64ToAuxInt(^int64(uint64(c) >> uint64(d)))
 15014  		return true
 15015  	}
 15016  	return false
 15017  }
 15018  func rewriteValue_OpARM64MVNshiftRO(v *ssa.Value) bool {
 15019  	v_0 := v.Args[0]
 15020  	// match: (MVNshiftRO (MOVDconst [c]) [d])
 15021  	// result: (MOVDconst [^rotateRight64(c, d)])
 15022  	for {
 15023  		d := ssa.AuxIntToInt64(v.AuxInt)
 15024  		if v_0.Op != ssaop.OpARM64MOVDconst {
 15025  			break
 15026  		}
 15027  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 15028  		v.Reset(ssaop.OpARM64MOVDconst)
 15029  		v.AuxInt = ssa.Int64ToAuxInt(^rotateRight64(c, d))
 15030  		return true
 15031  	}
 15032  	return false
 15033  }
 15034  func rewriteValue_OpARM64NEG(v *ssa.Value) bool {
 15035  	v_0 := v.Args[0]
 15036  	// match: (NEG (MUL x y))
 15037  	// result: (MNEG x y)
 15038  	for {
 15039  		if v_0.Op != ssaop.OpARM64MUL {
 15040  			break
 15041  		}
 15042  		y := v_0.Args[1]
 15043  		x := v_0.Args[0]
 15044  		v.Reset(ssaop.OpARM64MNEG)
 15045  		v.AddArg2(x, y)
 15046  		return true
 15047  	}
 15048  	// match: (NEG (MULW x y))
 15049  	// cond: v.Type.Size() <= 4
 15050  	// result: (MNEGW x y)
 15051  	for {
 15052  		if v_0.Op != ssaop.OpARM64MULW {
 15053  			break
 15054  		}
 15055  		y := v_0.Args[1]
 15056  		x := v_0.Args[0]
 15057  		if !(v.Type.Size() <= 4) {
 15058  			break
 15059  		}
 15060  		v.Reset(ssaop.OpARM64MNEGW)
 15061  		v.AddArg2(x, y)
 15062  		return true
 15063  	}
 15064  	// match: (NEG (SUB x y))
 15065  	// result: (SUB y x)
 15066  	for {
 15067  		if v_0.Op != ssaop.OpARM64SUB {
 15068  			break
 15069  		}
 15070  		y := v_0.Args[1]
 15071  		x := v_0.Args[0]
 15072  		v.Reset(ssaop.OpARM64SUB)
 15073  		v.AddArg2(y, x)
 15074  		return true
 15075  	}
 15076  	// match: (NEG (NEG x))
 15077  	// result: x
 15078  	for {
 15079  		if v_0.Op != ssaop.OpARM64NEG {
 15080  			break
 15081  		}
 15082  		x := v_0.Args[0]
 15083  		v.CopyOf(x)
 15084  		return true
 15085  	}
 15086  	// match: (NEG (MOVDconst [c]))
 15087  	// result: (MOVDconst [-c])
 15088  	for {
 15089  		if v_0.Op != ssaop.OpARM64MOVDconst {
 15090  			break
 15091  		}
 15092  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 15093  		v.Reset(ssaop.OpARM64MOVDconst)
 15094  		v.AuxInt = ssa.Int64ToAuxInt(-c)
 15095  		return true
 15096  	}
 15097  	// match: (NEG x:(SLLconst [c] y))
 15098  	// cond: ssa.ClobberIfDead(x)
 15099  	// result: (NEGshiftLL [c] y)
 15100  	for {
 15101  		x := v_0
 15102  		if x.Op != ssaop.OpARM64SLLconst {
 15103  			break
 15104  		}
 15105  		c := ssa.AuxIntToInt64(x.AuxInt)
 15106  		y := x.Args[0]
 15107  		if !(ssa.ClobberIfDead(x)) {
 15108  			break
 15109  		}
 15110  		v.Reset(ssaop.OpARM64NEGshiftLL)
 15111  		v.AuxInt = ssa.Int64ToAuxInt(c)
 15112  		v.AddArg(y)
 15113  		return true
 15114  	}
 15115  	// match: (NEG x:(SRLconst [c] y))
 15116  	// cond: ssa.ClobberIfDead(x)
 15117  	// result: (NEGshiftRL [c] y)
 15118  	for {
 15119  		x := v_0
 15120  		if x.Op != ssaop.OpARM64SRLconst {
 15121  			break
 15122  		}
 15123  		c := ssa.AuxIntToInt64(x.AuxInt)
 15124  		y := x.Args[0]
 15125  		if !(ssa.ClobberIfDead(x)) {
 15126  			break
 15127  		}
 15128  		v.Reset(ssaop.OpARM64NEGshiftRL)
 15129  		v.AuxInt = ssa.Int64ToAuxInt(c)
 15130  		v.AddArg(y)
 15131  		return true
 15132  	}
 15133  	// match: (NEG x:(SRAconst [c] y))
 15134  	// cond: ssa.ClobberIfDead(x)
 15135  	// result: (NEGshiftRA [c] y)
 15136  	for {
 15137  		x := v_0
 15138  		if x.Op != ssaop.OpARM64SRAconst {
 15139  			break
 15140  		}
 15141  		c := ssa.AuxIntToInt64(x.AuxInt)
 15142  		y := x.Args[0]
 15143  		if !(ssa.ClobberIfDead(x)) {
 15144  			break
 15145  		}
 15146  		v.Reset(ssaop.OpARM64NEGshiftRA)
 15147  		v.AuxInt = ssa.Int64ToAuxInt(c)
 15148  		v.AddArg(y)
 15149  		return true
 15150  	}
 15151  	return false
 15152  }
 15153  func rewriteValue_OpARM64NEGshiftLL(v *ssa.Value) bool {
 15154  	v_0 := v.Args[0]
 15155  	// match: (NEGshiftLL (MOVDconst [c]) [d])
 15156  	// result: (MOVDconst [-int64(uint64(c)<<uint64(d))])
 15157  	for {
 15158  		d := ssa.AuxIntToInt64(v.AuxInt)
 15159  		if v_0.Op != ssaop.OpARM64MOVDconst {
 15160  			break
 15161  		}
 15162  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 15163  		v.Reset(ssaop.OpARM64MOVDconst)
 15164  		v.AuxInt = ssa.Int64ToAuxInt(-int64(uint64(c) << uint64(d)))
 15165  		return true
 15166  	}
 15167  	return false
 15168  }
 15169  func rewriteValue_OpARM64NEGshiftRA(v *ssa.Value) bool {
 15170  	v_0 := v.Args[0]
 15171  	// match: (NEGshiftRA (MOVDconst [c]) [d])
 15172  	// result: (MOVDconst [-(c>>uint64(d))])
 15173  	for {
 15174  		d := ssa.AuxIntToInt64(v.AuxInt)
 15175  		if v_0.Op != ssaop.OpARM64MOVDconst {
 15176  			break
 15177  		}
 15178  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 15179  		v.Reset(ssaop.OpARM64MOVDconst)
 15180  		v.AuxInt = ssa.Int64ToAuxInt(-(c >> uint64(d)))
 15181  		return true
 15182  	}
 15183  	return false
 15184  }
 15185  func rewriteValue_OpARM64NEGshiftRL(v *ssa.Value) bool {
 15186  	v_0 := v.Args[0]
 15187  	// match: (NEGshiftRL (MOVDconst [c]) [d])
 15188  	// result: (MOVDconst [-int64(uint64(c)>>uint64(d))])
 15189  	for {
 15190  		d := ssa.AuxIntToInt64(v.AuxInt)
 15191  		if v_0.Op != ssaop.OpARM64MOVDconst {
 15192  			break
 15193  		}
 15194  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 15195  		v.Reset(ssaop.OpARM64MOVDconst)
 15196  		v.AuxInt = ssa.Int64ToAuxInt(-int64(uint64(c) >> uint64(d)))
 15197  		return true
 15198  	}
 15199  	return false
 15200  }
 15201  func rewriteValue_OpARM64NotEqual(v *ssa.Value) bool {
 15202  	v_0 := v.Args[0]
 15203  	b := v.Block
 15204  	// match: (NotEqual (CMPconst [0] z:(AND x y)))
 15205  	// cond: z.Uses == 1
 15206  	// result: (NotEqual (TST x y))
 15207  	for {
 15208  		if v_0.Op != ssaop.OpARM64CMPconst || ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
 15209  			break
 15210  		}
 15211  		z := v_0.Args[0]
 15212  		if z.Op != ssaop.OpARM64AND {
 15213  			break
 15214  		}
 15215  		y := z.Args[1]
 15216  		x := z.Args[0]
 15217  		if !(z.Uses == 1) {
 15218  			break
 15219  		}
 15220  		v.Reset(ssaop.OpARM64NotEqual)
 15221  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64TST, types.TypeFlags)
 15222  		v0.AddArg2(x, y)
 15223  		v.AddArg(v0)
 15224  		return true
 15225  	}
 15226  	// match: (NotEqual (CMPWconst [0] x:(ANDconst [c] y)))
 15227  	// cond: x.Uses == 1
 15228  	// result: (NotEqual (TSTWconst [int32(c)] y))
 15229  	for {
 15230  		if v_0.Op != ssaop.OpARM64CMPWconst || ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
 15231  			break
 15232  		}
 15233  		x := v_0.Args[0]
 15234  		if x.Op != ssaop.OpARM64ANDconst {
 15235  			break
 15236  		}
 15237  		c := ssa.AuxIntToInt64(x.AuxInt)
 15238  		y := x.Args[0]
 15239  		if !(x.Uses == 1) {
 15240  			break
 15241  		}
 15242  		v.Reset(ssaop.OpARM64NotEqual)
 15243  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64TSTWconst, types.TypeFlags)
 15244  		v0.AuxInt = ssa.Int32ToAuxInt(int32(c))
 15245  		v0.AddArg(y)
 15246  		v.AddArg(v0)
 15247  		return true
 15248  	}
 15249  	// match: (NotEqual (CMPWconst [0] z:(AND x y)))
 15250  	// cond: z.Uses == 1
 15251  	// result: (NotEqual (TSTW x y))
 15252  	for {
 15253  		if v_0.Op != ssaop.OpARM64CMPWconst || ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
 15254  			break
 15255  		}
 15256  		z := v_0.Args[0]
 15257  		if z.Op != ssaop.OpARM64AND {
 15258  			break
 15259  		}
 15260  		y := z.Args[1]
 15261  		x := z.Args[0]
 15262  		if !(z.Uses == 1) {
 15263  			break
 15264  		}
 15265  		v.Reset(ssaop.OpARM64NotEqual)
 15266  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64TSTW, types.TypeFlags)
 15267  		v0.AddArg2(x, y)
 15268  		v.AddArg(v0)
 15269  		return true
 15270  	}
 15271  	// match: (NotEqual (CMPconst [0] x:(ANDconst [c] y)))
 15272  	// cond: x.Uses == 1
 15273  	// result: (NotEqual (TSTconst [c] y))
 15274  	for {
 15275  		if v_0.Op != ssaop.OpARM64CMPconst || ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
 15276  			break
 15277  		}
 15278  		x := v_0.Args[0]
 15279  		if x.Op != ssaop.OpARM64ANDconst {
 15280  			break
 15281  		}
 15282  		c := ssa.AuxIntToInt64(x.AuxInt)
 15283  		y := x.Args[0]
 15284  		if !(x.Uses == 1) {
 15285  			break
 15286  		}
 15287  		v.Reset(ssaop.OpARM64NotEqual)
 15288  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64TSTconst, types.TypeFlags)
 15289  		v0.AuxInt = ssa.Int64ToAuxInt(c)
 15290  		v0.AddArg(y)
 15291  		v.AddArg(v0)
 15292  		return true
 15293  	}
 15294  	// match: (NotEqual (CMP x z:(NEG y)))
 15295  	// cond: z.Uses == 1
 15296  	// result: (NotEqual (CMN x y))
 15297  	for {
 15298  		if v_0.Op != ssaop.OpARM64CMP {
 15299  			break
 15300  		}
 15301  		_ = v_0.Args[1]
 15302  		x := v_0.Args[0]
 15303  		z := v_0.Args[1]
 15304  		if z.Op != ssaop.OpARM64NEG {
 15305  			break
 15306  		}
 15307  		y := z.Args[0]
 15308  		if !(z.Uses == 1) {
 15309  			break
 15310  		}
 15311  		v.Reset(ssaop.OpARM64NotEqual)
 15312  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMN, types.TypeFlags)
 15313  		v0.AddArg2(x, y)
 15314  		v.AddArg(v0)
 15315  		return true
 15316  	}
 15317  	// match: (NotEqual (CMPW x z:(NEG y)))
 15318  	// cond: z.Uses == 1
 15319  	// result: (NotEqual (CMNW x y))
 15320  	for {
 15321  		if v_0.Op != ssaop.OpARM64CMPW {
 15322  			break
 15323  		}
 15324  		_ = v_0.Args[1]
 15325  		x := v_0.Args[0]
 15326  		z := v_0.Args[1]
 15327  		if z.Op != ssaop.OpARM64NEG {
 15328  			break
 15329  		}
 15330  		y := z.Args[0]
 15331  		if !(z.Uses == 1) {
 15332  			break
 15333  		}
 15334  		v.Reset(ssaop.OpARM64NotEqual)
 15335  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMNW, types.TypeFlags)
 15336  		v0.AddArg2(x, y)
 15337  		v.AddArg(v0)
 15338  		return true
 15339  	}
 15340  	// match: (NotEqual (CMPconst [0] x:(ADDconst [c] y)))
 15341  	// cond: x.Uses == 1
 15342  	// result: (NotEqual (CMNconst [c] y))
 15343  	for {
 15344  		if v_0.Op != ssaop.OpARM64CMPconst || ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
 15345  			break
 15346  		}
 15347  		x := v_0.Args[0]
 15348  		if x.Op != ssaop.OpARM64ADDconst {
 15349  			break
 15350  		}
 15351  		c := ssa.AuxIntToInt64(x.AuxInt)
 15352  		y := x.Args[0]
 15353  		if !(x.Uses == 1) {
 15354  			break
 15355  		}
 15356  		v.Reset(ssaop.OpARM64NotEqual)
 15357  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMNconst, types.TypeFlags)
 15358  		v0.AuxInt = ssa.Int64ToAuxInt(c)
 15359  		v0.AddArg(y)
 15360  		v.AddArg(v0)
 15361  		return true
 15362  	}
 15363  	// match: (NotEqual (CMPWconst [0] x:(ADDconst [c] y)))
 15364  	// cond: x.Uses == 1
 15365  	// result: (NotEqual (CMNWconst [int32(c)] y))
 15366  	for {
 15367  		if v_0.Op != ssaop.OpARM64CMPWconst || ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
 15368  			break
 15369  		}
 15370  		x := v_0.Args[0]
 15371  		if x.Op != ssaop.OpARM64ADDconst {
 15372  			break
 15373  		}
 15374  		c := ssa.AuxIntToInt64(x.AuxInt)
 15375  		y := x.Args[0]
 15376  		if !(x.Uses == 1) {
 15377  			break
 15378  		}
 15379  		v.Reset(ssaop.OpARM64NotEqual)
 15380  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMNWconst, types.TypeFlags)
 15381  		v0.AuxInt = ssa.Int32ToAuxInt(int32(c))
 15382  		v0.AddArg(y)
 15383  		v.AddArg(v0)
 15384  		return true
 15385  	}
 15386  	// match: (NotEqual (CMPconst [0] z:(ADD x y)))
 15387  	// cond: z.Uses == 1
 15388  	// result: (NotEqual (CMN x y))
 15389  	for {
 15390  		if v_0.Op != ssaop.OpARM64CMPconst || ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
 15391  			break
 15392  		}
 15393  		z := v_0.Args[0]
 15394  		if z.Op != ssaop.OpARM64ADD {
 15395  			break
 15396  		}
 15397  		y := z.Args[1]
 15398  		x := z.Args[0]
 15399  		if !(z.Uses == 1) {
 15400  			break
 15401  		}
 15402  		v.Reset(ssaop.OpARM64NotEqual)
 15403  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMN, types.TypeFlags)
 15404  		v0.AddArg2(x, y)
 15405  		v.AddArg(v0)
 15406  		return true
 15407  	}
 15408  	// match: (NotEqual (CMPWconst [0] z:(ADD x y)))
 15409  	// cond: z.Uses == 1
 15410  	// result: (NotEqual (CMNW x y))
 15411  	for {
 15412  		if v_0.Op != ssaop.OpARM64CMPWconst || ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
 15413  			break
 15414  		}
 15415  		z := v_0.Args[0]
 15416  		if z.Op != ssaop.OpARM64ADD {
 15417  			break
 15418  		}
 15419  		y := z.Args[1]
 15420  		x := z.Args[0]
 15421  		if !(z.Uses == 1) {
 15422  			break
 15423  		}
 15424  		v.Reset(ssaop.OpARM64NotEqual)
 15425  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMNW, types.TypeFlags)
 15426  		v0.AddArg2(x, y)
 15427  		v.AddArg(v0)
 15428  		return true
 15429  	}
 15430  	// match: (NotEqual (CMPconst [0] z:(MADD a x y)))
 15431  	// cond: z.Uses == 1
 15432  	// result: (NotEqual (CMN a (MUL <x.Type> x y)))
 15433  	for {
 15434  		if v_0.Op != ssaop.OpARM64CMPconst || ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
 15435  			break
 15436  		}
 15437  		z := v_0.Args[0]
 15438  		if z.Op != ssaop.OpARM64MADD {
 15439  			break
 15440  		}
 15441  		y := z.Args[2]
 15442  		a := z.Args[0]
 15443  		x := z.Args[1]
 15444  		if !(z.Uses == 1) {
 15445  			break
 15446  		}
 15447  		v.Reset(ssaop.OpARM64NotEqual)
 15448  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMN, types.TypeFlags)
 15449  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64MUL, x.Type)
 15450  		v1.AddArg2(x, y)
 15451  		v0.AddArg2(a, v1)
 15452  		v.AddArg(v0)
 15453  		return true
 15454  	}
 15455  	// match: (NotEqual (CMPWconst [0] z:(MADDW a x y)))
 15456  	// cond: z.Uses == 1
 15457  	// result: (NotEqual (CMNW a (MULW <x.Type> x y)))
 15458  	for {
 15459  		if v_0.Op != ssaop.OpARM64CMPWconst || ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
 15460  			break
 15461  		}
 15462  		z := v_0.Args[0]
 15463  		if z.Op != ssaop.OpARM64MADDW {
 15464  			break
 15465  		}
 15466  		y := z.Args[2]
 15467  		a := z.Args[0]
 15468  		x := z.Args[1]
 15469  		if !(z.Uses == 1) {
 15470  			break
 15471  		}
 15472  		v.Reset(ssaop.OpARM64NotEqual)
 15473  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMNW, types.TypeFlags)
 15474  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64MULW, x.Type)
 15475  		v1.AddArg2(x, y)
 15476  		v0.AddArg2(a, v1)
 15477  		v.AddArg(v0)
 15478  		return true
 15479  	}
 15480  	// match: (NotEqual (CMPconst [0] z:(MSUB a x y)))
 15481  	// cond: z.Uses == 1
 15482  	// result: (NotEqual (CMP a (MUL <x.Type> x y)))
 15483  	for {
 15484  		if v_0.Op != ssaop.OpARM64CMPconst || ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
 15485  			break
 15486  		}
 15487  		z := v_0.Args[0]
 15488  		if z.Op != ssaop.OpARM64MSUB {
 15489  			break
 15490  		}
 15491  		y := z.Args[2]
 15492  		a := z.Args[0]
 15493  		x := z.Args[1]
 15494  		if !(z.Uses == 1) {
 15495  			break
 15496  		}
 15497  		v.Reset(ssaop.OpARM64NotEqual)
 15498  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMP, types.TypeFlags)
 15499  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64MUL, x.Type)
 15500  		v1.AddArg2(x, y)
 15501  		v0.AddArg2(a, v1)
 15502  		v.AddArg(v0)
 15503  		return true
 15504  	}
 15505  	// match: (NotEqual (CMPWconst [0] z:(MSUBW a x y)))
 15506  	// cond: z.Uses == 1
 15507  	// result: (NotEqual (CMPW a (MULW <x.Type> x y)))
 15508  	for {
 15509  		if v_0.Op != ssaop.OpARM64CMPWconst || ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
 15510  			break
 15511  		}
 15512  		z := v_0.Args[0]
 15513  		if z.Op != ssaop.OpARM64MSUBW {
 15514  			break
 15515  		}
 15516  		y := z.Args[2]
 15517  		a := z.Args[0]
 15518  		x := z.Args[1]
 15519  		if !(z.Uses == 1) {
 15520  			break
 15521  		}
 15522  		v.Reset(ssaop.OpARM64NotEqual)
 15523  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMPW, types.TypeFlags)
 15524  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64MULW, x.Type)
 15525  		v1.AddArg2(x, y)
 15526  		v0.AddArg2(a, v1)
 15527  		v.AddArg(v0)
 15528  		return true
 15529  	}
 15530  	// match: (NotEqual (FlagConstant [fc]))
 15531  	// result: (MOVDconst [ssa.B2i(fc.Ne())])
 15532  	for {
 15533  		if v_0.Op != ssaop.OpARM64FlagConstant {
 15534  			break
 15535  		}
 15536  		fc := ssa.AuxIntToFlagConstant(v_0.AuxInt)
 15537  		v.Reset(ssaop.OpARM64MOVDconst)
 15538  		v.AuxInt = ssa.Int64ToAuxInt(ssa.B2i(fc.Ne()))
 15539  		return true
 15540  	}
 15541  	// match: (NotEqual (InvertFlags x))
 15542  	// result: (NotEqual x)
 15543  	for {
 15544  		if v_0.Op != ssaop.OpARM64InvertFlags {
 15545  			break
 15546  		}
 15547  		x := v_0.Args[0]
 15548  		v.Reset(ssaop.OpARM64NotEqual)
 15549  		v.AddArg(x)
 15550  		return true
 15551  	}
 15552  	return false
 15553  }
 15554  func rewriteValue_OpARM64OR(v *ssa.Value) bool {
 15555  	v_1 := v.Args[1]
 15556  	v_0 := v.Args[0]
 15557  	// match: (OR x (MOVDconst [c]))
 15558  	// result: (ORconst [c] x)
 15559  	for {
 15560  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 15561  			x := v_0
 15562  			if v_1.Op != ssaop.OpARM64MOVDconst {
 15563  				continue
 15564  			}
 15565  			c := ssa.AuxIntToInt64(v_1.AuxInt)
 15566  			v.Reset(ssaop.OpARM64ORconst)
 15567  			v.AuxInt = ssa.Int64ToAuxInt(c)
 15568  			v.AddArg(x)
 15569  			return true
 15570  		}
 15571  		break
 15572  	}
 15573  	// match: (OR x x)
 15574  	// result: x
 15575  	for {
 15576  		x := v_0
 15577  		if x != v_1 {
 15578  			break
 15579  		}
 15580  		v.CopyOf(x)
 15581  		return true
 15582  	}
 15583  	// match: (OR x (MVN y))
 15584  	// result: (ORN x y)
 15585  	for {
 15586  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 15587  			x := v_0
 15588  			if v_1.Op != ssaop.OpARM64MVN {
 15589  				continue
 15590  			}
 15591  			y := v_1.Args[0]
 15592  			v.Reset(ssaop.OpARM64ORN)
 15593  			v.AddArg2(x, y)
 15594  			return true
 15595  		}
 15596  		break
 15597  	}
 15598  	// match: (OR x0 x1:(SLLconst [c] y))
 15599  	// cond: ssa.ClobberIfDead(x1)
 15600  	// result: (ORshiftLL x0 y [c])
 15601  	for {
 15602  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 15603  			x0 := v_0
 15604  			x1 := v_1
 15605  			if x1.Op != ssaop.OpARM64SLLconst {
 15606  				continue
 15607  			}
 15608  			c := ssa.AuxIntToInt64(x1.AuxInt)
 15609  			y := x1.Args[0]
 15610  			if !(ssa.ClobberIfDead(x1)) {
 15611  				continue
 15612  			}
 15613  			v.Reset(ssaop.OpARM64ORshiftLL)
 15614  			v.AuxInt = ssa.Int64ToAuxInt(c)
 15615  			v.AddArg2(x0, y)
 15616  			return true
 15617  		}
 15618  		break
 15619  	}
 15620  	// match: (OR x0 x1:(SRLconst [c] y))
 15621  	// cond: ssa.ClobberIfDead(x1)
 15622  	// result: (ORshiftRL x0 y [c])
 15623  	for {
 15624  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 15625  			x0 := v_0
 15626  			x1 := v_1
 15627  			if x1.Op != ssaop.OpARM64SRLconst {
 15628  				continue
 15629  			}
 15630  			c := ssa.AuxIntToInt64(x1.AuxInt)
 15631  			y := x1.Args[0]
 15632  			if !(ssa.ClobberIfDead(x1)) {
 15633  				continue
 15634  			}
 15635  			v.Reset(ssaop.OpARM64ORshiftRL)
 15636  			v.AuxInt = ssa.Int64ToAuxInt(c)
 15637  			v.AddArg2(x0, y)
 15638  			return true
 15639  		}
 15640  		break
 15641  	}
 15642  	// match: (OR x0 x1:(SRAconst [c] y))
 15643  	// cond: ssa.ClobberIfDead(x1)
 15644  	// result: (ORshiftRA x0 y [c])
 15645  	for {
 15646  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 15647  			x0 := v_0
 15648  			x1 := v_1
 15649  			if x1.Op != ssaop.OpARM64SRAconst {
 15650  				continue
 15651  			}
 15652  			c := ssa.AuxIntToInt64(x1.AuxInt)
 15653  			y := x1.Args[0]
 15654  			if !(ssa.ClobberIfDead(x1)) {
 15655  				continue
 15656  			}
 15657  			v.Reset(ssaop.OpARM64ORshiftRA)
 15658  			v.AuxInt = ssa.Int64ToAuxInt(c)
 15659  			v.AddArg2(x0, y)
 15660  			return true
 15661  		}
 15662  		break
 15663  	}
 15664  	// match: (OR x0 x1:(RORconst [c] y))
 15665  	// cond: ssa.ClobberIfDead(x1)
 15666  	// result: (ORshiftRO x0 y [c])
 15667  	for {
 15668  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 15669  			x0 := v_0
 15670  			x1 := v_1
 15671  			if x1.Op != ssaop.OpARM64RORconst {
 15672  				continue
 15673  			}
 15674  			c := ssa.AuxIntToInt64(x1.AuxInt)
 15675  			y := x1.Args[0]
 15676  			if !(ssa.ClobberIfDead(x1)) {
 15677  				continue
 15678  			}
 15679  			v.Reset(ssaop.OpARM64ORshiftRO)
 15680  			v.AuxInt = ssa.Int64ToAuxInt(c)
 15681  			v.AddArg2(x0, y)
 15682  			return true
 15683  		}
 15684  		break
 15685  	}
 15686  	// match: (OR (UBFIZ [bfc] x) (ANDconst [ac] y))
 15687  	// cond: ac == ^((1<<uint(bfc.Width())-1) << uint(bfc.Lsb()))
 15688  	// result: (BFI [bfc] y x)
 15689  	for {
 15690  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 15691  			if v_0.Op != ssaop.OpARM64UBFIZ {
 15692  				continue
 15693  			}
 15694  			bfc := ssa.AuxIntToArm64BitField(v_0.AuxInt)
 15695  			x := v_0.Args[0]
 15696  			if v_1.Op != ssaop.OpARM64ANDconst {
 15697  				continue
 15698  			}
 15699  			ac := ssa.AuxIntToInt64(v_1.AuxInt)
 15700  			y := v_1.Args[0]
 15701  			if !(ac == ^((1<<uint(bfc.Width()) - 1) << uint(bfc.Lsb()))) {
 15702  				continue
 15703  			}
 15704  			v.Reset(ssaop.OpARM64BFI)
 15705  			v.AuxInt = ssa.Arm64BitFieldToAuxInt(bfc)
 15706  			v.AddArg2(y, x)
 15707  			return true
 15708  		}
 15709  		break
 15710  	}
 15711  	// match: (OR (UBFX [bfc] x) (ANDconst [ac] y))
 15712  	// cond: ac == ^(1<<uint(bfc.Width())-1)
 15713  	// result: (BFXIL [bfc] y x)
 15714  	for {
 15715  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 15716  			if v_0.Op != ssaop.OpARM64UBFX {
 15717  				continue
 15718  			}
 15719  			bfc := ssa.AuxIntToArm64BitField(v_0.AuxInt)
 15720  			x := v_0.Args[0]
 15721  			if v_1.Op != ssaop.OpARM64ANDconst {
 15722  				continue
 15723  			}
 15724  			ac := ssa.AuxIntToInt64(v_1.AuxInt)
 15725  			y := v_1.Args[0]
 15726  			if !(ac == ^(1<<uint(bfc.Width()) - 1)) {
 15727  				continue
 15728  			}
 15729  			v.Reset(ssaop.OpARM64BFXIL)
 15730  			v.AuxInt = ssa.Arm64BitFieldToAuxInt(bfc)
 15731  			v.AddArg2(y, x)
 15732  			return true
 15733  		}
 15734  		break
 15735  	}
 15736  	return false
 15737  }
 15738  func rewriteValue_OpARM64ORN(v *ssa.Value) bool {
 15739  	v_1 := v.Args[1]
 15740  	v_0 := v.Args[0]
 15741  	// match: (ORN x (MOVDconst [c]))
 15742  	// result: (ORconst [^c] x)
 15743  	for {
 15744  		x := v_0
 15745  		if v_1.Op != ssaop.OpARM64MOVDconst {
 15746  			break
 15747  		}
 15748  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 15749  		v.Reset(ssaop.OpARM64ORconst)
 15750  		v.AuxInt = ssa.Int64ToAuxInt(^c)
 15751  		v.AddArg(x)
 15752  		return true
 15753  	}
 15754  	// match: (ORN x x)
 15755  	// result: (MOVDconst [-1])
 15756  	for {
 15757  		x := v_0
 15758  		if x != v_1 {
 15759  			break
 15760  		}
 15761  		v.Reset(ssaop.OpARM64MOVDconst)
 15762  		v.AuxInt = ssa.Int64ToAuxInt(-1)
 15763  		return true
 15764  	}
 15765  	// match: (ORN x0 x1:(SLLconst [c] y))
 15766  	// cond: ssa.ClobberIfDead(x1)
 15767  	// result: (ORNshiftLL x0 y [c])
 15768  	for {
 15769  		x0 := v_0
 15770  		x1 := v_1
 15771  		if x1.Op != ssaop.OpARM64SLLconst {
 15772  			break
 15773  		}
 15774  		c := ssa.AuxIntToInt64(x1.AuxInt)
 15775  		y := x1.Args[0]
 15776  		if !(ssa.ClobberIfDead(x1)) {
 15777  			break
 15778  		}
 15779  		v.Reset(ssaop.OpARM64ORNshiftLL)
 15780  		v.AuxInt = ssa.Int64ToAuxInt(c)
 15781  		v.AddArg2(x0, y)
 15782  		return true
 15783  	}
 15784  	// match: (ORN x0 x1:(SRLconst [c] y))
 15785  	// cond: ssa.ClobberIfDead(x1)
 15786  	// result: (ORNshiftRL x0 y [c])
 15787  	for {
 15788  		x0 := v_0
 15789  		x1 := v_1
 15790  		if x1.Op != ssaop.OpARM64SRLconst {
 15791  			break
 15792  		}
 15793  		c := ssa.AuxIntToInt64(x1.AuxInt)
 15794  		y := x1.Args[0]
 15795  		if !(ssa.ClobberIfDead(x1)) {
 15796  			break
 15797  		}
 15798  		v.Reset(ssaop.OpARM64ORNshiftRL)
 15799  		v.AuxInt = ssa.Int64ToAuxInt(c)
 15800  		v.AddArg2(x0, y)
 15801  		return true
 15802  	}
 15803  	// match: (ORN x0 x1:(SRAconst [c] y))
 15804  	// cond: ssa.ClobberIfDead(x1)
 15805  	// result: (ORNshiftRA x0 y [c])
 15806  	for {
 15807  		x0 := v_0
 15808  		x1 := v_1
 15809  		if x1.Op != ssaop.OpARM64SRAconst {
 15810  			break
 15811  		}
 15812  		c := ssa.AuxIntToInt64(x1.AuxInt)
 15813  		y := x1.Args[0]
 15814  		if !(ssa.ClobberIfDead(x1)) {
 15815  			break
 15816  		}
 15817  		v.Reset(ssaop.OpARM64ORNshiftRA)
 15818  		v.AuxInt = ssa.Int64ToAuxInt(c)
 15819  		v.AddArg2(x0, y)
 15820  		return true
 15821  	}
 15822  	// match: (ORN x0 x1:(RORconst [c] y))
 15823  	// cond: ssa.ClobberIfDead(x1)
 15824  	// result: (ORNshiftRO x0 y [c])
 15825  	for {
 15826  		x0 := v_0
 15827  		x1 := v_1
 15828  		if x1.Op != ssaop.OpARM64RORconst {
 15829  			break
 15830  		}
 15831  		c := ssa.AuxIntToInt64(x1.AuxInt)
 15832  		y := x1.Args[0]
 15833  		if !(ssa.ClobberIfDead(x1)) {
 15834  			break
 15835  		}
 15836  		v.Reset(ssaop.OpARM64ORNshiftRO)
 15837  		v.AuxInt = ssa.Int64ToAuxInt(c)
 15838  		v.AddArg2(x0, y)
 15839  		return true
 15840  	}
 15841  	return false
 15842  }
 15843  func rewriteValue_OpARM64ORNshiftLL(v *ssa.Value) bool {
 15844  	v_1 := v.Args[1]
 15845  	v_0 := v.Args[0]
 15846  	// match: (ORNshiftLL x (MOVDconst [c]) [d])
 15847  	// result: (ORconst x [^int64(uint64(c)<<uint64(d))])
 15848  	for {
 15849  		d := ssa.AuxIntToInt64(v.AuxInt)
 15850  		x := v_0
 15851  		if v_1.Op != ssaop.OpARM64MOVDconst {
 15852  			break
 15853  		}
 15854  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 15855  		v.Reset(ssaop.OpARM64ORconst)
 15856  		v.AuxInt = ssa.Int64ToAuxInt(^int64(uint64(c) << uint64(d)))
 15857  		v.AddArg(x)
 15858  		return true
 15859  	}
 15860  	// match: (ORNshiftLL (SLLconst x [c]) x [c])
 15861  	// result: (MOVDconst [-1])
 15862  	for {
 15863  		c := ssa.AuxIntToInt64(v.AuxInt)
 15864  		if v_0.Op != ssaop.OpARM64SLLconst || ssa.AuxIntToInt64(v_0.AuxInt) != c {
 15865  			break
 15866  		}
 15867  		x := v_0.Args[0]
 15868  		if x != v_1 {
 15869  			break
 15870  		}
 15871  		v.Reset(ssaop.OpARM64MOVDconst)
 15872  		v.AuxInt = ssa.Int64ToAuxInt(-1)
 15873  		return true
 15874  	}
 15875  	return false
 15876  }
 15877  func rewriteValue_OpARM64ORNshiftRA(v *ssa.Value) bool {
 15878  	v_1 := v.Args[1]
 15879  	v_0 := v.Args[0]
 15880  	// match: (ORNshiftRA x (MOVDconst [c]) [d])
 15881  	// result: (ORconst x [^(c>>uint64(d))])
 15882  	for {
 15883  		d := ssa.AuxIntToInt64(v.AuxInt)
 15884  		x := v_0
 15885  		if v_1.Op != ssaop.OpARM64MOVDconst {
 15886  			break
 15887  		}
 15888  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 15889  		v.Reset(ssaop.OpARM64ORconst)
 15890  		v.AuxInt = ssa.Int64ToAuxInt(^(c >> uint64(d)))
 15891  		v.AddArg(x)
 15892  		return true
 15893  	}
 15894  	// match: (ORNshiftRA (SRAconst x [c]) x [c])
 15895  	// result: (MOVDconst [-1])
 15896  	for {
 15897  		c := ssa.AuxIntToInt64(v.AuxInt)
 15898  		if v_0.Op != ssaop.OpARM64SRAconst || ssa.AuxIntToInt64(v_0.AuxInt) != c {
 15899  			break
 15900  		}
 15901  		x := v_0.Args[0]
 15902  		if x != v_1 {
 15903  			break
 15904  		}
 15905  		v.Reset(ssaop.OpARM64MOVDconst)
 15906  		v.AuxInt = ssa.Int64ToAuxInt(-1)
 15907  		return true
 15908  	}
 15909  	return false
 15910  }
 15911  func rewriteValue_OpARM64ORNshiftRL(v *ssa.Value) bool {
 15912  	v_1 := v.Args[1]
 15913  	v_0 := v.Args[0]
 15914  	// match: (ORNshiftRL x (MOVDconst [c]) [d])
 15915  	// result: (ORconst x [^int64(uint64(c)>>uint64(d))])
 15916  	for {
 15917  		d := ssa.AuxIntToInt64(v.AuxInt)
 15918  		x := v_0
 15919  		if v_1.Op != ssaop.OpARM64MOVDconst {
 15920  			break
 15921  		}
 15922  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 15923  		v.Reset(ssaop.OpARM64ORconst)
 15924  		v.AuxInt = ssa.Int64ToAuxInt(^int64(uint64(c) >> uint64(d)))
 15925  		v.AddArg(x)
 15926  		return true
 15927  	}
 15928  	// match: (ORNshiftRL (SRLconst x [c]) x [c])
 15929  	// result: (MOVDconst [-1])
 15930  	for {
 15931  		c := ssa.AuxIntToInt64(v.AuxInt)
 15932  		if v_0.Op != ssaop.OpARM64SRLconst || ssa.AuxIntToInt64(v_0.AuxInt) != c {
 15933  			break
 15934  		}
 15935  		x := v_0.Args[0]
 15936  		if x != v_1 {
 15937  			break
 15938  		}
 15939  		v.Reset(ssaop.OpARM64MOVDconst)
 15940  		v.AuxInt = ssa.Int64ToAuxInt(-1)
 15941  		return true
 15942  	}
 15943  	return false
 15944  }
 15945  func rewriteValue_OpARM64ORNshiftRO(v *ssa.Value) bool {
 15946  	v_1 := v.Args[1]
 15947  	v_0 := v.Args[0]
 15948  	// match: (ORNshiftRO x (MOVDconst [c]) [d])
 15949  	// result: (ORconst x [^rotateRight64(c, d)])
 15950  	for {
 15951  		d := ssa.AuxIntToInt64(v.AuxInt)
 15952  		x := v_0
 15953  		if v_1.Op != ssaop.OpARM64MOVDconst {
 15954  			break
 15955  		}
 15956  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 15957  		v.Reset(ssaop.OpARM64ORconst)
 15958  		v.AuxInt = ssa.Int64ToAuxInt(^rotateRight64(c, d))
 15959  		v.AddArg(x)
 15960  		return true
 15961  	}
 15962  	// match: (ORNshiftRO (RORconst x [c]) x [c])
 15963  	// result: (MOVDconst [-1])
 15964  	for {
 15965  		c := ssa.AuxIntToInt64(v.AuxInt)
 15966  		if v_0.Op != ssaop.OpARM64RORconst || ssa.AuxIntToInt64(v_0.AuxInt) != c {
 15967  			break
 15968  		}
 15969  		x := v_0.Args[0]
 15970  		if x != v_1 {
 15971  			break
 15972  		}
 15973  		v.Reset(ssaop.OpARM64MOVDconst)
 15974  		v.AuxInt = ssa.Int64ToAuxInt(-1)
 15975  		return true
 15976  	}
 15977  	return false
 15978  }
 15979  func rewriteValue_OpARM64ORconst(v *ssa.Value) bool {
 15980  	v_0 := v.Args[0]
 15981  	// match: (ORconst [0] x)
 15982  	// result: x
 15983  	for {
 15984  		if ssa.AuxIntToInt64(v.AuxInt) != 0 {
 15985  			break
 15986  		}
 15987  		x := v_0
 15988  		v.CopyOf(x)
 15989  		return true
 15990  	}
 15991  	// match: (ORconst [-1] _)
 15992  	// result: (MOVDconst [-1])
 15993  	for {
 15994  		if ssa.AuxIntToInt64(v.AuxInt) != -1 {
 15995  			break
 15996  		}
 15997  		v.Reset(ssaop.OpARM64MOVDconst)
 15998  		v.AuxInt = ssa.Int64ToAuxInt(-1)
 15999  		return true
 16000  	}
 16001  	// match: (ORconst [c] (MOVDconst [d]))
 16002  	// result: (MOVDconst [c|d])
 16003  	for {
 16004  		c := ssa.AuxIntToInt64(v.AuxInt)
 16005  		if v_0.Op != ssaop.OpARM64MOVDconst {
 16006  			break
 16007  		}
 16008  		d := ssa.AuxIntToInt64(v_0.AuxInt)
 16009  		v.Reset(ssaop.OpARM64MOVDconst)
 16010  		v.AuxInt = ssa.Int64ToAuxInt(c | d)
 16011  		return true
 16012  	}
 16013  	// match: (ORconst [c] (ORconst [d] x))
 16014  	// result: (ORconst [c|d] x)
 16015  	for {
 16016  		c := ssa.AuxIntToInt64(v.AuxInt)
 16017  		if v_0.Op != ssaop.OpARM64ORconst {
 16018  			break
 16019  		}
 16020  		d := ssa.AuxIntToInt64(v_0.AuxInt)
 16021  		x := v_0.Args[0]
 16022  		v.Reset(ssaop.OpARM64ORconst)
 16023  		v.AuxInt = ssa.Int64ToAuxInt(c | d)
 16024  		v.AddArg(x)
 16025  		return true
 16026  	}
 16027  	// match: (ORconst [c1] (ANDconst [c2] x))
 16028  	// cond: c2|c1 == ^0
 16029  	// result: (ORconst [c1] x)
 16030  	for {
 16031  		c1 := ssa.AuxIntToInt64(v.AuxInt)
 16032  		if v_0.Op != ssaop.OpARM64ANDconst {
 16033  			break
 16034  		}
 16035  		c2 := ssa.AuxIntToInt64(v_0.AuxInt)
 16036  		x := v_0.Args[0]
 16037  		if !(c2|c1 == ^0) {
 16038  			break
 16039  		}
 16040  		v.Reset(ssaop.OpARM64ORconst)
 16041  		v.AuxInt = ssa.Int64ToAuxInt(c1)
 16042  		v.AddArg(x)
 16043  		return true
 16044  	}
 16045  	return false
 16046  }
 16047  func rewriteValue_OpARM64ORshiftLL(v *ssa.Value) bool {
 16048  	v_1 := v.Args[1]
 16049  	v_0 := v.Args[0]
 16050  	b := v.Block
 16051  	typ := &b.Func.Config.Types
 16052  	// match: (ORshiftLL (MOVDconst [c]) x [d])
 16053  	// result: (ORconst [c] (SLLconst <x.Type> x [d]))
 16054  	for {
 16055  		d := ssa.AuxIntToInt64(v.AuxInt)
 16056  		if v_0.Op != ssaop.OpARM64MOVDconst {
 16057  			break
 16058  		}
 16059  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 16060  		x := v_1
 16061  		v.Reset(ssaop.OpARM64ORconst)
 16062  		v.AuxInt = ssa.Int64ToAuxInt(c)
 16063  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SLLconst, x.Type)
 16064  		v0.AuxInt = ssa.Int64ToAuxInt(d)
 16065  		v0.AddArg(x)
 16066  		v.AddArg(v0)
 16067  		return true
 16068  	}
 16069  	// match: (ORshiftLL x (MOVDconst [c]) [d])
 16070  	// result: (ORconst x [int64(uint64(c)<<uint64(d))])
 16071  	for {
 16072  		d := ssa.AuxIntToInt64(v.AuxInt)
 16073  		x := v_0
 16074  		if v_1.Op != ssaop.OpARM64MOVDconst {
 16075  			break
 16076  		}
 16077  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 16078  		v.Reset(ssaop.OpARM64ORconst)
 16079  		v.AuxInt = ssa.Int64ToAuxInt(int64(uint64(c) << uint64(d)))
 16080  		v.AddArg(x)
 16081  		return true
 16082  	}
 16083  	// match: (ORshiftLL y:(SLLconst x [c]) x [c])
 16084  	// result: y
 16085  	for {
 16086  		c := ssa.AuxIntToInt64(v.AuxInt)
 16087  		y := v_0
 16088  		if y.Op != ssaop.OpARM64SLLconst || ssa.AuxIntToInt64(y.AuxInt) != c {
 16089  			break
 16090  		}
 16091  		x := y.Args[0]
 16092  		if x != v_1 {
 16093  			break
 16094  		}
 16095  		v.CopyOf(y)
 16096  		return true
 16097  	}
 16098  	// match: (ORshiftLL <typ.UInt16> [8] (UBFX <typ.UInt16> [ssa.ArmBFAuxInt(8, 8)] x) x)
 16099  	// result: (REV16W x)
 16100  	for {
 16101  		if v.Type != typ.UInt16 || ssa.AuxIntToInt64(v.AuxInt) != 8 || v_0.Op != ssaop.OpARM64UBFX || v_0.Type != typ.UInt16 || ssa.AuxIntToArm64BitField(v_0.AuxInt) != ssa.ArmBFAuxInt(8, 8) {
 16102  			break
 16103  		}
 16104  		x := v_0.Args[0]
 16105  		if x != v_1 {
 16106  			break
 16107  		}
 16108  		v.Reset(ssaop.OpARM64REV16W)
 16109  		v.AddArg(x)
 16110  		return true
 16111  	}
 16112  	// match: (ORshiftLL [8] (UBFX [ssa.ArmBFAuxInt(8, 24)] (ANDconst [c1] x)) (ANDconst [c2] x))
 16113  	// cond: uint32(c1) == 0xff00ff00 && uint32(c2) == 0x00ff00ff
 16114  	// result: (REV16W x)
 16115  	for {
 16116  		if ssa.AuxIntToInt64(v.AuxInt) != 8 || v_0.Op != ssaop.OpARM64UBFX || ssa.AuxIntToArm64BitField(v_0.AuxInt) != ssa.ArmBFAuxInt(8, 24) {
 16117  			break
 16118  		}
 16119  		v_0_0 := v_0.Args[0]
 16120  		if v_0_0.Op != ssaop.OpARM64ANDconst {
 16121  			break
 16122  		}
 16123  		c1 := ssa.AuxIntToInt64(v_0_0.AuxInt)
 16124  		x := v_0_0.Args[0]
 16125  		if v_1.Op != ssaop.OpARM64ANDconst {
 16126  			break
 16127  		}
 16128  		c2 := ssa.AuxIntToInt64(v_1.AuxInt)
 16129  		if x != v_1.Args[0] || !(uint32(c1) == 0xff00ff00 && uint32(c2) == 0x00ff00ff) {
 16130  			break
 16131  		}
 16132  		v.Reset(ssaop.OpARM64REV16W)
 16133  		v.AddArg(x)
 16134  		return true
 16135  	}
 16136  	// match: (ORshiftLL [8] (SRLconst [8] (ANDconst [c1] x)) (ANDconst [c2] x))
 16137  	// cond: (uint64(c1) == 0xff00ff00ff00ff00 && uint64(c2) == 0x00ff00ff00ff00ff)
 16138  	// result: (REV16 x)
 16139  	for {
 16140  		if ssa.AuxIntToInt64(v.AuxInt) != 8 || v_0.Op != ssaop.OpARM64SRLconst || ssa.AuxIntToInt64(v_0.AuxInt) != 8 {
 16141  			break
 16142  		}
 16143  		v_0_0 := v_0.Args[0]
 16144  		if v_0_0.Op != ssaop.OpARM64ANDconst {
 16145  			break
 16146  		}
 16147  		c1 := ssa.AuxIntToInt64(v_0_0.AuxInt)
 16148  		x := v_0_0.Args[0]
 16149  		if v_1.Op != ssaop.OpARM64ANDconst {
 16150  			break
 16151  		}
 16152  		c2 := ssa.AuxIntToInt64(v_1.AuxInt)
 16153  		if x != v_1.Args[0] || !(uint64(c1) == 0xff00ff00ff00ff00 && uint64(c2) == 0x00ff00ff00ff00ff) {
 16154  			break
 16155  		}
 16156  		v.Reset(ssaop.OpARM64REV16)
 16157  		v.AddArg(x)
 16158  		return true
 16159  	}
 16160  	// match: (ORshiftLL [8] (SRLconst [8] (ANDconst [c1] x)) (ANDconst [c2] x))
 16161  	// cond: (uint64(c1) == 0xff00ff00 && uint64(c2) == 0x00ff00ff)
 16162  	// result: (REV16 (ANDconst <x.Type> [0xffffffff] x))
 16163  	for {
 16164  		if ssa.AuxIntToInt64(v.AuxInt) != 8 || v_0.Op != ssaop.OpARM64SRLconst || ssa.AuxIntToInt64(v_0.AuxInt) != 8 {
 16165  			break
 16166  		}
 16167  		v_0_0 := v_0.Args[0]
 16168  		if v_0_0.Op != ssaop.OpARM64ANDconst {
 16169  			break
 16170  		}
 16171  		c1 := ssa.AuxIntToInt64(v_0_0.AuxInt)
 16172  		x := v_0_0.Args[0]
 16173  		if v_1.Op != ssaop.OpARM64ANDconst {
 16174  			break
 16175  		}
 16176  		c2 := ssa.AuxIntToInt64(v_1.AuxInt)
 16177  		if x != v_1.Args[0] || !(uint64(c1) == 0xff00ff00 && uint64(c2) == 0x00ff00ff) {
 16178  			break
 16179  		}
 16180  		v.Reset(ssaop.OpARM64REV16)
 16181  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64ANDconst, x.Type)
 16182  		v0.AuxInt = ssa.Int64ToAuxInt(0xffffffff)
 16183  		v0.AddArg(x)
 16184  		v.AddArg(v0)
 16185  		return true
 16186  	}
 16187  	// match: ( ORshiftLL [c] (SRLconst x [64-c]) x2)
 16188  	// result: (EXTRconst [64-c] x2 x)
 16189  	for {
 16190  		c := ssa.AuxIntToInt64(v.AuxInt)
 16191  		if v_0.Op != ssaop.OpARM64SRLconst || ssa.AuxIntToInt64(v_0.AuxInt) != 64-c {
 16192  			break
 16193  		}
 16194  		x := v_0.Args[0]
 16195  		x2 := v_1
 16196  		v.Reset(ssaop.OpARM64EXTRconst)
 16197  		v.AuxInt = ssa.Int64ToAuxInt(64 - c)
 16198  		v.AddArg2(x2, x)
 16199  		return true
 16200  	}
 16201  	// match: ( ORshiftLL <t> [c] (UBFX [bfc] x) x2)
 16202  	// cond: c < 32 && t.Size() == 4 && bfc == ssa.ArmBFAuxInt(32-c, c)
 16203  	// result: (EXTRWconst [32-c] x2 x)
 16204  	for {
 16205  		t := v.Type
 16206  		c := ssa.AuxIntToInt64(v.AuxInt)
 16207  		if v_0.Op != ssaop.OpARM64UBFX {
 16208  			break
 16209  		}
 16210  		bfc := ssa.AuxIntToArm64BitField(v_0.AuxInt)
 16211  		x := v_0.Args[0]
 16212  		x2 := v_1
 16213  		if !(c < 32 && t.Size() == 4 && bfc == ssa.ArmBFAuxInt(32-c, c)) {
 16214  			break
 16215  		}
 16216  		v.Reset(ssaop.OpARM64EXTRWconst)
 16217  		v.AuxInt = ssa.Int64ToAuxInt(32 - c)
 16218  		v.AddArg2(x2, x)
 16219  		return true
 16220  	}
 16221  	// match: (ORshiftLL [s] (ANDconst [xc] x) (ANDconst [yc] y))
 16222  	// cond: xc == ^(yc << s) && yc & (yc+1) == 0 && yc > 0 && s+ssa.Log64(yc+1) <= 64
 16223  	// result: (BFI [ssa.ArmBFAuxInt(s, ssa.Log64(yc+1))] x y)
 16224  	for {
 16225  		s := ssa.AuxIntToInt64(v.AuxInt)
 16226  		if v_0.Op != ssaop.OpARM64ANDconst {
 16227  			break
 16228  		}
 16229  		xc := ssa.AuxIntToInt64(v_0.AuxInt)
 16230  		x := v_0.Args[0]
 16231  		if v_1.Op != ssaop.OpARM64ANDconst {
 16232  			break
 16233  		}
 16234  		yc := ssa.AuxIntToInt64(v_1.AuxInt)
 16235  		y := v_1.Args[0]
 16236  		if !(xc == ^(yc<<s) && yc&(yc+1) == 0 && yc > 0 && s+ssa.Log64(yc+1) <= 64) {
 16237  			break
 16238  		}
 16239  		v.Reset(ssaop.OpARM64BFI)
 16240  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(s, ssa.Log64(yc+1)))
 16241  		v.AddArg2(x, y)
 16242  		return true
 16243  	}
 16244  	// match: (ORshiftLL [sc] (UBFX [bfc] x) (SRLconst [sc] y))
 16245  	// cond: sc == bfc.Width()
 16246  	// result: (BFXIL [bfc] y x)
 16247  	for {
 16248  		sc := ssa.AuxIntToInt64(v.AuxInt)
 16249  		if v_0.Op != ssaop.OpARM64UBFX {
 16250  			break
 16251  		}
 16252  		bfc := ssa.AuxIntToArm64BitField(v_0.AuxInt)
 16253  		x := v_0.Args[0]
 16254  		if v_1.Op != ssaop.OpARM64SRLconst || ssa.AuxIntToInt64(v_1.AuxInt) != sc {
 16255  			break
 16256  		}
 16257  		y := v_1.Args[0]
 16258  		if !(sc == bfc.Width()) {
 16259  			break
 16260  		}
 16261  		v.Reset(ssaop.OpARM64BFXIL)
 16262  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(bfc)
 16263  		v.AddArg2(y, x)
 16264  		return true
 16265  	}
 16266  	return false
 16267  }
 16268  func rewriteValue_OpARM64ORshiftRA(v *ssa.Value) bool {
 16269  	v_1 := v.Args[1]
 16270  	v_0 := v.Args[0]
 16271  	b := v.Block
 16272  	// match: (ORshiftRA (MOVDconst [c]) x [d])
 16273  	// result: (ORconst [c] (SRAconst <x.Type> x [d]))
 16274  	for {
 16275  		d := ssa.AuxIntToInt64(v.AuxInt)
 16276  		if v_0.Op != ssaop.OpARM64MOVDconst {
 16277  			break
 16278  		}
 16279  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 16280  		x := v_1
 16281  		v.Reset(ssaop.OpARM64ORconst)
 16282  		v.AuxInt = ssa.Int64ToAuxInt(c)
 16283  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SRAconst, x.Type)
 16284  		v0.AuxInt = ssa.Int64ToAuxInt(d)
 16285  		v0.AddArg(x)
 16286  		v.AddArg(v0)
 16287  		return true
 16288  	}
 16289  	// match: (ORshiftRA x (MOVDconst [c]) [d])
 16290  	// result: (ORconst x [c>>uint64(d)])
 16291  	for {
 16292  		d := ssa.AuxIntToInt64(v.AuxInt)
 16293  		x := v_0
 16294  		if v_1.Op != ssaop.OpARM64MOVDconst {
 16295  			break
 16296  		}
 16297  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 16298  		v.Reset(ssaop.OpARM64ORconst)
 16299  		v.AuxInt = ssa.Int64ToAuxInt(c >> uint64(d))
 16300  		v.AddArg(x)
 16301  		return true
 16302  	}
 16303  	// match: (ORshiftRA y:(SRAconst x [c]) x [c])
 16304  	// result: y
 16305  	for {
 16306  		c := ssa.AuxIntToInt64(v.AuxInt)
 16307  		y := v_0
 16308  		if y.Op != ssaop.OpARM64SRAconst || ssa.AuxIntToInt64(y.AuxInt) != c {
 16309  			break
 16310  		}
 16311  		x := y.Args[0]
 16312  		if x != v_1 {
 16313  			break
 16314  		}
 16315  		v.CopyOf(y)
 16316  		return true
 16317  	}
 16318  	return false
 16319  }
 16320  func rewriteValue_OpARM64ORshiftRL(v *ssa.Value) bool {
 16321  	v_1 := v.Args[1]
 16322  	v_0 := v.Args[0]
 16323  	b := v.Block
 16324  	// match: (ORshiftRL (MOVDconst [c]) x [d])
 16325  	// result: (ORconst [c] (SRLconst <x.Type> x [d]))
 16326  	for {
 16327  		d := ssa.AuxIntToInt64(v.AuxInt)
 16328  		if v_0.Op != ssaop.OpARM64MOVDconst {
 16329  			break
 16330  		}
 16331  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 16332  		x := v_1
 16333  		v.Reset(ssaop.OpARM64ORconst)
 16334  		v.AuxInt = ssa.Int64ToAuxInt(c)
 16335  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SRLconst, x.Type)
 16336  		v0.AuxInt = ssa.Int64ToAuxInt(d)
 16337  		v0.AddArg(x)
 16338  		v.AddArg(v0)
 16339  		return true
 16340  	}
 16341  	// match: (ORshiftRL x (MOVDconst [c]) [d])
 16342  	// result: (ORconst x [int64(uint64(c)>>uint64(d))])
 16343  	for {
 16344  		d := ssa.AuxIntToInt64(v.AuxInt)
 16345  		x := v_0
 16346  		if v_1.Op != ssaop.OpARM64MOVDconst {
 16347  			break
 16348  		}
 16349  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 16350  		v.Reset(ssaop.OpARM64ORconst)
 16351  		v.AuxInt = ssa.Int64ToAuxInt(int64(uint64(c) >> uint64(d)))
 16352  		v.AddArg(x)
 16353  		return true
 16354  	}
 16355  	// match: (ORshiftRL y:(SRLconst x [c]) x [c])
 16356  	// result: y
 16357  	for {
 16358  		c := ssa.AuxIntToInt64(v.AuxInt)
 16359  		y := v_0
 16360  		if y.Op != ssaop.OpARM64SRLconst || ssa.AuxIntToInt64(y.AuxInt) != c {
 16361  			break
 16362  		}
 16363  		x := y.Args[0]
 16364  		if x != v_1 {
 16365  			break
 16366  		}
 16367  		v.CopyOf(y)
 16368  		return true
 16369  	}
 16370  	// match: (ORshiftRL [rc] (ANDconst [ac] x) (SLLconst [lc] y))
 16371  	// cond: lc > rc && ac == ^((1<<uint(64-lc)-1) << uint64(lc-rc))
 16372  	// result: (BFI [ssa.ArmBFAuxInt(lc-rc, 64-lc)] x y)
 16373  	for {
 16374  		rc := ssa.AuxIntToInt64(v.AuxInt)
 16375  		if v_0.Op != ssaop.OpARM64ANDconst {
 16376  			break
 16377  		}
 16378  		ac := ssa.AuxIntToInt64(v_0.AuxInt)
 16379  		x := v_0.Args[0]
 16380  		if v_1.Op != ssaop.OpARM64SLLconst {
 16381  			break
 16382  		}
 16383  		lc := ssa.AuxIntToInt64(v_1.AuxInt)
 16384  		y := v_1.Args[0]
 16385  		if !(lc > rc && ac == ^((1<<uint(64-lc)-1)<<uint64(lc-rc))) {
 16386  			break
 16387  		}
 16388  		v.Reset(ssaop.OpARM64BFI)
 16389  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(lc-rc, 64-lc))
 16390  		v.AddArg2(x, y)
 16391  		return true
 16392  	}
 16393  	// match: (ORshiftRL [rc] (ANDconst [ac] y) (SLLconst [lc] x))
 16394  	// cond: lc < rc && ac == ^((1<<uint(64-rc)-1))
 16395  	// result: (BFXIL [ssa.ArmBFAuxInt(rc-lc, 64-rc)] y x)
 16396  	for {
 16397  		rc := ssa.AuxIntToInt64(v.AuxInt)
 16398  		if v_0.Op != ssaop.OpARM64ANDconst {
 16399  			break
 16400  		}
 16401  		ac := ssa.AuxIntToInt64(v_0.AuxInt)
 16402  		y := v_0.Args[0]
 16403  		if v_1.Op != ssaop.OpARM64SLLconst {
 16404  			break
 16405  		}
 16406  		lc := ssa.AuxIntToInt64(v_1.AuxInt)
 16407  		x := v_1.Args[0]
 16408  		if !(lc < rc && ac == ^(1<<uint(64-rc)-1)) {
 16409  			break
 16410  		}
 16411  		v.Reset(ssaop.OpARM64BFXIL)
 16412  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(rc-lc, 64-rc))
 16413  		v.AddArg2(y, x)
 16414  		return true
 16415  	}
 16416  	return false
 16417  }
 16418  func rewriteValue_OpARM64ORshiftRO(v *ssa.Value) bool {
 16419  	v_1 := v.Args[1]
 16420  	v_0 := v.Args[0]
 16421  	b := v.Block
 16422  	// match: (ORshiftRO (MOVDconst [c]) x [d])
 16423  	// result: (ORconst [c] (RORconst <x.Type> x [d]))
 16424  	for {
 16425  		d := ssa.AuxIntToInt64(v.AuxInt)
 16426  		if v_0.Op != ssaop.OpARM64MOVDconst {
 16427  			break
 16428  		}
 16429  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 16430  		x := v_1
 16431  		v.Reset(ssaop.OpARM64ORconst)
 16432  		v.AuxInt = ssa.Int64ToAuxInt(c)
 16433  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64RORconst, x.Type)
 16434  		v0.AuxInt = ssa.Int64ToAuxInt(d)
 16435  		v0.AddArg(x)
 16436  		v.AddArg(v0)
 16437  		return true
 16438  	}
 16439  	// match: (ORshiftRO x (MOVDconst [c]) [d])
 16440  	// result: (ORconst x [rotateRight64(c, d)])
 16441  	for {
 16442  		d := ssa.AuxIntToInt64(v.AuxInt)
 16443  		x := v_0
 16444  		if v_1.Op != ssaop.OpARM64MOVDconst {
 16445  			break
 16446  		}
 16447  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 16448  		v.Reset(ssaop.OpARM64ORconst)
 16449  		v.AuxInt = ssa.Int64ToAuxInt(rotateRight64(c, d))
 16450  		v.AddArg(x)
 16451  		return true
 16452  	}
 16453  	// match: (ORshiftRO y:(RORconst x [c]) x [c])
 16454  	// result: y
 16455  	for {
 16456  		c := ssa.AuxIntToInt64(v.AuxInt)
 16457  		y := v_0
 16458  		if y.Op != ssaop.OpARM64RORconst || ssa.AuxIntToInt64(y.AuxInt) != c {
 16459  			break
 16460  		}
 16461  		x := y.Args[0]
 16462  		if x != v_1 {
 16463  			break
 16464  		}
 16465  		v.CopyOf(y)
 16466  		return true
 16467  	}
 16468  	return false
 16469  }
 16470  func rewriteValue_OpARM64REV(v *ssa.Value) bool {
 16471  	v_0 := v.Args[0]
 16472  	// match: (REV (REV p))
 16473  	// result: p
 16474  	for {
 16475  		if v_0.Op != ssaop.OpARM64REV {
 16476  			break
 16477  		}
 16478  		p := v_0.Args[0]
 16479  		v.CopyOf(p)
 16480  		return true
 16481  	}
 16482  	return false
 16483  }
 16484  func rewriteValue_OpARM64REV16(v *ssa.Value) bool {
 16485  	v_0 := v.Args[0]
 16486  	// match: (REV16 (MOVWUreg x))
 16487  	// result: (REV16W x)
 16488  	for {
 16489  		if v_0.Op != ssaop.OpARM64MOVWUreg {
 16490  			break
 16491  		}
 16492  		x := v_0.Args[0]
 16493  		v.Reset(ssaop.OpARM64REV16W)
 16494  		v.AddArg(x)
 16495  		return true
 16496  	}
 16497  	return false
 16498  }
 16499  func rewriteValue_OpARM64REVW(v *ssa.Value) bool {
 16500  	v_0 := v.Args[0]
 16501  	// match: (REVW (REVW p))
 16502  	// result: p
 16503  	for {
 16504  		if v_0.Op != ssaop.OpARM64REVW {
 16505  			break
 16506  		}
 16507  		p := v_0.Args[0]
 16508  		v.CopyOf(p)
 16509  		return true
 16510  	}
 16511  	return false
 16512  }
 16513  func rewriteValue_OpARM64ROR(v *ssa.Value) bool {
 16514  	v_1 := v.Args[1]
 16515  	v_0 := v.Args[0]
 16516  	// match: (ROR x (MOVDconst [c]))
 16517  	// result: (RORconst x [c&63])
 16518  	for {
 16519  		x := v_0
 16520  		if v_1.Op != ssaop.OpARM64MOVDconst {
 16521  			break
 16522  		}
 16523  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 16524  		v.Reset(ssaop.OpARM64RORconst)
 16525  		v.AuxInt = ssa.Int64ToAuxInt(c & 63)
 16526  		v.AddArg(x)
 16527  		return true
 16528  	}
 16529  	return false
 16530  }
 16531  func rewriteValue_OpARM64RORW(v *ssa.Value) bool {
 16532  	v_1 := v.Args[1]
 16533  	v_0 := v.Args[0]
 16534  	// match: (RORW x (MOVDconst [c]))
 16535  	// result: (RORWconst x [c&31])
 16536  	for {
 16537  		x := v_0
 16538  		if v_1.Op != ssaop.OpARM64MOVDconst {
 16539  			break
 16540  		}
 16541  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 16542  		v.Reset(ssaop.OpARM64RORWconst)
 16543  		v.AuxInt = ssa.Int64ToAuxInt(c & 31)
 16544  		v.AddArg(x)
 16545  		return true
 16546  	}
 16547  	return false
 16548  }
 16549  func rewriteValue_OpARM64SBCSflags(v *ssa.Value) bool {
 16550  	v_2 := v.Args[2]
 16551  	v_1 := v.Args[1]
 16552  	v_0 := v.Args[0]
 16553  	b := v.Block
 16554  	typ := &b.Func.Config.Types
 16555  	// match: (SBCSflags x y (Select1 <types.TypeFlags> (NEGSflags (NEG <typ.UInt64> (NGCzerocarry <typ.UInt64> bo)))))
 16556  	// result: (SBCSflags x y bo)
 16557  	for {
 16558  		x := v_0
 16559  		y := v_1
 16560  		if v_2.Op != ssaop.OpSelect1 || v_2.Type != types.TypeFlags {
 16561  			break
 16562  		}
 16563  		v_2_0 := v_2.Args[0]
 16564  		if v_2_0.Op != ssaop.OpARM64NEGSflags {
 16565  			break
 16566  		}
 16567  		v_2_0_0 := v_2_0.Args[0]
 16568  		if v_2_0_0.Op != ssaop.OpARM64NEG || v_2_0_0.Type != typ.UInt64 {
 16569  			break
 16570  		}
 16571  		v_2_0_0_0 := v_2_0_0.Args[0]
 16572  		if v_2_0_0_0.Op != ssaop.OpARM64NGCzerocarry || v_2_0_0_0.Type != typ.UInt64 {
 16573  			break
 16574  		}
 16575  		bo := v_2_0_0_0.Args[0]
 16576  		v.Reset(ssaop.OpARM64SBCSflags)
 16577  		v.AddArg3(x, y, bo)
 16578  		return true
 16579  	}
 16580  	// match: (SBCSflags x y (Select1 <types.TypeFlags> (NEGSflags (MOVDconst [0]))))
 16581  	// result: (SUBSflags x y)
 16582  	for {
 16583  		x := v_0
 16584  		y := v_1
 16585  		if v_2.Op != ssaop.OpSelect1 || v_2.Type != types.TypeFlags {
 16586  			break
 16587  		}
 16588  		v_2_0 := v_2.Args[0]
 16589  		if v_2_0.Op != ssaop.OpARM64NEGSflags {
 16590  			break
 16591  		}
 16592  		v_2_0_0 := v_2_0.Args[0]
 16593  		if v_2_0_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_2_0_0.AuxInt) != 0 {
 16594  			break
 16595  		}
 16596  		v.Reset(ssaop.OpARM64SUBSflags)
 16597  		v.AddArg2(x, y)
 16598  		return true
 16599  	}
 16600  	return false
 16601  }
 16602  func rewriteValue_OpARM64SBFX(v *ssa.Value) bool {
 16603  	v_0 := v.Args[0]
 16604  	// match: (SBFX [bfc] s:(SLLconst [sc] x))
 16605  	// cond: s.Uses == 1 && sc <= bfc.Lsb()
 16606  	// result: (SBFX [ssa.ArmBFAuxInt(bfc.Lsb() - sc, bfc.Width())] x)
 16607  	for {
 16608  		bfc := ssa.AuxIntToArm64BitField(v.AuxInt)
 16609  		s := v_0
 16610  		if s.Op != ssaop.OpARM64SLLconst {
 16611  			break
 16612  		}
 16613  		sc := ssa.AuxIntToInt64(s.AuxInt)
 16614  		x := s.Args[0]
 16615  		if !(s.Uses == 1 && sc <= bfc.Lsb()) {
 16616  			break
 16617  		}
 16618  		v.Reset(ssaop.OpARM64SBFX)
 16619  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(bfc.Lsb()-sc, bfc.Width()))
 16620  		v.AddArg(x)
 16621  		return true
 16622  	}
 16623  	// match: (SBFX [bfc] s:(SLLconst [sc] x))
 16624  	// cond: s.Uses == 1 && sc > bfc.Lsb() && sc < bfc.Lsb()+bfc.Width()
 16625  	// result: (SBFIZ [ssa.ArmBFAuxInt(sc - bfc.Lsb(), bfc.Width() - (sc-bfc.Lsb()))] x)
 16626  	for {
 16627  		bfc := ssa.AuxIntToArm64BitField(v.AuxInt)
 16628  		s := v_0
 16629  		if s.Op != ssaop.OpARM64SLLconst {
 16630  			break
 16631  		}
 16632  		sc := ssa.AuxIntToInt64(s.AuxInt)
 16633  		x := s.Args[0]
 16634  		if !(s.Uses == 1 && sc > bfc.Lsb() && sc < bfc.Lsb()+bfc.Width()) {
 16635  			break
 16636  		}
 16637  		v.Reset(ssaop.OpARM64SBFIZ)
 16638  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(sc-bfc.Lsb(), bfc.Width()-(sc-bfc.Lsb())))
 16639  		v.AddArg(x)
 16640  		return true
 16641  	}
 16642  	return false
 16643  }
 16644  func rewriteValue_OpARM64SLL(v *ssa.Value) bool {
 16645  	v_1 := v.Args[1]
 16646  	v_0 := v.Args[0]
 16647  	// match: (SLL x (MOVDconst [c]))
 16648  	// result: (SLLconst x [c&63])
 16649  	for {
 16650  		x := v_0
 16651  		if v_1.Op != ssaop.OpARM64MOVDconst {
 16652  			break
 16653  		}
 16654  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 16655  		v.Reset(ssaop.OpARM64SLLconst)
 16656  		v.AuxInt = ssa.Int64ToAuxInt(c & 63)
 16657  		v.AddArg(x)
 16658  		return true
 16659  	}
 16660  	// match: (SLL x (ANDconst [63] y))
 16661  	// result: (SLL x y)
 16662  	for {
 16663  		x := v_0
 16664  		if v_1.Op != ssaop.OpARM64ANDconst || ssa.AuxIntToInt64(v_1.AuxInt) != 63 {
 16665  			break
 16666  		}
 16667  		y := v_1.Args[0]
 16668  		v.Reset(ssaop.OpARM64SLL)
 16669  		v.AddArg2(x, y)
 16670  		return true
 16671  	}
 16672  	return false
 16673  }
 16674  func rewriteValue_OpARM64SLLconst(v *ssa.Value) bool {
 16675  	v_0 := v.Args[0]
 16676  	// match: (SLLconst [c] (MOVDconst [d]))
 16677  	// result: (MOVDconst [d<<uint64(c)])
 16678  	for {
 16679  		c := ssa.AuxIntToInt64(v.AuxInt)
 16680  		if v_0.Op != ssaop.OpARM64MOVDconst {
 16681  			break
 16682  		}
 16683  		d := ssa.AuxIntToInt64(v_0.AuxInt)
 16684  		v.Reset(ssaop.OpARM64MOVDconst)
 16685  		v.AuxInt = ssa.Int64ToAuxInt(d << uint64(c))
 16686  		return true
 16687  	}
 16688  	// match: (SLLconst [c] (SRLconst [c] x))
 16689  	// cond: 0 < c && c < 64
 16690  	// result: (ANDconst [^(1<<uint(c)-1)] x)
 16691  	for {
 16692  		c := ssa.AuxIntToInt64(v.AuxInt)
 16693  		if v_0.Op != ssaop.OpARM64SRLconst || ssa.AuxIntToInt64(v_0.AuxInt) != c {
 16694  			break
 16695  		}
 16696  		x := v_0.Args[0]
 16697  		if !(0 < c && c < 64) {
 16698  			break
 16699  		}
 16700  		v.Reset(ssaop.OpARM64ANDconst)
 16701  		v.AuxInt = ssa.Int64ToAuxInt(^(1<<uint(c) - 1))
 16702  		v.AddArg(x)
 16703  		return true
 16704  	}
 16705  	// match: (SLLconst [lc] (MOVWreg x))
 16706  	// result: (SBFIZ [ssa.ArmBFAuxInt(lc, min(32, 64-lc))] x)
 16707  	for {
 16708  		lc := ssa.AuxIntToInt64(v.AuxInt)
 16709  		if v_0.Op != ssaop.OpARM64MOVWreg {
 16710  			break
 16711  		}
 16712  		x := v_0.Args[0]
 16713  		v.Reset(ssaop.OpARM64SBFIZ)
 16714  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(lc, min(32, 64-lc)))
 16715  		v.AddArg(x)
 16716  		return true
 16717  	}
 16718  	// match: (SLLconst [lc] (MOVHreg x))
 16719  	// result: (SBFIZ [ssa.ArmBFAuxInt(lc, min(16, 64-lc))] x)
 16720  	for {
 16721  		lc := ssa.AuxIntToInt64(v.AuxInt)
 16722  		if v_0.Op != ssaop.OpARM64MOVHreg {
 16723  			break
 16724  		}
 16725  		x := v_0.Args[0]
 16726  		v.Reset(ssaop.OpARM64SBFIZ)
 16727  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(lc, min(16, 64-lc)))
 16728  		v.AddArg(x)
 16729  		return true
 16730  	}
 16731  	// match: (SLLconst [lc] (MOVBreg x))
 16732  	// result: (SBFIZ [ssa.ArmBFAuxInt(lc, min(8, 64-lc))] x)
 16733  	for {
 16734  		lc := ssa.AuxIntToInt64(v.AuxInt)
 16735  		if v_0.Op != ssaop.OpARM64MOVBreg {
 16736  			break
 16737  		}
 16738  		x := v_0.Args[0]
 16739  		v.Reset(ssaop.OpARM64SBFIZ)
 16740  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(lc, min(8, 64-lc)))
 16741  		v.AddArg(x)
 16742  		return true
 16743  	}
 16744  	// match: (SLLconst [lc] (MOVWUreg x))
 16745  	// result: (UBFIZ [ssa.ArmBFAuxInt(lc, min(32, 64-lc))] x)
 16746  	for {
 16747  		lc := ssa.AuxIntToInt64(v.AuxInt)
 16748  		if v_0.Op != ssaop.OpARM64MOVWUreg {
 16749  			break
 16750  		}
 16751  		x := v_0.Args[0]
 16752  		v.Reset(ssaop.OpARM64UBFIZ)
 16753  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(lc, min(32, 64-lc)))
 16754  		v.AddArg(x)
 16755  		return true
 16756  	}
 16757  	// match: (SLLconst [lc] (MOVHUreg x))
 16758  	// result: (UBFIZ [ssa.ArmBFAuxInt(lc, min(16, 64-lc))] x)
 16759  	for {
 16760  		lc := ssa.AuxIntToInt64(v.AuxInt)
 16761  		if v_0.Op != ssaop.OpARM64MOVHUreg {
 16762  			break
 16763  		}
 16764  		x := v_0.Args[0]
 16765  		v.Reset(ssaop.OpARM64UBFIZ)
 16766  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(lc, min(16, 64-lc)))
 16767  		v.AddArg(x)
 16768  		return true
 16769  	}
 16770  	// match: (SLLconst [lc] (MOVBUreg x))
 16771  	// result: (UBFIZ [ssa.ArmBFAuxInt(lc, min(8, 64-lc))] x)
 16772  	for {
 16773  		lc := ssa.AuxIntToInt64(v.AuxInt)
 16774  		if v_0.Op != ssaop.OpARM64MOVBUreg {
 16775  			break
 16776  		}
 16777  		x := v_0.Args[0]
 16778  		v.Reset(ssaop.OpARM64UBFIZ)
 16779  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(lc, min(8, 64-lc)))
 16780  		v.AddArg(x)
 16781  		return true
 16782  	}
 16783  	// match: (SLLconst [sc] (ANDconst [ac] x))
 16784  	// cond: isARM64BFMask(sc, ac, 0)
 16785  	// result: (UBFIZ [ssa.ArmBFAuxInt(sc, arm64BFWidth(ac, 0))] x)
 16786  	for {
 16787  		sc := ssa.AuxIntToInt64(v.AuxInt)
 16788  		if v_0.Op != ssaop.OpARM64ANDconst {
 16789  			break
 16790  		}
 16791  		ac := ssa.AuxIntToInt64(v_0.AuxInt)
 16792  		x := v_0.Args[0]
 16793  		if !(isARM64BFMask(sc, ac, 0)) {
 16794  			break
 16795  		}
 16796  		v.Reset(ssaop.OpARM64UBFIZ)
 16797  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(sc, arm64BFWidth(ac, 0)))
 16798  		v.AddArg(x)
 16799  		return true
 16800  	}
 16801  	// match: (SLLconst [sc] (UBFIZ [bfc] x))
 16802  	// cond: sc+bfc.Width()+bfc.Lsb() < 64
 16803  	// result: (UBFIZ [ssa.ArmBFAuxInt(bfc.Lsb()+sc, bfc.Width())] x)
 16804  	for {
 16805  		sc := ssa.AuxIntToInt64(v.AuxInt)
 16806  		if v_0.Op != ssaop.OpARM64UBFIZ {
 16807  			break
 16808  		}
 16809  		bfc := ssa.AuxIntToArm64BitField(v_0.AuxInt)
 16810  		x := v_0.Args[0]
 16811  		if !(sc+bfc.Width()+bfc.Lsb() < 64) {
 16812  			break
 16813  		}
 16814  		v.Reset(ssaop.OpARM64UBFIZ)
 16815  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(bfc.Lsb()+sc, bfc.Width()))
 16816  		v.AddArg(x)
 16817  		return true
 16818  	}
 16819  	return false
 16820  }
 16821  func rewriteValue_OpARM64SRA(v *ssa.Value) bool {
 16822  	v_1 := v.Args[1]
 16823  	v_0 := v.Args[0]
 16824  	// match: (SRA x (MOVDconst [c]))
 16825  	// result: (SRAconst x [c&63])
 16826  	for {
 16827  		x := v_0
 16828  		if v_1.Op != ssaop.OpARM64MOVDconst {
 16829  			break
 16830  		}
 16831  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 16832  		v.Reset(ssaop.OpARM64SRAconst)
 16833  		v.AuxInt = ssa.Int64ToAuxInt(c & 63)
 16834  		v.AddArg(x)
 16835  		return true
 16836  	}
 16837  	// match: (SRA x (ANDconst [63] y))
 16838  	// result: (SRA x y)
 16839  	for {
 16840  		x := v_0
 16841  		if v_1.Op != ssaop.OpARM64ANDconst || ssa.AuxIntToInt64(v_1.AuxInt) != 63 {
 16842  			break
 16843  		}
 16844  		y := v_1.Args[0]
 16845  		v.Reset(ssaop.OpARM64SRA)
 16846  		v.AddArg2(x, y)
 16847  		return true
 16848  	}
 16849  	return false
 16850  }
 16851  func rewriteValue_OpARM64SRAconst(v *ssa.Value) bool {
 16852  	v_0 := v.Args[0]
 16853  	// match: (SRAconst [c] (MOVDconst [d]))
 16854  	// result: (MOVDconst [d>>uint64(c)])
 16855  	for {
 16856  		c := ssa.AuxIntToInt64(v.AuxInt)
 16857  		if v_0.Op != ssaop.OpARM64MOVDconst {
 16858  			break
 16859  		}
 16860  		d := ssa.AuxIntToInt64(v_0.AuxInt)
 16861  		v.Reset(ssaop.OpARM64MOVDconst)
 16862  		v.AuxInt = ssa.Int64ToAuxInt(d >> uint64(c))
 16863  		return true
 16864  	}
 16865  	// match: (SRAconst [rc] (SLLconst [lc] x))
 16866  	// cond: lc > rc
 16867  	// result: (SBFIZ [ssa.ArmBFAuxInt(lc-rc, 64-lc)] x)
 16868  	for {
 16869  		rc := ssa.AuxIntToInt64(v.AuxInt)
 16870  		if v_0.Op != ssaop.OpARM64SLLconst {
 16871  			break
 16872  		}
 16873  		lc := ssa.AuxIntToInt64(v_0.AuxInt)
 16874  		x := v_0.Args[0]
 16875  		if !(lc > rc) {
 16876  			break
 16877  		}
 16878  		v.Reset(ssaop.OpARM64SBFIZ)
 16879  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(lc-rc, 64-lc))
 16880  		v.AddArg(x)
 16881  		return true
 16882  	}
 16883  	// match: (SRAconst [rc] (SLLconst [lc] x))
 16884  	// cond: lc <= rc
 16885  	// result: (SBFX [ssa.ArmBFAuxInt(rc-lc, 64-rc)] x)
 16886  	for {
 16887  		rc := ssa.AuxIntToInt64(v.AuxInt)
 16888  		if v_0.Op != ssaop.OpARM64SLLconst {
 16889  			break
 16890  		}
 16891  		lc := ssa.AuxIntToInt64(v_0.AuxInt)
 16892  		x := v_0.Args[0]
 16893  		if !(lc <= rc) {
 16894  			break
 16895  		}
 16896  		v.Reset(ssaop.OpARM64SBFX)
 16897  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(rc-lc, 64-rc))
 16898  		v.AddArg(x)
 16899  		return true
 16900  	}
 16901  	// match: (SRAconst [rc] (MOVWreg x))
 16902  	// cond: rc < 32
 16903  	// result: (SBFX [ssa.ArmBFAuxInt(rc, 32-rc)] x)
 16904  	for {
 16905  		rc := ssa.AuxIntToInt64(v.AuxInt)
 16906  		if v_0.Op != ssaop.OpARM64MOVWreg {
 16907  			break
 16908  		}
 16909  		x := v_0.Args[0]
 16910  		if !(rc < 32) {
 16911  			break
 16912  		}
 16913  		v.Reset(ssaop.OpARM64SBFX)
 16914  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(rc, 32-rc))
 16915  		v.AddArg(x)
 16916  		return true
 16917  	}
 16918  	// match: (SRAconst [rc] (MOVHreg x))
 16919  	// cond: rc < 16
 16920  	// result: (SBFX [ssa.ArmBFAuxInt(rc, 16-rc)] x)
 16921  	for {
 16922  		rc := ssa.AuxIntToInt64(v.AuxInt)
 16923  		if v_0.Op != ssaop.OpARM64MOVHreg {
 16924  			break
 16925  		}
 16926  		x := v_0.Args[0]
 16927  		if !(rc < 16) {
 16928  			break
 16929  		}
 16930  		v.Reset(ssaop.OpARM64SBFX)
 16931  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(rc, 16-rc))
 16932  		v.AddArg(x)
 16933  		return true
 16934  	}
 16935  	// match: (SRAconst [rc] (MOVBreg x))
 16936  	// cond: rc < 8
 16937  	// result: (SBFX [ssa.ArmBFAuxInt(rc, 8-rc)] x)
 16938  	for {
 16939  		rc := ssa.AuxIntToInt64(v.AuxInt)
 16940  		if v_0.Op != ssaop.OpARM64MOVBreg {
 16941  			break
 16942  		}
 16943  		x := v_0.Args[0]
 16944  		if !(rc < 8) {
 16945  			break
 16946  		}
 16947  		v.Reset(ssaop.OpARM64SBFX)
 16948  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(rc, 8-rc))
 16949  		v.AddArg(x)
 16950  		return true
 16951  	}
 16952  	// match: (SRAconst [sc] (SBFIZ [bfc] x))
 16953  	// cond: sc < bfc.Lsb()
 16954  	// result: (SBFIZ [ssa.ArmBFAuxInt(bfc.Lsb()-sc, bfc.Width())] x)
 16955  	for {
 16956  		sc := ssa.AuxIntToInt64(v.AuxInt)
 16957  		if v_0.Op != ssaop.OpARM64SBFIZ {
 16958  			break
 16959  		}
 16960  		bfc := ssa.AuxIntToArm64BitField(v_0.AuxInt)
 16961  		x := v_0.Args[0]
 16962  		if !(sc < bfc.Lsb()) {
 16963  			break
 16964  		}
 16965  		v.Reset(ssaop.OpARM64SBFIZ)
 16966  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(bfc.Lsb()-sc, bfc.Width()))
 16967  		v.AddArg(x)
 16968  		return true
 16969  	}
 16970  	// match: (SRAconst [sc] (SBFIZ [bfc] x))
 16971  	// cond: sc >= bfc.Lsb() && sc < bfc.Lsb()+bfc.Width()
 16972  	// result: (SBFX [ssa.ArmBFAuxInt(sc-bfc.Lsb(), bfc.Lsb()+bfc.Width()-sc)] x)
 16973  	for {
 16974  		sc := ssa.AuxIntToInt64(v.AuxInt)
 16975  		if v_0.Op != ssaop.OpARM64SBFIZ {
 16976  			break
 16977  		}
 16978  		bfc := ssa.AuxIntToArm64BitField(v_0.AuxInt)
 16979  		x := v_0.Args[0]
 16980  		if !(sc >= bfc.Lsb() && sc < bfc.Lsb()+bfc.Width()) {
 16981  			break
 16982  		}
 16983  		v.Reset(ssaop.OpARM64SBFX)
 16984  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(sc-bfc.Lsb(), bfc.Lsb()+bfc.Width()-sc))
 16985  		v.AddArg(x)
 16986  		return true
 16987  	}
 16988  	return false
 16989  }
 16990  func rewriteValue_OpARM64SRL(v *ssa.Value) bool {
 16991  	v_1 := v.Args[1]
 16992  	v_0 := v.Args[0]
 16993  	// match: (SRL x (MOVDconst [c]))
 16994  	// result: (SRLconst x [c&63])
 16995  	for {
 16996  		x := v_0
 16997  		if v_1.Op != ssaop.OpARM64MOVDconst {
 16998  			break
 16999  		}
 17000  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 17001  		v.Reset(ssaop.OpARM64SRLconst)
 17002  		v.AuxInt = ssa.Int64ToAuxInt(c & 63)
 17003  		v.AddArg(x)
 17004  		return true
 17005  	}
 17006  	// match: (SRL x (ANDconst [63] y))
 17007  	// result: (SRL x y)
 17008  	for {
 17009  		x := v_0
 17010  		if v_1.Op != ssaop.OpARM64ANDconst || ssa.AuxIntToInt64(v_1.AuxInt) != 63 {
 17011  			break
 17012  		}
 17013  		y := v_1.Args[0]
 17014  		v.Reset(ssaop.OpARM64SRL)
 17015  		v.AddArg2(x, y)
 17016  		return true
 17017  	}
 17018  	return false
 17019  }
 17020  func rewriteValue_OpARM64SRLconst(v *ssa.Value) bool {
 17021  	v_0 := v.Args[0]
 17022  	// match: (SRLconst [c] (MOVDconst [d]))
 17023  	// result: (MOVDconst [int64(uint64(d)>>uint64(c))])
 17024  	for {
 17025  		c := ssa.AuxIntToInt64(v.AuxInt)
 17026  		if v_0.Op != ssaop.OpARM64MOVDconst {
 17027  			break
 17028  		}
 17029  		d := ssa.AuxIntToInt64(v_0.AuxInt)
 17030  		v.Reset(ssaop.OpARM64MOVDconst)
 17031  		v.AuxInt = ssa.Int64ToAuxInt(int64(uint64(d) >> uint64(c)))
 17032  		return true
 17033  	}
 17034  	// match: (SRLconst [c] (SLLconst [c] x))
 17035  	// cond: 0 < c && c < 64
 17036  	// result: (ANDconst [1<<uint(64-c)-1] x)
 17037  	for {
 17038  		c := ssa.AuxIntToInt64(v.AuxInt)
 17039  		if v_0.Op != ssaop.OpARM64SLLconst || ssa.AuxIntToInt64(v_0.AuxInt) != c {
 17040  			break
 17041  		}
 17042  		x := v_0.Args[0]
 17043  		if !(0 < c && c < 64) {
 17044  			break
 17045  		}
 17046  		v.Reset(ssaop.OpARM64ANDconst)
 17047  		v.AuxInt = ssa.Int64ToAuxInt(1<<uint(64-c) - 1)
 17048  		v.AddArg(x)
 17049  		return true
 17050  	}
 17051  	// match: (SRLconst [rc] (MOVWUreg x))
 17052  	// cond: rc >= 32
 17053  	// result: (MOVDconst [0])
 17054  	for {
 17055  		rc := ssa.AuxIntToInt64(v.AuxInt)
 17056  		if v_0.Op != ssaop.OpARM64MOVWUreg {
 17057  			break
 17058  		}
 17059  		if !(rc >= 32) {
 17060  			break
 17061  		}
 17062  		v.Reset(ssaop.OpARM64MOVDconst)
 17063  		v.AuxInt = ssa.Int64ToAuxInt(0)
 17064  		return true
 17065  	}
 17066  	// match: (SRLconst [rc] (MOVHUreg x))
 17067  	// cond: rc >= 16
 17068  	// result: (MOVDconst [0])
 17069  	for {
 17070  		rc := ssa.AuxIntToInt64(v.AuxInt)
 17071  		if v_0.Op != ssaop.OpARM64MOVHUreg {
 17072  			break
 17073  		}
 17074  		if !(rc >= 16) {
 17075  			break
 17076  		}
 17077  		v.Reset(ssaop.OpARM64MOVDconst)
 17078  		v.AuxInt = ssa.Int64ToAuxInt(0)
 17079  		return true
 17080  	}
 17081  	// match: (SRLconst [rc] (MOVBUreg x))
 17082  	// cond: rc >= 8
 17083  	// result: (MOVDconst [0])
 17084  	for {
 17085  		rc := ssa.AuxIntToInt64(v.AuxInt)
 17086  		if v_0.Op != ssaop.OpARM64MOVBUreg {
 17087  			break
 17088  		}
 17089  		if !(rc >= 8) {
 17090  			break
 17091  		}
 17092  		v.Reset(ssaop.OpARM64MOVDconst)
 17093  		v.AuxInt = ssa.Int64ToAuxInt(0)
 17094  		return true
 17095  	}
 17096  	// match: (SRLconst [rc] (SLLconst [lc] x))
 17097  	// cond: lc > rc
 17098  	// result: (UBFIZ [ssa.ArmBFAuxInt(lc-rc, 64-lc)] x)
 17099  	for {
 17100  		rc := ssa.AuxIntToInt64(v.AuxInt)
 17101  		if v_0.Op != ssaop.OpARM64SLLconst {
 17102  			break
 17103  		}
 17104  		lc := ssa.AuxIntToInt64(v_0.AuxInt)
 17105  		x := v_0.Args[0]
 17106  		if !(lc > rc) {
 17107  			break
 17108  		}
 17109  		v.Reset(ssaop.OpARM64UBFIZ)
 17110  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(lc-rc, 64-lc))
 17111  		v.AddArg(x)
 17112  		return true
 17113  	}
 17114  	// match: (SRLconst [rc] (SLLconst [lc] x))
 17115  	// cond: lc < rc
 17116  	// result: (UBFX [ssa.ArmBFAuxInt(rc-lc, 64-rc)] x)
 17117  	for {
 17118  		rc := ssa.AuxIntToInt64(v.AuxInt)
 17119  		if v_0.Op != ssaop.OpARM64SLLconst {
 17120  			break
 17121  		}
 17122  		lc := ssa.AuxIntToInt64(v_0.AuxInt)
 17123  		x := v_0.Args[0]
 17124  		if !(lc < rc) {
 17125  			break
 17126  		}
 17127  		v.Reset(ssaop.OpARM64UBFX)
 17128  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(rc-lc, 64-rc))
 17129  		v.AddArg(x)
 17130  		return true
 17131  	}
 17132  	// match: (SRLconst [rc] (MOVWUreg x))
 17133  	// cond: rc < 32
 17134  	// result: (UBFX [ssa.ArmBFAuxInt(rc, 32-rc)] x)
 17135  	for {
 17136  		rc := ssa.AuxIntToInt64(v.AuxInt)
 17137  		if v_0.Op != ssaop.OpARM64MOVWUreg {
 17138  			break
 17139  		}
 17140  		x := v_0.Args[0]
 17141  		if !(rc < 32) {
 17142  			break
 17143  		}
 17144  		v.Reset(ssaop.OpARM64UBFX)
 17145  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(rc, 32-rc))
 17146  		v.AddArg(x)
 17147  		return true
 17148  	}
 17149  	// match: (SRLconst [rc] (MOVHUreg x))
 17150  	// cond: rc < 16
 17151  	// result: (UBFX [ssa.ArmBFAuxInt(rc, 16-rc)] x)
 17152  	for {
 17153  		rc := ssa.AuxIntToInt64(v.AuxInt)
 17154  		if v_0.Op != ssaop.OpARM64MOVHUreg {
 17155  			break
 17156  		}
 17157  		x := v_0.Args[0]
 17158  		if !(rc < 16) {
 17159  			break
 17160  		}
 17161  		v.Reset(ssaop.OpARM64UBFX)
 17162  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(rc, 16-rc))
 17163  		v.AddArg(x)
 17164  		return true
 17165  	}
 17166  	// match: (SRLconst [rc] (MOVBUreg x))
 17167  	// cond: rc < 8
 17168  	// result: (UBFX [ssa.ArmBFAuxInt(rc, 8-rc)] x)
 17169  	for {
 17170  		rc := ssa.AuxIntToInt64(v.AuxInt)
 17171  		if v_0.Op != ssaop.OpARM64MOVBUreg {
 17172  			break
 17173  		}
 17174  		x := v_0.Args[0]
 17175  		if !(rc < 8) {
 17176  			break
 17177  		}
 17178  		v.Reset(ssaop.OpARM64UBFX)
 17179  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(rc, 8-rc))
 17180  		v.AddArg(x)
 17181  		return true
 17182  	}
 17183  	// match: (SRLconst [sc] (ANDconst [ac] x))
 17184  	// cond: isARM64BFMask(sc, ac, sc)
 17185  	// result: (UBFX [ssa.ArmBFAuxInt(sc, arm64BFWidth(ac, sc))] x)
 17186  	for {
 17187  		sc := ssa.AuxIntToInt64(v.AuxInt)
 17188  		if v_0.Op != ssaop.OpARM64ANDconst {
 17189  			break
 17190  		}
 17191  		ac := ssa.AuxIntToInt64(v_0.AuxInt)
 17192  		x := v_0.Args[0]
 17193  		if !(isARM64BFMask(sc, ac, sc)) {
 17194  			break
 17195  		}
 17196  		v.Reset(ssaop.OpARM64UBFX)
 17197  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(sc, arm64BFWidth(ac, sc)))
 17198  		v.AddArg(x)
 17199  		return true
 17200  	}
 17201  	// match: (SRLconst [sc] (UBFX [bfc] x))
 17202  	// cond: sc < bfc.Width()
 17203  	// result: (UBFX [ssa.ArmBFAuxInt(bfc.Lsb()+sc, bfc.Width()-sc)] x)
 17204  	for {
 17205  		sc := ssa.AuxIntToInt64(v.AuxInt)
 17206  		if v_0.Op != ssaop.OpARM64UBFX {
 17207  			break
 17208  		}
 17209  		bfc := ssa.AuxIntToArm64BitField(v_0.AuxInt)
 17210  		x := v_0.Args[0]
 17211  		if !(sc < bfc.Width()) {
 17212  			break
 17213  		}
 17214  		v.Reset(ssaop.OpARM64UBFX)
 17215  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(bfc.Lsb()+sc, bfc.Width()-sc))
 17216  		v.AddArg(x)
 17217  		return true
 17218  	}
 17219  	// match: (SRLconst [sc] (UBFIZ [bfc] x))
 17220  	// cond: sc == bfc.Lsb()
 17221  	// result: (ANDconst [1<<uint(bfc.Width())-1] x)
 17222  	for {
 17223  		sc := ssa.AuxIntToInt64(v.AuxInt)
 17224  		if v_0.Op != ssaop.OpARM64UBFIZ {
 17225  			break
 17226  		}
 17227  		bfc := ssa.AuxIntToArm64BitField(v_0.AuxInt)
 17228  		x := v_0.Args[0]
 17229  		if !(sc == bfc.Lsb()) {
 17230  			break
 17231  		}
 17232  		v.Reset(ssaop.OpARM64ANDconst)
 17233  		v.AuxInt = ssa.Int64ToAuxInt(1<<uint(bfc.Width()) - 1)
 17234  		v.AddArg(x)
 17235  		return true
 17236  	}
 17237  	// match: (SRLconst [sc] (UBFIZ [bfc] x))
 17238  	// cond: sc < bfc.Lsb()
 17239  	// result: (UBFIZ [ssa.ArmBFAuxInt(bfc.Lsb()-sc, bfc.Width())] x)
 17240  	for {
 17241  		sc := ssa.AuxIntToInt64(v.AuxInt)
 17242  		if v_0.Op != ssaop.OpARM64UBFIZ {
 17243  			break
 17244  		}
 17245  		bfc := ssa.AuxIntToArm64BitField(v_0.AuxInt)
 17246  		x := v_0.Args[0]
 17247  		if !(sc < bfc.Lsb()) {
 17248  			break
 17249  		}
 17250  		v.Reset(ssaop.OpARM64UBFIZ)
 17251  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(bfc.Lsb()-sc, bfc.Width()))
 17252  		v.AddArg(x)
 17253  		return true
 17254  	}
 17255  	// match: (SRLconst [sc] (UBFIZ [bfc] x))
 17256  	// cond: sc > bfc.Lsb() && sc < bfc.Lsb()+bfc.Width()
 17257  	// result: (UBFX [ssa.ArmBFAuxInt(sc-bfc.Lsb(), bfc.Lsb()+bfc.Width()-sc)] x)
 17258  	for {
 17259  		sc := ssa.AuxIntToInt64(v.AuxInt)
 17260  		if v_0.Op != ssaop.OpARM64UBFIZ {
 17261  			break
 17262  		}
 17263  		bfc := ssa.AuxIntToArm64BitField(v_0.AuxInt)
 17264  		x := v_0.Args[0]
 17265  		if !(sc > bfc.Lsb() && sc < bfc.Lsb()+bfc.Width()) {
 17266  			break
 17267  		}
 17268  		v.Reset(ssaop.OpARM64UBFX)
 17269  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(sc-bfc.Lsb(), bfc.Lsb()+bfc.Width()-sc))
 17270  		v.AddArg(x)
 17271  		return true
 17272  	}
 17273  	return false
 17274  }
 17275  func rewriteValue_OpARM64STP(v *ssa.Value) bool {
 17276  	v_3 := v.Args[3]
 17277  	v_2 := v.Args[2]
 17278  	v_1 := v.Args[1]
 17279  	v_0 := v.Args[0]
 17280  	b := v.Block
 17281  	config := b.Func.Config
 17282  	// match: (STP [off1] {sym} (ADDconst [off2] ptr) val1 val2 mem)
 17283  	// cond: ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)
 17284  	// result: (STP [off1+int32(off2)] {sym} ptr val1 val2 mem)
 17285  	for {
 17286  		off1 := ssa.AuxIntToInt32(v.AuxInt)
 17287  		sym := ssa.AuxToSym(v.Aux)
 17288  		if v_0.Op != ssaop.OpARM64ADDconst {
 17289  			break
 17290  		}
 17291  		off2 := ssa.AuxIntToInt64(v_0.AuxInt)
 17292  		ptr := v_0.Args[0]
 17293  		val1 := v_1
 17294  		val2 := v_2
 17295  		mem := v_3
 17296  		if !(ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)) {
 17297  			break
 17298  		}
 17299  		v.Reset(ssaop.OpARM64STP)
 17300  		v.AuxInt = ssa.Int32ToAuxInt(off1 + int32(off2))
 17301  		v.Aux = ssa.SymToAux(sym)
 17302  		v.AddArg4(ptr, val1, val2, mem)
 17303  		return true
 17304  	}
 17305  	// match: (STP [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) val1 val2 mem)
 17306  	// cond: ssa.CanMergeSym(sym1,sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)
 17307  	// result: (STP [off1+off2] {ssa.MergeSym(sym1,sym2)} ptr val1 val2 mem)
 17308  	for {
 17309  		off1 := ssa.AuxIntToInt32(v.AuxInt)
 17310  		sym1 := ssa.AuxToSym(v.Aux)
 17311  		if v_0.Op != ssaop.OpARM64MOVDaddr {
 17312  			break
 17313  		}
 17314  		off2 := ssa.AuxIntToInt32(v_0.AuxInt)
 17315  		sym2 := ssa.AuxToSym(v_0.Aux)
 17316  		ptr := v_0.Args[0]
 17317  		val1 := v_1
 17318  		val2 := v_2
 17319  		mem := v_3
 17320  		if !(ssa.CanMergeSym(sym1, sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)) {
 17321  			break
 17322  		}
 17323  		v.Reset(ssaop.OpARM64STP)
 17324  		v.AuxInt = ssa.Int32ToAuxInt(off1 + off2)
 17325  		v.Aux = ssa.SymToAux(ssa.MergeSym(sym1, sym2))
 17326  		v.AddArg4(ptr, val1, val2, mem)
 17327  		return true
 17328  	}
 17329  	return false
 17330  }
 17331  func rewriteValue_OpARM64SUB(v *ssa.Value) bool {
 17332  	v_1 := v.Args[1]
 17333  	v_0 := v.Args[0]
 17334  	b := v.Block
 17335  	// match: (SUB x (MOVDconst [c]))
 17336  	// result: (SUBconst [c] x)
 17337  	for {
 17338  		x := v_0
 17339  		if v_1.Op != ssaop.OpARM64MOVDconst {
 17340  			break
 17341  		}
 17342  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 17343  		v.Reset(ssaop.OpARM64SUBconst)
 17344  		v.AuxInt = ssa.Int64ToAuxInt(c)
 17345  		v.AddArg(x)
 17346  		return true
 17347  	}
 17348  	// match: (SUB a l:(MUL x y))
 17349  	// cond: l.Uses==1 && ssa.Clobber(l)
 17350  	// result: (MSUB a x y)
 17351  	for {
 17352  		a := v_0
 17353  		l := v_1
 17354  		if l.Op != ssaop.OpARM64MUL {
 17355  			break
 17356  		}
 17357  		y := l.Args[1]
 17358  		x := l.Args[0]
 17359  		if !(l.Uses == 1 && ssa.Clobber(l)) {
 17360  			break
 17361  		}
 17362  		v.Reset(ssaop.OpARM64MSUB)
 17363  		v.AddArg3(a, x, y)
 17364  		return true
 17365  	}
 17366  	// match: (SUB a l:(MNEG x y))
 17367  	// cond: l.Uses==1 && ssa.Clobber(l)
 17368  	// result: (MADD a x y)
 17369  	for {
 17370  		a := v_0
 17371  		l := v_1
 17372  		if l.Op != ssaop.OpARM64MNEG {
 17373  			break
 17374  		}
 17375  		y := l.Args[1]
 17376  		x := l.Args[0]
 17377  		if !(l.Uses == 1 && ssa.Clobber(l)) {
 17378  			break
 17379  		}
 17380  		v.Reset(ssaop.OpARM64MADD)
 17381  		v.AddArg3(a, x, y)
 17382  		return true
 17383  	}
 17384  	// match: (SUB a l:(MULW x y))
 17385  	// cond: v.Type.Size() <= 4 && l.Uses==1 && ssa.Clobber(l)
 17386  	// result: (MSUBW a x y)
 17387  	for {
 17388  		a := v_0
 17389  		l := v_1
 17390  		if l.Op != ssaop.OpARM64MULW {
 17391  			break
 17392  		}
 17393  		y := l.Args[1]
 17394  		x := l.Args[0]
 17395  		if !(v.Type.Size() <= 4 && l.Uses == 1 && ssa.Clobber(l)) {
 17396  			break
 17397  		}
 17398  		v.Reset(ssaop.OpARM64MSUBW)
 17399  		v.AddArg3(a, x, y)
 17400  		return true
 17401  	}
 17402  	// match: (SUB a l:(MNEGW x y))
 17403  	// cond: v.Type.Size() <= 4 && l.Uses==1 && ssa.Clobber(l)
 17404  	// result: (MADDW a x y)
 17405  	for {
 17406  		a := v_0
 17407  		l := v_1
 17408  		if l.Op != ssaop.OpARM64MNEGW {
 17409  			break
 17410  		}
 17411  		y := l.Args[1]
 17412  		x := l.Args[0]
 17413  		if !(v.Type.Size() <= 4 && l.Uses == 1 && ssa.Clobber(l)) {
 17414  			break
 17415  		}
 17416  		v.Reset(ssaop.OpARM64MADDW)
 17417  		v.AddArg3(a, x, y)
 17418  		return true
 17419  	}
 17420  	// match: (SUB <t> a p:(ADDconst [c] m:(MUL _ _)))
 17421  	// cond: p.Uses==1 && m.Uses==1 && !t.IsPtrShaped()
 17422  	// result: (SUBconst [c] (SUB <v.Type> a m))
 17423  	for {
 17424  		t := v.Type
 17425  		a := v_0
 17426  		p := v_1
 17427  		if p.Op != ssaop.OpARM64ADDconst {
 17428  			break
 17429  		}
 17430  		c := ssa.AuxIntToInt64(p.AuxInt)
 17431  		m := p.Args[0]
 17432  		if m.Op != ssaop.OpARM64MUL || !(p.Uses == 1 && m.Uses == 1 && !t.IsPtrShaped()) {
 17433  			break
 17434  		}
 17435  		v.Reset(ssaop.OpARM64SUBconst)
 17436  		v.AuxInt = ssa.Int64ToAuxInt(c)
 17437  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SUB, v.Type)
 17438  		v0.AddArg2(a, m)
 17439  		v.AddArg(v0)
 17440  		return true
 17441  	}
 17442  	// match: (SUB <t> a p:(ADDconst [c] m:(MULW _ _)))
 17443  	// cond: p.Uses==1 && m.Uses==1 && !t.IsPtrShaped()
 17444  	// result: (SUBconst [c] (SUB <v.Type> a m))
 17445  	for {
 17446  		t := v.Type
 17447  		a := v_0
 17448  		p := v_1
 17449  		if p.Op != ssaop.OpARM64ADDconst {
 17450  			break
 17451  		}
 17452  		c := ssa.AuxIntToInt64(p.AuxInt)
 17453  		m := p.Args[0]
 17454  		if m.Op != ssaop.OpARM64MULW || !(p.Uses == 1 && m.Uses == 1 && !t.IsPtrShaped()) {
 17455  			break
 17456  		}
 17457  		v.Reset(ssaop.OpARM64SUBconst)
 17458  		v.AuxInt = ssa.Int64ToAuxInt(c)
 17459  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SUB, v.Type)
 17460  		v0.AddArg2(a, m)
 17461  		v.AddArg(v0)
 17462  		return true
 17463  	}
 17464  	// match: (SUB <t> a p:(ADDconst [c] m:(MNEG _ _)))
 17465  	// cond: p.Uses==1 && m.Uses==1 && !t.IsPtrShaped()
 17466  	// result: (SUBconst [c] (SUB <v.Type> a m))
 17467  	for {
 17468  		t := v.Type
 17469  		a := v_0
 17470  		p := v_1
 17471  		if p.Op != ssaop.OpARM64ADDconst {
 17472  			break
 17473  		}
 17474  		c := ssa.AuxIntToInt64(p.AuxInt)
 17475  		m := p.Args[0]
 17476  		if m.Op != ssaop.OpARM64MNEG || !(p.Uses == 1 && m.Uses == 1 && !t.IsPtrShaped()) {
 17477  			break
 17478  		}
 17479  		v.Reset(ssaop.OpARM64SUBconst)
 17480  		v.AuxInt = ssa.Int64ToAuxInt(c)
 17481  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SUB, v.Type)
 17482  		v0.AddArg2(a, m)
 17483  		v.AddArg(v0)
 17484  		return true
 17485  	}
 17486  	// match: (SUB <t> a p:(ADDconst [c] m:(MNEGW _ _)))
 17487  	// cond: p.Uses==1 && m.Uses==1 && !t.IsPtrShaped()
 17488  	// result: (SUBconst [c] (SUB <v.Type> a m))
 17489  	for {
 17490  		t := v.Type
 17491  		a := v_0
 17492  		p := v_1
 17493  		if p.Op != ssaop.OpARM64ADDconst {
 17494  			break
 17495  		}
 17496  		c := ssa.AuxIntToInt64(p.AuxInt)
 17497  		m := p.Args[0]
 17498  		if m.Op != ssaop.OpARM64MNEGW || !(p.Uses == 1 && m.Uses == 1 && !t.IsPtrShaped()) {
 17499  			break
 17500  		}
 17501  		v.Reset(ssaop.OpARM64SUBconst)
 17502  		v.AuxInt = ssa.Int64ToAuxInt(c)
 17503  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SUB, v.Type)
 17504  		v0.AddArg2(a, m)
 17505  		v.AddArg(v0)
 17506  		return true
 17507  	}
 17508  	// match: (SUB <t> a p:(SUBconst [c] m:(MUL _ _)))
 17509  	// cond: p.Uses==1 && m.Uses==1 && !t.IsPtrShaped()
 17510  	// result: (ADDconst [c] (SUB <v.Type> a m))
 17511  	for {
 17512  		t := v.Type
 17513  		a := v_0
 17514  		p := v_1
 17515  		if p.Op != ssaop.OpARM64SUBconst {
 17516  			break
 17517  		}
 17518  		c := ssa.AuxIntToInt64(p.AuxInt)
 17519  		m := p.Args[0]
 17520  		if m.Op != ssaop.OpARM64MUL || !(p.Uses == 1 && m.Uses == 1 && !t.IsPtrShaped()) {
 17521  			break
 17522  		}
 17523  		v.Reset(ssaop.OpARM64ADDconst)
 17524  		v.AuxInt = ssa.Int64ToAuxInt(c)
 17525  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SUB, v.Type)
 17526  		v0.AddArg2(a, m)
 17527  		v.AddArg(v0)
 17528  		return true
 17529  	}
 17530  	// match: (SUB <t> a p:(SUBconst [c] m:(MULW _ _)))
 17531  	// cond: p.Uses==1 && m.Uses==1 && !t.IsPtrShaped()
 17532  	// result: (ADDconst [c] (SUB <v.Type> a m))
 17533  	for {
 17534  		t := v.Type
 17535  		a := v_0
 17536  		p := v_1
 17537  		if p.Op != ssaop.OpARM64SUBconst {
 17538  			break
 17539  		}
 17540  		c := ssa.AuxIntToInt64(p.AuxInt)
 17541  		m := p.Args[0]
 17542  		if m.Op != ssaop.OpARM64MULW || !(p.Uses == 1 && m.Uses == 1 && !t.IsPtrShaped()) {
 17543  			break
 17544  		}
 17545  		v.Reset(ssaop.OpARM64ADDconst)
 17546  		v.AuxInt = ssa.Int64ToAuxInt(c)
 17547  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SUB, v.Type)
 17548  		v0.AddArg2(a, m)
 17549  		v.AddArg(v0)
 17550  		return true
 17551  	}
 17552  	// match: (SUB <t> a p:(SUBconst [c] m:(MNEG _ _)))
 17553  	// cond: p.Uses==1 && m.Uses==1 && !t.IsPtrShaped()
 17554  	// result: (ADDconst [c] (SUB <v.Type> a m))
 17555  	for {
 17556  		t := v.Type
 17557  		a := v_0
 17558  		p := v_1
 17559  		if p.Op != ssaop.OpARM64SUBconst {
 17560  			break
 17561  		}
 17562  		c := ssa.AuxIntToInt64(p.AuxInt)
 17563  		m := p.Args[0]
 17564  		if m.Op != ssaop.OpARM64MNEG || !(p.Uses == 1 && m.Uses == 1 && !t.IsPtrShaped()) {
 17565  			break
 17566  		}
 17567  		v.Reset(ssaop.OpARM64ADDconst)
 17568  		v.AuxInt = ssa.Int64ToAuxInt(c)
 17569  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SUB, v.Type)
 17570  		v0.AddArg2(a, m)
 17571  		v.AddArg(v0)
 17572  		return true
 17573  	}
 17574  	// match: (SUB <t> a p:(SUBconst [c] m:(MNEGW _ _)))
 17575  	// cond: p.Uses==1 && m.Uses==1 && !t.IsPtrShaped()
 17576  	// result: (ADDconst [c] (SUB <v.Type> a m))
 17577  	for {
 17578  		t := v.Type
 17579  		a := v_0
 17580  		p := v_1
 17581  		if p.Op != ssaop.OpARM64SUBconst {
 17582  			break
 17583  		}
 17584  		c := ssa.AuxIntToInt64(p.AuxInt)
 17585  		m := p.Args[0]
 17586  		if m.Op != ssaop.OpARM64MNEGW || !(p.Uses == 1 && m.Uses == 1 && !t.IsPtrShaped()) {
 17587  			break
 17588  		}
 17589  		v.Reset(ssaop.OpARM64ADDconst)
 17590  		v.AuxInt = ssa.Int64ToAuxInt(c)
 17591  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SUB, v.Type)
 17592  		v0.AddArg2(a, m)
 17593  		v.AddArg(v0)
 17594  		return true
 17595  	}
 17596  	// match: (SUB x (NEG y))
 17597  	// result: (ADD x y)
 17598  	for {
 17599  		x := v_0
 17600  		if v_1.Op != ssaop.OpARM64NEG {
 17601  			break
 17602  		}
 17603  		y := v_1.Args[0]
 17604  		v.Reset(ssaop.OpARM64ADD)
 17605  		v.AddArg2(x, y)
 17606  		return true
 17607  	}
 17608  	// match: (SUB x x)
 17609  	// result: (MOVDconst [0])
 17610  	for {
 17611  		x := v_0
 17612  		if x != v_1 {
 17613  			break
 17614  		}
 17615  		v.Reset(ssaop.OpARM64MOVDconst)
 17616  		v.AuxInt = ssa.Int64ToAuxInt(0)
 17617  		return true
 17618  	}
 17619  	// match: (SUB x (SUB y z))
 17620  	// result: (SUB (ADD <v.Type> x z) y)
 17621  	for {
 17622  		x := v_0
 17623  		if v_1.Op != ssaop.OpARM64SUB {
 17624  			break
 17625  		}
 17626  		z := v_1.Args[1]
 17627  		y := v_1.Args[0]
 17628  		v.Reset(ssaop.OpARM64SUB)
 17629  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64ADD, v.Type)
 17630  		v0.AddArg2(x, z)
 17631  		v.AddArg2(v0, y)
 17632  		return true
 17633  	}
 17634  	// match: (SUB (SUB x y) z)
 17635  	// result: (SUB x (ADD <y.Type> y z))
 17636  	for {
 17637  		if v_0.Op != ssaop.OpARM64SUB {
 17638  			break
 17639  		}
 17640  		y := v_0.Args[1]
 17641  		x := v_0.Args[0]
 17642  		z := v_1
 17643  		v.Reset(ssaop.OpARM64SUB)
 17644  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64ADD, y.Type)
 17645  		v0.AddArg2(y, z)
 17646  		v.AddArg2(x, v0)
 17647  		return true
 17648  	}
 17649  	// match: (SUB x0 x1:(SLLconst [c] y))
 17650  	// cond: ssa.ClobberIfDead(x1)
 17651  	// result: (SUBshiftLL x0 y [c])
 17652  	for {
 17653  		x0 := v_0
 17654  		x1 := v_1
 17655  		if x1.Op != ssaop.OpARM64SLLconst {
 17656  			break
 17657  		}
 17658  		c := ssa.AuxIntToInt64(x1.AuxInt)
 17659  		y := x1.Args[0]
 17660  		if !(ssa.ClobberIfDead(x1)) {
 17661  			break
 17662  		}
 17663  		v.Reset(ssaop.OpARM64SUBshiftLL)
 17664  		v.AuxInt = ssa.Int64ToAuxInt(c)
 17665  		v.AddArg2(x0, y)
 17666  		return true
 17667  	}
 17668  	// match: (SUB x0 x1:(SRLconst [c] y))
 17669  	// cond: ssa.ClobberIfDead(x1)
 17670  	// result: (SUBshiftRL x0 y [c])
 17671  	for {
 17672  		x0 := v_0
 17673  		x1 := v_1
 17674  		if x1.Op != ssaop.OpARM64SRLconst {
 17675  			break
 17676  		}
 17677  		c := ssa.AuxIntToInt64(x1.AuxInt)
 17678  		y := x1.Args[0]
 17679  		if !(ssa.ClobberIfDead(x1)) {
 17680  			break
 17681  		}
 17682  		v.Reset(ssaop.OpARM64SUBshiftRL)
 17683  		v.AuxInt = ssa.Int64ToAuxInt(c)
 17684  		v.AddArg2(x0, y)
 17685  		return true
 17686  	}
 17687  	// match: (SUB x0 x1:(SRAconst [c] y))
 17688  	// cond: ssa.ClobberIfDead(x1)
 17689  	// result: (SUBshiftRA x0 y [c])
 17690  	for {
 17691  		x0 := v_0
 17692  		x1 := v_1
 17693  		if x1.Op != ssaop.OpARM64SRAconst {
 17694  			break
 17695  		}
 17696  		c := ssa.AuxIntToInt64(x1.AuxInt)
 17697  		y := x1.Args[0]
 17698  		if !(ssa.ClobberIfDead(x1)) {
 17699  			break
 17700  		}
 17701  		v.Reset(ssaop.OpARM64SUBshiftRA)
 17702  		v.AuxInt = ssa.Int64ToAuxInt(c)
 17703  		v.AddArg2(x0, y)
 17704  		return true
 17705  	}
 17706  	return false
 17707  }
 17708  func rewriteValue_OpARM64SUBconst(v *ssa.Value) bool {
 17709  	v_0 := v.Args[0]
 17710  	// match: (SUBconst [0] x)
 17711  	// result: x
 17712  	for {
 17713  		if ssa.AuxIntToInt64(v.AuxInt) != 0 {
 17714  			break
 17715  		}
 17716  		x := v_0
 17717  		v.CopyOf(x)
 17718  		return true
 17719  	}
 17720  	// match: (SUBconst [c] (MOVDconst [d]))
 17721  	// result: (MOVDconst [d-c])
 17722  	for {
 17723  		c := ssa.AuxIntToInt64(v.AuxInt)
 17724  		if v_0.Op != ssaop.OpARM64MOVDconst {
 17725  			break
 17726  		}
 17727  		d := ssa.AuxIntToInt64(v_0.AuxInt)
 17728  		v.Reset(ssaop.OpARM64MOVDconst)
 17729  		v.AuxInt = ssa.Int64ToAuxInt(d - c)
 17730  		return true
 17731  	}
 17732  	// match: (SUBconst [c] (SUBconst [d] x))
 17733  	// result: (ADDconst [-c-d] x)
 17734  	for {
 17735  		c := ssa.AuxIntToInt64(v.AuxInt)
 17736  		if v_0.Op != ssaop.OpARM64SUBconst {
 17737  			break
 17738  		}
 17739  		d := ssa.AuxIntToInt64(v_0.AuxInt)
 17740  		x := v_0.Args[0]
 17741  		v.Reset(ssaop.OpARM64ADDconst)
 17742  		v.AuxInt = ssa.Int64ToAuxInt(-c - d)
 17743  		v.AddArg(x)
 17744  		return true
 17745  	}
 17746  	// match: (SUBconst [c] (ADDconst [d] x))
 17747  	// result: (ADDconst [-c+d] x)
 17748  	for {
 17749  		c := ssa.AuxIntToInt64(v.AuxInt)
 17750  		if v_0.Op != ssaop.OpARM64ADDconst {
 17751  			break
 17752  		}
 17753  		d := ssa.AuxIntToInt64(v_0.AuxInt)
 17754  		x := v_0.Args[0]
 17755  		v.Reset(ssaop.OpARM64ADDconst)
 17756  		v.AuxInt = ssa.Int64ToAuxInt(-c + d)
 17757  		v.AddArg(x)
 17758  		return true
 17759  	}
 17760  	return false
 17761  }
 17762  func rewriteValue_OpARM64SUBshiftLL(v *ssa.Value) bool {
 17763  	v_1 := v.Args[1]
 17764  	v_0 := v.Args[0]
 17765  	// match: (SUBshiftLL x (MOVDconst [c]) [d])
 17766  	// result: (SUBconst x [int64(uint64(c)<<uint64(d))])
 17767  	for {
 17768  		d := ssa.AuxIntToInt64(v.AuxInt)
 17769  		x := v_0
 17770  		if v_1.Op != ssaop.OpARM64MOVDconst {
 17771  			break
 17772  		}
 17773  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 17774  		v.Reset(ssaop.OpARM64SUBconst)
 17775  		v.AuxInt = ssa.Int64ToAuxInt(int64(uint64(c) << uint64(d)))
 17776  		v.AddArg(x)
 17777  		return true
 17778  	}
 17779  	// match: (SUBshiftLL (SLLconst x [c]) x [c])
 17780  	// result: (MOVDconst [0])
 17781  	for {
 17782  		c := ssa.AuxIntToInt64(v.AuxInt)
 17783  		if v_0.Op != ssaop.OpARM64SLLconst || ssa.AuxIntToInt64(v_0.AuxInt) != c {
 17784  			break
 17785  		}
 17786  		x := v_0.Args[0]
 17787  		if x != v_1 {
 17788  			break
 17789  		}
 17790  		v.Reset(ssaop.OpARM64MOVDconst)
 17791  		v.AuxInt = ssa.Int64ToAuxInt(0)
 17792  		return true
 17793  	}
 17794  	return false
 17795  }
 17796  func rewriteValue_OpARM64SUBshiftRA(v *ssa.Value) bool {
 17797  	v_1 := v.Args[1]
 17798  	v_0 := v.Args[0]
 17799  	// match: (SUBshiftRA x (MOVDconst [c]) [d])
 17800  	// result: (SUBconst x [c>>uint64(d)])
 17801  	for {
 17802  		d := ssa.AuxIntToInt64(v.AuxInt)
 17803  		x := v_0
 17804  		if v_1.Op != ssaop.OpARM64MOVDconst {
 17805  			break
 17806  		}
 17807  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 17808  		v.Reset(ssaop.OpARM64SUBconst)
 17809  		v.AuxInt = ssa.Int64ToAuxInt(c >> uint64(d))
 17810  		v.AddArg(x)
 17811  		return true
 17812  	}
 17813  	// match: (SUBshiftRA (SRAconst x [c]) x [c])
 17814  	// result: (MOVDconst [0])
 17815  	for {
 17816  		c := ssa.AuxIntToInt64(v.AuxInt)
 17817  		if v_0.Op != ssaop.OpARM64SRAconst || ssa.AuxIntToInt64(v_0.AuxInt) != c {
 17818  			break
 17819  		}
 17820  		x := v_0.Args[0]
 17821  		if x != v_1 {
 17822  			break
 17823  		}
 17824  		v.Reset(ssaop.OpARM64MOVDconst)
 17825  		v.AuxInt = ssa.Int64ToAuxInt(0)
 17826  		return true
 17827  	}
 17828  	return false
 17829  }
 17830  func rewriteValue_OpARM64SUBshiftRL(v *ssa.Value) bool {
 17831  	v_1 := v.Args[1]
 17832  	v_0 := v.Args[0]
 17833  	// match: (SUBshiftRL x (MOVDconst [c]) [d])
 17834  	// result: (SUBconst x [int64(uint64(c)>>uint64(d))])
 17835  	for {
 17836  		d := ssa.AuxIntToInt64(v.AuxInt)
 17837  		x := v_0
 17838  		if v_1.Op != ssaop.OpARM64MOVDconst {
 17839  			break
 17840  		}
 17841  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 17842  		v.Reset(ssaop.OpARM64SUBconst)
 17843  		v.AuxInt = ssa.Int64ToAuxInt(int64(uint64(c) >> uint64(d)))
 17844  		v.AddArg(x)
 17845  		return true
 17846  	}
 17847  	// match: (SUBshiftRL (SRLconst x [c]) x [c])
 17848  	// result: (MOVDconst [0])
 17849  	for {
 17850  		c := ssa.AuxIntToInt64(v.AuxInt)
 17851  		if v_0.Op != ssaop.OpARM64SRLconst || ssa.AuxIntToInt64(v_0.AuxInt) != c {
 17852  			break
 17853  		}
 17854  		x := v_0.Args[0]
 17855  		if x != v_1 {
 17856  			break
 17857  		}
 17858  		v.Reset(ssaop.OpARM64MOVDconst)
 17859  		v.AuxInt = ssa.Int64ToAuxInt(0)
 17860  		return true
 17861  	}
 17862  	return false
 17863  }
 17864  func rewriteValue_OpARM64TST(v *ssa.Value) bool {
 17865  	v_1 := v.Args[1]
 17866  	v_0 := v.Args[0]
 17867  	// match: (TST x (MOVDconst [c]))
 17868  	// result: (TSTconst [c] x)
 17869  	for {
 17870  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 17871  			x := v_0
 17872  			if v_1.Op != ssaop.OpARM64MOVDconst {
 17873  				continue
 17874  			}
 17875  			c := ssa.AuxIntToInt64(v_1.AuxInt)
 17876  			v.Reset(ssaop.OpARM64TSTconst)
 17877  			v.AuxInt = ssa.Int64ToAuxInt(c)
 17878  			v.AddArg(x)
 17879  			return true
 17880  		}
 17881  		break
 17882  	}
 17883  	// match: (TST x0 x1:(SLLconst [c] y))
 17884  	// cond: ssa.ClobberIfDead(x1)
 17885  	// result: (TSTshiftLL x0 y [c])
 17886  	for {
 17887  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 17888  			x0 := v_0
 17889  			x1 := v_1
 17890  			if x1.Op != ssaop.OpARM64SLLconst {
 17891  				continue
 17892  			}
 17893  			c := ssa.AuxIntToInt64(x1.AuxInt)
 17894  			y := x1.Args[0]
 17895  			if !(ssa.ClobberIfDead(x1)) {
 17896  				continue
 17897  			}
 17898  			v.Reset(ssaop.OpARM64TSTshiftLL)
 17899  			v.AuxInt = ssa.Int64ToAuxInt(c)
 17900  			v.AddArg2(x0, y)
 17901  			return true
 17902  		}
 17903  		break
 17904  	}
 17905  	// match: (TST x0 x1:(SRLconst [c] y))
 17906  	// cond: ssa.ClobberIfDead(x1)
 17907  	// result: (TSTshiftRL x0 y [c])
 17908  	for {
 17909  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 17910  			x0 := v_0
 17911  			x1 := v_1
 17912  			if x1.Op != ssaop.OpARM64SRLconst {
 17913  				continue
 17914  			}
 17915  			c := ssa.AuxIntToInt64(x1.AuxInt)
 17916  			y := x1.Args[0]
 17917  			if !(ssa.ClobberIfDead(x1)) {
 17918  				continue
 17919  			}
 17920  			v.Reset(ssaop.OpARM64TSTshiftRL)
 17921  			v.AuxInt = ssa.Int64ToAuxInt(c)
 17922  			v.AddArg2(x0, y)
 17923  			return true
 17924  		}
 17925  		break
 17926  	}
 17927  	// match: (TST x0 x1:(SRAconst [c] y))
 17928  	// cond: ssa.ClobberIfDead(x1)
 17929  	// result: (TSTshiftRA x0 y [c])
 17930  	for {
 17931  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 17932  			x0 := v_0
 17933  			x1 := v_1
 17934  			if x1.Op != ssaop.OpARM64SRAconst {
 17935  				continue
 17936  			}
 17937  			c := ssa.AuxIntToInt64(x1.AuxInt)
 17938  			y := x1.Args[0]
 17939  			if !(ssa.ClobberIfDead(x1)) {
 17940  				continue
 17941  			}
 17942  			v.Reset(ssaop.OpARM64TSTshiftRA)
 17943  			v.AuxInt = ssa.Int64ToAuxInt(c)
 17944  			v.AddArg2(x0, y)
 17945  			return true
 17946  		}
 17947  		break
 17948  	}
 17949  	// match: (TST x0 x1:(RORconst [c] y))
 17950  	// cond: ssa.ClobberIfDead(x1)
 17951  	// result: (TSTshiftRO x0 y [c])
 17952  	for {
 17953  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 17954  			x0 := v_0
 17955  			x1 := v_1
 17956  			if x1.Op != ssaop.OpARM64RORconst {
 17957  				continue
 17958  			}
 17959  			c := ssa.AuxIntToInt64(x1.AuxInt)
 17960  			y := x1.Args[0]
 17961  			if !(ssa.ClobberIfDead(x1)) {
 17962  				continue
 17963  			}
 17964  			v.Reset(ssaop.OpARM64TSTshiftRO)
 17965  			v.AuxInt = ssa.Int64ToAuxInt(c)
 17966  			v.AddArg2(x0, y)
 17967  			return true
 17968  		}
 17969  		break
 17970  	}
 17971  	return false
 17972  }
 17973  func rewriteValue_OpARM64TSTW(v *ssa.Value) bool {
 17974  	v_1 := v.Args[1]
 17975  	v_0 := v.Args[0]
 17976  	// match: (TSTW x (MOVDconst [c]))
 17977  	// result: (TSTWconst [int32(c)] x)
 17978  	for {
 17979  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 17980  			x := v_0
 17981  			if v_1.Op != ssaop.OpARM64MOVDconst {
 17982  				continue
 17983  			}
 17984  			c := ssa.AuxIntToInt64(v_1.AuxInt)
 17985  			v.Reset(ssaop.OpARM64TSTWconst)
 17986  			v.AuxInt = ssa.Int32ToAuxInt(int32(c))
 17987  			v.AddArg(x)
 17988  			return true
 17989  		}
 17990  		break
 17991  	}
 17992  	return false
 17993  }
 17994  func rewriteValue_OpARM64TSTWconst(v *ssa.Value) bool {
 17995  	v_0 := v.Args[0]
 17996  	// match: (TSTWconst (MOVDconst [x]) [y])
 17997  	// result: (FlagConstant [ssa.LogicFlags32(int32(x)&y)])
 17998  	for {
 17999  		y := ssa.AuxIntToInt32(v.AuxInt)
 18000  		if v_0.Op != ssaop.OpARM64MOVDconst {
 18001  			break
 18002  		}
 18003  		x := ssa.AuxIntToInt64(v_0.AuxInt)
 18004  		v.Reset(ssaop.OpARM64FlagConstant)
 18005  		v.AuxInt = ssa.FlagConstantToAuxInt(ssa.LogicFlags32(int32(x) & y))
 18006  		return true
 18007  	}
 18008  	return false
 18009  }
 18010  func rewriteValue_OpARM64TSTconst(v *ssa.Value) bool {
 18011  	v_0 := v.Args[0]
 18012  	// match: (TSTconst (MOVDconst [x]) [y])
 18013  	// result: (FlagConstant [ssa.LogicFlags64(x&y)])
 18014  	for {
 18015  		y := ssa.AuxIntToInt64(v.AuxInt)
 18016  		if v_0.Op != ssaop.OpARM64MOVDconst {
 18017  			break
 18018  		}
 18019  		x := ssa.AuxIntToInt64(v_0.AuxInt)
 18020  		v.Reset(ssaop.OpARM64FlagConstant)
 18021  		v.AuxInt = ssa.FlagConstantToAuxInt(ssa.LogicFlags64(x & y))
 18022  		return true
 18023  	}
 18024  	return false
 18025  }
 18026  func rewriteValue_OpARM64TSTshiftLL(v *ssa.Value) bool {
 18027  	v_1 := v.Args[1]
 18028  	v_0 := v.Args[0]
 18029  	b := v.Block
 18030  	// match: (TSTshiftLL (MOVDconst [c]) x [d])
 18031  	// result: (TSTconst [c] (SLLconst <x.Type> x [d]))
 18032  	for {
 18033  		d := ssa.AuxIntToInt64(v.AuxInt)
 18034  		if v_0.Op != ssaop.OpARM64MOVDconst {
 18035  			break
 18036  		}
 18037  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 18038  		x := v_1
 18039  		v.Reset(ssaop.OpARM64TSTconst)
 18040  		v.AuxInt = ssa.Int64ToAuxInt(c)
 18041  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SLLconst, x.Type)
 18042  		v0.AuxInt = ssa.Int64ToAuxInt(d)
 18043  		v0.AddArg(x)
 18044  		v.AddArg(v0)
 18045  		return true
 18046  	}
 18047  	// match: (TSTshiftLL x (MOVDconst [c]) [d])
 18048  	// result: (TSTconst x [int64(uint64(c)<<uint64(d))])
 18049  	for {
 18050  		d := ssa.AuxIntToInt64(v.AuxInt)
 18051  		x := v_0
 18052  		if v_1.Op != ssaop.OpARM64MOVDconst {
 18053  			break
 18054  		}
 18055  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 18056  		v.Reset(ssaop.OpARM64TSTconst)
 18057  		v.AuxInt = ssa.Int64ToAuxInt(int64(uint64(c) << uint64(d)))
 18058  		v.AddArg(x)
 18059  		return true
 18060  	}
 18061  	return false
 18062  }
 18063  func rewriteValue_OpARM64TSTshiftRA(v *ssa.Value) bool {
 18064  	v_1 := v.Args[1]
 18065  	v_0 := v.Args[0]
 18066  	b := v.Block
 18067  	// match: (TSTshiftRA (MOVDconst [c]) x [d])
 18068  	// result: (TSTconst [c] (SRAconst <x.Type> x [d]))
 18069  	for {
 18070  		d := ssa.AuxIntToInt64(v.AuxInt)
 18071  		if v_0.Op != ssaop.OpARM64MOVDconst {
 18072  			break
 18073  		}
 18074  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 18075  		x := v_1
 18076  		v.Reset(ssaop.OpARM64TSTconst)
 18077  		v.AuxInt = ssa.Int64ToAuxInt(c)
 18078  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SRAconst, x.Type)
 18079  		v0.AuxInt = ssa.Int64ToAuxInt(d)
 18080  		v0.AddArg(x)
 18081  		v.AddArg(v0)
 18082  		return true
 18083  	}
 18084  	// match: (TSTshiftRA x (MOVDconst [c]) [d])
 18085  	// result: (TSTconst x [c>>uint64(d)])
 18086  	for {
 18087  		d := ssa.AuxIntToInt64(v.AuxInt)
 18088  		x := v_0
 18089  		if v_1.Op != ssaop.OpARM64MOVDconst {
 18090  			break
 18091  		}
 18092  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 18093  		v.Reset(ssaop.OpARM64TSTconst)
 18094  		v.AuxInt = ssa.Int64ToAuxInt(c >> uint64(d))
 18095  		v.AddArg(x)
 18096  		return true
 18097  	}
 18098  	return false
 18099  }
 18100  func rewriteValue_OpARM64TSTshiftRL(v *ssa.Value) bool {
 18101  	v_1 := v.Args[1]
 18102  	v_0 := v.Args[0]
 18103  	b := v.Block
 18104  	// match: (TSTshiftRL (MOVDconst [c]) x [d])
 18105  	// result: (TSTconst [c] (SRLconst <x.Type> x [d]))
 18106  	for {
 18107  		d := ssa.AuxIntToInt64(v.AuxInt)
 18108  		if v_0.Op != ssaop.OpARM64MOVDconst {
 18109  			break
 18110  		}
 18111  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 18112  		x := v_1
 18113  		v.Reset(ssaop.OpARM64TSTconst)
 18114  		v.AuxInt = ssa.Int64ToAuxInt(c)
 18115  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SRLconst, x.Type)
 18116  		v0.AuxInt = ssa.Int64ToAuxInt(d)
 18117  		v0.AddArg(x)
 18118  		v.AddArg(v0)
 18119  		return true
 18120  	}
 18121  	// match: (TSTshiftRL x (MOVDconst [c]) [d])
 18122  	// result: (TSTconst x [int64(uint64(c)>>uint64(d))])
 18123  	for {
 18124  		d := ssa.AuxIntToInt64(v.AuxInt)
 18125  		x := v_0
 18126  		if v_1.Op != ssaop.OpARM64MOVDconst {
 18127  			break
 18128  		}
 18129  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 18130  		v.Reset(ssaop.OpARM64TSTconst)
 18131  		v.AuxInt = ssa.Int64ToAuxInt(int64(uint64(c) >> uint64(d)))
 18132  		v.AddArg(x)
 18133  		return true
 18134  	}
 18135  	return false
 18136  }
 18137  func rewriteValue_OpARM64TSTshiftRO(v *ssa.Value) bool {
 18138  	v_1 := v.Args[1]
 18139  	v_0 := v.Args[0]
 18140  	b := v.Block
 18141  	// match: (TSTshiftRO (MOVDconst [c]) x [d])
 18142  	// result: (TSTconst [c] (RORconst <x.Type> x [d]))
 18143  	for {
 18144  		d := ssa.AuxIntToInt64(v.AuxInt)
 18145  		if v_0.Op != ssaop.OpARM64MOVDconst {
 18146  			break
 18147  		}
 18148  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 18149  		x := v_1
 18150  		v.Reset(ssaop.OpARM64TSTconst)
 18151  		v.AuxInt = ssa.Int64ToAuxInt(c)
 18152  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64RORconst, x.Type)
 18153  		v0.AuxInt = ssa.Int64ToAuxInt(d)
 18154  		v0.AddArg(x)
 18155  		v.AddArg(v0)
 18156  		return true
 18157  	}
 18158  	// match: (TSTshiftRO x (MOVDconst [c]) [d])
 18159  	// result: (TSTconst x [rotateRight64(c, d)])
 18160  	for {
 18161  		d := ssa.AuxIntToInt64(v.AuxInt)
 18162  		x := v_0
 18163  		if v_1.Op != ssaop.OpARM64MOVDconst {
 18164  			break
 18165  		}
 18166  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 18167  		v.Reset(ssaop.OpARM64TSTconst)
 18168  		v.AuxInt = ssa.Int64ToAuxInt(rotateRight64(c, d))
 18169  		v.AddArg(x)
 18170  		return true
 18171  	}
 18172  	return false
 18173  }
 18174  func rewriteValue_OpARM64UBFIZ(v *ssa.Value) bool {
 18175  	v_0 := v.Args[0]
 18176  	// match: (UBFIZ [bfc] (SLLconst [sc] x))
 18177  	// cond: sc < bfc.Width()
 18178  	// result: (UBFIZ [ssa.ArmBFAuxInt(bfc.Lsb()+sc, bfc.Width()-sc)] x)
 18179  	for {
 18180  		bfc := ssa.AuxIntToArm64BitField(v.AuxInt)
 18181  		if v_0.Op != ssaop.OpARM64SLLconst {
 18182  			break
 18183  		}
 18184  		sc := ssa.AuxIntToInt64(v_0.AuxInt)
 18185  		x := v_0.Args[0]
 18186  		if !(sc < bfc.Width()) {
 18187  			break
 18188  		}
 18189  		v.Reset(ssaop.OpARM64UBFIZ)
 18190  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(bfc.Lsb()+sc, bfc.Width()-sc))
 18191  		v.AddArg(x)
 18192  		return true
 18193  	}
 18194  	return false
 18195  }
 18196  func rewriteValue_OpARM64UBFX(v *ssa.Value) bool {
 18197  	v_0 := v.Args[0]
 18198  	// match: (UBFX [bfc] (ANDconst [c] x))
 18199  	// cond: isARM64BFMask(0, c, 0) && bfc.Lsb() + bfc.Width() <= arm64BFWidth(c, 0)
 18200  	// result: (UBFX [bfc] x)
 18201  	for {
 18202  		bfc := ssa.AuxIntToArm64BitField(v.AuxInt)
 18203  		if v_0.Op != ssaop.OpARM64ANDconst {
 18204  			break
 18205  		}
 18206  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 18207  		x := v_0.Args[0]
 18208  		if !(isARM64BFMask(0, c, 0) && bfc.Lsb()+bfc.Width() <= arm64BFWidth(c, 0)) {
 18209  			break
 18210  		}
 18211  		v.Reset(ssaop.OpARM64UBFX)
 18212  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(bfc)
 18213  		v.AddArg(x)
 18214  		return true
 18215  	}
 18216  	// match: (UBFX [bfc] e:(MOVWUreg x))
 18217  	// cond: e.Uses == 1 && bfc.Lsb() < 32
 18218  	// result: (UBFX [ssa.ArmBFAuxInt(bfc.Lsb(), min(bfc.Width(), 32-bfc.Lsb()))] x)
 18219  	for {
 18220  		bfc := ssa.AuxIntToArm64BitField(v.AuxInt)
 18221  		e := v_0
 18222  		if e.Op != ssaop.OpARM64MOVWUreg {
 18223  			break
 18224  		}
 18225  		x := e.Args[0]
 18226  		if !(e.Uses == 1 && bfc.Lsb() < 32) {
 18227  			break
 18228  		}
 18229  		v.Reset(ssaop.OpARM64UBFX)
 18230  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(bfc.Lsb(), min(bfc.Width(), 32-bfc.Lsb())))
 18231  		v.AddArg(x)
 18232  		return true
 18233  	}
 18234  	// match: (UBFX [bfc] e:(MOVHUreg x))
 18235  	// cond: e.Uses == 1 && bfc.Lsb() < 16
 18236  	// result: (UBFX [ssa.ArmBFAuxInt(bfc.Lsb(), min(bfc.Width(), 16-bfc.Lsb()))] x)
 18237  	for {
 18238  		bfc := ssa.AuxIntToArm64BitField(v.AuxInt)
 18239  		e := v_0
 18240  		if e.Op != ssaop.OpARM64MOVHUreg {
 18241  			break
 18242  		}
 18243  		x := e.Args[0]
 18244  		if !(e.Uses == 1 && bfc.Lsb() < 16) {
 18245  			break
 18246  		}
 18247  		v.Reset(ssaop.OpARM64UBFX)
 18248  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(bfc.Lsb(), min(bfc.Width(), 16-bfc.Lsb())))
 18249  		v.AddArg(x)
 18250  		return true
 18251  	}
 18252  	// match: (UBFX [bfc] e:(MOVBUreg x))
 18253  	// cond: e.Uses == 1 && bfc.Lsb() < 8
 18254  	// result: (UBFX [ssa.ArmBFAuxInt(bfc.Lsb(), min(bfc.Width(), 8-bfc.Lsb()))] x)
 18255  	for {
 18256  		bfc := ssa.AuxIntToArm64BitField(v.AuxInt)
 18257  		e := v_0
 18258  		if e.Op != ssaop.OpARM64MOVBUreg {
 18259  			break
 18260  		}
 18261  		x := e.Args[0]
 18262  		if !(e.Uses == 1 && bfc.Lsb() < 8) {
 18263  			break
 18264  		}
 18265  		v.Reset(ssaop.OpARM64UBFX)
 18266  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(bfc.Lsb(), min(bfc.Width(), 8-bfc.Lsb())))
 18267  		v.AddArg(x)
 18268  		return true
 18269  	}
 18270  	// match: (UBFX [bfc] (SRLconst [sc] x))
 18271  	// cond: sc+bfc.Width()+bfc.Lsb() < 64
 18272  	// result: (UBFX [ssa.ArmBFAuxInt(bfc.Lsb()+sc, bfc.Width())] x)
 18273  	for {
 18274  		bfc := ssa.AuxIntToArm64BitField(v.AuxInt)
 18275  		if v_0.Op != ssaop.OpARM64SRLconst {
 18276  			break
 18277  		}
 18278  		sc := ssa.AuxIntToInt64(v_0.AuxInt)
 18279  		x := v_0.Args[0]
 18280  		if !(sc+bfc.Width()+bfc.Lsb() < 64) {
 18281  			break
 18282  		}
 18283  		v.Reset(ssaop.OpARM64UBFX)
 18284  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(bfc.Lsb()+sc, bfc.Width()))
 18285  		v.AddArg(x)
 18286  		return true
 18287  	}
 18288  	// match: (UBFX [bfc] (SLLconst [sc] x))
 18289  	// cond: sc == bfc.Lsb()
 18290  	// result: (ANDconst [1<<uint(bfc.Width())-1] x)
 18291  	for {
 18292  		bfc := ssa.AuxIntToArm64BitField(v.AuxInt)
 18293  		if v_0.Op != ssaop.OpARM64SLLconst {
 18294  			break
 18295  		}
 18296  		sc := ssa.AuxIntToInt64(v_0.AuxInt)
 18297  		x := v_0.Args[0]
 18298  		if !(sc == bfc.Lsb()) {
 18299  			break
 18300  		}
 18301  		v.Reset(ssaop.OpARM64ANDconst)
 18302  		v.AuxInt = ssa.Int64ToAuxInt(1<<uint(bfc.Width()) - 1)
 18303  		v.AddArg(x)
 18304  		return true
 18305  	}
 18306  	// match: (UBFX [bfc] (SLLconst [sc] x))
 18307  	// cond: sc < bfc.Lsb()
 18308  	// result: (UBFX [ssa.ArmBFAuxInt(bfc.Lsb()-sc, bfc.Width())] x)
 18309  	for {
 18310  		bfc := ssa.AuxIntToArm64BitField(v.AuxInt)
 18311  		if v_0.Op != ssaop.OpARM64SLLconst {
 18312  			break
 18313  		}
 18314  		sc := ssa.AuxIntToInt64(v_0.AuxInt)
 18315  		x := v_0.Args[0]
 18316  		if !(sc < bfc.Lsb()) {
 18317  			break
 18318  		}
 18319  		v.Reset(ssaop.OpARM64UBFX)
 18320  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(bfc.Lsb()-sc, bfc.Width()))
 18321  		v.AddArg(x)
 18322  		return true
 18323  	}
 18324  	// match: (UBFX [bfc] (SLLconst [sc] x))
 18325  	// cond: sc > bfc.Lsb() && sc < bfc.Lsb()+bfc.Width()
 18326  	// result: (UBFIZ [ssa.ArmBFAuxInt(sc-bfc.Lsb(), bfc.Lsb()+bfc.Width()-sc)] x)
 18327  	for {
 18328  		bfc := ssa.AuxIntToArm64BitField(v.AuxInt)
 18329  		if v_0.Op != ssaop.OpARM64SLLconst {
 18330  			break
 18331  		}
 18332  		sc := ssa.AuxIntToInt64(v_0.AuxInt)
 18333  		x := v_0.Args[0]
 18334  		if !(sc > bfc.Lsb() && sc < bfc.Lsb()+bfc.Width()) {
 18335  			break
 18336  		}
 18337  		v.Reset(ssaop.OpARM64UBFIZ)
 18338  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(sc-bfc.Lsb(), bfc.Lsb()+bfc.Width()-sc))
 18339  		v.AddArg(x)
 18340  		return true
 18341  	}
 18342  	return false
 18343  }
 18344  func rewriteValue_OpARM64UDIV(v *ssa.Value) bool {
 18345  	v_1 := v.Args[1]
 18346  	v_0 := v.Args[0]
 18347  	// match: (UDIV x (MOVDconst [1]))
 18348  	// result: x
 18349  	for {
 18350  		x := v_0
 18351  		if v_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_1.AuxInt) != 1 {
 18352  			break
 18353  		}
 18354  		v.CopyOf(x)
 18355  		return true
 18356  	}
 18357  	// match: (UDIV x (MOVDconst [c]))
 18358  	// cond: ssa.IsPowerOfTwo(c)
 18359  	// result: (SRLconst [ssa.Log64(c)] x)
 18360  	for {
 18361  		x := v_0
 18362  		if v_1.Op != ssaop.OpARM64MOVDconst {
 18363  			break
 18364  		}
 18365  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 18366  		if !(ssa.IsPowerOfTwo(c)) {
 18367  			break
 18368  		}
 18369  		v.Reset(ssaop.OpARM64SRLconst)
 18370  		v.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c))
 18371  		v.AddArg(x)
 18372  		return true
 18373  	}
 18374  	// match: (UDIV (MOVDconst [c]) (MOVDconst [d]))
 18375  	// cond: d != 0
 18376  	// result: (MOVDconst [int64(uint64(c)/uint64(d))])
 18377  	for {
 18378  		if v_0.Op != ssaop.OpARM64MOVDconst {
 18379  			break
 18380  		}
 18381  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 18382  		if v_1.Op != ssaop.OpARM64MOVDconst {
 18383  			break
 18384  		}
 18385  		d := ssa.AuxIntToInt64(v_1.AuxInt)
 18386  		if !(d != 0) {
 18387  			break
 18388  		}
 18389  		v.Reset(ssaop.OpARM64MOVDconst)
 18390  		v.AuxInt = ssa.Int64ToAuxInt(int64(uint64(c) / uint64(d)))
 18391  		return true
 18392  	}
 18393  	return false
 18394  }
 18395  func rewriteValue_OpARM64UDIVW(v *ssa.Value) bool {
 18396  	v_1 := v.Args[1]
 18397  	v_0 := v.Args[0]
 18398  	b := v.Block
 18399  	// match: (UDIVW x (MOVDconst [c]))
 18400  	// cond: uint32(c)==1
 18401  	// result: (MOVWUreg x)
 18402  	for {
 18403  		x := v_0
 18404  		if v_1.Op != ssaop.OpARM64MOVDconst {
 18405  			break
 18406  		}
 18407  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 18408  		if !(uint32(c) == 1) {
 18409  			break
 18410  		}
 18411  		v.Reset(ssaop.OpARM64MOVWUreg)
 18412  		v.AddArg(x)
 18413  		return true
 18414  	}
 18415  	// match: (UDIVW x (MOVDconst [c]))
 18416  	// cond: ssa.IsPowerOfTwo(c) && ssa.Is32Bit(c)
 18417  	// result: (SRLconst [ssa.Log64(c)] (MOVWUreg <v.Type> x))
 18418  	for {
 18419  		x := v_0
 18420  		if v_1.Op != ssaop.OpARM64MOVDconst {
 18421  			break
 18422  		}
 18423  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 18424  		if !(ssa.IsPowerOfTwo(c) && ssa.Is32Bit(c)) {
 18425  			break
 18426  		}
 18427  		v.Reset(ssaop.OpARM64SRLconst)
 18428  		v.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c))
 18429  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MOVWUreg, v.Type)
 18430  		v0.AddArg(x)
 18431  		v.AddArg(v0)
 18432  		return true
 18433  	}
 18434  	// match: (UDIVW (MOVDconst [c]) (MOVDconst [d]))
 18435  	// cond: d != 0
 18436  	// result: (MOVDconst [int64(uint32(c)/uint32(d))])
 18437  	for {
 18438  		if v_0.Op != ssaop.OpARM64MOVDconst {
 18439  			break
 18440  		}
 18441  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 18442  		if v_1.Op != ssaop.OpARM64MOVDconst {
 18443  			break
 18444  		}
 18445  		d := ssa.AuxIntToInt64(v_1.AuxInt)
 18446  		if !(d != 0) {
 18447  			break
 18448  		}
 18449  		v.Reset(ssaop.OpARM64MOVDconst)
 18450  		v.AuxInt = ssa.Int64ToAuxInt(int64(uint32(c) / uint32(d)))
 18451  		return true
 18452  	}
 18453  	return false
 18454  }
 18455  func rewriteValue_OpARM64UMOD(v *ssa.Value) bool {
 18456  	v_1 := v.Args[1]
 18457  	v_0 := v.Args[0]
 18458  	b := v.Block
 18459  	typ := &b.Func.Config.Types
 18460  	// match: (UMOD <typ.UInt64> x y)
 18461  	// result: (MSUB <typ.UInt64> x y (UDIV <typ.UInt64> x y))
 18462  	for {
 18463  		if v.Type != typ.UInt64 {
 18464  			break
 18465  		}
 18466  		x := v_0
 18467  		y := v_1
 18468  		v.Reset(ssaop.OpARM64MSUB)
 18469  		v.Type = typ.UInt64
 18470  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64UDIV, typ.UInt64)
 18471  		v0.AddArg2(x, y)
 18472  		v.AddArg3(x, y, v0)
 18473  		return true
 18474  	}
 18475  	// match: (UMOD _ (MOVDconst [1]))
 18476  	// result: (MOVDconst [0])
 18477  	for {
 18478  		if v_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_1.AuxInt) != 1 {
 18479  			break
 18480  		}
 18481  		v.Reset(ssaop.OpARM64MOVDconst)
 18482  		v.AuxInt = ssa.Int64ToAuxInt(0)
 18483  		return true
 18484  	}
 18485  	// match: (UMOD x (MOVDconst [c]))
 18486  	// cond: ssa.IsPowerOfTwo(c)
 18487  	// result: (ANDconst [c-1] x)
 18488  	for {
 18489  		x := v_0
 18490  		if v_1.Op != ssaop.OpARM64MOVDconst {
 18491  			break
 18492  		}
 18493  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 18494  		if !(ssa.IsPowerOfTwo(c)) {
 18495  			break
 18496  		}
 18497  		v.Reset(ssaop.OpARM64ANDconst)
 18498  		v.AuxInt = ssa.Int64ToAuxInt(c - 1)
 18499  		v.AddArg(x)
 18500  		return true
 18501  	}
 18502  	// match: (UMOD (MOVDconst [c]) (MOVDconst [d]))
 18503  	// cond: d != 0
 18504  	// result: (MOVDconst [int64(uint64(c)%uint64(d))])
 18505  	for {
 18506  		if v_0.Op != ssaop.OpARM64MOVDconst {
 18507  			break
 18508  		}
 18509  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 18510  		if v_1.Op != ssaop.OpARM64MOVDconst {
 18511  			break
 18512  		}
 18513  		d := ssa.AuxIntToInt64(v_1.AuxInt)
 18514  		if !(d != 0) {
 18515  			break
 18516  		}
 18517  		v.Reset(ssaop.OpARM64MOVDconst)
 18518  		v.AuxInt = ssa.Int64ToAuxInt(int64(uint64(c) % uint64(d)))
 18519  		return true
 18520  	}
 18521  	return false
 18522  }
 18523  func rewriteValue_OpARM64UMODW(v *ssa.Value) bool {
 18524  	v_1 := v.Args[1]
 18525  	v_0 := v.Args[0]
 18526  	b := v.Block
 18527  	typ := &b.Func.Config.Types
 18528  	// match: (UMODW <typ.UInt32> x y)
 18529  	// result: (MSUBW <typ.UInt32> x y (UDIVW <typ.UInt32> x y))
 18530  	for {
 18531  		if v.Type != typ.UInt32 {
 18532  			break
 18533  		}
 18534  		x := v_0
 18535  		y := v_1
 18536  		v.Reset(ssaop.OpARM64MSUBW)
 18537  		v.Type = typ.UInt32
 18538  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64UDIVW, typ.UInt32)
 18539  		v0.AddArg2(x, y)
 18540  		v.AddArg3(x, y, v0)
 18541  		return true
 18542  	}
 18543  	// match: (UMODW _ (MOVDconst [c]))
 18544  	// cond: uint32(c)==1
 18545  	// result: (MOVDconst [0])
 18546  	for {
 18547  		if v_1.Op != ssaop.OpARM64MOVDconst {
 18548  			break
 18549  		}
 18550  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 18551  		if !(uint32(c) == 1) {
 18552  			break
 18553  		}
 18554  		v.Reset(ssaop.OpARM64MOVDconst)
 18555  		v.AuxInt = ssa.Int64ToAuxInt(0)
 18556  		return true
 18557  	}
 18558  	// match: (UMODW x (MOVDconst [c]))
 18559  	// cond: ssa.IsPowerOfTwo(c) && ssa.Is32Bit(c)
 18560  	// result: (ANDconst [c-1] x)
 18561  	for {
 18562  		x := v_0
 18563  		if v_1.Op != ssaop.OpARM64MOVDconst {
 18564  			break
 18565  		}
 18566  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 18567  		if !(ssa.IsPowerOfTwo(c) && ssa.Is32Bit(c)) {
 18568  			break
 18569  		}
 18570  		v.Reset(ssaop.OpARM64ANDconst)
 18571  		v.AuxInt = ssa.Int64ToAuxInt(c - 1)
 18572  		v.AddArg(x)
 18573  		return true
 18574  	}
 18575  	// match: (UMODW (MOVDconst [c]) (MOVDconst [d]))
 18576  	// cond: d != 0
 18577  	// result: (MOVDconst [int64(uint32(c)%uint32(d))])
 18578  	for {
 18579  		if v_0.Op != ssaop.OpARM64MOVDconst {
 18580  			break
 18581  		}
 18582  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 18583  		if v_1.Op != ssaop.OpARM64MOVDconst {
 18584  			break
 18585  		}
 18586  		d := ssa.AuxIntToInt64(v_1.AuxInt)
 18587  		if !(d != 0) {
 18588  			break
 18589  		}
 18590  		v.Reset(ssaop.OpARM64MOVDconst)
 18591  		v.AuxInt = ssa.Int64ToAuxInt(int64(uint32(c) % uint32(d)))
 18592  		return true
 18593  	}
 18594  	return false
 18595  }
 18596  func rewriteValue_OpARM64VBIF16B(v *ssa.Value) bool {
 18597  	v_2 := v.Args[2]
 18598  	v_1 := v.Args[1]
 18599  	v_0 := v.Args[0]
 18600  	// match: (VBIF16B x y (VNOT16B mask))
 18601  	// result: (VBIT16B x y mask)
 18602  	for {
 18603  		x := v_0
 18604  		y := v_1
 18605  		if v_2.Op != ssaop.OpARM64VNOT16B {
 18606  			break
 18607  		}
 18608  		mask := v_2.Args[0]
 18609  		v.Reset(ssaop.OpARM64VBIT16B)
 18610  		v.AddArg3(x, y, mask)
 18611  		return true
 18612  	}
 18613  	return false
 18614  }
 18615  func rewriteValue_OpARM64VBIT16B(v *ssa.Value) bool {
 18616  	v_2 := v.Args[2]
 18617  	v_1 := v.Args[1]
 18618  	v_0 := v.Args[0]
 18619  	// match: (VBIT16B x y (VNOT16B mask))
 18620  	// result: (VBIF16B x y mask)
 18621  	for {
 18622  		x := v_0
 18623  		y := v_1
 18624  		if v_2.Op != ssaop.OpARM64VNOT16B {
 18625  			break
 18626  		}
 18627  		mask := v_2.Args[0]
 18628  		v.Reset(ssaop.OpARM64VBIF16B)
 18629  		v.AddArg3(x, y, mask)
 18630  		return true
 18631  	}
 18632  	return false
 18633  }
 18634  func rewriteValue_OpARM64VDUPBbcast(v *ssa.Value) bool {
 18635  	v_0 := v.Args[0]
 18636  	// match: (VDUPBbcast [i] (VMOVBins [j] _ (MOVDconst [c])))
 18637  	// cond: i == j && c>=-128 && c<=255
 18638  	// result: (VMOVI16B [uint8(c)])
 18639  	for {
 18640  		i := ssa.AuxIntToUint8(v.AuxInt)
 18641  		if v_0.Op != ssaop.OpARM64VMOVBins {
 18642  			break
 18643  		}
 18644  		j := ssa.AuxIntToUint8(v_0.AuxInt)
 18645  		_ = v_0.Args[1]
 18646  		v_0_1 := v_0.Args[1]
 18647  		if v_0_1.Op != ssaop.OpARM64MOVDconst {
 18648  			break
 18649  		}
 18650  		c := ssa.AuxIntToInt64(v_0_1.AuxInt)
 18651  		if !(i == j && c >= -128 && c <= 255) {
 18652  			break
 18653  		}
 18654  		v.Reset(ssaop.OpARM64VMOVI16B)
 18655  		v.AuxInt = ssa.Uint8ToAuxInt(uint8(c))
 18656  		return true
 18657  	}
 18658  	return false
 18659  }
 18660  func rewriteValue_OpARM64VEOR16B(v *ssa.Value) bool {
 18661  	v_1 := v.Args[1]
 18662  	v_0 := v.Args[0]
 18663  	// match: (VEOR16B x x)
 18664  	// result: (VMOVI16B [0])
 18665  	for {
 18666  		x := v_0
 18667  		if x != v_1 {
 18668  			break
 18669  		}
 18670  		v.Reset(ssaop.OpARM64VMOVI16B)
 18671  		v.AuxInt = ssa.Uint8ToAuxInt(0)
 18672  		return true
 18673  	}
 18674  	return false
 18675  }
 18676  func rewriteValue_OpARM64VFCVTL4S(v *ssa.Value) bool {
 18677  	v_0 := v.Args[0]
 18678  	// match: (VFCVTL4S (VDUPDextr [1] x))
 18679  	// result: (VFCVTL2_4S x)
 18680  	for {
 18681  		if v_0.Op != ssaop.OpARM64VDUPDextr || ssa.AuxIntToUint8(v_0.AuxInt) != 1 {
 18682  			break
 18683  		}
 18684  		x := v_0.Args[0]
 18685  		v.Reset(ssaop.OpARM64VFCVTL2_4S)
 18686  		v.AddArg(x)
 18687  		return true
 18688  	}
 18689  	return false
 18690  }
 18691  func rewriteValue_OpARM64VMOVDins0(v *ssa.Value) bool {
 18692  	v_1 := v.Args[1]
 18693  	v_0 := v.Args[0]
 18694  	// match: (VMOVDins0 [1] dst (VDUPDextr [0] (VFCVTN2D y)))
 18695  	// result: (VFCVTN2_2D dst y)
 18696  	for {
 18697  		if ssa.AuxIntToUint8(v.AuxInt) != 1 {
 18698  			break
 18699  		}
 18700  		dst := v_0
 18701  		if v_1.Op != ssaop.OpARM64VDUPDextr || ssa.AuxIntToUint8(v_1.AuxInt) != 0 {
 18702  			break
 18703  		}
 18704  		v_1_0 := v_1.Args[0]
 18705  		if v_1_0.Op != ssaop.OpARM64VFCVTN2D {
 18706  			break
 18707  		}
 18708  		y := v_1_0.Args[0]
 18709  		v.Reset(ssaop.OpARM64VFCVTN2_2D)
 18710  		v.AddArg2(dst, y)
 18711  		return true
 18712  	}
 18713  	// match: (VMOVDins0 [1] dst (VDUPDextr [0] (VSHRN2D [c] y)))
 18714  	// result: (VSHRN2_2D dst [c] y)
 18715  	for {
 18716  		if ssa.AuxIntToUint8(v.AuxInt) != 1 {
 18717  			break
 18718  		}
 18719  		dst := v_0
 18720  		if v_1.Op != ssaop.OpARM64VDUPDextr || ssa.AuxIntToUint8(v_1.AuxInt) != 0 {
 18721  			break
 18722  		}
 18723  		v_1_0 := v_1.Args[0]
 18724  		if v_1_0.Op != ssaop.OpARM64VSHRN2D {
 18725  			break
 18726  		}
 18727  		c := ssa.AuxIntToUint8(v_1_0.AuxInt)
 18728  		y := v_1_0.Args[0]
 18729  		v.Reset(ssaop.OpARM64VSHRN2_2D)
 18730  		v.AuxInt = ssa.Uint8ToAuxInt(c)
 18731  		v.AddArg2(dst, y)
 18732  		return true
 18733  	}
 18734  	// match: (VMOVDins0 [1] dst (VDUPDextr [0] (VSHRN4S [c] y)))
 18735  	// result: (VSHRN2_4S dst [c] y)
 18736  	for {
 18737  		if ssa.AuxIntToUint8(v.AuxInt) != 1 {
 18738  			break
 18739  		}
 18740  		dst := v_0
 18741  		if v_1.Op != ssaop.OpARM64VDUPDextr || ssa.AuxIntToUint8(v_1.AuxInt) != 0 {
 18742  			break
 18743  		}
 18744  		v_1_0 := v_1.Args[0]
 18745  		if v_1_0.Op != ssaop.OpARM64VSHRN4S {
 18746  			break
 18747  		}
 18748  		c := ssa.AuxIntToUint8(v_1_0.AuxInt)
 18749  		y := v_1_0.Args[0]
 18750  		v.Reset(ssaop.OpARM64VSHRN2_4S)
 18751  		v.AuxInt = ssa.Uint8ToAuxInt(c)
 18752  		v.AddArg2(dst, y)
 18753  		return true
 18754  	}
 18755  	// match: (VMOVDins0 [1] dst (VDUPDextr [0] (VSHRN8H [c] y)))
 18756  	// result: (VSHRN2_8H dst [c] y)
 18757  	for {
 18758  		if ssa.AuxIntToUint8(v.AuxInt) != 1 {
 18759  			break
 18760  		}
 18761  		dst := v_0
 18762  		if v_1.Op != ssaop.OpARM64VDUPDextr || ssa.AuxIntToUint8(v_1.AuxInt) != 0 {
 18763  			break
 18764  		}
 18765  		v_1_0 := v_1.Args[0]
 18766  		if v_1_0.Op != ssaop.OpARM64VSHRN8H {
 18767  			break
 18768  		}
 18769  		c := ssa.AuxIntToUint8(v_1_0.AuxInt)
 18770  		y := v_1_0.Args[0]
 18771  		v.Reset(ssaop.OpARM64VSHRN2_8H)
 18772  		v.AuxInt = ssa.Uint8ToAuxInt(c)
 18773  		v.AddArg2(dst, y)
 18774  		return true
 18775  	}
 18776  	// match: (VMOVDins0 [1] dst (VDUPDextr [0] (VSQXTN2D y)))
 18777  	// result: (VSQXTN2_2D dst y)
 18778  	for {
 18779  		if ssa.AuxIntToUint8(v.AuxInt) != 1 {
 18780  			break
 18781  		}
 18782  		dst := v_0
 18783  		if v_1.Op != ssaop.OpARM64VDUPDextr || ssa.AuxIntToUint8(v_1.AuxInt) != 0 {
 18784  			break
 18785  		}
 18786  		v_1_0 := v_1.Args[0]
 18787  		if v_1_0.Op != ssaop.OpARM64VSQXTN2D {
 18788  			break
 18789  		}
 18790  		y := v_1_0.Args[0]
 18791  		v.Reset(ssaop.OpARM64VSQXTN2_2D)
 18792  		v.AddArg2(dst, y)
 18793  		return true
 18794  	}
 18795  	// match: (VMOVDins0 [1] dst (VDUPDextr [0] (VSQXTN4S y)))
 18796  	// result: (VSQXTN2_4S dst y)
 18797  	for {
 18798  		if ssa.AuxIntToUint8(v.AuxInt) != 1 {
 18799  			break
 18800  		}
 18801  		dst := v_0
 18802  		if v_1.Op != ssaop.OpARM64VDUPDextr || ssa.AuxIntToUint8(v_1.AuxInt) != 0 {
 18803  			break
 18804  		}
 18805  		v_1_0 := v_1.Args[0]
 18806  		if v_1_0.Op != ssaop.OpARM64VSQXTN4S {
 18807  			break
 18808  		}
 18809  		y := v_1_0.Args[0]
 18810  		v.Reset(ssaop.OpARM64VSQXTN2_4S)
 18811  		v.AddArg2(dst, y)
 18812  		return true
 18813  	}
 18814  	// match: (VMOVDins0 [1] dst (VDUPDextr [0] (VSQXTN8H y)))
 18815  	// result: (VSQXTN2_8H dst y)
 18816  	for {
 18817  		if ssa.AuxIntToUint8(v.AuxInt) != 1 {
 18818  			break
 18819  		}
 18820  		dst := v_0
 18821  		if v_1.Op != ssaop.OpARM64VDUPDextr || ssa.AuxIntToUint8(v_1.AuxInt) != 0 {
 18822  			break
 18823  		}
 18824  		v_1_0 := v_1.Args[0]
 18825  		if v_1_0.Op != ssaop.OpARM64VSQXTN8H {
 18826  			break
 18827  		}
 18828  		y := v_1_0.Args[0]
 18829  		v.Reset(ssaop.OpARM64VSQXTN2_8H)
 18830  		v.AddArg2(dst, y)
 18831  		return true
 18832  	}
 18833  	// match: (VMOVDins0 [1] dst (VDUPDextr [0] (VSQXTUN2D y)))
 18834  	// result: (VSQXTUN2_2D dst y)
 18835  	for {
 18836  		if ssa.AuxIntToUint8(v.AuxInt) != 1 {
 18837  			break
 18838  		}
 18839  		dst := v_0
 18840  		if v_1.Op != ssaop.OpARM64VDUPDextr || ssa.AuxIntToUint8(v_1.AuxInt) != 0 {
 18841  			break
 18842  		}
 18843  		v_1_0 := v_1.Args[0]
 18844  		if v_1_0.Op != ssaop.OpARM64VSQXTUN2D {
 18845  			break
 18846  		}
 18847  		y := v_1_0.Args[0]
 18848  		v.Reset(ssaop.OpARM64VSQXTUN2_2D)
 18849  		v.AddArg2(dst, y)
 18850  		return true
 18851  	}
 18852  	// match: (VMOVDins0 [1] dst (VDUPDextr [0] (VSQXTUN4S y)))
 18853  	// result: (VSQXTUN2_4S dst y)
 18854  	for {
 18855  		if ssa.AuxIntToUint8(v.AuxInt) != 1 {
 18856  			break
 18857  		}
 18858  		dst := v_0
 18859  		if v_1.Op != ssaop.OpARM64VDUPDextr || ssa.AuxIntToUint8(v_1.AuxInt) != 0 {
 18860  			break
 18861  		}
 18862  		v_1_0 := v_1.Args[0]
 18863  		if v_1_0.Op != ssaop.OpARM64VSQXTUN4S {
 18864  			break
 18865  		}
 18866  		y := v_1_0.Args[0]
 18867  		v.Reset(ssaop.OpARM64VSQXTUN2_4S)
 18868  		v.AddArg2(dst, y)
 18869  		return true
 18870  	}
 18871  	// match: (VMOVDins0 [1] dst (VDUPDextr [0] (VSQXTUN8H y)))
 18872  	// result: (VSQXTUN2_8H dst y)
 18873  	for {
 18874  		if ssa.AuxIntToUint8(v.AuxInt) != 1 {
 18875  			break
 18876  		}
 18877  		dst := v_0
 18878  		if v_1.Op != ssaop.OpARM64VDUPDextr || ssa.AuxIntToUint8(v_1.AuxInt) != 0 {
 18879  			break
 18880  		}
 18881  		v_1_0 := v_1.Args[0]
 18882  		if v_1_0.Op != ssaop.OpARM64VSQXTUN8H {
 18883  			break
 18884  		}
 18885  		y := v_1_0.Args[0]
 18886  		v.Reset(ssaop.OpARM64VSQXTUN2_8H)
 18887  		v.AddArg2(dst, y)
 18888  		return true
 18889  	}
 18890  	// match: (VMOVDins0 [1] dst (VDUPDextr [0] (VUQXTN2D y)))
 18891  	// result: (VUQXTN2_2D dst y)
 18892  	for {
 18893  		if ssa.AuxIntToUint8(v.AuxInt) != 1 {
 18894  			break
 18895  		}
 18896  		dst := v_0
 18897  		if v_1.Op != ssaop.OpARM64VDUPDextr || ssa.AuxIntToUint8(v_1.AuxInt) != 0 {
 18898  			break
 18899  		}
 18900  		v_1_0 := v_1.Args[0]
 18901  		if v_1_0.Op != ssaop.OpARM64VUQXTN2D {
 18902  			break
 18903  		}
 18904  		y := v_1_0.Args[0]
 18905  		v.Reset(ssaop.OpARM64VUQXTN2_2D)
 18906  		v.AddArg2(dst, y)
 18907  		return true
 18908  	}
 18909  	// match: (VMOVDins0 [1] dst (VDUPDextr [0] (VUQXTN4S y)))
 18910  	// result: (VUQXTN2_4S dst y)
 18911  	for {
 18912  		if ssa.AuxIntToUint8(v.AuxInt) != 1 {
 18913  			break
 18914  		}
 18915  		dst := v_0
 18916  		if v_1.Op != ssaop.OpARM64VDUPDextr || ssa.AuxIntToUint8(v_1.AuxInt) != 0 {
 18917  			break
 18918  		}
 18919  		v_1_0 := v_1.Args[0]
 18920  		if v_1_0.Op != ssaop.OpARM64VUQXTN4S {
 18921  			break
 18922  		}
 18923  		y := v_1_0.Args[0]
 18924  		v.Reset(ssaop.OpARM64VUQXTN2_4S)
 18925  		v.AddArg2(dst, y)
 18926  		return true
 18927  	}
 18928  	// match: (VMOVDins0 [1] dst (VDUPDextr [0] (VUQXTN8H y)))
 18929  	// result: (VUQXTN2_8H dst y)
 18930  	for {
 18931  		if ssa.AuxIntToUint8(v.AuxInt) != 1 {
 18932  			break
 18933  		}
 18934  		dst := v_0
 18935  		if v_1.Op != ssaop.OpARM64VDUPDextr || ssa.AuxIntToUint8(v_1.AuxInt) != 0 {
 18936  			break
 18937  		}
 18938  		v_1_0 := v_1.Args[0]
 18939  		if v_1_0.Op != ssaop.OpARM64VUQXTN8H {
 18940  			break
 18941  		}
 18942  		y := v_1_0.Args[0]
 18943  		v.Reset(ssaop.OpARM64VUQXTN2_8H)
 18944  		v.AddArg2(dst, y)
 18945  		return true
 18946  	}
 18947  	// match: (VMOVDins0 [1] dst (VDUPDextr [0] (VXTN2D y)))
 18948  	// result: (VXTN2_2D dst y)
 18949  	for {
 18950  		if ssa.AuxIntToUint8(v.AuxInt) != 1 {
 18951  			break
 18952  		}
 18953  		dst := v_0
 18954  		if v_1.Op != ssaop.OpARM64VDUPDextr || ssa.AuxIntToUint8(v_1.AuxInt) != 0 {
 18955  			break
 18956  		}
 18957  		v_1_0 := v_1.Args[0]
 18958  		if v_1_0.Op != ssaop.OpARM64VXTN2D {
 18959  			break
 18960  		}
 18961  		y := v_1_0.Args[0]
 18962  		v.Reset(ssaop.OpARM64VXTN2_2D)
 18963  		v.AddArg2(dst, y)
 18964  		return true
 18965  	}
 18966  	// match: (VMOVDins0 [1] dst (VDUPDextr [0] (VXTN4S y)))
 18967  	// result: (VXTN2_4S dst y)
 18968  	for {
 18969  		if ssa.AuxIntToUint8(v.AuxInt) != 1 {
 18970  			break
 18971  		}
 18972  		dst := v_0
 18973  		if v_1.Op != ssaop.OpARM64VDUPDextr || ssa.AuxIntToUint8(v_1.AuxInt) != 0 {
 18974  			break
 18975  		}
 18976  		v_1_0 := v_1.Args[0]
 18977  		if v_1_0.Op != ssaop.OpARM64VXTN4S {
 18978  			break
 18979  		}
 18980  		y := v_1_0.Args[0]
 18981  		v.Reset(ssaop.OpARM64VXTN2_4S)
 18982  		v.AddArg2(dst, y)
 18983  		return true
 18984  	}
 18985  	// match: (VMOVDins0 [1] dst (VDUPDextr [0] (VXTN8H y)))
 18986  	// result: (VXTN2_8H dst y)
 18987  	for {
 18988  		if ssa.AuxIntToUint8(v.AuxInt) != 1 {
 18989  			break
 18990  		}
 18991  		dst := v_0
 18992  		if v_1.Op != ssaop.OpARM64VDUPDextr || ssa.AuxIntToUint8(v_1.AuxInt) != 0 {
 18993  			break
 18994  		}
 18995  		v_1_0 := v_1.Args[0]
 18996  		if v_1_0.Op != ssaop.OpARM64VXTN8H {
 18997  			break
 18998  		}
 18999  		y := v_1_0.Args[0]
 19000  		v.Reset(ssaop.OpARM64VXTN2_8H)
 19001  		v.AddArg2(dst, y)
 19002  		return true
 19003  	}
 19004  	// match: (VMOVDins0 [0] (VMOVI16B [0]) y:(VDUPDextr [i] _))
 19005  	// result: y
 19006  	for {
 19007  		if ssa.AuxIntToUint8(v.AuxInt) != 0 || v_0.Op != ssaop.OpARM64VMOVI16B || ssa.AuxIntToUint8(v_0.AuxInt) != 0 {
 19008  			break
 19009  		}
 19010  		y := v_1
 19011  		if y.Op != ssaop.OpARM64VDUPDextr {
 19012  			break
 19013  		}
 19014  		v.CopyOf(y)
 19015  		return true
 19016  	}
 19017  	return false
 19018  }
 19019  func rewriteValue_OpARM64VMOVSins0(v *ssa.Value) bool {
 19020  	v_1 := v.Args[1]
 19021  	v_0 := v.Args[0]
 19022  	// match: (VMOVSins0 [0] (VMOVI16B [0]) y:(VDUPSextr [i] _))
 19023  	// result: y
 19024  	for {
 19025  		if ssa.AuxIntToUint8(v.AuxInt) != 0 || v_0.Op != ssaop.OpARM64VMOVI16B || ssa.AuxIntToUint8(v_0.AuxInt) != 0 {
 19026  			break
 19027  		}
 19028  		y := v_1
 19029  		if y.Op != ssaop.OpARM64VDUPSextr {
 19030  			break
 19031  		}
 19032  		v.CopyOf(y)
 19033  		return true
 19034  	}
 19035  	return false
 19036  }
 19037  func rewriteValue_OpARM64VNOT16B(v *ssa.Value) bool {
 19038  	v_0 := v.Args[0]
 19039  	// match: (VNOT16B (VCMEQ16B (VAND16B x y) (VMOVI16B [0])))
 19040  	// result: (VCMTST16B x y)
 19041  	for {
 19042  		if v_0.Op != ssaop.OpARM64VCMEQ16B {
 19043  			break
 19044  		}
 19045  		_ = v_0.Args[1]
 19046  		v_0_0 := v_0.Args[0]
 19047  		v_0_1 := v_0.Args[1]
 19048  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
 19049  			if v_0_0.Op != ssaop.OpARM64VAND16B {
 19050  				continue
 19051  			}
 19052  			y := v_0_0.Args[1]
 19053  			x := v_0_0.Args[0]
 19054  			if v_0_1.Op != ssaop.OpARM64VMOVI16B || ssa.AuxIntToUint8(v_0_1.AuxInt) != 0 {
 19055  				continue
 19056  			}
 19057  			v.Reset(ssaop.OpARM64VCMTST16B)
 19058  			v.AddArg2(x, y)
 19059  			return true
 19060  		}
 19061  		break
 19062  	}
 19063  	// match: (VNOT16B (VCMEQ8H (VAND16B x y) (VMOVI16B [0])))
 19064  	// result: (VCMTST8H x y)
 19065  	for {
 19066  		if v_0.Op != ssaop.OpARM64VCMEQ8H {
 19067  			break
 19068  		}
 19069  		_ = v_0.Args[1]
 19070  		v_0_0 := v_0.Args[0]
 19071  		v_0_1 := v_0.Args[1]
 19072  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
 19073  			if v_0_0.Op != ssaop.OpARM64VAND16B {
 19074  				continue
 19075  			}
 19076  			y := v_0_0.Args[1]
 19077  			x := v_0_0.Args[0]
 19078  			if v_0_1.Op != ssaop.OpARM64VMOVI16B || ssa.AuxIntToUint8(v_0_1.AuxInt) != 0 {
 19079  				continue
 19080  			}
 19081  			v.Reset(ssaop.OpARM64VCMTST8H)
 19082  			v.AddArg2(x, y)
 19083  			return true
 19084  		}
 19085  		break
 19086  	}
 19087  	// match: (VNOT16B (VCMEQ4S (VAND16B x y) (VMOVI16B [0])))
 19088  	// result: (VCMTST4S x y)
 19089  	for {
 19090  		if v_0.Op != ssaop.OpARM64VCMEQ4S {
 19091  			break
 19092  		}
 19093  		_ = v_0.Args[1]
 19094  		v_0_0 := v_0.Args[0]
 19095  		v_0_1 := v_0.Args[1]
 19096  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
 19097  			if v_0_0.Op != ssaop.OpARM64VAND16B {
 19098  				continue
 19099  			}
 19100  			y := v_0_0.Args[1]
 19101  			x := v_0_0.Args[0]
 19102  			if v_0_1.Op != ssaop.OpARM64VMOVI16B || ssa.AuxIntToUint8(v_0_1.AuxInt) != 0 {
 19103  				continue
 19104  			}
 19105  			v.Reset(ssaop.OpARM64VCMTST4S)
 19106  			v.AddArg2(x, y)
 19107  			return true
 19108  		}
 19109  		break
 19110  	}
 19111  	// match: (VNOT16B (VCMEQ2D (VAND16B x y) (VMOVI16B [0])))
 19112  	// result: (VCMTST2D x y)
 19113  	for {
 19114  		if v_0.Op != ssaop.OpARM64VCMEQ2D {
 19115  			break
 19116  		}
 19117  		_ = v_0.Args[1]
 19118  		v_0_0 := v_0.Args[0]
 19119  		v_0_1 := v_0.Args[1]
 19120  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
 19121  			if v_0_0.Op != ssaop.OpARM64VAND16B {
 19122  				continue
 19123  			}
 19124  			y := v_0_0.Args[1]
 19125  			x := v_0_0.Args[0]
 19126  			if v_0_1.Op != ssaop.OpARM64VMOVI16B || ssa.AuxIntToUint8(v_0_1.AuxInt) != 0 {
 19127  				continue
 19128  			}
 19129  			v.Reset(ssaop.OpARM64VCMTST2D)
 19130  			v.AddArg2(x, y)
 19131  			return true
 19132  		}
 19133  		break
 19134  	}
 19135  	return false
 19136  }
 19137  func rewriteValue_OpARM64VPMULL2D(v *ssa.Value) bool {
 19138  	v_1 := v.Args[1]
 19139  	v_0 := v.Args[0]
 19140  	// match: (VPMULL2D (VDUPDextr [1] x) (VDUPDextr [1] y))
 19141  	// result: (VPMULL2_2D x y)
 19142  	for {
 19143  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 19144  			if v_0.Op != ssaop.OpARM64VDUPDextr || ssa.AuxIntToUint8(v_0.AuxInt) != 1 {
 19145  				continue
 19146  			}
 19147  			x := v_0.Args[0]
 19148  			if v_1.Op != ssaop.OpARM64VDUPDextr || ssa.AuxIntToUint8(v_1.AuxInt) != 1 {
 19149  				continue
 19150  			}
 19151  			y := v_1.Args[0]
 19152  			v.Reset(ssaop.OpARM64VPMULL2_2D)
 19153  			v.AddArg2(x, y)
 19154  			return true
 19155  		}
 19156  		break
 19157  	}
 19158  	return false
 19159  }
 19160  func rewriteValue_OpARM64VSHL16B(v *ssa.Value) bool {
 19161  	v_0 := v.Args[0]
 19162  	// match: (VSHL16B [a] x)
 19163  	// cond: a==0
 19164  	// result: x
 19165  	for {
 19166  		a := ssa.AuxIntToUint8(v.AuxInt)
 19167  		x := v_0
 19168  		if !(a == 0) {
 19169  			break
 19170  		}
 19171  		v.CopyOf(x)
 19172  		return true
 19173  	}
 19174  	return false
 19175  }
 19176  func rewriteValue_OpARM64VSHL2D(v *ssa.Value) bool {
 19177  	v_0 := v.Args[0]
 19178  	// match: (VSHL2D [a] x)
 19179  	// cond: a==0
 19180  	// result: x
 19181  	for {
 19182  		a := ssa.AuxIntToUint8(v.AuxInt)
 19183  		x := v_0
 19184  		if !(a == 0) {
 19185  			break
 19186  		}
 19187  		v.CopyOf(x)
 19188  		return true
 19189  	}
 19190  	return false
 19191  }
 19192  func rewriteValue_OpARM64VSHL4S(v *ssa.Value) bool {
 19193  	v_0 := v.Args[0]
 19194  	// match: (VSHL4S [a] x)
 19195  	// cond: a==0
 19196  	// result: x
 19197  	for {
 19198  		a := ssa.AuxIntToUint8(v.AuxInt)
 19199  		x := v_0
 19200  		if !(a == 0) {
 19201  			break
 19202  		}
 19203  		v.CopyOf(x)
 19204  		return true
 19205  	}
 19206  	return false
 19207  }
 19208  func rewriteValue_OpARM64VSHL8H(v *ssa.Value) bool {
 19209  	v_0 := v.Args[0]
 19210  	// match: (VSHL8H [a] x)
 19211  	// cond: a==0
 19212  	// result: x
 19213  	for {
 19214  		a := ssa.AuxIntToUint8(v.AuxInt)
 19215  		x := v_0
 19216  		if !(a == 0) {
 19217  			break
 19218  		}
 19219  		v.CopyOf(x)
 19220  		return true
 19221  	}
 19222  	return false
 19223  }
 19224  func rewriteValue_OpARM64VSHRN2D(v *ssa.Value) bool {
 19225  	v_0 := v.Args[0]
 19226  	// match: (VSHRN2D [0] x)
 19227  	// result: (VXTN2D x)
 19228  	for {
 19229  		if ssa.AuxIntToUint8(v.AuxInt) != 0 {
 19230  			break
 19231  		}
 19232  		x := v_0
 19233  		v.Reset(ssaop.OpARM64VXTN2D)
 19234  		v.AddArg(x)
 19235  		return true
 19236  	}
 19237  	return false
 19238  }
 19239  func rewriteValue_OpARM64VSHRN4S(v *ssa.Value) bool {
 19240  	v_0 := v.Args[0]
 19241  	// match: (VSHRN4S [0] x)
 19242  	// result: (VXTN4S x)
 19243  	for {
 19244  		if ssa.AuxIntToUint8(v.AuxInt) != 0 {
 19245  			break
 19246  		}
 19247  		x := v_0
 19248  		v.Reset(ssaop.OpARM64VXTN4S)
 19249  		v.AddArg(x)
 19250  		return true
 19251  	}
 19252  	return false
 19253  }
 19254  func rewriteValue_OpARM64VSHRN8H(v *ssa.Value) bool {
 19255  	v_0 := v.Args[0]
 19256  	// match: (VSHRN8H [0] x)
 19257  	// result: (VXTN8H x)
 19258  	for {
 19259  		if ssa.AuxIntToUint8(v.AuxInt) != 0 {
 19260  			break
 19261  		}
 19262  		x := v_0
 19263  		v.Reset(ssaop.OpARM64VXTN8H)
 19264  		v.AddArg(x)
 19265  		return true
 19266  	}
 19267  	return false
 19268  }
 19269  func rewriteValue_OpARM64VSMULL16B(v *ssa.Value) bool {
 19270  	v_1 := v.Args[1]
 19271  	v_0 := v.Args[0]
 19272  	// match: (VSMULL16B (VDUPDextr [1] x) (VDUPDextr [1] y))
 19273  	// result: (VSMULL2_16B x y)
 19274  	for {
 19275  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 19276  			if v_0.Op != ssaop.OpARM64VDUPDextr || ssa.AuxIntToUint8(v_0.AuxInt) != 1 {
 19277  				continue
 19278  			}
 19279  			x := v_0.Args[0]
 19280  			if v_1.Op != ssaop.OpARM64VDUPDextr || ssa.AuxIntToUint8(v_1.AuxInt) != 1 {
 19281  				continue
 19282  			}
 19283  			y := v_1.Args[0]
 19284  			v.Reset(ssaop.OpARM64VSMULL2_16B)
 19285  			v.AddArg2(x, y)
 19286  			return true
 19287  		}
 19288  		break
 19289  	}
 19290  	return false
 19291  }
 19292  func rewriteValue_OpARM64VSMULL4S(v *ssa.Value) bool {
 19293  	v_1 := v.Args[1]
 19294  	v_0 := v.Args[0]
 19295  	// match: (VSMULL4S (VDUPDextr [1] x) (VDUPDextr [1] y))
 19296  	// result: (VSMULL2_4S x y)
 19297  	for {
 19298  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 19299  			if v_0.Op != ssaop.OpARM64VDUPDextr || ssa.AuxIntToUint8(v_0.AuxInt) != 1 {
 19300  				continue
 19301  			}
 19302  			x := v_0.Args[0]
 19303  			if v_1.Op != ssaop.OpARM64VDUPDextr || ssa.AuxIntToUint8(v_1.AuxInt) != 1 {
 19304  				continue
 19305  			}
 19306  			y := v_1.Args[0]
 19307  			v.Reset(ssaop.OpARM64VSMULL2_4S)
 19308  			v.AddArg2(x, y)
 19309  			return true
 19310  		}
 19311  		break
 19312  	}
 19313  	return false
 19314  }
 19315  func rewriteValue_OpARM64VSMULL8H(v *ssa.Value) bool {
 19316  	v_1 := v.Args[1]
 19317  	v_0 := v.Args[0]
 19318  	// match: (VSMULL8H (VDUPDextr [1] x) (VDUPDextr [1] y))
 19319  	// result: (VSMULL2_8H x y)
 19320  	for {
 19321  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 19322  			if v_0.Op != ssaop.OpARM64VDUPDextr || ssa.AuxIntToUint8(v_0.AuxInt) != 1 {
 19323  				continue
 19324  			}
 19325  			x := v_0.Args[0]
 19326  			if v_1.Op != ssaop.OpARM64VDUPDextr || ssa.AuxIntToUint8(v_1.AuxInt) != 1 {
 19327  				continue
 19328  			}
 19329  			y := v_1.Args[0]
 19330  			v.Reset(ssaop.OpARM64VSMULL2_8H)
 19331  			v.AddArg2(x, y)
 19332  			return true
 19333  		}
 19334  		break
 19335  	}
 19336  	return false
 19337  }
 19338  func rewriteValue_OpARM64VSQSHL16Bconst(v *ssa.Value) bool {
 19339  	v_0 := v.Args[0]
 19340  	// match: (VSQSHL16Bconst [a] x)
 19341  	// cond: a==0
 19342  	// result: x
 19343  	for {
 19344  		a := ssa.AuxIntToUint8(v.AuxInt)
 19345  		x := v_0
 19346  		if !(a == 0) {
 19347  			break
 19348  		}
 19349  		v.CopyOf(x)
 19350  		return true
 19351  	}
 19352  	return false
 19353  }
 19354  func rewriteValue_OpARM64VSQSHL2Dconst(v *ssa.Value) bool {
 19355  	v_0 := v.Args[0]
 19356  	// match: (VSQSHL2Dconst [a] x)
 19357  	// cond: a==0
 19358  	// result: x
 19359  	for {
 19360  		a := ssa.AuxIntToUint8(v.AuxInt)
 19361  		x := v_0
 19362  		if !(a == 0) {
 19363  			break
 19364  		}
 19365  		v.CopyOf(x)
 19366  		return true
 19367  	}
 19368  	return false
 19369  }
 19370  func rewriteValue_OpARM64VSQSHL4Sconst(v *ssa.Value) bool {
 19371  	v_0 := v.Args[0]
 19372  	// match: (VSQSHL4Sconst [a] x)
 19373  	// cond: a==0
 19374  	// result: x
 19375  	for {
 19376  		a := ssa.AuxIntToUint8(v.AuxInt)
 19377  		x := v_0
 19378  		if !(a == 0) {
 19379  			break
 19380  		}
 19381  		v.CopyOf(x)
 19382  		return true
 19383  	}
 19384  	return false
 19385  }
 19386  func rewriteValue_OpARM64VSQSHL8Hconst(v *ssa.Value) bool {
 19387  	v_0 := v.Args[0]
 19388  	// match: (VSQSHL8Hconst [a] x)
 19389  	// cond: a==0
 19390  	// result: x
 19391  	for {
 19392  		a := ssa.AuxIntToUint8(v.AuxInt)
 19393  		x := v_0
 19394  		if !(a == 0) {
 19395  			break
 19396  		}
 19397  		v.CopyOf(x)
 19398  		return true
 19399  	}
 19400  	return false
 19401  }
 19402  func rewriteValue_OpARM64VSSHLL16B(v *ssa.Value) bool {
 19403  	v_0 := v.Args[0]
 19404  	// match: (VSSHLL16B [a] (VDUPDextr [1] x))
 19405  	// result: (VSSHLL2_16B [a] x)
 19406  	for {
 19407  		a := ssa.AuxIntToUint8(v.AuxInt)
 19408  		if v_0.Op != ssaop.OpARM64VDUPDextr || ssa.AuxIntToUint8(v_0.AuxInt) != 1 {
 19409  			break
 19410  		}
 19411  		x := v_0.Args[0]
 19412  		v.Reset(ssaop.OpARM64VSSHLL2_16B)
 19413  		v.AuxInt = ssa.Uint8ToAuxInt(a)
 19414  		v.AddArg(x)
 19415  		return true
 19416  	}
 19417  	return false
 19418  }
 19419  func rewriteValue_OpARM64VSSHLL4S(v *ssa.Value) bool {
 19420  	v_0 := v.Args[0]
 19421  	// match: (VSSHLL4S [a] (VDUPDextr [1] x))
 19422  	// result: (VSSHLL2_4S [a] x)
 19423  	for {
 19424  		a := ssa.AuxIntToUint8(v.AuxInt)
 19425  		if v_0.Op != ssaop.OpARM64VDUPDextr || ssa.AuxIntToUint8(v_0.AuxInt) != 1 {
 19426  			break
 19427  		}
 19428  		x := v_0.Args[0]
 19429  		v.Reset(ssaop.OpARM64VSSHLL2_4S)
 19430  		v.AuxInt = ssa.Uint8ToAuxInt(a)
 19431  		v.AddArg(x)
 19432  		return true
 19433  	}
 19434  	return false
 19435  }
 19436  func rewriteValue_OpARM64VSSHLL8H(v *ssa.Value) bool {
 19437  	v_0 := v.Args[0]
 19438  	// match: (VSSHLL8H [a] (VDUPDextr [1] x))
 19439  	// result: (VSSHLL2_8H [a] x)
 19440  	for {
 19441  		a := ssa.AuxIntToUint8(v.AuxInt)
 19442  		if v_0.Op != ssaop.OpARM64VDUPDextr || ssa.AuxIntToUint8(v_0.AuxInt) != 1 {
 19443  			break
 19444  		}
 19445  		x := v_0.Args[0]
 19446  		v.Reset(ssaop.OpARM64VSSHLL2_8H)
 19447  		v.AuxInt = ssa.Uint8ToAuxInt(a)
 19448  		v.AddArg(x)
 19449  		return true
 19450  	}
 19451  	return false
 19452  }
 19453  func rewriteValue_OpARM64VSSHR16B(v *ssa.Value) bool {
 19454  	v_0 := v.Args[0]
 19455  	// match: (VSSHR16B [a] x)
 19456  	// cond: a==0
 19457  	// result: x
 19458  	for {
 19459  		a := ssa.AuxIntToUint8(v.AuxInt)
 19460  		x := v_0
 19461  		if !(a == 0) {
 19462  			break
 19463  		}
 19464  		v.CopyOf(x)
 19465  		return true
 19466  	}
 19467  	return false
 19468  }
 19469  func rewriteValue_OpARM64VSSHR2D(v *ssa.Value) bool {
 19470  	v_0 := v.Args[0]
 19471  	// match: (VSSHR2D [a] x)
 19472  	// cond: a==0
 19473  	// result: x
 19474  	for {
 19475  		a := ssa.AuxIntToUint8(v.AuxInt)
 19476  		x := v_0
 19477  		if !(a == 0) {
 19478  			break
 19479  		}
 19480  		v.CopyOf(x)
 19481  		return true
 19482  	}
 19483  	return false
 19484  }
 19485  func rewriteValue_OpARM64VSSHR4S(v *ssa.Value) bool {
 19486  	v_0 := v.Args[0]
 19487  	// match: (VSSHR4S [a] x)
 19488  	// cond: a==0
 19489  	// result: x
 19490  	for {
 19491  		a := ssa.AuxIntToUint8(v.AuxInt)
 19492  		x := v_0
 19493  		if !(a == 0) {
 19494  			break
 19495  		}
 19496  		v.CopyOf(x)
 19497  		return true
 19498  	}
 19499  	return false
 19500  }
 19501  func rewriteValue_OpARM64VSSHR8H(v *ssa.Value) bool {
 19502  	v_0 := v.Args[0]
 19503  	// match: (VSSHR8H [a] x)
 19504  	// cond: a==0
 19505  	// result: x
 19506  	for {
 19507  		a := ssa.AuxIntToUint8(v.AuxInt)
 19508  		x := v_0
 19509  		if !(a == 0) {
 19510  			break
 19511  		}
 19512  		v.CopyOf(x)
 19513  		return true
 19514  	}
 19515  	return false
 19516  }
 19517  func rewriteValue_OpARM64VSXTL16B(v *ssa.Value) bool {
 19518  	v_0 := v.Args[0]
 19519  	// match: (VSXTL16B (VDUPDextr [1] x))
 19520  	// result: (VSXTL2_16B x)
 19521  	for {
 19522  		if v_0.Op != ssaop.OpARM64VDUPDextr || ssa.AuxIntToUint8(v_0.AuxInt) != 1 {
 19523  			break
 19524  		}
 19525  		x := v_0.Args[0]
 19526  		v.Reset(ssaop.OpARM64VSXTL2_16B)
 19527  		v.AddArg(x)
 19528  		return true
 19529  	}
 19530  	return false
 19531  }
 19532  func rewriteValue_OpARM64VSXTL4S(v *ssa.Value) bool {
 19533  	v_0 := v.Args[0]
 19534  	// match: (VSXTL4S (VDUPDextr [1] x))
 19535  	// result: (VSXTL2_4S x)
 19536  	for {
 19537  		if v_0.Op != ssaop.OpARM64VDUPDextr || ssa.AuxIntToUint8(v_0.AuxInt) != 1 {
 19538  			break
 19539  		}
 19540  		x := v_0.Args[0]
 19541  		v.Reset(ssaop.OpARM64VSXTL2_4S)
 19542  		v.AddArg(x)
 19543  		return true
 19544  	}
 19545  	return false
 19546  }
 19547  func rewriteValue_OpARM64VSXTL8H(v *ssa.Value) bool {
 19548  	v_0 := v.Args[0]
 19549  	// match: (VSXTL8H (VDUPDextr [1] x))
 19550  	// result: (VSXTL2_8H x)
 19551  	for {
 19552  		if v_0.Op != ssaop.OpARM64VDUPDextr || ssa.AuxIntToUint8(v_0.AuxInt) != 1 {
 19553  			break
 19554  		}
 19555  		x := v_0.Args[0]
 19556  		v.Reset(ssaop.OpARM64VSXTL2_8H)
 19557  		v.AddArg(x)
 19558  		return true
 19559  	}
 19560  	return false
 19561  }
 19562  func rewriteValue_OpARM64VUMULL16B(v *ssa.Value) bool {
 19563  	v_1 := v.Args[1]
 19564  	v_0 := v.Args[0]
 19565  	// match: (VUMULL16B (VDUPDextr [1] x) (VDUPDextr [1] y))
 19566  	// result: (VUMULL2_16B x y)
 19567  	for {
 19568  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 19569  			if v_0.Op != ssaop.OpARM64VDUPDextr || ssa.AuxIntToUint8(v_0.AuxInt) != 1 {
 19570  				continue
 19571  			}
 19572  			x := v_0.Args[0]
 19573  			if v_1.Op != ssaop.OpARM64VDUPDextr || ssa.AuxIntToUint8(v_1.AuxInt) != 1 {
 19574  				continue
 19575  			}
 19576  			y := v_1.Args[0]
 19577  			v.Reset(ssaop.OpARM64VUMULL2_16B)
 19578  			v.AddArg2(x, y)
 19579  			return true
 19580  		}
 19581  		break
 19582  	}
 19583  	return false
 19584  }
 19585  func rewriteValue_OpARM64VUMULL4S(v *ssa.Value) bool {
 19586  	v_1 := v.Args[1]
 19587  	v_0 := v.Args[0]
 19588  	// match: (VUMULL4S (VDUPDextr [1] x) (VDUPDextr [1] y))
 19589  	// result: (VUMULL2_4S x y)
 19590  	for {
 19591  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 19592  			if v_0.Op != ssaop.OpARM64VDUPDextr || ssa.AuxIntToUint8(v_0.AuxInt) != 1 {
 19593  				continue
 19594  			}
 19595  			x := v_0.Args[0]
 19596  			if v_1.Op != ssaop.OpARM64VDUPDextr || ssa.AuxIntToUint8(v_1.AuxInt) != 1 {
 19597  				continue
 19598  			}
 19599  			y := v_1.Args[0]
 19600  			v.Reset(ssaop.OpARM64VUMULL2_4S)
 19601  			v.AddArg2(x, y)
 19602  			return true
 19603  		}
 19604  		break
 19605  	}
 19606  	return false
 19607  }
 19608  func rewriteValue_OpARM64VUMULL8H(v *ssa.Value) bool {
 19609  	v_1 := v.Args[1]
 19610  	v_0 := v.Args[0]
 19611  	// match: (VUMULL8H (VDUPDextr [1] x) (VDUPDextr [1] y))
 19612  	// result: (VUMULL2_8H x y)
 19613  	for {
 19614  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 19615  			if v_0.Op != ssaop.OpARM64VDUPDextr || ssa.AuxIntToUint8(v_0.AuxInt) != 1 {
 19616  				continue
 19617  			}
 19618  			x := v_0.Args[0]
 19619  			if v_1.Op != ssaop.OpARM64VDUPDextr || ssa.AuxIntToUint8(v_1.AuxInt) != 1 {
 19620  				continue
 19621  			}
 19622  			y := v_1.Args[0]
 19623  			v.Reset(ssaop.OpARM64VUMULL2_8H)
 19624  			v.AddArg2(x, y)
 19625  			return true
 19626  		}
 19627  		break
 19628  	}
 19629  	return false
 19630  }
 19631  func rewriteValue_OpARM64VUQSHL16Bconst(v *ssa.Value) bool {
 19632  	v_0 := v.Args[0]
 19633  	// match: (VUQSHL16Bconst [a] x)
 19634  	// cond: a==0
 19635  	// result: x
 19636  	for {
 19637  		a := ssa.AuxIntToUint8(v.AuxInt)
 19638  		x := v_0
 19639  		if !(a == 0) {
 19640  			break
 19641  		}
 19642  		v.CopyOf(x)
 19643  		return true
 19644  	}
 19645  	return false
 19646  }
 19647  func rewriteValue_OpARM64VUQSHL2Dconst(v *ssa.Value) bool {
 19648  	v_0 := v.Args[0]
 19649  	// match: (VUQSHL2Dconst [a] x)
 19650  	// cond: a==0
 19651  	// result: x
 19652  	for {
 19653  		a := ssa.AuxIntToUint8(v.AuxInt)
 19654  		x := v_0
 19655  		if !(a == 0) {
 19656  			break
 19657  		}
 19658  		v.CopyOf(x)
 19659  		return true
 19660  	}
 19661  	return false
 19662  }
 19663  func rewriteValue_OpARM64VUQSHL4Sconst(v *ssa.Value) bool {
 19664  	v_0 := v.Args[0]
 19665  	// match: (VUQSHL4Sconst [a] x)
 19666  	// cond: a==0
 19667  	// result: x
 19668  	for {
 19669  		a := ssa.AuxIntToUint8(v.AuxInt)
 19670  		x := v_0
 19671  		if !(a == 0) {
 19672  			break
 19673  		}
 19674  		v.CopyOf(x)
 19675  		return true
 19676  	}
 19677  	return false
 19678  }
 19679  func rewriteValue_OpARM64VUQSHL8Hconst(v *ssa.Value) bool {
 19680  	v_0 := v.Args[0]
 19681  	// match: (VUQSHL8Hconst [a] x)
 19682  	// cond: a==0
 19683  	// result: x
 19684  	for {
 19685  		a := ssa.AuxIntToUint8(v.AuxInt)
 19686  		x := v_0
 19687  		if !(a == 0) {
 19688  			break
 19689  		}
 19690  		v.CopyOf(x)
 19691  		return true
 19692  	}
 19693  	return false
 19694  }
 19695  func rewriteValue_OpARM64VUSHLL16B(v *ssa.Value) bool {
 19696  	v_0 := v.Args[0]
 19697  	// match: (VUSHLL16B [a] (VDUPDextr [1] x))
 19698  	// result: (VUSHLL2_16B [a] x)
 19699  	for {
 19700  		a := ssa.AuxIntToUint8(v.AuxInt)
 19701  		if v_0.Op != ssaop.OpARM64VDUPDextr || ssa.AuxIntToUint8(v_0.AuxInt) != 1 {
 19702  			break
 19703  		}
 19704  		x := v_0.Args[0]
 19705  		v.Reset(ssaop.OpARM64VUSHLL2_16B)
 19706  		v.AuxInt = ssa.Uint8ToAuxInt(a)
 19707  		v.AddArg(x)
 19708  		return true
 19709  	}
 19710  	return false
 19711  }
 19712  func rewriteValue_OpARM64VUSHLL4S(v *ssa.Value) bool {
 19713  	v_0 := v.Args[0]
 19714  	// match: (VUSHLL4S [a] (VDUPDextr [1] x))
 19715  	// result: (VUSHLL2_4S [a] x)
 19716  	for {
 19717  		a := ssa.AuxIntToUint8(v.AuxInt)
 19718  		if v_0.Op != ssaop.OpARM64VDUPDextr || ssa.AuxIntToUint8(v_0.AuxInt) != 1 {
 19719  			break
 19720  		}
 19721  		x := v_0.Args[0]
 19722  		v.Reset(ssaop.OpARM64VUSHLL2_4S)
 19723  		v.AuxInt = ssa.Uint8ToAuxInt(a)
 19724  		v.AddArg(x)
 19725  		return true
 19726  	}
 19727  	return false
 19728  }
 19729  func rewriteValue_OpARM64VUSHLL8H(v *ssa.Value) bool {
 19730  	v_0 := v.Args[0]
 19731  	// match: (VUSHLL8H [a] (VDUPDextr [1] x))
 19732  	// result: (VUSHLL2_8H [a] x)
 19733  	for {
 19734  		a := ssa.AuxIntToUint8(v.AuxInt)
 19735  		if v_0.Op != ssaop.OpARM64VDUPDextr || ssa.AuxIntToUint8(v_0.AuxInt) != 1 {
 19736  			break
 19737  		}
 19738  		x := v_0.Args[0]
 19739  		v.Reset(ssaop.OpARM64VUSHLL2_8H)
 19740  		v.AuxInt = ssa.Uint8ToAuxInt(a)
 19741  		v.AddArg(x)
 19742  		return true
 19743  	}
 19744  	return false
 19745  }
 19746  func rewriteValue_OpARM64VUSHR16B(v *ssa.Value) bool {
 19747  	v_0 := v.Args[0]
 19748  	// match: (VUSHR16B [a] x)
 19749  	// cond: a==0
 19750  	// result: x
 19751  	for {
 19752  		a := ssa.AuxIntToUint8(v.AuxInt)
 19753  		x := v_0
 19754  		if !(a == 0) {
 19755  			break
 19756  		}
 19757  		v.CopyOf(x)
 19758  		return true
 19759  	}
 19760  	return false
 19761  }
 19762  func rewriteValue_OpARM64VUSHR2D(v *ssa.Value) bool {
 19763  	v_0 := v.Args[0]
 19764  	// match: (VUSHR2D [a] x)
 19765  	// cond: a==0
 19766  	// result: x
 19767  	for {
 19768  		a := ssa.AuxIntToUint8(v.AuxInt)
 19769  		x := v_0
 19770  		if !(a == 0) {
 19771  			break
 19772  		}
 19773  		v.CopyOf(x)
 19774  		return true
 19775  	}
 19776  	return false
 19777  }
 19778  func rewriteValue_OpARM64VUSHR4S(v *ssa.Value) bool {
 19779  	v_0 := v.Args[0]
 19780  	// match: (VUSHR4S [a] x)
 19781  	// cond: a==0
 19782  	// result: x
 19783  	for {
 19784  		a := ssa.AuxIntToUint8(v.AuxInt)
 19785  		x := v_0
 19786  		if !(a == 0) {
 19787  			break
 19788  		}
 19789  		v.CopyOf(x)
 19790  		return true
 19791  	}
 19792  	return false
 19793  }
 19794  func rewriteValue_OpARM64VUSHR8H(v *ssa.Value) bool {
 19795  	v_0 := v.Args[0]
 19796  	// match: (VUSHR8H [a] x)
 19797  	// cond: a==0
 19798  	// result: x
 19799  	for {
 19800  		a := ssa.AuxIntToUint8(v.AuxInt)
 19801  		x := v_0
 19802  		if !(a == 0) {
 19803  			break
 19804  		}
 19805  		v.CopyOf(x)
 19806  		return true
 19807  	}
 19808  	return false
 19809  }
 19810  func rewriteValue_OpARM64VUXTL16B(v *ssa.Value) bool {
 19811  	v_0 := v.Args[0]
 19812  	// match: (VUXTL16B (VDUPDextr [1] x))
 19813  	// result: (VUXTL2_16B x)
 19814  	for {
 19815  		if v_0.Op != ssaop.OpARM64VDUPDextr || ssa.AuxIntToUint8(v_0.AuxInt) != 1 {
 19816  			break
 19817  		}
 19818  		x := v_0.Args[0]
 19819  		v.Reset(ssaop.OpARM64VUXTL2_16B)
 19820  		v.AddArg(x)
 19821  		return true
 19822  	}
 19823  	return false
 19824  }
 19825  func rewriteValue_OpARM64VUXTL4S(v *ssa.Value) bool {
 19826  	v_0 := v.Args[0]
 19827  	// match: (VUXTL4S (VDUPDextr [1] x))
 19828  	// result: (VUXTL2_4S x)
 19829  	for {
 19830  		if v_0.Op != ssaop.OpARM64VDUPDextr || ssa.AuxIntToUint8(v_0.AuxInt) != 1 {
 19831  			break
 19832  		}
 19833  		x := v_0.Args[0]
 19834  		v.Reset(ssaop.OpARM64VUXTL2_4S)
 19835  		v.AddArg(x)
 19836  		return true
 19837  	}
 19838  	return false
 19839  }
 19840  func rewriteValue_OpARM64VUXTL8H(v *ssa.Value) bool {
 19841  	v_0 := v.Args[0]
 19842  	// match: (VUXTL8H (VDUPDextr [1] x))
 19843  	// result: (VUXTL2_8H x)
 19844  	for {
 19845  		if v_0.Op != ssaop.OpARM64VDUPDextr || ssa.AuxIntToUint8(v_0.AuxInt) != 1 {
 19846  			break
 19847  		}
 19848  		x := v_0.Args[0]
 19849  		v.Reset(ssaop.OpARM64VUXTL2_8H)
 19850  		v.AddArg(x)
 19851  		return true
 19852  	}
 19853  	return false
 19854  }
 19855  func rewriteValue_OpARM64XOR(v *ssa.Value) bool {
 19856  	v_1 := v.Args[1]
 19857  	v_0 := v.Args[0]
 19858  	// match: (XOR x (MOVDconst [c]))
 19859  	// result: (XORconst [c] x)
 19860  	for {
 19861  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 19862  			x := v_0
 19863  			if v_1.Op != ssaop.OpARM64MOVDconst {
 19864  				continue
 19865  			}
 19866  			c := ssa.AuxIntToInt64(v_1.AuxInt)
 19867  			v.Reset(ssaop.OpARM64XORconst)
 19868  			v.AuxInt = ssa.Int64ToAuxInt(c)
 19869  			v.AddArg(x)
 19870  			return true
 19871  		}
 19872  		break
 19873  	}
 19874  	// match: (XOR x x)
 19875  	// result: (MOVDconst [0])
 19876  	for {
 19877  		x := v_0
 19878  		if x != v_1 {
 19879  			break
 19880  		}
 19881  		v.Reset(ssaop.OpARM64MOVDconst)
 19882  		v.AuxInt = ssa.Int64ToAuxInt(0)
 19883  		return true
 19884  	}
 19885  	// match: (XOR x (MVN y))
 19886  	// result: (EON x y)
 19887  	for {
 19888  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 19889  			x := v_0
 19890  			if v_1.Op != ssaop.OpARM64MVN {
 19891  				continue
 19892  			}
 19893  			y := v_1.Args[0]
 19894  			v.Reset(ssaop.OpARM64EON)
 19895  			v.AddArg2(x, y)
 19896  			return true
 19897  		}
 19898  		break
 19899  	}
 19900  	// match: (XOR x0 x1:(SLLconst [c] y))
 19901  	// cond: ssa.ClobberIfDead(x1)
 19902  	// result: (XORshiftLL x0 y [c])
 19903  	for {
 19904  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 19905  			x0 := v_0
 19906  			x1 := v_1
 19907  			if x1.Op != ssaop.OpARM64SLLconst {
 19908  				continue
 19909  			}
 19910  			c := ssa.AuxIntToInt64(x1.AuxInt)
 19911  			y := x1.Args[0]
 19912  			if !(ssa.ClobberIfDead(x1)) {
 19913  				continue
 19914  			}
 19915  			v.Reset(ssaop.OpARM64XORshiftLL)
 19916  			v.AuxInt = ssa.Int64ToAuxInt(c)
 19917  			v.AddArg2(x0, y)
 19918  			return true
 19919  		}
 19920  		break
 19921  	}
 19922  	// match: (XOR x0 x1:(SRLconst [c] y))
 19923  	// cond: ssa.ClobberIfDead(x1)
 19924  	// result: (XORshiftRL x0 y [c])
 19925  	for {
 19926  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 19927  			x0 := v_0
 19928  			x1 := v_1
 19929  			if x1.Op != ssaop.OpARM64SRLconst {
 19930  				continue
 19931  			}
 19932  			c := ssa.AuxIntToInt64(x1.AuxInt)
 19933  			y := x1.Args[0]
 19934  			if !(ssa.ClobberIfDead(x1)) {
 19935  				continue
 19936  			}
 19937  			v.Reset(ssaop.OpARM64XORshiftRL)
 19938  			v.AuxInt = ssa.Int64ToAuxInt(c)
 19939  			v.AddArg2(x0, y)
 19940  			return true
 19941  		}
 19942  		break
 19943  	}
 19944  	// match: (XOR x0 x1:(SRAconst [c] y))
 19945  	// cond: ssa.ClobberIfDead(x1)
 19946  	// result: (XORshiftRA x0 y [c])
 19947  	for {
 19948  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 19949  			x0 := v_0
 19950  			x1 := v_1
 19951  			if x1.Op != ssaop.OpARM64SRAconst {
 19952  				continue
 19953  			}
 19954  			c := ssa.AuxIntToInt64(x1.AuxInt)
 19955  			y := x1.Args[0]
 19956  			if !(ssa.ClobberIfDead(x1)) {
 19957  				continue
 19958  			}
 19959  			v.Reset(ssaop.OpARM64XORshiftRA)
 19960  			v.AuxInt = ssa.Int64ToAuxInt(c)
 19961  			v.AddArg2(x0, y)
 19962  			return true
 19963  		}
 19964  		break
 19965  	}
 19966  	// match: (XOR x0 x1:(RORconst [c] y))
 19967  	// cond: ssa.ClobberIfDead(x1)
 19968  	// result: (XORshiftRO x0 y [c])
 19969  	for {
 19970  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 19971  			x0 := v_0
 19972  			x1 := v_1
 19973  			if x1.Op != ssaop.OpARM64RORconst {
 19974  				continue
 19975  			}
 19976  			c := ssa.AuxIntToInt64(x1.AuxInt)
 19977  			y := x1.Args[0]
 19978  			if !(ssa.ClobberIfDead(x1)) {
 19979  				continue
 19980  			}
 19981  			v.Reset(ssaop.OpARM64XORshiftRO)
 19982  			v.AuxInt = ssa.Int64ToAuxInt(c)
 19983  			v.AddArg2(x0, y)
 19984  			return true
 19985  		}
 19986  		break
 19987  	}
 19988  	return false
 19989  }
 19990  func rewriteValue_OpARM64XORconst(v *ssa.Value) bool {
 19991  	v_0 := v.Args[0]
 19992  	// match: (XORconst [0] x)
 19993  	// result: x
 19994  	for {
 19995  		if ssa.AuxIntToInt64(v.AuxInt) != 0 {
 19996  			break
 19997  		}
 19998  		x := v_0
 19999  		v.CopyOf(x)
 20000  		return true
 20001  	}
 20002  	// match: (XORconst [-1] x)
 20003  	// result: (MVN x)
 20004  	for {
 20005  		if ssa.AuxIntToInt64(v.AuxInt) != -1 {
 20006  			break
 20007  		}
 20008  		x := v_0
 20009  		v.Reset(ssaop.OpARM64MVN)
 20010  		v.AddArg(x)
 20011  		return true
 20012  	}
 20013  	// match: (XORconst [c] (MOVDconst [d]))
 20014  	// result: (MOVDconst [c^d])
 20015  	for {
 20016  		c := ssa.AuxIntToInt64(v.AuxInt)
 20017  		if v_0.Op != ssaop.OpARM64MOVDconst {
 20018  			break
 20019  		}
 20020  		d := ssa.AuxIntToInt64(v_0.AuxInt)
 20021  		v.Reset(ssaop.OpARM64MOVDconst)
 20022  		v.AuxInt = ssa.Int64ToAuxInt(c ^ d)
 20023  		return true
 20024  	}
 20025  	// match: (XORconst [c] (XORconst [d] x))
 20026  	// result: (XORconst [c^d] x)
 20027  	for {
 20028  		c := ssa.AuxIntToInt64(v.AuxInt)
 20029  		if v_0.Op != ssaop.OpARM64XORconst {
 20030  			break
 20031  		}
 20032  		d := ssa.AuxIntToInt64(v_0.AuxInt)
 20033  		x := v_0.Args[0]
 20034  		v.Reset(ssaop.OpARM64XORconst)
 20035  		v.AuxInt = ssa.Int64ToAuxInt(c ^ d)
 20036  		v.AddArg(x)
 20037  		return true
 20038  	}
 20039  	return false
 20040  }
 20041  func rewriteValue_OpARM64XORshiftLL(v *ssa.Value) bool {
 20042  	v_1 := v.Args[1]
 20043  	v_0 := v.Args[0]
 20044  	b := v.Block
 20045  	typ := &b.Func.Config.Types
 20046  	// match: (XORshiftLL (MOVDconst [c]) x [d])
 20047  	// result: (XORconst [c] (SLLconst <x.Type> x [d]))
 20048  	for {
 20049  		d := ssa.AuxIntToInt64(v.AuxInt)
 20050  		if v_0.Op != ssaop.OpARM64MOVDconst {
 20051  			break
 20052  		}
 20053  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 20054  		x := v_1
 20055  		v.Reset(ssaop.OpARM64XORconst)
 20056  		v.AuxInt = ssa.Int64ToAuxInt(c)
 20057  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SLLconst, x.Type)
 20058  		v0.AuxInt = ssa.Int64ToAuxInt(d)
 20059  		v0.AddArg(x)
 20060  		v.AddArg(v0)
 20061  		return true
 20062  	}
 20063  	// match: (XORshiftLL x (MOVDconst [c]) [d])
 20064  	// result: (XORconst x [int64(uint64(c)<<uint64(d))])
 20065  	for {
 20066  		d := ssa.AuxIntToInt64(v.AuxInt)
 20067  		x := v_0
 20068  		if v_1.Op != ssaop.OpARM64MOVDconst {
 20069  			break
 20070  		}
 20071  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 20072  		v.Reset(ssaop.OpARM64XORconst)
 20073  		v.AuxInt = ssa.Int64ToAuxInt(int64(uint64(c) << uint64(d)))
 20074  		v.AddArg(x)
 20075  		return true
 20076  	}
 20077  	// match: (XORshiftLL (SLLconst x [c]) x [c])
 20078  	// result: (MOVDconst [0])
 20079  	for {
 20080  		c := ssa.AuxIntToInt64(v.AuxInt)
 20081  		if v_0.Op != ssaop.OpARM64SLLconst || ssa.AuxIntToInt64(v_0.AuxInt) != c {
 20082  			break
 20083  		}
 20084  		x := v_0.Args[0]
 20085  		if x != v_1 {
 20086  			break
 20087  		}
 20088  		v.Reset(ssaop.OpARM64MOVDconst)
 20089  		v.AuxInt = ssa.Int64ToAuxInt(0)
 20090  		return true
 20091  	}
 20092  	// match: (XORshiftLL <typ.UInt16> [8] (UBFX <typ.UInt16> [ssa.ArmBFAuxInt(8, 8)] x) x)
 20093  	// result: (REV16W x)
 20094  	for {
 20095  		if v.Type != typ.UInt16 || ssa.AuxIntToInt64(v.AuxInt) != 8 || v_0.Op != ssaop.OpARM64UBFX || v_0.Type != typ.UInt16 || ssa.AuxIntToArm64BitField(v_0.AuxInt) != ssa.ArmBFAuxInt(8, 8) {
 20096  			break
 20097  		}
 20098  		x := v_0.Args[0]
 20099  		if x != v_1 {
 20100  			break
 20101  		}
 20102  		v.Reset(ssaop.OpARM64REV16W)
 20103  		v.AddArg(x)
 20104  		return true
 20105  	}
 20106  	// match: (XORshiftLL [8] (UBFX [ssa.ArmBFAuxInt(8, 24)] (ANDconst [c1] x)) (ANDconst [c2] x))
 20107  	// cond: uint32(c1) == 0xff00ff00 && uint32(c2) == 0x00ff00ff
 20108  	// result: (REV16W x)
 20109  	for {
 20110  		if ssa.AuxIntToInt64(v.AuxInt) != 8 || v_0.Op != ssaop.OpARM64UBFX || ssa.AuxIntToArm64BitField(v_0.AuxInt) != ssa.ArmBFAuxInt(8, 24) {
 20111  			break
 20112  		}
 20113  		v_0_0 := v_0.Args[0]
 20114  		if v_0_0.Op != ssaop.OpARM64ANDconst {
 20115  			break
 20116  		}
 20117  		c1 := ssa.AuxIntToInt64(v_0_0.AuxInt)
 20118  		x := v_0_0.Args[0]
 20119  		if v_1.Op != ssaop.OpARM64ANDconst {
 20120  			break
 20121  		}
 20122  		c2 := ssa.AuxIntToInt64(v_1.AuxInt)
 20123  		if x != v_1.Args[0] || !(uint32(c1) == 0xff00ff00 && uint32(c2) == 0x00ff00ff) {
 20124  			break
 20125  		}
 20126  		v.Reset(ssaop.OpARM64REV16W)
 20127  		v.AddArg(x)
 20128  		return true
 20129  	}
 20130  	// match: (XORshiftLL [8] (SRLconst [8] (ANDconst [c1] x)) (ANDconst [c2] x))
 20131  	// cond: (uint64(c1) == 0xff00ff00ff00ff00 && uint64(c2) == 0x00ff00ff00ff00ff)
 20132  	// result: (REV16 x)
 20133  	for {
 20134  		if ssa.AuxIntToInt64(v.AuxInt) != 8 || v_0.Op != ssaop.OpARM64SRLconst || ssa.AuxIntToInt64(v_0.AuxInt) != 8 {
 20135  			break
 20136  		}
 20137  		v_0_0 := v_0.Args[0]
 20138  		if v_0_0.Op != ssaop.OpARM64ANDconst {
 20139  			break
 20140  		}
 20141  		c1 := ssa.AuxIntToInt64(v_0_0.AuxInt)
 20142  		x := v_0_0.Args[0]
 20143  		if v_1.Op != ssaop.OpARM64ANDconst {
 20144  			break
 20145  		}
 20146  		c2 := ssa.AuxIntToInt64(v_1.AuxInt)
 20147  		if x != v_1.Args[0] || !(uint64(c1) == 0xff00ff00ff00ff00 && uint64(c2) == 0x00ff00ff00ff00ff) {
 20148  			break
 20149  		}
 20150  		v.Reset(ssaop.OpARM64REV16)
 20151  		v.AddArg(x)
 20152  		return true
 20153  	}
 20154  	// match: (XORshiftLL [8] (SRLconst [8] (ANDconst [c1] x)) (ANDconst [c2] x))
 20155  	// cond: (uint64(c1) == 0xff00ff00 && uint64(c2) == 0x00ff00ff)
 20156  	// result: (REV16 (ANDconst <x.Type> [0xffffffff] x))
 20157  	for {
 20158  		if ssa.AuxIntToInt64(v.AuxInt) != 8 || v_0.Op != ssaop.OpARM64SRLconst || ssa.AuxIntToInt64(v_0.AuxInt) != 8 {
 20159  			break
 20160  		}
 20161  		v_0_0 := v_0.Args[0]
 20162  		if v_0_0.Op != ssaop.OpARM64ANDconst {
 20163  			break
 20164  		}
 20165  		c1 := ssa.AuxIntToInt64(v_0_0.AuxInt)
 20166  		x := v_0_0.Args[0]
 20167  		if v_1.Op != ssaop.OpARM64ANDconst {
 20168  			break
 20169  		}
 20170  		c2 := ssa.AuxIntToInt64(v_1.AuxInt)
 20171  		if x != v_1.Args[0] || !(uint64(c1) == 0xff00ff00 && uint64(c2) == 0x00ff00ff) {
 20172  			break
 20173  		}
 20174  		v.Reset(ssaop.OpARM64REV16)
 20175  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64ANDconst, x.Type)
 20176  		v0.AuxInt = ssa.Int64ToAuxInt(0xffffffff)
 20177  		v0.AddArg(x)
 20178  		v.AddArg(v0)
 20179  		return true
 20180  	}
 20181  	// match: (XORshiftLL [c] (SRLconst x [64-c]) x2)
 20182  	// result: (EXTRconst [64-c] x2 x)
 20183  	for {
 20184  		c := ssa.AuxIntToInt64(v.AuxInt)
 20185  		if v_0.Op != ssaop.OpARM64SRLconst || ssa.AuxIntToInt64(v_0.AuxInt) != 64-c {
 20186  			break
 20187  		}
 20188  		x := v_0.Args[0]
 20189  		x2 := v_1
 20190  		v.Reset(ssaop.OpARM64EXTRconst)
 20191  		v.AuxInt = ssa.Int64ToAuxInt(64 - c)
 20192  		v.AddArg2(x2, x)
 20193  		return true
 20194  	}
 20195  	// match: (XORshiftLL <t> [c] (UBFX [bfc] x) x2)
 20196  	// cond: c < 32 && t.Size() == 4 && bfc == ssa.ArmBFAuxInt(32-c, c)
 20197  	// result: (EXTRWconst [32-c] x2 x)
 20198  	for {
 20199  		t := v.Type
 20200  		c := ssa.AuxIntToInt64(v.AuxInt)
 20201  		if v_0.Op != ssaop.OpARM64UBFX {
 20202  			break
 20203  		}
 20204  		bfc := ssa.AuxIntToArm64BitField(v_0.AuxInt)
 20205  		x := v_0.Args[0]
 20206  		x2 := v_1
 20207  		if !(c < 32 && t.Size() == 4 && bfc == ssa.ArmBFAuxInt(32-c, c)) {
 20208  			break
 20209  		}
 20210  		v.Reset(ssaop.OpARM64EXTRWconst)
 20211  		v.AuxInt = ssa.Int64ToAuxInt(32 - c)
 20212  		v.AddArg2(x2, x)
 20213  		return true
 20214  	}
 20215  	return false
 20216  }
 20217  func rewriteValue_OpARM64XORshiftRA(v *ssa.Value) bool {
 20218  	v_1 := v.Args[1]
 20219  	v_0 := v.Args[0]
 20220  	b := v.Block
 20221  	// match: (XORshiftRA (MOVDconst [c]) x [d])
 20222  	// result: (XORconst [c] (SRAconst <x.Type> x [d]))
 20223  	for {
 20224  		d := ssa.AuxIntToInt64(v.AuxInt)
 20225  		if v_0.Op != ssaop.OpARM64MOVDconst {
 20226  			break
 20227  		}
 20228  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 20229  		x := v_1
 20230  		v.Reset(ssaop.OpARM64XORconst)
 20231  		v.AuxInt = ssa.Int64ToAuxInt(c)
 20232  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SRAconst, x.Type)
 20233  		v0.AuxInt = ssa.Int64ToAuxInt(d)
 20234  		v0.AddArg(x)
 20235  		v.AddArg(v0)
 20236  		return true
 20237  	}
 20238  	// match: (XORshiftRA x (MOVDconst [c]) [d])
 20239  	// result: (XORconst x [c>>uint64(d)])
 20240  	for {
 20241  		d := ssa.AuxIntToInt64(v.AuxInt)
 20242  		x := v_0
 20243  		if v_1.Op != ssaop.OpARM64MOVDconst {
 20244  			break
 20245  		}
 20246  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 20247  		v.Reset(ssaop.OpARM64XORconst)
 20248  		v.AuxInt = ssa.Int64ToAuxInt(c >> uint64(d))
 20249  		v.AddArg(x)
 20250  		return true
 20251  	}
 20252  	// match: (XORshiftRA (SRAconst x [c]) x [c])
 20253  	// result: (MOVDconst [0])
 20254  	for {
 20255  		c := ssa.AuxIntToInt64(v.AuxInt)
 20256  		if v_0.Op != ssaop.OpARM64SRAconst || ssa.AuxIntToInt64(v_0.AuxInt) != c {
 20257  			break
 20258  		}
 20259  		x := v_0.Args[0]
 20260  		if x != v_1 {
 20261  			break
 20262  		}
 20263  		v.Reset(ssaop.OpARM64MOVDconst)
 20264  		v.AuxInt = ssa.Int64ToAuxInt(0)
 20265  		return true
 20266  	}
 20267  	return false
 20268  }
 20269  func rewriteValue_OpARM64XORshiftRL(v *ssa.Value) bool {
 20270  	v_1 := v.Args[1]
 20271  	v_0 := v.Args[0]
 20272  	b := v.Block
 20273  	// match: (XORshiftRL (MOVDconst [c]) x [d])
 20274  	// result: (XORconst [c] (SRLconst <x.Type> x [d]))
 20275  	for {
 20276  		d := ssa.AuxIntToInt64(v.AuxInt)
 20277  		if v_0.Op != ssaop.OpARM64MOVDconst {
 20278  			break
 20279  		}
 20280  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 20281  		x := v_1
 20282  		v.Reset(ssaop.OpARM64XORconst)
 20283  		v.AuxInt = ssa.Int64ToAuxInt(c)
 20284  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SRLconst, x.Type)
 20285  		v0.AuxInt = ssa.Int64ToAuxInt(d)
 20286  		v0.AddArg(x)
 20287  		v.AddArg(v0)
 20288  		return true
 20289  	}
 20290  	// match: (XORshiftRL x (MOVDconst [c]) [d])
 20291  	// result: (XORconst x [int64(uint64(c)>>uint64(d))])
 20292  	for {
 20293  		d := ssa.AuxIntToInt64(v.AuxInt)
 20294  		x := v_0
 20295  		if v_1.Op != ssaop.OpARM64MOVDconst {
 20296  			break
 20297  		}
 20298  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 20299  		v.Reset(ssaop.OpARM64XORconst)
 20300  		v.AuxInt = ssa.Int64ToAuxInt(int64(uint64(c) >> uint64(d)))
 20301  		v.AddArg(x)
 20302  		return true
 20303  	}
 20304  	// match: (XORshiftRL (SRLconst x [c]) x [c])
 20305  	// result: (MOVDconst [0])
 20306  	for {
 20307  		c := ssa.AuxIntToInt64(v.AuxInt)
 20308  		if v_0.Op != ssaop.OpARM64SRLconst || ssa.AuxIntToInt64(v_0.AuxInt) != c {
 20309  			break
 20310  		}
 20311  		x := v_0.Args[0]
 20312  		if x != v_1 {
 20313  			break
 20314  		}
 20315  		v.Reset(ssaop.OpARM64MOVDconst)
 20316  		v.AuxInt = ssa.Int64ToAuxInt(0)
 20317  		return true
 20318  	}
 20319  	return false
 20320  }
 20321  func rewriteValue_OpARM64XORshiftRO(v *ssa.Value) bool {
 20322  	v_1 := v.Args[1]
 20323  	v_0 := v.Args[0]
 20324  	b := v.Block
 20325  	// match: (XORshiftRO (MOVDconst [c]) x [d])
 20326  	// result: (XORconst [c] (RORconst <x.Type> x [d]))
 20327  	for {
 20328  		d := ssa.AuxIntToInt64(v.AuxInt)
 20329  		if v_0.Op != ssaop.OpARM64MOVDconst {
 20330  			break
 20331  		}
 20332  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 20333  		x := v_1
 20334  		v.Reset(ssaop.OpARM64XORconst)
 20335  		v.AuxInt = ssa.Int64ToAuxInt(c)
 20336  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64RORconst, x.Type)
 20337  		v0.AuxInt = ssa.Int64ToAuxInt(d)
 20338  		v0.AddArg(x)
 20339  		v.AddArg(v0)
 20340  		return true
 20341  	}
 20342  	// match: (XORshiftRO x (MOVDconst [c]) [d])
 20343  	// result: (XORconst x [rotateRight64(c, d)])
 20344  	for {
 20345  		d := ssa.AuxIntToInt64(v.AuxInt)
 20346  		x := v_0
 20347  		if v_1.Op != ssaop.OpARM64MOVDconst {
 20348  			break
 20349  		}
 20350  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 20351  		v.Reset(ssaop.OpARM64XORconst)
 20352  		v.AuxInt = ssa.Int64ToAuxInt(rotateRight64(c, d))
 20353  		v.AddArg(x)
 20354  		return true
 20355  	}
 20356  	// match: (XORshiftRO (RORconst x [c]) x [c])
 20357  	// result: (MOVDconst [0])
 20358  	for {
 20359  		c := ssa.AuxIntToInt64(v.AuxInt)
 20360  		if v_0.Op != ssaop.OpARM64RORconst || ssa.AuxIntToInt64(v_0.AuxInt) != c {
 20361  			break
 20362  		}
 20363  		x := v_0.Args[0]
 20364  		if x != v_1 {
 20365  			break
 20366  		}
 20367  		v.Reset(ssaop.OpARM64MOVDconst)
 20368  		v.AuxInt = ssa.Int64ToAuxInt(0)
 20369  		return true
 20370  	}
 20371  	return false
 20372  }
 20373  func rewriteValue_OpARM64ZCPYMergingB(v *ssa.Value) bool {
 20374  	v_2 := v.Args[2]
 20375  	v_1 := v.Args[1]
 20376  	v_0 := v.Args[0]
 20377  	// match: (ZCPYMergingB z (MOVDconst [c]) mask)
 20378  	// cond: c == int64(int8(c))
 20379  	// result: (ZCPYMergingBconst [int8(c)] z mask)
 20380  	for {
 20381  		z := v_0
 20382  		if v_1.Op != ssaop.OpARM64MOVDconst {
 20383  			break
 20384  		}
 20385  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 20386  		mask := v_2
 20387  		if !(c == int64(int8(c))) {
 20388  			break
 20389  		}
 20390  		v.Reset(ssaop.OpARM64ZCPYMergingBconst)
 20391  		v.AuxInt = ssa.Int8ToAuxInt(int8(c))
 20392  		v.AddArg2(z, mask)
 20393  		return true
 20394  	}
 20395  	return false
 20396  }
 20397  func rewriteValue_OpARM64ZCPYMergingBconst(v *ssa.Value) bool {
 20398  	v_1 := v.Args[1]
 20399  	v_0 := v.Args[0]
 20400  	// match: (ZCPYMergingBconst [c] (ZDUPBconst [0]) mask)
 20401  	// result: (ZCPYBconst [c] mask)
 20402  	for {
 20403  		c := ssa.AuxIntToInt8(v.AuxInt)
 20404  		if v_0.Op != ssaop.OpARM64ZDUPBconst || ssa.AuxIntToInt8(v_0.AuxInt) != 0 {
 20405  			break
 20406  		}
 20407  		mask := v_1
 20408  		v.Reset(ssaop.OpARM64ZCPYBconst)
 20409  		v.AuxInt = ssa.Int8ToAuxInt(c)
 20410  		v.AddArg(mask)
 20411  		return true
 20412  	}
 20413  	return false
 20414  }
 20415  func rewriteValue_OpARM64ZCPYMergingD(v *ssa.Value) bool {
 20416  	v_2 := v.Args[2]
 20417  	v_1 := v.Args[1]
 20418  	v_0 := v.Args[0]
 20419  	// match: (ZCPYMergingD z (MOVDconst [c]) mask)
 20420  	// cond: c == int64(int8(c))
 20421  	// result: (ZCPYMergingDconst [int8(c)] z mask)
 20422  	for {
 20423  		z := v_0
 20424  		if v_1.Op != ssaop.OpARM64MOVDconst {
 20425  			break
 20426  		}
 20427  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 20428  		mask := v_2
 20429  		if !(c == int64(int8(c))) {
 20430  			break
 20431  		}
 20432  		v.Reset(ssaop.OpARM64ZCPYMergingDconst)
 20433  		v.AuxInt = ssa.Int8ToAuxInt(int8(c))
 20434  		v.AddArg2(z, mask)
 20435  		return true
 20436  	}
 20437  	return false
 20438  }
 20439  func rewriteValue_OpARM64ZCPYMergingDconst(v *ssa.Value) bool {
 20440  	v_1 := v.Args[1]
 20441  	v_0 := v.Args[0]
 20442  	// match: (ZCPYMergingDconst [c] (ZDUPBconst [0]) mask)
 20443  	// result: (ZCPYDconst [c] mask)
 20444  	for {
 20445  		c := ssa.AuxIntToInt8(v.AuxInt)
 20446  		if v_0.Op != ssaop.OpARM64ZDUPBconst || ssa.AuxIntToInt8(v_0.AuxInt) != 0 {
 20447  			break
 20448  		}
 20449  		mask := v_1
 20450  		v.Reset(ssaop.OpARM64ZCPYDconst)
 20451  		v.AuxInt = ssa.Int8ToAuxInt(c)
 20452  		v.AddArg(mask)
 20453  		return true
 20454  	}
 20455  	return false
 20456  }
 20457  func rewriteValue_OpARM64ZCPYMergingH(v *ssa.Value) bool {
 20458  	v_2 := v.Args[2]
 20459  	v_1 := v.Args[1]
 20460  	v_0 := v.Args[0]
 20461  	// match: (ZCPYMergingH z (MOVDconst [c]) mask)
 20462  	// cond: c == int64(int8(c))
 20463  	// result: (ZCPYMergingHconst [int8(c)] z mask)
 20464  	for {
 20465  		z := v_0
 20466  		if v_1.Op != ssaop.OpARM64MOVDconst {
 20467  			break
 20468  		}
 20469  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 20470  		mask := v_2
 20471  		if !(c == int64(int8(c))) {
 20472  			break
 20473  		}
 20474  		v.Reset(ssaop.OpARM64ZCPYMergingHconst)
 20475  		v.AuxInt = ssa.Int8ToAuxInt(int8(c))
 20476  		v.AddArg2(z, mask)
 20477  		return true
 20478  	}
 20479  	return false
 20480  }
 20481  func rewriteValue_OpARM64ZCPYMergingHconst(v *ssa.Value) bool {
 20482  	v_1 := v.Args[1]
 20483  	v_0 := v.Args[0]
 20484  	// match: (ZCPYMergingHconst [c] (ZDUPBconst [0]) mask)
 20485  	// result: (ZCPYHconst [c] mask)
 20486  	for {
 20487  		c := ssa.AuxIntToInt8(v.AuxInt)
 20488  		if v_0.Op != ssaop.OpARM64ZDUPBconst || ssa.AuxIntToInt8(v_0.AuxInt) != 0 {
 20489  			break
 20490  		}
 20491  		mask := v_1
 20492  		v.Reset(ssaop.OpARM64ZCPYHconst)
 20493  		v.AuxInt = ssa.Int8ToAuxInt(c)
 20494  		v.AddArg(mask)
 20495  		return true
 20496  	}
 20497  	return false
 20498  }
 20499  func rewriteValue_OpARM64ZCPYMergingS(v *ssa.Value) bool {
 20500  	v_2 := v.Args[2]
 20501  	v_1 := v.Args[1]
 20502  	v_0 := v.Args[0]
 20503  	// match: (ZCPYMergingS z (MOVDconst [c]) mask)
 20504  	// cond: c == int64(int8(c))
 20505  	// result: (ZCPYMergingSconst [int8(c)] z mask)
 20506  	for {
 20507  		z := v_0
 20508  		if v_1.Op != ssaop.OpARM64MOVDconst {
 20509  			break
 20510  		}
 20511  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 20512  		mask := v_2
 20513  		if !(c == int64(int8(c))) {
 20514  			break
 20515  		}
 20516  		v.Reset(ssaop.OpARM64ZCPYMergingSconst)
 20517  		v.AuxInt = ssa.Int8ToAuxInt(int8(c))
 20518  		v.AddArg2(z, mask)
 20519  		return true
 20520  	}
 20521  	return false
 20522  }
 20523  func rewriteValue_OpARM64ZCPYMergingSconst(v *ssa.Value) bool {
 20524  	v_1 := v.Args[1]
 20525  	v_0 := v.Args[0]
 20526  	// match: (ZCPYMergingSconst [c] (ZDUPBconst [0]) mask)
 20527  	// result: (ZCPYSconst [c] mask)
 20528  	for {
 20529  		c := ssa.AuxIntToInt8(v.AuxInt)
 20530  		if v_0.Op != ssaop.OpARM64ZDUPBconst || ssa.AuxIntToInt8(v_0.AuxInt) != 0 {
 20531  			break
 20532  		}
 20533  		mask := v_1
 20534  		v.Reset(ssaop.OpARM64ZCPYSconst)
 20535  		v.AuxInt = ssa.Int8ToAuxInt(c)
 20536  		v.AddArg(mask)
 20537  		return true
 20538  	}
 20539  	return false
 20540  }
 20541  func rewriteValue_OpARM64ZDUPB(v *ssa.Value) bool {
 20542  	v_0 := v.Args[0]
 20543  	// match: (ZDUPB (MOVDconst [c]))
 20544  	// cond: c == int64(int8(c))
 20545  	// result: (ZDUPBconst [int8(c)])
 20546  	for {
 20547  		if v_0.Op != ssaop.OpARM64MOVDconst {
 20548  			break
 20549  		}
 20550  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 20551  		if !(c == int64(int8(c))) {
 20552  			break
 20553  		}
 20554  		v.Reset(ssaop.OpARM64ZDUPBconst)
 20555  		v.AuxInt = ssa.Int8ToAuxInt(int8(c))
 20556  		return true
 20557  	}
 20558  	return false
 20559  }
 20560  func rewriteValue_OpARM64ZDUPD(v *ssa.Value) bool {
 20561  	v_0 := v.Args[0]
 20562  	// match: (ZDUPD (MOVDconst [c]))
 20563  	// cond: c == int64(int8(c))
 20564  	// result: (ZDUPDconst [int8(c)])
 20565  	for {
 20566  		if v_0.Op != ssaop.OpARM64MOVDconst {
 20567  			break
 20568  		}
 20569  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 20570  		if !(c == int64(int8(c))) {
 20571  			break
 20572  		}
 20573  		v.Reset(ssaop.OpARM64ZDUPDconst)
 20574  		v.AuxInt = ssa.Int8ToAuxInt(int8(c))
 20575  		return true
 20576  	}
 20577  	return false
 20578  }
 20579  func rewriteValue_OpARM64ZDUPH(v *ssa.Value) bool {
 20580  	v_0 := v.Args[0]
 20581  	// match: (ZDUPH (MOVDconst [c]))
 20582  	// cond: c == int64(int8(c))
 20583  	// result: (ZDUPHconst [int8(c)])
 20584  	for {
 20585  		if v_0.Op != ssaop.OpARM64MOVDconst {
 20586  			break
 20587  		}
 20588  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 20589  		if !(c == int64(int8(c))) {
 20590  			break
 20591  		}
 20592  		v.Reset(ssaop.OpARM64ZDUPHconst)
 20593  		v.AuxInt = ssa.Int8ToAuxInt(int8(c))
 20594  		return true
 20595  	}
 20596  	return false
 20597  }
 20598  func rewriteValue_OpARM64ZDUPS(v *ssa.Value) bool {
 20599  	v_0 := v.Args[0]
 20600  	// match: (ZDUPS (MOVDconst [c]))
 20601  	// cond: c == int64(int8(c))
 20602  	// result: (ZDUPSconst [int8(c)])
 20603  	for {
 20604  		if v_0.Op != ssaop.OpARM64MOVDconst {
 20605  			break
 20606  		}
 20607  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 20608  		if !(c == int64(int8(c))) {
 20609  			break
 20610  		}
 20611  		v.Reset(ssaop.OpARM64ZDUPSconst)
 20612  		v.AuxInt = ssa.Int8ToAuxInt(int8(c))
 20613  		return true
 20614  	}
 20615  	return false
 20616  }
 20617  func rewriteValue_OpARM64ZSELB(v *ssa.Value) bool {
 20618  	v_2 := v.Args[2]
 20619  	v_1 := v.Args[1]
 20620  	v_0 := v.Args[0]
 20621  	// match: (ZSELB (ZDUPB x) z mask)
 20622  	// result: (ZCPYMergingB z x mask)
 20623  	for {
 20624  		if v_0.Op != ssaop.OpARM64ZDUPB {
 20625  			break
 20626  		}
 20627  		x := v_0.Args[0]
 20628  		z := v_1
 20629  		mask := v_2
 20630  		v.Reset(ssaop.OpARM64ZCPYMergingB)
 20631  		v.AddArg3(z, x, mask)
 20632  		return true
 20633  	}
 20634  	// match: (ZSELB (ZDUPIB [0] x) z mask)
 20635  	// result: (ZCPYIMergingB z x mask)
 20636  	for {
 20637  		if v_0.Op != ssaop.OpARM64ZDUPIB || ssa.AuxIntToUint8(v_0.AuxInt) != 0 {
 20638  			break
 20639  		}
 20640  		x := v_0.Args[0]
 20641  		z := v_1
 20642  		mask := v_2
 20643  		v.Reset(ssaop.OpARM64ZCPYIMergingB)
 20644  		v.AddArg3(z, x, mask)
 20645  		return true
 20646  	}
 20647  	// match: (ZSELB (ZDUPBconst [c]) z mask)
 20648  	// result: (ZCPYMergingBconst [c] z mask)
 20649  	for {
 20650  		if v_0.Op != ssaop.OpARM64ZDUPBconst {
 20651  			break
 20652  		}
 20653  		c := ssa.AuxIntToInt8(v_0.AuxInt)
 20654  		z := v_1
 20655  		mask := v_2
 20656  		v.Reset(ssaop.OpARM64ZCPYMergingBconst)
 20657  		v.AuxInt = ssa.Int8ToAuxInt(c)
 20658  		v.AddArg2(z, mask)
 20659  		return true
 20660  	}
 20661  	// match: (ZSELB (ZABSB x (Select0 <types.TypeMask> (PWHILELTB (MOVDconst [0]) (MOVDconst [32])))) z mask)
 20662  	// result: (ZABSMergingB z x mask)
 20663  	for {
 20664  		if v_0.Op != ssaop.OpARM64ZABSB {
 20665  			break
 20666  		}
 20667  		_ = v_0.Args[1]
 20668  		x := v_0.Args[0]
 20669  		v_0_1 := v_0.Args[1]
 20670  		if v_0_1.Op != ssaop.OpSelect0 || v_0_1.Type != types.TypeMask {
 20671  			break
 20672  		}
 20673  		v_0_1_0 := v_0_1.Args[0]
 20674  		if v_0_1_0.Op != ssaop.OpARM64PWHILELTB {
 20675  			break
 20676  		}
 20677  		_ = v_0_1_0.Args[1]
 20678  		v_0_1_0_0 := v_0_1_0.Args[0]
 20679  		if v_0_1_0_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_1_0_0.AuxInt) != 0 {
 20680  			break
 20681  		}
 20682  		v_0_1_0_1 := v_0_1_0.Args[1]
 20683  		if v_0_1_0_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_1_0_1.AuxInt) != 32 {
 20684  			break
 20685  		}
 20686  		z := v_1
 20687  		mask := v_2
 20688  		v.Reset(ssaop.OpARM64ZABSMergingB)
 20689  		v.AddArg3(z, x, mask)
 20690  		return true
 20691  	}
 20692  	// match: (ZSELB (ZADDB x y) x mask)
 20693  	// result: (ZADDMergingB x y mask)
 20694  	for {
 20695  		if v_0.Op != ssaop.OpARM64ZADDB {
 20696  			break
 20697  		}
 20698  		_ = v_0.Args[1]
 20699  		v_0_0 := v_0.Args[0]
 20700  		v_0_1 := v_0.Args[1]
 20701  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
 20702  			x := v_0_0
 20703  			y := v_0_1
 20704  			if x != v_1 {
 20705  				continue
 20706  			}
 20707  			mask := v_2
 20708  			v.Reset(ssaop.OpARM64ZADDMergingB)
 20709  			v.AddArg3(x, y, mask)
 20710  			return true
 20711  		}
 20712  		break
 20713  	}
 20714  	// match: (ZSELB (ZADDB x y) y mask)
 20715  	// result: (ZADDMergingB y x mask)
 20716  	for {
 20717  		if v_0.Op != ssaop.OpARM64ZADDB {
 20718  			break
 20719  		}
 20720  		_ = v_0.Args[1]
 20721  		v_0_0 := v_0.Args[0]
 20722  		v_0_1 := v_0.Args[1]
 20723  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
 20724  			x := v_0_0
 20725  			y := v_0_1
 20726  			if y != v_1 {
 20727  				continue
 20728  			}
 20729  			mask := v_2
 20730  			v.Reset(ssaop.OpARM64ZADDMergingB)
 20731  			v.AddArg3(y, x, mask)
 20732  			return true
 20733  		}
 20734  		break
 20735  	}
 20736  	// match: (ZSELB (ZADDB x y) z mask)
 20737  	// result: (ZADDMergingPrefixedB z x y mask)
 20738  	for {
 20739  		if v_0.Op != ssaop.OpARM64ZADDB {
 20740  			break
 20741  		}
 20742  		y := v_0.Args[1]
 20743  		x := v_0.Args[0]
 20744  		z := v_1
 20745  		mask := v_2
 20746  		v.Reset(ssaop.OpARM64ZADDMergingPrefixedB)
 20747  		v.AddArg4(z, x, y, mask)
 20748  		return true
 20749  	}
 20750  	// match: (ZSELB (ZANDD x y) x mask)
 20751  	// result: (ZANDMergingB x y mask)
 20752  	for {
 20753  		if v_0.Op != ssaop.OpARM64ZANDD {
 20754  			break
 20755  		}
 20756  		_ = v_0.Args[1]
 20757  		v_0_0 := v_0.Args[0]
 20758  		v_0_1 := v_0.Args[1]
 20759  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
 20760  			x := v_0_0
 20761  			y := v_0_1
 20762  			if x != v_1 {
 20763  				continue
 20764  			}
 20765  			mask := v_2
 20766  			v.Reset(ssaop.OpARM64ZANDMergingB)
 20767  			v.AddArg3(x, y, mask)
 20768  			return true
 20769  		}
 20770  		break
 20771  	}
 20772  	// match: (ZSELB (ZANDD x y) y mask)
 20773  	// result: (ZANDMergingB y x mask)
 20774  	for {
 20775  		if v_0.Op != ssaop.OpARM64ZANDD {
 20776  			break
 20777  		}
 20778  		_ = v_0.Args[1]
 20779  		v_0_0 := v_0.Args[0]
 20780  		v_0_1 := v_0.Args[1]
 20781  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
 20782  			x := v_0_0
 20783  			y := v_0_1
 20784  			if y != v_1 {
 20785  				continue
 20786  			}
 20787  			mask := v_2
 20788  			v.Reset(ssaop.OpARM64ZANDMergingB)
 20789  			v.AddArg3(y, x, mask)
 20790  			return true
 20791  		}
 20792  		break
 20793  	}
 20794  	// match: (ZSELB (ZANDD x y) z mask)
 20795  	// result: (ZANDMergingPrefixedB z x y mask)
 20796  	for {
 20797  		if v_0.Op != ssaop.OpARM64ZANDD {
 20798  			break
 20799  		}
 20800  		y := v_0.Args[1]
 20801  		x := v_0.Args[0]
 20802  		z := v_1
 20803  		mask := v_2
 20804  		v.Reset(ssaop.OpARM64ZANDMergingPrefixedB)
 20805  		v.AddArg4(z, x, y, mask)
 20806  		return true
 20807  	}
 20808  	// match: (ZSELB (ZBICD x y) x mask)
 20809  	// result: (ZBICMergingB x y mask)
 20810  	for {
 20811  		if v_0.Op != ssaop.OpARM64ZBICD {
 20812  			break
 20813  		}
 20814  		y := v_0.Args[1]
 20815  		x := v_0.Args[0]
 20816  		if x != v_1 {
 20817  			break
 20818  		}
 20819  		mask := v_2
 20820  		v.Reset(ssaop.OpARM64ZBICMergingB)
 20821  		v.AddArg3(x, y, mask)
 20822  		return true
 20823  	}
 20824  	// match: (ZSELB (ZEORD x y) x mask)
 20825  	// result: (ZEORMergingB x y mask)
 20826  	for {
 20827  		if v_0.Op != ssaop.OpARM64ZEORD {
 20828  			break
 20829  		}
 20830  		_ = v_0.Args[1]
 20831  		v_0_0 := v_0.Args[0]
 20832  		v_0_1 := v_0.Args[1]
 20833  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
 20834  			x := v_0_0
 20835  			y := v_0_1
 20836  			if x != v_1 {
 20837  				continue
 20838  			}
 20839  			mask := v_2
 20840  			v.Reset(ssaop.OpARM64ZEORMergingB)
 20841  			v.AddArg3(x, y, mask)
 20842  			return true
 20843  		}
 20844  		break
 20845  	}
 20846  	// match: (ZSELB (ZEORD x y) y mask)
 20847  	// result: (ZEORMergingB y x mask)
 20848  	for {
 20849  		if v_0.Op != ssaop.OpARM64ZEORD {
 20850  			break
 20851  		}
 20852  		_ = v_0.Args[1]
 20853  		v_0_0 := v_0.Args[0]
 20854  		v_0_1 := v_0.Args[1]
 20855  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
 20856  			x := v_0_0
 20857  			y := v_0_1
 20858  			if y != v_1 {
 20859  				continue
 20860  			}
 20861  			mask := v_2
 20862  			v.Reset(ssaop.OpARM64ZEORMergingB)
 20863  			v.AddArg3(y, x, mask)
 20864  			return true
 20865  		}
 20866  		break
 20867  	}
 20868  	// match: (ZSELB (ZEORD x y) z mask)
 20869  	// result: (ZEORMergingPrefixedB z x y mask)
 20870  	for {
 20871  		if v_0.Op != ssaop.OpARM64ZEORD {
 20872  			break
 20873  		}
 20874  		y := v_0.Args[1]
 20875  		x := v_0.Args[0]
 20876  		z := v_1
 20877  		mask := v_2
 20878  		v.Reset(ssaop.OpARM64ZEORMergingPrefixedB)
 20879  		v.AddArg4(z, x, y, mask)
 20880  		return true
 20881  	}
 20882  	// match: (ZSELB (ZMLAB x y z (Select0 <types.TypeMask> (PWHILELTB (MOVDconst [0]) (MOVDconst [32])))) x mask)
 20883  	// result: (ZMLAMergingB x y z mask)
 20884  	for {
 20885  		if v_0.Op != ssaop.OpARM64ZMLAB {
 20886  			break
 20887  		}
 20888  		_ = v_0.Args[3]
 20889  		x := v_0.Args[0]
 20890  		y := v_0.Args[1]
 20891  		z := v_0.Args[2]
 20892  		v_0_3 := v_0.Args[3]
 20893  		if v_0_3.Op != ssaop.OpSelect0 || v_0_3.Type != types.TypeMask {
 20894  			break
 20895  		}
 20896  		v_0_3_0 := v_0_3.Args[0]
 20897  		if v_0_3_0.Op != ssaop.OpARM64PWHILELTB {
 20898  			break
 20899  		}
 20900  		_ = v_0_3_0.Args[1]
 20901  		v_0_3_0_0 := v_0_3_0.Args[0]
 20902  		if v_0_3_0_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_3_0_0.AuxInt) != 0 {
 20903  			break
 20904  		}
 20905  		v_0_3_0_1 := v_0_3_0.Args[1]
 20906  		if v_0_3_0_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_3_0_1.AuxInt) != 32 || x != v_1 {
 20907  			break
 20908  		}
 20909  		mask := v_2
 20910  		v.Reset(ssaop.OpARM64ZMLAMergingB)
 20911  		v.AddArg4(x, y, z, mask)
 20912  		return true
 20913  	}
 20914  	// match: (ZSELB (ZMULMergingB x y (Select0 <types.TypeMask> (PWHILELTB (MOVDconst [0]) (MOVDconst [32])))) x mask)
 20915  	// result: (ZMULMergingB x y mask)
 20916  	for {
 20917  		if v_0.Op != ssaop.OpARM64ZMULMergingB {
 20918  			break
 20919  		}
 20920  		_ = v_0.Args[2]
 20921  		x := v_0.Args[0]
 20922  		y := v_0.Args[1]
 20923  		v_0_2 := v_0.Args[2]
 20924  		if v_0_2.Op != ssaop.OpSelect0 || v_0_2.Type != types.TypeMask {
 20925  			break
 20926  		}
 20927  		v_0_2_0 := v_0_2.Args[0]
 20928  		if v_0_2_0.Op != ssaop.OpARM64PWHILELTB {
 20929  			break
 20930  		}
 20931  		_ = v_0_2_0.Args[1]
 20932  		v_0_2_0_0 := v_0_2_0.Args[0]
 20933  		if v_0_2_0_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_0.AuxInt) != 0 {
 20934  			break
 20935  		}
 20936  		v_0_2_0_1 := v_0_2_0.Args[1]
 20937  		if v_0_2_0_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_1.AuxInt) != 32 || x != v_1 {
 20938  			break
 20939  		}
 20940  		mask := v_2
 20941  		v.Reset(ssaop.OpARM64ZMULMergingB)
 20942  		v.AddArg3(x, y, mask)
 20943  		return true
 20944  	}
 20945  	// match: (ZSELB (ZMULMergingB x y (Select0 <types.TypeMask> (PWHILELTB (MOVDconst [0]) (MOVDconst [32])))) y mask)
 20946  	// result: (ZMULMergingB y x mask)
 20947  	for {
 20948  		if v_0.Op != ssaop.OpARM64ZMULMergingB {
 20949  			break
 20950  		}
 20951  		_ = v_0.Args[2]
 20952  		x := v_0.Args[0]
 20953  		y := v_0.Args[1]
 20954  		v_0_2 := v_0.Args[2]
 20955  		if v_0_2.Op != ssaop.OpSelect0 || v_0_2.Type != types.TypeMask {
 20956  			break
 20957  		}
 20958  		v_0_2_0 := v_0_2.Args[0]
 20959  		if v_0_2_0.Op != ssaop.OpARM64PWHILELTB {
 20960  			break
 20961  		}
 20962  		_ = v_0_2_0.Args[1]
 20963  		v_0_2_0_0 := v_0_2_0.Args[0]
 20964  		if v_0_2_0_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_0.AuxInt) != 0 {
 20965  			break
 20966  		}
 20967  		v_0_2_0_1 := v_0_2_0.Args[1]
 20968  		if v_0_2_0_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_1.AuxInt) != 32 || y != v_1 {
 20969  			break
 20970  		}
 20971  		mask := v_2
 20972  		v.Reset(ssaop.OpARM64ZMULMergingB)
 20973  		v.AddArg3(y, x, mask)
 20974  		return true
 20975  	}
 20976  	// match: (ZSELB (ZMULMergingB x y (Select0 <types.TypeMask> (PWHILELTB (MOVDconst [0]) (MOVDconst [32])))) z mask)
 20977  	// result: (ZMULMergingPrefixedB z x y mask)
 20978  	for {
 20979  		if v_0.Op != ssaop.OpARM64ZMULMergingB {
 20980  			break
 20981  		}
 20982  		_ = v_0.Args[2]
 20983  		x := v_0.Args[0]
 20984  		y := v_0.Args[1]
 20985  		v_0_2 := v_0.Args[2]
 20986  		if v_0_2.Op != ssaop.OpSelect0 || v_0_2.Type != types.TypeMask {
 20987  			break
 20988  		}
 20989  		v_0_2_0 := v_0_2.Args[0]
 20990  		if v_0_2_0.Op != ssaop.OpARM64PWHILELTB {
 20991  			break
 20992  		}
 20993  		_ = v_0_2_0.Args[1]
 20994  		v_0_2_0_0 := v_0_2_0.Args[0]
 20995  		if v_0_2_0_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_0.AuxInt) != 0 {
 20996  			break
 20997  		}
 20998  		v_0_2_0_1 := v_0_2_0.Args[1]
 20999  		if v_0_2_0_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_1.AuxInt) != 32 {
 21000  			break
 21001  		}
 21002  		z := v_1
 21003  		mask := v_2
 21004  		v.Reset(ssaop.OpARM64ZMULMergingPrefixedB)
 21005  		v.AddArg4(z, x, y, mask)
 21006  		return true
 21007  	}
 21008  	// match: (ZSELB (ZNEGB x (Select0 <types.TypeMask> (PWHILELTB (MOVDconst [0]) (MOVDconst [32])))) z mask)
 21009  	// result: (ZNEGMergingB z x mask)
 21010  	for {
 21011  		if v_0.Op != ssaop.OpARM64ZNEGB {
 21012  			break
 21013  		}
 21014  		_ = v_0.Args[1]
 21015  		x := v_0.Args[0]
 21016  		v_0_1 := v_0.Args[1]
 21017  		if v_0_1.Op != ssaop.OpSelect0 || v_0_1.Type != types.TypeMask {
 21018  			break
 21019  		}
 21020  		v_0_1_0 := v_0_1.Args[0]
 21021  		if v_0_1_0.Op != ssaop.OpARM64PWHILELTB {
 21022  			break
 21023  		}
 21024  		_ = v_0_1_0.Args[1]
 21025  		v_0_1_0_0 := v_0_1_0.Args[0]
 21026  		if v_0_1_0_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_1_0_0.AuxInt) != 0 {
 21027  			break
 21028  		}
 21029  		v_0_1_0_1 := v_0_1_0.Args[1]
 21030  		if v_0_1_0_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_1_0_1.AuxInt) != 32 {
 21031  			break
 21032  		}
 21033  		z := v_1
 21034  		mask := v_2
 21035  		v.Reset(ssaop.OpARM64ZNEGMergingB)
 21036  		v.AddArg3(z, x, mask)
 21037  		return true
 21038  	}
 21039  	// match: (ZSELB (ZORRD x y) x mask)
 21040  	// result: (ZORRMergingB x y mask)
 21041  	for {
 21042  		if v_0.Op != ssaop.OpARM64ZORRD {
 21043  			break
 21044  		}
 21045  		_ = v_0.Args[1]
 21046  		v_0_0 := v_0.Args[0]
 21047  		v_0_1 := v_0.Args[1]
 21048  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
 21049  			x := v_0_0
 21050  			y := v_0_1
 21051  			if x != v_1 {
 21052  				continue
 21053  			}
 21054  			mask := v_2
 21055  			v.Reset(ssaop.OpARM64ZORRMergingB)
 21056  			v.AddArg3(x, y, mask)
 21057  			return true
 21058  		}
 21059  		break
 21060  	}
 21061  	// match: (ZSELB (ZORRD x y) y mask)
 21062  	// result: (ZORRMergingB y x mask)
 21063  	for {
 21064  		if v_0.Op != ssaop.OpARM64ZORRD {
 21065  			break
 21066  		}
 21067  		_ = v_0.Args[1]
 21068  		v_0_0 := v_0.Args[0]
 21069  		v_0_1 := v_0.Args[1]
 21070  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
 21071  			x := v_0_0
 21072  			y := v_0_1
 21073  			if y != v_1 {
 21074  				continue
 21075  			}
 21076  			mask := v_2
 21077  			v.Reset(ssaop.OpARM64ZORRMergingB)
 21078  			v.AddArg3(y, x, mask)
 21079  			return true
 21080  		}
 21081  		break
 21082  	}
 21083  	// match: (ZSELB (ZORRD x y) z mask)
 21084  	// result: (ZORRMergingPrefixedB z x y mask)
 21085  	for {
 21086  		if v_0.Op != ssaop.OpARM64ZORRD {
 21087  			break
 21088  		}
 21089  		y := v_0.Args[1]
 21090  		x := v_0.Args[0]
 21091  		z := v_1
 21092  		mask := v_2
 21093  		v.Reset(ssaop.OpARM64ZORRMergingPrefixedB)
 21094  		v.AddArg4(z, x, y, mask)
 21095  		return true
 21096  	}
 21097  	// match: (ZSELB (ZSMAXB x y (Select0 <types.TypeMask> (PWHILELTB (MOVDconst [0]) (MOVDconst [32])))) x mask)
 21098  	// result: (ZSMAXMergingB x y mask)
 21099  	for {
 21100  		if v_0.Op != ssaop.OpARM64ZSMAXB {
 21101  			break
 21102  		}
 21103  		_ = v_0.Args[2]
 21104  		v_0_0 := v_0.Args[0]
 21105  		v_0_1 := v_0.Args[1]
 21106  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
 21107  			x := v_0_0
 21108  			y := v_0_1
 21109  			v_0_2 := v_0.Args[2]
 21110  			if v_0_2.Op != ssaop.OpSelect0 || v_0_2.Type != types.TypeMask {
 21111  				continue
 21112  			}
 21113  			v_0_2_0 := v_0_2.Args[0]
 21114  			if v_0_2_0.Op != ssaop.OpARM64PWHILELTB {
 21115  				continue
 21116  			}
 21117  			_ = v_0_2_0.Args[1]
 21118  			v_0_2_0_0 := v_0_2_0.Args[0]
 21119  			if v_0_2_0_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_0.AuxInt) != 0 {
 21120  				continue
 21121  			}
 21122  			v_0_2_0_1 := v_0_2_0.Args[1]
 21123  			if v_0_2_0_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_1.AuxInt) != 32 || x != v_1 {
 21124  				continue
 21125  			}
 21126  			mask := v_2
 21127  			v.Reset(ssaop.OpARM64ZSMAXMergingB)
 21128  			v.AddArg3(x, y, mask)
 21129  			return true
 21130  		}
 21131  		break
 21132  	}
 21133  	// match: (ZSELB (ZSMAXB x y (Select0 <types.TypeMask> (PWHILELTB (MOVDconst [0]) (MOVDconst [32])))) y mask)
 21134  	// result: (ZSMAXMergingB y x mask)
 21135  	for {
 21136  		if v_0.Op != ssaop.OpARM64ZSMAXB {
 21137  			break
 21138  		}
 21139  		_ = v_0.Args[2]
 21140  		v_0_0 := v_0.Args[0]
 21141  		v_0_1 := v_0.Args[1]
 21142  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
 21143  			x := v_0_0
 21144  			y := v_0_1
 21145  			v_0_2 := v_0.Args[2]
 21146  			if v_0_2.Op != ssaop.OpSelect0 || v_0_2.Type != types.TypeMask {
 21147  				continue
 21148  			}
 21149  			v_0_2_0 := v_0_2.Args[0]
 21150  			if v_0_2_0.Op != ssaop.OpARM64PWHILELTB {
 21151  				continue
 21152  			}
 21153  			_ = v_0_2_0.Args[1]
 21154  			v_0_2_0_0 := v_0_2_0.Args[0]
 21155  			if v_0_2_0_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_0.AuxInt) != 0 {
 21156  				continue
 21157  			}
 21158  			v_0_2_0_1 := v_0_2_0.Args[1]
 21159  			if v_0_2_0_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_1.AuxInt) != 32 || y != v_1 {
 21160  				continue
 21161  			}
 21162  			mask := v_2
 21163  			v.Reset(ssaop.OpARM64ZSMAXMergingB)
 21164  			v.AddArg3(y, x, mask)
 21165  			return true
 21166  		}
 21167  		break
 21168  	}
 21169  	// match: (ZSELB (ZSMAXB x y (Select0 <types.TypeMask> (PWHILELTB (MOVDconst [0]) (MOVDconst [32])))) z mask)
 21170  	// result: (ZSMAXMergingPrefixedB z x y mask)
 21171  	for {
 21172  		if v_0.Op != ssaop.OpARM64ZSMAXB {
 21173  			break
 21174  		}
 21175  		_ = v_0.Args[2]
 21176  		x := v_0.Args[0]
 21177  		y := v_0.Args[1]
 21178  		v_0_2 := v_0.Args[2]
 21179  		if v_0_2.Op != ssaop.OpSelect0 || v_0_2.Type != types.TypeMask {
 21180  			break
 21181  		}
 21182  		v_0_2_0 := v_0_2.Args[0]
 21183  		if v_0_2_0.Op != ssaop.OpARM64PWHILELTB {
 21184  			break
 21185  		}
 21186  		_ = v_0_2_0.Args[1]
 21187  		v_0_2_0_0 := v_0_2_0.Args[0]
 21188  		if v_0_2_0_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_0.AuxInt) != 0 {
 21189  			break
 21190  		}
 21191  		v_0_2_0_1 := v_0_2_0.Args[1]
 21192  		if v_0_2_0_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_1.AuxInt) != 32 {
 21193  			break
 21194  		}
 21195  		z := v_1
 21196  		mask := v_2
 21197  		v.Reset(ssaop.OpARM64ZSMAXMergingPrefixedB)
 21198  		v.AddArg4(z, x, y, mask)
 21199  		return true
 21200  	}
 21201  	// match: (ZSELB (ZSMINB x y (Select0 <types.TypeMask> (PWHILELTB (MOVDconst [0]) (MOVDconst [32])))) x mask)
 21202  	// result: (ZSMINMergingB x y mask)
 21203  	for {
 21204  		if v_0.Op != ssaop.OpARM64ZSMINB {
 21205  			break
 21206  		}
 21207  		_ = v_0.Args[2]
 21208  		v_0_0 := v_0.Args[0]
 21209  		v_0_1 := v_0.Args[1]
 21210  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
 21211  			x := v_0_0
 21212  			y := v_0_1
 21213  			v_0_2 := v_0.Args[2]
 21214  			if v_0_2.Op != ssaop.OpSelect0 || v_0_2.Type != types.TypeMask {
 21215  				continue
 21216  			}
 21217  			v_0_2_0 := v_0_2.Args[0]
 21218  			if v_0_2_0.Op != ssaop.OpARM64PWHILELTB {
 21219  				continue
 21220  			}
 21221  			_ = v_0_2_0.Args[1]
 21222  			v_0_2_0_0 := v_0_2_0.Args[0]
 21223  			if v_0_2_0_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_0.AuxInt) != 0 {
 21224  				continue
 21225  			}
 21226  			v_0_2_0_1 := v_0_2_0.Args[1]
 21227  			if v_0_2_0_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_1.AuxInt) != 32 || x != v_1 {
 21228  				continue
 21229  			}
 21230  			mask := v_2
 21231  			v.Reset(ssaop.OpARM64ZSMINMergingB)
 21232  			v.AddArg3(x, y, mask)
 21233  			return true
 21234  		}
 21235  		break
 21236  	}
 21237  	// match: (ZSELB (ZSMINB x y (Select0 <types.TypeMask> (PWHILELTB (MOVDconst [0]) (MOVDconst [32])))) y mask)
 21238  	// result: (ZSMINMergingB y x mask)
 21239  	for {
 21240  		if v_0.Op != ssaop.OpARM64ZSMINB {
 21241  			break
 21242  		}
 21243  		_ = v_0.Args[2]
 21244  		v_0_0 := v_0.Args[0]
 21245  		v_0_1 := v_0.Args[1]
 21246  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
 21247  			x := v_0_0
 21248  			y := v_0_1
 21249  			v_0_2 := v_0.Args[2]
 21250  			if v_0_2.Op != ssaop.OpSelect0 || v_0_2.Type != types.TypeMask {
 21251  				continue
 21252  			}
 21253  			v_0_2_0 := v_0_2.Args[0]
 21254  			if v_0_2_0.Op != ssaop.OpARM64PWHILELTB {
 21255  				continue
 21256  			}
 21257  			_ = v_0_2_0.Args[1]
 21258  			v_0_2_0_0 := v_0_2_0.Args[0]
 21259  			if v_0_2_0_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_0.AuxInt) != 0 {
 21260  				continue
 21261  			}
 21262  			v_0_2_0_1 := v_0_2_0.Args[1]
 21263  			if v_0_2_0_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_1.AuxInt) != 32 || y != v_1 {
 21264  				continue
 21265  			}
 21266  			mask := v_2
 21267  			v.Reset(ssaop.OpARM64ZSMINMergingB)
 21268  			v.AddArg3(y, x, mask)
 21269  			return true
 21270  		}
 21271  		break
 21272  	}
 21273  	// match: (ZSELB (ZSMINB x y (Select0 <types.TypeMask> (PWHILELTB (MOVDconst [0]) (MOVDconst [32])))) z mask)
 21274  	// result: (ZSMINMergingPrefixedB z x y mask)
 21275  	for {
 21276  		if v_0.Op != ssaop.OpARM64ZSMINB {
 21277  			break
 21278  		}
 21279  		_ = v_0.Args[2]
 21280  		x := v_0.Args[0]
 21281  		y := v_0.Args[1]
 21282  		v_0_2 := v_0.Args[2]
 21283  		if v_0_2.Op != ssaop.OpSelect0 || v_0_2.Type != types.TypeMask {
 21284  			break
 21285  		}
 21286  		v_0_2_0 := v_0_2.Args[0]
 21287  		if v_0_2_0.Op != ssaop.OpARM64PWHILELTB {
 21288  			break
 21289  		}
 21290  		_ = v_0_2_0.Args[1]
 21291  		v_0_2_0_0 := v_0_2_0.Args[0]
 21292  		if v_0_2_0_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_0.AuxInt) != 0 {
 21293  			break
 21294  		}
 21295  		v_0_2_0_1 := v_0_2_0.Args[1]
 21296  		if v_0_2_0_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_1.AuxInt) != 32 {
 21297  			break
 21298  		}
 21299  		z := v_1
 21300  		mask := v_2
 21301  		v.Reset(ssaop.OpARM64ZSMINMergingPrefixedB)
 21302  		v.AddArg4(z, x, y, mask)
 21303  		return true
 21304  	}
 21305  	// match: (ZSELB (ZSMULHMergingB x y (Select0 <types.TypeMask> (PWHILELTB (MOVDconst [0]) (MOVDconst [32])))) x mask)
 21306  	// result: (ZSMULHMergingB x y mask)
 21307  	for {
 21308  		if v_0.Op != ssaop.OpARM64ZSMULHMergingB {
 21309  			break
 21310  		}
 21311  		_ = v_0.Args[2]
 21312  		x := v_0.Args[0]
 21313  		y := v_0.Args[1]
 21314  		v_0_2 := v_0.Args[2]
 21315  		if v_0_2.Op != ssaop.OpSelect0 || v_0_2.Type != types.TypeMask {
 21316  			break
 21317  		}
 21318  		v_0_2_0 := v_0_2.Args[0]
 21319  		if v_0_2_0.Op != ssaop.OpARM64PWHILELTB {
 21320  			break
 21321  		}
 21322  		_ = v_0_2_0.Args[1]
 21323  		v_0_2_0_0 := v_0_2_0.Args[0]
 21324  		if v_0_2_0_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_0.AuxInt) != 0 {
 21325  			break
 21326  		}
 21327  		v_0_2_0_1 := v_0_2_0.Args[1]
 21328  		if v_0_2_0_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_1.AuxInt) != 32 || x != v_1 {
 21329  			break
 21330  		}
 21331  		mask := v_2
 21332  		v.Reset(ssaop.OpARM64ZSMULHMergingB)
 21333  		v.AddArg3(x, y, mask)
 21334  		return true
 21335  	}
 21336  	// match: (ZSELB (ZSMULHMergingB x y (Select0 <types.TypeMask> (PWHILELTB (MOVDconst [0]) (MOVDconst [32])))) y mask)
 21337  	// result: (ZSMULHMergingB y x mask)
 21338  	for {
 21339  		if v_0.Op != ssaop.OpARM64ZSMULHMergingB {
 21340  			break
 21341  		}
 21342  		_ = v_0.Args[2]
 21343  		x := v_0.Args[0]
 21344  		y := v_0.Args[1]
 21345  		v_0_2 := v_0.Args[2]
 21346  		if v_0_2.Op != ssaop.OpSelect0 || v_0_2.Type != types.TypeMask {
 21347  			break
 21348  		}
 21349  		v_0_2_0 := v_0_2.Args[0]
 21350  		if v_0_2_0.Op != ssaop.OpARM64PWHILELTB {
 21351  			break
 21352  		}
 21353  		_ = v_0_2_0.Args[1]
 21354  		v_0_2_0_0 := v_0_2_0.Args[0]
 21355  		if v_0_2_0_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_0.AuxInt) != 0 {
 21356  			break
 21357  		}
 21358  		v_0_2_0_1 := v_0_2_0.Args[1]
 21359  		if v_0_2_0_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_1.AuxInt) != 32 || y != v_1 {
 21360  			break
 21361  		}
 21362  		mask := v_2
 21363  		v.Reset(ssaop.OpARM64ZSMULHMergingB)
 21364  		v.AddArg3(y, x, mask)
 21365  		return true
 21366  	}
 21367  	// match: (ZSELB (ZSMULHMergingB x y (Select0 <types.TypeMask> (PWHILELTB (MOVDconst [0]) (MOVDconst [32])))) z mask)
 21368  	// result: (ZSMULHMergingPrefixedB z x y mask)
 21369  	for {
 21370  		if v_0.Op != ssaop.OpARM64ZSMULHMergingB {
 21371  			break
 21372  		}
 21373  		_ = v_0.Args[2]
 21374  		x := v_0.Args[0]
 21375  		y := v_0.Args[1]
 21376  		v_0_2 := v_0.Args[2]
 21377  		if v_0_2.Op != ssaop.OpSelect0 || v_0_2.Type != types.TypeMask {
 21378  			break
 21379  		}
 21380  		v_0_2_0 := v_0_2.Args[0]
 21381  		if v_0_2_0.Op != ssaop.OpARM64PWHILELTB {
 21382  			break
 21383  		}
 21384  		_ = v_0_2_0.Args[1]
 21385  		v_0_2_0_0 := v_0_2_0.Args[0]
 21386  		if v_0_2_0_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_0.AuxInt) != 0 {
 21387  			break
 21388  		}
 21389  		v_0_2_0_1 := v_0_2_0.Args[1]
 21390  		if v_0_2_0_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_1.AuxInt) != 32 {
 21391  			break
 21392  		}
 21393  		z := v_1
 21394  		mask := v_2
 21395  		v.Reset(ssaop.OpARM64ZSMULHMergingPrefixedB)
 21396  		v.AddArg4(z, x, y, mask)
 21397  		return true
 21398  	}
 21399  	// match: (ZSELB (ZSQADDB x y) x mask)
 21400  	// result: (ZSQADDMergingB x y mask)
 21401  	for {
 21402  		if v_0.Op != ssaop.OpARM64ZSQADDB {
 21403  			break
 21404  		}
 21405  		_ = v_0.Args[1]
 21406  		v_0_0 := v_0.Args[0]
 21407  		v_0_1 := v_0.Args[1]
 21408  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
 21409  			x := v_0_0
 21410  			y := v_0_1
 21411  			if x != v_1 {
 21412  				continue
 21413  			}
 21414  			mask := v_2
 21415  			v.Reset(ssaop.OpARM64ZSQADDMergingB)
 21416  			v.AddArg3(x, y, mask)
 21417  			return true
 21418  		}
 21419  		break
 21420  	}
 21421  	// match: (ZSELB (ZSQADDB x y) y mask)
 21422  	// result: (ZSQADDMergingB y x mask)
 21423  	for {
 21424  		if v_0.Op != ssaop.OpARM64ZSQADDB {
 21425  			break
 21426  		}
 21427  		_ = v_0.Args[1]
 21428  		v_0_0 := v_0.Args[0]
 21429  		v_0_1 := v_0.Args[1]
 21430  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
 21431  			x := v_0_0
 21432  			y := v_0_1
 21433  			if y != v_1 {
 21434  				continue
 21435  			}
 21436  			mask := v_2
 21437  			v.Reset(ssaop.OpARM64ZSQADDMergingB)
 21438  			v.AddArg3(y, x, mask)
 21439  			return true
 21440  		}
 21441  		break
 21442  	}
 21443  	// match: (ZSELB (ZSQADDB x y) z mask)
 21444  	// result: (ZSQADDMergingPrefixedB z x y mask)
 21445  	for {
 21446  		if v_0.Op != ssaop.OpARM64ZSQADDB {
 21447  			break
 21448  		}
 21449  		y := v_0.Args[1]
 21450  		x := v_0.Args[0]
 21451  		z := v_1
 21452  		mask := v_2
 21453  		v.Reset(ssaop.OpARM64ZSQADDMergingPrefixedB)
 21454  		v.AddArg4(z, x, y, mask)
 21455  		return true
 21456  	}
 21457  	// match: (ZSELB (ZSQSUBB x y) x mask)
 21458  	// result: (ZSQSUBMergingB x y mask)
 21459  	for {
 21460  		if v_0.Op != ssaop.OpARM64ZSQSUBB {
 21461  			break
 21462  		}
 21463  		y := v_0.Args[1]
 21464  		x := v_0.Args[0]
 21465  		if x != v_1 {
 21466  			break
 21467  		}
 21468  		mask := v_2
 21469  		v.Reset(ssaop.OpARM64ZSQSUBMergingB)
 21470  		v.AddArg3(x, y, mask)
 21471  		return true
 21472  	}
 21473  	// match: (ZSELB (ZSUBB x y) x mask)
 21474  	// result: (ZSUBMergingB x y mask)
 21475  	for {
 21476  		if v_0.Op != ssaop.OpARM64ZSUBB {
 21477  			break
 21478  		}
 21479  		y := v_0.Args[1]
 21480  		x := v_0.Args[0]
 21481  		if x != v_1 {
 21482  			break
 21483  		}
 21484  		mask := v_2
 21485  		v.Reset(ssaop.OpARM64ZSUBMergingB)
 21486  		v.AddArg3(x, y, mask)
 21487  		return true
 21488  	}
 21489  	// match: (ZSELB (ZUMAXB x y (Select0 <types.TypeMask> (PWHILELTB (MOVDconst [0]) (MOVDconst [32])))) x mask)
 21490  	// result: (ZUMAXMergingB x y mask)
 21491  	for {
 21492  		if v_0.Op != ssaop.OpARM64ZUMAXB {
 21493  			break
 21494  		}
 21495  		_ = v_0.Args[2]
 21496  		v_0_0 := v_0.Args[0]
 21497  		v_0_1 := v_0.Args[1]
 21498  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
 21499  			x := v_0_0
 21500  			y := v_0_1
 21501  			v_0_2 := v_0.Args[2]
 21502  			if v_0_2.Op != ssaop.OpSelect0 || v_0_2.Type != types.TypeMask {
 21503  				continue
 21504  			}
 21505  			v_0_2_0 := v_0_2.Args[0]
 21506  			if v_0_2_0.Op != ssaop.OpARM64PWHILELTB {
 21507  				continue
 21508  			}
 21509  			_ = v_0_2_0.Args[1]
 21510  			v_0_2_0_0 := v_0_2_0.Args[0]
 21511  			if v_0_2_0_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_0.AuxInt) != 0 {
 21512  				continue
 21513  			}
 21514  			v_0_2_0_1 := v_0_2_0.Args[1]
 21515  			if v_0_2_0_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_1.AuxInt) != 32 || x != v_1 {
 21516  				continue
 21517  			}
 21518  			mask := v_2
 21519  			v.Reset(ssaop.OpARM64ZUMAXMergingB)
 21520  			v.AddArg3(x, y, mask)
 21521  			return true
 21522  		}
 21523  		break
 21524  	}
 21525  	// match: (ZSELB (ZUMAXB x y (Select0 <types.TypeMask> (PWHILELTB (MOVDconst [0]) (MOVDconst [32])))) y mask)
 21526  	// result: (ZUMAXMergingB y x mask)
 21527  	for {
 21528  		if v_0.Op != ssaop.OpARM64ZUMAXB {
 21529  			break
 21530  		}
 21531  		_ = v_0.Args[2]
 21532  		v_0_0 := v_0.Args[0]
 21533  		v_0_1 := v_0.Args[1]
 21534  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
 21535  			x := v_0_0
 21536  			y := v_0_1
 21537  			v_0_2 := v_0.Args[2]
 21538  			if v_0_2.Op != ssaop.OpSelect0 || v_0_2.Type != types.TypeMask {
 21539  				continue
 21540  			}
 21541  			v_0_2_0 := v_0_2.Args[0]
 21542  			if v_0_2_0.Op != ssaop.OpARM64PWHILELTB {
 21543  				continue
 21544  			}
 21545  			_ = v_0_2_0.Args[1]
 21546  			v_0_2_0_0 := v_0_2_0.Args[0]
 21547  			if v_0_2_0_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_0.AuxInt) != 0 {
 21548  				continue
 21549  			}
 21550  			v_0_2_0_1 := v_0_2_0.Args[1]
 21551  			if v_0_2_0_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_1.AuxInt) != 32 || y != v_1 {
 21552  				continue
 21553  			}
 21554  			mask := v_2
 21555  			v.Reset(ssaop.OpARM64ZUMAXMergingB)
 21556  			v.AddArg3(y, x, mask)
 21557  			return true
 21558  		}
 21559  		break
 21560  	}
 21561  	// match: (ZSELB (ZUMAXB x y (Select0 <types.TypeMask> (PWHILELTB (MOVDconst [0]) (MOVDconst [32])))) z mask)
 21562  	// result: (ZUMAXMergingPrefixedB z x y mask)
 21563  	for {
 21564  		if v_0.Op != ssaop.OpARM64ZUMAXB {
 21565  			break
 21566  		}
 21567  		_ = v_0.Args[2]
 21568  		x := v_0.Args[0]
 21569  		y := v_0.Args[1]
 21570  		v_0_2 := v_0.Args[2]
 21571  		if v_0_2.Op != ssaop.OpSelect0 || v_0_2.Type != types.TypeMask {
 21572  			break
 21573  		}
 21574  		v_0_2_0 := v_0_2.Args[0]
 21575  		if v_0_2_0.Op != ssaop.OpARM64PWHILELTB {
 21576  			break
 21577  		}
 21578  		_ = v_0_2_0.Args[1]
 21579  		v_0_2_0_0 := v_0_2_0.Args[0]
 21580  		if v_0_2_0_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_0.AuxInt) != 0 {
 21581  			break
 21582  		}
 21583  		v_0_2_0_1 := v_0_2_0.Args[1]
 21584  		if v_0_2_0_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_1.AuxInt) != 32 {
 21585  			break
 21586  		}
 21587  		z := v_1
 21588  		mask := v_2
 21589  		v.Reset(ssaop.OpARM64ZUMAXMergingPrefixedB)
 21590  		v.AddArg4(z, x, y, mask)
 21591  		return true
 21592  	}
 21593  	// match: (ZSELB (ZUMINB x y (Select0 <types.TypeMask> (PWHILELTB (MOVDconst [0]) (MOVDconst [32])))) x mask)
 21594  	// result: (ZUMINMergingB x y mask)
 21595  	for {
 21596  		if v_0.Op != ssaop.OpARM64ZUMINB {
 21597  			break
 21598  		}
 21599  		_ = v_0.Args[2]
 21600  		v_0_0 := v_0.Args[0]
 21601  		v_0_1 := v_0.Args[1]
 21602  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
 21603  			x := v_0_0
 21604  			y := v_0_1
 21605  			v_0_2 := v_0.Args[2]
 21606  			if v_0_2.Op != ssaop.OpSelect0 || v_0_2.Type != types.TypeMask {
 21607  				continue
 21608  			}
 21609  			v_0_2_0 := v_0_2.Args[0]
 21610  			if v_0_2_0.Op != ssaop.OpARM64PWHILELTB {
 21611  				continue
 21612  			}
 21613  			_ = v_0_2_0.Args[1]
 21614  			v_0_2_0_0 := v_0_2_0.Args[0]
 21615  			if v_0_2_0_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_0.AuxInt) != 0 {
 21616  				continue
 21617  			}
 21618  			v_0_2_0_1 := v_0_2_0.Args[1]
 21619  			if v_0_2_0_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_1.AuxInt) != 32 || x != v_1 {
 21620  				continue
 21621  			}
 21622  			mask := v_2
 21623  			v.Reset(ssaop.OpARM64ZUMINMergingB)
 21624  			v.AddArg3(x, y, mask)
 21625  			return true
 21626  		}
 21627  		break
 21628  	}
 21629  	// match: (ZSELB (ZUMINB x y (Select0 <types.TypeMask> (PWHILELTB (MOVDconst [0]) (MOVDconst [32])))) y mask)
 21630  	// result: (ZUMINMergingB y x mask)
 21631  	for {
 21632  		if v_0.Op != ssaop.OpARM64ZUMINB {
 21633  			break
 21634  		}
 21635  		_ = v_0.Args[2]
 21636  		v_0_0 := v_0.Args[0]
 21637  		v_0_1 := v_0.Args[1]
 21638  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
 21639  			x := v_0_0
 21640  			y := v_0_1
 21641  			v_0_2 := v_0.Args[2]
 21642  			if v_0_2.Op != ssaop.OpSelect0 || v_0_2.Type != types.TypeMask {
 21643  				continue
 21644  			}
 21645  			v_0_2_0 := v_0_2.Args[0]
 21646  			if v_0_2_0.Op != ssaop.OpARM64PWHILELTB {
 21647  				continue
 21648  			}
 21649  			_ = v_0_2_0.Args[1]
 21650  			v_0_2_0_0 := v_0_2_0.Args[0]
 21651  			if v_0_2_0_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_0.AuxInt) != 0 {
 21652  				continue
 21653  			}
 21654  			v_0_2_0_1 := v_0_2_0.Args[1]
 21655  			if v_0_2_0_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_1.AuxInt) != 32 || y != v_1 {
 21656  				continue
 21657  			}
 21658  			mask := v_2
 21659  			v.Reset(ssaop.OpARM64ZUMINMergingB)
 21660  			v.AddArg3(y, x, mask)
 21661  			return true
 21662  		}
 21663  		break
 21664  	}
 21665  	// match: (ZSELB (ZUMINB x y (Select0 <types.TypeMask> (PWHILELTB (MOVDconst [0]) (MOVDconst [32])))) z mask)
 21666  	// result: (ZUMINMergingPrefixedB z x y mask)
 21667  	for {
 21668  		if v_0.Op != ssaop.OpARM64ZUMINB {
 21669  			break
 21670  		}
 21671  		_ = v_0.Args[2]
 21672  		x := v_0.Args[0]
 21673  		y := v_0.Args[1]
 21674  		v_0_2 := v_0.Args[2]
 21675  		if v_0_2.Op != ssaop.OpSelect0 || v_0_2.Type != types.TypeMask {
 21676  			break
 21677  		}
 21678  		v_0_2_0 := v_0_2.Args[0]
 21679  		if v_0_2_0.Op != ssaop.OpARM64PWHILELTB {
 21680  			break
 21681  		}
 21682  		_ = v_0_2_0.Args[1]
 21683  		v_0_2_0_0 := v_0_2_0.Args[0]
 21684  		if v_0_2_0_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_0.AuxInt) != 0 {
 21685  			break
 21686  		}
 21687  		v_0_2_0_1 := v_0_2_0.Args[1]
 21688  		if v_0_2_0_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_1.AuxInt) != 32 {
 21689  			break
 21690  		}
 21691  		z := v_1
 21692  		mask := v_2
 21693  		v.Reset(ssaop.OpARM64ZUMINMergingPrefixedB)
 21694  		v.AddArg4(z, x, y, mask)
 21695  		return true
 21696  	}
 21697  	// match: (ZSELB (ZUMULHMergingB x y (Select0 <types.TypeMask> (PWHILELTB (MOVDconst [0]) (MOVDconst [32])))) x mask)
 21698  	// result: (ZUMULHMergingB x y mask)
 21699  	for {
 21700  		if v_0.Op != ssaop.OpARM64ZUMULHMergingB {
 21701  			break
 21702  		}
 21703  		_ = v_0.Args[2]
 21704  		x := v_0.Args[0]
 21705  		y := v_0.Args[1]
 21706  		v_0_2 := v_0.Args[2]
 21707  		if v_0_2.Op != ssaop.OpSelect0 || v_0_2.Type != types.TypeMask {
 21708  			break
 21709  		}
 21710  		v_0_2_0 := v_0_2.Args[0]
 21711  		if v_0_2_0.Op != ssaop.OpARM64PWHILELTB {
 21712  			break
 21713  		}
 21714  		_ = v_0_2_0.Args[1]
 21715  		v_0_2_0_0 := v_0_2_0.Args[0]
 21716  		if v_0_2_0_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_0.AuxInt) != 0 {
 21717  			break
 21718  		}
 21719  		v_0_2_0_1 := v_0_2_0.Args[1]
 21720  		if v_0_2_0_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_1.AuxInt) != 32 || x != v_1 {
 21721  			break
 21722  		}
 21723  		mask := v_2
 21724  		v.Reset(ssaop.OpARM64ZUMULHMergingB)
 21725  		v.AddArg3(x, y, mask)
 21726  		return true
 21727  	}
 21728  	// match: (ZSELB (ZUMULHMergingB x y (Select0 <types.TypeMask> (PWHILELTB (MOVDconst [0]) (MOVDconst [32])))) y mask)
 21729  	// result: (ZUMULHMergingB y x mask)
 21730  	for {
 21731  		if v_0.Op != ssaop.OpARM64ZUMULHMergingB {
 21732  			break
 21733  		}
 21734  		_ = v_0.Args[2]
 21735  		x := v_0.Args[0]
 21736  		y := v_0.Args[1]
 21737  		v_0_2 := v_0.Args[2]
 21738  		if v_0_2.Op != ssaop.OpSelect0 || v_0_2.Type != types.TypeMask {
 21739  			break
 21740  		}
 21741  		v_0_2_0 := v_0_2.Args[0]
 21742  		if v_0_2_0.Op != ssaop.OpARM64PWHILELTB {
 21743  			break
 21744  		}
 21745  		_ = v_0_2_0.Args[1]
 21746  		v_0_2_0_0 := v_0_2_0.Args[0]
 21747  		if v_0_2_0_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_0.AuxInt) != 0 {
 21748  			break
 21749  		}
 21750  		v_0_2_0_1 := v_0_2_0.Args[1]
 21751  		if v_0_2_0_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_1.AuxInt) != 32 || y != v_1 {
 21752  			break
 21753  		}
 21754  		mask := v_2
 21755  		v.Reset(ssaop.OpARM64ZUMULHMergingB)
 21756  		v.AddArg3(y, x, mask)
 21757  		return true
 21758  	}
 21759  	// match: (ZSELB (ZUMULHMergingB x y (Select0 <types.TypeMask> (PWHILELTB (MOVDconst [0]) (MOVDconst [32])))) z mask)
 21760  	// result: (ZUMULHMergingPrefixedB z x y mask)
 21761  	for {
 21762  		if v_0.Op != ssaop.OpARM64ZUMULHMergingB {
 21763  			break
 21764  		}
 21765  		_ = v_0.Args[2]
 21766  		x := v_0.Args[0]
 21767  		y := v_0.Args[1]
 21768  		v_0_2 := v_0.Args[2]
 21769  		if v_0_2.Op != ssaop.OpSelect0 || v_0_2.Type != types.TypeMask {
 21770  			break
 21771  		}
 21772  		v_0_2_0 := v_0_2.Args[0]
 21773  		if v_0_2_0.Op != ssaop.OpARM64PWHILELTB {
 21774  			break
 21775  		}
 21776  		_ = v_0_2_0.Args[1]
 21777  		v_0_2_0_0 := v_0_2_0.Args[0]
 21778  		if v_0_2_0_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_0.AuxInt) != 0 {
 21779  			break
 21780  		}
 21781  		v_0_2_0_1 := v_0_2_0.Args[1]
 21782  		if v_0_2_0_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_1.AuxInt) != 32 {
 21783  			break
 21784  		}
 21785  		z := v_1
 21786  		mask := v_2
 21787  		v.Reset(ssaop.OpARM64ZUMULHMergingPrefixedB)
 21788  		v.AddArg4(z, x, y, mask)
 21789  		return true
 21790  	}
 21791  	// match: (ZSELB (ZUQADDB x y) x mask)
 21792  	// result: (ZUQADDMergingB x y mask)
 21793  	for {
 21794  		if v_0.Op != ssaop.OpARM64ZUQADDB {
 21795  			break
 21796  		}
 21797  		_ = v_0.Args[1]
 21798  		v_0_0 := v_0.Args[0]
 21799  		v_0_1 := v_0.Args[1]
 21800  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
 21801  			x := v_0_0
 21802  			y := v_0_1
 21803  			if x != v_1 {
 21804  				continue
 21805  			}
 21806  			mask := v_2
 21807  			v.Reset(ssaop.OpARM64ZUQADDMergingB)
 21808  			v.AddArg3(x, y, mask)
 21809  			return true
 21810  		}
 21811  		break
 21812  	}
 21813  	// match: (ZSELB (ZUQADDB x y) y mask)
 21814  	// result: (ZUQADDMergingB y x mask)
 21815  	for {
 21816  		if v_0.Op != ssaop.OpARM64ZUQADDB {
 21817  			break
 21818  		}
 21819  		_ = v_0.Args[1]
 21820  		v_0_0 := v_0.Args[0]
 21821  		v_0_1 := v_0.Args[1]
 21822  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
 21823  			x := v_0_0
 21824  			y := v_0_1
 21825  			if y != v_1 {
 21826  				continue
 21827  			}
 21828  			mask := v_2
 21829  			v.Reset(ssaop.OpARM64ZUQADDMergingB)
 21830  			v.AddArg3(y, x, mask)
 21831  			return true
 21832  		}
 21833  		break
 21834  	}
 21835  	// match: (ZSELB (ZUQADDB x y) z mask)
 21836  	// result: (ZUQADDMergingPrefixedB z x y mask)
 21837  	for {
 21838  		if v_0.Op != ssaop.OpARM64ZUQADDB {
 21839  			break
 21840  		}
 21841  		y := v_0.Args[1]
 21842  		x := v_0.Args[0]
 21843  		z := v_1
 21844  		mask := v_2
 21845  		v.Reset(ssaop.OpARM64ZUQADDMergingPrefixedB)
 21846  		v.AddArg4(z, x, y, mask)
 21847  		return true
 21848  	}
 21849  	// match: (ZSELB (ZUQSUBB x y) x mask)
 21850  	// result: (ZUQSUBMergingB x y mask)
 21851  	for {
 21852  		if v_0.Op != ssaop.OpARM64ZUQSUBB {
 21853  			break
 21854  		}
 21855  		y := v_0.Args[1]
 21856  		x := v_0.Args[0]
 21857  		if x != v_1 {
 21858  			break
 21859  		}
 21860  		mask := v_2
 21861  		v.Reset(ssaop.OpARM64ZUQSUBMergingB)
 21862  		v.AddArg3(x, y, mask)
 21863  		return true
 21864  	}
 21865  	return false
 21866  }
 21867  func rewriteValue_OpARM64ZSELD(v *ssa.Value) bool {
 21868  	v_2 := v.Args[2]
 21869  	v_1 := v.Args[1]
 21870  	v_0 := v.Args[0]
 21871  	// match: (ZSELD (ZDUPD x) z mask)
 21872  	// result: (ZCPYMergingD z x mask)
 21873  	for {
 21874  		if v_0.Op != ssaop.OpARM64ZDUPD {
 21875  			break
 21876  		}
 21877  		x := v_0.Args[0]
 21878  		z := v_1
 21879  		mask := v_2
 21880  		v.Reset(ssaop.OpARM64ZCPYMergingD)
 21881  		v.AddArg3(z, x, mask)
 21882  		return true
 21883  	}
 21884  	// match: (ZSELD (ZDUPID [0] x) z mask)
 21885  	// result: (ZCPYIMergingD z x mask)
 21886  	for {
 21887  		if v_0.Op != ssaop.OpARM64ZDUPID || ssa.AuxIntToUint8(v_0.AuxInt) != 0 {
 21888  			break
 21889  		}
 21890  		x := v_0.Args[0]
 21891  		z := v_1
 21892  		mask := v_2
 21893  		v.Reset(ssaop.OpARM64ZCPYIMergingD)
 21894  		v.AddArg3(z, x, mask)
 21895  		return true
 21896  	}
 21897  	// match: (ZSELD (ZDUPDconst [c]) z mask)
 21898  	// result: (ZCPYMergingDconst [c] z mask)
 21899  	for {
 21900  		if v_0.Op != ssaop.OpARM64ZDUPDconst {
 21901  			break
 21902  		}
 21903  		c := ssa.AuxIntToInt8(v_0.AuxInt)
 21904  		z := v_1
 21905  		mask := v_2
 21906  		v.Reset(ssaop.OpARM64ZCPYMergingDconst)
 21907  		v.AuxInt = ssa.Int8ToAuxInt(c)
 21908  		v.AddArg2(z, mask)
 21909  		return true
 21910  	}
 21911  	// match: (ZSELD (ZABSD x (Select0 <types.TypeMask> (PWHILELTD (MOVDconst [0]) (MOVDconst [4])))) z mask)
 21912  	// result: (ZABSMergingD z x mask)
 21913  	for {
 21914  		if v_0.Op != ssaop.OpARM64ZABSD {
 21915  			break
 21916  		}
 21917  		_ = v_0.Args[1]
 21918  		x := v_0.Args[0]
 21919  		v_0_1 := v_0.Args[1]
 21920  		if v_0_1.Op != ssaop.OpSelect0 || v_0_1.Type != types.TypeMask {
 21921  			break
 21922  		}
 21923  		v_0_1_0 := v_0_1.Args[0]
 21924  		if v_0_1_0.Op != ssaop.OpARM64PWHILELTD {
 21925  			break
 21926  		}
 21927  		_ = v_0_1_0.Args[1]
 21928  		v_0_1_0_0 := v_0_1_0.Args[0]
 21929  		if v_0_1_0_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_1_0_0.AuxInt) != 0 {
 21930  			break
 21931  		}
 21932  		v_0_1_0_1 := v_0_1_0.Args[1]
 21933  		if v_0_1_0_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_1_0_1.AuxInt) != 4 {
 21934  			break
 21935  		}
 21936  		z := v_1
 21937  		mask := v_2
 21938  		v.Reset(ssaop.OpARM64ZABSMergingD)
 21939  		v.AddArg3(z, x, mask)
 21940  		return true
 21941  	}
 21942  	// match: (ZSELD (ZADDD x y) x mask)
 21943  	// result: (ZADDMergingD x y mask)
 21944  	for {
 21945  		if v_0.Op != ssaop.OpARM64ZADDD {
 21946  			break
 21947  		}
 21948  		_ = v_0.Args[1]
 21949  		v_0_0 := v_0.Args[0]
 21950  		v_0_1 := v_0.Args[1]
 21951  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
 21952  			x := v_0_0
 21953  			y := v_0_1
 21954  			if x != v_1 {
 21955  				continue
 21956  			}
 21957  			mask := v_2
 21958  			v.Reset(ssaop.OpARM64ZADDMergingD)
 21959  			v.AddArg3(x, y, mask)
 21960  			return true
 21961  		}
 21962  		break
 21963  	}
 21964  	// match: (ZSELD (ZADDD x y) y mask)
 21965  	// result: (ZADDMergingD y x mask)
 21966  	for {
 21967  		if v_0.Op != ssaop.OpARM64ZADDD {
 21968  			break
 21969  		}
 21970  		_ = v_0.Args[1]
 21971  		v_0_0 := v_0.Args[0]
 21972  		v_0_1 := v_0.Args[1]
 21973  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
 21974  			x := v_0_0
 21975  			y := v_0_1
 21976  			if y != v_1 {
 21977  				continue
 21978  			}
 21979  			mask := v_2
 21980  			v.Reset(ssaop.OpARM64ZADDMergingD)
 21981  			v.AddArg3(y, x, mask)
 21982  			return true
 21983  		}
 21984  		break
 21985  	}
 21986  	// match: (ZSELD (ZADDD x y) z mask)
 21987  	// result: (ZADDMergingPrefixedD z x y mask)
 21988  	for {
 21989  		if v_0.Op != ssaop.OpARM64ZADDD {
 21990  			break
 21991  		}
 21992  		y := v_0.Args[1]
 21993  		x := v_0.Args[0]
 21994  		z := v_1
 21995  		mask := v_2
 21996  		v.Reset(ssaop.OpARM64ZADDMergingPrefixedD)
 21997  		v.AddArg4(z, x, y, mask)
 21998  		return true
 21999  	}
 22000  	// match: (ZSELD (ZANDD x y) x mask)
 22001  	// result: (ZANDMergingD x y mask)
 22002  	for {
 22003  		if v_0.Op != ssaop.OpARM64ZANDD {
 22004  			break
 22005  		}
 22006  		_ = v_0.Args[1]
 22007  		v_0_0 := v_0.Args[0]
 22008  		v_0_1 := v_0.Args[1]
 22009  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
 22010  			x := v_0_0
 22011  			y := v_0_1
 22012  			if x != v_1 {
 22013  				continue
 22014  			}
 22015  			mask := v_2
 22016  			v.Reset(ssaop.OpARM64ZANDMergingD)
 22017  			v.AddArg3(x, y, mask)
 22018  			return true
 22019  		}
 22020  		break
 22021  	}
 22022  	// match: (ZSELD (ZANDD x y) y mask)
 22023  	// result: (ZANDMergingD y x mask)
 22024  	for {
 22025  		if v_0.Op != ssaop.OpARM64ZANDD {
 22026  			break
 22027  		}
 22028  		_ = v_0.Args[1]
 22029  		v_0_0 := v_0.Args[0]
 22030  		v_0_1 := v_0.Args[1]
 22031  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
 22032  			x := v_0_0
 22033  			y := v_0_1
 22034  			if y != v_1 {
 22035  				continue
 22036  			}
 22037  			mask := v_2
 22038  			v.Reset(ssaop.OpARM64ZANDMergingD)
 22039  			v.AddArg3(y, x, mask)
 22040  			return true
 22041  		}
 22042  		break
 22043  	}
 22044  	// match: (ZSELD (ZANDD x y) z mask)
 22045  	// result: (ZANDMergingPrefixedD z x y mask)
 22046  	for {
 22047  		if v_0.Op != ssaop.OpARM64ZANDD {
 22048  			break
 22049  		}
 22050  		y := v_0.Args[1]
 22051  		x := v_0.Args[0]
 22052  		z := v_1
 22053  		mask := v_2
 22054  		v.Reset(ssaop.OpARM64ZANDMergingPrefixedD)
 22055  		v.AddArg4(z, x, y, mask)
 22056  		return true
 22057  	}
 22058  	// match: (ZSELD (ZBICD x y) x mask)
 22059  	// result: (ZBICMergingD x y mask)
 22060  	for {
 22061  		if v_0.Op != ssaop.OpARM64ZBICD {
 22062  			break
 22063  		}
 22064  		y := v_0.Args[1]
 22065  		x := v_0.Args[0]
 22066  		if x != v_1 {
 22067  			break
 22068  		}
 22069  		mask := v_2
 22070  		v.Reset(ssaop.OpARM64ZBICMergingD)
 22071  		v.AddArg3(x, y, mask)
 22072  		return true
 22073  	}
 22074  	// match: (ZSELD (ZEORD x y) x mask)
 22075  	// result: (ZEORMergingD x y mask)
 22076  	for {
 22077  		if v_0.Op != ssaop.OpARM64ZEORD {
 22078  			break
 22079  		}
 22080  		_ = v_0.Args[1]
 22081  		v_0_0 := v_0.Args[0]
 22082  		v_0_1 := v_0.Args[1]
 22083  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
 22084  			x := v_0_0
 22085  			y := v_0_1
 22086  			if x != v_1 {
 22087  				continue
 22088  			}
 22089  			mask := v_2
 22090  			v.Reset(ssaop.OpARM64ZEORMergingD)
 22091  			v.AddArg3(x, y, mask)
 22092  			return true
 22093  		}
 22094  		break
 22095  	}
 22096  	// match: (ZSELD (ZEORD x y) y mask)
 22097  	// result: (ZEORMergingD y x mask)
 22098  	for {
 22099  		if v_0.Op != ssaop.OpARM64ZEORD {
 22100  			break
 22101  		}
 22102  		_ = v_0.Args[1]
 22103  		v_0_0 := v_0.Args[0]
 22104  		v_0_1 := v_0.Args[1]
 22105  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
 22106  			x := v_0_0
 22107  			y := v_0_1
 22108  			if y != v_1 {
 22109  				continue
 22110  			}
 22111  			mask := v_2
 22112  			v.Reset(ssaop.OpARM64ZEORMergingD)
 22113  			v.AddArg3(y, x, mask)
 22114  			return true
 22115  		}
 22116  		break
 22117  	}
 22118  	// match: (ZSELD (ZEORD x y) z mask)
 22119  	// result: (ZEORMergingPrefixedD z x y mask)
 22120  	for {
 22121  		if v_0.Op != ssaop.OpARM64ZEORD {
 22122  			break
 22123  		}
 22124  		y := v_0.Args[1]
 22125  		x := v_0.Args[0]
 22126  		z := v_1
 22127  		mask := v_2
 22128  		v.Reset(ssaop.OpARM64ZEORMergingPrefixedD)
 22129  		v.AddArg4(z, x, y, mask)
 22130  		return true
 22131  	}
 22132  	// match: (ZSELD (ZFABSD x (Select0 <types.TypeMask> (PWHILELTD (MOVDconst [0]) (MOVDconst [4])))) z mask)
 22133  	// result: (ZFABSMergingD z x mask)
 22134  	for {
 22135  		if v_0.Op != ssaop.OpARM64ZFABSD {
 22136  			break
 22137  		}
 22138  		_ = v_0.Args[1]
 22139  		x := v_0.Args[0]
 22140  		v_0_1 := v_0.Args[1]
 22141  		if v_0_1.Op != ssaop.OpSelect0 || v_0_1.Type != types.TypeMask {
 22142  			break
 22143  		}
 22144  		v_0_1_0 := v_0_1.Args[0]
 22145  		if v_0_1_0.Op != ssaop.OpARM64PWHILELTD {
 22146  			break
 22147  		}
 22148  		_ = v_0_1_0.Args[1]
 22149  		v_0_1_0_0 := v_0_1_0.Args[0]
 22150  		if v_0_1_0_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_1_0_0.AuxInt) != 0 {
 22151  			break
 22152  		}
 22153  		v_0_1_0_1 := v_0_1_0.Args[1]
 22154  		if v_0_1_0_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_1_0_1.AuxInt) != 4 {
 22155  			break
 22156  		}
 22157  		z := v_1
 22158  		mask := v_2
 22159  		v.Reset(ssaop.OpARM64ZFABSMergingD)
 22160  		v.AddArg3(z, x, mask)
 22161  		return true
 22162  	}
 22163  	// match: (ZSELD (ZFADDD x y) x mask)
 22164  	// result: (ZFADDMergingD x y mask)
 22165  	for {
 22166  		if v_0.Op != ssaop.OpARM64ZFADDD {
 22167  			break
 22168  		}
 22169  		_ = v_0.Args[1]
 22170  		v_0_0 := v_0.Args[0]
 22171  		v_0_1 := v_0.Args[1]
 22172  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
 22173  			x := v_0_0
 22174  			y := v_0_1
 22175  			if x != v_1 {
 22176  				continue
 22177  			}
 22178  			mask := v_2
 22179  			v.Reset(ssaop.OpARM64ZFADDMergingD)
 22180  			v.AddArg3(x, y, mask)
 22181  			return true
 22182  		}
 22183  		break
 22184  	}
 22185  	// match: (ZSELD (ZFADDD x y) y mask)
 22186  	// result: (ZFADDMergingD y x mask)
 22187  	for {
 22188  		if v_0.Op != ssaop.OpARM64ZFADDD {
 22189  			break
 22190  		}
 22191  		_ = v_0.Args[1]
 22192  		v_0_0 := v_0.Args[0]
 22193  		v_0_1 := v_0.Args[1]
 22194  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
 22195  			x := v_0_0
 22196  			y := v_0_1
 22197  			if y != v_1 {
 22198  				continue
 22199  			}
 22200  			mask := v_2
 22201  			v.Reset(ssaop.OpARM64ZFADDMergingD)
 22202  			v.AddArg3(y, x, mask)
 22203  			return true
 22204  		}
 22205  		break
 22206  	}
 22207  	// match: (ZSELD (ZFADDD x y) z mask)
 22208  	// result: (ZFADDMergingPrefixedD z x y mask)
 22209  	for {
 22210  		if v_0.Op != ssaop.OpARM64ZFADDD {
 22211  			break
 22212  		}
 22213  		y := v_0.Args[1]
 22214  		x := v_0.Args[0]
 22215  		z := v_1
 22216  		mask := v_2
 22217  		v.Reset(ssaop.OpARM64ZFADDMergingPrefixedD)
 22218  		v.AddArg4(z, x, y, mask)
 22219  		return true
 22220  	}
 22221  	// match: (ZSELD (ZFDIVD x y (Select0 <types.TypeMask> (PWHILELTD (MOVDconst [0]) (MOVDconst [4])))) x mask)
 22222  	// result: (ZFDIVMergingD x y mask)
 22223  	for {
 22224  		if v_0.Op != ssaop.OpARM64ZFDIVD {
 22225  			break
 22226  		}
 22227  		_ = v_0.Args[2]
 22228  		x := v_0.Args[0]
 22229  		y := v_0.Args[1]
 22230  		v_0_2 := v_0.Args[2]
 22231  		if v_0_2.Op != ssaop.OpSelect0 || v_0_2.Type != types.TypeMask {
 22232  			break
 22233  		}
 22234  		v_0_2_0 := v_0_2.Args[0]
 22235  		if v_0_2_0.Op != ssaop.OpARM64PWHILELTD {
 22236  			break
 22237  		}
 22238  		_ = v_0_2_0.Args[1]
 22239  		v_0_2_0_0 := v_0_2_0.Args[0]
 22240  		if v_0_2_0_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_0.AuxInt) != 0 {
 22241  			break
 22242  		}
 22243  		v_0_2_0_1 := v_0_2_0.Args[1]
 22244  		if v_0_2_0_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_1.AuxInt) != 4 || x != v_1 {
 22245  			break
 22246  		}
 22247  		mask := v_2
 22248  		v.Reset(ssaop.OpARM64ZFDIVMergingD)
 22249  		v.AddArg3(x, y, mask)
 22250  		return true
 22251  	}
 22252  	// match: (ZSELD (ZFMAXD x y (Select0 <types.TypeMask> (PWHILELTD (MOVDconst [0]) (MOVDconst [4])))) x mask)
 22253  	// result: (ZFMAXMergingD x y mask)
 22254  	for {
 22255  		if v_0.Op != ssaop.OpARM64ZFMAXD {
 22256  			break
 22257  		}
 22258  		_ = v_0.Args[2]
 22259  		x := v_0.Args[0]
 22260  		y := v_0.Args[1]
 22261  		v_0_2 := v_0.Args[2]
 22262  		if v_0_2.Op != ssaop.OpSelect0 || v_0_2.Type != types.TypeMask {
 22263  			break
 22264  		}
 22265  		v_0_2_0 := v_0_2.Args[0]
 22266  		if v_0_2_0.Op != ssaop.OpARM64PWHILELTD {
 22267  			break
 22268  		}
 22269  		_ = v_0_2_0.Args[1]
 22270  		v_0_2_0_0 := v_0_2_0.Args[0]
 22271  		if v_0_2_0_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_0.AuxInt) != 0 {
 22272  			break
 22273  		}
 22274  		v_0_2_0_1 := v_0_2_0.Args[1]
 22275  		if v_0_2_0_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_1.AuxInt) != 4 || x != v_1 {
 22276  			break
 22277  		}
 22278  		mask := v_2
 22279  		v.Reset(ssaop.OpARM64ZFMAXMergingD)
 22280  		v.AddArg3(x, y, mask)
 22281  		return true
 22282  	}
 22283  	// match: (ZSELD (ZFMIND x y (Select0 <types.TypeMask> (PWHILELTD (MOVDconst [0]) (MOVDconst [4])))) x mask)
 22284  	// result: (ZFMINMergingD x y mask)
 22285  	for {
 22286  		if v_0.Op != ssaop.OpARM64ZFMIND {
 22287  			break
 22288  		}
 22289  		_ = v_0.Args[2]
 22290  		x := v_0.Args[0]
 22291  		y := v_0.Args[1]
 22292  		v_0_2 := v_0.Args[2]
 22293  		if v_0_2.Op != ssaop.OpSelect0 || v_0_2.Type != types.TypeMask {
 22294  			break
 22295  		}
 22296  		v_0_2_0 := v_0_2.Args[0]
 22297  		if v_0_2_0.Op != ssaop.OpARM64PWHILELTD {
 22298  			break
 22299  		}
 22300  		_ = v_0_2_0.Args[1]
 22301  		v_0_2_0_0 := v_0_2_0.Args[0]
 22302  		if v_0_2_0_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_0.AuxInt) != 0 {
 22303  			break
 22304  		}
 22305  		v_0_2_0_1 := v_0_2_0.Args[1]
 22306  		if v_0_2_0_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_1.AuxInt) != 4 || x != v_1 {
 22307  			break
 22308  		}
 22309  		mask := v_2
 22310  		v.Reset(ssaop.OpARM64ZFMINMergingD)
 22311  		v.AddArg3(x, y, mask)
 22312  		return true
 22313  	}
 22314  	// match: (ZSELD (ZFMLAD x y z (Select0 <types.TypeMask> (PWHILELTD (MOVDconst [0]) (MOVDconst [4])))) x mask)
 22315  	// result: (ZFMLAMergingD x y z mask)
 22316  	for {
 22317  		if v_0.Op != ssaop.OpARM64ZFMLAD {
 22318  			break
 22319  		}
 22320  		_ = v_0.Args[3]
 22321  		x := v_0.Args[0]
 22322  		y := v_0.Args[1]
 22323  		z := v_0.Args[2]
 22324  		v_0_3 := v_0.Args[3]
 22325  		if v_0_3.Op != ssaop.OpSelect0 || v_0_3.Type != types.TypeMask {
 22326  			break
 22327  		}
 22328  		v_0_3_0 := v_0_3.Args[0]
 22329  		if v_0_3_0.Op != ssaop.OpARM64PWHILELTD {
 22330  			break
 22331  		}
 22332  		_ = v_0_3_0.Args[1]
 22333  		v_0_3_0_0 := v_0_3_0.Args[0]
 22334  		if v_0_3_0_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_3_0_0.AuxInt) != 0 {
 22335  			break
 22336  		}
 22337  		v_0_3_0_1 := v_0_3_0.Args[1]
 22338  		if v_0_3_0_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_3_0_1.AuxInt) != 4 || x != v_1 {
 22339  			break
 22340  		}
 22341  		mask := v_2
 22342  		v.Reset(ssaop.OpARM64ZFMLAMergingD)
 22343  		v.AddArg4(x, y, z, mask)
 22344  		return true
 22345  	}
 22346  	// match: (ZSELD (ZFMULD x y) x mask)
 22347  	// result: (ZFMULMergingD x y mask)
 22348  	for {
 22349  		if v_0.Op != ssaop.OpARM64ZFMULD {
 22350  			break
 22351  		}
 22352  		_ = v_0.Args[1]
 22353  		v_0_0 := v_0.Args[0]
 22354  		v_0_1 := v_0.Args[1]
 22355  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
 22356  			x := v_0_0
 22357  			y := v_0_1
 22358  			if x != v_1 {
 22359  				continue
 22360  			}
 22361  			mask := v_2
 22362  			v.Reset(ssaop.OpARM64ZFMULMergingD)
 22363  			v.AddArg3(x, y, mask)
 22364  			return true
 22365  		}
 22366  		break
 22367  	}
 22368  	// match: (ZSELD (ZFMULD x y) y mask)
 22369  	// result: (ZFMULMergingD y x mask)
 22370  	for {
 22371  		if v_0.Op != ssaop.OpARM64ZFMULD {
 22372  			break
 22373  		}
 22374  		_ = v_0.Args[1]
 22375  		v_0_0 := v_0.Args[0]
 22376  		v_0_1 := v_0.Args[1]
 22377  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
 22378  			x := v_0_0
 22379  			y := v_0_1
 22380  			if y != v_1 {
 22381  				continue
 22382  			}
 22383  			mask := v_2
 22384  			v.Reset(ssaop.OpARM64ZFMULMergingD)
 22385  			v.AddArg3(y, x, mask)
 22386  			return true
 22387  		}
 22388  		break
 22389  	}
 22390  	// match: (ZSELD (ZFMULD x y) z mask)
 22391  	// result: (ZFMULMergingPrefixedD z x y mask)
 22392  	for {
 22393  		if v_0.Op != ssaop.OpARM64ZFMULD {
 22394  			break
 22395  		}
 22396  		y := v_0.Args[1]
 22397  		x := v_0.Args[0]
 22398  		z := v_1
 22399  		mask := v_2
 22400  		v.Reset(ssaop.OpARM64ZFMULMergingPrefixedD)
 22401  		v.AddArg4(z, x, y, mask)
 22402  		return true
 22403  	}
 22404  	// match: (ZSELD (ZFNEGD x (Select0 <types.TypeMask> (PWHILELTD (MOVDconst [0]) (MOVDconst [4])))) z mask)
 22405  	// result: (ZFNEGMergingD z x mask)
 22406  	for {
 22407  		if v_0.Op != ssaop.OpARM64ZFNEGD {
 22408  			break
 22409  		}
 22410  		_ = v_0.Args[1]
 22411  		x := v_0.Args[0]
 22412  		v_0_1 := v_0.Args[1]
 22413  		if v_0_1.Op != ssaop.OpSelect0 || v_0_1.Type != types.TypeMask {
 22414  			break
 22415  		}
 22416  		v_0_1_0 := v_0_1.Args[0]
 22417  		if v_0_1_0.Op != ssaop.OpARM64PWHILELTD {
 22418  			break
 22419  		}
 22420  		_ = v_0_1_0.Args[1]
 22421  		v_0_1_0_0 := v_0_1_0.Args[0]
 22422  		if v_0_1_0_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_1_0_0.AuxInt) != 0 {
 22423  			break
 22424  		}
 22425  		v_0_1_0_1 := v_0_1_0.Args[1]
 22426  		if v_0_1_0_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_1_0_1.AuxInt) != 4 {
 22427  			break
 22428  		}
 22429  		z := v_1
 22430  		mask := v_2
 22431  		v.Reset(ssaop.OpARM64ZFNEGMergingD)
 22432  		v.AddArg3(z, x, mask)
 22433  		return true
 22434  	}
 22435  	// match: (ZSELD (ZFSQRTD x (Select0 <types.TypeMask> (PWHILELTD (MOVDconst [0]) (MOVDconst [4])))) z mask)
 22436  	// result: (ZFSQRTMergingD z x mask)
 22437  	for {
 22438  		if v_0.Op != ssaop.OpARM64ZFSQRTD {
 22439  			break
 22440  		}
 22441  		_ = v_0.Args[1]
 22442  		x := v_0.Args[0]
 22443  		v_0_1 := v_0.Args[1]
 22444  		if v_0_1.Op != ssaop.OpSelect0 || v_0_1.Type != types.TypeMask {
 22445  			break
 22446  		}
 22447  		v_0_1_0 := v_0_1.Args[0]
 22448  		if v_0_1_0.Op != ssaop.OpARM64PWHILELTD {
 22449  			break
 22450  		}
 22451  		_ = v_0_1_0.Args[1]
 22452  		v_0_1_0_0 := v_0_1_0.Args[0]
 22453  		if v_0_1_0_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_1_0_0.AuxInt) != 0 {
 22454  			break
 22455  		}
 22456  		v_0_1_0_1 := v_0_1_0.Args[1]
 22457  		if v_0_1_0_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_1_0_1.AuxInt) != 4 {
 22458  			break
 22459  		}
 22460  		z := v_1
 22461  		mask := v_2
 22462  		v.Reset(ssaop.OpARM64ZFSQRTMergingD)
 22463  		v.AddArg3(z, x, mask)
 22464  		return true
 22465  	}
 22466  	// match: (ZSELD (ZFSUBD x y) x mask)
 22467  	// result: (ZFSUBMergingD x y mask)
 22468  	for {
 22469  		if v_0.Op != ssaop.OpARM64ZFSUBD {
 22470  			break
 22471  		}
 22472  		y := v_0.Args[1]
 22473  		x := v_0.Args[0]
 22474  		if x != v_1 {
 22475  			break
 22476  		}
 22477  		mask := v_2
 22478  		v.Reset(ssaop.OpARM64ZFSUBMergingD)
 22479  		v.AddArg3(x, y, mask)
 22480  		return true
 22481  	}
 22482  	// match: (ZSELD (ZMLAD x y z (Select0 <types.TypeMask> (PWHILELTD (MOVDconst [0]) (MOVDconst [4])))) x mask)
 22483  	// result: (ZMLAMergingD x y z mask)
 22484  	for {
 22485  		if v_0.Op != ssaop.OpARM64ZMLAD {
 22486  			break
 22487  		}
 22488  		_ = v_0.Args[3]
 22489  		x := v_0.Args[0]
 22490  		y := v_0.Args[1]
 22491  		z := v_0.Args[2]
 22492  		v_0_3 := v_0.Args[3]
 22493  		if v_0_3.Op != ssaop.OpSelect0 || v_0_3.Type != types.TypeMask {
 22494  			break
 22495  		}
 22496  		v_0_3_0 := v_0_3.Args[0]
 22497  		if v_0_3_0.Op != ssaop.OpARM64PWHILELTD {
 22498  			break
 22499  		}
 22500  		_ = v_0_3_0.Args[1]
 22501  		v_0_3_0_0 := v_0_3_0.Args[0]
 22502  		if v_0_3_0_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_3_0_0.AuxInt) != 0 {
 22503  			break
 22504  		}
 22505  		v_0_3_0_1 := v_0_3_0.Args[1]
 22506  		if v_0_3_0_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_3_0_1.AuxInt) != 4 || x != v_1 {
 22507  			break
 22508  		}
 22509  		mask := v_2
 22510  		v.Reset(ssaop.OpARM64ZMLAMergingD)
 22511  		v.AddArg4(x, y, z, mask)
 22512  		return true
 22513  	}
 22514  	// match: (ZSELD (ZMULMergingD x y (Select0 <types.TypeMask> (PWHILELTD (MOVDconst [0]) (MOVDconst [4])))) x mask)
 22515  	// result: (ZMULMergingD x y mask)
 22516  	for {
 22517  		if v_0.Op != ssaop.OpARM64ZMULMergingD {
 22518  			break
 22519  		}
 22520  		_ = v_0.Args[2]
 22521  		x := v_0.Args[0]
 22522  		y := v_0.Args[1]
 22523  		v_0_2 := v_0.Args[2]
 22524  		if v_0_2.Op != ssaop.OpSelect0 || v_0_2.Type != types.TypeMask {
 22525  			break
 22526  		}
 22527  		v_0_2_0 := v_0_2.Args[0]
 22528  		if v_0_2_0.Op != ssaop.OpARM64PWHILELTD {
 22529  			break
 22530  		}
 22531  		_ = v_0_2_0.Args[1]
 22532  		v_0_2_0_0 := v_0_2_0.Args[0]
 22533  		if v_0_2_0_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_0.AuxInt) != 0 {
 22534  			break
 22535  		}
 22536  		v_0_2_0_1 := v_0_2_0.Args[1]
 22537  		if v_0_2_0_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_1.AuxInt) != 4 || x != v_1 {
 22538  			break
 22539  		}
 22540  		mask := v_2
 22541  		v.Reset(ssaop.OpARM64ZMULMergingD)
 22542  		v.AddArg3(x, y, mask)
 22543  		return true
 22544  	}
 22545  	// match: (ZSELD (ZMULMergingD x y (Select0 <types.TypeMask> (PWHILELTD (MOVDconst [0]) (MOVDconst [4])))) y mask)
 22546  	// result: (ZMULMergingD y x mask)
 22547  	for {
 22548  		if v_0.Op != ssaop.OpARM64ZMULMergingD {
 22549  			break
 22550  		}
 22551  		_ = v_0.Args[2]
 22552  		x := v_0.Args[0]
 22553  		y := v_0.Args[1]
 22554  		v_0_2 := v_0.Args[2]
 22555  		if v_0_2.Op != ssaop.OpSelect0 || v_0_2.Type != types.TypeMask {
 22556  			break
 22557  		}
 22558  		v_0_2_0 := v_0_2.Args[0]
 22559  		if v_0_2_0.Op != ssaop.OpARM64PWHILELTD {
 22560  			break
 22561  		}
 22562  		_ = v_0_2_0.Args[1]
 22563  		v_0_2_0_0 := v_0_2_0.Args[0]
 22564  		if v_0_2_0_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_0.AuxInt) != 0 {
 22565  			break
 22566  		}
 22567  		v_0_2_0_1 := v_0_2_0.Args[1]
 22568  		if v_0_2_0_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_1.AuxInt) != 4 || y != v_1 {
 22569  			break
 22570  		}
 22571  		mask := v_2
 22572  		v.Reset(ssaop.OpARM64ZMULMergingD)
 22573  		v.AddArg3(y, x, mask)
 22574  		return true
 22575  	}
 22576  	// match: (ZSELD (ZMULMergingD x y (Select0 <types.TypeMask> (PWHILELTD (MOVDconst [0]) (MOVDconst [4])))) z mask)
 22577  	// result: (ZMULMergingPrefixedD z x y mask)
 22578  	for {
 22579  		if v_0.Op != ssaop.OpARM64ZMULMergingD {
 22580  			break
 22581  		}
 22582  		_ = v_0.Args[2]
 22583  		x := v_0.Args[0]
 22584  		y := v_0.Args[1]
 22585  		v_0_2 := v_0.Args[2]
 22586  		if v_0_2.Op != ssaop.OpSelect0 || v_0_2.Type != types.TypeMask {
 22587  			break
 22588  		}
 22589  		v_0_2_0 := v_0_2.Args[0]
 22590  		if v_0_2_0.Op != ssaop.OpARM64PWHILELTD {
 22591  			break
 22592  		}
 22593  		_ = v_0_2_0.Args[1]
 22594  		v_0_2_0_0 := v_0_2_0.Args[0]
 22595  		if v_0_2_0_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_0.AuxInt) != 0 {
 22596  			break
 22597  		}
 22598  		v_0_2_0_1 := v_0_2_0.Args[1]
 22599  		if v_0_2_0_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_1.AuxInt) != 4 {
 22600  			break
 22601  		}
 22602  		z := v_1
 22603  		mask := v_2
 22604  		v.Reset(ssaop.OpARM64ZMULMergingPrefixedD)
 22605  		v.AddArg4(z, x, y, mask)
 22606  		return true
 22607  	}
 22608  	// match: (ZSELD (ZNEGD x (Select0 <types.TypeMask> (PWHILELTD (MOVDconst [0]) (MOVDconst [4])))) z mask)
 22609  	// result: (ZNEGMergingD z x mask)
 22610  	for {
 22611  		if v_0.Op != ssaop.OpARM64ZNEGD {
 22612  			break
 22613  		}
 22614  		_ = v_0.Args[1]
 22615  		x := v_0.Args[0]
 22616  		v_0_1 := v_0.Args[1]
 22617  		if v_0_1.Op != ssaop.OpSelect0 || v_0_1.Type != types.TypeMask {
 22618  			break
 22619  		}
 22620  		v_0_1_0 := v_0_1.Args[0]
 22621  		if v_0_1_0.Op != ssaop.OpARM64PWHILELTD {
 22622  			break
 22623  		}
 22624  		_ = v_0_1_0.Args[1]
 22625  		v_0_1_0_0 := v_0_1_0.Args[0]
 22626  		if v_0_1_0_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_1_0_0.AuxInt) != 0 {
 22627  			break
 22628  		}
 22629  		v_0_1_0_1 := v_0_1_0.Args[1]
 22630  		if v_0_1_0_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_1_0_1.AuxInt) != 4 {
 22631  			break
 22632  		}
 22633  		z := v_1
 22634  		mask := v_2
 22635  		v.Reset(ssaop.OpARM64ZNEGMergingD)
 22636  		v.AddArg3(z, x, mask)
 22637  		return true
 22638  	}
 22639  	// match: (ZSELD (ZORRD x y) x mask)
 22640  	// result: (ZORRMergingD x y mask)
 22641  	for {
 22642  		if v_0.Op != ssaop.OpARM64ZORRD {
 22643  			break
 22644  		}
 22645  		_ = v_0.Args[1]
 22646  		v_0_0 := v_0.Args[0]
 22647  		v_0_1 := v_0.Args[1]
 22648  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
 22649  			x := v_0_0
 22650  			y := v_0_1
 22651  			if x != v_1 {
 22652  				continue
 22653  			}
 22654  			mask := v_2
 22655  			v.Reset(ssaop.OpARM64ZORRMergingD)
 22656  			v.AddArg3(x, y, mask)
 22657  			return true
 22658  		}
 22659  		break
 22660  	}
 22661  	// match: (ZSELD (ZORRD x y) y mask)
 22662  	// result: (ZORRMergingD y x mask)
 22663  	for {
 22664  		if v_0.Op != ssaop.OpARM64ZORRD {
 22665  			break
 22666  		}
 22667  		_ = v_0.Args[1]
 22668  		v_0_0 := v_0.Args[0]
 22669  		v_0_1 := v_0.Args[1]
 22670  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
 22671  			x := v_0_0
 22672  			y := v_0_1
 22673  			if y != v_1 {
 22674  				continue
 22675  			}
 22676  			mask := v_2
 22677  			v.Reset(ssaop.OpARM64ZORRMergingD)
 22678  			v.AddArg3(y, x, mask)
 22679  			return true
 22680  		}
 22681  		break
 22682  	}
 22683  	// match: (ZSELD (ZORRD x y) z mask)
 22684  	// result: (ZORRMergingPrefixedD z x y mask)
 22685  	for {
 22686  		if v_0.Op != ssaop.OpARM64ZORRD {
 22687  			break
 22688  		}
 22689  		y := v_0.Args[1]
 22690  		x := v_0.Args[0]
 22691  		z := v_1
 22692  		mask := v_2
 22693  		v.Reset(ssaop.OpARM64ZORRMergingPrefixedD)
 22694  		v.AddArg4(z, x, y, mask)
 22695  		return true
 22696  	}
 22697  	// match: (ZSELD (ZSDIVD x y (Select0 <types.TypeMask> (PWHILELTD (MOVDconst [0]) (MOVDconst [4])))) x mask)
 22698  	// result: (ZSDIVMergingD x y mask)
 22699  	for {
 22700  		if v_0.Op != ssaop.OpARM64ZSDIVD {
 22701  			break
 22702  		}
 22703  		_ = v_0.Args[2]
 22704  		x := v_0.Args[0]
 22705  		y := v_0.Args[1]
 22706  		v_0_2 := v_0.Args[2]
 22707  		if v_0_2.Op != ssaop.OpSelect0 || v_0_2.Type != types.TypeMask {
 22708  			break
 22709  		}
 22710  		v_0_2_0 := v_0_2.Args[0]
 22711  		if v_0_2_0.Op != ssaop.OpARM64PWHILELTD {
 22712  			break
 22713  		}
 22714  		_ = v_0_2_0.Args[1]
 22715  		v_0_2_0_0 := v_0_2_0.Args[0]
 22716  		if v_0_2_0_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_0.AuxInt) != 0 {
 22717  			break
 22718  		}
 22719  		v_0_2_0_1 := v_0_2_0.Args[1]
 22720  		if v_0_2_0_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_1.AuxInt) != 4 || x != v_1 {
 22721  			break
 22722  		}
 22723  		mask := v_2
 22724  		v.Reset(ssaop.OpARM64ZSDIVMergingD)
 22725  		v.AddArg3(x, y, mask)
 22726  		return true
 22727  	}
 22728  	// match: (ZSELD (ZSMAXD x y (Select0 <types.TypeMask> (PWHILELTD (MOVDconst [0]) (MOVDconst [4])))) x mask)
 22729  	// result: (ZSMAXMergingD x y mask)
 22730  	for {
 22731  		if v_0.Op != ssaop.OpARM64ZSMAXD {
 22732  			break
 22733  		}
 22734  		_ = v_0.Args[2]
 22735  		v_0_0 := v_0.Args[0]
 22736  		v_0_1 := v_0.Args[1]
 22737  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
 22738  			x := v_0_0
 22739  			y := v_0_1
 22740  			v_0_2 := v_0.Args[2]
 22741  			if v_0_2.Op != ssaop.OpSelect0 || v_0_2.Type != types.TypeMask {
 22742  				continue
 22743  			}
 22744  			v_0_2_0 := v_0_2.Args[0]
 22745  			if v_0_2_0.Op != ssaop.OpARM64PWHILELTD {
 22746  				continue
 22747  			}
 22748  			_ = v_0_2_0.Args[1]
 22749  			v_0_2_0_0 := v_0_2_0.Args[0]
 22750  			if v_0_2_0_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_0.AuxInt) != 0 {
 22751  				continue
 22752  			}
 22753  			v_0_2_0_1 := v_0_2_0.Args[1]
 22754  			if v_0_2_0_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_1.AuxInt) != 4 || x != v_1 {
 22755  				continue
 22756  			}
 22757  			mask := v_2
 22758  			v.Reset(ssaop.OpARM64ZSMAXMergingD)
 22759  			v.AddArg3(x, y, mask)
 22760  			return true
 22761  		}
 22762  		break
 22763  	}
 22764  	// match: (ZSELD (ZSMAXD x y (Select0 <types.TypeMask> (PWHILELTD (MOVDconst [0]) (MOVDconst [4])))) y mask)
 22765  	// result: (ZSMAXMergingD y x mask)
 22766  	for {
 22767  		if v_0.Op != ssaop.OpARM64ZSMAXD {
 22768  			break
 22769  		}
 22770  		_ = v_0.Args[2]
 22771  		v_0_0 := v_0.Args[0]
 22772  		v_0_1 := v_0.Args[1]
 22773  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
 22774  			x := v_0_0
 22775  			y := v_0_1
 22776  			v_0_2 := v_0.Args[2]
 22777  			if v_0_2.Op != ssaop.OpSelect0 || v_0_2.Type != types.TypeMask {
 22778  				continue
 22779  			}
 22780  			v_0_2_0 := v_0_2.Args[0]
 22781  			if v_0_2_0.Op != ssaop.OpARM64PWHILELTD {
 22782  				continue
 22783  			}
 22784  			_ = v_0_2_0.Args[1]
 22785  			v_0_2_0_0 := v_0_2_0.Args[0]
 22786  			if v_0_2_0_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_0.AuxInt) != 0 {
 22787  				continue
 22788  			}
 22789  			v_0_2_0_1 := v_0_2_0.Args[1]
 22790  			if v_0_2_0_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_1.AuxInt) != 4 || y != v_1 {
 22791  				continue
 22792  			}
 22793  			mask := v_2
 22794  			v.Reset(ssaop.OpARM64ZSMAXMergingD)
 22795  			v.AddArg3(y, x, mask)
 22796  			return true
 22797  		}
 22798  		break
 22799  	}
 22800  	// match: (ZSELD (ZSMAXD x y (Select0 <types.TypeMask> (PWHILELTD (MOVDconst [0]) (MOVDconst [4])))) z mask)
 22801  	// result: (ZSMAXMergingPrefixedD z x y mask)
 22802  	for {
 22803  		if v_0.Op != ssaop.OpARM64ZSMAXD {
 22804  			break
 22805  		}
 22806  		_ = v_0.Args[2]
 22807  		x := v_0.Args[0]
 22808  		y := v_0.Args[1]
 22809  		v_0_2 := v_0.Args[2]
 22810  		if v_0_2.Op != ssaop.OpSelect0 || v_0_2.Type != types.TypeMask {
 22811  			break
 22812  		}
 22813  		v_0_2_0 := v_0_2.Args[0]
 22814  		if v_0_2_0.Op != ssaop.OpARM64PWHILELTD {
 22815  			break
 22816  		}
 22817  		_ = v_0_2_0.Args[1]
 22818  		v_0_2_0_0 := v_0_2_0.Args[0]
 22819  		if v_0_2_0_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_0.AuxInt) != 0 {
 22820  			break
 22821  		}
 22822  		v_0_2_0_1 := v_0_2_0.Args[1]
 22823  		if v_0_2_0_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_1.AuxInt) != 4 {
 22824  			break
 22825  		}
 22826  		z := v_1
 22827  		mask := v_2
 22828  		v.Reset(ssaop.OpARM64ZSMAXMergingPrefixedD)
 22829  		v.AddArg4(z, x, y, mask)
 22830  		return true
 22831  	}
 22832  	// match: (ZSELD (ZSMIND x y (Select0 <types.TypeMask> (PWHILELTD (MOVDconst [0]) (MOVDconst [4])))) x mask)
 22833  	// result: (ZSMINMergingD x y mask)
 22834  	for {
 22835  		if v_0.Op != ssaop.OpARM64ZSMIND {
 22836  			break
 22837  		}
 22838  		_ = v_0.Args[2]
 22839  		v_0_0 := v_0.Args[0]
 22840  		v_0_1 := v_0.Args[1]
 22841  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
 22842  			x := v_0_0
 22843  			y := v_0_1
 22844  			v_0_2 := v_0.Args[2]
 22845  			if v_0_2.Op != ssaop.OpSelect0 || v_0_2.Type != types.TypeMask {
 22846  				continue
 22847  			}
 22848  			v_0_2_0 := v_0_2.Args[0]
 22849  			if v_0_2_0.Op != ssaop.OpARM64PWHILELTD {
 22850  				continue
 22851  			}
 22852  			_ = v_0_2_0.Args[1]
 22853  			v_0_2_0_0 := v_0_2_0.Args[0]
 22854  			if v_0_2_0_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_0.AuxInt) != 0 {
 22855  				continue
 22856  			}
 22857  			v_0_2_0_1 := v_0_2_0.Args[1]
 22858  			if v_0_2_0_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_1.AuxInt) != 4 || x != v_1 {
 22859  				continue
 22860  			}
 22861  			mask := v_2
 22862  			v.Reset(ssaop.OpARM64ZSMINMergingD)
 22863  			v.AddArg3(x, y, mask)
 22864  			return true
 22865  		}
 22866  		break
 22867  	}
 22868  	// match: (ZSELD (ZSMIND x y (Select0 <types.TypeMask> (PWHILELTD (MOVDconst [0]) (MOVDconst [4])))) y mask)
 22869  	// result: (ZSMINMergingD y x mask)
 22870  	for {
 22871  		if v_0.Op != ssaop.OpARM64ZSMIND {
 22872  			break
 22873  		}
 22874  		_ = v_0.Args[2]
 22875  		v_0_0 := v_0.Args[0]
 22876  		v_0_1 := v_0.Args[1]
 22877  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
 22878  			x := v_0_0
 22879  			y := v_0_1
 22880  			v_0_2 := v_0.Args[2]
 22881  			if v_0_2.Op != ssaop.OpSelect0 || v_0_2.Type != types.TypeMask {
 22882  				continue
 22883  			}
 22884  			v_0_2_0 := v_0_2.Args[0]
 22885  			if v_0_2_0.Op != ssaop.OpARM64PWHILELTD {
 22886  				continue
 22887  			}
 22888  			_ = v_0_2_0.Args[1]
 22889  			v_0_2_0_0 := v_0_2_0.Args[0]
 22890  			if v_0_2_0_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_0.AuxInt) != 0 {
 22891  				continue
 22892  			}
 22893  			v_0_2_0_1 := v_0_2_0.Args[1]
 22894  			if v_0_2_0_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_1.AuxInt) != 4 || y != v_1 {
 22895  				continue
 22896  			}
 22897  			mask := v_2
 22898  			v.Reset(ssaop.OpARM64ZSMINMergingD)
 22899  			v.AddArg3(y, x, mask)
 22900  			return true
 22901  		}
 22902  		break
 22903  	}
 22904  	// match: (ZSELD (ZSMIND x y (Select0 <types.TypeMask> (PWHILELTD (MOVDconst [0]) (MOVDconst [4])))) z mask)
 22905  	// result: (ZSMINMergingPrefixedD z x y mask)
 22906  	for {
 22907  		if v_0.Op != ssaop.OpARM64ZSMIND {
 22908  			break
 22909  		}
 22910  		_ = v_0.Args[2]
 22911  		x := v_0.Args[0]
 22912  		y := v_0.Args[1]
 22913  		v_0_2 := v_0.Args[2]
 22914  		if v_0_2.Op != ssaop.OpSelect0 || v_0_2.Type != types.TypeMask {
 22915  			break
 22916  		}
 22917  		v_0_2_0 := v_0_2.Args[0]
 22918  		if v_0_2_0.Op != ssaop.OpARM64PWHILELTD {
 22919  			break
 22920  		}
 22921  		_ = v_0_2_0.Args[1]
 22922  		v_0_2_0_0 := v_0_2_0.Args[0]
 22923  		if v_0_2_0_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_0.AuxInt) != 0 {
 22924  			break
 22925  		}
 22926  		v_0_2_0_1 := v_0_2_0.Args[1]
 22927  		if v_0_2_0_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_1.AuxInt) != 4 {
 22928  			break
 22929  		}
 22930  		z := v_1
 22931  		mask := v_2
 22932  		v.Reset(ssaop.OpARM64ZSMINMergingPrefixedD)
 22933  		v.AddArg4(z, x, y, mask)
 22934  		return true
 22935  	}
 22936  	// match: (ZSELD (ZSMULHMergingD x y (Select0 <types.TypeMask> (PWHILELTD (MOVDconst [0]) (MOVDconst [4])))) x mask)
 22937  	// result: (ZSMULHMergingD x y mask)
 22938  	for {
 22939  		if v_0.Op != ssaop.OpARM64ZSMULHMergingD {
 22940  			break
 22941  		}
 22942  		_ = v_0.Args[2]
 22943  		x := v_0.Args[0]
 22944  		y := v_0.Args[1]
 22945  		v_0_2 := v_0.Args[2]
 22946  		if v_0_2.Op != ssaop.OpSelect0 || v_0_2.Type != types.TypeMask {
 22947  			break
 22948  		}
 22949  		v_0_2_0 := v_0_2.Args[0]
 22950  		if v_0_2_0.Op != ssaop.OpARM64PWHILELTD {
 22951  			break
 22952  		}
 22953  		_ = v_0_2_0.Args[1]
 22954  		v_0_2_0_0 := v_0_2_0.Args[0]
 22955  		if v_0_2_0_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_0.AuxInt) != 0 {
 22956  			break
 22957  		}
 22958  		v_0_2_0_1 := v_0_2_0.Args[1]
 22959  		if v_0_2_0_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_1.AuxInt) != 4 || x != v_1 {
 22960  			break
 22961  		}
 22962  		mask := v_2
 22963  		v.Reset(ssaop.OpARM64ZSMULHMergingD)
 22964  		v.AddArg3(x, y, mask)
 22965  		return true
 22966  	}
 22967  	// match: (ZSELD (ZSMULHMergingD x y (Select0 <types.TypeMask> (PWHILELTD (MOVDconst [0]) (MOVDconst [4])))) y mask)
 22968  	// result: (ZSMULHMergingD y x mask)
 22969  	for {
 22970  		if v_0.Op != ssaop.OpARM64ZSMULHMergingD {
 22971  			break
 22972  		}
 22973  		_ = v_0.Args[2]
 22974  		x := v_0.Args[0]
 22975  		y := v_0.Args[1]
 22976  		v_0_2 := v_0.Args[2]
 22977  		if v_0_2.Op != ssaop.OpSelect0 || v_0_2.Type != types.TypeMask {
 22978  			break
 22979  		}
 22980  		v_0_2_0 := v_0_2.Args[0]
 22981  		if v_0_2_0.Op != ssaop.OpARM64PWHILELTD {
 22982  			break
 22983  		}
 22984  		_ = v_0_2_0.Args[1]
 22985  		v_0_2_0_0 := v_0_2_0.Args[0]
 22986  		if v_0_2_0_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_0.AuxInt) != 0 {
 22987  			break
 22988  		}
 22989  		v_0_2_0_1 := v_0_2_0.Args[1]
 22990  		if v_0_2_0_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_1.AuxInt) != 4 || y != v_1 {
 22991  			break
 22992  		}
 22993  		mask := v_2
 22994  		v.Reset(ssaop.OpARM64ZSMULHMergingD)
 22995  		v.AddArg3(y, x, mask)
 22996  		return true
 22997  	}
 22998  	// match: (ZSELD (ZSMULHMergingD x y (Select0 <types.TypeMask> (PWHILELTD (MOVDconst [0]) (MOVDconst [4])))) z mask)
 22999  	// result: (ZSMULHMergingPrefixedD z x y mask)
 23000  	for {
 23001  		if v_0.Op != ssaop.OpARM64ZSMULHMergingD {
 23002  			break
 23003  		}
 23004  		_ = v_0.Args[2]
 23005  		x := v_0.Args[0]
 23006  		y := v_0.Args[1]
 23007  		v_0_2 := v_0.Args[2]
 23008  		if v_0_2.Op != ssaop.OpSelect0 || v_0_2.Type != types.TypeMask {
 23009  			break
 23010  		}
 23011  		v_0_2_0 := v_0_2.Args[0]
 23012  		if v_0_2_0.Op != ssaop.OpARM64PWHILELTD {
 23013  			break
 23014  		}
 23015  		_ = v_0_2_0.Args[1]
 23016  		v_0_2_0_0 := v_0_2_0.Args[0]
 23017  		if v_0_2_0_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_0.AuxInt) != 0 {
 23018  			break
 23019  		}
 23020  		v_0_2_0_1 := v_0_2_0.Args[1]
 23021  		if v_0_2_0_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_1.AuxInt) != 4 {
 23022  			break
 23023  		}
 23024  		z := v_1
 23025  		mask := v_2
 23026  		v.Reset(ssaop.OpARM64ZSMULHMergingPrefixedD)
 23027  		v.AddArg4(z, x, y, mask)
 23028  		return true
 23029  	}
 23030  	// match: (ZSELD (ZSQADDD x y) x mask)
 23031  	// result: (ZSQADDMergingD x y mask)
 23032  	for {
 23033  		if v_0.Op != ssaop.OpARM64ZSQADDD {
 23034  			break
 23035  		}
 23036  		_ = v_0.Args[1]
 23037  		v_0_0 := v_0.Args[0]
 23038  		v_0_1 := v_0.Args[1]
 23039  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
 23040  			x := v_0_0
 23041  			y := v_0_1
 23042  			if x != v_1 {
 23043  				continue
 23044  			}
 23045  			mask := v_2
 23046  			v.Reset(ssaop.OpARM64ZSQADDMergingD)
 23047  			v.AddArg3(x, y, mask)
 23048  			return true
 23049  		}
 23050  		break
 23051  	}
 23052  	// match: (ZSELD (ZSQADDD x y) y mask)
 23053  	// result: (ZSQADDMergingD y x mask)
 23054  	for {
 23055  		if v_0.Op != ssaop.OpARM64ZSQADDD {
 23056  			break
 23057  		}
 23058  		_ = v_0.Args[1]
 23059  		v_0_0 := v_0.Args[0]
 23060  		v_0_1 := v_0.Args[1]
 23061  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
 23062  			x := v_0_0
 23063  			y := v_0_1
 23064  			if y != v_1 {
 23065  				continue
 23066  			}
 23067  			mask := v_2
 23068  			v.Reset(ssaop.OpARM64ZSQADDMergingD)
 23069  			v.AddArg3(y, x, mask)
 23070  			return true
 23071  		}
 23072  		break
 23073  	}
 23074  	// match: (ZSELD (ZSQADDD x y) z mask)
 23075  	// result: (ZSQADDMergingPrefixedD z x y mask)
 23076  	for {
 23077  		if v_0.Op != ssaop.OpARM64ZSQADDD {
 23078  			break
 23079  		}
 23080  		y := v_0.Args[1]
 23081  		x := v_0.Args[0]
 23082  		z := v_1
 23083  		mask := v_2
 23084  		v.Reset(ssaop.OpARM64ZSQADDMergingPrefixedD)
 23085  		v.AddArg4(z, x, y, mask)
 23086  		return true
 23087  	}
 23088  	// match: (ZSELD (ZSQSUBD x y) x mask)
 23089  	// result: (ZSQSUBMergingD x y mask)
 23090  	for {
 23091  		if v_0.Op != ssaop.OpARM64ZSQSUBD {
 23092  			break
 23093  		}
 23094  		y := v_0.Args[1]
 23095  		x := v_0.Args[0]
 23096  		if x != v_1 {
 23097  			break
 23098  		}
 23099  		mask := v_2
 23100  		v.Reset(ssaop.OpARM64ZSQSUBMergingD)
 23101  		v.AddArg3(x, y, mask)
 23102  		return true
 23103  	}
 23104  	// match: (ZSELD (ZSUBD x y) x mask)
 23105  	// result: (ZSUBMergingD x y mask)
 23106  	for {
 23107  		if v_0.Op != ssaop.OpARM64ZSUBD {
 23108  			break
 23109  		}
 23110  		y := v_0.Args[1]
 23111  		x := v_0.Args[0]
 23112  		if x != v_1 {
 23113  			break
 23114  		}
 23115  		mask := v_2
 23116  		v.Reset(ssaop.OpARM64ZSUBMergingD)
 23117  		v.AddArg3(x, y, mask)
 23118  		return true
 23119  	}
 23120  	// match: (ZSELD (ZUDIVD x y (Select0 <types.TypeMask> (PWHILELTD (MOVDconst [0]) (MOVDconst [4])))) x mask)
 23121  	// result: (ZUDIVMergingD x y mask)
 23122  	for {
 23123  		if v_0.Op != ssaop.OpARM64ZUDIVD {
 23124  			break
 23125  		}
 23126  		_ = v_0.Args[2]
 23127  		x := v_0.Args[0]
 23128  		y := v_0.Args[1]
 23129  		v_0_2 := v_0.Args[2]
 23130  		if v_0_2.Op != ssaop.OpSelect0 || v_0_2.Type != types.TypeMask {
 23131  			break
 23132  		}
 23133  		v_0_2_0 := v_0_2.Args[0]
 23134  		if v_0_2_0.Op != ssaop.OpARM64PWHILELTD {
 23135  			break
 23136  		}
 23137  		_ = v_0_2_0.Args[1]
 23138  		v_0_2_0_0 := v_0_2_0.Args[0]
 23139  		if v_0_2_0_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_0.AuxInt) != 0 {
 23140  			break
 23141  		}
 23142  		v_0_2_0_1 := v_0_2_0.Args[1]
 23143  		if v_0_2_0_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_1.AuxInt) != 4 || x != v_1 {
 23144  			break
 23145  		}
 23146  		mask := v_2
 23147  		v.Reset(ssaop.OpARM64ZUDIVMergingD)
 23148  		v.AddArg3(x, y, mask)
 23149  		return true
 23150  	}
 23151  	// match: (ZSELD (ZUMAXD x y (Select0 <types.TypeMask> (PWHILELTD (MOVDconst [0]) (MOVDconst [4])))) x mask)
 23152  	// result: (ZUMAXMergingD x y mask)
 23153  	for {
 23154  		if v_0.Op != ssaop.OpARM64ZUMAXD {
 23155  			break
 23156  		}
 23157  		_ = v_0.Args[2]
 23158  		v_0_0 := v_0.Args[0]
 23159  		v_0_1 := v_0.Args[1]
 23160  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
 23161  			x := v_0_0
 23162  			y := v_0_1
 23163  			v_0_2 := v_0.Args[2]
 23164  			if v_0_2.Op != ssaop.OpSelect0 || v_0_2.Type != types.TypeMask {
 23165  				continue
 23166  			}
 23167  			v_0_2_0 := v_0_2.Args[0]
 23168  			if v_0_2_0.Op != ssaop.OpARM64PWHILELTD {
 23169  				continue
 23170  			}
 23171  			_ = v_0_2_0.Args[1]
 23172  			v_0_2_0_0 := v_0_2_0.Args[0]
 23173  			if v_0_2_0_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_0.AuxInt) != 0 {
 23174  				continue
 23175  			}
 23176  			v_0_2_0_1 := v_0_2_0.Args[1]
 23177  			if v_0_2_0_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_1.AuxInt) != 4 || x != v_1 {
 23178  				continue
 23179  			}
 23180  			mask := v_2
 23181  			v.Reset(ssaop.OpARM64ZUMAXMergingD)
 23182  			v.AddArg3(x, y, mask)
 23183  			return true
 23184  		}
 23185  		break
 23186  	}
 23187  	// match: (ZSELD (ZUMAXD x y (Select0 <types.TypeMask> (PWHILELTD (MOVDconst [0]) (MOVDconst [4])))) y mask)
 23188  	// result: (ZUMAXMergingD y x mask)
 23189  	for {
 23190  		if v_0.Op != ssaop.OpARM64ZUMAXD {
 23191  			break
 23192  		}
 23193  		_ = v_0.Args[2]
 23194  		v_0_0 := v_0.Args[0]
 23195  		v_0_1 := v_0.Args[1]
 23196  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
 23197  			x := v_0_0
 23198  			y := v_0_1
 23199  			v_0_2 := v_0.Args[2]
 23200  			if v_0_2.Op != ssaop.OpSelect0 || v_0_2.Type != types.TypeMask {
 23201  				continue
 23202  			}
 23203  			v_0_2_0 := v_0_2.Args[0]
 23204  			if v_0_2_0.Op != ssaop.OpARM64PWHILELTD {
 23205  				continue
 23206  			}
 23207  			_ = v_0_2_0.Args[1]
 23208  			v_0_2_0_0 := v_0_2_0.Args[0]
 23209  			if v_0_2_0_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_0.AuxInt) != 0 {
 23210  				continue
 23211  			}
 23212  			v_0_2_0_1 := v_0_2_0.Args[1]
 23213  			if v_0_2_0_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_1.AuxInt) != 4 || y != v_1 {
 23214  				continue
 23215  			}
 23216  			mask := v_2
 23217  			v.Reset(ssaop.OpARM64ZUMAXMergingD)
 23218  			v.AddArg3(y, x, mask)
 23219  			return true
 23220  		}
 23221  		break
 23222  	}
 23223  	// match: (ZSELD (ZUMAXD x y (Select0 <types.TypeMask> (PWHILELTD (MOVDconst [0]) (MOVDconst [4])))) z mask)
 23224  	// result: (ZUMAXMergingPrefixedD z x y mask)
 23225  	for {
 23226  		if v_0.Op != ssaop.OpARM64ZUMAXD {
 23227  			break
 23228  		}
 23229  		_ = v_0.Args[2]
 23230  		x := v_0.Args[0]
 23231  		y := v_0.Args[1]
 23232  		v_0_2 := v_0.Args[2]
 23233  		if v_0_2.Op != ssaop.OpSelect0 || v_0_2.Type != types.TypeMask {
 23234  			break
 23235  		}
 23236  		v_0_2_0 := v_0_2.Args[0]
 23237  		if v_0_2_0.Op != ssaop.OpARM64PWHILELTD {
 23238  			break
 23239  		}
 23240  		_ = v_0_2_0.Args[1]
 23241  		v_0_2_0_0 := v_0_2_0.Args[0]
 23242  		if v_0_2_0_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_0.AuxInt) != 0 {
 23243  			break
 23244  		}
 23245  		v_0_2_0_1 := v_0_2_0.Args[1]
 23246  		if v_0_2_0_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_1.AuxInt) != 4 {
 23247  			break
 23248  		}
 23249  		z := v_1
 23250  		mask := v_2
 23251  		v.Reset(ssaop.OpARM64ZUMAXMergingPrefixedD)
 23252  		v.AddArg4(z, x, y, mask)
 23253  		return true
 23254  	}
 23255  	// match: (ZSELD (ZUMIND x y (Select0 <types.TypeMask> (PWHILELTD (MOVDconst [0]) (MOVDconst [4])))) x mask)
 23256  	// result: (ZUMINMergingD x y mask)
 23257  	for {
 23258  		if v_0.Op != ssaop.OpARM64ZUMIND {
 23259  			break
 23260  		}
 23261  		_ = v_0.Args[2]
 23262  		v_0_0 := v_0.Args[0]
 23263  		v_0_1 := v_0.Args[1]
 23264  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
 23265  			x := v_0_0
 23266  			y := v_0_1
 23267  			v_0_2 := v_0.Args[2]
 23268  			if v_0_2.Op != ssaop.OpSelect0 || v_0_2.Type != types.TypeMask {
 23269  				continue
 23270  			}
 23271  			v_0_2_0 := v_0_2.Args[0]
 23272  			if v_0_2_0.Op != ssaop.OpARM64PWHILELTD {
 23273  				continue
 23274  			}
 23275  			_ = v_0_2_0.Args[1]
 23276  			v_0_2_0_0 := v_0_2_0.Args[0]
 23277  			if v_0_2_0_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_0.AuxInt) != 0 {
 23278  				continue
 23279  			}
 23280  			v_0_2_0_1 := v_0_2_0.Args[1]
 23281  			if v_0_2_0_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_1.AuxInt) != 4 || x != v_1 {
 23282  				continue
 23283  			}
 23284  			mask := v_2
 23285  			v.Reset(ssaop.OpARM64ZUMINMergingD)
 23286  			v.AddArg3(x, y, mask)
 23287  			return true
 23288  		}
 23289  		break
 23290  	}
 23291  	// match: (ZSELD (ZUMIND x y (Select0 <types.TypeMask> (PWHILELTD (MOVDconst [0]) (MOVDconst [4])))) y mask)
 23292  	// result: (ZUMINMergingD y x mask)
 23293  	for {
 23294  		if v_0.Op != ssaop.OpARM64ZUMIND {
 23295  			break
 23296  		}
 23297  		_ = v_0.Args[2]
 23298  		v_0_0 := v_0.Args[0]
 23299  		v_0_1 := v_0.Args[1]
 23300  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
 23301  			x := v_0_0
 23302  			y := v_0_1
 23303  			v_0_2 := v_0.Args[2]
 23304  			if v_0_2.Op != ssaop.OpSelect0 || v_0_2.Type != types.TypeMask {
 23305  				continue
 23306  			}
 23307  			v_0_2_0 := v_0_2.Args[0]
 23308  			if v_0_2_0.Op != ssaop.OpARM64PWHILELTD {
 23309  				continue
 23310  			}
 23311  			_ = v_0_2_0.Args[1]
 23312  			v_0_2_0_0 := v_0_2_0.Args[0]
 23313  			if v_0_2_0_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_0.AuxInt) != 0 {
 23314  				continue
 23315  			}
 23316  			v_0_2_0_1 := v_0_2_0.Args[1]
 23317  			if v_0_2_0_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_1.AuxInt) != 4 || y != v_1 {
 23318  				continue
 23319  			}
 23320  			mask := v_2
 23321  			v.Reset(ssaop.OpARM64ZUMINMergingD)
 23322  			v.AddArg3(y, x, mask)
 23323  			return true
 23324  		}
 23325  		break
 23326  	}
 23327  	// match: (ZSELD (ZUMIND x y (Select0 <types.TypeMask> (PWHILELTD (MOVDconst [0]) (MOVDconst [4])))) z mask)
 23328  	// result: (ZUMINMergingPrefixedD z x y mask)
 23329  	for {
 23330  		if v_0.Op != ssaop.OpARM64ZUMIND {
 23331  			break
 23332  		}
 23333  		_ = v_0.Args[2]
 23334  		x := v_0.Args[0]
 23335  		y := v_0.Args[1]
 23336  		v_0_2 := v_0.Args[2]
 23337  		if v_0_2.Op != ssaop.OpSelect0 || v_0_2.Type != types.TypeMask {
 23338  			break
 23339  		}
 23340  		v_0_2_0 := v_0_2.Args[0]
 23341  		if v_0_2_0.Op != ssaop.OpARM64PWHILELTD {
 23342  			break
 23343  		}
 23344  		_ = v_0_2_0.Args[1]
 23345  		v_0_2_0_0 := v_0_2_0.Args[0]
 23346  		if v_0_2_0_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_0.AuxInt) != 0 {
 23347  			break
 23348  		}
 23349  		v_0_2_0_1 := v_0_2_0.Args[1]
 23350  		if v_0_2_0_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_1.AuxInt) != 4 {
 23351  			break
 23352  		}
 23353  		z := v_1
 23354  		mask := v_2
 23355  		v.Reset(ssaop.OpARM64ZUMINMergingPrefixedD)
 23356  		v.AddArg4(z, x, y, mask)
 23357  		return true
 23358  	}
 23359  	// match: (ZSELD (ZUMULHMergingD x y (Select0 <types.TypeMask> (PWHILELTD (MOVDconst [0]) (MOVDconst [4])))) x mask)
 23360  	// result: (ZUMULHMergingD x y mask)
 23361  	for {
 23362  		if v_0.Op != ssaop.OpARM64ZUMULHMergingD {
 23363  			break
 23364  		}
 23365  		_ = v_0.Args[2]
 23366  		x := v_0.Args[0]
 23367  		y := v_0.Args[1]
 23368  		v_0_2 := v_0.Args[2]
 23369  		if v_0_2.Op != ssaop.OpSelect0 || v_0_2.Type != types.TypeMask {
 23370  			break
 23371  		}
 23372  		v_0_2_0 := v_0_2.Args[0]
 23373  		if v_0_2_0.Op != ssaop.OpARM64PWHILELTD {
 23374  			break
 23375  		}
 23376  		_ = v_0_2_0.Args[1]
 23377  		v_0_2_0_0 := v_0_2_0.Args[0]
 23378  		if v_0_2_0_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_0.AuxInt) != 0 {
 23379  			break
 23380  		}
 23381  		v_0_2_0_1 := v_0_2_0.Args[1]
 23382  		if v_0_2_0_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_1.AuxInt) != 4 || x != v_1 {
 23383  			break
 23384  		}
 23385  		mask := v_2
 23386  		v.Reset(ssaop.OpARM64ZUMULHMergingD)
 23387  		v.AddArg3(x, y, mask)
 23388  		return true
 23389  	}
 23390  	// match: (ZSELD (ZUMULHMergingD x y (Select0 <types.TypeMask> (PWHILELTD (MOVDconst [0]) (MOVDconst [4])))) y mask)
 23391  	// result: (ZUMULHMergingD y x mask)
 23392  	for {
 23393  		if v_0.Op != ssaop.OpARM64ZUMULHMergingD {
 23394  			break
 23395  		}
 23396  		_ = v_0.Args[2]
 23397  		x := v_0.Args[0]
 23398  		y := v_0.Args[1]
 23399  		v_0_2 := v_0.Args[2]
 23400  		if v_0_2.Op != ssaop.OpSelect0 || v_0_2.Type != types.TypeMask {
 23401  			break
 23402  		}
 23403  		v_0_2_0 := v_0_2.Args[0]
 23404  		if v_0_2_0.Op != ssaop.OpARM64PWHILELTD {
 23405  			break
 23406  		}
 23407  		_ = v_0_2_0.Args[1]
 23408  		v_0_2_0_0 := v_0_2_0.Args[0]
 23409  		if v_0_2_0_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_0.AuxInt) != 0 {
 23410  			break
 23411  		}
 23412  		v_0_2_0_1 := v_0_2_0.Args[1]
 23413  		if v_0_2_0_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_1.AuxInt) != 4 || y != v_1 {
 23414  			break
 23415  		}
 23416  		mask := v_2
 23417  		v.Reset(ssaop.OpARM64ZUMULHMergingD)
 23418  		v.AddArg3(y, x, mask)
 23419  		return true
 23420  	}
 23421  	// match: (ZSELD (ZUMULHMergingD x y (Select0 <types.TypeMask> (PWHILELTD (MOVDconst [0]) (MOVDconst [4])))) z mask)
 23422  	// result: (ZUMULHMergingPrefixedD z x y mask)
 23423  	for {
 23424  		if v_0.Op != ssaop.OpARM64ZUMULHMergingD {
 23425  			break
 23426  		}
 23427  		_ = v_0.Args[2]
 23428  		x := v_0.Args[0]
 23429  		y := v_0.Args[1]
 23430  		v_0_2 := v_0.Args[2]
 23431  		if v_0_2.Op != ssaop.OpSelect0 || v_0_2.Type != types.TypeMask {
 23432  			break
 23433  		}
 23434  		v_0_2_0 := v_0_2.Args[0]
 23435  		if v_0_2_0.Op != ssaop.OpARM64PWHILELTD {
 23436  			break
 23437  		}
 23438  		_ = v_0_2_0.Args[1]
 23439  		v_0_2_0_0 := v_0_2_0.Args[0]
 23440  		if v_0_2_0_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_0.AuxInt) != 0 {
 23441  			break
 23442  		}
 23443  		v_0_2_0_1 := v_0_2_0.Args[1]
 23444  		if v_0_2_0_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_1.AuxInt) != 4 {
 23445  			break
 23446  		}
 23447  		z := v_1
 23448  		mask := v_2
 23449  		v.Reset(ssaop.OpARM64ZUMULHMergingPrefixedD)
 23450  		v.AddArg4(z, x, y, mask)
 23451  		return true
 23452  	}
 23453  	// match: (ZSELD (ZUQADDD x y) x mask)
 23454  	// result: (ZUQADDMergingD x y mask)
 23455  	for {
 23456  		if v_0.Op != ssaop.OpARM64ZUQADDD {
 23457  			break
 23458  		}
 23459  		_ = v_0.Args[1]
 23460  		v_0_0 := v_0.Args[0]
 23461  		v_0_1 := v_0.Args[1]
 23462  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
 23463  			x := v_0_0
 23464  			y := v_0_1
 23465  			if x != v_1 {
 23466  				continue
 23467  			}
 23468  			mask := v_2
 23469  			v.Reset(ssaop.OpARM64ZUQADDMergingD)
 23470  			v.AddArg3(x, y, mask)
 23471  			return true
 23472  		}
 23473  		break
 23474  	}
 23475  	// match: (ZSELD (ZUQADDD x y) y mask)
 23476  	// result: (ZUQADDMergingD y x mask)
 23477  	for {
 23478  		if v_0.Op != ssaop.OpARM64ZUQADDD {
 23479  			break
 23480  		}
 23481  		_ = v_0.Args[1]
 23482  		v_0_0 := v_0.Args[0]
 23483  		v_0_1 := v_0.Args[1]
 23484  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
 23485  			x := v_0_0
 23486  			y := v_0_1
 23487  			if y != v_1 {
 23488  				continue
 23489  			}
 23490  			mask := v_2
 23491  			v.Reset(ssaop.OpARM64ZUQADDMergingD)
 23492  			v.AddArg3(y, x, mask)
 23493  			return true
 23494  		}
 23495  		break
 23496  	}
 23497  	// match: (ZSELD (ZUQADDD x y) z mask)
 23498  	// result: (ZUQADDMergingPrefixedD z x y mask)
 23499  	for {
 23500  		if v_0.Op != ssaop.OpARM64ZUQADDD {
 23501  			break
 23502  		}
 23503  		y := v_0.Args[1]
 23504  		x := v_0.Args[0]
 23505  		z := v_1
 23506  		mask := v_2
 23507  		v.Reset(ssaop.OpARM64ZUQADDMergingPrefixedD)
 23508  		v.AddArg4(z, x, y, mask)
 23509  		return true
 23510  	}
 23511  	// match: (ZSELD (ZUQSUBD x y) x mask)
 23512  	// result: (ZUQSUBMergingD x y mask)
 23513  	for {
 23514  		if v_0.Op != ssaop.OpARM64ZUQSUBD {
 23515  			break
 23516  		}
 23517  		y := v_0.Args[1]
 23518  		x := v_0.Args[0]
 23519  		if x != v_1 {
 23520  			break
 23521  		}
 23522  		mask := v_2
 23523  		v.Reset(ssaop.OpARM64ZUQSUBMergingD)
 23524  		v.AddArg3(x, y, mask)
 23525  		return true
 23526  	}
 23527  	return false
 23528  }
 23529  func rewriteValue_OpARM64ZSELH(v *ssa.Value) bool {
 23530  	v_2 := v.Args[2]
 23531  	v_1 := v.Args[1]
 23532  	v_0 := v.Args[0]
 23533  	// match: (ZSELH (ZDUPH x) z mask)
 23534  	// result: (ZCPYMergingH z x mask)
 23535  	for {
 23536  		if v_0.Op != ssaop.OpARM64ZDUPH {
 23537  			break
 23538  		}
 23539  		x := v_0.Args[0]
 23540  		z := v_1
 23541  		mask := v_2
 23542  		v.Reset(ssaop.OpARM64ZCPYMergingH)
 23543  		v.AddArg3(z, x, mask)
 23544  		return true
 23545  	}
 23546  	// match: (ZSELH (ZDUPIH [0] x) z mask)
 23547  	// result: (ZCPYIMergingH z x mask)
 23548  	for {
 23549  		if v_0.Op != ssaop.OpARM64ZDUPIH || ssa.AuxIntToUint8(v_0.AuxInt) != 0 {
 23550  			break
 23551  		}
 23552  		x := v_0.Args[0]
 23553  		z := v_1
 23554  		mask := v_2
 23555  		v.Reset(ssaop.OpARM64ZCPYIMergingH)
 23556  		v.AddArg3(z, x, mask)
 23557  		return true
 23558  	}
 23559  	// match: (ZSELH (ZDUPHconst [c]) z mask)
 23560  	// result: (ZCPYMergingHconst [c] z mask)
 23561  	for {
 23562  		if v_0.Op != ssaop.OpARM64ZDUPHconst {
 23563  			break
 23564  		}
 23565  		c := ssa.AuxIntToInt8(v_0.AuxInt)
 23566  		z := v_1
 23567  		mask := v_2
 23568  		v.Reset(ssaop.OpARM64ZCPYMergingHconst)
 23569  		v.AuxInt = ssa.Int8ToAuxInt(c)
 23570  		v.AddArg2(z, mask)
 23571  		return true
 23572  	}
 23573  	// match: (ZSELH (ZABSH x (Select0 <types.TypeMask> (PWHILELTH (MOVDconst [0]) (MOVDconst [16])))) z mask)
 23574  	// result: (ZABSMergingH z x mask)
 23575  	for {
 23576  		if v_0.Op != ssaop.OpARM64ZABSH {
 23577  			break
 23578  		}
 23579  		_ = v_0.Args[1]
 23580  		x := v_0.Args[0]
 23581  		v_0_1 := v_0.Args[1]
 23582  		if v_0_1.Op != ssaop.OpSelect0 || v_0_1.Type != types.TypeMask {
 23583  			break
 23584  		}
 23585  		v_0_1_0 := v_0_1.Args[0]
 23586  		if v_0_1_0.Op != ssaop.OpARM64PWHILELTH {
 23587  			break
 23588  		}
 23589  		_ = v_0_1_0.Args[1]
 23590  		v_0_1_0_0 := v_0_1_0.Args[0]
 23591  		if v_0_1_0_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_1_0_0.AuxInt) != 0 {
 23592  			break
 23593  		}
 23594  		v_0_1_0_1 := v_0_1_0.Args[1]
 23595  		if v_0_1_0_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_1_0_1.AuxInt) != 16 {
 23596  			break
 23597  		}
 23598  		z := v_1
 23599  		mask := v_2
 23600  		v.Reset(ssaop.OpARM64ZABSMergingH)
 23601  		v.AddArg3(z, x, mask)
 23602  		return true
 23603  	}
 23604  	// match: (ZSELH (ZADDH x y) x mask)
 23605  	// result: (ZADDMergingH x y mask)
 23606  	for {
 23607  		if v_0.Op != ssaop.OpARM64ZADDH {
 23608  			break
 23609  		}
 23610  		_ = v_0.Args[1]
 23611  		v_0_0 := v_0.Args[0]
 23612  		v_0_1 := v_0.Args[1]
 23613  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
 23614  			x := v_0_0
 23615  			y := v_0_1
 23616  			if x != v_1 {
 23617  				continue
 23618  			}
 23619  			mask := v_2
 23620  			v.Reset(ssaop.OpARM64ZADDMergingH)
 23621  			v.AddArg3(x, y, mask)
 23622  			return true
 23623  		}
 23624  		break
 23625  	}
 23626  	// match: (ZSELH (ZADDH x y) y mask)
 23627  	// result: (ZADDMergingH y x mask)
 23628  	for {
 23629  		if v_0.Op != ssaop.OpARM64ZADDH {
 23630  			break
 23631  		}
 23632  		_ = v_0.Args[1]
 23633  		v_0_0 := v_0.Args[0]
 23634  		v_0_1 := v_0.Args[1]
 23635  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
 23636  			x := v_0_0
 23637  			y := v_0_1
 23638  			if y != v_1 {
 23639  				continue
 23640  			}
 23641  			mask := v_2
 23642  			v.Reset(ssaop.OpARM64ZADDMergingH)
 23643  			v.AddArg3(y, x, mask)
 23644  			return true
 23645  		}
 23646  		break
 23647  	}
 23648  	// match: (ZSELH (ZADDH x y) z mask)
 23649  	// result: (ZADDMergingPrefixedH z x y mask)
 23650  	for {
 23651  		if v_0.Op != ssaop.OpARM64ZADDH {
 23652  			break
 23653  		}
 23654  		y := v_0.Args[1]
 23655  		x := v_0.Args[0]
 23656  		z := v_1
 23657  		mask := v_2
 23658  		v.Reset(ssaop.OpARM64ZADDMergingPrefixedH)
 23659  		v.AddArg4(z, x, y, mask)
 23660  		return true
 23661  	}
 23662  	// match: (ZSELH (ZANDD x y) x mask)
 23663  	// result: (ZANDMergingH x y mask)
 23664  	for {
 23665  		if v_0.Op != ssaop.OpARM64ZANDD {
 23666  			break
 23667  		}
 23668  		_ = v_0.Args[1]
 23669  		v_0_0 := v_0.Args[0]
 23670  		v_0_1 := v_0.Args[1]
 23671  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
 23672  			x := v_0_0
 23673  			y := v_0_1
 23674  			if x != v_1 {
 23675  				continue
 23676  			}
 23677  			mask := v_2
 23678  			v.Reset(ssaop.OpARM64ZANDMergingH)
 23679  			v.AddArg3(x, y, mask)
 23680  			return true
 23681  		}
 23682  		break
 23683  	}
 23684  	// match: (ZSELH (ZANDD x y) y mask)
 23685  	// result: (ZANDMergingH y x mask)
 23686  	for {
 23687  		if v_0.Op != ssaop.OpARM64ZANDD {
 23688  			break
 23689  		}
 23690  		_ = v_0.Args[1]
 23691  		v_0_0 := v_0.Args[0]
 23692  		v_0_1 := v_0.Args[1]
 23693  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
 23694  			x := v_0_0
 23695  			y := v_0_1
 23696  			if y != v_1 {
 23697  				continue
 23698  			}
 23699  			mask := v_2
 23700  			v.Reset(ssaop.OpARM64ZANDMergingH)
 23701  			v.AddArg3(y, x, mask)
 23702  			return true
 23703  		}
 23704  		break
 23705  	}
 23706  	// match: (ZSELH (ZANDD x y) z mask)
 23707  	// result: (ZANDMergingPrefixedH z x y mask)
 23708  	for {
 23709  		if v_0.Op != ssaop.OpARM64ZANDD {
 23710  			break
 23711  		}
 23712  		y := v_0.Args[1]
 23713  		x := v_0.Args[0]
 23714  		z := v_1
 23715  		mask := v_2
 23716  		v.Reset(ssaop.OpARM64ZANDMergingPrefixedH)
 23717  		v.AddArg4(z, x, y, mask)
 23718  		return true
 23719  	}
 23720  	// match: (ZSELH (ZBICD x y) x mask)
 23721  	// result: (ZBICMergingH x y mask)
 23722  	for {
 23723  		if v_0.Op != ssaop.OpARM64ZBICD {
 23724  			break
 23725  		}
 23726  		y := v_0.Args[1]
 23727  		x := v_0.Args[0]
 23728  		if x != v_1 {
 23729  			break
 23730  		}
 23731  		mask := v_2
 23732  		v.Reset(ssaop.OpARM64ZBICMergingH)
 23733  		v.AddArg3(x, y, mask)
 23734  		return true
 23735  	}
 23736  	// match: (ZSELH (ZEORD x y) x mask)
 23737  	// result: (ZEORMergingH x y mask)
 23738  	for {
 23739  		if v_0.Op != ssaop.OpARM64ZEORD {
 23740  			break
 23741  		}
 23742  		_ = v_0.Args[1]
 23743  		v_0_0 := v_0.Args[0]
 23744  		v_0_1 := v_0.Args[1]
 23745  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
 23746  			x := v_0_0
 23747  			y := v_0_1
 23748  			if x != v_1 {
 23749  				continue
 23750  			}
 23751  			mask := v_2
 23752  			v.Reset(ssaop.OpARM64ZEORMergingH)
 23753  			v.AddArg3(x, y, mask)
 23754  			return true
 23755  		}
 23756  		break
 23757  	}
 23758  	// match: (ZSELH (ZEORD x y) y mask)
 23759  	// result: (ZEORMergingH y x mask)
 23760  	for {
 23761  		if v_0.Op != ssaop.OpARM64ZEORD {
 23762  			break
 23763  		}
 23764  		_ = v_0.Args[1]
 23765  		v_0_0 := v_0.Args[0]
 23766  		v_0_1 := v_0.Args[1]
 23767  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
 23768  			x := v_0_0
 23769  			y := v_0_1
 23770  			if y != v_1 {
 23771  				continue
 23772  			}
 23773  			mask := v_2
 23774  			v.Reset(ssaop.OpARM64ZEORMergingH)
 23775  			v.AddArg3(y, x, mask)
 23776  			return true
 23777  		}
 23778  		break
 23779  	}
 23780  	// match: (ZSELH (ZEORD x y) z mask)
 23781  	// result: (ZEORMergingPrefixedH z x y mask)
 23782  	for {
 23783  		if v_0.Op != ssaop.OpARM64ZEORD {
 23784  			break
 23785  		}
 23786  		y := v_0.Args[1]
 23787  		x := v_0.Args[0]
 23788  		z := v_1
 23789  		mask := v_2
 23790  		v.Reset(ssaop.OpARM64ZEORMergingPrefixedH)
 23791  		v.AddArg4(z, x, y, mask)
 23792  		return true
 23793  	}
 23794  	// match: (ZSELH (ZMLAH x y z (Select0 <types.TypeMask> (PWHILELTH (MOVDconst [0]) (MOVDconst [16])))) x mask)
 23795  	// result: (ZMLAMergingH x y z mask)
 23796  	for {
 23797  		if v_0.Op != ssaop.OpARM64ZMLAH {
 23798  			break
 23799  		}
 23800  		_ = v_0.Args[3]
 23801  		x := v_0.Args[0]
 23802  		y := v_0.Args[1]
 23803  		z := v_0.Args[2]
 23804  		v_0_3 := v_0.Args[3]
 23805  		if v_0_3.Op != ssaop.OpSelect0 || v_0_3.Type != types.TypeMask {
 23806  			break
 23807  		}
 23808  		v_0_3_0 := v_0_3.Args[0]
 23809  		if v_0_3_0.Op != ssaop.OpARM64PWHILELTH {
 23810  			break
 23811  		}
 23812  		_ = v_0_3_0.Args[1]
 23813  		v_0_3_0_0 := v_0_3_0.Args[0]
 23814  		if v_0_3_0_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_3_0_0.AuxInt) != 0 {
 23815  			break
 23816  		}
 23817  		v_0_3_0_1 := v_0_3_0.Args[1]
 23818  		if v_0_3_0_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_3_0_1.AuxInt) != 16 || x != v_1 {
 23819  			break
 23820  		}
 23821  		mask := v_2
 23822  		v.Reset(ssaop.OpARM64ZMLAMergingH)
 23823  		v.AddArg4(x, y, z, mask)
 23824  		return true
 23825  	}
 23826  	// match: (ZSELH (ZMULMergingH x y (Select0 <types.TypeMask> (PWHILELTH (MOVDconst [0]) (MOVDconst [16])))) x mask)
 23827  	// result: (ZMULMergingH x y mask)
 23828  	for {
 23829  		if v_0.Op != ssaop.OpARM64ZMULMergingH {
 23830  			break
 23831  		}
 23832  		_ = v_0.Args[2]
 23833  		x := v_0.Args[0]
 23834  		y := v_0.Args[1]
 23835  		v_0_2 := v_0.Args[2]
 23836  		if v_0_2.Op != ssaop.OpSelect0 || v_0_2.Type != types.TypeMask {
 23837  			break
 23838  		}
 23839  		v_0_2_0 := v_0_2.Args[0]
 23840  		if v_0_2_0.Op != ssaop.OpARM64PWHILELTH {
 23841  			break
 23842  		}
 23843  		_ = v_0_2_0.Args[1]
 23844  		v_0_2_0_0 := v_0_2_0.Args[0]
 23845  		if v_0_2_0_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_0.AuxInt) != 0 {
 23846  			break
 23847  		}
 23848  		v_0_2_0_1 := v_0_2_0.Args[1]
 23849  		if v_0_2_0_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_1.AuxInt) != 16 || x != v_1 {
 23850  			break
 23851  		}
 23852  		mask := v_2
 23853  		v.Reset(ssaop.OpARM64ZMULMergingH)
 23854  		v.AddArg3(x, y, mask)
 23855  		return true
 23856  	}
 23857  	// match: (ZSELH (ZMULMergingH x y (Select0 <types.TypeMask> (PWHILELTH (MOVDconst [0]) (MOVDconst [16])))) y mask)
 23858  	// result: (ZMULMergingH y x mask)
 23859  	for {
 23860  		if v_0.Op != ssaop.OpARM64ZMULMergingH {
 23861  			break
 23862  		}
 23863  		_ = v_0.Args[2]
 23864  		x := v_0.Args[0]
 23865  		y := v_0.Args[1]
 23866  		v_0_2 := v_0.Args[2]
 23867  		if v_0_2.Op != ssaop.OpSelect0 || v_0_2.Type != types.TypeMask {
 23868  			break
 23869  		}
 23870  		v_0_2_0 := v_0_2.Args[0]
 23871  		if v_0_2_0.Op != ssaop.OpARM64PWHILELTH {
 23872  			break
 23873  		}
 23874  		_ = v_0_2_0.Args[1]
 23875  		v_0_2_0_0 := v_0_2_0.Args[0]
 23876  		if v_0_2_0_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_0.AuxInt) != 0 {
 23877  			break
 23878  		}
 23879  		v_0_2_0_1 := v_0_2_0.Args[1]
 23880  		if v_0_2_0_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_1.AuxInt) != 16 || y != v_1 {
 23881  			break
 23882  		}
 23883  		mask := v_2
 23884  		v.Reset(ssaop.OpARM64ZMULMergingH)
 23885  		v.AddArg3(y, x, mask)
 23886  		return true
 23887  	}
 23888  	// match: (ZSELH (ZMULMergingH x y (Select0 <types.TypeMask> (PWHILELTH (MOVDconst [0]) (MOVDconst [16])))) z mask)
 23889  	// result: (ZMULMergingPrefixedH z x y mask)
 23890  	for {
 23891  		if v_0.Op != ssaop.OpARM64ZMULMergingH {
 23892  			break
 23893  		}
 23894  		_ = v_0.Args[2]
 23895  		x := v_0.Args[0]
 23896  		y := v_0.Args[1]
 23897  		v_0_2 := v_0.Args[2]
 23898  		if v_0_2.Op != ssaop.OpSelect0 || v_0_2.Type != types.TypeMask {
 23899  			break
 23900  		}
 23901  		v_0_2_0 := v_0_2.Args[0]
 23902  		if v_0_2_0.Op != ssaop.OpARM64PWHILELTH {
 23903  			break
 23904  		}
 23905  		_ = v_0_2_0.Args[1]
 23906  		v_0_2_0_0 := v_0_2_0.Args[0]
 23907  		if v_0_2_0_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_0.AuxInt) != 0 {
 23908  			break
 23909  		}
 23910  		v_0_2_0_1 := v_0_2_0.Args[1]
 23911  		if v_0_2_0_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_1.AuxInt) != 16 {
 23912  			break
 23913  		}
 23914  		z := v_1
 23915  		mask := v_2
 23916  		v.Reset(ssaop.OpARM64ZMULMergingPrefixedH)
 23917  		v.AddArg4(z, x, y, mask)
 23918  		return true
 23919  	}
 23920  	// match: (ZSELH (ZNEGH x (Select0 <types.TypeMask> (PWHILELTH (MOVDconst [0]) (MOVDconst [16])))) z mask)
 23921  	// result: (ZNEGMergingH z x mask)
 23922  	for {
 23923  		if v_0.Op != ssaop.OpARM64ZNEGH {
 23924  			break
 23925  		}
 23926  		_ = v_0.Args[1]
 23927  		x := v_0.Args[0]
 23928  		v_0_1 := v_0.Args[1]
 23929  		if v_0_1.Op != ssaop.OpSelect0 || v_0_1.Type != types.TypeMask {
 23930  			break
 23931  		}
 23932  		v_0_1_0 := v_0_1.Args[0]
 23933  		if v_0_1_0.Op != ssaop.OpARM64PWHILELTH {
 23934  			break
 23935  		}
 23936  		_ = v_0_1_0.Args[1]
 23937  		v_0_1_0_0 := v_0_1_0.Args[0]
 23938  		if v_0_1_0_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_1_0_0.AuxInt) != 0 {
 23939  			break
 23940  		}
 23941  		v_0_1_0_1 := v_0_1_0.Args[1]
 23942  		if v_0_1_0_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_1_0_1.AuxInt) != 16 {
 23943  			break
 23944  		}
 23945  		z := v_1
 23946  		mask := v_2
 23947  		v.Reset(ssaop.OpARM64ZNEGMergingH)
 23948  		v.AddArg3(z, x, mask)
 23949  		return true
 23950  	}
 23951  	// match: (ZSELH (ZORRD x y) x mask)
 23952  	// result: (ZORRMergingH x y mask)
 23953  	for {
 23954  		if v_0.Op != ssaop.OpARM64ZORRD {
 23955  			break
 23956  		}
 23957  		_ = v_0.Args[1]
 23958  		v_0_0 := v_0.Args[0]
 23959  		v_0_1 := v_0.Args[1]
 23960  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
 23961  			x := v_0_0
 23962  			y := v_0_1
 23963  			if x != v_1 {
 23964  				continue
 23965  			}
 23966  			mask := v_2
 23967  			v.Reset(ssaop.OpARM64ZORRMergingH)
 23968  			v.AddArg3(x, y, mask)
 23969  			return true
 23970  		}
 23971  		break
 23972  	}
 23973  	// match: (ZSELH (ZORRD x y) y mask)
 23974  	// result: (ZORRMergingH y x mask)
 23975  	for {
 23976  		if v_0.Op != ssaop.OpARM64ZORRD {
 23977  			break
 23978  		}
 23979  		_ = v_0.Args[1]
 23980  		v_0_0 := v_0.Args[0]
 23981  		v_0_1 := v_0.Args[1]
 23982  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
 23983  			x := v_0_0
 23984  			y := v_0_1
 23985  			if y != v_1 {
 23986  				continue
 23987  			}
 23988  			mask := v_2
 23989  			v.Reset(ssaop.OpARM64ZORRMergingH)
 23990  			v.AddArg3(y, x, mask)
 23991  			return true
 23992  		}
 23993  		break
 23994  	}
 23995  	// match: (ZSELH (ZORRD x y) z mask)
 23996  	// result: (ZORRMergingPrefixedH z x y mask)
 23997  	for {
 23998  		if v_0.Op != ssaop.OpARM64ZORRD {
 23999  			break
 24000  		}
 24001  		y := v_0.Args[1]
 24002  		x := v_0.Args[0]
 24003  		z := v_1
 24004  		mask := v_2
 24005  		v.Reset(ssaop.OpARM64ZORRMergingPrefixedH)
 24006  		v.AddArg4(z, x, y, mask)
 24007  		return true
 24008  	}
 24009  	// match: (ZSELH (ZSMAXH x y (Select0 <types.TypeMask> (PWHILELTH (MOVDconst [0]) (MOVDconst [16])))) x mask)
 24010  	// result: (ZSMAXMergingH x y mask)
 24011  	for {
 24012  		if v_0.Op != ssaop.OpARM64ZSMAXH {
 24013  			break
 24014  		}
 24015  		_ = v_0.Args[2]
 24016  		v_0_0 := v_0.Args[0]
 24017  		v_0_1 := v_0.Args[1]
 24018  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
 24019  			x := v_0_0
 24020  			y := v_0_1
 24021  			v_0_2 := v_0.Args[2]
 24022  			if v_0_2.Op != ssaop.OpSelect0 || v_0_2.Type != types.TypeMask {
 24023  				continue
 24024  			}
 24025  			v_0_2_0 := v_0_2.Args[0]
 24026  			if v_0_2_0.Op != ssaop.OpARM64PWHILELTH {
 24027  				continue
 24028  			}
 24029  			_ = v_0_2_0.Args[1]
 24030  			v_0_2_0_0 := v_0_2_0.Args[0]
 24031  			if v_0_2_0_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_0.AuxInt) != 0 {
 24032  				continue
 24033  			}
 24034  			v_0_2_0_1 := v_0_2_0.Args[1]
 24035  			if v_0_2_0_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_1.AuxInt) != 16 || x != v_1 {
 24036  				continue
 24037  			}
 24038  			mask := v_2
 24039  			v.Reset(ssaop.OpARM64ZSMAXMergingH)
 24040  			v.AddArg3(x, y, mask)
 24041  			return true
 24042  		}
 24043  		break
 24044  	}
 24045  	// match: (ZSELH (ZSMAXH x y (Select0 <types.TypeMask> (PWHILELTH (MOVDconst [0]) (MOVDconst [16])))) y mask)
 24046  	// result: (ZSMAXMergingH y x mask)
 24047  	for {
 24048  		if v_0.Op != ssaop.OpARM64ZSMAXH {
 24049  			break
 24050  		}
 24051  		_ = v_0.Args[2]
 24052  		v_0_0 := v_0.Args[0]
 24053  		v_0_1 := v_0.Args[1]
 24054  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
 24055  			x := v_0_0
 24056  			y := v_0_1
 24057  			v_0_2 := v_0.Args[2]
 24058  			if v_0_2.Op != ssaop.OpSelect0 || v_0_2.Type != types.TypeMask {
 24059  				continue
 24060  			}
 24061  			v_0_2_0 := v_0_2.Args[0]
 24062  			if v_0_2_0.Op != ssaop.OpARM64PWHILELTH {
 24063  				continue
 24064  			}
 24065  			_ = v_0_2_0.Args[1]
 24066  			v_0_2_0_0 := v_0_2_0.Args[0]
 24067  			if v_0_2_0_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_0.AuxInt) != 0 {
 24068  				continue
 24069  			}
 24070  			v_0_2_0_1 := v_0_2_0.Args[1]
 24071  			if v_0_2_0_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_1.AuxInt) != 16 || y != v_1 {
 24072  				continue
 24073  			}
 24074  			mask := v_2
 24075  			v.Reset(ssaop.OpARM64ZSMAXMergingH)
 24076  			v.AddArg3(y, x, mask)
 24077  			return true
 24078  		}
 24079  		break
 24080  	}
 24081  	// match: (ZSELH (ZSMAXH x y (Select0 <types.TypeMask> (PWHILELTH (MOVDconst [0]) (MOVDconst [16])))) z mask)
 24082  	// result: (ZSMAXMergingPrefixedH z x y mask)
 24083  	for {
 24084  		if v_0.Op != ssaop.OpARM64ZSMAXH {
 24085  			break
 24086  		}
 24087  		_ = v_0.Args[2]
 24088  		x := v_0.Args[0]
 24089  		y := v_0.Args[1]
 24090  		v_0_2 := v_0.Args[2]
 24091  		if v_0_2.Op != ssaop.OpSelect0 || v_0_2.Type != types.TypeMask {
 24092  			break
 24093  		}
 24094  		v_0_2_0 := v_0_2.Args[0]
 24095  		if v_0_2_0.Op != ssaop.OpARM64PWHILELTH {
 24096  			break
 24097  		}
 24098  		_ = v_0_2_0.Args[1]
 24099  		v_0_2_0_0 := v_0_2_0.Args[0]
 24100  		if v_0_2_0_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_0.AuxInt) != 0 {
 24101  			break
 24102  		}
 24103  		v_0_2_0_1 := v_0_2_0.Args[1]
 24104  		if v_0_2_0_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_1.AuxInt) != 16 {
 24105  			break
 24106  		}
 24107  		z := v_1
 24108  		mask := v_2
 24109  		v.Reset(ssaop.OpARM64ZSMAXMergingPrefixedH)
 24110  		v.AddArg4(z, x, y, mask)
 24111  		return true
 24112  	}
 24113  	// match: (ZSELH (ZSMINH x y (Select0 <types.TypeMask> (PWHILELTH (MOVDconst [0]) (MOVDconst [16])))) x mask)
 24114  	// result: (ZSMINMergingH x y mask)
 24115  	for {
 24116  		if v_0.Op != ssaop.OpARM64ZSMINH {
 24117  			break
 24118  		}
 24119  		_ = v_0.Args[2]
 24120  		v_0_0 := v_0.Args[0]
 24121  		v_0_1 := v_0.Args[1]
 24122  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
 24123  			x := v_0_0
 24124  			y := v_0_1
 24125  			v_0_2 := v_0.Args[2]
 24126  			if v_0_2.Op != ssaop.OpSelect0 || v_0_2.Type != types.TypeMask {
 24127  				continue
 24128  			}
 24129  			v_0_2_0 := v_0_2.Args[0]
 24130  			if v_0_2_0.Op != ssaop.OpARM64PWHILELTH {
 24131  				continue
 24132  			}
 24133  			_ = v_0_2_0.Args[1]
 24134  			v_0_2_0_0 := v_0_2_0.Args[0]
 24135  			if v_0_2_0_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_0.AuxInt) != 0 {
 24136  				continue
 24137  			}
 24138  			v_0_2_0_1 := v_0_2_0.Args[1]
 24139  			if v_0_2_0_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_1.AuxInt) != 16 || x != v_1 {
 24140  				continue
 24141  			}
 24142  			mask := v_2
 24143  			v.Reset(ssaop.OpARM64ZSMINMergingH)
 24144  			v.AddArg3(x, y, mask)
 24145  			return true
 24146  		}
 24147  		break
 24148  	}
 24149  	// match: (ZSELH (ZSMINH x y (Select0 <types.TypeMask> (PWHILELTH (MOVDconst [0]) (MOVDconst [16])))) y mask)
 24150  	// result: (ZSMINMergingH y x mask)
 24151  	for {
 24152  		if v_0.Op != ssaop.OpARM64ZSMINH {
 24153  			break
 24154  		}
 24155  		_ = v_0.Args[2]
 24156  		v_0_0 := v_0.Args[0]
 24157  		v_0_1 := v_0.Args[1]
 24158  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
 24159  			x := v_0_0
 24160  			y := v_0_1
 24161  			v_0_2 := v_0.Args[2]
 24162  			if v_0_2.Op != ssaop.OpSelect0 || v_0_2.Type != types.TypeMask {
 24163  				continue
 24164  			}
 24165  			v_0_2_0 := v_0_2.Args[0]
 24166  			if v_0_2_0.Op != ssaop.OpARM64PWHILELTH {
 24167  				continue
 24168  			}
 24169  			_ = v_0_2_0.Args[1]
 24170  			v_0_2_0_0 := v_0_2_0.Args[0]
 24171  			if v_0_2_0_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_0.AuxInt) != 0 {
 24172  				continue
 24173  			}
 24174  			v_0_2_0_1 := v_0_2_0.Args[1]
 24175  			if v_0_2_0_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_1.AuxInt) != 16 || y != v_1 {
 24176  				continue
 24177  			}
 24178  			mask := v_2
 24179  			v.Reset(ssaop.OpARM64ZSMINMergingH)
 24180  			v.AddArg3(y, x, mask)
 24181  			return true
 24182  		}
 24183  		break
 24184  	}
 24185  	// match: (ZSELH (ZSMINH x y (Select0 <types.TypeMask> (PWHILELTH (MOVDconst [0]) (MOVDconst [16])))) z mask)
 24186  	// result: (ZSMINMergingPrefixedH z x y mask)
 24187  	for {
 24188  		if v_0.Op != ssaop.OpARM64ZSMINH {
 24189  			break
 24190  		}
 24191  		_ = v_0.Args[2]
 24192  		x := v_0.Args[0]
 24193  		y := v_0.Args[1]
 24194  		v_0_2 := v_0.Args[2]
 24195  		if v_0_2.Op != ssaop.OpSelect0 || v_0_2.Type != types.TypeMask {
 24196  			break
 24197  		}
 24198  		v_0_2_0 := v_0_2.Args[0]
 24199  		if v_0_2_0.Op != ssaop.OpARM64PWHILELTH {
 24200  			break
 24201  		}
 24202  		_ = v_0_2_0.Args[1]
 24203  		v_0_2_0_0 := v_0_2_0.Args[0]
 24204  		if v_0_2_0_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_0.AuxInt) != 0 {
 24205  			break
 24206  		}
 24207  		v_0_2_0_1 := v_0_2_0.Args[1]
 24208  		if v_0_2_0_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_1.AuxInt) != 16 {
 24209  			break
 24210  		}
 24211  		z := v_1
 24212  		mask := v_2
 24213  		v.Reset(ssaop.OpARM64ZSMINMergingPrefixedH)
 24214  		v.AddArg4(z, x, y, mask)
 24215  		return true
 24216  	}
 24217  	// match: (ZSELH (ZSMULHMergingH x y (Select0 <types.TypeMask> (PWHILELTH (MOVDconst [0]) (MOVDconst [16])))) x mask)
 24218  	// result: (ZSMULHMergingH x y mask)
 24219  	for {
 24220  		if v_0.Op != ssaop.OpARM64ZSMULHMergingH {
 24221  			break
 24222  		}
 24223  		_ = v_0.Args[2]
 24224  		x := v_0.Args[0]
 24225  		y := v_0.Args[1]
 24226  		v_0_2 := v_0.Args[2]
 24227  		if v_0_2.Op != ssaop.OpSelect0 || v_0_2.Type != types.TypeMask {
 24228  			break
 24229  		}
 24230  		v_0_2_0 := v_0_2.Args[0]
 24231  		if v_0_2_0.Op != ssaop.OpARM64PWHILELTH {
 24232  			break
 24233  		}
 24234  		_ = v_0_2_0.Args[1]
 24235  		v_0_2_0_0 := v_0_2_0.Args[0]
 24236  		if v_0_2_0_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_0.AuxInt) != 0 {
 24237  			break
 24238  		}
 24239  		v_0_2_0_1 := v_0_2_0.Args[1]
 24240  		if v_0_2_0_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_1.AuxInt) != 16 || x != v_1 {
 24241  			break
 24242  		}
 24243  		mask := v_2
 24244  		v.Reset(ssaop.OpARM64ZSMULHMergingH)
 24245  		v.AddArg3(x, y, mask)
 24246  		return true
 24247  	}
 24248  	// match: (ZSELH (ZSMULHMergingH x y (Select0 <types.TypeMask> (PWHILELTH (MOVDconst [0]) (MOVDconst [16])))) y mask)
 24249  	// result: (ZSMULHMergingH y x mask)
 24250  	for {
 24251  		if v_0.Op != ssaop.OpARM64ZSMULHMergingH {
 24252  			break
 24253  		}
 24254  		_ = v_0.Args[2]
 24255  		x := v_0.Args[0]
 24256  		y := v_0.Args[1]
 24257  		v_0_2 := v_0.Args[2]
 24258  		if v_0_2.Op != ssaop.OpSelect0 || v_0_2.Type != types.TypeMask {
 24259  			break
 24260  		}
 24261  		v_0_2_0 := v_0_2.Args[0]
 24262  		if v_0_2_0.Op != ssaop.OpARM64PWHILELTH {
 24263  			break
 24264  		}
 24265  		_ = v_0_2_0.Args[1]
 24266  		v_0_2_0_0 := v_0_2_0.Args[0]
 24267  		if v_0_2_0_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_0.AuxInt) != 0 {
 24268  			break
 24269  		}
 24270  		v_0_2_0_1 := v_0_2_0.Args[1]
 24271  		if v_0_2_0_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_1.AuxInt) != 16 || y != v_1 {
 24272  			break
 24273  		}
 24274  		mask := v_2
 24275  		v.Reset(ssaop.OpARM64ZSMULHMergingH)
 24276  		v.AddArg3(y, x, mask)
 24277  		return true
 24278  	}
 24279  	// match: (ZSELH (ZSMULHMergingH x y (Select0 <types.TypeMask> (PWHILELTH (MOVDconst [0]) (MOVDconst [16])))) z mask)
 24280  	// result: (ZSMULHMergingPrefixedH z x y mask)
 24281  	for {
 24282  		if v_0.Op != ssaop.OpARM64ZSMULHMergingH {
 24283  			break
 24284  		}
 24285  		_ = v_0.Args[2]
 24286  		x := v_0.Args[0]
 24287  		y := v_0.Args[1]
 24288  		v_0_2 := v_0.Args[2]
 24289  		if v_0_2.Op != ssaop.OpSelect0 || v_0_2.Type != types.TypeMask {
 24290  			break
 24291  		}
 24292  		v_0_2_0 := v_0_2.Args[0]
 24293  		if v_0_2_0.Op != ssaop.OpARM64PWHILELTH {
 24294  			break
 24295  		}
 24296  		_ = v_0_2_0.Args[1]
 24297  		v_0_2_0_0 := v_0_2_0.Args[0]
 24298  		if v_0_2_0_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_0.AuxInt) != 0 {
 24299  			break
 24300  		}
 24301  		v_0_2_0_1 := v_0_2_0.Args[1]
 24302  		if v_0_2_0_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_1.AuxInt) != 16 {
 24303  			break
 24304  		}
 24305  		z := v_1
 24306  		mask := v_2
 24307  		v.Reset(ssaop.OpARM64ZSMULHMergingPrefixedH)
 24308  		v.AddArg4(z, x, y, mask)
 24309  		return true
 24310  	}
 24311  	// match: (ZSELH (ZSQADDH x y) x mask)
 24312  	// result: (ZSQADDMergingH x y mask)
 24313  	for {
 24314  		if v_0.Op != ssaop.OpARM64ZSQADDH {
 24315  			break
 24316  		}
 24317  		_ = v_0.Args[1]
 24318  		v_0_0 := v_0.Args[0]
 24319  		v_0_1 := v_0.Args[1]
 24320  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
 24321  			x := v_0_0
 24322  			y := v_0_1
 24323  			if x != v_1 {
 24324  				continue
 24325  			}
 24326  			mask := v_2
 24327  			v.Reset(ssaop.OpARM64ZSQADDMergingH)
 24328  			v.AddArg3(x, y, mask)
 24329  			return true
 24330  		}
 24331  		break
 24332  	}
 24333  	// match: (ZSELH (ZSQADDH x y) y mask)
 24334  	// result: (ZSQADDMergingH y x mask)
 24335  	for {
 24336  		if v_0.Op != ssaop.OpARM64ZSQADDH {
 24337  			break
 24338  		}
 24339  		_ = v_0.Args[1]
 24340  		v_0_0 := v_0.Args[0]
 24341  		v_0_1 := v_0.Args[1]
 24342  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
 24343  			x := v_0_0
 24344  			y := v_0_1
 24345  			if y != v_1 {
 24346  				continue
 24347  			}
 24348  			mask := v_2
 24349  			v.Reset(ssaop.OpARM64ZSQADDMergingH)
 24350  			v.AddArg3(y, x, mask)
 24351  			return true
 24352  		}
 24353  		break
 24354  	}
 24355  	// match: (ZSELH (ZSQADDH x y) z mask)
 24356  	// result: (ZSQADDMergingPrefixedH z x y mask)
 24357  	for {
 24358  		if v_0.Op != ssaop.OpARM64ZSQADDH {
 24359  			break
 24360  		}
 24361  		y := v_0.Args[1]
 24362  		x := v_0.Args[0]
 24363  		z := v_1
 24364  		mask := v_2
 24365  		v.Reset(ssaop.OpARM64ZSQADDMergingPrefixedH)
 24366  		v.AddArg4(z, x, y, mask)
 24367  		return true
 24368  	}
 24369  	// match: (ZSELH (ZSQSUBH x y) x mask)
 24370  	// result: (ZSQSUBMergingH x y mask)
 24371  	for {
 24372  		if v_0.Op != ssaop.OpARM64ZSQSUBH {
 24373  			break
 24374  		}
 24375  		y := v_0.Args[1]
 24376  		x := v_0.Args[0]
 24377  		if x != v_1 {
 24378  			break
 24379  		}
 24380  		mask := v_2
 24381  		v.Reset(ssaop.OpARM64ZSQSUBMergingH)
 24382  		v.AddArg3(x, y, mask)
 24383  		return true
 24384  	}
 24385  	// match: (ZSELH (ZSUBH x y) x mask)
 24386  	// result: (ZSUBMergingH x y mask)
 24387  	for {
 24388  		if v_0.Op != ssaop.OpARM64ZSUBH {
 24389  			break
 24390  		}
 24391  		y := v_0.Args[1]
 24392  		x := v_0.Args[0]
 24393  		if x != v_1 {
 24394  			break
 24395  		}
 24396  		mask := v_2
 24397  		v.Reset(ssaop.OpARM64ZSUBMergingH)
 24398  		v.AddArg3(x, y, mask)
 24399  		return true
 24400  	}
 24401  	// match: (ZSELH (ZUMAXH x y (Select0 <types.TypeMask> (PWHILELTH (MOVDconst [0]) (MOVDconst [16])))) x mask)
 24402  	// result: (ZUMAXMergingH x y mask)
 24403  	for {
 24404  		if v_0.Op != ssaop.OpARM64ZUMAXH {
 24405  			break
 24406  		}
 24407  		_ = v_0.Args[2]
 24408  		v_0_0 := v_0.Args[0]
 24409  		v_0_1 := v_0.Args[1]
 24410  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
 24411  			x := v_0_0
 24412  			y := v_0_1
 24413  			v_0_2 := v_0.Args[2]
 24414  			if v_0_2.Op != ssaop.OpSelect0 || v_0_2.Type != types.TypeMask {
 24415  				continue
 24416  			}
 24417  			v_0_2_0 := v_0_2.Args[0]
 24418  			if v_0_2_0.Op != ssaop.OpARM64PWHILELTH {
 24419  				continue
 24420  			}
 24421  			_ = v_0_2_0.Args[1]
 24422  			v_0_2_0_0 := v_0_2_0.Args[0]
 24423  			if v_0_2_0_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_0.AuxInt) != 0 {
 24424  				continue
 24425  			}
 24426  			v_0_2_0_1 := v_0_2_0.Args[1]
 24427  			if v_0_2_0_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_1.AuxInt) != 16 || x != v_1 {
 24428  				continue
 24429  			}
 24430  			mask := v_2
 24431  			v.Reset(ssaop.OpARM64ZUMAXMergingH)
 24432  			v.AddArg3(x, y, mask)
 24433  			return true
 24434  		}
 24435  		break
 24436  	}
 24437  	// match: (ZSELH (ZUMAXH x y (Select0 <types.TypeMask> (PWHILELTH (MOVDconst [0]) (MOVDconst [16])))) y mask)
 24438  	// result: (ZUMAXMergingH y x mask)
 24439  	for {
 24440  		if v_0.Op != ssaop.OpARM64ZUMAXH {
 24441  			break
 24442  		}
 24443  		_ = v_0.Args[2]
 24444  		v_0_0 := v_0.Args[0]
 24445  		v_0_1 := v_0.Args[1]
 24446  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
 24447  			x := v_0_0
 24448  			y := v_0_1
 24449  			v_0_2 := v_0.Args[2]
 24450  			if v_0_2.Op != ssaop.OpSelect0 || v_0_2.Type != types.TypeMask {
 24451  				continue
 24452  			}
 24453  			v_0_2_0 := v_0_2.Args[0]
 24454  			if v_0_2_0.Op != ssaop.OpARM64PWHILELTH {
 24455  				continue
 24456  			}
 24457  			_ = v_0_2_0.Args[1]
 24458  			v_0_2_0_0 := v_0_2_0.Args[0]
 24459  			if v_0_2_0_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_0.AuxInt) != 0 {
 24460  				continue
 24461  			}
 24462  			v_0_2_0_1 := v_0_2_0.Args[1]
 24463  			if v_0_2_0_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_1.AuxInt) != 16 || y != v_1 {
 24464  				continue
 24465  			}
 24466  			mask := v_2
 24467  			v.Reset(ssaop.OpARM64ZUMAXMergingH)
 24468  			v.AddArg3(y, x, mask)
 24469  			return true
 24470  		}
 24471  		break
 24472  	}
 24473  	// match: (ZSELH (ZUMAXH x y (Select0 <types.TypeMask> (PWHILELTH (MOVDconst [0]) (MOVDconst [16])))) z mask)
 24474  	// result: (ZUMAXMergingPrefixedH z x y mask)
 24475  	for {
 24476  		if v_0.Op != ssaop.OpARM64ZUMAXH {
 24477  			break
 24478  		}
 24479  		_ = v_0.Args[2]
 24480  		x := v_0.Args[0]
 24481  		y := v_0.Args[1]
 24482  		v_0_2 := v_0.Args[2]
 24483  		if v_0_2.Op != ssaop.OpSelect0 || v_0_2.Type != types.TypeMask {
 24484  			break
 24485  		}
 24486  		v_0_2_0 := v_0_2.Args[0]
 24487  		if v_0_2_0.Op != ssaop.OpARM64PWHILELTH {
 24488  			break
 24489  		}
 24490  		_ = v_0_2_0.Args[1]
 24491  		v_0_2_0_0 := v_0_2_0.Args[0]
 24492  		if v_0_2_0_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_0.AuxInt) != 0 {
 24493  			break
 24494  		}
 24495  		v_0_2_0_1 := v_0_2_0.Args[1]
 24496  		if v_0_2_0_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_1.AuxInt) != 16 {
 24497  			break
 24498  		}
 24499  		z := v_1
 24500  		mask := v_2
 24501  		v.Reset(ssaop.OpARM64ZUMAXMergingPrefixedH)
 24502  		v.AddArg4(z, x, y, mask)
 24503  		return true
 24504  	}
 24505  	// match: (ZSELH (ZUMINH x y (Select0 <types.TypeMask> (PWHILELTH (MOVDconst [0]) (MOVDconst [16])))) x mask)
 24506  	// result: (ZUMINMergingH x y mask)
 24507  	for {
 24508  		if v_0.Op != ssaop.OpARM64ZUMINH {
 24509  			break
 24510  		}
 24511  		_ = v_0.Args[2]
 24512  		v_0_0 := v_0.Args[0]
 24513  		v_0_1 := v_0.Args[1]
 24514  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
 24515  			x := v_0_0
 24516  			y := v_0_1
 24517  			v_0_2 := v_0.Args[2]
 24518  			if v_0_2.Op != ssaop.OpSelect0 || v_0_2.Type != types.TypeMask {
 24519  				continue
 24520  			}
 24521  			v_0_2_0 := v_0_2.Args[0]
 24522  			if v_0_2_0.Op != ssaop.OpARM64PWHILELTH {
 24523  				continue
 24524  			}
 24525  			_ = v_0_2_0.Args[1]
 24526  			v_0_2_0_0 := v_0_2_0.Args[0]
 24527  			if v_0_2_0_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_0.AuxInt) != 0 {
 24528  				continue
 24529  			}
 24530  			v_0_2_0_1 := v_0_2_0.Args[1]
 24531  			if v_0_2_0_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_1.AuxInt) != 16 || x != v_1 {
 24532  				continue
 24533  			}
 24534  			mask := v_2
 24535  			v.Reset(ssaop.OpARM64ZUMINMergingH)
 24536  			v.AddArg3(x, y, mask)
 24537  			return true
 24538  		}
 24539  		break
 24540  	}
 24541  	// match: (ZSELH (ZUMINH x y (Select0 <types.TypeMask> (PWHILELTH (MOVDconst [0]) (MOVDconst [16])))) y mask)
 24542  	// result: (ZUMINMergingH y x mask)
 24543  	for {
 24544  		if v_0.Op != ssaop.OpARM64ZUMINH {
 24545  			break
 24546  		}
 24547  		_ = v_0.Args[2]
 24548  		v_0_0 := v_0.Args[0]
 24549  		v_0_1 := v_0.Args[1]
 24550  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
 24551  			x := v_0_0
 24552  			y := v_0_1
 24553  			v_0_2 := v_0.Args[2]
 24554  			if v_0_2.Op != ssaop.OpSelect0 || v_0_2.Type != types.TypeMask {
 24555  				continue
 24556  			}
 24557  			v_0_2_0 := v_0_2.Args[0]
 24558  			if v_0_2_0.Op != ssaop.OpARM64PWHILELTH {
 24559  				continue
 24560  			}
 24561  			_ = v_0_2_0.Args[1]
 24562  			v_0_2_0_0 := v_0_2_0.Args[0]
 24563  			if v_0_2_0_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_0.AuxInt) != 0 {
 24564  				continue
 24565  			}
 24566  			v_0_2_0_1 := v_0_2_0.Args[1]
 24567  			if v_0_2_0_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_1.AuxInt) != 16 || y != v_1 {
 24568  				continue
 24569  			}
 24570  			mask := v_2
 24571  			v.Reset(ssaop.OpARM64ZUMINMergingH)
 24572  			v.AddArg3(y, x, mask)
 24573  			return true
 24574  		}
 24575  		break
 24576  	}
 24577  	// match: (ZSELH (ZUMINH x y (Select0 <types.TypeMask> (PWHILELTH (MOVDconst [0]) (MOVDconst [16])))) z mask)
 24578  	// result: (ZUMINMergingPrefixedH z x y mask)
 24579  	for {
 24580  		if v_0.Op != ssaop.OpARM64ZUMINH {
 24581  			break
 24582  		}
 24583  		_ = v_0.Args[2]
 24584  		x := v_0.Args[0]
 24585  		y := v_0.Args[1]
 24586  		v_0_2 := v_0.Args[2]
 24587  		if v_0_2.Op != ssaop.OpSelect0 || v_0_2.Type != types.TypeMask {
 24588  			break
 24589  		}
 24590  		v_0_2_0 := v_0_2.Args[0]
 24591  		if v_0_2_0.Op != ssaop.OpARM64PWHILELTH {
 24592  			break
 24593  		}
 24594  		_ = v_0_2_0.Args[1]
 24595  		v_0_2_0_0 := v_0_2_0.Args[0]
 24596  		if v_0_2_0_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_0.AuxInt) != 0 {
 24597  			break
 24598  		}
 24599  		v_0_2_0_1 := v_0_2_0.Args[1]
 24600  		if v_0_2_0_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_1.AuxInt) != 16 {
 24601  			break
 24602  		}
 24603  		z := v_1
 24604  		mask := v_2
 24605  		v.Reset(ssaop.OpARM64ZUMINMergingPrefixedH)
 24606  		v.AddArg4(z, x, y, mask)
 24607  		return true
 24608  	}
 24609  	// match: (ZSELH (ZUMULHMergingH x y (Select0 <types.TypeMask> (PWHILELTH (MOVDconst [0]) (MOVDconst [16])))) x mask)
 24610  	// result: (ZUMULHMergingH x y mask)
 24611  	for {
 24612  		if v_0.Op != ssaop.OpARM64ZUMULHMergingH {
 24613  			break
 24614  		}
 24615  		_ = v_0.Args[2]
 24616  		x := v_0.Args[0]
 24617  		y := v_0.Args[1]
 24618  		v_0_2 := v_0.Args[2]
 24619  		if v_0_2.Op != ssaop.OpSelect0 || v_0_2.Type != types.TypeMask {
 24620  			break
 24621  		}
 24622  		v_0_2_0 := v_0_2.Args[0]
 24623  		if v_0_2_0.Op != ssaop.OpARM64PWHILELTH {
 24624  			break
 24625  		}
 24626  		_ = v_0_2_0.Args[1]
 24627  		v_0_2_0_0 := v_0_2_0.Args[0]
 24628  		if v_0_2_0_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_0.AuxInt) != 0 {
 24629  			break
 24630  		}
 24631  		v_0_2_0_1 := v_0_2_0.Args[1]
 24632  		if v_0_2_0_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_1.AuxInt) != 16 || x != v_1 {
 24633  			break
 24634  		}
 24635  		mask := v_2
 24636  		v.Reset(ssaop.OpARM64ZUMULHMergingH)
 24637  		v.AddArg3(x, y, mask)
 24638  		return true
 24639  	}
 24640  	// match: (ZSELH (ZUMULHMergingH x y (Select0 <types.TypeMask> (PWHILELTH (MOVDconst [0]) (MOVDconst [16])))) y mask)
 24641  	// result: (ZUMULHMergingH y x mask)
 24642  	for {
 24643  		if v_0.Op != ssaop.OpARM64ZUMULHMergingH {
 24644  			break
 24645  		}
 24646  		_ = v_0.Args[2]
 24647  		x := v_0.Args[0]
 24648  		y := v_0.Args[1]
 24649  		v_0_2 := v_0.Args[2]
 24650  		if v_0_2.Op != ssaop.OpSelect0 || v_0_2.Type != types.TypeMask {
 24651  			break
 24652  		}
 24653  		v_0_2_0 := v_0_2.Args[0]
 24654  		if v_0_2_0.Op != ssaop.OpARM64PWHILELTH {
 24655  			break
 24656  		}
 24657  		_ = v_0_2_0.Args[1]
 24658  		v_0_2_0_0 := v_0_2_0.Args[0]
 24659  		if v_0_2_0_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_0.AuxInt) != 0 {
 24660  			break
 24661  		}
 24662  		v_0_2_0_1 := v_0_2_0.Args[1]
 24663  		if v_0_2_0_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_1.AuxInt) != 16 || y != v_1 {
 24664  			break
 24665  		}
 24666  		mask := v_2
 24667  		v.Reset(ssaop.OpARM64ZUMULHMergingH)
 24668  		v.AddArg3(y, x, mask)
 24669  		return true
 24670  	}
 24671  	// match: (ZSELH (ZUMULHMergingH x y (Select0 <types.TypeMask> (PWHILELTH (MOVDconst [0]) (MOVDconst [16])))) z mask)
 24672  	// result: (ZUMULHMergingPrefixedH z x y mask)
 24673  	for {
 24674  		if v_0.Op != ssaop.OpARM64ZUMULHMergingH {
 24675  			break
 24676  		}
 24677  		_ = v_0.Args[2]
 24678  		x := v_0.Args[0]
 24679  		y := v_0.Args[1]
 24680  		v_0_2 := v_0.Args[2]
 24681  		if v_0_2.Op != ssaop.OpSelect0 || v_0_2.Type != types.TypeMask {
 24682  			break
 24683  		}
 24684  		v_0_2_0 := v_0_2.Args[0]
 24685  		if v_0_2_0.Op != ssaop.OpARM64PWHILELTH {
 24686  			break
 24687  		}
 24688  		_ = v_0_2_0.Args[1]
 24689  		v_0_2_0_0 := v_0_2_0.Args[0]
 24690  		if v_0_2_0_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_0.AuxInt) != 0 {
 24691  			break
 24692  		}
 24693  		v_0_2_0_1 := v_0_2_0.Args[1]
 24694  		if v_0_2_0_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_1.AuxInt) != 16 {
 24695  			break
 24696  		}
 24697  		z := v_1
 24698  		mask := v_2
 24699  		v.Reset(ssaop.OpARM64ZUMULHMergingPrefixedH)
 24700  		v.AddArg4(z, x, y, mask)
 24701  		return true
 24702  	}
 24703  	// match: (ZSELH (ZUQADDH x y) x mask)
 24704  	// result: (ZUQADDMergingH x y mask)
 24705  	for {
 24706  		if v_0.Op != ssaop.OpARM64ZUQADDH {
 24707  			break
 24708  		}
 24709  		_ = v_0.Args[1]
 24710  		v_0_0 := v_0.Args[0]
 24711  		v_0_1 := v_0.Args[1]
 24712  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
 24713  			x := v_0_0
 24714  			y := v_0_1
 24715  			if x != v_1 {
 24716  				continue
 24717  			}
 24718  			mask := v_2
 24719  			v.Reset(ssaop.OpARM64ZUQADDMergingH)
 24720  			v.AddArg3(x, y, mask)
 24721  			return true
 24722  		}
 24723  		break
 24724  	}
 24725  	// match: (ZSELH (ZUQADDH x y) y mask)
 24726  	// result: (ZUQADDMergingH y x mask)
 24727  	for {
 24728  		if v_0.Op != ssaop.OpARM64ZUQADDH {
 24729  			break
 24730  		}
 24731  		_ = v_0.Args[1]
 24732  		v_0_0 := v_0.Args[0]
 24733  		v_0_1 := v_0.Args[1]
 24734  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
 24735  			x := v_0_0
 24736  			y := v_0_1
 24737  			if y != v_1 {
 24738  				continue
 24739  			}
 24740  			mask := v_2
 24741  			v.Reset(ssaop.OpARM64ZUQADDMergingH)
 24742  			v.AddArg3(y, x, mask)
 24743  			return true
 24744  		}
 24745  		break
 24746  	}
 24747  	// match: (ZSELH (ZUQADDH x y) z mask)
 24748  	// result: (ZUQADDMergingPrefixedH z x y mask)
 24749  	for {
 24750  		if v_0.Op != ssaop.OpARM64ZUQADDH {
 24751  			break
 24752  		}
 24753  		y := v_0.Args[1]
 24754  		x := v_0.Args[0]
 24755  		z := v_1
 24756  		mask := v_2
 24757  		v.Reset(ssaop.OpARM64ZUQADDMergingPrefixedH)
 24758  		v.AddArg4(z, x, y, mask)
 24759  		return true
 24760  	}
 24761  	// match: (ZSELH (ZUQSUBH x y) x mask)
 24762  	// result: (ZUQSUBMergingH x y mask)
 24763  	for {
 24764  		if v_0.Op != ssaop.OpARM64ZUQSUBH {
 24765  			break
 24766  		}
 24767  		y := v_0.Args[1]
 24768  		x := v_0.Args[0]
 24769  		if x != v_1 {
 24770  			break
 24771  		}
 24772  		mask := v_2
 24773  		v.Reset(ssaop.OpARM64ZUQSUBMergingH)
 24774  		v.AddArg3(x, y, mask)
 24775  		return true
 24776  	}
 24777  	return false
 24778  }
 24779  func rewriteValue_OpARM64ZSELS(v *ssa.Value) bool {
 24780  	v_2 := v.Args[2]
 24781  	v_1 := v.Args[1]
 24782  	v_0 := v.Args[0]
 24783  	// match: (ZSELS (ZDUPS x) z mask)
 24784  	// result: (ZCPYMergingS z x mask)
 24785  	for {
 24786  		if v_0.Op != ssaop.OpARM64ZDUPS {
 24787  			break
 24788  		}
 24789  		x := v_0.Args[0]
 24790  		z := v_1
 24791  		mask := v_2
 24792  		v.Reset(ssaop.OpARM64ZCPYMergingS)
 24793  		v.AddArg3(z, x, mask)
 24794  		return true
 24795  	}
 24796  	// match: (ZSELS (ZDUPIS [0] x) z mask)
 24797  	// result: (ZCPYIMergingS z x mask)
 24798  	for {
 24799  		if v_0.Op != ssaop.OpARM64ZDUPIS || ssa.AuxIntToUint8(v_0.AuxInt) != 0 {
 24800  			break
 24801  		}
 24802  		x := v_0.Args[0]
 24803  		z := v_1
 24804  		mask := v_2
 24805  		v.Reset(ssaop.OpARM64ZCPYIMergingS)
 24806  		v.AddArg3(z, x, mask)
 24807  		return true
 24808  	}
 24809  	// match: (ZSELS (ZDUPSconst [c]) z mask)
 24810  	// result: (ZCPYMergingSconst [c] z mask)
 24811  	for {
 24812  		if v_0.Op != ssaop.OpARM64ZDUPSconst {
 24813  			break
 24814  		}
 24815  		c := ssa.AuxIntToInt8(v_0.AuxInt)
 24816  		z := v_1
 24817  		mask := v_2
 24818  		v.Reset(ssaop.OpARM64ZCPYMergingSconst)
 24819  		v.AuxInt = ssa.Int8ToAuxInt(c)
 24820  		v.AddArg2(z, mask)
 24821  		return true
 24822  	}
 24823  	// match: (ZSELS (ZABSS x (Select0 <types.TypeMask> (PWHILELTS (MOVDconst [0]) (MOVDconst [8])))) z mask)
 24824  	// result: (ZABSMergingS z x mask)
 24825  	for {
 24826  		if v_0.Op != ssaop.OpARM64ZABSS {
 24827  			break
 24828  		}
 24829  		_ = v_0.Args[1]
 24830  		x := v_0.Args[0]
 24831  		v_0_1 := v_0.Args[1]
 24832  		if v_0_1.Op != ssaop.OpSelect0 || v_0_1.Type != types.TypeMask {
 24833  			break
 24834  		}
 24835  		v_0_1_0 := v_0_1.Args[0]
 24836  		if v_0_1_0.Op != ssaop.OpARM64PWHILELTS {
 24837  			break
 24838  		}
 24839  		_ = v_0_1_0.Args[1]
 24840  		v_0_1_0_0 := v_0_1_0.Args[0]
 24841  		if v_0_1_0_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_1_0_0.AuxInt) != 0 {
 24842  			break
 24843  		}
 24844  		v_0_1_0_1 := v_0_1_0.Args[1]
 24845  		if v_0_1_0_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_1_0_1.AuxInt) != 8 {
 24846  			break
 24847  		}
 24848  		z := v_1
 24849  		mask := v_2
 24850  		v.Reset(ssaop.OpARM64ZABSMergingS)
 24851  		v.AddArg3(z, x, mask)
 24852  		return true
 24853  	}
 24854  	// match: (ZSELS (ZADDS x y) x mask)
 24855  	// result: (ZADDMergingS x y mask)
 24856  	for {
 24857  		if v_0.Op != ssaop.OpARM64ZADDS {
 24858  			break
 24859  		}
 24860  		_ = v_0.Args[1]
 24861  		v_0_0 := v_0.Args[0]
 24862  		v_0_1 := v_0.Args[1]
 24863  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
 24864  			x := v_0_0
 24865  			y := v_0_1
 24866  			if x != v_1 {
 24867  				continue
 24868  			}
 24869  			mask := v_2
 24870  			v.Reset(ssaop.OpARM64ZADDMergingS)
 24871  			v.AddArg3(x, y, mask)
 24872  			return true
 24873  		}
 24874  		break
 24875  	}
 24876  	// match: (ZSELS (ZADDS x y) y mask)
 24877  	// result: (ZADDMergingS y x mask)
 24878  	for {
 24879  		if v_0.Op != ssaop.OpARM64ZADDS {
 24880  			break
 24881  		}
 24882  		_ = v_0.Args[1]
 24883  		v_0_0 := v_0.Args[0]
 24884  		v_0_1 := v_0.Args[1]
 24885  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
 24886  			x := v_0_0
 24887  			y := v_0_1
 24888  			if y != v_1 {
 24889  				continue
 24890  			}
 24891  			mask := v_2
 24892  			v.Reset(ssaop.OpARM64ZADDMergingS)
 24893  			v.AddArg3(y, x, mask)
 24894  			return true
 24895  		}
 24896  		break
 24897  	}
 24898  	// match: (ZSELS (ZADDS x y) z mask)
 24899  	// result: (ZADDMergingPrefixedS z x y mask)
 24900  	for {
 24901  		if v_0.Op != ssaop.OpARM64ZADDS {
 24902  			break
 24903  		}
 24904  		y := v_0.Args[1]
 24905  		x := v_0.Args[0]
 24906  		z := v_1
 24907  		mask := v_2
 24908  		v.Reset(ssaop.OpARM64ZADDMergingPrefixedS)
 24909  		v.AddArg4(z, x, y, mask)
 24910  		return true
 24911  	}
 24912  	// match: (ZSELS (ZANDD x y) x mask)
 24913  	// result: (ZANDMergingS x y mask)
 24914  	for {
 24915  		if v_0.Op != ssaop.OpARM64ZANDD {
 24916  			break
 24917  		}
 24918  		_ = v_0.Args[1]
 24919  		v_0_0 := v_0.Args[0]
 24920  		v_0_1 := v_0.Args[1]
 24921  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
 24922  			x := v_0_0
 24923  			y := v_0_1
 24924  			if x != v_1 {
 24925  				continue
 24926  			}
 24927  			mask := v_2
 24928  			v.Reset(ssaop.OpARM64ZANDMergingS)
 24929  			v.AddArg3(x, y, mask)
 24930  			return true
 24931  		}
 24932  		break
 24933  	}
 24934  	// match: (ZSELS (ZANDD x y) y mask)
 24935  	// result: (ZANDMergingS y x mask)
 24936  	for {
 24937  		if v_0.Op != ssaop.OpARM64ZANDD {
 24938  			break
 24939  		}
 24940  		_ = v_0.Args[1]
 24941  		v_0_0 := v_0.Args[0]
 24942  		v_0_1 := v_0.Args[1]
 24943  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
 24944  			x := v_0_0
 24945  			y := v_0_1
 24946  			if y != v_1 {
 24947  				continue
 24948  			}
 24949  			mask := v_2
 24950  			v.Reset(ssaop.OpARM64ZANDMergingS)
 24951  			v.AddArg3(y, x, mask)
 24952  			return true
 24953  		}
 24954  		break
 24955  	}
 24956  	// match: (ZSELS (ZANDD x y) z mask)
 24957  	// result: (ZANDMergingPrefixedS z x y mask)
 24958  	for {
 24959  		if v_0.Op != ssaop.OpARM64ZANDD {
 24960  			break
 24961  		}
 24962  		y := v_0.Args[1]
 24963  		x := v_0.Args[0]
 24964  		z := v_1
 24965  		mask := v_2
 24966  		v.Reset(ssaop.OpARM64ZANDMergingPrefixedS)
 24967  		v.AddArg4(z, x, y, mask)
 24968  		return true
 24969  	}
 24970  	// match: (ZSELS (ZBICD x y) x mask)
 24971  	// result: (ZBICMergingS x y mask)
 24972  	for {
 24973  		if v_0.Op != ssaop.OpARM64ZBICD {
 24974  			break
 24975  		}
 24976  		y := v_0.Args[1]
 24977  		x := v_0.Args[0]
 24978  		if x != v_1 {
 24979  			break
 24980  		}
 24981  		mask := v_2
 24982  		v.Reset(ssaop.OpARM64ZBICMergingS)
 24983  		v.AddArg3(x, y, mask)
 24984  		return true
 24985  	}
 24986  	// match: (ZSELS (ZEORD x y) x mask)
 24987  	// result: (ZEORMergingS x y mask)
 24988  	for {
 24989  		if v_0.Op != ssaop.OpARM64ZEORD {
 24990  			break
 24991  		}
 24992  		_ = v_0.Args[1]
 24993  		v_0_0 := v_0.Args[0]
 24994  		v_0_1 := v_0.Args[1]
 24995  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
 24996  			x := v_0_0
 24997  			y := v_0_1
 24998  			if x != v_1 {
 24999  				continue
 25000  			}
 25001  			mask := v_2
 25002  			v.Reset(ssaop.OpARM64ZEORMergingS)
 25003  			v.AddArg3(x, y, mask)
 25004  			return true
 25005  		}
 25006  		break
 25007  	}
 25008  	// match: (ZSELS (ZEORD x y) y mask)
 25009  	// result: (ZEORMergingS y x mask)
 25010  	for {
 25011  		if v_0.Op != ssaop.OpARM64ZEORD {
 25012  			break
 25013  		}
 25014  		_ = v_0.Args[1]
 25015  		v_0_0 := v_0.Args[0]
 25016  		v_0_1 := v_0.Args[1]
 25017  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
 25018  			x := v_0_0
 25019  			y := v_0_1
 25020  			if y != v_1 {
 25021  				continue
 25022  			}
 25023  			mask := v_2
 25024  			v.Reset(ssaop.OpARM64ZEORMergingS)
 25025  			v.AddArg3(y, x, mask)
 25026  			return true
 25027  		}
 25028  		break
 25029  	}
 25030  	// match: (ZSELS (ZEORD x y) z mask)
 25031  	// result: (ZEORMergingPrefixedS z x y mask)
 25032  	for {
 25033  		if v_0.Op != ssaop.OpARM64ZEORD {
 25034  			break
 25035  		}
 25036  		y := v_0.Args[1]
 25037  		x := v_0.Args[0]
 25038  		z := v_1
 25039  		mask := v_2
 25040  		v.Reset(ssaop.OpARM64ZEORMergingPrefixedS)
 25041  		v.AddArg4(z, x, y, mask)
 25042  		return true
 25043  	}
 25044  	// match: (ZSELS (ZFABSS x (Select0 <types.TypeMask> (PWHILELTS (MOVDconst [0]) (MOVDconst [8])))) z mask)
 25045  	// result: (ZFABSMergingS z x mask)
 25046  	for {
 25047  		if v_0.Op != ssaop.OpARM64ZFABSS {
 25048  			break
 25049  		}
 25050  		_ = v_0.Args[1]
 25051  		x := v_0.Args[0]
 25052  		v_0_1 := v_0.Args[1]
 25053  		if v_0_1.Op != ssaop.OpSelect0 || v_0_1.Type != types.TypeMask {
 25054  			break
 25055  		}
 25056  		v_0_1_0 := v_0_1.Args[0]
 25057  		if v_0_1_0.Op != ssaop.OpARM64PWHILELTS {
 25058  			break
 25059  		}
 25060  		_ = v_0_1_0.Args[1]
 25061  		v_0_1_0_0 := v_0_1_0.Args[0]
 25062  		if v_0_1_0_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_1_0_0.AuxInt) != 0 {
 25063  			break
 25064  		}
 25065  		v_0_1_0_1 := v_0_1_0.Args[1]
 25066  		if v_0_1_0_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_1_0_1.AuxInt) != 8 {
 25067  			break
 25068  		}
 25069  		z := v_1
 25070  		mask := v_2
 25071  		v.Reset(ssaop.OpARM64ZFABSMergingS)
 25072  		v.AddArg3(z, x, mask)
 25073  		return true
 25074  	}
 25075  	// match: (ZSELS (ZFADDS x y) x mask)
 25076  	// result: (ZFADDMergingS x y mask)
 25077  	for {
 25078  		if v_0.Op != ssaop.OpARM64ZFADDS {
 25079  			break
 25080  		}
 25081  		_ = v_0.Args[1]
 25082  		v_0_0 := v_0.Args[0]
 25083  		v_0_1 := v_0.Args[1]
 25084  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
 25085  			x := v_0_0
 25086  			y := v_0_1
 25087  			if x != v_1 {
 25088  				continue
 25089  			}
 25090  			mask := v_2
 25091  			v.Reset(ssaop.OpARM64ZFADDMergingS)
 25092  			v.AddArg3(x, y, mask)
 25093  			return true
 25094  		}
 25095  		break
 25096  	}
 25097  	// match: (ZSELS (ZFADDS x y) y mask)
 25098  	// result: (ZFADDMergingS y x mask)
 25099  	for {
 25100  		if v_0.Op != ssaop.OpARM64ZFADDS {
 25101  			break
 25102  		}
 25103  		_ = v_0.Args[1]
 25104  		v_0_0 := v_0.Args[0]
 25105  		v_0_1 := v_0.Args[1]
 25106  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
 25107  			x := v_0_0
 25108  			y := v_0_1
 25109  			if y != v_1 {
 25110  				continue
 25111  			}
 25112  			mask := v_2
 25113  			v.Reset(ssaop.OpARM64ZFADDMergingS)
 25114  			v.AddArg3(y, x, mask)
 25115  			return true
 25116  		}
 25117  		break
 25118  	}
 25119  	// match: (ZSELS (ZFADDS x y) z mask)
 25120  	// result: (ZFADDMergingPrefixedS z x y mask)
 25121  	for {
 25122  		if v_0.Op != ssaop.OpARM64ZFADDS {
 25123  			break
 25124  		}
 25125  		y := v_0.Args[1]
 25126  		x := v_0.Args[0]
 25127  		z := v_1
 25128  		mask := v_2
 25129  		v.Reset(ssaop.OpARM64ZFADDMergingPrefixedS)
 25130  		v.AddArg4(z, x, y, mask)
 25131  		return true
 25132  	}
 25133  	// match: (ZSELS (ZFDIVS x y (Select0 <types.TypeMask> (PWHILELTS (MOVDconst [0]) (MOVDconst [8])))) x mask)
 25134  	// result: (ZFDIVMergingS x y mask)
 25135  	for {
 25136  		if v_0.Op != ssaop.OpARM64ZFDIVS {
 25137  			break
 25138  		}
 25139  		_ = v_0.Args[2]
 25140  		x := v_0.Args[0]
 25141  		y := v_0.Args[1]
 25142  		v_0_2 := v_0.Args[2]
 25143  		if v_0_2.Op != ssaop.OpSelect0 || v_0_2.Type != types.TypeMask {
 25144  			break
 25145  		}
 25146  		v_0_2_0 := v_0_2.Args[0]
 25147  		if v_0_2_0.Op != ssaop.OpARM64PWHILELTS {
 25148  			break
 25149  		}
 25150  		_ = v_0_2_0.Args[1]
 25151  		v_0_2_0_0 := v_0_2_0.Args[0]
 25152  		if v_0_2_0_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_0.AuxInt) != 0 {
 25153  			break
 25154  		}
 25155  		v_0_2_0_1 := v_0_2_0.Args[1]
 25156  		if v_0_2_0_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_1.AuxInt) != 8 || x != v_1 {
 25157  			break
 25158  		}
 25159  		mask := v_2
 25160  		v.Reset(ssaop.OpARM64ZFDIVMergingS)
 25161  		v.AddArg3(x, y, mask)
 25162  		return true
 25163  	}
 25164  	// match: (ZSELS (ZFMAXS x y (Select0 <types.TypeMask> (PWHILELTS (MOVDconst [0]) (MOVDconst [8])))) x mask)
 25165  	// result: (ZFMAXMergingS x y mask)
 25166  	for {
 25167  		if v_0.Op != ssaop.OpARM64ZFMAXS {
 25168  			break
 25169  		}
 25170  		_ = v_0.Args[2]
 25171  		x := v_0.Args[0]
 25172  		y := v_0.Args[1]
 25173  		v_0_2 := v_0.Args[2]
 25174  		if v_0_2.Op != ssaop.OpSelect0 || v_0_2.Type != types.TypeMask {
 25175  			break
 25176  		}
 25177  		v_0_2_0 := v_0_2.Args[0]
 25178  		if v_0_2_0.Op != ssaop.OpARM64PWHILELTS {
 25179  			break
 25180  		}
 25181  		_ = v_0_2_0.Args[1]
 25182  		v_0_2_0_0 := v_0_2_0.Args[0]
 25183  		if v_0_2_0_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_0.AuxInt) != 0 {
 25184  			break
 25185  		}
 25186  		v_0_2_0_1 := v_0_2_0.Args[1]
 25187  		if v_0_2_0_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_1.AuxInt) != 8 || x != v_1 {
 25188  			break
 25189  		}
 25190  		mask := v_2
 25191  		v.Reset(ssaop.OpARM64ZFMAXMergingS)
 25192  		v.AddArg3(x, y, mask)
 25193  		return true
 25194  	}
 25195  	// match: (ZSELS (ZFMINS x y (Select0 <types.TypeMask> (PWHILELTS (MOVDconst [0]) (MOVDconst [8])))) x mask)
 25196  	// result: (ZFMINMergingS x y mask)
 25197  	for {
 25198  		if v_0.Op != ssaop.OpARM64ZFMINS {
 25199  			break
 25200  		}
 25201  		_ = v_0.Args[2]
 25202  		x := v_0.Args[0]
 25203  		y := v_0.Args[1]
 25204  		v_0_2 := v_0.Args[2]
 25205  		if v_0_2.Op != ssaop.OpSelect0 || v_0_2.Type != types.TypeMask {
 25206  			break
 25207  		}
 25208  		v_0_2_0 := v_0_2.Args[0]
 25209  		if v_0_2_0.Op != ssaop.OpARM64PWHILELTS {
 25210  			break
 25211  		}
 25212  		_ = v_0_2_0.Args[1]
 25213  		v_0_2_0_0 := v_0_2_0.Args[0]
 25214  		if v_0_2_0_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_0.AuxInt) != 0 {
 25215  			break
 25216  		}
 25217  		v_0_2_0_1 := v_0_2_0.Args[1]
 25218  		if v_0_2_0_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_1.AuxInt) != 8 || x != v_1 {
 25219  			break
 25220  		}
 25221  		mask := v_2
 25222  		v.Reset(ssaop.OpARM64ZFMINMergingS)
 25223  		v.AddArg3(x, y, mask)
 25224  		return true
 25225  	}
 25226  	// match: (ZSELS (ZFMLAS x y z (Select0 <types.TypeMask> (PWHILELTS (MOVDconst [0]) (MOVDconst [8])))) x mask)
 25227  	// result: (ZFMLAMergingS x y z mask)
 25228  	for {
 25229  		if v_0.Op != ssaop.OpARM64ZFMLAS {
 25230  			break
 25231  		}
 25232  		_ = v_0.Args[3]
 25233  		x := v_0.Args[0]
 25234  		y := v_0.Args[1]
 25235  		z := v_0.Args[2]
 25236  		v_0_3 := v_0.Args[3]
 25237  		if v_0_3.Op != ssaop.OpSelect0 || v_0_3.Type != types.TypeMask {
 25238  			break
 25239  		}
 25240  		v_0_3_0 := v_0_3.Args[0]
 25241  		if v_0_3_0.Op != ssaop.OpARM64PWHILELTS {
 25242  			break
 25243  		}
 25244  		_ = v_0_3_0.Args[1]
 25245  		v_0_3_0_0 := v_0_3_0.Args[0]
 25246  		if v_0_3_0_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_3_0_0.AuxInt) != 0 {
 25247  			break
 25248  		}
 25249  		v_0_3_0_1 := v_0_3_0.Args[1]
 25250  		if v_0_3_0_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_3_0_1.AuxInt) != 8 || x != v_1 {
 25251  			break
 25252  		}
 25253  		mask := v_2
 25254  		v.Reset(ssaop.OpARM64ZFMLAMergingS)
 25255  		v.AddArg4(x, y, z, mask)
 25256  		return true
 25257  	}
 25258  	// match: (ZSELS (ZFMULS x y) x mask)
 25259  	// result: (ZFMULMergingS x y mask)
 25260  	for {
 25261  		if v_0.Op != ssaop.OpARM64ZFMULS {
 25262  			break
 25263  		}
 25264  		_ = v_0.Args[1]
 25265  		v_0_0 := v_0.Args[0]
 25266  		v_0_1 := v_0.Args[1]
 25267  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
 25268  			x := v_0_0
 25269  			y := v_0_1
 25270  			if x != v_1 {
 25271  				continue
 25272  			}
 25273  			mask := v_2
 25274  			v.Reset(ssaop.OpARM64ZFMULMergingS)
 25275  			v.AddArg3(x, y, mask)
 25276  			return true
 25277  		}
 25278  		break
 25279  	}
 25280  	// match: (ZSELS (ZFMULS x y) y mask)
 25281  	// result: (ZFMULMergingS y x mask)
 25282  	for {
 25283  		if v_0.Op != ssaop.OpARM64ZFMULS {
 25284  			break
 25285  		}
 25286  		_ = v_0.Args[1]
 25287  		v_0_0 := v_0.Args[0]
 25288  		v_0_1 := v_0.Args[1]
 25289  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
 25290  			x := v_0_0
 25291  			y := v_0_1
 25292  			if y != v_1 {
 25293  				continue
 25294  			}
 25295  			mask := v_2
 25296  			v.Reset(ssaop.OpARM64ZFMULMergingS)
 25297  			v.AddArg3(y, x, mask)
 25298  			return true
 25299  		}
 25300  		break
 25301  	}
 25302  	// match: (ZSELS (ZFMULS x y) z mask)
 25303  	// result: (ZFMULMergingPrefixedS z x y mask)
 25304  	for {
 25305  		if v_0.Op != ssaop.OpARM64ZFMULS {
 25306  			break
 25307  		}
 25308  		y := v_0.Args[1]
 25309  		x := v_0.Args[0]
 25310  		z := v_1
 25311  		mask := v_2
 25312  		v.Reset(ssaop.OpARM64ZFMULMergingPrefixedS)
 25313  		v.AddArg4(z, x, y, mask)
 25314  		return true
 25315  	}
 25316  	// match: (ZSELS (ZFNEGS x (Select0 <types.TypeMask> (PWHILELTS (MOVDconst [0]) (MOVDconst [8])))) z mask)
 25317  	// result: (ZFNEGMergingS z x mask)
 25318  	for {
 25319  		if v_0.Op != ssaop.OpARM64ZFNEGS {
 25320  			break
 25321  		}
 25322  		_ = v_0.Args[1]
 25323  		x := v_0.Args[0]
 25324  		v_0_1 := v_0.Args[1]
 25325  		if v_0_1.Op != ssaop.OpSelect0 || v_0_1.Type != types.TypeMask {
 25326  			break
 25327  		}
 25328  		v_0_1_0 := v_0_1.Args[0]
 25329  		if v_0_1_0.Op != ssaop.OpARM64PWHILELTS {
 25330  			break
 25331  		}
 25332  		_ = v_0_1_0.Args[1]
 25333  		v_0_1_0_0 := v_0_1_0.Args[0]
 25334  		if v_0_1_0_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_1_0_0.AuxInt) != 0 {
 25335  			break
 25336  		}
 25337  		v_0_1_0_1 := v_0_1_0.Args[1]
 25338  		if v_0_1_0_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_1_0_1.AuxInt) != 8 {
 25339  			break
 25340  		}
 25341  		z := v_1
 25342  		mask := v_2
 25343  		v.Reset(ssaop.OpARM64ZFNEGMergingS)
 25344  		v.AddArg3(z, x, mask)
 25345  		return true
 25346  	}
 25347  	// match: (ZSELS (ZFSQRTS x (Select0 <types.TypeMask> (PWHILELTS (MOVDconst [0]) (MOVDconst [8])))) z mask)
 25348  	// result: (ZFSQRTMergingS z x mask)
 25349  	for {
 25350  		if v_0.Op != ssaop.OpARM64ZFSQRTS {
 25351  			break
 25352  		}
 25353  		_ = v_0.Args[1]
 25354  		x := v_0.Args[0]
 25355  		v_0_1 := v_0.Args[1]
 25356  		if v_0_1.Op != ssaop.OpSelect0 || v_0_1.Type != types.TypeMask {
 25357  			break
 25358  		}
 25359  		v_0_1_0 := v_0_1.Args[0]
 25360  		if v_0_1_0.Op != ssaop.OpARM64PWHILELTS {
 25361  			break
 25362  		}
 25363  		_ = v_0_1_0.Args[1]
 25364  		v_0_1_0_0 := v_0_1_0.Args[0]
 25365  		if v_0_1_0_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_1_0_0.AuxInt) != 0 {
 25366  			break
 25367  		}
 25368  		v_0_1_0_1 := v_0_1_0.Args[1]
 25369  		if v_0_1_0_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_1_0_1.AuxInt) != 8 {
 25370  			break
 25371  		}
 25372  		z := v_1
 25373  		mask := v_2
 25374  		v.Reset(ssaop.OpARM64ZFSQRTMergingS)
 25375  		v.AddArg3(z, x, mask)
 25376  		return true
 25377  	}
 25378  	// match: (ZSELS (ZFSUBS x y) x mask)
 25379  	// result: (ZFSUBMergingS x y mask)
 25380  	for {
 25381  		if v_0.Op != ssaop.OpARM64ZFSUBS {
 25382  			break
 25383  		}
 25384  		y := v_0.Args[1]
 25385  		x := v_0.Args[0]
 25386  		if x != v_1 {
 25387  			break
 25388  		}
 25389  		mask := v_2
 25390  		v.Reset(ssaop.OpARM64ZFSUBMergingS)
 25391  		v.AddArg3(x, y, mask)
 25392  		return true
 25393  	}
 25394  	// match: (ZSELS (ZMLAS x y z (Select0 <types.TypeMask> (PWHILELTS (MOVDconst [0]) (MOVDconst [8])))) x mask)
 25395  	// result: (ZMLAMergingS x y z mask)
 25396  	for {
 25397  		if v_0.Op != ssaop.OpARM64ZMLAS {
 25398  			break
 25399  		}
 25400  		_ = v_0.Args[3]
 25401  		x := v_0.Args[0]
 25402  		y := v_0.Args[1]
 25403  		z := v_0.Args[2]
 25404  		v_0_3 := v_0.Args[3]
 25405  		if v_0_3.Op != ssaop.OpSelect0 || v_0_3.Type != types.TypeMask {
 25406  			break
 25407  		}
 25408  		v_0_3_0 := v_0_3.Args[0]
 25409  		if v_0_3_0.Op != ssaop.OpARM64PWHILELTS {
 25410  			break
 25411  		}
 25412  		_ = v_0_3_0.Args[1]
 25413  		v_0_3_0_0 := v_0_3_0.Args[0]
 25414  		if v_0_3_0_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_3_0_0.AuxInt) != 0 {
 25415  			break
 25416  		}
 25417  		v_0_3_0_1 := v_0_3_0.Args[1]
 25418  		if v_0_3_0_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_3_0_1.AuxInt) != 8 || x != v_1 {
 25419  			break
 25420  		}
 25421  		mask := v_2
 25422  		v.Reset(ssaop.OpARM64ZMLAMergingS)
 25423  		v.AddArg4(x, y, z, mask)
 25424  		return true
 25425  	}
 25426  	// match: (ZSELS (ZMULMergingS x y (Select0 <types.TypeMask> (PWHILELTS (MOVDconst [0]) (MOVDconst [8])))) x mask)
 25427  	// result: (ZMULMergingS x y mask)
 25428  	for {
 25429  		if v_0.Op != ssaop.OpARM64ZMULMergingS {
 25430  			break
 25431  		}
 25432  		_ = v_0.Args[2]
 25433  		x := v_0.Args[0]
 25434  		y := v_0.Args[1]
 25435  		v_0_2 := v_0.Args[2]
 25436  		if v_0_2.Op != ssaop.OpSelect0 || v_0_2.Type != types.TypeMask {
 25437  			break
 25438  		}
 25439  		v_0_2_0 := v_0_2.Args[0]
 25440  		if v_0_2_0.Op != ssaop.OpARM64PWHILELTS {
 25441  			break
 25442  		}
 25443  		_ = v_0_2_0.Args[1]
 25444  		v_0_2_0_0 := v_0_2_0.Args[0]
 25445  		if v_0_2_0_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_0.AuxInt) != 0 {
 25446  			break
 25447  		}
 25448  		v_0_2_0_1 := v_0_2_0.Args[1]
 25449  		if v_0_2_0_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_1.AuxInt) != 8 || x != v_1 {
 25450  			break
 25451  		}
 25452  		mask := v_2
 25453  		v.Reset(ssaop.OpARM64ZMULMergingS)
 25454  		v.AddArg3(x, y, mask)
 25455  		return true
 25456  	}
 25457  	// match: (ZSELS (ZMULMergingS x y (Select0 <types.TypeMask> (PWHILELTS (MOVDconst [0]) (MOVDconst [8])))) y mask)
 25458  	// result: (ZMULMergingS y x mask)
 25459  	for {
 25460  		if v_0.Op != ssaop.OpARM64ZMULMergingS {
 25461  			break
 25462  		}
 25463  		_ = v_0.Args[2]
 25464  		x := v_0.Args[0]
 25465  		y := v_0.Args[1]
 25466  		v_0_2 := v_0.Args[2]
 25467  		if v_0_2.Op != ssaop.OpSelect0 || v_0_2.Type != types.TypeMask {
 25468  			break
 25469  		}
 25470  		v_0_2_0 := v_0_2.Args[0]
 25471  		if v_0_2_0.Op != ssaop.OpARM64PWHILELTS {
 25472  			break
 25473  		}
 25474  		_ = v_0_2_0.Args[1]
 25475  		v_0_2_0_0 := v_0_2_0.Args[0]
 25476  		if v_0_2_0_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_0.AuxInt) != 0 {
 25477  			break
 25478  		}
 25479  		v_0_2_0_1 := v_0_2_0.Args[1]
 25480  		if v_0_2_0_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_1.AuxInt) != 8 || y != v_1 {
 25481  			break
 25482  		}
 25483  		mask := v_2
 25484  		v.Reset(ssaop.OpARM64ZMULMergingS)
 25485  		v.AddArg3(y, x, mask)
 25486  		return true
 25487  	}
 25488  	// match: (ZSELS (ZMULMergingS x y (Select0 <types.TypeMask> (PWHILELTS (MOVDconst [0]) (MOVDconst [8])))) z mask)
 25489  	// result: (ZMULMergingPrefixedS z x y mask)
 25490  	for {
 25491  		if v_0.Op != ssaop.OpARM64ZMULMergingS {
 25492  			break
 25493  		}
 25494  		_ = v_0.Args[2]
 25495  		x := v_0.Args[0]
 25496  		y := v_0.Args[1]
 25497  		v_0_2 := v_0.Args[2]
 25498  		if v_0_2.Op != ssaop.OpSelect0 || v_0_2.Type != types.TypeMask {
 25499  			break
 25500  		}
 25501  		v_0_2_0 := v_0_2.Args[0]
 25502  		if v_0_2_0.Op != ssaop.OpARM64PWHILELTS {
 25503  			break
 25504  		}
 25505  		_ = v_0_2_0.Args[1]
 25506  		v_0_2_0_0 := v_0_2_0.Args[0]
 25507  		if v_0_2_0_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_0.AuxInt) != 0 {
 25508  			break
 25509  		}
 25510  		v_0_2_0_1 := v_0_2_0.Args[1]
 25511  		if v_0_2_0_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_1.AuxInt) != 8 {
 25512  			break
 25513  		}
 25514  		z := v_1
 25515  		mask := v_2
 25516  		v.Reset(ssaop.OpARM64ZMULMergingPrefixedS)
 25517  		v.AddArg4(z, x, y, mask)
 25518  		return true
 25519  	}
 25520  	// match: (ZSELS (ZNEGS x (Select0 <types.TypeMask> (PWHILELTS (MOVDconst [0]) (MOVDconst [8])))) z mask)
 25521  	// result: (ZNEGMergingS z x mask)
 25522  	for {
 25523  		if v_0.Op != ssaop.OpARM64ZNEGS {
 25524  			break
 25525  		}
 25526  		_ = v_0.Args[1]
 25527  		x := v_0.Args[0]
 25528  		v_0_1 := v_0.Args[1]
 25529  		if v_0_1.Op != ssaop.OpSelect0 || v_0_1.Type != types.TypeMask {
 25530  			break
 25531  		}
 25532  		v_0_1_0 := v_0_1.Args[0]
 25533  		if v_0_1_0.Op != ssaop.OpARM64PWHILELTS {
 25534  			break
 25535  		}
 25536  		_ = v_0_1_0.Args[1]
 25537  		v_0_1_0_0 := v_0_1_0.Args[0]
 25538  		if v_0_1_0_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_1_0_0.AuxInt) != 0 {
 25539  			break
 25540  		}
 25541  		v_0_1_0_1 := v_0_1_0.Args[1]
 25542  		if v_0_1_0_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_1_0_1.AuxInt) != 8 {
 25543  			break
 25544  		}
 25545  		z := v_1
 25546  		mask := v_2
 25547  		v.Reset(ssaop.OpARM64ZNEGMergingS)
 25548  		v.AddArg3(z, x, mask)
 25549  		return true
 25550  	}
 25551  	// match: (ZSELS (ZORRD x y) x mask)
 25552  	// result: (ZORRMergingS x y mask)
 25553  	for {
 25554  		if v_0.Op != ssaop.OpARM64ZORRD {
 25555  			break
 25556  		}
 25557  		_ = v_0.Args[1]
 25558  		v_0_0 := v_0.Args[0]
 25559  		v_0_1 := v_0.Args[1]
 25560  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
 25561  			x := v_0_0
 25562  			y := v_0_1
 25563  			if x != v_1 {
 25564  				continue
 25565  			}
 25566  			mask := v_2
 25567  			v.Reset(ssaop.OpARM64ZORRMergingS)
 25568  			v.AddArg3(x, y, mask)
 25569  			return true
 25570  		}
 25571  		break
 25572  	}
 25573  	// match: (ZSELS (ZORRD x y) y mask)
 25574  	// result: (ZORRMergingS y x mask)
 25575  	for {
 25576  		if v_0.Op != ssaop.OpARM64ZORRD {
 25577  			break
 25578  		}
 25579  		_ = v_0.Args[1]
 25580  		v_0_0 := v_0.Args[0]
 25581  		v_0_1 := v_0.Args[1]
 25582  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
 25583  			x := v_0_0
 25584  			y := v_0_1
 25585  			if y != v_1 {
 25586  				continue
 25587  			}
 25588  			mask := v_2
 25589  			v.Reset(ssaop.OpARM64ZORRMergingS)
 25590  			v.AddArg3(y, x, mask)
 25591  			return true
 25592  		}
 25593  		break
 25594  	}
 25595  	// match: (ZSELS (ZORRD x y) z mask)
 25596  	// result: (ZORRMergingPrefixedS z x y mask)
 25597  	for {
 25598  		if v_0.Op != ssaop.OpARM64ZORRD {
 25599  			break
 25600  		}
 25601  		y := v_0.Args[1]
 25602  		x := v_0.Args[0]
 25603  		z := v_1
 25604  		mask := v_2
 25605  		v.Reset(ssaop.OpARM64ZORRMergingPrefixedS)
 25606  		v.AddArg4(z, x, y, mask)
 25607  		return true
 25608  	}
 25609  	// match: (ZSELS (ZSDIVS x y (Select0 <types.TypeMask> (PWHILELTS (MOVDconst [0]) (MOVDconst [8])))) x mask)
 25610  	// result: (ZSDIVMergingS x y mask)
 25611  	for {
 25612  		if v_0.Op != ssaop.OpARM64ZSDIVS {
 25613  			break
 25614  		}
 25615  		_ = v_0.Args[2]
 25616  		x := v_0.Args[0]
 25617  		y := v_0.Args[1]
 25618  		v_0_2 := v_0.Args[2]
 25619  		if v_0_2.Op != ssaop.OpSelect0 || v_0_2.Type != types.TypeMask {
 25620  			break
 25621  		}
 25622  		v_0_2_0 := v_0_2.Args[0]
 25623  		if v_0_2_0.Op != ssaop.OpARM64PWHILELTS {
 25624  			break
 25625  		}
 25626  		_ = v_0_2_0.Args[1]
 25627  		v_0_2_0_0 := v_0_2_0.Args[0]
 25628  		if v_0_2_0_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_0.AuxInt) != 0 {
 25629  			break
 25630  		}
 25631  		v_0_2_0_1 := v_0_2_0.Args[1]
 25632  		if v_0_2_0_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_1.AuxInt) != 8 || x != v_1 {
 25633  			break
 25634  		}
 25635  		mask := v_2
 25636  		v.Reset(ssaop.OpARM64ZSDIVMergingS)
 25637  		v.AddArg3(x, y, mask)
 25638  		return true
 25639  	}
 25640  	// match: (ZSELS (ZSMAXS x y (Select0 <types.TypeMask> (PWHILELTS (MOVDconst [0]) (MOVDconst [8])))) x mask)
 25641  	// result: (ZSMAXMergingS x y mask)
 25642  	for {
 25643  		if v_0.Op != ssaop.OpARM64ZSMAXS {
 25644  			break
 25645  		}
 25646  		_ = v_0.Args[2]
 25647  		v_0_0 := v_0.Args[0]
 25648  		v_0_1 := v_0.Args[1]
 25649  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
 25650  			x := v_0_0
 25651  			y := v_0_1
 25652  			v_0_2 := v_0.Args[2]
 25653  			if v_0_2.Op != ssaop.OpSelect0 || v_0_2.Type != types.TypeMask {
 25654  				continue
 25655  			}
 25656  			v_0_2_0 := v_0_2.Args[0]
 25657  			if v_0_2_0.Op != ssaop.OpARM64PWHILELTS {
 25658  				continue
 25659  			}
 25660  			_ = v_0_2_0.Args[1]
 25661  			v_0_2_0_0 := v_0_2_0.Args[0]
 25662  			if v_0_2_0_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_0.AuxInt) != 0 {
 25663  				continue
 25664  			}
 25665  			v_0_2_0_1 := v_0_2_0.Args[1]
 25666  			if v_0_2_0_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_1.AuxInt) != 8 || x != v_1 {
 25667  				continue
 25668  			}
 25669  			mask := v_2
 25670  			v.Reset(ssaop.OpARM64ZSMAXMergingS)
 25671  			v.AddArg3(x, y, mask)
 25672  			return true
 25673  		}
 25674  		break
 25675  	}
 25676  	// match: (ZSELS (ZSMAXS x y (Select0 <types.TypeMask> (PWHILELTS (MOVDconst [0]) (MOVDconst [8])))) y mask)
 25677  	// result: (ZSMAXMergingS y x mask)
 25678  	for {
 25679  		if v_0.Op != ssaop.OpARM64ZSMAXS {
 25680  			break
 25681  		}
 25682  		_ = v_0.Args[2]
 25683  		v_0_0 := v_0.Args[0]
 25684  		v_0_1 := v_0.Args[1]
 25685  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
 25686  			x := v_0_0
 25687  			y := v_0_1
 25688  			v_0_2 := v_0.Args[2]
 25689  			if v_0_2.Op != ssaop.OpSelect0 || v_0_2.Type != types.TypeMask {
 25690  				continue
 25691  			}
 25692  			v_0_2_0 := v_0_2.Args[0]
 25693  			if v_0_2_0.Op != ssaop.OpARM64PWHILELTS {
 25694  				continue
 25695  			}
 25696  			_ = v_0_2_0.Args[1]
 25697  			v_0_2_0_0 := v_0_2_0.Args[0]
 25698  			if v_0_2_0_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_0.AuxInt) != 0 {
 25699  				continue
 25700  			}
 25701  			v_0_2_0_1 := v_0_2_0.Args[1]
 25702  			if v_0_2_0_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_1.AuxInt) != 8 || y != v_1 {
 25703  				continue
 25704  			}
 25705  			mask := v_2
 25706  			v.Reset(ssaop.OpARM64ZSMAXMergingS)
 25707  			v.AddArg3(y, x, mask)
 25708  			return true
 25709  		}
 25710  		break
 25711  	}
 25712  	// match: (ZSELS (ZSMAXS x y (Select0 <types.TypeMask> (PWHILELTS (MOVDconst [0]) (MOVDconst [8])))) z mask)
 25713  	// result: (ZSMAXMergingPrefixedS z x y mask)
 25714  	for {
 25715  		if v_0.Op != ssaop.OpARM64ZSMAXS {
 25716  			break
 25717  		}
 25718  		_ = v_0.Args[2]
 25719  		x := v_0.Args[0]
 25720  		y := v_0.Args[1]
 25721  		v_0_2 := v_0.Args[2]
 25722  		if v_0_2.Op != ssaop.OpSelect0 || v_0_2.Type != types.TypeMask {
 25723  			break
 25724  		}
 25725  		v_0_2_0 := v_0_2.Args[0]
 25726  		if v_0_2_0.Op != ssaop.OpARM64PWHILELTS {
 25727  			break
 25728  		}
 25729  		_ = v_0_2_0.Args[1]
 25730  		v_0_2_0_0 := v_0_2_0.Args[0]
 25731  		if v_0_2_0_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_0.AuxInt) != 0 {
 25732  			break
 25733  		}
 25734  		v_0_2_0_1 := v_0_2_0.Args[1]
 25735  		if v_0_2_0_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_1.AuxInt) != 8 {
 25736  			break
 25737  		}
 25738  		z := v_1
 25739  		mask := v_2
 25740  		v.Reset(ssaop.OpARM64ZSMAXMergingPrefixedS)
 25741  		v.AddArg4(z, x, y, mask)
 25742  		return true
 25743  	}
 25744  	// match: (ZSELS (ZSMINS x y (Select0 <types.TypeMask> (PWHILELTS (MOVDconst [0]) (MOVDconst [8])))) x mask)
 25745  	// result: (ZSMINMergingS x y mask)
 25746  	for {
 25747  		if v_0.Op != ssaop.OpARM64ZSMINS {
 25748  			break
 25749  		}
 25750  		_ = v_0.Args[2]
 25751  		v_0_0 := v_0.Args[0]
 25752  		v_0_1 := v_0.Args[1]
 25753  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
 25754  			x := v_0_0
 25755  			y := v_0_1
 25756  			v_0_2 := v_0.Args[2]
 25757  			if v_0_2.Op != ssaop.OpSelect0 || v_0_2.Type != types.TypeMask {
 25758  				continue
 25759  			}
 25760  			v_0_2_0 := v_0_2.Args[0]
 25761  			if v_0_2_0.Op != ssaop.OpARM64PWHILELTS {
 25762  				continue
 25763  			}
 25764  			_ = v_0_2_0.Args[1]
 25765  			v_0_2_0_0 := v_0_2_0.Args[0]
 25766  			if v_0_2_0_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_0.AuxInt) != 0 {
 25767  				continue
 25768  			}
 25769  			v_0_2_0_1 := v_0_2_0.Args[1]
 25770  			if v_0_2_0_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_1.AuxInt) != 8 || x != v_1 {
 25771  				continue
 25772  			}
 25773  			mask := v_2
 25774  			v.Reset(ssaop.OpARM64ZSMINMergingS)
 25775  			v.AddArg3(x, y, mask)
 25776  			return true
 25777  		}
 25778  		break
 25779  	}
 25780  	// match: (ZSELS (ZSMINS x y (Select0 <types.TypeMask> (PWHILELTS (MOVDconst [0]) (MOVDconst [8])))) y mask)
 25781  	// result: (ZSMINMergingS y x mask)
 25782  	for {
 25783  		if v_0.Op != ssaop.OpARM64ZSMINS {
 25784  			break
 25785  		}
 25786  		_ = v_0.Args[2]
 25787  		v_0_0 := v_0.Args[0]
 25788  		v_0_1 := v_0.Args[1]
 25789  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
 25790  			x := v_0_0
 25791  			y := v_0_1
 25792  			v_0_2 := v_0.Args[2]
 25793  			if v_0_2.Op != ssaop.OpSelect0 || v_0_2.Type != types.TypeMask {
 25794  				continue
 25795  			}
 25796  			v_0_2_0 := v_0_2.Args[0]
 25797  			if v_0_2_0.Op != ssaop.OpARM64PWHILELTS {
 25798  				continue
 25799  			}
 25800  			_ = v_0_2_0.Args[1]
 25801  			v_0_2_0_0 := v_0_2_0.Args[0]
 25802  			if v_0_2_0_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_0.AuxInt) != 0 {
 25803  				continue
 25804  			}
 25805  			v_0_2_0_1 := v_0_2_0.Args[1]
 25806  			if v_0_2_0_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_1.AuxInt) != 8 || y != v_1 {
 25807  				continue
 25808  			}
 25809  			mask := v_2
 25810  			v.Reset(ssaop.OpARM64ZSMINMergingS)
 25811  			v.AddArg3(y, x, mask)
 25812  			return true
 25813  		}
 25814  		break
 25815  	}
 25816  	// match: (ZSELS (ZSMINS x y (Select0 <types.TypeMask> (PWHILELTS (MOVDconst [0]) (MOVDconst [8])))) z mask)
 25817  	// result: (ZSMINMergingPrefixedS z x y mask)
 25818  	for {
 25819  		if v_0.Op != ssaop.OpARM64ZSMINS {
 25820  			break
 25821  		}
 25822  		_ = v_0.Args[2]
 25823  		x := v_0.Args[0]
 25824  		y := v_0.Args[1]
 25825  		v_0_2 := v_0.Args[2]
 25826  		if v_0_2.Op != ssaop.OpSelect0 || v_0_2.Type != types.TypeMask {
 25827  			break
 25828  		}
 25829  		v_0_2_0 := v_0_2.Args[0]
 25830  		if v_0_2_0.Op != ssaop.OpARM64PWHILELTS {
 25831  			break
 25832  		}
 25833  		_ = v_0_2_0.Args[1]
 25834  		v_0_2_0_0 := v_0_2_0.Args[0]
 25835  		if v_0_2_0_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_0.AuxInt) != 0 {
 25836  			break
 25837  		}
 25838  		v_0_2_0_1 := v_0_2_0.Args[1]
 25839  		if v_0_2_0_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_1.AuxInt) != 8 {
 25840  			break
 25841  		}
 25842  		z := v_1
 25843  		mask := v_2
 25844  		v.Reset(ssaop.OpARM64ZSMINMergingPrefixedS)
 25845  		v.AddArg4(z, x, y, mask)
 25846  		return true
 25847  	}
 25848  	// match: (ZSELS (ZSMULHMergingS x y (Select0 <types.TypeMask> (PWHILELTS (MOVDconst [0]) (MOVDconst [8])))) x mask)
 25849  	// result: (ZSMULHMergingS x y mask)
 25850  	for {
 25851  		if v_0.Op != ssaop.OpARM64ZSMULHMergingS {
 25852  			break
 25853  		}
 25854  		_ = v_0.Args[2]
 25855  		x := v_0.Args[0]
 25856  		y := v_0.Args[1]
 25857  		v_0_2 := v_0.Args[2]
 25858  		if v_0_2.Op != ssaop.OpSelect0 || v_0_2.Type != types.TypeMask {
 25859  			break
 25860  		}
 25861  		v_0_2_0 := v_0_2.Args[0]
 25862  		if v_0_2_0.Op != ssaop.OpARM64PWHILELTS {
 25863  			break
 25864  		}
 25865  		_ = v_0_2_0.Args[1]
 25866  		v_0_2_0_0 := v_0_2_0.Args[0]
 25867  		if v_0_2_0_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_0.AuxInt) != 0 {
 25868  			break
 25869  		}
 25870  		v_0_2_0_1 := v_0_2_0.Args[1]
 25871  		if v_0_2_0_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_1.AuxInt) != 8 || x != v_1 {
 25872  			break
 25873  		}
 25874  		mask := v_2
 25875  		v.Reset(ssaop.OpARM64ZSMULHMergingS)
 25876  		v.AddArg3(x, y, mask)
 25877  		return true
 25878  	}
 25879  	// match: (ZSELS (ZSMULHMergingS x y (Select0 <types.TypeMask> (PWHILELTS (MOVDconst [0]) (MOVDconst [8])))) y mask)
 25880  	// result: (ZSMULHMergingS y x mask)
 25881  	for {
 25882  		if v_0.Op != ssaop.OpARM64ZSMULHMergingS {
 25883  			break
 25884  		}
 25885  		_ = v_0.Args[2]
 25886  		x := v_0.Args[0]
 25887  		y := v_0.Args[1]
 25888  		v_0_2 := v_0.Args[2]
 25889  		if v_0_2.Op != ssaop.OpSelect0 || v_0_2.Type != types.TypeMask {
 25890  			break
 25891  		}
 25892  		v_0_2_0 := v_0_2.Args[0]
 25893  		if v_0_2_0.Op != ssaop.OpARM64PWHILELTS {
 25894  			break
 25895  		}
 25896  		_ = v_0_2_0.Args[1]
 25897  		v_0_2_0_0 := v_0_2_0.Args[0]
 25898  		if v_0_2_0_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_0.AuxInt) != 0 {
 25899  			break
 25900  		}
 25901  		v_0_2_0_1 := v_0_2_0.Args[1]
 25902  		if v_0_2_0_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_1.AuxInt) != 8 || y != v_1 {
 25903  			break
 25904  		}
 25905  		mask := v_2
 25906  		v.Reset(ssaop.OpARM64ZSMULHMergingS)
 25907  		v.AddArg3(y, x, mask)
 25908  		return true
 25909  	}
 25910  	// match: (ZSELS (ZSMULHMergingS x y (Select0 <types.TypeMask> (PWHILELTS (MOVDconst [0]) (MOVDconst [8])))) z mask)
 25911  	// result: (ZSMULHMergingPrefixedS z x y mask)
 25912  	for {
 25913  		if v_0.Op != ssaop.OpARM64ZSMULHMergingS {
 25914  			break
 25915  		}
 25916  		_ = v_0.Args[2]
 25917  		x := v_0.Args[0]
 25918  		y := v_0.Args[1]
 25919  		v_0_2 := v_0.Args[2]
 25920  		if v_0_2.Op != ssaop.OpSelect0 || v_0_2.Type != types.TypeMask {
 25921  			break
 25922  		}
 25923  		v_0_2_0 := v_0_2.Args[0]
 25924  		if v_0_2_0.Op != ssaop.OpARM64PWHILELTS {
 25925  			break
 25926  		}
 25927  		_ = v_0_2_0.Args[1]
 25928  		v_0_2_0_0 := v_0_2_0.Args[0]
 25929  		if v_0_2_0_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_0.AuxInt) != 0 {
 25930  			break
 25931  		}
 25932  		v_0_2_0_1 := v_0_2_0.Args[1]
 25933  		if v_0_2_0_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_1.AuxInt) != 8 {
 25934  			break
 25935  		}
 25936  		z := v_1
 25937  		mask := v_2
 25938  		v.Reset(ssaop.OpARM64ZSMULHMergingPrefixedS)
 25939  		v.AddArg4(z, x, y, mask)
 25940  		return true
 25941  	}
 25942  	// match: (ZSELS (ZSQADDS x y) x mask)
 25943  	// result: (ZSQADDMergingS x y mask)
 25944  	for {
 25945  		if v_0.Op != ssaop.OpARM64ZSQADDS {
 25946  			break
 25947  		}
 25948  		_ = v_0.Args[1]
 25949  		v_0_0 := v_0.Args[0]
 25950  		v_0_1 := v_0.Args[1]
 25951  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
 25952  			x := v_0_0
 25953  			y := v_0_1
 25954  			if x != v_1 {
 25955  				continue
 25956  			}
 25957  			mask := v_2
 25958  			v.Reset(ssaop.OpARM64ZSQADDMergingS)
 25959  			v.AddArg3(x, y, mask)
 25960  			return true
 25961  		}
 25962  		break
 25963  	}
 25964  	// match: (ZSELS (ZSQADDS x y) y mask)
 25965  	// result: (ZSQADDMergingS y x mask)
 25966  	for {
 25967  		if v_0.Op != ssaop.OpARM64ZSQADDS {
 25968  			break
 25969  		}
 25970  		_ = v_0.Args[1]
 25971  		v_0_0 := v_0.Args[0]
 25972  		v_0_1 := v_0.Args[1]
 25973  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
 25974  			x := v_0_0
 25975  			y := v_0_1
 25976  			if y != v_1 {
 25977  				continue
 25978  			}
 25979  			mask := v_2
 25980  			v.Reset(ssaop.OpARM64ZSQADDMergingS)
 25981  			v.AddArg3(y, x, mask)
 25982  			return true
 25983  		}
 25984  		break
 25985  	}
 25986  	// match: (ZSELS (ZSQADDS x y) z mask)
 25987  	// result: (ZSQADDMergingPrefixedS z x y mask)
 25988  	for {
 25989  		if v_0.Op != ssaop.OpARM64ZSQADDS {
 25990  			break
 25991  		}
 25992  		y := v_0.Args[1]
 25993  		x := v_0.Args[0]
 25994  		z := v_1
 25995  		mask := v_2
 25996  		v.Reset(ssaop.OpARM64ZSQADDMergingPrefixedS)
 25997  		v.AddArg4(z, x, y, mask)
 25998  		return true
 25999  	}
 26000  	// match: (ZSELS (ZSQSUBS x y) x mask)
 26001  	// result: (ZSQSUBMergingS x y mask)
 26002  	for {
 26003  		if v_0.Op != ssaop.OpARM64ZSQSUBS {
 26004  			break
 26005  		}
 26006  		y := v_0.Args[1]
 26007  		x := v_0.Args[0]
 26008  		if x != v_1 {
 26009  			break
 26010  		}
 26011  		mask := v_2
 26012  		v.Reset(ssaop.OpARM64ZSQSUBMergingS)
 26013  		v.AddArg3(x, y, mask)
 26014  		return true
 26015  	}
 26016  	// match: (ZSELS (ZSUBS x y) x mask)
 26017  	// result: (ZSUBMergingS x y mask)
 26018  	for {
 26019  		if v_0.Op != ssaop.OpARM64ZSUBS {
 26020  			break
 26021  		}
 26022  		y := v_0.Args[1]
 26023  		x := v_0.Args[0]
 26024  		if x != v_1 {
 26025  			break
 26026  		}
 26027  		mask := v_2
 26028  		v.Reset(ssaop.OpARM64ZSUBMergingS)
 26029  		v.AddArg3(x, y, mask)
 26030  		return true
 26031  	}
 26032  	// match: (ZSELS (ZUDIVS x y (Select0 <types.TypeMask> (PWHILELTS (MOVDconst [0]) (MOVDconst [8])))) x mask)
 26033  	// result: (ZUDIVMergingS x y mask)
 26034  	for {
 26035  		if v_0.Op != ssaop.OpARM64ZUDIVS {
 26036  			break
 26037  		}
 26038  		_ = v_0.Args[2]
 26039  		x := v_0.Args[0]
 26040  		y := v_0.Args[1]
 26041  		v_0_2 := v_0.Args[2]
 26042  		if v_0_2.Op != ssaop.OpSelect0 || v_0_2.Type != types.TypeMask {
 26043  			break
 26044  		}
 26045  		v_0_2_0 := v_0_2.Args[0]
 26046  		if v_0_2_0.Op != ssaop.OpARM64PWHILELTS {
 26047  			break
 26048  		}
 26049  		_ = v_0_2_0.Args[1]
 26050  		v_0_2_0_0 := v_0_2_0.Args[0]
 26051  		if v_0_2_0_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_0.AuxInt) != 0 {
 26052  			break
 26053  		}
 26054  		v_0_2_0_1 := v_0_2_0.Args[1]
 26055  		if v_0_2_0_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_1.AuxInt) != 8 || x != v_1 {
 26056  			break
 26057  		}
 26058  		mask := v_2
 26059  		v.Reset(ssaop.OpARM64ZUDIVMergingS)
 26060  		v.AddArg3(x, y, mask)
 26061  		return true
 26062  	}
 26063  	// match: (ZSELS (ZUMAXS x y (Select0 <types.TypeMask> (PWHILELTS (MOVDconst [0]) (MOVDconst [8])))) x mask)
 26064  	// result: (ZUMAXMergingS x y mask)
 26065  	for {
 26066  		if v_0.Op != ssaop.OpARM64ZUMAXS {
 26067  			break
 26068  		}
 26069  		_ = v_0.Args[2]
 26070  		v_0_0 := v_0.Args[0]
 26071  		v_0_1 := v_0.Args[1]
 26072  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
 26073  			x := v_0_0
 26074  			y := v_0_1
 26075  			v_0_2 := v_0.Args[2]
 26076  			if v_0_2.Op != ssaop.OpSelect0 || v_0_2.Type != types.TypeMask {
 26077  				continue
 26078  			}
 26079  			v_0_2_0 := v_0_2.Args[0]
 26080  			if v_0_2_0.Op != ssaop.OpARM64PWHILELTS {
 26081  				continue
 26082  			}
 26083  			_ = v_0_2_0.Args[1]
 26084  			v_0_2_0_0 := v_0_2_0.Args[0]
 26085  			if v_0_2_0_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_0.AuxInt) != 0 {
 26086  				continue
 26087  			}
 26088  			v_0_2_0_1 := v_0_2_0.Args[1]
 26089  			if v_0_2_0_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_1.AuxInt) != 8 || x != v_1 {
 26090  				continue
 26091  			}
 26092  			mask := v_2
 26093  			v.Reset(ssaop.OpARM64ZUMAXMergingS)
 26094  			v.AddArg3(x, y, mask)
 26095  			return true
 26096  		}
 26097  		break
 26098  	}
 26099  	// match: (ZSELS (ZUMAXS x y (Select0 <types.TypeMask> (PWHILELTS (MOVDconst [0]) (MOVDconst [8])))) y mask)
 26100  	// result: (ZUMAXMergingS y x mask)
 26101  	for {
 26102  		if v_0.Op != ssaop.OpARM64ZUMAXS {
 26103  			break
 26104  		}
 26105  		_ = v_0.Args[2]
 26106  		v_0_0 := v_0.Args[0]
 26107  		v_0_1 := v_0.Args[1]
 26108  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
 26109  			x := v_0_0
 26110  			y := v_0_1
 26111  			v_0_2 := v_0.Args[2]
 26112  			if v_0_2.Op != ssaop.OpSelect0 || v_0_2.Type != types.TypeMask {
 26113  				continue
 26114  			}
 26115  			v_0_2_0 := v_0_2.Args[0]
 26116  			if v_0_2_0.Op != ssaop.OpARM64PWHILELTS {
 26117  				continue
 26118  			}
 26119  			_ = v_0_2_0.Args[1]
 26120  			v_0_2_0_0 := v_0_2_0.Args[0]
 26121  			if v_0_2_0_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_0.AuxInt) != 0 {
 26122  				continue
 26123  			}
 26124  			v_0_2_0_1 := v_0_2_0.Args[1]
 26125  			if v_0_2_0_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_1.AuxInt) != 8 || y != v_1 {
 26126  				continue
 26127  			}
 26128  			mask := v_2
 26129  			v.Reset(ssaop.OpARM64ZUMAXMergingS)
 26130  			v.AddArg3(y, x, mask)
 26131  			return true
 26132  		}
 26133  		break
 26134  	}
 26135  	// match: (ZSELS (ZUMAXS x y (Select0 <types.TypeMask> (PWHILELTS (MOVDconst [0]) (MOVDconst [8])))) z mask)
 26136  	// result: (ZUMAXMergingPrefixedS z x y mask)
 26137  	for {
 26138  		if v_0.Op != ssaop.OpARM64ZUMAXS {
 26139  			break
 26140  		}
 26141  		_ = v_0.Args[2]
 26142  		x := v_0.Args[0]
 26143  		y := v_0.Args[1]
 26144  		v_0_2 := v_0.Args[2]
 26145  		if v_0_2.Op != ssaop.OpSelect0 || v_0_2.Type != types.TypeMask {
 26146  			break
 26147  		}
 26148  		v_0_2_0 := v_0_2.Args[0]
 26149  		if v_0_2_0.Op != ssaop.OpARM64PWHILELTS {
 26150  			break
 26151  		}
 26152  		_ = v_0_2_0.Args[1]
 26153  		v_0_2_0_0 := v_0_2_0.Args[0]
 26154  		if v_0_2_0_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_0.AuxInt) != 0 {
 26155  			break
 26156  		}
 26157  		v_0_2_0_1 := v_0_2_0.Args[1]
 26158  		if v_0_2_0_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_1.AuxInt) != 8 {
 26159  			break
 26160  		}
 26161  		z := v_1
 26162  		mask := v_2
 26163  		v.Reset(ssaop.OpARM64ZUMAXMergingPrefixedS)
 26164  		v.AddArg4(z, x, y, mask)
 26165  		return true
 26166  	}
 26167  	// match: (ZSELS (ZUMINS x y (Select0 <types.TypeMask> (PWHILELTS (MOVDconst [0]) (MOVDconst [8])))) x mask)
 26168  	// result: (ZUMINMergingS x y mask)
 26169  	for {
 26170  		if v_0.Op != ssaop.OpARM64ZUMINS {
 26171  			break
 26172  		}
 26173  		_ = v_0.Args[2]
 26174  		v_0_0 := v_0.Args[0]
 26175  		v_0_1 := v_0.Args[1]
 26176  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
 26177  			x := v_0_0
 26178  			y := v_0_1
 26179  			v_0_2 := v_0.Args[2]
 26180  			if v_0_2.Op != ssaop.OpSelect0 || v_0_2.Type != types.TypeMask {
 26181  				continue
 26182  			}
 26183  			v_0_2_0 := v_0_2.Args[0]
 26184  			if v_0_2_0.Op != ssaop.OpARM64PWHILELTS {
 26185  				continue
 26186  			}
 26187  			_ = v_0_2_0.Args[1]
 26188  			v_0_2_0_0 := v_0_2_0.Args[0]
 26189  			if v_0_2_0_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_0.AuxInt) != 0 {
 26190  				continue
 26191  			}
 26192  			v_0_2_0_1 := v_0_2_0.Args[1]
 26193  			if v_0_2_0_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_1.AuxInt) != 8 || x != v_1 {
 26194  				continue
 26195  			}
 26196  			mask := v_2
 26197  			v.Reset(ssaop.OpARM64ZUMINMergingS)
 26198  			v.AddArg3(x, y, mask)
 26199  			return true
 26200  		}
 26201  		break
 26202  	}
 26203  	// match: (ZSELS (ZUMINS x y (Select0 <types.TypeMask> (PWHILELTS (MOVDconst [0]) (MOVDconst [8])))) y mask)
 26204  	// result: (ZUMINMergingS y x mask)
 26205  	for {
 26206  		if v_0.Op != ssaop.OpARM64ZUMINS {
 26207  			break
 26208  		}
 26209  		_ = v_0.Args[2]
 26210  		v_0_0 := v_0.Args[0]
 26211  		v_0_1 := v_0.Args[1]
 26212  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
 26213  			x := v_0_0
 26214  			y := v_0_1
 26215  			v_0_2 := v_0.Args[2]
 26216  			if v_0_2.Op != ssaop.OpSelect0 || v_0_2.Type != types.TypeMask {
 26217  				continue
 26218  			}
 26219  			v_0_2_0 := v_0_2.Args[0]
 26220  			if v_0_2_0.Op != ssaop.OpARM64PWHILELTS {
 26221  				continue
 26222  			}
 26223  			_ = v_0_2_0.Args[1]
 26224  			v_0_2_0_0 := v_0_2_0.Args[0]
 26225  			if v_0_2_0_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_0.AuxInt) != 0 {
 26226  				continue
 26227  			}
 26228  			v_0_2_0_1 := v_0_2_0.Args[1]
 26229  			if v_0_2_0_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_1.AuxInt) != 8 || y != v_1 {
 26230  				continue
 26231  			}
 26232  			mask := v_2
 26233  			v.Reset(ssaop.OpARM64ZUMINMergingS)
 26234  			v.AddArg3(y, x, mask)
 26235  			return true
 26236  		}
 26237  		break
 26238  	}
 26239  	// match: (ZSELS (ZUMINS x y (Select0 <types.TypeMask> (PWHILELTS (MOVDconst [0]) (MOVDconst [8])))) z mask)
 26240  	// result: (ZUMINMergingPrefixedS z x y mask)
 26241  	for {
 26242  		if v_0.Op != ssaop.OpARM64ZUMINS {
 26243  			break
 26244  		}
 26245  		_ = v_0.Args[2]
 26246  		x := v_0.Args[0]
 26247  		y := v_0.Args[1]
 26248  		v_0_2 := v_0.Args[2]
 26249  		if v_0_2.Op != ssaop.OpSelect0 || v_0_2.Type != types.TypeMask {
 26250  			break
 26251  		}
 26252  		v_0_2_0 := v_0_2.Args[0]
 26253  		if v_0_2_0.Op != ssaop.OpARM64PWHILELTS {
 26254  			break
 26255  		}
 26256  		_ = v_0_2_0.Args[1]
 26257  		v_0_2_0_0 := v_0_2_0.Args[0]
 26258  		if v_0_2_0_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_0.AuxInt) != 0 {
 26259  			break
 26260  		}
 26261  		v_0_2_0_1 := v_0_2_0.Args[1]
 26262  		if v_0_2_0_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_1.AuxInt) != 8 {
 26263  			break
 26264  		}
 26265  		z := v_1
 26266  		mask := v_2
 26267  		v.Reset(ssaop.OpARM64ZUMINMergingPrefixedS)
 26268  		v.AddArg4(z, x, y, mask)
 26269  		return true
 26270  	}
 26271  	// match: (ZSELS (ZUMULHMergingS x y (Select0 <types.TypeMask> (PWHILELTS (MOVDconst [0]) (MOVDconst [8])))) x mask)
 26272  	// result: (ZUMULHMergingS x y mask)
 26273  	for {
 26274  		if v_0.Op != ssaop.OpARM64ZUMULHMergingS {
 26275  			break
 26276  		}
 26277  		_ = v_0.Args[2]
 26278  		x := v_0.Args[0]
 26279  		y := v_0.Args[1]
 26280  		v_0_2 := v_0.Args[2]
 26281  		if v_0_2.Op != ssaop.OpSelect0 || v_0_2.Type != types.TypeMask {
 26282  			break
 26283  		}
 26284  		v_0_2_0 := v_0_2.Args[0]
 26285  		if v_0_2_0.Op != ssaop.OpARM64PWHILELTS {
 26286  			break
 26287  		}
 26288  		_ = v_0_2_0.Args[1]
 26289  		v_0_2_0_0 := v_0_2_0.Args[0]
 26290  		if v_0_2_0_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_0.AuxInt) != 0 {
 26291  			break
 26292  		}
 26293  		v_0_2_0_1 := v_0_2_0.Args[1]
 26294  		if v_0_2_0_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_1.AuxInt) != 8 || x != v_1 {
 26295  			break
 26296  		}
 26297  		mask := v_2
 26298  		v.Reset(ssaop.OpARM64ZUMULHMergingS)
 26299  		v.AddArg3(x, y, mask)
 26300  		return true
 26301  	}
 26302  	// match: (ZSELS (ZUMULHMergingS x y (Select0 <types.TypeMask> (PWHILELTS (MOVDconst [0]) (MOVDconst [8])))) y mask)
 26303  	// result: (ZUMULHMergingS y x mask)
 26304  	for {
 26305  		if v_0.Op != ssaop.OpARM64ZUMULHMergingS {
 26306  			break
 26307  		}
 26308  		_ = v_0.Args[2]
 26309  		x := v_0.Args[0]
 26310  		y := v_0.Args[1]
 26311  		v_0_2 := v_0.Args[2]
 26312  		if v_0_2.Op != ssaop.OpSelect0 || v_0_2.Type != types.TypeMask {
 26313  			break
 26314  		}
 26315  		v_0_2_0 := v_0_2.Args[0]
 26316  		if v_0_2_0.Op != ssaop.OpARM64PWHILELTS {
 26317  			break
 26318  		}
 26319  		_ = v_0_2_0.Args[1]
 26320  		v_0_2_0_0 := v_0_2_0.Args[0]
 26321  		if v_0_2_0_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_0.AuxInt) != 0 {
 26322  			break
 26323  		}
 26324  		v_0_2_0_1 := v_0_2_0.Args[1]
 26325  		if v_0_2_0_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_1.AuxInt) != 8 || y != v_1 {
 26326  			break
 26327  		}
 26328  		mask := v_2
 26329  		v.Reset(ssaop.OpARM64ZUMULHMergingS)
 26330  		v.AddArg3(y, x, mask)
 26331  		return true
 26332  	}
 26333  	// match: (ZSELS (ZUMULHMergingS x y (Select0 <types.TypeMask> (PWHILELTS (MOVDconst [0]) (MOVDconst [8])))) z mask)
 26334  	// result: (ZUMULHMergingPrefixedS z x y mask)
 26335  	for {
 26336  		if v_0.Op != ssaop.OpARM64ZUMULHMergingS {
 26337  			break
 26338  		}
 26339  		_ = v_0.Args[2]
 26340  		x := v_0.Args[0]
 26341  		y := v_0.Args[1]
 26342  		v_0_2 := v_0.Args[2]
 26343  		if v_0_2.Op != ssaop.OpSelect0 || v_0_2.Type != types.TypeMask {
 26344  			break
 26345  		}
 26346  		v_0_2_0 := v_0_2.Args[0]
 26347  		if v_0_2_0.Op != ssaop.OpARM64PWHILELTS {
 26348  			break
 26349  		}
 26350  		_ = v_0_2_0.Args[1]
 26351  		v_0_2_0_0 := v_0_2_0.Args[0]
 26352  		if v_0_2_0_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_0.AuxInt) != 0 {
 26353  			break
 26354  		}
 26355  		v_0_2_0_1 := v_0_2_0.Args[1]
 26356  		if v_0_2_0_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0_2_0_1.AuxInt) != 8 {
 26357  			break
 26358  		}
 26359  		z := v_1
 26360  		mask := v_2
 26361  		v.Reset(ssaop.OpARM64ZUMULHMergingPrefixedS)
 26362  		v.AddArg4(z, x, y, mask)
 26363  		return true
 26364  	}
 26365  	// match: (ZSELS (ZUQADDS x y) x mask)
 26366  	// result: (ZUQADDMergingS x y mask)
 26367  	for {
 26368  		if v_0.Op != ssaop.OpARM64ZUQADDS {
 26369  			break
 26370  		}
 26371  		_ = v_0.Args[1]
 26372  		v_0_0 := v_0.Args[0]
 26373  		v_0_1 := v_0.Args[1]
 26374  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
 26375  			x := v_0_0
 26376  			y := v_0_1
 26377  			if x != v_1 {
 26378  				continue
 26379  			}
 26380  			mask := v_2
 26381  			v.Reset(ssaop.OpARM64ZUQADDMergingS)
 26382  			v.AddArg3(x, y, mask)
 26383  			return true
 26384  		}
 26385  		break
 26386  	}
 26387  	// match: (ZSELS (ZUQADDS x y) y mask)
 26388  	// result: (ZUQADDMergingS y x mask)
 26389  	for {
 26390  		if v_0.Op != ssaop.OpARM64ZUQADDS {
 26391  			break
 26392  		}
 26393  		_ = v_0.Args[1]
 26394  		v_0_0 := v_0.Args[0]
 26395  		v_0_1 := v_0.Args[1]
 26396  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
 26397  			x := v_0_0
 26398  			y := v_0_1
 26399  			if y != v_1 {
 26400  				continue
 26401  			}
 26402  			mask := v_2
 26403  			v.Reset(ssaop.OpARM64ZUQADDMergingS)
 26404  			v.AddArg3(y, x, mask)
 26405  			return true
 26406  		}
 26407  		break
 26408  	}
 26409  	// match: (ZSELS (ZUQADDS x y) z mask)
 26410  	// result: (ZUQADDMergingPrefixedS z x y mask)
 26411  	for {
 26412  		if v_0.Op != ssaop.OpARM64ZUQADDS {
 26413  			break
 26414  		}
 26415  		y := v_0.Args[1]
 26416  		x := v_0.Args[0]
 26417  		z := v_1
 26418  		mask := v_2
 26419  		v.Reset(ssaop.OpARM64ZUQADDMergingPrefixedS)
 26420  		v.AddArg4(z, x, y, mask)
 26421  		return true
 26422  	}
 26423  	// match: (ZSELS (ZUQSUBS x y) x mask)
 26424  	// result: (ZUQSUBMergingS x y mask)
 26425  	for {
 26426  		if v_0.Op != ssaop.OpARM64ZUQSUBS {
 26427  			break
 26428  		}
 26429  		y := v_0.Args[1]
 26430  		x := v_0.Args[0]
 26431  		if x != v_1 {
 26432  			break
 26433  		}
 26434  		mask := v_2
 26435  		v.Reset(ssaop.OpARM64ZUQSUBMergingS)
 26436  		v.AddArg3(x, y, mask)
 26437  		return true
 26438  	}
 26439  	return false
 26440  }
 26441  func rewriteValue_OpAbsFloat32s(v *ssa.Value) bool {
 26442  	v_0 := v.Args[0]
 26443  	b := v.Block
 26444  	typ := &b.Func.Config.Types
 26445  	// match: (AbsFloat32s x)
 26446  	// result: (ZFABSS x (Select0 <types.TypeMask> (PWHILELTS (MOVDconst [0]) (MOVDconst [8]))))
 26447  	for {
 26448  		x := v_0
 26449  		v.Reset(ssaop.OpARM64ZFABSS)
 26450  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 26451  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTS, types.NewTuple(typ.Mask, types.TypeFlags))
 26452  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 26453  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 26454  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 26455  		v3.AuxInt = ssa.Int64ToAuxInt(8)
 26456  		v1.AddArg2(v2, v3)
 26457  		v0.AddArg(v1)
 26458  		v.AddArg2(x, v0)
 26459  		return true
 26460  	}
 26461  }
 26462  func rewriteValue_OpAbsFloat64s(v *ssa.Value) bool {
 26463  	v_0 := v.Args[0]
 26464  	b := v.Block
 26465  	typ := &b.Func.Config.Types
 26466  	// match: (AbsFloat64s x)
 26467  	// result: (ZFABSD x (Select0 <types.TypeMask> (PWHILELTD (MOVDconst [0]) (MOVDconst [4]))))
 26468  	for {
 26469  		x := v_0
 26470  		v.Reset(ssaop.OpARM64ZFABSD)
 26471  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 26472  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTD, types.NewTuple(typ.Mask, types.TypeFlags))
 26473  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 26474  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 26475  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 26476  		v3.AuxInt = ssa.Int64ToAuxInt(4)
 26477  		v1.AddArg2(v2, v3)
 26478  		v0.AddArg(v1)
 26479  		v.AddArg2(x, v0)
 26480  		return true
 26481  	}
 26482  }
 26483  func rewriteValue_OpAbsInt16s(v *ssa.Value) bool {
 26484  	v_0 := v.Args[0]
 26485  	b := v.Block
 26486  	typ := &b.Func.Config.Types
 26487  	// match: (AbsInt16s x)
 26488  	// result: (ZABSH x (Select0 <types.TypeMask> (PWHILELTH (MOVDconst [0]) (MOVDconst [16]))))
 26489  	for {
 26490  		x := v_0
 26491  		v.Reset(ssaop.OpARM64ZABSH)
 26492  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 26493  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTH, types.NewTuple(typ.Mask, types.TypeFlags))
 26494  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 26495  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 26496  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 26497  		v3.AuxInt = ssa.Int64ToAuxInt(16)
 26498  		v1.AddArg2(v2, v3)
 26499  		v0.AddArg(v1)
 26500  		v.AddArg2(x, v0)
 26501  		return true
 26502  	}
 26503  }
 26504  func rewriteValue_OpAbsInt32s(v *ssa.Value) bool {
 26505  	v_0 := v.Args[0]
 26506  	b := v.Block
 26507  	typ := &b.Func.Config.Types
 26508  	// match: (AbsInt32s x)
 26509  	// result: (ZABSS x (Select0 <types.TypeMask> (PWHILELTS (MOVDconst [0]) (MOVDconst [8]))))
 26510  	for {
 26511  		x := v_0
 26512  		v.Reset(ssaop.OpARM64ZABSS)
 26513  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 26514  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTS, types.NewTuple(typ.Mask, types.TypeFlags))
 26515  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 26516  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 26517  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 26518  		v3.AuxInt = ssa.Int64ToAuxInt(8)
 26519  		v1.AddArg2(v2, v3)
 26520  		v0.AddArg(v1)
 26521  		v.AddArg2(x, v0)
 26522  		return true
 26523  	}
 26524  }
 26525  func rewriteValue_OpAbsInt64s(v *ssa.Value) bool {
 26526  	v_0 := v.Args[0]
 26527  	b := v.Block
 26528  	typ := &b.Func.Config.Types
 26529  	// match: (AbsInt64s x)
 26530  	// result: (ZABSD x (Select0 <types.TypeMask> (PWHILELTD (MOVDconst [0]) (MOVDconst [4]))))
 26531  	for {
 26532  		x := v_0
 26533  		v.Reset(ssaop.OpARM64ZABSD)
 26534  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 26535  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTD, types.NewTuple(typ.Mask, types.TypeFlags))
 26536  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 26537  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 26538  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 26539  		v3.AuxInt = ssa.Int64ToAuxInt(4)
 26540  		v1.AddArg2(v2, v3)
 26541  		v0.AddArg(v1)
 26542  		v.AddArg2(x, v0)
 26543  		return true
 26544  	}
 26545  }
 26546  func rewriteValue_OpAbsInt8s(v *ssa.Value) bool {
 26547  	v_0 := v.Args[0]
 26548  	b := v.Block
 26549  	typ := &b.Func.Config.Types
 26550  	// match: (AbsInt8s x)
 26551  	// result: (ZABSB x (Select0 <types.TypeMask> (PWHILELTB (MOVDconst [0]) (MOVDconst [32]))))
 26552  	for {
 26553  		x := v_0
 26554  		v.Reset(ssaop.OpARM64ZABSB)
 26555  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 26556  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTB, types.NewTuple(typ.Mask, types.TypeFlags))
 26557  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 26558  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 26559  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 26560  		v3.AuxInt = ssa.Int64ToAuxInt(32)
 26561  		v1.AddArg2(v2, v3)
 26562  		v0.AddArg(v1)
 26563  		v.AddArg2(x, v0)
 26564  		return true
 26565  	}
 26566  }
 26567  func rewriteValue_OpAddr(v *ssa.Value) bool {
 26568  	v_0 := v.Args[0]
 26569  	// match: (Addr {sym} base)
 26570  	// result: (MOVDaddr {sym} base)
 26571  	for {
 26572  		sym := ssa.AuxToSym(v.Aux)
 26573  		base := v_0
 26574  		v.Reset(ssaop.OpARM64MOVDaddr)
 26575  		v.Aux = ssa.SymToAux(sym)
 26576  		v.AddArg(base)
 26577  		return true
 26578  	}
 26579  }
 26580  func rewriteValue_OpAvg64u(v *ssa.Value) bool {
 26581  	v_1 := v.Args[1]
 26582  	v_0 := v.Args[0]
 26583  	b := v.Block
 26584  	// match: (Avg64u <t> x y)
 26585  	// result: (ADD (SRLconst <t> (SUB <t> x y) [1]) y)
 26586  	for {
 26587  		t := v.Type
 26588  		x := v_0
 26589  		y := v_1
 26590  		v.Reset(ssaop.OpARM64ADD)
 26591  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SRLconst, t)
 26592  		v0.AuxInt = ssa.Int64ToAuxInt(1)
 26593  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64SUB, t)
 26594  		v1.AddArg2(x, y)
 26595  		v0.AddArg(v1)
 26596  		v.AddArg2(v0, y)
 26597  		return true
 26598  	}
 26599  }
 26600  func rewriteValue_OpBitLen16(v *ssa.Value) bool {
 26601  	v_0 := v.Args[0]
 26602  	b := v.Block
 26603  	typ := &b.Func.Config.Types
 26604  	// match: (BitLen16 x)
 26605  	// result: (BitLen64 (ZeroExt16to64 x))
 26606  	for {
 26607  		x := v_0
 26608  		v.Reset(ssaop.OpBitLen64)
 26609  		v0 := b.NewValue0(v.Pos, ssaop.OpZeroExt16to64, typ.UInt64)
 26610  		v0.AddArg(x)
 26611  		v.AddArg(v0)
 26612  		return true
 26613  	}
 26614  }
 26615  func rewriteValue_OpBitLen32(v *ssa.Value) bool {
 26616  	v_0 := v.Args[0]
 26617  	b := v.Block
 26618  	typ := &b.Func.Config.Types
 26619  	// match: (BitLen32 x)
 26620  	// result: (SUB (MOVDconst [32]) (CLZW <typ.Int> x))
 26621  	for {
 26622  		x := v_0
 26623  		v.Reset(ssaop.OpARM64SUB)
 26624  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 26625  		v0.AuxInt = ssa.Int64ToAuxInt(32)
 26626  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64CLZW, typ.Int)
 26627  		v1.AddArg(x)
 26628  		v.AddArg2(v0, v1)
 26629  		return true
 26630  	}
 26631  }
 26632  func rewriteValue_OpBitLen64(v *ssa.Value) bool {
 26633  	v_0 := v.Args[0]
 26634  	b := v.Block
 26635  	typ := &b.Func.Config.Types
 26636  	// match: (BitLen64 x)
 26637  	// result: (SUB (MOVDconst [64]) (CLZ <typ.Int> x))
 26638  	for {
 26639  		x := v_0
 26640  		v.Reset(ssaop.OpARM64SUB)
 26641  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 26642  		v0.AuxInt = ssa.Int64ToAuxInt(64)
 26643  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64CLZ, typ.Int)
 26644  		v1.AddArg(x)
 26645  		v.AddArg2(v0, v1)
 26646  		return true
 26647  	}
 26648  }
 26649  func rewriteValue_OpBitLen8(v *ssa.Value) bool {
 26650  	v_0 := v.Args[0]
 26651  	b := v.Block
 26652  	typ := &b.Func.Config.Types
 26653  	// match: (BitLen8 x)
 26654  	// result: (BitLen64 (ZeroExt8to64 x))
 26655  	for {
 26656  		x := v_0
 26657  		v.Reset(ssaop.OpBitLen64)
 26658  		v0 := b.NewValue0(v.Pos, ssaop.OpZeroExt8to64, typ.UInt64)
 26659  		v0.AddArg(x)
 26660  		v.AddArg(v0)
 26661  		return true
 26662  	}
 26663  }
 26664  func rewriteValue_OpBitRev16(v *ssa.Value) bool {
 26665  	v_0 := v.Args[0]
 26666  	b := v.Block
 26667  	typ := &b.Func.Config.Types
 26668  	// match: (BitRev16 x)
 26669  	// result: (SRLconst [48] (RBIT <typ.UInt64> x))
 26670  	for {
 26671  		x := v_0
 26672  		v.Reset(ssaop.OpARM64SRLconst)
 26673  		v.AuxInt = ssa.Int64ToAuxInt(48)
 26674  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64RBIT, typ.UInt64)
 26675  		v0.AddArg(x)
 26676  		v.AddArg(v0)
 26677  		return true
 26678  	}
 26679  }
 26680  func rewriteValue_OpBitRev8(v *ssa.Value) bool {
 26681  	v_0 := v.Args[0]
 26682  	b := v.Block
 26683  	typ := &b.Func.Config.Types
 26684  	// match: (BitRev8 x)
 26685  	// result: (SRLconst [56] (RBIT <typ.UInt64> x))
 26686  	for {
 26687  		x := v_0
 26688  		v.Reset(ssaop.OpARM64SRLconst)
 26689  		v.AuxInt = ssa.Int64ToAuxInt(56)
 26690  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64RBIT, typ.UInt64)
 26691  		v0.AddArg(x)
 26692  		v.AddArg(v0)
 26693  		return true
 26694  	}
 26695  }
 26696  func rewriteValue_OpBroadcastFloat32s(v *ssa.Value) bool {
 26697  	v_0 := v.Args[0]
 26698  	// match: (BroadcastFloat32s x)
 26699  	// result: (ZDUPIS [0] x)
 26700  	for {
 26701  		x := v_0
 26702  		v.Reset(ssaop.OpARM64ZDUPIS)
 26703  		v.AuxInt = ssa.Uint8ToAuxInt(0)
 26704  		v.AddArg(x)
 26705  		return true
 26706  	}
 26707  }
 26708  func rewriteValue_OpBroadcastFloat64s(v *ssa.Value) bool {
 26709  	v_0 := v.Args[0]
 26710  	// match: (BroadcastFloat64s x)
 26711  	// result: (ZDUPID [0] x)
 26712  	for {
 26713  		x := v_0
 26714  		v.Reset(ssaop.OpARM64ZDUPID)
 26715  		v.AuxInt = ssa.Uint8ToAuxInt(0)
 26716  		v.AddArg(x)
 26717  		return true
 26718  	}
 26719  }
 26720  func rewriteValue_OpCeilFloat32s(v *ssa.Value) bool {
 26721  	v_0 := v.Args[0]
 26722  	b := v.Block
 26723  	typ := &b.Func.Config.Types
 26724  	// match: (CeilFloat32s x)
 26725  	// result: (ZFRINTPS x (Select0 <types.TypeMask> (PWHILELTS (MOVDconst [0]) (MOVDconst [8]))))
 26726  	for {
 26727  		x := v_0
 26728  		v.Reset(ssaop.OpARM64ZFRINTPS)
 26729  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 26730  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTS, types.NewTuple(typ.Mask, types.TypeFlags))
 26731  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 26732  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 26733  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 26734  		v3.AuxInt = ssa.Int64ToAuxInt(8)
 26735  		v1.AddArg2(v2, v3)
 26736  		v0.AddArg(v1)
 26737  		v.AddArg2(x, v0)
 26738  		return true
 26739  	}
 26740  }
 26741  func rewriteValue_OpCeilFloat64s(v *ssa.Value) bool {
 26742  	v_0 := v.Args[0]
 26743  	b := v.Block
 26744  	typ := &b.Func.Config.Types
 26745  	// match: (CeilFloat64s x)
 26746  	// result: (ZFRINTPD x (Select0 <types.TypeMask> (PWHILELTD (MOVDconst [0]) (MOVDconst [4]))))
 26747  	for {
 26748  		x := v_0
 26749  		v.Reset(ssaop.OpARM64ZFRINTPD)
 26750  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 26751  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTD, types.NewTuple(typ.Mask, types.TypeFlags))
 26752  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 26753  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 26754  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 26755  		v3.AuxInt = ssa.Int64ToAuxInt(4)
 26756  		v1.AddArg2(v2, v3)
 26757  		v0.AddArg(v1)
 26758  		v.AddArg2(x, v0)
 26759  		return true
 26760  	}
 26761  }
 26762  func rewriteValue_OpCondSelect(v *ssa.Value) bool {
 26763  	v_2 := v.Args[2]
 26764  	v_1 := v.Args[1]
 26765  	v_0 := v.Args[0]
 26766  	b := v.Block
 26767  	// match: (CondSelect x y boolval)
 26768  	// cond: ssa.FlagArg(boolval) != nil
 26769  	// result: (CSEL [boolval.Op] x y ssa.FlagArg(boolval))
 26770  	for {
 26771  		x := v_0
 26772  		y := v_1
 26773  		boolval := v_2
 26774  		if !(ssa.FlagArg(boolval) != nil) {
 26775  			break
 26776  		}
 26777  		v.Reset(ssaop.OpARM64CSEL)
 26778  		v.AuxInt = ssa.OpToAuxInt(boolval.Op)
 26779  		v.AddArg3(x, y, ssa.FlagArg(boolval))
 26780  		return true
 26781  	}
 26782  	// match: (CondSelect x y boolval)
 26783  	// cond: ssa.FlagArg(boolval) == nil
 26784  	// result: (CSEL [ssaop.OpARM64NotEqual] x y (TSTWconst [1] boolval))
 26785  	for {
 26786  		x := v_0
 26787  		y := v_1
 26788  		boolval := v_2
 26789  		if !(ssa.FlagArg(boolval) == nil) {
 26790  			break
 26791  		}
 26792  		v.Reset(ssaop.OpARM64CSEL)
 26793  		v.AuxInt = ssa.OpToAuxInt(ssaop.OpARM64NotEqual)
 26794  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64TSTWconst, types.TypeFlags)
 26795  		v0.AuxInt = ssa.Int32ToAuxInt(1)
 26796  		v0.AddArg(boolval)
 26797  		v.AddArg3(x, y, v0)
 26798  		return true
 26799  	}
 26800  	return false
 26801  }
 26802  func rewriteValue_OpConst16(v *ssa.Value) bool {
 26803  	// match: (Const16 [val])
 26804  	// result: (MOVDconst [int64(val)])
 26805  	for {
 26806  		val := ssa.AuxIntToInt16(v.AuxInt)
 26807  		v.Reset(ssaop.OpARM64MOVDconst)
 26808  		v.AuxInt = ssa.Int64ToAuxInt(int64(val))
 26809  		return true
 26810  	}
 26811  }
 26812  func rewriteValue_OpConst32(v *ssa.Value) bool {
 26813  	// match: (Const32 [val])
 26814  	// result: (MOVDconst [int64(val)])
 26815  	for {
 26816  		val := ssa.AuxIntToInt32(v.AuxInt)
 26817  		v.Reset(ssaop.OpARM64MOVDconst)
 26818  		v.AuxInt = ssa.Int64ToAuxInt(int64(val))
 26819  		return true
 26820  	}
 26821  }
 26822  func rewriteValue_OpConst32F(v *ssa.Value) bool {
 26823  	// match: (Const32F [val])
 26824  	// result: (FMOVSconst [float64(val)])
 26825  	for {
 26826  		val := ssa.AuxIntToFloat32(v.AuxInt)
 26827  		v.Reset(ssaop.OpARM64FMOVSconst)
 26828  		v.AuxInt = ssa.Float64ToAuxInt(float64(val))
 26829  		return true
 26830  	}
 26831  }
 26832  func rewriteValue_OpConst64(v *ssa.Value) bool {
 26833  	// match: (Const64 [val])
 26834  	// result: (MOVDconst [int64(val)])
 26835  	for {
 26836  		val := ssa.AuxIntToInt64(v.AuxInt)
 26837  		v.Reset(ssaop.OpARM64MOVDconst)
 26838  		v.AuxInt = ssa.Int64ToAuxInt(int64(val))
 26839  		return true
 26840  	}
 26841  }
 26842  func rewriteValue_OpConst64F(v *ssa.Value) bool {
 26843  	// match: (Const64F [val])
 26844  	// result: (FMOVDconst [float64(val)])
 26845  	for {
 26846  		val := ssa.AuxIntToFloat64(v.AuxInt)
 26847  		v.Reset(ssaop.OpARM64FMOVDconst)
 26848  		v.AuxInt = ssa.Float64ToAuxInt(float64(val))
 26849  		return true
 26850  	}
 26851  }
 26852  func rewriteValue_OpConst8(v *ssa.Value) bool {
 26853  	// match: (Const8 [val])
 26854  	// result: (MOVDconst [int64(val)])
 26855  	for {
 26856  		val := ssa.AuxIntToInt8(v.AuxInt)
 26857  		v.Reset(ssaop.OpARM64MOVDconst)
 26858  		v.AuxInt = ssa.Int64ToAuxInt(int64(val))
 26859  		return true
 26860  	}
 26861  }
 26862  func rewriteValue_OpConstBool(v *ssa.Value) bool {
 26863  	// match: (ConstBool [t])
 26864  	// result: (MOVDconst [ssa.B2i(t)])
 26865  	for {
 26866  		t := ssa.AuxIntToBool(v.AuxInt)
 26867  		v.Reset(ssaop.OpARM64MOVDconst)
 26868  		v.AuxInt = ssa.Int64ToAuxInt(ssa.B2i(t))
 26869  		return true
 26870  	}
 26871  }
 26872  func rewriteValue_OpConstNil(v *ssa.Value) bool {
 26873  	// match: (ConstNil)
 26874  	// result: (MOVDconst [0])
 26875  	for {
 26876  		v.Reset(ssaop.OpARM64MOVDconst)
 26877  		v.AuxInt = ssa.Int64ToAuxInt(0)
 26878  		return true
 26879  	}
 26880  }
 26881  func rewriteValue_OpCount8s(v *ssa.Value) bool {
 26882  	v_0 := v.Args[0]
 26883  	b := v.Block
 26884  	typ := &b.Func.Config.Types
 26885  	// match: (Count8s r)
 26886  	// result: (Select0 <types.TypeMask> (PWHILELTB (MOVDconst [0]) r))
 26887  	for {
 26888  		r := v_0
 26889  		v.Reset(ssaop.OpSelect0)
 26890  		v.Type = types.TypeMask
 26891  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTB, types.NewTuple(typ.Mask, types.TypeFlags))
 26892  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 26893  		v1.AuxInt = ssa.Int64ToAuxInt(0)
 26894  		v0.AddArg2(v1, r)
 26895  		v.AddArg(v0)
 26896  		return true
 26897  	}
 26898  }
 26899  func rewriteValue_OpCtz16(v *ssa.Value) bool {
 26900  	v_0 := v.Args[0]
 26901  	b := v.Block
 26902  	typ := &b.Func.Config.Types
 26903  	// match: (Ctz16 <t> x)
 26904  	// result: (CLZW <t> (RBITW <typ.UInt32> (ORconst <typ.UInt32> [0x10000] x)))
 26905  	for {
 26906  		t := v.Type
 26907  		x := v_0
 26908  		v.Reset(ssaop.OpARM64CLZW)
 26909  		v.Type = t
 26910  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64RBITW, typ.UInt32)
 26911  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64ORconst, typ.UInt32)
 26912  		v1.AuxInt = ssa.Int64ToAuxInt(0x10000)
 26913  		v1.AddArg(x)
 26914  		v0.AddArg(v1)
 26915  		v.AddArg(v0)
 26916  		return true
 26917  	}
 26918  }
 26919  func rewriteValue_OpCtz32(v *ssa.Value) bool {
 26920  	v_0 := v.Args[0]
 26921  	b := v.Block
 26922  	// match: (Ctz32 <t> x)
 26923  	// result: (CLZW (RBITW <t> x))
 26924  	for {
 26925  		t := v.Type
 26926  		x := v_0
 26927  		v.Reset(ssaop.OpARM64CLZW)
 26928  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64RBITW, t)
 26929  		v0.AddArg(x)
 26930  		v.AddArg(v0)
 26931  		return true
 26932  	}
 26933  }
 26934  func rewriteValue_OpCtz64(v *ssa.Value) bool {
 26935  	v_0 := v.Args[0]
 26936  	b := v.Block
 26937  	// match: (Ctz64 <t> x)
 26938  	// result: (CLZ (RBIT <t> x))
 26939  	for {
 26940  		t := v.Type
 26941  		x := v_0
 26942  		v.Reset(ssaop.OpARM64CLZ)
 26943  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64RBIT, t)
 26944  		v0.AddArg(x)
 26945  		v.AddArg(v0)
 26946  		return true
 26947  	}
 26948  }
 26949  func rewriteValue_OpCtz8(v *ssa.Value) bool {
 26950  	v_0 := v.Args[0]
 26951  	b := v.Block
 26952  	typ := &b.Func.Config.Types
 26953  	// match: (Ctz8 <t> x)
 26954  	// result: (CLZW <t> (RBITW <typ.UInt32> (ORconst <typ.UInt32> [0x100] x)))
 26955  	for {
 26956  		t := v.Type
 26957  		x := v_0
 26958  		v.Reset(ssaop.OpARM64CLZW)
 26959  		v.Type = t
 26960  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64RBITW, typ.UInt32)
 26961  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64ORconst, typ.UInt32)
 26962  		v1.AuxInt = ssa.Int64ToAuxInt(0x100)
 26963  		v1.AddArg(x)
 26964  		v0.AddArg(v1)
 26965  		v.AddArg(v0)
 26966  		return true
 26967  	}
 26968  }
 26969  func rewriteValue_OpDiv16(v *ssa.Value) bool {
 26970  	v_1 := v.Args[1]
 26971  	v_0 := v.Args[0]
 26972  	b := v.Block
 26973  	typ := &b.Func.Config.Types
 26974  	// match: (Div16 [false] x y)
 26975  	// result: (DIVW (SignExt16to32 x) (SignExt16to32 y))
 26976  	for {
 26977  		if ssa.AuxIntToBool(v.AuxInt) != false {
 26978  			break
 26979  		}
 26980  		x := v_0
 26981  		y := v_1
 26982  		v.Reset(ssaop.OpARM64DIVW)
 26983  		v0 := b.NewValue0(v.Pos, ssaop.OpSignExt16to32, typ.Int32)
 26984  		v0.AddArg(x)
 26985  		v1 := b.NewValue0(v.Pos, ssaop.OpSignExt16to32, typ.Int32)
 26986  		v1.AddArg(y)
 26987  		v.AddArg2(v0, v1)
 26988  		return true
 26989  	}
 26990  	return false
 26991  }
 26992  func rewriteValue_OpDiv16u(v *ssa.Value) bool {
 26993  	v_1 := v.Args[1]
 26994  	v_0 := v.Args[0]
 26995  	b := v.Block
 26996  	typ := &b.Func.Config.Types
 26997  	// match: (Div16u x y)
 26998  	// result: (UDIVW (ZeroExt16to32 x) (ZeroExt16to32 y))
 26999  	for {
 27000  		x := v_0
 27001  		y := v_1
 27002  		v.Reset(ssaop.OpARM64UDIVW)
 27003  		v0 := b.NewValue0(v.Pos, ssaop.OpZeroExt16to32, typ.UInt32)
 27004  		v0.AddArg(x)
 27005  		v1 := b.NewValue0(v.Pos, ssaop.OpZeroExt16to32, typ.UInt32)
 27006  		v1.AddArg(y)
 27007  		v.AddArg2(v0, v1)
 27008  		return true
 27009  	}
 27010  }
 27011  func rewriteValue_OpDiv32(v *ssa.Value) bool {
 27012  	v_1 := v.Args[1]
 27013  	v_0 := v.Args[0]
 27014  	// match: (Div32 [false] x y)
 27015  	// result: (DIVW x y)
 27016  	for {
 27017  		if ssa.AuxIntToBool(v.AuxInt) != false {
 27018  			break
 27019  		}
 27020  		x := v_0
 27021  		y := v_1
 27022  		v.Reset(ssaop.OpARM64DIVW)
 27023  		v.AddArg2(x, y)
 27024  		return true
 27025  	}
 27026  	return false
 27027  }
 27028  func rewriteValue_OpDiv64(v *ssa.Value) bool {
 27029  	v_1 := v.Args[1]
 27030  	v_0 := v.Args[0]
 27031  	// match: (Div64 [false] x y)
 27032  	// result: (DIV x y)
 27033  	for {
 27034  		if ssa.AuxIntToBool(v.AuxInt) != false {
 27035  			break
 27036  		}
 27037  		x := v_0
 27038  		y := v_1
 27039  		v.Reset(ssaop.OpARM64DIV)
 27040  		v.AddArg2(x, y)
 27041  		return true
 27042  	}
 27043  	return false
 27044  }
 27045  func rewriteValue_OpDiv8(v *ssa.Value) bool {
 27046  	v_1 := v.Args[1]
 27047  	v_0 := v.Args[0]
 27048  	b := v.Block
 27049  	typ := &b.Func.Config.Types
 27050  	// match: (Div8 x y)
 27051  	// result: (DIVW (SignExt8to32 x) (SignExt8to32 y))
 27052  	for {
 27053  		x := v_0
 27054  		y := v_1
 27055  		v.Reset(ssaop.OpARM64DIVW)
 27056  		v0 := b.NewValue0(v.Pos, ssaop.OpSignExt8to32, typ.Int32)
 27057  		v0.AddArg(x)
 27058  		v1 := b.NewValue0(v.Pos, ssaop.OpSignExt8to32, typ.Int32)
 27059  		v1.AddArg(y)
 27060  		v.AddArg2(v0, v1)
 27061  		return true
 27062  	}
 27063  }
 27064  func rewriteValue_OpDiv8u(v *ssa.Value) bool {
 27065  	v_1 := v.Args[1]
 27066  	v_0 := v.Args[0]
 27067  	b := v.Block
 27068  	typ := &b.Func.Config.Types
 27069  	// match: (Div8u x y)
 27070  	// result: (UDIVW (ZeroExt8to32 x) (ZeroExt8to32 y))
 27071  	for {
 27072  		x := v_0
 27073  		y := v_1
 27074  		v.Reset(ssaop.OpARM64UDIVW)
 27075  		v0 := b.NewValue0(v.Pos, ssaop.OpZeroExt8to32, typ.UInt32)
 27076  		v0.AddArg(x)
 27077  		v1 := b.NewValue0(v.Pos, ssaop.OpZeroExt8to32, typ.UInt32)
 27078  		v1.AddArg(y)
 27079  		v.AddArg2(v0, v1)
 27080  		return true
 27081  	}
 27082  }
 27083  func rewriteValue_OpDivFloat32s(v *ssa.Value) bool {
 27084  	v_1 := v.Args[1]
 27085  	v_0 := v.Args[0]
 27086  	b := v.Block
 27087  	typ := &b.Func.Config.Types
 27088  	// match: (DivFloat32s x y)
 27089  	// result: (ZFDIVS x y (Select0 <types.TypeMask> (PWHILELTS (MOVDconst [0]) (MOVDconst [8]))))
 27090  	for {
 27091  		x := v_0
 27092  		y := v_1
 27093  		v.Reset(ssaop.OpARM64ZFDIVS)
 27094  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 27095  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTS, types.NewTuple(typ.Mask, types.TypeFlags))
 27096  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 27097  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 27098  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 27099  		v3.AuxInt = ssa.Int64ToAuxInt(8)
 27100  		v1.AddArg2(v2, v3)
 27101  		v0.AddArg(v1)
 27102  		v.AddArg3(x, y, v0)
 27103  		return true
 27104  	}
 27105  }
 27106  func rewriteValue_OpDivFloat64s(v *ssa.Value) bool {
 27107  	v_1 := v.Args[1]
 27108  	v_0 := v.Args[0]
 27109  	b := v.Block
 27110  	typ := &b.Func.Config.Types
 27111  	// match: (DivFloat64s x y)
 27112  	// result: (ZFDIVD x y (Select0 <types.TypeMask> (PWHILELTD (MOVDconst [0]) (MOVDconst [4]))))
 27113  	for {
 27114  		x := v_0
 27115  		y := v_1
 27116  		v.Reset(ssaop.OpARM64ZFDIVD)
 27117  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 27118  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTD, types.NewTuple(typ.Mask, types.TypeFlags))
 27119  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 27120  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 27121  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 27122  		v3.AuxInt = ssa.Int64ToAuxInt(4)
 27123  		v1.AddArg2(v2, v3)
 27124  		v0.AddArg(v1)
 27125  		v.AddArg3(x, y, v0)
 27126  		return true
 27127  	}
 27128  }
 27129  func rewriteValue_OpDivInt32s(v *ssa.Value) bool {
 27130  	v_1 := v.Args[1]
 27131  	v_0 := v.Args[0]
 27132  	b := v.Block
 27133  	typ := &b.Func.Config.Types
 27134  	// match: (DivInt32s x y)
 27135  	// result: (ZSDIVS x y (Select0 <types.TypeMask> (PWHILELTS (MOVDconst [0]) (MOVDconst [8]))))
 27136  	for {
 27137  		x := v_0
 27138  		y := v_1
 27139  		v.Reset(ssaop.OpARM64ZSDIVS)
 27140  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 27141  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTS, types.NewTuple(typ.Mask, types.TypeFlags))
 27142  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 27143  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 27144  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 27145  		v3.AuxInt = ssa.Int64ToAuxInt(8)
 27146  		v1.AddArg2(v2, v3)
 27147  		v0.AddArg(v1)
 27148  		v.AddArg3(x, y, v0)
 27149  		return true
 27150  	}
 27151  }
 27152  func rewriteValue_OpDivInt64s(v *ssa.Value) bool {
 27153  	v_1 := v.Args[1]
 27154  	v_0 := v.Args[0]
 27155  	b := v.Block
 27156  	typ := &b.Func.Config.Types
 27157  	// match: (DivInt64s x y)
 27158  	// result: (ZSDIVD x y (Select0 <types.TypeMask> (PWHILELTD (MOVDconst [0]) (MOVDconst [4]))))
 27159  	for {
 27160  		x := v_0
 27161  		y := v_1
 27162  		v.Reset(ssaop.OpARM64ZSDIVD)
 27163  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 27164  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTD, types.NewTuple(typ.Mask, types.TypeFlags))
 27165  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 27166  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 27167  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 27168  		v3.AuxInt = ssa.Int64ToAuxInt(4)
 27169  		v1.AddArg2(v2, v3)
 27170  		v0.AddArg(v1)
 27171  		v.AddArg3(x, y, v0)
 27172  		return true
 27173  	}
 27174  }
 27175  func rewriteValue_OpDivUint32s(v *ssa.Value) bool {
 27176  	v_1 := v.Args[1]
 27177  	v_0 := v.Args[0]
 27178  	b := v.Block
 27179  	typ := &b.Func.Config.Types
 27180  	// match: (DivUint32s x y)
 27181  	// result: (ZUDIVS x y (Select0 <types.TypeMask> (PWHILELTS (MOVDconst [0]) (MOVDconst [8]))))
 27182  	for {
 27183  		x := v_0
 27184  		y := v_1
 27185  		v.Reset(ssaop.OpARM64ZUDIVS)
 27186  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 27187  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTS, types.NewTuple(typ.Mask, types.TypeFlags))
 27188  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 27189  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 27190  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 27191  		v3.AuxInt = ssa.Int64ToAuxInt(8)
 27192  		v1.AddArg2(v2, v3)
 27193  		v0.AddArg(v1)
 27194  		v.AddArg3(x, y, v0)
 27195  		return true
 27196  	}
 27197  }
 27198  func rewriteValue_OpDivUint64s(v *ssa.Value) bool {
 27199  	v_1 := v.Args[1]
 27200  	v_0 := v.Args[0]
 27201  	b := v.Block
 27202  	typ := &b.Func.Config.Types
 27203  	// match: (DivUint64s x y)
 27204  	// result: (ZUDIVD x y (Select0 <types.TypeMask> (PWHILELTD (MOVDconst [0]) (MOVDconst [4]))))
 27205  	for {
 27206  		x := v_0
 27207  		y := v_1
 27208  		v.Reset(ssaop.OpARM64ZUDIVD)
 27209  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 27210  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTD, types.NewTuple(typ.Mask, types.TypeFlags))
 27211  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 27212  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 27213  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 27214  		v3.AuxInt = ssa.Int64ToAuxInt(4)
 27215  		v1.AddArg2(v2, v3)
 27216  		v0.AddArg(v1)
 27217  		v.AddArg3(x, y, v0)
 27218  		return true
 27219  	}
 27220  }
 27221  func rewriteValue_OpEq16(v *ssa.Value) bool {
 27222  	v_1 := v.Args[1]
 27223  	v_0 := v.Args[0]
 27224  	b := v.Block
 27225  	typ := &b.Func.Config.Types
 27226  	// match: (Eq16 x y)
 27227  	// result: (Equal (CMPW (ZeroExt16to32 x) (ZeroExt16to32 y)))
 27228  	for {
 27229  		x := v_0
 27230  		y := v_1
 27231  		v.Reset(ssaop.OpARM64Equal)
 27232  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMPW, types.TypeFlags)
 27233  		v1 := b.NewValue0(v.Pos, ssaop.OpZeroExt16to32, typ.UInt32)
 27234  		v1.AddArg(x)
 27235  		v2 := b.NewValue0(v.Pos, ssaop.OpZeroExt16to32, typ.UInt32)
 27236  		v2.AddArg(y)
 27237  		v0.AddArg2(v1, v2)
 27238  		v.AddArg(v0)
 27239  		return true
 27240  	}
 27241  }
 27242  func rewriteValue_OpEq32(v *ssa.Value) bool {
 27243  	v_1 := v.Args[1]
 27244  	v_0 := v.Args[0]
 27245  	b := v.Block
 27246  	// match: (Eq32 x y)
 27247  	// result: (Equal (CMPW x y))
 27248  	for {
 27249  		x := v_0
 27250  		y := v_1
 27251  		v.Reset(ssaop.OpARM64Equal)
 27252  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMPW, types.TypeFlags)
 27253  		v0.AddArg2(x, y)
 27254  		v.AddArg(v0)
 27255  		return true
 27256  	}
 27257  }
 27258  func rewriteValue_OpEq32F(v *ssa.Value) bool {
 27259  	v_1 := v.Args[1]
 27260  	v_0 := v.Args[0]
 27261  	b := v.Block
 27262  	// match: (Eq32F x y)
 27263  	// result: (Equal (FCMPS x y))
 27264  	for {
 27265  		x := v_0
 27266  		y := v_1
 27267  		v.Reset(ssaop.OpARM64Equal)
 27268  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64FCMPS, types.TypeFlags)
 27269  		v0.AddArg2(x, y)
 27270  		v.AddArg(v0)
 27271  		return true
 27272  	}
 27273  }
 27274  func rewriteValue_OpEq64(v *ssa.Value) bool {
 27275  	v_1 := v.Args[1]
 27276  	v_0 := v.Args[0]
 27277  	b := v.Block
 27278  	// match: (Eq64 x y)
 27279  	// result: (Equal (CMP x y))
 27280  	for {
 27281  		x := v_0
 27282  		y := v_1
 27283  		v.Reset(ssaop.OpARM64Equal)
 27284  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMP, types.TypeFlags)
 27285  		v0.AddArg2(x, y)
 27286  		v.AddArg(v0)
 27287  		return true
 27288  	}
 27289  }
 27290  func rewriteValue_OpEq64F(v *ssa.Value) bool {
 27291  	v_1 := v.Args[1]
 27292  	v_0 := v.Args[0]
 27293  	b := v.Block
 27294  	// match: (Eq64F x y)
 27295  	// result: (Equal (FCMPD x y))
 27296  	for {
 27297  		x := v_0
 27298  		y := v_1
 27299  		v.Reset(ssaop.OpARM64Equal)
 27300  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64FCMPD, types.TypeFlags)
 27301  		v0.AddArg2(x, y)
 27302  		v.AddArg(v0)
 27303  		return true
 27304  	}
 27305  }
 27306  func rewriteValue_OpEq8(v *ssa.Value) bool {
 27307  	v_1 := v.Args[1]
 27308  	v_0 := v.Args[0]
 27309  	b := v.Block
 27310  	typ := &b.Func.Config.Types
 27311  	// match: (Eq8 x y)
 27312  	// result: (Equal (CMPW (ZeroExt8to32 x) (ZeroExt8to32 y)))
 27313  	for {
 27314  		x := v_0
 27315  		y := v_1
 27316  		v.Reset(ssaop.OpARM64Equal)
 27317  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMPW, types.TypeFlags)
 27318  		v1 := b.NewValue0(v.Pos, ssaop.OpZeroExt8to32, typ.UInt32)
 27319  		v1.AddArg(x)
 27320  		v2 := b.NewValue0(v.Pos, ssaop.OpZeroExt8to32, typ.UInt32)
 27321  		v2.AddArg(y)
 27322  		v0.AddArg2(v1, v2)
 27323  		v.AddArg(v0)
 27324  		return true
 27325  	}
 27326  }
 27327  func rewriteValue_OpEqB(v *ssa.Value) bool {
 27328  	v_1 := v.Args[1]
 27329  	v_0 := v.Args[0]
 27330  	b := v.Block
 27331  	typ := &b.Func.Config.Types
 27332  	// match: (EqB x y)
 27333  	// result: (XOR (MOVDconst [1]) (XOR <typ.Bool> x y))
 27334  	for {
 27335  		x := v_0
 27336  		y := v_1
 27337  		v.Reset(ssaop.OpARM64XOR)
 27338  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 27339  		v0.AuxInt = ssa.Int64ToAuxInt(1)
 27340  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64XOR, typ.Bool)
 27341  		v1.AddArg2(x, y)
 27342  		v.AddArg2(v0, v1)
 27343  		return true
 27344  	}
 27345  }
 27346  func rewriteValue_OpEqPtr(v *ssa.Value) bool {
 27347  	v_1 := v.Args[1]
 27348  	v_0 := v.Args[0]
 27349  	b := v.Block
 27350  	// match: (EqPtr x y)
 27351  	// result: (Equal (CMP x y))
 27352  	for {
 27353  		x := v_0
 27354  		y := v_1
 27355  		v.Reset(ssaop.OpARM64Equal)
 27356  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMP, types.TypeFlags)
 27357  		v0.AddArg2(x, y)
 27358  		v.AddArg(v0)
 27359  		return true
 27360  	}
 27361  }
 27362  func rewriteValue_OpEqualFloat32s(v *ssa.Value) bool {
 27363  	v_1 := v.Args[1]
 27364  	v_0 := v.Args[0]
 27365  	b := v.Block
 27366  	typ := &b.Func.Config.Types
 27367  	// match: (EqualFloat32s x y)
 27368  	// result: (ZFCMEQS x y (Select0 <types.TypeMask> (PWHILELTS (MOVDconst [0]) (MOVDconst [8]))))
 27369  	for {
 27370  		x := v_0
 27371  		y := v_1
 27372  		v.Reset(ssaop.OpARM64ZFCMEQS)
 27373  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 27374  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTS, types.NewTuple(typ.Mask, types.TypeFlags))
 27375  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 27376  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 27377  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 27378  		v3.AuxInt = ssa.Int64ToAuxInt(8)
 27379  		v1.AddArg2(v2, v3)
 27380  		v0.AddArg(v1)
 27381  		v.AddArg3(x, y, v0)
 27382  		return true
 27383  	}
 27384  }
 27385  func rewriteValue_OpEqualFloat64s(v *ssa.Value) bool {
 27386  	v_1 := v.Args[1]
 27387  	v_0 := v.Args[0]
 27388  	b := v.Block
 27389  	typ := &b.Func.Config.Types
 27390  	// match: (EqualFloat64s x y)
 27391  	// result: (ZFCMEQD x y (Select0 <types.TypeMask> (PWHILELTD (MOVDconst [0]) (MOVDconst [4]))))
 27392  	for {
 27393  		x := v_0
 27394  		y := v_1
 27395  		v.Reset(ssaop.OpARM64ZFCMEQD)
 27396  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 27397  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTD, types.NewTuple(typ.Mask, types.TypeFlags))
 27398  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 27399  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 27400  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 27401  		v3.AuxInt = ssa.Int64ToAuxInt(4)
 27402  		v1.AddArg2(v2, v3)
 27403  		v0.AddArg(v1)
 27404  		v.AddArg3(x, y, v0)
 27405  		return true
 27406  	}
 27407  }
 27408  func rewriteValue_OpEqualInt16s(v *ssa.Value) bool {
 27409  	v_1 := v.Args[1]
 27410  	v_0 := v.Args[0]
 27411  	b := v.Block
 27412  	typ := &b.Func.Config.Types
 27413  	// match: (EqualInt16s x y)
 27414  	// result: (ZCMPEQH x y (Select0 <types.TypeMask> (PWHILELTH (MOVDconst [0]) (MOVDconst [16]))))
 27415  	for {
 27416  		x := v_0
 27417  		y := v_1
 27418  		v.Reset(ssaop.OpARM64ZCMPEQH)
 27419  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 27420  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTH, types.NewTuple(typ.Mask, types.TypeFlags))
 27421  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 27422  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 27423  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 27424  		v3.AuxInt = ssa.Int64ToAuxInt(16)
 27425  		v1.AddArg2(v2, v3)
 27426  		v0.AddArg(v1)
 27427  		v.AddArg3(x, y, v0)
 27428  		return true
 27429  	}
 27430  }
 27431  func rewriteValue_OpEqualInt32s(v *ssa.Value) bool {
 27432  	v_1 := v.Args[1]
 27433  	v_0 := v.Args[0]
 27434  	b := v.Block
 27435  	typ := &b.Func.Config.Types
 27436  	// match: (EqualInt32s x y)
 27437  	// result: (ZCMPEQS x y (Select0 <types.TypeMask> (PWHILELTS (MOVDconst [0]) (MOVDconst [8]))))
 27438  	for {
 27439  		x := v_0
 27440  		y := v_1
 27441  		v.Reset(ssaop.OpARM64ZCMPEQS)
 27442  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 27443  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTS, types.NewTuple(typ.Mask, types.TypeFlags))
 27444  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 27445  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 27446  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 27447  		v3.AuxInt = ssa.Int64ToAuxInt(8)
 27448  		v1.AddArg2(v2, v3)
 27449  		v0.AddArg(v1)
 27450  		v.AddArg3(x, y, v0)
 27451  		return true
 27452  	}
 27453  }
 27454  func rewriteValue_OpEqualInt64s(v *ssa.Value) bool {
 27455  	v_1 := v.Args[1]
 27456  	v_0 := v.Args[0]
 27457  	b := v.Block
 27458  	typ := &b.Func.Config.Types
 27459  	// match: (EqualInt64s x y)
 27460  	// result: (ZCMPEQD x y (Select0 <types.TypeMask> (PWHILELTD (MOVDconst [0]) (MOVDconst [4]))))
 27461  	for {
 27462  		x := v_0
 27463  		y := v_1
 27464  		v.Reset(ssaop.OpARM64ZCMPEQD)
 27465  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 27466  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTD, types.NewTuple(typ.Mask, types.TypeFlags))
 27467  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 27468  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 27469  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 27470  		v3.AuxInt = ssa.Int64ToAuxInt(4)
 27471  		v1.AddArg2(v2, v3)
 27472  		v0.AddArg(v1)
 27473  		v.AddArg3(x, y, v0)
 27474  		return true
 27475  	}
 27476  }
 27477  func rewriteValue_OpEqualInt8s(v *ssa.Value) bool {
 27478  	v_1 := v.Args[1]
 27479  	v_0 := v.Args[0]
 27480  	b := v.Block
 27481  	typ := &b.Func.Config.Types
 27482  	// match: (EqualInt8s x y)
 27483  	// result: (ZCMPEQB x y (Select0 <types.TypeMask> (PWHILELTB (MOVDconst [0]) (MOVDconst [32]))))
 27484  	for {
 27485  		x := v_0
 27486  		y := v_1
 27487  		v.Reset(ssaop.OpARM64ZCMPEQB)
 27488  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 27489  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTB, types.NewTuple(typ.Mask, types.TypeFlags))
 27490  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 27491  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 27492  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 27493  		v3.AuxInt = ssa.Int64ToAuxInt(32)
 27494  		v1.AddArg2(v2, v3)
 27495  		v0.AddArg(v1)
 27496  		v.AddArg3(x, y, v0)
 27497  		return true
 27498  	}
 27499  }
 27500  func rewriteValue_OpEqualUint16s(v *ssa.Value) bool {
 27501  	v_1 := v.Args[1]
 27502  	v_0 := v.Args[0]
 27503  	b := v.Block
 27504  	typ := &b.Func.Config.Types
 27505  	// match: (EqualUint16s x y)
 27506  	// result: (ZCMPEQH x y (Select0 <types.TypeMask> (PWHILELTH (MOVDconst [0]) (MOVDconst [16]))))
 27507  	for {
 27508  		x := v_0
 27509  		y := v_1
 27510  		v.Reset(ssaop.OpARM64ZCMPEQH)
 27511  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 27512  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTH, types.NewTuple(typ.Mask, types.TypeFlags))
 27513  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 27514  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 27515  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 27516  		v3.AuxInt = ssa.Int64ToAuxInt(16)
 27517  		v1.AddArg2(v2, v3)
 27518  		v0.AddArg(v1)
 27519  		v.AddArg3(x, y, v0)
 27520  		return true
 27521  	}
 27522  }
 27523  func rewriteValue_OpEqualUint32s(v *ssa.Value) bool {
 27524  	v_1 := v.Args[1]
 27525  	v_0 := v.Args[0]
 27526  	b := v.Block
 27527  	typ := &b.Func.Config.Types
 27528  	// match: (EqualUint32s x y)
 27529  	// result: (ZCMPEQS x y (Select0 <types.TypeMask> (PWHILELTS (MOVDconst [0]) (MOVDconst [8]))))
 27530  	for {
 27531  		x := v_0
 27532  		y := v_1
 27533  		v.Reset(ssaop.OpARM64ZCMPEQS)
 27534  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 27535  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTS, types.NewTuple(typ.Mask, types.TypeFlags))
 27536  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 27537  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 27538  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 27539  		v3.AuxInt = ssa.Int64ToAuxInt(8)
 27540  		v1.AddArg2(v2, v3)
 27541  		v0.AddArg(v1)
 27542  		v.AddArg3(x, y, v0)
 27543  		return true
 27544  	}
 27545  }
 27546  func rewriteValue_OpEqualUint64s(v *ssa.Value) bool {
 27547  	v_1 := v.Args[1]
 27548  	v_0 := v.Args[0]
 27549  	b := v.Block
 27550  	typ := &b.Func.Config.Types
 27551  	// match: (EqualUint64s x y)
 27552  	// result: (ZCMPEQD x y (Select0 <types.TypeMask> (PWHILELTD (MOVDconst [0]) (MOVDconst [4]))))
 27553  	for {
 27554  		x := v_0
 27555  		y := v_1
 27556  		v.Reset(ssaop.OpARM64ZCMPEQD)
 27557  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 27558  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTD, types.NewTuple(typ.Mask, types.TypeFlags))
 27559  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 27560  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 27561  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 27562  		v3.AuxInt = ssa.Int64ToAuxInt(4)
 27563  		v1.AddArg2(v2, v3)
 27564  		v0.AddArg(v1)
 27565  		v.AddArg3(x, y, v0)
 27566  		return true
 27567  	}
 27568  }
 27569  func rewriteValue_OpEqualUint8s(v *ssa.Value) bool {
 27570  	v_1 := v.Args[1]
 27571  	v_0 := v.Args[0]
 27572  	b := v.Block
 27573  	typ := &b.Func.Config.Types
 27574  	// match: (EqualUint8s x y)
 27575  	// result: (ZCMPEQB x y (Select0 <types.TypeMask> (PWHILELTB (MOVDconst [0]) (MOVDconst [32]))))
 27576  	for {
 27577  		x := v_0
 27578  		y := v_1
 27579  		v.Reset(ssaop.OpARM64ZCMPEQB)
 27580  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 27581  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTB, types.NewTuple(typ.Mask, types.TypeFlags))
 27582  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 27583  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 27584  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 27585  		v3.AuxInt = ssa.Int64ToAuxInt(32)
 27586  		v1.AddArg2(v2, v3)
 27587  		v0.AddArg(v1)
 27588  		v.AddArg3(x, y, v0)
 27589  		return true
 27590  	}
 27591  }
 27592  func rewriteValue_OpFMA(v *ssa.Value) bool {
 27593  	v_2 := v.Args[2]
 27594  	v_1 := v.Args[1]
 27595  	v_0 := v.Args[0]
 27596  	// match: (FMA x y z)
 27597  	// result: (FMADDD z x y)
 27598  	for {
 27599  		x := v_0
 27600  		y := v_1
 27601  		z := v_2
 27602  		v.Reset(ssaop.OpARM64FMADDD)
 27603  		v.AddArg3(z, x, y)
 27604  		return true
 27605  	}
 27606  }
 27607  func rewriteValue_OpFloorFloat32s(v *ssa.Value) bool {
 27608  	v_0 := v.Args[0]
 27609  	b := v.Block
 27610  	typ := &b.Func.Config.Types
 27611  	// match: (FloorFloat32s x)
 27612  	// result: (ZFRINTMS x (Select0 <types.TypeMask> (PWHILELTS (MOVDconst [0]) (MOVDconst [8]))))
 27613  	for {
 27614  		x := v_0
 27615  		v.Reset(ssaop.OpARM64ZFRINTMS)
 27616  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 27617  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTS, types.NewTuple(typ.Mask, types.TypeFlags))
 27618  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 27619  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 27620  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 27621  		v3.AuxInt = ssa.Int64ToAuxInt(8)
 27622  		v1.AddArg2(v2, v3)
 27623  		v0.AddArg(v1)
 27624  		v.AddArg2(x, v0)
 27625  		return true
 27626  	}
 27627  }
 27628  func rewriteValue_OpFloorFloat64s(v *ssa.Value) bool {
 27629  	v_0 := v.Args[0]
 27630  	b := v.Block
 27631  	typ := &b.Func.Config.Types
 27632  	// match: (FloorFloat64s x)
 27633  	// result: (ZFRINTMD x (Select0 <types.TypeMask> (PWHILELTD (MOVDconst [0]) (MOVDconst [4]))))
 27634  	for {
 27635  		x := v_0
 27636  		v.Reset(ssaop.OpARM64ZFRINTMD)
 27637  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 27638  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTD, types.NewTuple(typ.Mask, types.TypeFlags))
 27639  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 27640  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 27641  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 27642  		v3.AuxInt = ssa.Int64ToAuxInt(4)
 27643  		v1.AddArg2(v2, v3)
 27644  		v0.AddArg(v1)
 27645  		v.AddArg2(x, v0)
 27646  		return true
 27647  	}
 27648  }
 27649  func rewriteValue_OpGreaterEqualFloat32s(v *ssa.Value) bool {
 27650  	v_1 := v.Args[1]
 27651  	v_0 := v.Args[0]
 27652  	b := v.Block
 27653  	typ := &b.Func.Config.Types
 27654  	// match: (GreaterEqualFloat32s x y)
 27655  	// result: (ZFCMGES x y (Select0 <types.TypeMask> (PWHILELTS (MOVDconst [0]) (MOVDconst [8]))))
 27656  	for {
 27657  		x := v_0
 27658  		y := v_1
 27659  		v.Reset(ssaop.OpARM64ZFCMGES)
 27660  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 27661  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTS, types.NewTuple(typ.Mask, types.TypeFlags))
 27662  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 27663  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 27664  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 27665  		v3.AuxInt = ssa.Int64ToAuxInt(8)
 27666  		v1.AddArg2(v2, v3)
 27667  		v0.AddArg(v1)
 27668  		v.AddArg3(x, y, v0)
 27669  		return true
 27670  	}
 27671  }
 27672  func rewriteValue_OpGreaterEqualFloat64s(v *ssa.Value) bool {
 27673  	v_1 := v.Args[1]
 27674  	v_0 := v.Args[0]
 27675  	b := v.Block
 27676  	typ := &b.Func.Config.Types
 27677  	// match: (GreaterEqualFloat64s x y)
 27678  	// result: (ZFCMGED x y (Select0 <types.TypeMask> (PWHILELTD (MOVDconst [0]) (MOVDconst [4]))))
 27679  	for {
 27680  		x := v_0
 27681  		y := v_1
 27682  		v.Reset(ssaop.OpARM64ZFCMGED)
 27683  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 27684  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTD, types.NewTuple(typ.Mask, types.TypeFlags))
 27685  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 27686  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 27687  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 27688  		v3.AuxInt = ssa.Int64ToAuxInt(4)
 27689  		v1.AddArg2(v2, v3)
 27690  		v0.AddArg(v1)
 27691  		v.AddArg3(x, y, v0)
 27692  		return true
 27693  	}
 27694  }
 27695  func rewriteValue_OpGreaterEqualInt16s(v *ssa.Value) bool {
 27696  	v_1 := v.Args[1]
 27697  	v_0 := v.Args[0]
 27698  	b := v.Block
 27699  	typ := &b.Func.Config.Types
 27700  	// match: (GreaterEqualInt16s x y)
 27701  	// result: (ZCMPGEH x y (Select0 <types.TypeMask> (PWHILELTH (MOVDconst [0]) (MOVDconst [16]))))
 27702  	for {
 27703  		x := v_0
 27704  		y := v_1
 27705  		v.Reset(ssaop.OpARM64ZCMPGEH)
 27706  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 27707  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTH, types.NewTuple(typ.Mask, types.TypeFlags))
 27708  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 27709  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 27710  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 27711  		v3.AuxInt = ssa.Int64ToAuxInt(16)
 27712  		v1.AddArg2(v2, v3)
 27713  		v0.AddArg(v1)
 27714  		v.AddArg3(x, y, v0)
 27715  		return true
 27716  	}
 27717  }
 27718  func rewriteValue_OpGreaterEqualInt32s(v *ssa.Value) bool {
 27719  	v_1 := v.Args[1]
 27720  	v_0 := v.Args[0]
 27721  	b := v.Block
 27722  	typ := &b.Func.Config.Types
 27723  	// match: (GreaterEqualInt32s x y)
 27724  	// result: (ZCMPGES x y (Select0 <types.TypeMask> (PWHILELTS (MOVDconst [0]) (MOVDconst [8]))))
 27725  	for {
 27726  		x := v_0
 27727  		y := v_1
 27728  		v.Reset(ssaop.OpARM64ZCMPGES)
 27729  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 27730  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTS, types.NewTuple(typ.Mask, types.TypeFlags))
 27731  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 27732  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 27733  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 27734  		v3.AuxInt = ssa.Int64ToAuxInt(8)
 27735  		v1.AddArg2(v2, v3)
 27736  		v0.AddArg(v1)
 27737  		v.AddArg3(x, y, v0)
 27738  		return true
 27739  	}
 27740  }
 27741  func rewriteValue_OpGreaterEqualInt64s(v *ssa.Value) bool {
 27742  	v_1 := v.Args[1]
 27743  	v_0 := v.Args[0]
 27744  	b := v.Block
 27745  	typ := &b.Func.Config.Types
 27746  	// match: (GreaterEqualInt64s x y)
 27747  	// result: (ZCMPGED x y (Select0 <types.TypeMask> (PWHILELTD (MOVDconst [0]) (MOVDconst [4]))))
 27748  	for {
 27749  		x := v_0
 27750  		y := v_1
 27751  		v.Reset(ssaop.OpARM64ZCMPGED)
 27752  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 27753  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTD, types.NewTuple(typ.Mask, types.TypeFlags))
 27754  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 27755  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 27756  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 27757  		v3.AuxInt = ssa.Int64ToAuxInt(4)
 27758  		v1.AddArg2(v2, v3)
 27759  		v0.AddArg(v1)
 27760  		v.AddArg3(x, y, v0)
 27761  		return true
 27762  	}
 27763  }
 27764  func rewriteValue_OpGreaterEqualInt8s(v *ssa.Value) bool {
 27765  	v_1 := v.Args[1]
 27766  	v_0 := v.Args[0]
 27767  	b := v.Block
 27768  	typ := &b.Func.Config.Types
 27769  	// match: (GreaterEqualInt8s x y)
 27770  	// result: (ZCMPGEB x y (Select0 <types.TypeMask> (PWHILELTB (MOVDconst [0]) (MOVDconst [32]))))
 27771  	for {
 27772  		x := v_0
 27773  		y := v_1
 27774  		v.Reset(ssaop.OpARM64ZCMPGEB)
 27775  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 27776  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTB, types.NewTuple(typ.Mask, types.TypeFlags))
 27777  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 27778  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 27779  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 27780  		v3.AuxInt = ssa.Int64ToAuxInt(32)
 27781  		v1.AddArg2(v2, v3)
 27782  		v0.AddArg(v1)
 27783  		v.AddArg3(x, y, v0)
 27784  		return true
 27785  	}
 27786  }
 27787  func rewriteValue_OpGreaterEqualUint16s(v *ssa.Value) bool {
 27788  	v_1 := v.Args[1]
 27789  	v_0 := v.Args[0]
 27790  	b := v.Block
 27791  	typ := &b.Func.Config.Types
 27792  	// match: (GreaterEqualUint16s x y)
 27793  	// result: (ZCMPHSH x y (Select0 <types.TypeMask> (PWHILELTH (MOVDconst [0]) (MOVDconst [16]))))
 27794  	for {
 27795  		x := v_0
 27796  		y := v_1
 27797  		v.Reset(ssaop.OpARM64ZCMPHSH)
 27798  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 27799  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTH, types.NewTuple(typ.Mask, types.TypeFlags))
 27800  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 27801  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 27802  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 27803  		v3.AuxInt = ssa.Int64ToAuxInt(16)
 27804  		v1.AddArg2(v2, v3)
 27805  		v0.AddArg(v1)
 27806  		v.AddArg3(x, y, v0)
 27807  		return true
 27808  	}
 27809  }
 27810  func rewriteValue_OpGreaterEqualUint32s(v *ssa.Value) bool {
 27811  	v_1 := v.Args[1]
 27812  	v_0 := v.Args[0]
 27813  	b := v.Block
 27814  	typ := &b.Func.Config.Types
 27815  	// match: (GreaterEqualUint32s x y)
 27816  	// result: (ZCMPHSS x y (Select0 <types.TypeMask> (PWHILELTS (MOVDconst [0]) (MOVDconst [8]))))
 27817  	for {
 27818  		x := v_0
 27819  		y := v_1
 27820  		v.Reset(ssaop.OpARM64ZCMPHSS)
 27821  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 27822  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTS, types.NewTuple(typ.Mask, types.TypeFlags))
 27823  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 27824  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 27825  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 27826  		v3.AuxInt = ssa.Int64ToAuxInt(8)
 27827  		v1.AddArg2(v2, v3)
 27828  		v0.AddArg(v1)
 27829  		v.AddArg3(x, y, v0)
 27830  		return true
 27831  	}
 27832  }
 27833  func rewriteValue_OpGreaterEqualUint64s(v *ssa.Value) bool {
 27834  	v_1 := v.Args[1]
 27835  	v_0 := v.Args[0]
 27836  	b := v.Block
 27837  	typ := &b.Func.Config.Types
 27838  	// match: (GreaterEqualUint64s x y)
 27839  	// result: (ZCMPHSD x y (Select0 <types.TypeMask> (PWHILELTD (MOVDconst [0]) (MOVDconst [4]))))
 27840  	for {
 27841  		x := v_0
 27842  		y := v_1
 27843  		v.Reset(ssaop.OpARM64ZCMPHSD)
 27844  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 27845  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTD, types.NewTuple(typ.Mask, types.TypeFlags))
 27846  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 27847  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 27848  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 27849  		v3.AuxInt = ssa.Int64ToAuxInt(4)
 27850  		v1.AddArg2(v2, v3)
 27851  		v0.AddArg(v1)
 27852  		v.AddArg3(x, y, v0)
 27853  		return true
 27854  	}
 27855  }
 27856  func rewriteValue_OpGreaterEqualUint8s(v *ssa.Value) bool {
 27857  	v_1 := v.Args[1]
 27858  	v_0 := v.Args[0]
 27859  	b := v.Block
 27860  	typ := &b.Func.Config.Types
 27861  	// match: (GreaterEqualUint8s x y)
 27862  	// result: (ZCMPHSB x y (Select0 <types.TypeMask> (PWHILELTB (MOVDconst [0]) (MOVDconst [32]))))
 27863  	for {
 27864  		x := v_0
 27865  		y := v_1
 27866  		v.Reset(ssaop.OpARM64ZCMPHSB)
 27867  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 27868  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTB, types.NewTuple(typ.Mask, types.TypeFlags))
 27869  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 27870  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 27871  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 27872  		v3.AuxInt = ssa.Int64ToAuxInt(32)
 27873  		v1.AddArg2(v2, v3)
 27874  		v0.AddArg(v1)
 27875  		v.AddArg3(x, y, v0)
 27876  		return true
 27877  	}
 27878  }
 27879  func rewriteValue_OpGreaterFloat32s(v *ssa.Value) bool {
 27880  	v_1 := v.Args[1]
 27881  	v_0 := v.Args[0]
 27882  	b := v.Block
 27883  	typ := &b.Func.Config.Types
 27884  	// match: (GreaterFloat32s x y)
 27885  	// result: (ZFCMGTS x y (Select0 <types.TypeMask> (PWHILELTS (MOVDconst [0]) (MOVDconst [8]))))
 27886  	for {
 27887  		x := v_0
 27888  		y := v_1
 27889  		v.Reset(ssaop.OpARM64ZFCMGTS)
 27890  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 27891  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTS, types.NewTuple(typ.Mask, types.TypeFlags))
 27892  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 27893  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 27894  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 27895  		v3.AuxInt = ssa.Int64ToAuxInt(8)
 27896  		v1.AddArg2(v2, v3)
 27897  		v0.AddArg(v1)
 27898  		v.AddArg3(x, y, v0)
 27899  		return true
 27900  	}
 27901  }
 27902  func rewriteValue_OpGreaterFloat64s(v *ssa.Value) bool {
 27903  	v_1 := v.Args[1]
 27904  	v_0 := v.Args[0]
 27905  	b := v.Block
 27906  	typ := &b.Func.Config.Types
 27907  	// match: (GreaterFloat64s x y)
 27908  	// result: (ZFCMGTD x y (Select0 <types.TypeMask> (PWHILELTD (MOVDconst [0]) (MOVDconst [4]))))
 27909  	for {
 27910  		x := v_0
 27911  		y := v_1
 27912  		v.Reset(ssaop.OpARM64ZFCMGTD)
 27913  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 27914  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTD, types.NewTuple(typ.Mask, types.TypeFlags))
 27915  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 27916  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 27917  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 27918  		v3.AuxInt = ssa.Int64ToAuxInt(4)
 27919  		v1.AddArg2(v2, v3)
 27920  		v0.AddArg(v1)
 27921  		v.AddArg3(x, y, v0)
 27922  		return true
 27923  	}
 27924  }
 27925  func rewriteValue_OpGreaterInt16s(v *ssa.Value) bool {
 27926  	v_1 := v.Args[1]
 27927  	v_0 := v.Args[0]
 27928  	b := v.Block
 27929  	typ := &b.Func.Config.Types
 27930  	// match: (GreaterInt16s x y)
 27931  	// result: (ZCMPGTH x y (Select0 <types.TypeMask> (PWHILELTH (MOVDconst [0]) (MOVDconst [16]))))
 27932  	for {
 27933  		x := v_0
 27934  		y := v_1
 27935  		v.Reset(ssaop.OpARM64ZCMPGTH)
 27936  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 27937  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTH, types.NewTuple(typ.Mask, types.TypeFlags))
 27938  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 27939  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 27940  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 27941  		v3.AuxInt = ssa.Int64ToAuxInt(16)
 27942  		v1.AddArg2(v2, v3)
 27943  		v0.AddArg(v1)
 27944  		v.AddArg3(x, y, v0)
 27945  		return true
 27946  	}
 27947  }
 27948  func rewriteValue_OpGreaterInt32s(v *ssa.Value) bool {
 27949  	v_1 := v.Args[1]
 27950  	v_0 := v.Args[0]
 27951  	b := v.Block
 27952  	typ := &b.Func.Config.Types
 27953  	// match: (GreaterInt32s x y)
 27954  	// result: (ZCMPGTS x y (Select0 <types.TypeMask> (PWHILELTS (MOVDconst [0]) (MOVDconst [8]))))
 27955  	for {
 27956  		x := v_0
 27957  		y := v_1
 27958  		v.Reset(ssaop.OpARM64ZCMPGTS)
 27959  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 27960  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTS, types.NewTuple(typ.Mask, types.TypeFlags))
 27961  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 27962  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 27963  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 27964  		v3.AuxInt = ssa.Int64ToAuxInt(8)
 27965  		v1.AddArg2(v2, v3)
 27966  		v0.AddArg(v1)
 27967  		v.AddArg3(x, y, v0)
 27968  		return true
 27969  	}
 27970  }
 27971  func rewriteValue_OpGreaterInt64s(v *ssa.Value) bool {
 27972  	v_1 := v.Args[1]
 27973  	v_0 := v.Args[0]
 27974  	b := v.Block
 27975  	typ := &b.Func.Config.Types
 27976  	// match: (GreaterInt64s x y)
 27977  	// result: (ZCMPGTD x y (Select0 <types.TypeMask> (PWHILELTD (MOVDconst [0]) (MOVDconst [4]))))
 27978  	for {
 27979  		x := v_0
 27980  		y := v_1
 27981  		v.Reset(ssaop.OpARM64ZCMPGTD)
 27982  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 27983  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTD, types.NewTuple(typ.Mask, types.TypeFlags))
 27984  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 27985  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 27986  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 27987  		v3.AuxInt = ssa.Int64ToAuxInt(4)
 27988  		v1.AddArg2(v2, v3)
 27989  		v0.AddArg(v1)
 27990  		v.AddArg3(x, y, v0)
 27991  		return true
 27992  	}
 27993  }
 27994  func rewriteValue_OpGreaterInt8s(v *ssa.Value) bool {
 27995  	v_1 := v.Args[1]
 27996  	v_0 := v.Args[0]
 27997  	b := v.Block
 27998  	typ := &b.Func.Config.Types
 27999  	// match: (GreaterInt8s x y)
 28000  	// result: (ZCMPGTB x y (Select0 <types.TypeMask> (PWHILELTB (MOVDconst [0]) (MOVDconst [32]))))
 28001  	for {
 28002  		x := v_0
 28003  		y := v_1
 28004  		v.Reset(ssaop.OpARM64ZCMPGTB)
 28005  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 28006  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTB, types.NewTuple(typ.Mask, types.TypeFlags))
 28007  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 28008  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 28009  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 28010  		v3.AuxInt = ssa.Int64ToAuxInt(32)
 28011  		v1.AddArg2(v2, v3)
 28012  		v0.AddArg(v1)
 28013  		v.AddArg3(x, y, v0)
 28014  		return true
 28015  	}
 28016  }
 28017  func rewriteValue_OpGreaterUint16s(v *ssa.Value) bool {
 28018  	v_1 := v.Args[1]
 28019  	v_0 := v.Args[0]
 28020  	b := v.Block
 28021  	typ := &b.Func.Config.Types
 28022  	// match: (GreaterUint16s x y)
 28023  	// result: (ZCMPHIH x y (Select0 <types.TypeMask> (PWHILELTH (MOVDconst [0]) (MOVDconst [16]))))
 28024  	for {
 28025  		x := v_0
 28026  		y := v_1
 28027  		v.Reset(ssaop.OpARM64ZCMPHIH)
 28028  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 28029  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTH, types.NewTuple(typ.Mask, types.TypeFlags))
 28030  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 28031  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 28032  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 28033  		v3.AuxInt = ssa.Int64ToAuxInt(16)
 28034  		v1.AddArg2(v2, v3)
 28035  		v0.AddArg(v1)
 28036  		v.AddArg3(x, y, v0)
 28037  		return true
 28038  	}
 28039  }
 28040  func rewriteValue_OpGreaterUint32s(v *ssa.Value) bool {
 28041  	v_1 := v.Args[1]
 28042  	v_0 := v.Args[0]
 28043  	b := v.Block
 28044  	typ := &b.Func.Config.Types
 28045  	// match: (GreaterUint32s x y)
 28046  	// result: (ZCMPHIS x y (Select0 <types.TypeMask> (PWHILELTS (MOVDconst [0]) (MOVDconst [8]))))
 28047  	for {
 28048  		x := v_0
 28049  		y := v_1
 28050  		v.Reset(ssaop.OpARM64ZCMPHIS)
 28051  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 28052  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTS, types.NewTuple(typ.Mask, types.TypeFlags))
 28053  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 28054  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 28055  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 28056  		v3.AuxInt = ssa.Int64ToAuxInt(8)
 28057  		v1.AddArg2(v2, v3)
 28058  		v0.AddArg(v1)
 28059  		v.AddArg3(x, y, v0)
 28060  		return true
 28061  	}
 28062  }
 28063  func rewriteValue_OpGreaterUint64s(v *ssa.Value) bool {
 28064  	v_1 := v.Args[1]
 28065  	v_0 := v.Args[0]
 28066  	b := v.Block
 28067  	typ := &b.Func.Config.Types
 28068  	// match: (GreaterUint64s x y)
 28069  	// result: (ZCMPHID x y (Select0 <types.TypeMask> (PWHILELTD (MOVDconst [0]) (MOVDconst [4]))))
 28070  	for {
 28071  		x := v_0
 28072  		y := v_1
 28073  		v.Reset(ssaop.OpARM64ZCMPHID)
 28074  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 28075  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTD, types.NewTuple(typ.Mask, types.TypeFlags))
 28076  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 28077  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 28078  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 28079  		v3.AuxInt = ssa.Int64ToAuxInt(4)
 28080  		v1.AddArg2(v2, v3)
 28081  		v0.AddArg(v1)
 28082  		v.AddArg3(x, y, v0)
 28083  		return true
 28084  	}
 28085  }
 28086  func rewriteValue_OpGreaterUint8s(v *ssa.Value) bool {
 28087  	v_1 := v.Args[1]
 28088  	v_0 := v.Args[0]
 28089  	b := v.Block
 28090  	typ := &b.Func.Config.Types
 28091  	// match: (GreaterUint8s x y)
 28092  	// result: (ZCMPHIB x y (Select0 <types.TypeMask> (PWHILELTB (MOVDconst [0]) (MOVDconst [32]))))
 28093  	for {
 28094  		x := v_0
 28095  		y := v_1
 28096  		v.Reset(ssaop.OpARM64ZCMPHIB)
 28097  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 28098  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTB, types.NewTuple(typ.Mask, types.TypeFlags))
 28099  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 28100  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 28101  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 28102  		v3.AuxInt = ssa.Int64ToAuxInt(32)
 28103  		v1.AddArg2(v2, v3)
 28104  		v0.AddArg(v1)
 28105  		v.AddArg3(x, y, v0)
 28106  		return true
 28107  	}
 28108  }
 28109  func rewriteValue_OpHmul32(v *ssa.Value) bool {
 28110  	v_1 := v.Args[1]
 28111  	v_0 := v.Args[0]
 28112  	b := v.Block
 28113  	typ := &b.Func.Config.Types
 28114  	// match: (Hmul32 x y)
 28115  	// result: (SRAconst (MULL <typ.Int64> x y) [32])
 28116  	for {
 28117  		x := v_0
 28118  		y := v_1
 28119  		v.Reset(ssaop.OpARM64SRAconst)
 28120  		v.AuxInt = ssa.Int64ToAuxInt(32)
 28121  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MULL, typ.Int64)
 28122  		v0.AddArg2(x, y)
 28123  		v.AddArg(v0)
 28124  		return true
 28125  	}
 28126  }
 28127  func rewriteValue_OpHmul32u(v *ssa.Value) bool {
 28128  	v_1 := v.Args[1]
 28129  	v_0 := v.Args[0]
 28130  	b := v.Block
 28131  	typ := &b.Func.Config.Types
 28132  	// match: (Hmul32u x y)
 28133  	// result: (SRAconst (UMULL <typ.UInt64> x y) [32])
 28134  	for {
 28135  		x := v_0
 28136  		y := v_1
 28137  		v.Reset(ssaop.OpARM64SRAconst)
 28138  		v.AuxInt = ssa.Int64ToAuxInt(32)
 28139  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64UMULL, typ.UInt64)
 28140  		v0.AddArg2(x, y)
 28141  		v.AddArg(v0)
 28142  		return true
 28143  	}
 28144  }
 28145  func rewriteValue_OpIfElseFloat32s(v *ssa.Value) bool {
 28146  	v_2 := v.Args[2]
 28147  	v_1 := v.Args[1]
 28148  	v_0 := v.Args[0]
 28149  	// match: (IfElseFloat32s x mask y)
 28150  	// result: (ZSELS x y mask)
 28151  	for {
 28152  		x := v_0
 28153  		mask := v_1
 28154  		y := v_2
 28155  		v.Reset(ssaop.OpARM64ZSELS)
 28156  		v.AddArg3(x, y, mask)
 28157  		return true
 28158  	}
 28159  }
 28160  func rewriteValue_OpIfElseFloat64s(v *ssa.Value) bool {
 28161  	v_2 := v.Args[2]
 28162  	v_1 := v.Args[1]
 28163  	v_0 := v.Args[0]
 28164  	// match: (IfElseFloat64s x mask y)
 28165  	// result: (ZSELD x y mask)
 28166  	for {
 28167  		x := v_0
 28168  		mask := v_1
 28169  		y := v_2
 28170  		v.Reset(ssaop.OpARM64ZSELD)
 28171  		v.AddArg3(x, y, mask)
 28172  		return true
 28173  	}
 28174  }
 28175  func rewriteValue_OpIfElseInt16s(v *ssa.Value) bool {
 28176  	v_2 := v.Args[2]
 28177  	v_1 := v.Args[1]
 28178  	v_0 := v.Args[0]
 28179  	// match: (IfElseInt16s x mask y)
 28180  	// result: (ZSELH x y mask)
 28181  	for {
 28182  		x := v_0
 28183  		mask := v_1
 28184  		y := v_2
 28185  		v.Reset(ssaop.OpARM64ZSELH)
 28186  		v.AddArg3(x, y, mask)
 28187  		return true
 28188  	}
 28189  }
 28190  func rewriteValue_OpIfElseInt32s(v *ssa.Value) bool {
 28191  	v_2 := v.Args[2]
 28192  	v_1 := v.Args[1]
 28193  	v_0 := v.Args[0]
 28194  	// match: (IfElseInt32s x mask y)
 28195  	// result: (ZSELS x y mask)
 28196  	for {
 28197  		x := v_0
 28198  		mask := v_1
 28199  		y := v_2
 28200  		v.Reset(ssaop.OpARM64ZSELS)
 28201  		v.AddArg3(x, y, mask)
 28202  		return true
 28203  	}
 28204  }
 28205  func rewriteValue_OpIfElseInt64s(v *ssa.Value) bool {
 28206  	v_2 := v.Args[2]
 28207  	v_1 := v.Args[1]
 28208  	v_0 := v.Args[0]
 28209  	// match: (IfElseInt64s x mask y)
 28210  	// result: (ZSELD x y mask)
 28211  	for {
 28212  		x := v_0
 28213  		mask := v_1
 28214  		y := v_2
 28215  		v.Reset(ssaop.OpARM64ZSELD)
 28216  		v.AddArg3(x, y, mask)
 28217  		return true
 28218  	}
 28219  }
 28220  func rewriteValue_OpIfElseInt8s(v *ssa.Value) bool {
 28221  	v_2 := v.Args[2]
 28222  	v_1 := v.Args[1]
 28223  	v_0 := v.Args[0]
 28224  	// match: (IfElseInt8s x mask y)
 28225  	// result: (ZSELB x y mask)
 28226  	for {
 28227  		x := v_0
 28228  		mask := v_1
 28229  		y := v_2
 28230  		v.Reset(ssaop.OpARM64ZSELB)
 28231  		v.AddArg3(x, y, mask)
 28232  		return true
 28233  	}
 28234  }
 28235  func rewriteValue_OpIfElseUint16s(v *ssa.Value) bool {
 28236  	v_2 := v.Args[2]
 28237  	v_1 := v.Args[1]
 28238  	v_0 := v.Args[0]
 28239  	// match: (IfElseUint16s x mask y)
 28240  	// result: (ZSELH x y mask)
 28241  	for {
 28242  		x := v_0
 28243  		mask := v_1
 28244  		y := v_2
 28245  		v.Reset(ssaop.OpARM64ZSELH)
 28246  		v.AddArg3(x, y, mask)
 28247  		return true
 28248  	}
 28249  }
 28250  func rewriteValue_OpIfElseUint32s(v *ssa.Value) bool {
 28251  	v_2 := v.Args[2]
 28252  	v_1 := v.Args[1]
 28253  	v_0 := v.Args[0]
 28254  	// match: (IfElseUint32s x mask y)
 28255  	// result: (ZSELS x y mask)
 28256  	for {
 28257  		x := v_0
 28258  		mask := v_1
 28259  		y := v_2
 28260  		v.Reset(ssaop.OpARM64ZSELS)
 28261  		v.AddArg3(x, y, mask)
 28262  		return true
 28263  	}
 28264  }
 28265  func rewriteValue_OpIfElseUint64s(v *ssa.Value) bool {
 28266  	v_2 := v.Args[2]
 28267  	v_1 := v.Args[1]
 28268  	v_0 := v.Args[0]
 28269  	// match: (IfElseUint64s x mask y)
 28270  	// result: (ZSELD x y mask)
 28271  	for {
 28272  		x := v_0
 28273  		mask := v_1
 28274  		y := v_2
 28275  		v.Reset(ssaop.OpARM64ZSELD)
 28276  		v.AddArg3(x, y, mask)
 28277  		return true
 28278  	}
 28279  }
 28280  func rewriteValue_OpIfElseUint8s(v *ssa.Value) bool {
 28281  	v_2 := v.Args[2]
 28282  	v_1 := v.Args[1]
 28283  	v_0 := v.Args[0]
 28284  	// match: (IfElseUint8s x mask y)
 28285  	// result: (ZSELB x y mask)
 28286  	for {
 28287  		x := v_0
 28288  		mask := v_1
 28289  		y := v_2
 28290  		v.Reset(ssaop.OpARM64ZSELB)
 28291  		v.AddArg3(x, y, mask)
 28292  		return true
 28293  	}
 28294  }
 28295  func rewriteValue_OpIsInBounds(v *ssa.Value) bool {
 28296  	v_1 := v.Args[1]
 28297  	v_0 := v.Args[0]
 28298  	b := v.Block
 28299  	// match: (IsInBounds idx len)
 28300  	// result: (LessThanU (CMP idx len))
 28301  	for {
 28302  		idx := v_0
 28303  		len := v_1
 28304  		v.Reset(ssaop.OpARM64LessThanU)
 28305  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMP, types.TypeFlags)
 28306  		v0.AddArg2(idx, len)
 28307  		v.AddArg(v0)
 28308  		return true
 28309  	}
 28310  }
 28311  func rewriteValue_OpIsNonNil(v *ssa.Value) bool {
 28312  	v_0 := v.Args[0]
 28313  	b := v.Block
 28314  	// match: (IsNonNil ptr)
 28315  	// result: (NotEqual (CMPconst [0] ptr))
 28316  	for {
 28317  		ptr := v_0
 28318  		v.Reset(ssaop.OpARM64NotEqual)
 28319  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMPconst, types.TypeFlags)
 28320  		v0.AuxInt = ssa.Int64ToAuxInt(0)
 28321  		v0.AddArg(ptr)
 28322  		v.AddArg(v0)
 28323  		return true
 28324  	}
 28325  }
 28326  func rewriteValue_OpIsSliceInBounds(v *ssa.Value) bool {
 28327  	v_1 := v.Args[1]
 28328  	v_0 := v.Args[0]
 28329  	b := v.Block
 28330  	// match: (IsSliceInBounds idx len)
 28331  	// result: (LessEqualU (CMP idx len))
 28332  	for {
 28333  		idx := v_0
 28334  		len := v_1
 28335  		v.Reset(ssaop.OpARM64LessEqualU)
 28336  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMP, types.TypeFlags)
 28337  		v0.AddArg2(idx, len)
 28338  		v.AddArg(v0)
 28339  		return true
 28340  	}
 28341  }
 28342  func rewriteValue_OpLeq16(v *ssa.Value) bool {
 28343  	v_1 := v.Args[1]
 28344  	v_0 := v.Args[0]
 28345  	b := v.Block
 28346  	typ := &b.Func.Config.Types
 28347  	// match: (Leq16 x y)
 28348  	// result: (LessEqual (CMPW (SignExt16to32 x) (SignExt16to32 y)))
 28349  	for {
 28350  		x := v_0
 28351  		y := v_1
 28352  		v.Reset(ssaop.OpARM64LessEqual)
 28353  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMPW, types.TypeFlags)
 28354  		v1 := b.NewValue0(v.Pos, ssaop.OpSignExt16to32, typ.Int32)
 28355  		v1.AddArg(x)
 28356  		v2 := b.NewValue0(v.Pos, ssaop.OpSignExt16to32, typ.Int32)
 28357  		v2.AddArg(y)
 28358  		v0.AddArg2(v1, v2)
 28359  		v.AddArg(v0)
 28360  		return true
 28361  	}
 28362  }
 28363  func rewriteValue_OpLeq16U(v *ssa.Value) bool {
 28364  	v_1 := v.Args[1]
 28365  	v_0 := v.Args[0]
 28366  	b := v.Block
 28367  	typ := &b.Func.Config.Types
 28368  	// match: (Leq16U x zero:(MOVDconst [0]))
 28369  	// result: (Eq16 x zero)
 28370  	for {
 28371  		x := v_0
 28372  		zero := v_1
 28373  		if zero.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(zero.AuxInt) != 0 {
 28374  			break
 28375  		}
 28376  		v.Reset(ssaop.OpEq16)
 28377  		v.AddArg2(x, zero)
 28378  		return true
 28379  	}
 28380  	// match: (Leq16U (MOVDconst [1]) x)
 28381  	// result: (Neq16 (MOVDconst [0]) x)
 28382  	for {
 28383  		if v_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0.AuxInt) != 1 {
 28384  			break
 28385  		}
 28386  		x := v_1
 28387  		v.Reset(ssaop.OpNeq16)
 28388  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 28389  		v0.AuxInt = ssa.Int64ToAuxInt(0)
 28390  		v.AddArg2(v0, x)
 28391  		return true
 28392  	}
 28393  	// match: (Leq16U x y)
 28394  	// result: (LessEqualU (CMPW (ZeroExt16to32 x) (ZeroExt16to32 y)))
 28395  	for {
 28396  		x := v_0
 28397  		y := v_1
 28398  		v.Reset(ssaop.OpARM64LessEqualU)
 28399  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMPW, types.TypeFlags)
 28400  		v1 := b.NewValue0(v.Pos, ssaop.OpZeroExt16to32, typ.UInt32)
 28401  		v1.AddArg(x)
 28402  		v2 := b.NewValue0(v.Pos, ssaop.OpZeroExt16to32, typ.UInt32)
 28403  		v2.AddArg(y)
 28404  		v0.AddArg2(v1, v2)
 28405  		v.AddArg(v0)
 28406  		return true
 28407  	}
 28408  }
 28409  func rewriteValue_OpLeq32(v *ssa.Value) bool {
 28410  	v_1 := v.Args[1]
 28411  	v_0 := v.Args[0]
 28412  	b := v.Block
 28413  	// match: (Leq32 x y)
 28414  	// result: (LessEqual (CMPW x y))
 28415  	for {
 28416  		x := v_0
 28417  		y := v_1
 28418  		v.Reset(ssaop.OpARM64LessEqual)
 28419  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMPW, types.TypeFlags)
 28420  		v0.AddArg2(x, y)
 28421  		v.AddArg(v0)
 28422  		return true
 28423  	}
 28424  }
 28425  func rewriteValue_OpLeq32F(v *ssa.Value) bool {
 28426  	v_1 := v.Args[1]
 28427  	v_0 := v.Args[0]
 28428  	b := v.Block
 28429  	// match: (Leq32F x y)
 28430  	// result: (LessEqualF (FCMPS x y))
 28431  	for {
 28432  		x := v_0
 28433  		y := v_1
 28434  		v.Reset(ssaop.OpARM64LessEqualF)
 28435  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64FCMPS, types.TypeFlags)
 28436  		v0.AddArg2(x, y)
 28437  		v.AddArg(v0)
 28438  		return true
 28439  	}
 28440  }
 28441  func rewriteValue_OpLeq32U(v *ssa.Value) bool {
 28442  	v_1 := v.Args[1]
 28443  	v_0 := v.Args[0]
 28444  	b := v.Block
 28445  	typ := &b.Func.Config.Types
 28446  	// match: (Leq32U x zero:(MOVDconst [0]))
 28447  	// result: (Eq32 x zero)
 28448  	for {
 28449  		x := v_0
 28450  		zero := v_1
 28451  		if zero.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(zero.AuxInt) != 0 {
 28452  			break
 28453  		}
 28454  		v.Reset(ssaop.OpEq32)
 28455  		v.AddArg2(x, zero)
 28456  		return true
 28457  	}
 28458  	// match: (Leq32U (MOVDconst [1]) x)
 28459  	// result: (Neq32 (MOVDconst [0]) x)
 28460  	for {
 28461  		if v_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0.AuxInt) != 1 {
 28462  			break
 28463  		}
 28464  		x := v_1
 28465  		v.Reset(ssaop.OpNeq32)
 28466  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 28467  		v0.AuxInt = ssa.Int64ToAuxInt(0)
 28468  		v.AddArg2(v0, x)
 28469  		return true
 28470  	}
 28471  	// match: (Leq32U x y)
 28472  	// result: (LessEqualU (CMPW x y))
 28473  	for {
 28474  		x := v_0
 28475  		y := v_1
 28476  		v.Reset(ssaop.OpARM64LessEqualU)
 28477  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMPW, types.TypeFlags)
 28478  		v0.AddArg2(x, y)
 28479  		v.AddArg(v0)
 28480  		return true
 28481  	}
 28482  }
 28483  func rewriteValue_OpLeq64(v *ssa.Value) bool {
 28484  	v_1 := v.Args[1]
 28485  	v_0 := v.Args[0]
 28486  	b := v.Block
 28487  	// match: (Leq64 x y)
 28488  	// result: (LessEqual (CMP x y))
 28489  	for {
 28490  		x := v_0
 28491  		y := v_1
 28492  		v.Reset(ssaop.OpARM64LessEqual)
 28493  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMP, types.TypeFlags)
 28494  		v0.AddArg2(x, y)
 28495  		v.AddArg(v0)
 28496  		return true
 28497  	}
 28498  }
 28499  func rewriteValue_OpLeq64F(v *ssa.Value) bool {
 28500  	v_1 := v.Args[1]
 28501  	v_0 := v.Args[0]
 28502  	b := v.Block
 28503  	// match: (Leq64F x y)
 28504  	// result: (LessEqualF (FCMPD x y))
 28505  	for {
 28506  		x := v_0
 28507  		y := v_1
 28508  		v.Reset(ssaop.OpARM64LessEqualF)
 28509  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64FCMPD, types.TypeFlags)
 28510  		v0.AddArg2(x, y)
 28511  		v.AddArg(v0)
 28512  		return true
 28513  	}
 28514  }
 28515  func rewriteValue_OpLeq64U(v *ssa.Value) bool {
 28516  	v_1 := v.Args[1]
 28517  	v_0 := v.Args[0]
 28518  	b := v.Block
 28519  	typ := &b.Func.Config.Types
 28520  	// match: (Leq64U x zero:(MOVDconst [0]))
 28521  	// result: (Eq64 x zero)
 28522  	for {
 28523  		x := v_0
 28524  		zero := v_1
 28525  		if zero.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(zero.AuxInt) != 0 {
 28526  			break
 28527  		}
 28528  		v.Reset(ssaop.OpEq64)
 28529  		v.AddArg2(x, zero)
 28530  		return true
 28531  	}
 28532  	// match: (Leq64U (MOVDconst [1]) x)
 28533  	// result: (Neq64 (MOVDconst [0]) x)
 28534  	for {
 28535  		if v_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0.AuxInt) != 1 {
 28536  			break
 28537  		}
 28538  		x := v_1
 28539  		v.Reset(ssaop.OpNeq64)
 28540  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 28541  		v0.AuxInt = ssa.Int64ToAuxInt(0)
 28542  		v.AddArg2(v0, x)
 28543  		return true
 28544  	}
 28545  	// match: (Leq64U x y)
 28546  	// result: (LessEqualU (CMP x y))
 28547  	for {
 28548  		x := v_0
 28549  		y := v_1
 28550  		v.Reset(ssaop.OpARM64LessEqualU)
 28551  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMP, types.TypeFlags)
 28552  		v0.AddArg2(x, y)
 28553  		v.AddArg(v0)
 28554  		return true
 28555  	}
 28556  }
 28557  func rewriteValue_OpLeq8(v *ssa.Value) bool {
 28558  	v_1 := v.Args[1]
 28559  	v_0 := v.Args[0]
 28560  	b := v.Block
 28561  	typ := &b.Func.Config.Types
 28562  	// match: (Leq8 x y)
 28563  	// result: (LessEqual (CMPW (SignExt8to32 x) (SignExt8to32 y)))
 28564  	for {
 28565  		x := v_0
 28566  		y := v_1
 28567  		v.Reset(ssaop.OpARM64LessEqual)
 28568  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMPW, types.TypeFlags)
 28569  		v1 := b.NewValue0(v.Pos, ssaop.OpSignExt8to32, typ.Int32)
 28570  		v1.AddArg(x)
 28571  		v2 := b.NewValue0(v.Pos, ssaop.OpSignExt8to32, typ.Int32)
 28572  		v2.AddArg(y)
 28573  		v0.AddArg2(v1, v2)
 28574  		v.AddArg(v0)
 28575  		return true
 28576  	}
 28577  }
 28578  func rewriteValue_OpLeq8U(v *ssa.Value) bool {
 28579  	v_1 := v.Args[1]
 28580  	v_0 := v.Args[0]
 28581  	b := v.Block
 28582  	typ := &b.Func.Config.Types
 28583  	// match: (Leq8U x zero:(MOVDconst [0]))
 28584  	// result: (Eq8 x zero)
 28585  	for {
 28586  		x := v_0
 28587  		zero := v_1
 28588  		if zero.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(zero.AuxInt) != 0 {
 28589  			break
 28590  		}
 28591  		v.Reset(ssaop.OpEq8)
 28592  		v.AddArg2(x, zero)
 28593  		return true
 28594  	}
 28595  	// match: (Leq8U (MOVDconst [1]) x)
 28596  	// result: (Neq8 (MOVDconst [0]) x)
 28597  	for {
 28598  		if v_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0.AuxInt) != 1 {
 28599  			break
 28600  		}
 28601  		x := v_1
 28602  		v.Reset(ssaop.OpNeq8)
 28603  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 28604  		v0.AuxInt = ssa.Int64ToAuxInt(0)
 28605  		v.AddArg2(v0, x)
 28606  		return true
 28607  	}
 28608  	// match: (Leq8U x y)
 28609  	// result: (LessEqualU (CMPW (ZeroExt8to32 x) (ZeroExt8to32 y)))
 28610  	for {
 28611  		x := v_0
 28612  		y := v_1
 28613  		v.Reset(ssaop.OpARM64LessEqualU)
 28614  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMPW, types.TypeFlags)
 28615  		v1 := b.NewValue0(v.Pos, ssaop.OpZeroExt8to32, typ.UInt32)
 28616  		v1.AddArg(x)
 28617  		v2 := b.NewValue0(v.Pos, ssaop.OpZeroExt8to32, typ.UInt32)
 28618  		v2.AddArg(y)
 28619  		v0.AddArg2(v1, v2)
 28620  		v.AddArg(v0)
 28621  		return true
 28622  	}
 28623  }
 28624  func rewriteValue_OpLess16(v *ssa.Value) bool {
 28625  	v_1 := v.Args[1]
 28626  	v_0 := v.Args[0]
 28627  	b := v.Block
 28628  	typ := &b.Func.Config.Types
 28629  	// match: (Less16 x y)
 28630  	// result: (LessThan (CMPW (SignExt16to32 x) (SignExt16to32 y)))
 28631  	for {
 28632  		x := v_0
 28633  		y := v_1
 28634  		v.Reset(ssaop.OpARM64LessThan)
 28635  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMPW, types.TypeFlags)
 28636  		v1 := b.NewValue0(v.Pos, ssaop.OpSignExt16to32, typ.Int32)
 28637  		v1.AddArg(x)
 28638  		v2 := b.NewValue0(v.Pos, ssaop.OpSignExt16to32, typ.Int32)
 28639  		v2.AddArg(y)
 28640  		v0.AddArg2(v1, v2)
 28641  		v.AddArg(v0)
 28642  		return true
 28643  	}
 28644  }
 28645  func rewriteValue_OpLess16U(v *ssa.Value) bool {
 28646  	v_1 := v.Args[1]
 28647  	v_0 := v.Args[0]
 28648  	b := v.Block
 28649  	typ := &b.Func.Config.Types
 28650  	// match: (Less16U zero:(MOVDconst [0]) x)
 28651  	// result: (Neq16 zero x)
 28652  	for {
 28653  		zero := v_0
 28654  		if zero.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(zero.AuxInt) != 0 {
 28655  			break
 28656  		}
 28657  		x := v_1
 28658  		v.Reset(ssaop.OpNeq16)
 28659  		v.AddArg2(zero, x)
 28660  		return true
 28661  	}
 28662  	// match: (Less16U x (MOVDconst [1]))
 28663  	// result: (Eq16 x (MOVDconst [0]))
 28664  	for {
 28665  		x := v_0
 28666  		if v_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_1.AuxInt) != 1 {
 28667  			break
 28668  		}
 28669  		v.Reset(ssaop.OpEq16)
 28670  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 28671  		v0.AuxInt = ssa.Int64ToAuxInt(0)
 28672  		v.AddArg2(x, v0)
 28673  		return true
 28674  	}
 28675  	// match: (Less16U x y)
 28676  	// result: (LessThanU (CMPW (ZeroExt16to32 x) (ZeroExt16to32 y)))
 28677  	for {
 28678  		x := v_0
 28679  		y := v_1
 28680  		v.Reset(ssaop.OpARM64LessThanU)
 28681  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMPW, types.TypeFlags)
 28682  		v1 := b.NewValue0(v.Pos, ssaop.OpZeroExt16to32, typ.UInt32)
 28683  		v1.AddArg(x)
 28684  		v2 := b.NewValue0(v.Pos, ssaop.OpZeroExt16to32, typ.UInt32)
 28685  		v2.AddArg(y)
 28686  		v0.AddArg2(v1, v2)
 28687  		v.AddArg(v0)
 28688  		return true
 28689  	}
 28690  }
 28691  func rewriteValue_OpLess32(v *ssa.Value) bool {
 28692  	v_1 := v.Args[1]
 28693  	v_0 := v.Args[0]
 28694  	b := v.Block
 28695  	// match: (Less32 x y)
 28696  	// result: (LessThan (CMPW x y))
 28697  	for {
 28698  		x := v_0
 28699  		y := v_1
 28700  		v.Reset(ssaop.OpARM64LessThan)
 28701  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMPW, types.TypeFlags)
 28702  		v0.AddArg2(x, y)
 28703  		v.AddArg(v0)
 28704  		return true
 28705  	}
 28706  }
 28707  func rewriteValue_OpLess32F(v *ssa.Value) bool {
 28708  	v_1 := v.Args[1]
 28709  	v_0 := v.Args[0]
 28710  	b := v.Block
 28711  	// match: (Less32F x y)
 28712  	// result: (LessThanF (FCMPS x y))
 28713  	for {
 28714  		x := v_0
 28715  		y := v_1
 28716  		v.Reset(ssaop.OpARM64LessThanF)
 28717  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64FCMPS, types.TypeFlags)
 28718  		v0.AddArg2(x, y)
 28719  		v.AddArg(v0)
 28720  		return true
 28721  	}
 28722  }
 28723  func rewriteValue_OpLess32U(v *ssa.Value) bool {
 28724  	v_1 := v.Args[1]
 28725  	v_0 := v.Args[0]
 28726  	b := v.Block
 28727  	typ := &b.Func.Config.Types
 28728  	// match: (Less32U zero:(MOVDconst [0]) x)
 28729  	// result: (Neq32 zero x)
 28730  	for {
 28731  		zero := v_0
 28732  		if zero.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(zero.AuxInt) != 0 {
 28733  			break
 28734  		}
 28735  		x := v_1
 28736  		v.Reset(ssaop.OpNeq32)
 28737  		v.AddArg2(zero, x)
 28738  		return true
 28739  	}
 28740  	// match: (Less32U x (MOVDconst [1]))
 28741  	// result: (Eq32 x (MOVDconst [0]))
 28742  	for {
 28743  		x := v_0
 28744  		if v_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_1.AuxInt) != 1 {
 28745  			break
 28746  		}
 28747  		v.Reset(ssaop.OpEq32)
 28748  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 28749  		v0.AuxInt = ssa.Int64ToAuxInt(0)
 28750  		v.AddArg2(x, v0)
 28751  		return true
 28752  	}
 28753  	// match: (Less32U x y)
 28754  	// result: (LessThanU (CMPW x y))
 28755  	for {
 28756  		x := v_0
 28757  		y := v_1
 28758  		v.Reset(ssaop.OpARM64LessThanU)
 28759  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMPW, types.TypeFlags)
 28760  		v0.AddArg2(x, y)
 28761  		v.AddArg(v0)
 28762  		return true
 28763  	}
 28764  }
 28765  func rewriteValue_OpLess64(v *ssa.Value) bool {
 28766  	v_1 := v.Args[1]
 28767  	v_0 := v.Args[0]
 28768  	b := v.Block
 28769  	// match: (Less64 x y)
 28770  	// result: (LessThan (CMP x y))
 28771  	for {
 28772  		x := v_0
 28773  		y := v_1
 28774  		v.Reset(ssaop.OpARM64LessThan)
 28775  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMP, types.TypeFlags)
 28776  		v0.AddArg2(x, y)
 28777  		v.AddArg(v0)
 28778  		return true
 28779  	}
 28780  }
 28781  func rewriteValue_OpLess64F(v *ssa.Value) bool {
 28782  	v_1 := v.Args[1]
 28783  	v_0 := v.Args[0]
 28784  	b := v.Block
 28785  	// match: (Less64F x y)
 28786  	// result: (LessThanF (FCMPD x y))
 28787  	for {
 28788  		x := v_0
 28789  		y := v_1
 28790  		v.Reset(ssaop.OpARM64LessThanF)
 28791  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64FCMPD, types.TypeFlags)
 28792  		v0.AddArg2(x, y)
 28793  		v.AddArg(v0)
 28794  		return true
 28795  	}
 28796  }
 28797  func rewriteValue_OpLess64U(v *ssa.Value) bool {
 28798  	v_1 := v.Args[1]
 28799  	v_0 := v.Args[0]
 28800  	b := v.Block
 28801  	typ := &b.Func.Config.Types
 28802  	// match: (Less64U zero:(MOVDconst [0]) x)
 28803  	// result: (Neq64 zero x)
 28804  	for {
 28805  		zero := v_0
 28806  		if zero.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(zero.AuxInt) != 0 {
 28807  			break
 28808  		}
 28809  		x := v_1
 28810  		v.Reset(ssaop.OpNeq64)
 28811  		v.AddArg2(zero, x)
 28812  		return true
 28813  	}
 28814  	// match: (Less64U x (MOVDconst [1]))
 28815  	// result: (Eq64 x (MOVDconst [0]))
 28816  	for {
 28817  		x := v_0
 28818  		if v_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_1.AuxInt) != 1 {
 28819  			break
 28820  		}
 28821  		v.Reset(ssaop.OpEq64)
 28822  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 28823  		v0.AuxInt = ssa.Int64ToAuxInt(0)
 28824  		v.AddArg2(x, v0)
 28825  		return true
 28826  	}
 28827  	// match: (Less64U x y)
 28828  	// result: (LessThanU (CMP x y))
 28829  	for {
 28830  		x := v_0
 28831  		y := v_1
 28832  		v.Reset(ssaop.OpARM64LessThanU)
 28833  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMP, types.TypeFlags)
 28834  		v0.AddArg2(x, y)
 28835  		v.AddArg(v0)
 28836  		return true
 28837  	}
 28838  }
 28839  func rewriteValue_OpLess8(v *ssa.Value) bool {
 28840  	v_1 := v.Args[1]
 28841  	v_0 := v.Args[0]
 28842  	b := v.Block
 28843  	typ := &b.Func.Config.Types
 28844  	// match: (Less8 x y)
 28845  	// result: (LessThan (CMPW (SignExt8to32 x) (SignExt8to32 y)))
 28846  	for {
 28847  		x := v_0
 28848  		y := v_1
 28849  		v.Reset(ssaop.OpARM64LessThan)
 28850  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMPW, types.TypeFlags)
 28851  		v1 := b.NewValue0(v.Pos, ssaop.OpSignExt8to32, typ.Int32)
 28852  		v1.AddArg(x)
 28853  		v2 := b.NewValue0(v.Pos, ssaop.OpSignExt8to32, typ.Int32)
 28854  		v2.AddArg(y)
 28855  		v0.AddArg2(v1, v2)
 28856  		v.AddArg(v0)
 28857  		return true
 28858  	}
 28859  }
 28860  func rewriteValue_OpLess8U(v *ssa.Value) bool {
 28861  	v_1 := v.Args[1]
 28862  	v_0 := v.Args[0]
 28863  	b := v.Block
 28864  	typ := &b.Func.Config.Types
 28865  	// match: (Less8U zero:(MOVDconst [0]) x)
 28866  	// result: (Neq8 zero x)
 28867  	for {
 28868  		zero := v_0
 28869  		if zero.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(zero.AuxInt) != 0 {
 28870  			break
 28871  		}
 28872  		x := v_1
 28873  		v.Reset(ssaop.OpNeq8)
 28874  		v.AddArg2(zero, x)
 28875  		return true
 28876  	}
 28877  	// match: (Less8U x (MOVDconst [1]))
 28878  	// result: (Eq8 x (MOVDconst [0]))
 28879  	for {
 28880  		x := v_0
 28881  		if v_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_1.AuxInt) != 1 {
 28882  			break
 28883  		}
 28884  		v.Reset(ssaop.OpEq8)
 28885  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 28886  		v0.AuxInt = ssa.Int64ToAuxInt(0)
 28887  		v.AddArg2(x, v0)
 28888  		return true
 28889  	}
 28890  	// match: (Less8U x y)
 28891  	// result: (LessThanU (CMPW (ZeroExt8to32 x) (ZeroExt8to32 y)))
 28892  	for {
 28893  		x := v_0
 28894  		y := v_1
 28895  		v.Reset(ssaop.OpARM64LessThanU)
 28896  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMPW, types.TypeFlags)
 28897  		v1 := b.NewValue0(v.Pos, ssaop.OpZeroExt8to32, typ.UInt32)
 28898  		v1.AddArg(x)
 28899  		v2 := b.NewValue0(v.Pos, ssaop.OpZeroExt8to32, typ.UInt32)
 28900  		v2.AddArg(y)
 28901  		v0.AddArg2(v1, v2)
 28902  		v.AddArg(v0)
 28903  		return true
 28904  	}
 28905  }
 28906  func rewriteValue_OpLoad(v *ssa.Value) bool {
 28907  	v_1 := v.Args[1]
 28908  	v_0 := v.Args[0]
 28909  	// match: (Load <t> ptr mem)
 28910  	// cond: t.IsBoolean()
 28911  	// result: (MOVBUload ptr mem)
 28912  	for {
 28913  		t := v.Type
 28914  		ptr := v_0
 28915  		mem := v_1
 28916  		if !(t.IsBoolean()) {
 28917  			break
 28918  		}
 28919  		v.Reset(ssaop.OpARM64MOVBUload)
 28920  		v.AddArg2(ptr, mem)
 28921  		return true
 28922  	}
 28923  	// match: (Load <t> ptr mem)
 28924  	// cond: (ssa.Is8BitInt(t) && t.IsSigned())
 28925  	// result: (MOVBload ptr mem)
 28926  	for {
 28927  		t := v.Type
 28928  		ptr := v_0
 28929  		mem := v_1
 28930  		if !(ssa.Is8BitInt(t) && t.IsSigned()) {
 28931  			break
 28932  		}
 28933  		v.Reset(ssaop.OpARM64MOVBload)
 28934  		v.AddArg2(ptr, mem)
 28935  		return true
 28936  	}
 28937  	// match: (Load <t> ptr mem)
 28938  	// cond: (ssa.Is8BitInt(t) && !t.IsSigned())
 28939  	// result: (MOVBUload ptr mem)
 28940  	for {
 28941  		t := v.Type
 28942  		ptr := v_0
 28943  		mem := v_1
 28944  		if !(ssa.Is8BitInt(t) && !t.IsSigned()) {
 28945  			break
 28946  		}
 28947  		v.Reset(ssaop.OpARM64MOVBUload)
 28948  		v.AddArg2(ptr, mem)
 28949  		return true
 28950  	}
 28951  	// match: (Load <t> ptr mem)
 28952  	// cond: (ssa.Is16BitInt(t) && t.IsSigned())
 28953  	// result: (MOVHload ptr mem)
 28954  	for {
 28955  		t := v.Type
 28956  		ptr := v_0
 28957  		mem := v_1
 28958  		if !(ssa.Is16BitInt(t) && t.IsSigned()) {
 28959  			break
 28960  		}
 28961  		v.Reset(ssaop.OpARM64MOVHload)
 28962  		v.AddArg2(ptr, mem)
 28963  		return true
 28964  	}
 28965  	// match: (Load <t> ptr mem)
 28966  	// cond: (ssa.Is16BitInt(t) && !t.IsSigned())
 28967  	// result: (MOVHUload ptr mem)
 28968  	for {
 28969  		t := v.Type
 28970  		ptr := v_0
 28971  		mem := v_1
 28972  		if !(ssa.Is16BitInt(t) && !t.IsSigned()) {
 28973  			break
 28974  		}
 28975  		v.Reset(ssaop.OpARM64MOVHUload)
 28976  		v.AddArg2(ptr, mem)
 28977  		return true
 28978  	}
 28979  	// match: (Load <t> ptr mem)
 28980  	// cond: (ssa.Is32BitInt(t) && t.IsSigned())
 28981  	// result: (MOVWload ptr mem)
 28982  	for {
 28983  		t := v.Type
 28984  		ptr := v_0
 28985  		mem := v_1
 28986  		if !(ssa.Is32BitInt(t) && t.IsSigned()) {
 28987  			break
 28988  		}
 28989  		v.Reset(ssaop.OpARM64MOVWload)
 28990  		v.AddArg2(ptr, mem)
 28991  		return true
 28992  	}
 28993  	// match: (Load <t> ptr mem)
 28994  	// cond: (ssa.Is32BitInt(t) && !t.IsSigned())
 28995  	// result: (MOVWUload ptr mem)
 28996  	for {
 28997  		t := v.Type
 28998  		ptr := v_0
 28999  		mem := v_1
 29000  		if !(ssa.Is32BitInt(t) && !t.IsSigned()) {
 29001  			break
 29002  		}
 29003  		v.Reset(ssaop.OpARM64MOVWUload)
 29004  		v.AddArg2(ptr, mem)
 29005  		return true
 29006  	}
 29007  	// match: (Load <t> ptr mem)
 29008  	// cond: (ssa.Is64BitInt(t) ||ssa.IsPtr(t))
 29009  	// result: (MOVDload ptr mem)
 29010  	for {
 29011  		t := v.Type
 29012  		ptr := v_0
 29013  		mem := v_1
 29014  		if !(ssa.Is64BitInt(t) || ssa.IsPtr(t)) {
 29015  			break
 29016  		}
 29017  		v.Reset(ssaop.OpARM64MOVDload)
 29018  		v.AddArg2(ptr, mem)
 29019  		return true
 29020  	}
 29021  	// match: (Load <t> ptr mem)
 29022  	// cond: ssa.Is32BitFloat(t)
 29023  	// result: (FMOVSload ptr mem)
 29024  	for {
 29025  		t := v.Type
 29026  		ptr := v_0
 29027  		mem := v_1
 29028  		if !(ssa.Is32BitFloat(t)) {
 29029  			break
 29030  		}
 29031  		v.Reset(ssaop.OpARM64FMOVSload)
 29032  		v.AddArg2(ptr, mem)
 29033  		return true
 29034  	}
 29035  	// match: (Load <t> ptr mem)
 29036  	// cond: ssa.Is64BitFloat(t)
 29037  	// result: (FMOVDload ptr mem)
 29038  	for {
 29039  		t := v.Type
 29040  		ptr := v_0
 29041  		mem := v_1
 29042  		if !(ssa.Is64BitFloat(t)) {
 29043  			break
 29044  		}
 29045  		v.Reset(ssaop.OpARM64FMOVDload)
 29046  		v.AddArg2(ptr, mem)
 29047  		return true
 29048  	}
 29049  	// match: (Load <t> ptr mem)
 29050  	// cond: t.Size() == 16
 29051  	// result: (FMOVQload ptr mem)
 29052  	for {
 29053  		t := v.Type
 29054  		ptr := v_0
 29055  		mem := v_1
 29056  		if !(t.Size() == 16) {
 29057  			break
 29058  		}
 29059  		v.Reset(ssaop.OpARM64FMOVQload)
 29060  		v.AddArg2(ptr, mem)
 29061  		return true
 29062  	}
 29063  	// match: (Load <t> ptr mem)
 29064  	// cond: t.Size() == 32 && t.IsSIMD()
 29065  	// result: (ZLDRload ptr mem)
 29066  	for {
 29067  		t := v.Type
 29068  		ptr := v_0
 29069  		mem := v_1
 29070  		if !(t.Size() == 32 && t.IsSIMD()) {
 29071  			break
 29072  		}
 29073  		v.Reset(ssaop.OpARM64ZLDRload)
 29074  		v.AddArg2(ptr, mem)
 29075  		return true
 29076  	}
 29077  	// match: (Load <t> ptr mem)
 29078  	// cond: t.Size() == 8 && t.IsSIMD()
 29079  	// result: (PLDRload ptr mem)
 29080  	for {
 29081  		t := v.Type
 29082  		ptr := v_0
 29083  		mem := v_1
 29084  		if !(t.Size() == 8 && t.IsSIMD()) {
 29085  			break
 29086  		}
 29087  		v.Reset(ssaop.OpARM64PLDRload)
 29088  		v.AddArg2(ptr, mem)
 29089  		return true
 29090  	}
 29091  	return false
 29092  }
 29093  func rewriteValue_OpLoadMasked8(v *ssa.Value) bool {
 29094  	v_2 := v.Args[2]
 29095  	v_1 := v.Args[1]
 29096  	v_0 := v.Args[0]
 29097  	// match: (LoadMasked8 <t> ptr mask mem)
 29098  	// cond: t.Size() == 32
 29099  	// result: (ZLD1BPredload ptr mask mem)
 29100  	for {
 29101  		t := v.Type
 29102  		ptr := v_0
 29103  		mask := v_1
 29104  		mem := v_2
 29105  		if !(t.Size() == 32) {
 29106  			break
 29107  		}
 29108  		v.Reset(ssaop.OpARM64ZLD1BPredload)
 29109  		v.AddArg3(ptr, mask, mem)
 29110  		return true
 29111  	}
 29112  	return false
 29113  }
 29114  func rewriteValue_OpLocalAddr(v *ssa.Value) bool {
 29115  	v_1 := v.Args[1]
 29116  	v_0 := v.Args[0]
 29117  	b := v.Block
 29118  	typ := &b.Func.Config.Types
 29119  	// match: (LocalAddr <t> {sym} base mem)
 29120  	// cond: t.Elem().HasPointers()
 29121  	// result: (MOVDaddr {sym} (SPanchored base mem))
 29122  	for {
 29123  		t := v.Type
 29124  		sym := ssa.AuxToSym(v.Aux)
 29125  		base := v_0
 29126  		mem := v_1
 29127  		if !(t.Elem().HasPointers()) {
 29128  			break
 29129  		}
 29130  		v.Reset(ssaop.OpARM64MOVDaddr)
 29131  		v.Aux = ssa.SymToAux(sym)
 29132  		v0 := b.NewValue0(v.Pos, ssaop.OpSPanchored, typ.Uintptr)
 29133  		v0.AddArg2(base, mem)
 29134  		v.AddArg(v0)
 29135  		return true
 29136  	}
 29137  	// match: (LocalAddr <t> {sym} base _)
 29138  	// cond: !t.Elem().HasPointers()
 29139  	// result: (MOVDaddr {sym} base)
 29140  	for {
 29141  		t := v.Type
 29142  		sym := ssa.AuxToSym(v.Aux)
 29143  		base := v_0
 29144  		if !(!t.Elem().HasPointers()) {
 29145  			break
 29146  		}
 29147  		v.Reset(ssaop.OpARM64MOVDaddr)
 29148  		v.Aux = ssa.SymToAux(sym)
 29149  		v.AddArg(base)
 29150  		return true
 29151  	}
 29152  	return false
 29153  }
 29154  func rewriteValue_OpLsh64x16(v *ssa.Value) bool {
 29155  	v_1 := v.Args[1]
 29156  	v_0 := v.Args[0]
 29157  	b := v.Block
 29158  	typ := &b.Func.Config.Types
 29159  	// match: (Lsh64x16 <t> x y)
 29160  	// cond: ssa.ShiftIsBounded(v)
 29161  	// result: (SLL <t> x y)
 29162  	for {
 29163  		t := v.Type
 29164  		x := v_0
 29165  		y := v_1
 29166  		if !(ssa.ShiftIsBounded(v)) {
 29167  			break
 29168  		}
 29169  		v.Reset(ssaop.OpARM64SLL)
 29170  		v.Type = t
 29171  		v.AddArg2(x, y)
 29172  		return true
 29173  	}
 29174  	// match: (Lsh64x16 <t> [bounded] x y)
 29175  	// cond: !ssa.ShiftIsBounded(v)
 29176  	// result: (Lsh64x32 <t> [bounded] x (ZeroExt16to32 y))
 29177  	for {
 29178  		t := v.Type
 29179  		bounded := ssa.AuxIntToBool(v.AuxInt)
 29180  		x := v_0
 29181  		y := v_1
 29182  		if !(!ssa.ShiftIsBounded(v)) {
 29183  			break
 29184  		}
 29185  		v.Reset(ssaop.OpLsh64x32)
 29186  		v.Type = t
 29187  		v.AuxInt = ssa.BoolToAuxInt(bounded)
 29188  		v0 := b.NewValue0(v.Pos, ssaop.OpZeroExt16to32, typ.UInt32)
 29189  		v0.AddArg(y)
 29190  		v.AddArg2(x, v0)
 29191  		return true
 29192  	}
 29193  	return false
 29194  }
 29195  func rewriteValue_OpLsh64x32(v *ssa.Value) bool {
 29196  	v_1 := v.Args[1]
 29197  	v_0 := v.Args[0]
 29198  	b := v.Block
 29199  	// match: (Lsh64x32 <t> x y)
 29200  	// cond: ssa.ShiftIsBounded(v)
 29201  	// result: (SLL <t> x y)
 29202  	for {
 29203  		t := v.Type
 29204  		x := v_0
 29205  		y := v_1
 29206  		if !(ssa.ShiftIsBounded(v)) {
 29207  			break
 29208  		}
 29209  		v.Reset(ssaop.OpARM64SLL)
 29210  		v.Type = t
 29211  		v.AddArg2(x, y)
 29212  		return true
 29213  	}
 29214  	// match: (Lsh64x32 <t> x y)
 29215  	// cond: !ssa.ShiftIsBounded(v)
 29216  	// result: (CSEL [ssaop.OpARM64LessThanU] (SLL <t> x y) (Const64 <t> [0]) (CMPWconst [64] y))
 29217  	for {
 29218  		t := v.Type
 29219  		x := v_0
 29220  		y := v_1
 29221  		if !(!ssa.ShiftIsBounded(v)) {
 29222  			break
 29223  		}
 29224  		v.Reset(ssaop.OpARM64CSEL)
 29225  		v.AuxInt = ssa.OpToAuxInt(ssaop.OpARM64LessThanU)
 29226  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SLL, t)
 29227  		v0.AddArg2(x, y)
 29228  		v1 := b.NewValue0(v.Pos, ssaop.OpConst64, t)
 29229  		v1.AuxInt = ssa.Int64ToAuxInt(0)
 29230  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64CMPWconst, types.TypeFlags)
 29231  		v2.AuxInt = ssa.Int32ToAuxInt(64)
 29232  		v2.AddArg(y)
 29233  		v.AddArg3(v0, v1, v2)
 29234  		return true
 29235  	}
 29236  	return false
 29237  }
 29238  func rewriteValue_OpLsh64x64(v *ssa.Value) bool {
 29239  	v_1 := v.Args[1]
 29240  	v_0 := v.Args[0]
 29241  	b := v.Block
 29242  	// match: (Lsh64x64 <t> x y)
 29243  	// cond: ssa.ShiftIsBounded(v)
 29244  	// result: (SLL <t> x y)
 29245  	for {
 29246  		t := v.Type
 29247  		x := v_0
 29248  		y := v_1
 29249  		if !(ssa.ShiftIsBounded(v)) {
 29250  			break
 29251  		}
 29252  		v.Reset(ssaop.OpARM64SLL)
 29253  		v.Type = t
 29254  		v.AddArg2(x, y)
 29255  		return true
 29256  	}
 29257  	// match: (Lsh64x64 <t> x y)
 29258  	// cond: !ssa.ShiftIsBounded(v)
 29259  	// result: (CSEL [ssaop.OpARM64LessThanU] (SLL <t> x y) (Const64 <t> [0]) (CMPconst [64] y))
 29260  	for {
 29261  		t := v.Type
 29262  		x := v_0
 29263  		y := v_1
 29264  		if !(!ssa.ShiftIsBounded(v)) {
 29265  			break
 29266  		}
 29267  		v.Reset(ssaop.OpARM64CSEL)
 29268  		v.AuxInt = ssa.OpToAuxInt(ssaop.OpARM64LessThanU)
 29269  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SLL, t)
 29270  		v0.AddArg2(x, y)
 29271  		v1 := b.NewValue0(v.Pos, ssaop.OpConst64, t)
 29272  		v1.AuxInt = ssa.Int64ToAuxInt(0)
 29273  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64CMPconst, types.TypeFlags)
 29274  		v2.AuxInt = ssa.Int64ToAuxInt(64)
 29275  		v2.AddArg(y)
 29276  		v.AddArg3(v0, v1, v2)
 29277  		return true
 29278  	}
 29279  	return false
 29280  }
 29281  func rewriteValue_OpLsh64x8(v *ssa.Value) bool {
 29282  	v_1 := v.Args[1]
 29283  	v_0 := v.Args[0]
 29284  	b := v.Block
 29285  	typ := &b.Func.Config.Types
 29286  	// match: (Lsh64x8 <t> x y)
 29287  	// cond: ssa.ShiftIsBounded(v)
 29288  	// result: (SLL <t> x y)
 29289  	for {
 29290  		t := v.Type
 29291  		x := v_0
 29292  		y := v_1
 29293  		if !(ssa.ShiftIsBounded(v)) {
 29294  			break
 29295  		}
 29296  		v.Reset(ssaop.OpARM64SLL)
 29297  		v.Type = t
 29298  		v.AddArg2(x, y)
 29299  		return true
 29300  	}
 29301  	// match: (Lsh64x8 <t> [bounded] x y)
 29302  	// cond: !ssa.ShiftIsBounded(v)
 29303  	// result: (Lsh64x32 <t> [bounded] x (ZeroExt8to32 y))
 29304  	for {
 29305  		t := v.Type
 29306  		bounded := ssa.AuxIntToBool(v.AuxInt)
 29307  		x := v_0
 29308  		y := v_1
 29309  		if !(!ssa.ShiftIsBounded(v)) {
 29310  			break
 29311  		}
 29312  		v.Reset(ssaop.OpLsh64x32)
 29313  		v.Type = t
 29314  		v.AuxInt = ssa.BoolToAuxInt(bounded)
 29315  		v0 := b.NewValue0(v.Pos, ssaop.OpZeroExt8to32, typ.UInt32)
 29316  		v0.AddArg(y)
 29317  		v.AddArg2(x, v0)
 29318  		return true
 29319  	}
 29320  	return false
 29321  }
 29322  func rewriteValue_OpMask16sAll(v *ssa.Value) bool {
 29323  	v_0 := v.Args[0]
 29324  	b := v.Block
 29325  	typ := &b.Func.Config.Types
 29326  	// match: (Mask16sAll m)
 29327  	// result: (Equal (Select1 <types.TypeFlags> (PBICSB t:(Mask16sAllTrue <types.TypeMask>) t m)))
 29328  	for {
 29329  		m := v_0
 29330  		v.Reset(ssaop.OpARM64Equal)
 29331  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect1, types.TypeFlags)
 29332  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PBICSB, types.NewTuple(typ.Mask, types.TypeFlags))
 29333  		t := b.NewValue0(v.Pos, ssaop.OpMask16sAllTrue, types.TypeMask)
 29334  		v1.AddArg3(t, t, m)
 29335  		v0.AddArg(v1)
 29336  		v.AddArg(v0)
 29337  		return true
 29338  	}
 29339  }
 29340  func rewriteValue_OpMask16sAllTrue(v *ssa.Value) bool {
 29341  	b := v.Block
 29342  	typ := &b.Func.Config.Types
 29343  	// match: (Mask16sAllTrue)
 29344  	// result: (Select0 <types.TypeMask> (PWHILELTH (MOVDconst [0]) (MOVDconst [16])))
 29345  	for {
 29346  		v.Reset(ssaop.OpSelect0)
 29347  		v.Type = types.TypeMask
 29348  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTH, types.NewTuple(typ.Mask, types.TypeFlags))
 29349  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 29350  		v1.AuxInt = ssa.Int64ToAuxInt(0)
 29351  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 29352  		v2.AuxInt = ssa.Int64ToAuxInt(16)
 29353  		v0.AddArg2(v1, v2)
 29354  		v.AddArg(v0)
 29355  		return true
 29356  	}
 29357  }
 29358  func rewriteValue_OpMask16sAny(v *ssa.Value) bool {
 29359  	v_0 := v.Args[0]
 29360  	b := v.Block
 29361  	// match: (Mask16sAny m)
 29362  	// result: (NotEqual (PPTEST (Mask16sAllTrue <types.TypeMask>) m))
 29363  	for {
 29364  		m := v_0
 29365  		v.Reset(ssaop.OpARM64NotEqual)
 29366  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64PPTEST, types.TypeFlags)
 29367  		v1 := b.NewValue0(v.Pos, ssaop.OpMask16sAllTrue, types.TypeMask)
 29368  		v0.AddArg2(v1, m)
 29369  		v.AddArg(v0)
 29370  		return true
 29371  	}
 29372  }
 29373  func rewriteValue_OpMask16sFirst(v *ssa.Value) bool {
 29374  	v_0 := v.Args[0]
 29375  	b := v.Block
 29376  	typ := &b.Func.Config.Types
 29377  	// match: (Mask16sFirst m)
 29378  	// result: (PPNEXTH (PPFALSEB) m)
 29379  	for {
 29380  		m := v_0
 29381  		v.Reset(ssaop.OpARM64PPNEXTH)
 29382  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64PPFALSEB, typ.Mask)
 29383  		v.AddArg2(v0, m)
 29384  		return true
 29385  	}
 29386  }
 29387  func rewriteValue_OpMask16sNext(v *ssa.Value) bool {
 29388  	v_0 := v.Args[0]
 29389  	b := v.Block
 29390  	// match: (Mask16sNext m)
 29391  	// result: (PPNEXTH m (Mask16sAllTrue <types.TypeMask>))
 29392  	for {
 29393  		m := v_0
 29394  		v.Reset(ssaop.OpARM64PPNEXTH)
 29395  		v0 := b.NewValue0(v.Pos, ssaop.OpMask16sAllTrue, types.TypeMask)
 29396  		v.AddArg2(m, v0)
 29397  		return true
 29398  	}
 29399  }
 29400  func rewriteValue_OpMask16sNone(v *ssa.Value) bool {
 29401  	v_0 := v.Args[0]
 29402  	b := v.Block
 29403  	// match: (Mask16sNone m)
 29404  	// result: (Equal (PPTEST (Mask16sAllTrue <types.TypeMask>) m))
 29405  	for {
 29406  		m := v_0
 29407  		v.Reset(ssaop.OpARM64Equal)
 29408  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64PPTEST, types.TypeFlags)
 29409  		v1 := b.NewValue0(v.Pos, ssaop.OpMask16sAllTrue, types.TypeMask)
 29410  		v0.AddArg2(v1, m)
 29411  		v.AddArg(v0)
 29412  		return true
 29413  	}
 29414  }
 29415  func rewriteValue_OpMask32sAll(v *ssa.Value) bool {
 29416  	v_0 := v.Args[0]
 29417  	b := v.Block
 29418  	typ := &b.Func.Config.Types
 29419  	// match: (Mask32sAll m)
 29420  	// result: (Equal (Select1 <types.TypeFlags> (PBICSB t:(Mask32sAllTrue <types.TypeMask>) t m)))
 29421  	for {
 29422  		m := v_0
 29423  		v.Reset(ssaop.OpARM64Equal)
 29424  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect1, types.TypeFlags)
 29425  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PBICSB, types.NewTuple(typ.Mask, types.TypeFlags))
 29426  		t := b.NewValue0(v.Pos, ssaop.OpMask32sAllTrue, types.TypeMask)
 29427  		v1.AddArg3(t, t, m)
 29428  		v0.AddArg(v1)
 29429  		v.AddArg(v0)
 29430  		return true
 29431  	}
 29432  }
 29433  func rewriteValue_OpMask32sAllTrue(v *ssa.Value) bool {
 29434  	b := v.Block
 29435  	typ := &b.Func.Config.Types
 29436  	// match: (Mask32sAllTrue)
 29437  	// result: (Select0 <types.TypeMask> (PWHILELTS (MOVDconst [0]) (MOVDconst [8])))
 29438  	for {
 29439  		v.Reset(ssaop.OpSelect0)
 29440  		v.Type = types.TypeMask
 29441  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTS, types.NewTuple(typ.Mask, types.TypeFlags))
 29442  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 29443  		v1.AuxInt = ssa.Int64ToAuxInt(0)
 29444  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 29445  		v2.AuxInt = ssa.Int64ToAuxInt(8)
 29446  		v0.AddArg2(v1, v2)
 29447  		v.AddArg(v0)
 29448  		return true
 29449  	}
 29450  }
 29451  func rewriteValue_OpMask32sAny(v *ssa.Value) bool {
 29452  	v_0 := v.Args[0]
 29453  	b := v.Block
 29454  	// match: (Mask32sAny m)
 29455  	// result: (NotEqual (PPTEST (Mask32sAllTrue <types.TypeMask>) m))
 29456  	for {
 29457  		m := v_0
 29458  		v.Reset(ssaop.OpARM64NotEqual)
 29459  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64PPTEST, types.TypeFlags)
 29460  		v1 := b.NewValue0(v.Pos, ssaop.OpMask32sAllTrue, types.TypeMask)
 29461  		v0.AddArg2(v1, m)
 29462  		v.AddArg(v0)
 29463  		return true
 29464  	}
 29465  }
 29466  func rewriteValue_OpMask32sFirst(v *ssa.Value) bool {
 29467  	v_0 := v.Args[0]
 29468  	b := v.Block
 29469  	typ := &b.Func.Config.Types
 29470  	// match: (Mask32sFirst m)
 29471  	// result: (PPNEXTS (PPFALSEB) m)
 29472  	for {
 29473  		m := v_0
 29474  		v.Reset(ssaop.OpARM64PPNEXTS)
 29475  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64PPFALSEB, typ.Mask)
 29476  		v.AddArg2(v0, m)
 29477  		return true
 29478  	}
 29479  }
 29480  func rewriteValue_OpMask32sNext(v *ssa.Value) bool {
 29481  	v_0 := v.Args[0]
 29482  	b := v.Block
 29483  	// match: (Mask32sNext m)
 29484  	// result: (PPNEXTS m (Mask32sAllTrue <types.TypeMask>))
 29485  	for {
 29486  		m := v_0
 29487  		v.Reset(ssaop.OpARM64PPNEXTS)
 29488  		v0 := b.NewValue0(v.Pos, ssaop.OpMask32sAllTrue, types.TypeMask)
 29489  		v.AddArg2(m, v0)
 29490  		return true
 29491  	}
 29492  }
 29493  func rewriteValue_OpMask32sNone(v *ssa.Value) bool {
 29494  	v_0 := v.Args[0]
 29495  	b := v.Block
 29496  	// match: (Mask32sNone m)
 29497  	// result: (Equal (PPTEST (Mask32sAllTrue <types.TypeMask>) m))
 29498  	for {
 29499  		m := v_0
 29500  		v.Reset(ssaop.OpARM64Equal)
 29501  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64PPTEST, types.TypeFlags)
 29502  		v1 := b.NewValue0(v.Pos, ssaop.OpMask32sAllTrue, types.TypeMask)
 29503  		v0.AddArg2(v1, m)
 29504  		v.AddArg(v0)
 29505  		return true
 29506  	}
 29507  }
 29508  func rewriteValue_OpMask64sAll(v *ssa.Value) bool {
 29509  	v_0 := v.Args[0]
 29510  	b := v.Block
 29511  	typ := &b.Func.Config.Types
 29512  	// match: (Mask64sAll m)
 29513  	// result: (Equal (Select1 <types.TypeFlags> (PBICSB t:(Mask64sAllTrue <types.TypeMask>) t m)))
 29514  	for {
 29515  		m := v_0
 29516  		v.Reset(ssaop.OpARM64Equal)
 29517  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect1, types.TypeFlags)
 29518  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PBICSB, types.NewTuple(typ.Mask, types.TypeFlags))
 29519  		t := b.NewValue0(v.Pos, ssaop.OpMask64sAllTrue, types.TypeMask)
 29520  		v1.AddArg3(t, t, m)
 29521  		v0.AddArg(v1)
 29522  		v.AddArg(v0)
 29523  		return true
 29524  	}
 29525  }
 29526  func rewriteValue_OpMask64sAllTrue(v *ssa.Value) bool {
 29527  	b := v.Block
 29528  	typ := &b.Func.Config.Types
 29529  	// match: (Mask64sAllTrue)
 29530  	// result: (Select0 <types.TypeMask> (PWHILELTD (MOVDconst [0]) (MOVDconst [4])))
 29531  	for {
 29532  		v.Reset(ssaop.OpSelect0)
 29533  		v.Type = types.TypeMask
 29534  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTD, types.NewTuple(typ.Mask, types.TypeFlags))
 29535  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 29536  		v1.AuxInt = ssa.Int64ToAuxInt(0)
 29537  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 29538  		v2.AuxInt = ssa.Int64ToAuxInt(4)
 29539  		v0.AddArg2(v1, v2)
 29540  		v.AddArg(v0)
 29541  		return true
 29542  	}
 29543  }
 29544  func rewriteValue_OpMask64sAny(v *ssa.Value) bool {
 29545  	v_0 := v.Args[0]
 29546  	b := v.Block
 29547  	// match: (Mask64sAny m)
 29548  	// result: (NotEqual (PPTEST (Mask64sAllTrue <types.TypeMask>) m))
 29549  	for {
 29550  		m := v_0
 29551  		v.Reset(ssaop.OpARM64NotEqual)
 29552  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64PPTEST, types.TypeFlags)
 29553  		v1 := b.NewValue0(v.Pos, ssaop.OpMask64sAllTrue, types.TypeMask)
 29554  		v0.AddArg2(v1, m)
 29555  		v.AddArg(v0)
 29556  		return true
 29557  	}
 29558  }
 29559  func rewriteValue_OpMask64sFirst(v *ssa.Value) bool {
 29560  	v_0 := v.Args[0]
 29561  	b := v.Block
 29562  	typ := &b.Func.Config.Types
 29563  	// match: (Mask64sFirst m)
 29564  	// result: (PPNEXTD (PPFALSEB) m)
 29565  	for {
 29566  		m := v_0
 29567  		v.Reset(ssaop.OpARM64PPNEXTD)
 29568  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64PPFALSEB, typ.Mask)
 29569  		v.AddArg2(v0, m)
 29570  		return true
 29571  	}
 29572  }
 29573  func rewriteValue_OpMask64sNext(v *ssa.Value) bool {
 29574  	v_0 := v.Args[0]
 29575  	b := v.Block
 29576  	// match: (Mask64sNext m)
 29577  	// result: (PPNEXTD m (Mask64sAllTrue <types.TypeMask>))
 29578  	for {
 29579  		m := v_0
 29580  		v.Reset(ssaop.OpARM64PPNEXTD)
 29581  		v0 := b.NewValue0(v.Pos, ssaop.OpMask64sAllTrue, types.TypeMask)
 29582  		v.AddArg2(m, v0)
 29583  		return true
 29584  	}
 29585  }
 29586  func rewriteValue_OpMask64sNone(v *ssa.Value) bool {
 29587  	v_0 := v.Args[0]
 29588  	b := v.Block
 29589  	// match: (Mask64sNone m)
 29590  	// result: (Equal (PPTEST (Mask64sAllTrue <types.TypeMask>) m))
 29591  	for {
 29592  		m := v_0
 29593  		v.Reset(ssaop.OpARM64Equal)
 29594  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64PPTEST, types.TypeFlags)
 29595  		v1 := b.NewValue0(v.Pos, ssaop.OpMask64sAllTrue, types.TypeMask)
 29596  		v0.AddArg2(v1, m)
 29597  		v.AddArg(v0)
 29598  		return true
 29599  	}
 29600  }
 29601  func rewriteValue_OpMask8sAll(v *ssa.Value) bool {
 29602  	v_0 := v.Args[0]
 29603  	b := v.Block
 29604  	typ := &b.Func.Config.Types
 29605  	// match: (Mask8sAll m)
 29606  	// result: (Equal (Select1 <types.TypeFlags> (PBICSB t:(Mask8sAllTrue <types.TypeMask>) t m)))
 29607  	for {
 29608  		m := v_0
 29609  		v.Reset(ssaop.OpARM64Equal)
 29610  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect1, types.TypeFlags)
 29611  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PBICSB, types.NewTuple(typ.Mask, types.TypeFlags))
 29612  		t := b.NewValue0(v.Pos, ssaop.OpMask8sAllTrue, types.TypeMask)
 29613  		v1.AddArg3(t, t, m)
 29614  		v0.AddArg(v1)
 29615  		v.AddArg(v0)
 29616  		return true
 29617  	}
 29618  }
 29619  func rewriteValue_OpMask8sAllTrue(v *ssa.Value) bool {
 29620  	b := v.Block
 29621  	typ := &b.Func.Config.Types
 29622  	// match: (Mask8sAllTrue)
 29623  	// result: (Select0 <types.TypeMask> (PWHILELTB (MOVDconst [0]) (MOVDconst [32])))
 29624  	for {
 29625  		v.Reset(ssaop.OpSelect0)
 29626  		v.Type = types.TypeMask
 29627  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTB, types.NewTuple(typ.Mask, types.TypeFlags))
 29628  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 29629  		v1.AuxInt = ssa.Int64ToAuxInt(0)
 29630  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 29631  		v2.AuxInt = ssa.Int64ToAuxInt(32)
 29632  		v0.AddArg2(v1, v2)
 29633  		v.AddArg(v0)
 29634  		return true
 29635  	}
 29636  }
 29637  func rewriteValue_OpMask8sAny(v *ssa.Value) bool {
 29638  	v_0 := v.Args[0]
 29639  	b := v.Block
 29640  	// match: (Mask8sAny m)
 29641  	// result: (NotEqual (PPTEST (Mask8sAllTrue <types.TypeMask>) m))
 29642  	for {
 29643  		m := v_0
 29644  		v.Reset(ssaop.OpARM64NotEqual)
 29645  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64PPTEST, types.TypeFlags)
 29646  		v1 := b.NewValue0(v.Pos, ssaop.OpMask8sAllTrue, types.TypeMask)
 29647  		v0.AddArg2(v1, m)
 29648  		v.AddArg(v0)
 29649  		return true
 29650  	}
 29651  }
 29652  func rewriteValue_OpMask8sFirst(v *ssa.Value) bool {
 29653  	v_0 := v.Args[0]
 29654  	b := v.Block
 29655  	typ := &b.Func.Config.Types
 29656  	// match: (Mask8sFirst m)
 29657  	// result: (PPNEXTB (PPFALSEB) m)
 29658  	for {
 29659  		m := v_0
 29660  		v.Reset(ssaop.OpARM64PPNEXTB)
 29661  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64PPFALSEB, typ.Mask)
 29662  		v.AddArg2(v0, m)
 29663  		return true
 29664  	}
 29665  }
 29666  func rewriteValue_OpMask8sNext(v *ssa.Value) bool {
 29667  	v_0 := v.Args[0]
 29668  	b := v.Block
 29669  	// match: (Mask8sNext m)
 29670  	// result: (PPNEXTB m (Mask8sAllTrue <types.TypeMask>))
 29671  	for {
 29672  		m := v_0
 29673  		v.Reset(ssaop.OpARM64PPNEXTB)
 29674  		v0 := b.NewValue0(v.Pos, ssaop.OpMask8sAllTrue, types.TypeMask)
 29675  		v.AddArg2(m, v0)
 29676  		return true
 29677  	}
 29678  }
 29679  func rewriteValue_OpMask8sNone(v *ssa.Value) bool {
 29680  	v_0 := v.Args[0]
 29681  	b := v.Block
 29682  	// match: (Mask8sNone m)
 29683  	// result: (Equal (PPTEST (Mask8sAllTrue <types.TypeMask>) m))
 29684  	for {
 29685  		m := v_0
 29686  		v.Reset(ssaop.OpARM64Equal)
 29687  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64PPTEST, types.TypeFlags)
 29688  		v1 := b.NewValue0(v.Pos, ssaop.OpMask8sAllTrue, types.TypeMask)
 29689  		v0.AddArg2(v1, m)
 29690  		v.AddArg(v0)
 29691  		return true
 29692  	}
 29693  }
 29694  func rewriteValue_OpMax32FSel(v *ssa.Value) bool {
 29695  	v_1 := v.Args[1]
 29696  	v_0 := v.Args[0]
 29697  	b := v.Block
 29698  	// match: (Max32FSel x y)
 29699  	// result: (FCSELS [ssaop.OpARM64GreaterThanF] x y (FCMPS x y))
 29700  	for {
 29701  		x := v_0
 29702  		y := v_1
 29703  		v.Reset(ssaop.OpARM64FCSELS)
 29704  		v.AuxInt = ssa.OpToAuxInt(ssaop.OpARM64GreaterThanF)
 29705  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64FCMPS, types.TypeFlags)
 29706  		v0.AddArg2(x, y)
 29707  		v.AddArg3(x, y, v0)
 29708  		return true
 29709  	}
 29710  }
 29711  func rewriteValue_OpMax64FSel(v *ssa.Value) bool {
 29712  	v_1 := v.Args[1]
 29713  	v_0 := v.Args[0]
 29714  	b := v.Block
 29715  	// match: (Max64FSel x y)
 29716  	// result: (FCSELD [ssaop.OpARM64GreaterThanF] x y (FCMPD x y))
 29717  	for {
 29718  		x := v_0
 29719  		y := v_1
 29720  		v.Reset(ssaop.OpARM64FCSELD)
 29721  		v.AuxInt = ssa.OpToAuxInt(ssaop.OpARM64GreaterThanF)
 29722  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64FCMPD, types.TypeFlags)
 29723  		v0.AddArg2(x, y)
 29724  		v.AddArg3(x, y, v0)
 29725  		return true
 29726  	}
 29727  }
 29728  func rewriteValue_OpMaxFloat32s(v *ssa.Value) bool {
 29729  	v_1 := v.Args[1]
 29730  	v_0 := v.Args[0]
 29731  	b := v.Block
 29732  	typ := &b.Func.Config.Types
 29733  	// match: (MaxFloat32s x y)
 29734  	// result: (ZFMAXS x y (Select0 <types.TypeMask> (PWHILELTS (MOVDconst [0]) (MOVDconst [8]))))
 29735  	for {
 29736  		x := v_0
 29737  		y := v_1
 29738  		v.Reset(ssaop.OpARM64ZFMAXS)
 29739  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 29740  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTS, types.NewTuple(typ.Mask, types.TypeFlags))
 29741  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 29742  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 29743  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 29744  		v3.AuxInt = ssa.Int64ToAuxInt(8)
 29745  		v1.AddArg2(v2, v3)
 29746  		v0.AddArg(v1)
 29747  		v.AddArg3(x, y, v0)
 29748  		return true
 29749  	}
 29750  }
 29751  func rewriteValue_OpMaxFloat64s(v *ssa.Value) bool {
 29752  	v_1 := v.Args[1]
 29753  	v_0 := v.Args[0]
 29754  	b := v.Block
 29755  	typ := &b.Func.Config.Types
 29756  	// match: (MaxFloat64s x y)
 29757  	// result: (ZFMAXD x y (Select0 <types.TypeMask> (PWHILELTD (MOVDconst [0]) (MOVDconst [4]))))
 29758  	for {
 29759  		x := v_0
 29760  		y := v_1
 29761  		v.Reset(ssaop.OpARM64ZFMAXD)
 29762  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 29763  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTD, types.NewTuple(typ.Mask, types.TypeFlags))
 29764  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 29765  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 29766  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 29767  		v3.AuxInt = ssa.Int64ToAuxInt(4)
 29768  		v1.AddArg2(v2, v3)
 29769  		v0.AddArg(v1)
 29770  		v.AddArg3(x, y, v0)
 29771  		return true
 29772  	}
 29773  }
 29774  func rewriteValue_OpMaxInt16s(v *ssa.Value) bool {
 29775  	v_1 := v.Args[1]
 29776  	v_0 := v.Args[0]
 29777  	b := v.Block
 29778  	typ := &b.Func.Config.Types
 29779  	// match: (MaxInt16s x y)
 29780  	// result: (ZSMAXH x y (Select0 <types.TypeMask> (PWHILELTH (MOVDconst [0]) (MOVDconst [16]))))
 29781  	for {
 29782  		x := v_0
 29783  		y := v_1
 29784  		v.Reset(ssaop.OpARM64ZSMAXH)
 29785  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 29786  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTH, types.NewTuple(typ.Mask, types.TypeFlags))
 29787  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 29788  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 29789  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 29790  		v3.AuxInt = ssa.Int64ToAuxInt(16)
 29791  		v1.AddArg2(v2, v3)
 29792  		v0.AddArg(v1)
 29793  		v.AddArg3(x, y, v0)
 29794  		return true
 29795  	}
 29796  }
 29797  func rewriteValue_OpMaxInt32s(v *ssa.Value) bool {
 29798  	v_1 := v.Args[1]
 29799  	v_0 := v.Args[0]
 29800  	b := v.Block
 29801  	typ := &b.Func.Config.Types
 29802  	// match: (MaxInt32s x y)
 29803  	// result: (ZSMAXS x y (Select0 <types.TypeMask> (PWHILELTS (MOVDconst [0]) (MOVDconst [8]))))
 29804  	for {
 29805  		x := v_0
 29806  		y := v_1
 29807  		v.Reset(ssaop.OpARM64ZSMAXS)
 29808  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 29809  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTS, types.NewTuple(typ.Mask, types.TypeFlags))
 29810  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 29811  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 29812  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 29813  		v3.AuxInt = ssa.Int64ToAuxInt(8)
 29814  		v1.AddArg2(v2, v3)
 29815  		v0.AddArg(v1)
 29816  		v.AddArg3(x, y, v0)
 29817  		return true
 29818  	}
 29819  }
 29820  func rewriteValue_OpMaxInt64s(v *ssa.Value) bool {
 29821  	v_1 := v.Args[1]
 29822  	v_0 := v.Args[0]
 29823  	b := v.Block
 29824  	typ := &b.Func.Config.Types
 29825  	// match: (MaxInt64s x y)
 29826  	// result: (ZSMAXD x y (Select0 <types.TypeMask> (PWHILELTD (MOVDconst [0]) (MOVDconst [4]))))
 29827  	for {
 29828  		x := v_0
 29829  		y := v_1
 29830  		v.Reset(ssaop.OpARM64ZSMAXD)
 29831  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 29832  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTD, types.NewTuple(typ.Mask, types.TypeFlags))
 29833  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 29834  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 29835  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 29836  		v3.AuxInt = ssa.Int64ToAuxInt(4)
 29837  		v1.AddArg2(v2, v3)
 29838  		v0.AddArg(v1)
 29839  		v.AddArg3(x, y, v0)
 29840  		return true
 29841  	}
 29842  }
 29843  func rewriteValue_OpMaxInt8s(v *ssa.Value) bool {
 29844  	v_1 := v.Args[1]
 29845  	v_0 := v.Args[0]
 29846  	b := v.Block
 29847  	typ := &b.Func.Config.Types
 29848  	// match: (MaxInt8s x y)
 29849  	// result: (ZSMAXB x y (Select0 <types.TypeMask> (PWHILELTB (MOVDconst [0]) (MOVDconst [32]))))
 29850  	for {
 29851  		x := v_0
 29852  		y := v_1
 29853  		v.Reset(ssaop.OpARM64ZSMAXB)
 29854  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 29855  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTB, types.NewTuple(typ.Mask, types.TypeFlags))
 29856  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 29857  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 29858  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 29859  		v3.AuxInt = ssa.Int64ToAuxInt(32)
 29860  		v1.AddArg2(v2, v3)
 29861  		v0.AddArg(v1)
 29862  		v.AddArg3(x, y, v0)
 29863  		return true
 29864  	}
 29865  }
 29866  func rewriteValue_OpMaxUint16s(v *ssa.Value) bool {
 29867  	v_1 := v.Args[1]
 29868  	v_0 := v.Args[0]
 29869  	b := v.Block
 29870  	typ := &b.Func.Config.Types
 29871  	// match: (MaxUint16s x y)
 29872  	// result: (ZUMAXH x y (Select0 <types.TypeMask> (PWHILELTH (MOVDconst [0]) (MOVDconst [16]))))
 29873  	for {
 29874  		x := v_0
 29875  		y := v_1
 29876  		v.Reset(ssaop.OpARM64ZUMAXH)
 29877  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 29878  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTH, types.NewTuple(typ.Mask, types.TypeFlags))
 29879  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 29880  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 29881  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 29882  		v3.AuxInt = ssa.Int64ToAuxInt(16)
 29883  		v1.AddArg2(v2, v3)
 29884  		v0.AddArg(v1)
 29885  		v.AddArg3(x, y, v0)
 29886  		return true
 29887  	}
 29888  }
 29889  func rewriteValue_OpMaxUint32s(v *ssa.Value) bool {
 29890  	v_1 := v.Args[1]
 29891  	v_0 := v.Args[0]
 29892  	b := v.Block
 29893  	typ := &b.Func.Config.Types
 29894  	// match: (MaxUint32s x y)
 29895  	// result: (ZUMAXS x y (Select0 <types.TypeMask> (PWHILELTS (MOVDconst [0]) (MOVDconst [8]))))
 29896  	for {
 29897  		x := v_0
 29898  		y := v_1
 29899  		v.Reset(ssaop.OpARM64ZUMAXS)
 29900  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 29901  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTS, types.NewTuple(typ.Mask, types.TypeFlags))
 29902  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 29903  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 29904  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 29905  		v3.AuxInt = ssa.Int64ToAuxInt(8)
 29906  		v1.AddArg2(v2, v3)
 29907  		v0.AddArg(v1)
 29908  		v.AddArg3(x, y, v0)
 29909  		return true
 29910  	}
 29911  }
 29912  func rewriteValue_OpMaxUint64s(v *ssa.Value) bool {
 29913  	v_1 := v.Args[1]
 29914  	v_0 := v.Args[0]
 29915  	b := v.Block
 29916  	typ := &b.Func.Config.Types
 29917  	// match: (MaxUint64s x y)
 29918  	// result: (ZUMAXD x y (Select0 <types.TypeMask> (PWHILELTD (MOVDconst [0]) (MOVDconst [4]))))
 29919  	for {
 29920  		x := v_0
 29921  		y := v_1
 29922  		v.Reset(ssaop.OpARM64ZUMAXD)
 29923  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 29924  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTD, types.NewTuple(typ.Mask, types.TypeFlags))
 29925  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 29926  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 29927  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 29928  		v3.AuxInt = ssa.Int64ToAuxInt(4)
 29929  		v1.AddArg2(v2, v3)
 29930  		v0.AddArg(v1)
 29931  		v.AddArg3(x, y, v0)
 29932  		return true
 29933  	}
 29934  }
 29935  func rewriteValue_OpMaxUint8s(v *ssa.Value) bool {
 29936  	v_1 := v.Args[1]
 29937  	v_0 := v.Args[0]
 29938  	b := v.Block
 29939  	typ := &b.Func.Config.Types
 29940  	// match: (MaxUint8s x y)
 29941  	// result: (ZUMAXB x y (Select0 <types.TypeMask> (PWHILELTB (MOVDconst [0]) (MOVDconst [32]))))
 29942  	for {
 29943  		x := v_0
 29944  		y := v_1
 29945  		v.Reset(ssaop.OpARM64ZUMAXB)
 29946  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 29947  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTB, types.NewTuple(typ.Mask, types.TypeFlags))
 29948  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 29949  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 29950  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 29951  		v3.AuxInt = ssa.Int64ToAuxInt(32)
 29952  		v1.AddArg2(v2, v3)
 29953  		v0.AddArg(v1)
 29954  		v.AddArg3(x, y, v0)
 29955  		return true
 29956  	}
 29957  }
 29958  func rewriteValue_OpMin32FSel(v *ssa.Value) bool {
 29959  	v_1 := v.Args[1]
 29960  	v_0 := v.Args[0]
 29961  	b := v.Block
 29962  	// match: (Min32FSel x y)
 29963  	// result: (FCSELS [ssaop.OpARM64LessThanF] x y (FCMPS x y))
 29964  	for {
 29965  		x := v_0
 29966  		y := v_1
 29967  		v.Reset(ssaop.OpARM64FCSELS)
 29968  		v.AuxInt = ssa.OpToAuxInt(ssaop.OpARM64LessThanF)
 29969  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64FCMPS, types.TypeFlags)
 29970  		v0.AddArg2(x, y)
 29971  		v.AddArg3(x, y, v0)
 29972  		return true
 29973  	}
 29974  }
 29975  func rewriteValue_OpMin64FSel(v *ssa.Value) bool {
 29976  	v_1 := v.Args[1]
 29977  	v_0 := v.Args[0]
 29978  	b := v.Block
 29979  	// match: (Min64FSel x y)
 29980  	// result: (FCSELD [ssaop.OpARM64LessThanF] x y (FCMPD x y))
 29981  	for {
 29982  		x := v_0
 29983  		y := v_1
 29984  		v.Reset(ssaop.OpARM64FCSELD)
 29985  		v.AuxInt = ssa.OpToAuxInt(ssaop.OpARM64LessThanF)
 29986  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64FCMPD, types.TypeFlags)
 29987  		v0.AddArg2(x, y)
 29988  		v.AddArg3(x, y, v0)
 29989  		return true
 29990  	}
 29991  }
 29992  func rewriteValue_OpMinFloat32s(v *ssa.Value) bool {
 29993  	v_1 := v.Args[1]
 29994  	v_0 := v.Args[0]
 29995  	b := v.Block
 29996  	typ := &b.Func.Config.Types
 29997  	// match: (MinFloat32s x y)
 29998  	// result: (ZFMINS x y (Select0 <types.TypeMask> (PWHILELTS (MOVDconst [0]) (MOVDconst [8]))))
 29999  	for {
 30000  		x := v_0
 30001  		y := v_1
 30002  		v.Reset(ssaop.OpARM64ZFMINS)
 30003  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 30004  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTS, types.NewTuple(typ.Mask, types.TypeFlags))
 30005  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 30006  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 30007  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 30008  		v3.AuxInt = ssa.Int64ToAuxInt(8)
 30009  		v1.AddArg2(v2, v3)
 30010  		v0.AddArg(v1)
 30011  		v.AddArg3(x, y, v0)
 30012  		return true
 30013  	}
 30014  }
 30015  func rewriteValue_OpMinFloat64s(v *ssa.Value) bool {
 30016  	v_1 := v.Args[1]
 30017  	v_0 := v.Args[0]
 30018  	b := v.Block
 30019  	typ := &b.Func.Config.Types
 30020  	// match: (MinFloat64s x y)
 30021  	// result: (ZFMIND x y (Select0 <types.TypeMask> (PWHILELTD (MOVDconst [0]) (MOVDconst [4]))))
 30022  	for {
 30023  		x := v_0
 30024  		y := v_1
 30025  		v.Reset(ssaop.OpARM64ZFMIND)
 30026  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 30027  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTD, types.NewTuple(typ.Mask, types.TypeFlags))
 30028  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 30029  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 30030  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 30031  		v3.AuxInt = ssa.Int64ToAuxInt(4)
 30032  		v1.AddArg2(v2, v3)
 30033  		v0.AddArg(v1)
 30034  		v.AddArg3(x, y, v0)
 30035  		return true
 30036  	}
 30037  }
 30038  func rewriteValue_OpMinInt16s(v *ssa.Value) bool {
 30039  	v_1 := v.Args[1]
 30040  	v_0 := v.Args[0]
 30041  	b := v.Block
 30042  	typ := &b.Func.Config.Types
 30043  	// match: (MinInt16s x y)
 30044  	// result: (ZSMINH x y (Select0 <types.TypeMask> (PWHILELTH (MOVDconst [0]) (MOVDconst [16]))))
 30045  	for {
 30046  		x := v_0
 30047  		y := v_1
 30048  		v.Reset(ssaop.OpARM64ZSMINH)
 30049  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 30050  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTH, types.NewTuple(typ.Mask, types.TypeFlags))
 30051  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 30052  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 30053  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 30054  		v3.AuxInt = ssa.Int64ToAuxInt(16)
 30055  		v1.AddArg2(v2, v3)
 30056  		v0.AddArg(v1)
 30057  		v.AddArg3(x, y, v0)
 30058  		return true
 30059  	}
 30060  }
 30061  func rewriteValue_OpMinInt32s(v *ssa.Value) bool {
 30062  	v_1 := v.Args[1]
 30063  	v_0 := v.Args[0]
 30064  	b := v.Block
 30065  	typ := &b.Func.Config.Types
 30066  	// match: (MinInt32s x y)
 30067  	// result: (ZSMINS x y (Select0 <types.TypeMask> (PWHILELTS (MOVDconst [0]) (MOVDconst [8]))))
 30068  	for {
 30069  		x := v_0
 30070  		y := v_1
 30071  		v.Reset(ssaop.OpARM64ZSMINS)
 30072  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 30073  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTS, types.NewTuple(typ.Mask, types.TypeFlags))
 30074  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 30075  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 30076  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 30077  		v3.AuxInt = ssa.Int64ToAuxInt(8)
 30078  		v1.AddArg2(v2, v3)
 30079  		v0.AddArg(v1)
 30080  		v.AddArg3(x, y, v0)
 30081  		return true
 30082  	}
 30083  }
 30084  func rewriteValue_OpMinInt64s(v *ssa.Value) bool {
 30085  	v_1 := v.Args[1]
 30086  	v_0 := v.Args[0]
 30087  	b := v.Block
 30088  	typ := &b.Func.Config.Types
 30089  	// match: (MinInt64s x y)
 30090  	// result: (ZSMIND x y (Select0 <types.TypeMask> (PWHILELTD (MOVDconst [0]) (MOVDconst [4]))))
 30091  	for {
 30092  		x := v_0
 30093  		y := v_1
 30094  		v.Reset(ssaop.OpARM64ZSMIND)
 30095  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 30096  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTD, types.NewTuple(typ.Mask, types.TypeFlags))
 30097  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 30098  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 30099  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 30100  		v3.AuxInt = ssa.Int64ToAuxInt(4)
 30101  		v1.AddArg2(v2, v3)
 30102  		v0.AddArg(v1)
 30103  		v.AddArg3(x, y, v0)
 30104  		return true
 30105  	}
 30106  }
 30107  func rewriteValue_OpMinInt8s(v *ssa.Value) bool {
 30108  	v_1 := v.Args[1]
 30109  	v_0 := v.Args[0]
 30110  	b := v.Block
 30111  	typ := &b.Func.Config.Types
 30112  	// match: (MinInt8s x y)
 30113  	// result: (ZSMINB x y (Select0 <types.TypeMask> (PWHILELTB (MOVDconst [0]) (MOVDconst [32]))))
 30114  	for {
 30115  		x := v_0
 30116  		y := v_1
 30117  		v.Reset(ssaop.OpARM64ZSMINB)
 30118  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 30119  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTB, types.NewTuple(typ.Mask, types.TypeFlags))
 30120  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 30121  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 30122  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 30123  		v3.AuxInt = ssa.Int64ToAuxInt(32)
 30124  		v1.AddArg2(v2, v3)
 30125  		v0.AddArg(v1)
 30126  		v.AddArg3(x, y, v0)
 30127  		return true
 30128  	}
 30129  }
 30130  func rewriteValue_OpMinUint16s(v *ssa.Value) bool {
 30131  	v_1 := v.Args[1]
 30132  	v_0 := v.Args[0]
 30133  	b := v.Block
 30134  	typ := &b.Func.Config.Types
 30135  	// match: (MinUint16s x y)
 30136  	// result: (ZUMINH x y (Select0 <types.TypeMask> (PWHILELTH (MOVDconst [0]) (MOVDconst [16]))))
 30137  	for {
 30138  		x := v_0
 30139  		y := v_1
 30140  		v.Reset(ssaop.OpARM64ZUMINH)
 30141  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 30142  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTH, types.NewTuple(typ.Mask, types.TypeFlags))
 30143  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 30144  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 30145  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 30146  		v3.AuxInt = ssa.Int64ToAuxInt(16)
 30147  		v1.AddArg2(v2, v3)
 30148  		v0.AddArg(v1)
 30149  		v.AddArg3(x, y, v0)
 30150  		return true
 30151  	}
 30152  }
 30153  func rewriteValue_OpMinUint32s(v *ssa.Value) bool {
 30154  	v_1 := v.Args[1]
 30155  	v_0 := v.Args[0]
 30156  	b := v.Block
 30157  	typ := &b.Func.Config.Types
 30158  	// match: (MinUint32s x y)
 30159  	// result: (ZUMINS x y (Select0 <types.TypeMask> (PWHILELTS (MOVDconst [0]) (MOVDconst [8]))))
 30160  	for {
 30161  		x := v_0
 30162  		y := v_1
 30163  		v.Reset(ssaop.OpARM64ZUMINS)
 30164  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 30165  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTS, types.NewTuple(typ.Mask, types.TypeFlags))
 30166  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 30167  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 30168  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 30169  		v3.AuxInt = ssa.Int64ToAuxInt(8)
 30170  		v1.AddArg2(v2, v3)
 30171  		v0.AddArg(v1)
 30172  		v.AddArg3(x, y, v0)
 30173  		return true
 30174  	}
 30175  }
 30176  func rewriteValue_OpMinUint64s(v *ssa.Value) bool {
 30177  	v_1 := v.Args[1]
 30178  	v_0 := v.Args[0]
 30179  	b := v.Block
 30180  	typ := &b.Func.Config.Types
 30181  	// match: (MinUint64s x y)
 30182  	// result: (ZUMIND x y (Select0 <types.TypeMask> (PWHILELTD (MOVDconst [0]) (MOVDconst [4]))))
 30183  	for {
 30184  		x := v_0
 30185  		y := v_1
 30186  		v.Reset(ssaop.OpARM64ZUMIND)
 30187  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 30188  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTD, types.NewTuple(typ.Mask, types.TypeFlags))
 30189  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 30190  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 30191  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 30192  		v3.AuxInt = ssa.Int64ToAuxInt(4)
 30193  		v1.AddArg2(v2, v3)
 30194  		v0.AddArg(v1)
 30195  		v.AddArg3(x, y, v0)
 30196  		return true
 30197  	}
 30198  }
 30199  func rewriteValue_OpMinUint8s(v *ssa.Value) bool {
 30200  	v_1 := v.Args[1]
 30201  	v_0 := v.Args[0]
 30202  	b := v.Block
 30203  	typ := &b.Func.Config.Types
 30204  	// match: (MinUint8s x y)
 30205  	// result: (ZUMINB x y (Select0 <types.TypeMask> (PWHILELTB (MOVDconst [0]) (MOVDconst [32]))))
 30206  	for {
 30207  		x := v_0
 30208  		y := v_1
 30209  		v.Reset(ssaop.OpARM64ZUMINB)
 30210  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 30211  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTB, types.NewTuple(typ.Mask, types.TypeFlags))
 30212  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 30213  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 30214  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 30215  		v3.AuxInt = ssa.Int64ToAuxInt(32)
 30216  		v1.AddArg2(v2, v3)
 30217  		v0.AddArg(v1)
 30218  		v.AddArg3(x, y, v0)
 30219  		return true
 30220  	}
 30221  }
 30222  func rewriteValue_OpMod16(v *ssa.Value) bool {
 30223  	v_1 := v.Args[1]
 30224  	v_0 := v.Args[0]
 30225  	b := v.Block
 30226  	typ := &b.Func.Config.Types
 30227  	// match: (Mod16 x y)
 30228  	// result: (MODW (SignExt16to32 x) (SignExt16to32 y))
 30229  	for {
 30230  		x := v_0
 30231  		y := v_1
 30232  		v.Reset(ssaop.OpARM64MODW)
 30233  		v0 := b.NewValue0(v.Pos, ssaop.OpSignExt16to32, typ.Int32)
 30234  		v0.AddArg(x)
 30235  		v1 := b.NewValue0(v.Pos, ssaop.OpSignExt16to32, typ.Int32)
 30236  		v1.AddArg(y)
 30237  		v.AddArg2(v0, v1)
 30238  		return true
 30239  	}
 30240  }
 30241  func rewriteValue_OpMod16u(v *ssa.Value) bool {
 30242  	v_1 := v.Args[1]
 30243  	v_0 := v.Args[0]
 30244  	b := v.Block
 30245  	typ := &b.Func.Config.Types
 30246  	// match: (Mod16u x y)
 30247  	// result: (UMODW (ZeroExt16to32 x) (ZeroExt16to32 y))
 30248  	for {
 30249  		x := v_0
 30250  		y := v_1
 30251  		v.Reset(ssaop.OpARM64UMODW)
 30252  		v0 := b.NewValue0(v.Pos, ssaop.OpZeroExt16to32, typ.UInt32)
 30253  		v0.AddArg(x)
 30254  		v1 := b.NewValue0(v.Pos, ssaop.OpZeroExt16to32, typ.UInt32)
 30255  		v1.AddArg(y)
 30256  		v.AddArg2(v0, v1)
 30257  		return true
 30258  	}
 30259  }
 30260  func rewriteValue_OpMod32(v *ssa.Value) bool {
 30261  	v_1 := v.Args[1]
 30262  	v_0 := v.Args[0]
 30263  	// match: (Mod32 x y)
 30264  	// result: (MODW x y)
 30265  	for {
 30266  		x := v_0
 30267  		y := v_1
 30268  		v.Reset(ssaop.OpARM64MODW)
 30269  		v.AddArg2(x, y)
 30270  		return true
 30271  	}
 30272  }
 30273  func rewriteValue_OpMod64(v *ssa.Value) bool {
 30274  	v_1 := v.Args[1]
 30275  	v_0 := v.Args[0]
 30276  	// match: (Mod64 x y)
 30277  	// result: (MOD x y)
 30278  	for {
 30279  		x := v_0
 30280  		y := v_1
 30281  		v.Reset(ssaop.OpARM64MOD)
 30282  		v.AddArg2(x, y)
 30283  		return true
 30284  	}
 30285  }
 30286  func rewriteValue_OpMod8(v *ssa.Value) bool {
 30287  	v_1 := v.Args[1]
 30288  	v_0 := v.Args[0]
 30289  	b := v.Block
 30290  	typ := &b.Func.Config.Types
 30291  	// match: (Mod8 x y)
 30292  	// result: (MODW (SignExt8to32 x) (SignExt8to32 y))
 30293  	for {
 30294  		x := v_0
 30295  		y := v_1
 30296  		v.Reset(ssaop.OpARM64MODW)
 30297  		v0 := b.NewValue0(v.Pos, ssaop.OpSignExt8to32, typ.Int32)
 30298  		v0.AddArg(x)
 30299  		v1 := b.NewValue0(v.Pos, ssaop.OpSignExt8to32, typ.Int32)
 30300  		v1.AddArg(y)
 30301  		v.AddArg2(v0, v1)
 30302  		return true
 30303  	}
 30304  }
 30305  func rewriteValue_OpMod8u(v *ssa.Value) bool {
 30306  	v_1 := v.Args[1]
 30307  	v_0 := v.Args[0]
 30308  	b := v.Block
 30309  	typ := &b.Func.Config.Types
 30310  	// match: (Mod8u x y)
 30311  	// result: (UMODW (ZeroExt8to32 x) (ZeroExt8to32 y))
 30312  	for {
 30313  		x := v_0
 30314  		y := v_1
 30315  		v.Reset(ssaop.OpARM64UMODW)
 30316  		v0 := b.NewValue0(v.Pos, ssaop.OpZeroExt8to32, typ.UInt32)
 30317  		v0.AddArg(x)
 30318  		v1 := b.NewValue0(v.Pos, ssaop.OpZeroExt8to32, typ.UInt32)
 30319  		v1.AddArg(y)
 30320  		v.AddArg2(v0, v1)
 30321  		return true
 30322  	}
 30323  }
 30324  func rewriteValue_OpMove(v *ssa.Value) bool {
 30325  	v_2 := v.Args[2]
 30326  	v_1 := v.Args[1]
 30327  	v_0 := v.Args[0]
 30328  	b := v.Block
 30329  	typ := &b.Func.Config.Types
 30330  	// match: (Move [0] _ _ mem)
 30331  	// result: mem
 30332  	for {
 30333  		if ssa.AuxIntToInt64(v.AuxInt) != 0 {
 30334  			break
 30335  		}
 30336  		mem := v_2
 30337  		v.CopyOf(mem)
 30338  		return true
 30339  	}
 30340  	// match: (Move [1] dst src mem)
 30341  	// result: (MOVBstore dst (MOVBUload src mem) mem)
 30342  	for {
 30343  		if ssa.AuxIntToInt64(v.AuxInt) != 1 {
 30344  			break
 30345  		}
 30346  		dst := v_0
 30347  		src := v_1
 30348  		mem := v_2
 30349  		v.Reset(ssaop.OpARM64MOVBstore)
 30350  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MOVBUload, typ.UInt8)
 30351  		v0.AddArg2(src, mem)
 30352  		v.AddArg3(dst, v0, mem)
 30353  		return true
 30354  	}
 30355  	// match: (Move [2] dst src mem)
 30356  	// result: (MOVHstore dst (MOVHUload src mem) mem)
 30357  	for {
 30358  		if ssa.AuxIntToInt64(v.AuxInt) != 2 {
 30359  			break
 30360  		}
 30361  		dst := v_0
 30362  		src := v_1
 30363  		mem := v_2
 30364  		v.Reset(ssaop.OpARM64MOVHstore)
 30365  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MOVHUload, typ.UInt16)
 30366  		v0.AddArg2(src, mem)
 30367  		v.AddArg3(dst, v0, mem)
 30368  		return true
 30369  	}
 30370  	// match: (Move [3] dst src mem)
 30371  	// result: (MOVBstore [2] dst (MOVBUload [2] src mem) (MOVHstore dst (MOVHUload src mem) mem))
 30372  	for {
 30373  		if ssa.AuxIntToInt64(v.AuxInt) != 3 {
 30374  			break
 30375  		}
 30376  		dst := v_0
 30377  		src := v_1
 30378  		mem := v_2
 30379  		v.Reset(ssaop.OpARM64MOVBstore)
 30380  		v.AuxInt = ssa.Int32ToAuxInt(2)
 30381  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MOVBUload, typ.UInt8)
 30382  		v0.AuxInt = ssa.Int32ToAuxInt(2)
 30383  		v0.AddArg2(src, mem)
 30384  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64MOVHstore, types.TypeMem)
 30385  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVHUload, typ.UInt16)
 30386  		v2.AddArg2(src, mem)
 30387  		v1.AddArg3(dst, v2, mem)
 30388  		v.AddArg3(dst, v0, v1)
 30389  		return true
 30390  	}
 30391  	// match: (Move [4] dst src mem)
 30392  	// result: (MOVWstore dst (MOVWUload src mem) mem)
 30393  	for {
 30394  		if ssa.AuxIntToInt64(v.AuxInt) != 4 {
 30395  			break
 30396  		}
 30397  		dst := v_0
 30398  		src := v_1
 30399  		mem := v_2
 30400  		v.Reset(ssaop.OpARM64MOVWstore)
 30401  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MOVWUload, typ.UInt32)
 30402  		v0.AddArg2(src, mem)
 30403  		v.AddArg3(dst, v0, mem)
 30404  		return true
 30405  	}
 30406  	// match: (Move [5] dst src mem)
 30407  	// result: (MOVBstore [4] dst (MOVBUload [4] src mem) (MOVWstore dst (MOVWUload src mem) mem))
 30408  	for {
 30409  		if ssa.AuxIntToInt64(v.AuxInt) != 5 {
 30410  			break
 30411  		}
 30412  		dst := v_0
 30413  		src := v_1
 30414  		mem := v_2
 30415  		v.Reset(ssaop.OpARM64MOVBstore)
 30416  		v.AuxInt = ssa.Int32ToAuxInt(4)
 30417  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MOVBUload, typ.UInt8)
 30418  		v0.AuxInt = ssa.Int32ToAuxInt(4)
 30419  		v0.AddArg2(src, mem)
 30420  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64MOVWstore, types.TypeMem)
 30421  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVWUload, typ.UInt32)
 30422  		v2.AddArg2(src, mem)
 30423  		v1.AddArg3(dst, v2, mem)
 30424  		v.AddArg3(dst, v0, v1)
 30425  		return true
 30426  	}
 30427  	// match: (Move [6] dst src mem)
 30428  	// result: (MOVHstore [4] dst (MOVHUload [4] src mem) (MOVWstore dst (MOVWUload src mem) mem))
 30429  	for {
 30430  		if ssa.AuxIntToInt64(v.AuxInt) != 6 {
 30431  			break
 30432  		}
 30433  		dst := v_0
 30434  		src := v_1
 30435  		mem := v_2
 30436  		v.Reset(ssaop.OpARM64MOVHstore)
 30437  		v.AuxInt = ssa.Int32ToAuxInt(4)
 30438  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MOVHUload, typ.UInt16)
 30439  		v0.AuxInt = ssa.Int32ToAuxInt(4)
 30440  		v0.AddArg2(src, mem)
 30441  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64MOVWstore, types.TypeMem)
 30442  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVWUload, typ.UInt32)
 30443  		v2.AddArg2(src, mem)
 30444  		v1.AddArg3(dst, v2, mem)
 30445  		v.AddArg3(dst, v0, v1)
 30446  		return true
 30447  	}
 30448  	// match: (Move [7] dst src mem)
 30449  	// result: (MOVWstore [3] dst (MOVWUload [3] src mem) (MOVWstore dst (MOVWUload src mem) mem))
 30450  	for {
 30451  		if ssa.AuxIntToInt64(v.AuxInt) != 7 {
 30452  			break
 30453  		}
 30454  		dst := v_0
 30455  		src := v_1
 30456  		mem := v_2
 30457  		v.Reset(ssaop.OpARM64MOVWstore)
 30458  		v.AuxInt = ssa.Int32ToAuxInt(3)
 30459  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MOVWUload, typ.UInt32)
 30460  		v0.AuxInt = ssa.Int32ToAuxInt(3)
 30461  		v0.AddArg2(src, mem)
 30462  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64MOVWstore, types.TypeMem)
 30463  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVWUload, typ.UInt32)
 30464  		v2.AddArg2(src, mem)
 30465  		v1.AddArg3(dst, v2, mem)
 30466  		v.AddArg3(dst, v0, v1)
 30467  		return true
 30468  	}
 30469  	// match: (Move [8] dst src mem)
 30470  	// result: (MOVDstore dst (MOVDload src mem) mem)
 30471  	for {
 30472  		if ssa.AuxIntToInt64(v.AuxInt) != 8 {
 30473  			break
 30474  		}
 30475  		dst := v_0
 30476  		src := v_1
 30477  		mem := v_2
 30478  		v.Reset(ssaop.OpARM64MOVDstore)
 30479  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDload, typ.UInt64)
 30480  		v0.AddArg2(src, mem)
 30481  		v.AddArg3(dst, v0, mem)
 30482  		return true
 30483  	}
 30484  	// match: (Move [9] dst src mem)
 30485  	// result: (MOVBstore [8] dst (MOVBUload [8] src mem) (MOVDstore dst (MOVDload src mem) mem))
 30486  	for {
 30487  		if ssa.AuxIntToInt64(v.AuxInt) != 9 {
 30488  			break
 30489  		}
 30490  		dst := v_0
 30491  		src := v_1
 30492  		mem := v_2
 30493  		v.Reset(ssaop.OpARM64MOVBstore)
 30494  		v.AuxInt = ssa.Int32ToAuxInt(8)
 30495  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MOVBUload, typ.UInt8)
 30496  		v0.AuxInt = ssa.Int32ToAuxInt(8)
 30497  		v0.AddArg2(src, mem)
 30498  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDstore, types.TypeMem)
 30499  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDload, typ.UInt64)
 30500  		v2.AddArg2(src, mem)
 30501  		v1.AddArg3(dst, v2, mem)
 30502  		v.AddArg3(dst, v0, v1)
 30503  		return true
 30504  	}
 30505  	// match: (Move [10] dst src mem)
 30506  	// result: (MOVHstore [8] dst (MOVHUload [8] src mem) (MOVDstore dst (MOVDload src mem) mem))
 30507  	for {
 30508  		if ssa.AuxIntToInt64(v.AuxInt) != 10 {
 30509  			break
 30510  		}
 30511  		dst := v_0
 30512  		src := v_1
 30513  		mem := v_2
 30514  		v.Reset(ssaop.OpARM64MOVHstore)
 30515  		v.AuxInt = ssa.Int32ToAuxInt(8)
 30516  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MOVHUload, typ.UInt16)
 30517  		v0.AuxInt = ssa.Int32ToAuxInt(8)
 30518  		v0.AddArg2(src, mem)
 30519  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDstore, types.TypeMem)
 30520  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDload, typ.UInt64)
 30521  		v2.AddArg2(src, mem)
 30522  		v1.AddArg3(dst, v2, mem)
 30523  		v.AddArg3(dst, v0, v1)
 30524  		return true
 30525  	}
 30526  	// match: (Move [11] dst src mem)
 30527  	// result: (MOVDstore [3] dst (MOVDload [3] src mem) (MOVDstore dst (MOVDload src mem) mem))
 30528  	for {
 30529  		if ssa.AuxIntToInt64(v.AuxInt) != 11 {
 30530  			break
 30531  		}
 30532  		dst := v_0
 30533  		src := v_1
 30534  		mem := v_2
 30535  		v.Reset(ssaop.OpARM64MOVDstore)
 30536  		v.AuxInt = ssa.Int32ToAuxInt(3)
 30537  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDload, typ.UInt64)
 30538  		v0.AuxInt = ssa.Int32ToAuxInt(3)
 30539  		v0.AddArg2(src, mem)
 30540  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDstore, types.TypeMem)
 30541  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDload, typ.UInt64)
 30542  		v2.AddArg2(src, mem)
 30543  		v1.AddArg3(dst, v2, mem)
 30544  		v.AddArg3(dst, v0, v1)
 30545  		return true
 30546  	}
 30547  	// match: (Move [12] dst src mem)
 30548  	// result: (MOVWstore [8] dst (MOVWUload [8] src mem) (MOVDstore dst (MOVDload src mem) mem))
 30549  	for {
 30550  		if ssa.AuxIntToInt64(v.AuxInt) != 12 {
 30551  			break
 30552  		}
 30553  		dst := v_0
 30554  		src := v_1
 30555  		mem := v_2
 30556  		v.Reset(ssaop.OpARM64MOVWstore)
 30557  		v.AuxInt = ssa.Int32ToAuxInt(8)
 30558  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MOVWUload, typ.UInt32)
 30559  		v0.AuxInt = ssa.Int32ToAuxInt(8)
 30560  		v0.AddArg2(src, mem)
 30561  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDstore, types.TypeMem)
 30562  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDload, typ.UInt64)
 30563  		v2.AddArg2(src, mem)
 30564  		v1.AddArg3(dst, v2, mem)
 30565  		v.AddArg3(dst, v0, v1)
 30566  		return true
 30567  	}
 30568  	// match: (Move [13] dst src mem)
 30569  	// result: (MOVDstore [5] dst (MOVDload [5] src mem) (MOVDstore dst (MOVDload src mem) mem))
 30570  	for {
 30571  		if ssa.AuxIntToInt64(v.AuxInt) != 13 {
 30572  			break
 30573  		}
 30574  		dst := v_0
 30575  		src := v_1
 30576  		mem := v_2
 30577  		v.Reset(ssaop.OpARM64MOVDstore)
 30578  		v.AuxInt = ssa.Int32ToAuxInt(5)
 30579  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDload, typ.UInt64)
 30580  		v0.AuxInt = ssa.Int32ToAuxInt(5)
 30581  		v0.AddArg2(src, mem)
 30582  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDstore, types.TypeMem)
 30583  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDload, typ.UInt64)
 30584  		v2.AddArg2(src, mem)
 30585  		v1.AddArg3(dst, v2, mem)
 30586  		v.AddArg3(dst, v0, v1)
 30587  		return true
 30588  	}
 30589  	// match: (Move [14] dst src mem)
 30590  	// result: (MOVDstore [6] dst (MOVDload [6] src mem) (MOVDstore dst (MOVDload src mem) mem))
 30591  	for {
 30592  		if ssa.AuxIntToInt64(v.AuxInt) != 14 {
 30593  			break
 30594  		}
 30595  		dst := v_0
 30596  		src := v_1
 30597  		mem := v_2
 30598  		v.Reset(ssaop.OpARM64MOVDstore)
 30599  		v.AuxInt = ssa.Int32ToAuxInt(6)
 30600  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDload, typ.UInt64)
 30601  		v0.AuxInt = ssa.Int32ToAuxInt(6)
 30602  		v0.AddArg2(src, mem)
 30603  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDstore, types.TypeMem)
 30604  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDload, typ.UInt64)
 30605  		v2.AddArg2(src, mem)
 30606  		v1.AddArg3(dst, v2, mem)
 30607  		v.AddArg3(dst, v0, v1)
 30608  		return true
 30609  	}
 30610  	// match: (Move [15] dst src mem)
 30611  	// result: (MOVDstore [7] dst (MOVDload [7] src mem) (MOVDstore dst (MOVDload src mem) mem))
 30612  	for {
 30613  		if ssa.AuxIntToInt64(v.AuxInt) != 15 {
 30614  			break
 30615  		}
 30616  		dst := v_0
 30617  		src := v_1
 30618  		mem := v_2
 30619  		v.Reset(ssaop.OpARM64MOVDstore)
 30620  		v.AuxInt = ssa.Int32ToAuxInt(7)
 30621  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDload, typ.UInt64)
 30622  		v0.AuxInt = ssa.Int32ToAuxInt(7)
 30623  		v0.AddArg2(src, mem)
 30624  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDstore, types.TypeMem)
 30625  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDload, typ.UInt64)
 30626  		v2.AddArg2(src, mem)
 30627  		v1.AddArg3(dst, v2, mem)
 30628  		v.AddArg3(dst, v0, v1)
 30629  		return true
 30630  	}
 30631  	// match: (Move [16] dst src mem)
 30632  	// result: (FMOVQstore dst (FMOVQload src mem) mem)
 30633  	for {
 30634  		if ssa.AuxIntToInt64(v.AuxInt) != 16 {
 30635  			break
 30636  		}
 30637  		dst := v_0
 30638  		src := v_1
 30639  		mem := v_2
 30640  		v.Reset(ssaop.OpARM64FMOVQstore)
 30641  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64FMOVQload, typ.Vec128)
 30642  		v0.AddArg2(src, mem)
 30643  		v.AddArg3(dst, v0, mem)
 30644  		return true
 30645  	}
 30646  	// match: (Move [s] dst src mem)
 30647  	// cond: s > 16 && s <= 24
 30648  	// result: (MOVDstore [int32(s-8)] dst (MOVDload [int32(s-8)] src mem) (FMOVQstore dst (FMOVQload src mem) mem))
 30649  	for {
 30650  		s := ssa.AuxIntToInt64(v.AuxInt)
 30651  		dst := v_0
 30652  		src := v_1
 30653  		mem := v_2
 30654  		if !(s > 16 && s <= 24) {
 30655  			break
 30656  		}
 30657  		v.Reset(ssaop.OpARM64MOVDstore)
 30658  		v.AuxInt = ssa.Int32ToAuxInt(int32(s - 8))
 30659  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDload, typ.UInt64)
 30660  		v0.AuxInt = ssa.Int32ToAuxInt(int32(s - 8))
 30661  		v0.AddArg2(src, mem)
 30662  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64FMOVQstore, types.TypeMem)
 30663  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64FMOVQload, typ.Vec128)
 30664  		v2.AddArg2(src, mem)
 30665  		v1.AddArg3(dst, v2, mem)
 30666  		v.AddArg3(dst, v0, v1)
 30667  		return true
 30668  	}
 30669  	// match: (Move [s] dst src mem)
 30670  	// cond: s > 24 && s < 32
 30671  	// result: (FMOVQstore [int32(s-16)] dst (FMOVQload [int32(s-16)] src mem) (FMOVQstore dst (FMOVQload src mem) mem))
 30672  	for {
 30673  		s := ssa.AuxIntToInt64(v.AuxInt)
 30674  		dst := v_0
 30675  		src := v_1
 30676  		mem := v_2
 30677  		if !(s > 24 && s < 32) {
 30678  			break
 30679  		}
 30680  		v.Reset(ssaop.OpARM64FMOVQstore)
 30681  		v.AuxInt = ssa.Int32ToAuxInt(int32(s - 16))
 30682  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64FMOVQload, typ.Vec128)
 30683  		v0.AuxInt = ssa.Int32ToAuxInt(int32(s - 16))
 30684  		v0.AddArg2(src, mem)
 30685  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64FMOVQstore, types.TypeMem)
 30686  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64FMOVQload, typ.Vec128)
 30687  		v2.AddArg2(src, mem)
 30688  		v1.AddArg3(dst, v2, mem)
 30689  		v.AddArg3(dst, v0, v1)
 30690  		return true
 30691  	}
 30692  	// match: (Move [32] dst src mem)
 30693  	// result: (FSTPQ dst (Select0 <typ.Vec128> (FLDPQ src mem)) (Select1 <typ.Vec128> (FLDPQ src mem)) mem)
 30694  	for {
 30695  		if ssa.AuxIntToInt64(v.AuxInt) != 32 {
 30696  			break
 30697  		}
 30698  		dst := v_0
 30699  		src := v_1
 30700  		mem := v_2
 30701  		v.Reset(ssaop.OpARM64FSTPQ)
 30702  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, typ.Vec128)
 30703  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64FLDPQ, types.NewTuple(typ.Vec128, typ.Vec128))
 30704  		v1.AddArg2(src, mem)
 30705  		v0.AddArg(v1)
 30706  		v2 := b.NewValue0(v.Pos, ssaop.OpSelect1, typ.Vec128)
 30707  		v2.AddArg(v1)
 30708  		v.AddArg4(dst, v0, v2, mem)
 30709  		return true
 30710  	}
 30711  	// match: (Move [s] dst src mem)
 30712  	// cond: s > 32 && s <= 40
 30713  	// result: (MOVDstore [int32(s-8)] dst (MOVDload [int32(s-8)] src mem) (FSTPQ dst (Select0 <typ.Vec128> (FLDPQ src mem)) (Select1 <typ.Vec128> (FLDPQ src mem)) mem))
 30714  	for {
 30715  		s := ssa.AuxIntToInt64(v.AuxInt)
 30716  		dst := v_0
 30717  		src := v_1
 30718  		mem := v_2
 30719  		if !(s > 32 && s <= 40) {
 30720  			break
 30721  		}
 30722  		v.Reset(ssaop.OpARM64MOVDstore)
 30723  		v.AuxInt = ssa.Int32ToAuxInt(int32(s - 8))
 30724  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDload, typ.UInt64)
 30725  		v0.AuxInt = ssa.Int32ToAuxInt(int32(s - 8))
 30726  		v0.AddArg2(src, mem)
 30727  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64FSTPQ, types.TypeMem)
 30728  		v2 := b.NewValue0(v.Pos, ssaop.OpSelect0, typ.Vec128)
 30729  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64FLDPQ, types.NewTuple(typ.Vec128, typ.Vec128))
 30730  		v3.AddArg2(src, mem)
 30731  		v2.AddArg(v3)
 30732  		v4 := b.NewValue0(v.Pos, ssaop.OpSelect1, typ.Vec128)
 30733  		v4.AddArg(v3)
 30734  		v1.AddArg4(dst, v2, v4, mem)
 30735  		v.AddArg3(dst, v0, v1)
 30736  		return true
 30737  	}
 30738  	// match: (Move [s] dst src mem)
 30739  	// cond: s > 40 && s <= 48
 30740  	// result: (FMOVQstore [int32(s-16)] dst (FMOVQload [int32(s-16)] src mem) (FSTPQ dst (Select0 <typ.Vec128> (FLDPQ src mem)) (Select1 <typ.Vec128> (FLDPQ src mem)) mem))
 30741  	for {
 30742  		s := ssa.AuxIntToInt64(v.AuxInt)
 30743  		dst := v_0
 30744  		src := v_1
 30745  		mem := v_2
 30746  		if !(s > 40 && s <= 48) {
 30747  			break
 30748  		}
 30749  		v.Reset(ssaop.OpARM64FMOVQstore)
 30750  		v.AuxInt = ssa.Int32ToAuxInt(int32(s - 16))
 30751  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64FMOVQload, typ.Vec128)
 30752  		v0.AuxInt = ssa.Int32ToAuxInt(int32(s - 16))
 30753  		v0.AddArg2(src, mem)
 30754  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64FSTPQ, types.TypeMem)
 30755  		v2 := b.NewValue0(v.Pos, ssaop.OpSelect0, typ.Vec128)
 30756  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64FLDPQ, types.NewTuple(typ.Vec128, typ.Vec128))
 30757  		v3.AddArg2(src, mem)
 30758  		v2.AddArg(v3)
 30759  		v4 := b.NewValue0(v.Pos, ssaop.OpSelect1, typ.Vec128)
 30760  		v4.AddArg(v3)
 30761  		v1.AddArg4(dst, v2, v4, mem)
 30762  		v.AddArg3(dst, v0, v1)
 30763  		return true
 30764  	}
 30765  	// match: (Move [s] dst src mem)
 30766  	// cond: s > 48 && s <= 64
 30767  	// result: (FSTPQ [int32(s-32)] dst (Select0 <typ.Vec128> (FLDPQ [int32(s-32)] src mem)) (Select1 <typ.Vec128> (FLDPQ [int32(s-32)] src mem)) (FSTPQ dst (Select0 <typ.Vec128> (FLDPQ src mem)) (Select1 <typ.Vec128> (FLDPQ src mem)) mem))
 30768  	for {
 30769  		s := ssa.AuxIntToInt64(v.AuxInt)
 30770  		dst := v_0
 30771  		src := v_1
 30772  		mem := v_2
 30773  		if !(s > 48 && s <= 64) {
 30774  			break
 30775  		}
 30776  		v.Reset(ssaop.OpARM64FSTPQ)
 30777  		v.AuxInt = ssa.Int32ToAuxInt(int32(s - 32))
 30778  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, typ.Vec128)
 30779  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64FLDPQ, types.NewTuple(typ.Vec128, typ.Vec128))
 30780  		v1.AuxInt = ssa.Int32ToAuxInt(int32(s - 32))
 30781  		v1.AddArg2(src, mem)
 30782  		v0.AddArg(v1)
 30783  		v2 := b.NewValue0(v.Pos, ssaop.OpSelect1, typ.Vec128)
 30784  		v2.AddArg(v1)
 30785  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64FSTPQ, types.TypeMem)
 30786  		v4 := b.NewValue0(v.Pos, ssaop.OpSelect0, typ.Vec128)
 30787  		v5 := b.NewValue0(v.Pos, ssaop.OpARM64FLDPQ, types.NewTuple(typ.Vec128, typ.Vec128))
 30788  		v5.AddArg2(src, mem)
 30789  		v4.AddArg(v5)
 30790  		v6 := b.NewValue0(v.Pos, ssaop.OpSelect1, typ.Vec128)
 30791  		v6.AddArg(v5)
 30792  		v3.AddArg4(dst, v4, v6, mem)
 30793  		v.AddArg4(dst, v0, v2, v3)
 30794  		return true
 30795  	}
 30796  	// match: (Move [s] dst src mem)
 30797  	// cond: s > 64 && s < 192 && ssa.LogLargeCopyValue(v, s)
 30798  	// result: (LoweredMove [s] dst src mem)
 30799  	for {
 30800  		s := ssa.AuxIntToInt64(v.AuxInt)
 30801  		dst := v_0
 30802  		src := v_1
 30803  		mem := v_2
 30804  		if !(s > 64 && s < 192 && ssa.LogLargeCopyValue(v, s)) {
 30805  			break
 30806  		}
 30807  		v.Reset(ssaop.OpARM64LoweredMove)
 30808  		v.AuxInt = ssa.Int64ToAuxInt(s)
 30809  		v.AddArg3(dst, src, mem)
 30810  		return true
 30811  	}
 30812  	// match: (Move [s] dst src mem)
 30813  	// cond: s >= 192 && ssa.LogLargeCopyValue(v, s)
 30814  	// result: (LoweredMoveLoop [s] dst src mem)
 30815  	for {
 30816  		s := ssa.AuxIntToInt64(v.AuxInt)
 30817  		dst := v_0
 30818  		src := v_1
 30819  		mem := v_2
 30820  		if !(s >= 192 && ssa.LogLargeCopyValue(v, s)) {
 30821  			break
 30822  		}
 30823  		v.Reset(ssaop.OpARM64LoweredMoveLoop)
 30824  		v.AuxInt = ssa.Int64ToAuxInt(s)
 30825  		v.AddArg3(dst, src, mem)
 30826  		return true
 30827  	}
 30828  	return false
 30829  }
 30830  func rewriteValue_OpMulAddFloat32s(v *ssa.Value) bool {
 30831  	v_2 := v.Args[2]
 30832  	v_1 := v.Args[1]
 30833  	v_0 := v.Args[0]
 30834  	b := v.Block
 30835  	typ := &b.Func.Config.Types
 30836  	// match: (MulAddFloat32s x y z)
 30837  	// result: (ZFMLAS x y z (Select0 <types.TypeMask> (PWHILELTS (MOVDconst [0]) (MOVDconst [8]))))
 30838  	for {
 30839  		x := v_0
 30840  		y := v_1
 30841  		z := v_2
 30842  		v.Reset(ssaop.OpARM64ZFMLAS)
 30843  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 30844  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTS, types.NewTuple(typ.Mask, types.TypeFlags))
 30845  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 30846  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 30847  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 30848  		v3.AuxInt = ssa.Int64ToAuxInt(8)
 30849  		v1.AddArg2(v2, v3)
 30850  		v0.AddArg(v1)
 30851  		v.AddArg4(x, y, z, v0)
 30852  		return true
 30853  	}
 30854  }
 30855  func rewriteValue_OpMulAddFloat32x4(v *ssa.Value) bool {
 30856  	v_2 := v.Args[2]
 30857  	v_1 := v.Args[1]
 30858  	v_0 := v.Args[0]
 30859  	// match: (MulAddFloat32x4 x y z)
 30860  	// result: (VFMLA4S z x y)
 30861  	for {
 30862  		x := v_0
 30863  		y := v_1
 30864  		z := v_2
 30865  		v.Reset(ssaop.OpARM64VFMLA4S)
 30866  		v.AddArg3(z, x, y)
 30867  		return true
 30868  	}
 30869  }
 30870  func rewriteValue_OpMulAddFloat64s(v *ssa.Value) bool {
 30871  	v_2 := v.Args[2]
 30872  	v_1 := v.Args[1]
 30873  	v_0 := v.Args[0]
 30874  	b := v.Block
 30875  	typ := &b.Func.Config.Types
 30876  	// match: (MulAddFloat64s x y z)
 30877  	// result: (ZFMLAD x y z (Select0 <types.TypeMask> (PWHILELTD (MOVDconst [0]) (MOVDconst [4]))))
 30878  	for {
 30879  		x := v_0
 30880  		y := v_1
 30881  		z := v_2
 30882  		v.Reset(ssaop.OpARM64ZFMLAD)
 30883  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 30884  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTD, types.NewTuple(typ.Mask, types.TypeFlags))
 30885  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 30886  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 30887  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 30888  		v3.AuxInt = ssa.Int64ToAuxInt(4)
 30889  		v1.AddArg2(v2, v3)
 30890  		v0.AddArg(v1)
 30891  		v.AddArg4(x, y, z, v0)
 30892  		return true
 30893  	}
 30894  }
 30895  func rewriteValue_OpMulAddFloat64x2(v *ssa.Value) bool {
 30896  	v_2 := v.Args[2]
 30897  	v_1 := v.Args[1]
 30898  	v_0 := v.Args[0]
 30899  	// match: (MulAddFloat64x2 x y z)
 30900  	// result: (VFMLA2D z x y)
 30901  	for {
 30902  		x := v_0
 30903  		y := v_1
 30904  		z := v_2
 30905  		v.Reset(ssaop.OpARM64VFMLA2D)
 30906  		v.AddArg3(z, x, y)
 30907  		return true
 30908  	}
 30909  }
 30910  func rewriteValue_OpMulAddInt16s(v *ssa.Value) bool {
 30911  	v_2 := v.Args[2]
 30912  	v_1 := v.Args[1]
 30913  	v_0 := v.Args[0]
 30914  	b := v.Block
 30915  	typ := &b.Func.Config.Types
 30916  	// match: (MulAddInt16s x y z)
 30917  	// result: (ZMLAH x y z (Select0 <types.TypeMask> (PWHILELTH (MOVDconst [0]) (MOVDconst [16]))))
 30918  	for {
 30919  		x := v_0
 30920  		y := v_1
 30921  		z := v_2
 30922  		v.Reset(ssaop.OpARM64ZMLAH)
 30923  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 30924  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTH, types.NewTuple(typ.Mask, types.TypeFlags))
 30925  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 30926  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 30927  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 30928  		v3.AuxInt = ssa.Int64ToAuxInt(16)
 30929  		v1.AddArg2(v2, v3)
 30930  		v0.AddArg(v1)
 30931  		v.AddArg4(x, y, z, v0)
 30932  		return true
 30933  	}
 30934  }
 30935  func rewriteValue_OpMulAddInt16x8(v *ssa.Value) bool {
 30936  	v_2 := v.Args[2]
 30937  	v_1 := v.Args[1]
 30938  	v_0 := v.Args[0]
 30939  	// match: (MulAddInt16x8 x y z)
 30940  	// result: (VMLA8H z x y)
 30941  	for {
 30942  		x := v_0
 30943  		y := v_1
 30944  		z := v_2
 30945  		v.Reset(ssaop.OpARM64VMLA8H)
 30946  		v.AddArg3(z, x, y)
 30947  		return true
 30948  	}
 30949  }
 30950  func rewriteValue_OpMulAddInt32s(v *ssa.Value) bool {
 30951  	v_2 := v.Args[2]
 30952  	v_1 := v.Args[1]
 30953  	v_0 := v.Args[0]
 30954  	b := v.Block
 30955  	typ := &b.Func.Config.Types
 30956  	// match: (MulAddInt32s x y z)
 30957  	// result: (ZMLAS x y z (Select0 <types.TypeMask> (PWHILELTS (MOVDconst [0]) (MOVDconst [8]))))
 30958  	for {
 30959  		x := v_0
 30960  		y := v_1
 30961  		z := v_2
 30962  		v.Reset(ssaop.OpARM64ZMLAS)
 30963  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 30964  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTS, types.NewTuple(typ.Mask, types.TypeFlags))
 30965  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 30966  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 30967  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 30968  		v3.AuxInt = ssa.Int64ToAuxInt(8)
 30969  		v1.AddArg2(v2, v3)
 30970  		v0.AddArg(v1)
 30971  		v.AddArg4(x, y, z, v0)
 30972  		return true
 30973  	}
 30974  }
 30975  func rewriteValue_OpMulAddInt32x4(v *ssa.Value) bool {
 30976  	v_2 := v.Args[2]
 30977  	v_1 := v.Args[1]
 30978  	v_0 := v.Args[0]
 30979  	// match: (MulAddInt32x4 x y z)
 30980  	// result: (VMLA4S z x y)
 30981  	for {
 30982  		x := v_0
 30983  		y := v_1
 30984  		z := v_2
 30985  		v.Reset(ssaop.OpARM64VMLA4S)
 30986  		v.AddArg3(z, x, y)
 30987  		return true
 30988  	}
 30989  }
 30990  func rewriteValue_OpMulAddInt64s(v *ssa.Value) bool {
 30991  	v_2 := v.Args[2]
 30992  	v_1 := v.Args[1]
 30993  	v_0 := v.Args[0]
 30994  	b := v.Block
 30995  	typ := &b.Func.Config.Types
 30996  	// match: (MulAddInt64s x y z)
 30997  	// result: (ZMLAD x y z (Select0 <types.TypeMask> (PWHILELTD (MOVDconst [0]) (MOVDconst [4]))))
 30998  	for {
 30999  		x := v_0
 31000  		y := v_1
 31001  		z := v_2
 31002  		v.Reset(ssaop.OpARM64ZMLAD)
 31003  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 31004  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTD, types.NewTuple(typ.Mask, types.TypeFlags))
 31005  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 31006  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 31007  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 31008  		v3.AuxInt = ssa.Int64ToAuxInt(4)
 31009  		v1.AddArg2(v2, v3)
 31010  		v0.AddArg(v1)
 31011  		v.AddArg4(x, y, z, v0)
 31012  		return true
 31013  	}
 31014  }
 31015  func rewriteValue_OpMulAddInt8s(v *ssa.Value) bool {
 31016  	v_2 := v.Args[2]
 31017  	v_1 := v.Args[1]
 31018  	v_0 := v.Args[0]
 31019  	b := v.Block
 31020  	typ := &b.Func.Config.Types
 31021  	// match: (MulAddInt8s x y z)
 31022  	// result: (ZMLAB x y z (Select0 <types.TypeMask> (PWHILELTB (MOVDconst [0]) (MOVDconst [32]))))
 31023  	for {
 31024  		x := v_0
 31025  		y := v_1
 31026  		z := v_2
 31027  		v.Reset(ssaop.OpARM64ZMLAB)
 31028  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 31029  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTB, types.NewTuple(typ.Mask, types.TypeFlags))
 31030  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 31031  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 31032  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 31033  		v3.AuxInt = ssa.Int64ToAuxInt(32)
 31034  		v1.AddArg2(v2, v3)
 31035  		v0.AddArg(v1)
 31036  		v.AddArg4(x, y, z, v0)
 31037  		return true
 31038  	}
 31039  }
 31040  func rewriteValue_OpMulAddInt8x16(v *ssa.Value) bool {
 31041  	v_2 := v.Args[2]
 31042  	v_1 := v.Args[1]
 31043  	v_0 := v.Args[0]
 31044  	// match: (MulAddInt8x16 x y z)
 31045  	// result: (VMLA16B z x y)
 31046  	for {
 31047  		x := v_0
 31048  		y := v_1
 31049  		z := v_2
 31050  		v.Reset(ssaop.OpARM64VMLA16B)
 31051  		v.AddArg3(z, x, y)
 31052  		return true
 31053  	}
 31054  }
 31055  func rewriteValue_OpMulAddUint16s(v *ssa.Value) bool {
 31056  	v_2 := v.Args[2]
 31057  	v_1 := v.Args[1]
 31058  	v_0 := v.Args[0]
 31059  	b := v.Block
 31060  	typ := &b.Func.Config.Types
 31061  	// match: (MulAddUint16s x y z)
 31062  	// result: (ZMLAH x y z (Select0 <types.TypeMask> (PWHILELTH (MOVDconst [0]) (MOVDconst [16]))))
 31063  	for {
 31064  		x := v_0
 31065  		y := v_1
 31066  		z := v_2
 31067  		v.Reset(ssaop.OpARM64ZMLAH)
 31068  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 31069  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTH, types.NewTuple(typ.Mask, types.TypeFlags))
 31070  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 31071  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 31072  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 31073  		v3.AuxInt = ssa.Int64ToAuxInt(16)
 31074  		v1.AddArg2(v2, v3)
 31075  		v0.AddArg(v1)
 31076  		v.AddArg4(x, y, z, v0)
 31077  		return true
 31078  	}
 31079  }
 31080  func rewriteValue_OpMulAddUint16x8(v *ssa.Value) bool {
 31081  	v_2 := v.Args[2]
 31082  	v_1 := v.Args[1]
 31083  	v_0 := v.Args[0]
 31084  	// match: (MulAddUint16x8 x y z)
 31085  	// result: (VMLA8H z x y)
 31086  	for {
 31087  		x := v_0
 31088  		y := v_1
 31089  		z := v_2
 31090  		v.Reset(ssaop.OpARM64VMLA8H)
 31091  		v.AddArg3(z, x, y)
 31092  		return true
 31093  	}
 31094  }
 31095  func rewriteValue_OpMulAddUint32s(v *ssa.Value) bool {
 31096  	v_2 := v.Args[2]
 31097  	v_1 := v.Args[1]
 31098  	v_0 := v.Args[0]
 31099  	b := v.Block
 31100  	typ := &b.Func.Config.Types
 31101  	// match: (MulAddUint32s x y z)
 31102  	// result: (ZMLAS x y z (Select0 <types.TypeMask> (PWHILELTS (MOVDconst [0]) (MOVDconst [8]))))
 31103  	for {
 31104  		x := v_0
 31105  		y := v_1
 31106  		z := v_2
 31107  		v.Reset(ssaop.OpARM64ZMLAS)
 31108  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 31109  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTS, types.NewTuple(typ.Mask, types.TypeFlags))
 31110  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 31111  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 31112  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 31113  		v3.AuxInt = ssa.Int64ToAuxInt(8)
 31114  		v1.AddArg2(v2, v3)
 31115  		v0.AddArg(v1)
 31116  		v.AddArg4(x, y, z, v0)
 31117  		return true
 31118  	}
 31119  }
 31120  func rewriteValue_OpMulAddUint32x4(v *ssa.Value) bool {
 31121  	v_2 := v.Args[2]
 31122  	v_1 := v.Args[1]
 31123  	v_0 := v.Args[0]
 31124  	// match: (MulAddUint32x4 x y z)
 31125  	// result: (VMLA4S z x y)
 31126  	for {
 31127  		x := v_0
 31128  		y := v_1
 31129  		z := v_2
 31130  		v.Reset(ssaop.OpARM64VMLA4S)
 31131  		v.AddArg3(z, x, y)
 31132  		return true
 31133  	}
 31134  }
 31135  func rewriteValue_OpMulAddUint64s(v *ssa.Value) bool {
 31136  	v_2 := v.Args[2]
 31137  	v_1 := v.Args[1]
 31138  	v_0 := v.Args[0]
 31139  	b := v.Block
 31140  	typ := &b.Func.Config.Types
 31141  	// match: (MulAddUint64s x y z)
 31142  	// result: (ZMLAD x y z (Select0 <types.TypeMask> (PWHILELTD (MOVDconst [0]) (MOVDconst [4]))))
 31143  	for {
 31144  		x := v_0
 31145  		y := v_1
 31146  		z := v_2
 31147  		v.Reset(ssaop.OpARM64ZMLAD)
 31148  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 31149  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTD, types.NewTuple(typ.Mask, types.TypeFlags))
 31150  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 31151  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 31152  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 31153  		v3.AuxInt = ssa.Int64ToAuxInt(4)
 31154  		v1.AddArg2(v2, v3)
 31155  		v0.AddArg(v1)
 31156  		v.AddArg4(x, y, z, v0)
 31157  		return true
 31158  	}
 31159  }
 31160  func rewriteValue_OpMulAddUint8s(v *ssa.Value) bool {
 31161  	v_2 := v.Args[2]
 31162  	v_1 := v.Args[1]
 31163  	v_0 := v.Args[0]
 31164  	b := v.Block
 31165  	typ := &b.Func.Config.Types
 31166  	// match: (MulAddUint8s x y z)
 31167  	// result: (ZMLAB x y z (Select0 <types.TypeMask> (PWHILELTB (MOVDconst [0]) (MOVDconst [32]))))
 31168  	for {
 31169  		x := v_0
 31170  		y := v_1
 31171  		z := v_2
 31172  		v.Reset(ssaop.OpARM64ZMLAB)
 31173  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 31174  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTB, types.NewTuple(typ.Mask, types.TypeFlags))
 31175  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 31176  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 31177  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 31178  		v3.AuxInt = ssa.Int64ToAuxInt(32)
 31179  		v1.AddArg2(v2, v3)
 31180  		v0.AddArg(v1)
 31181  		v.AddArg4(x, y, z, v0)
 31182  		return true
 31183  	}
 31184  }
 31185  func rewriteValue_OpMulAddUint8x16(v *ssa.Value) bool {
 31186  	v_2 := v.Args[2]
 31187  	v_1 := v.Args[1]
 31188  	v_0 := v.Args[0]
 31189  	// match: (MulAddUint8x16 x y z)
 31190  	// result: (VMLA16B z x y)
 31191  	for {
 31192  		x := v_0
 31193  		y := v_1
 31194  		z := v_2
 31195  		v.Reset(ssaop.OpARM64VMLA16B)
 31196  		v.AddArg3(z, x, y)
 31197  		return true
 31198  	}
 31199  }
 31200  func rewriteValue_OpMulHighInt16s(v *ssa.Value) bool {
 31201  	v_1 := v.Args[1]
 31202  	v_0 := v.Args[0]
 31203  	b := v.Block
 31204  	typ := &b.Func.Config.Types
 31205  	// match: (MulHighInt16s x y)
 31206  	// cond: v.Block.CPUfeatures.HasFeature(ssa.CPUsve2)
 31207  	// result: (ZSMULHH x y)
 31208  	for {
 31209  		x := v_0
 31210  		y := v_1
 31211  		if !(v.Block.CPUfeatures.HasFeature(ssa.CPUsve2)) {
 31212  			break
 31213  		}
 31214  		v.Reset(ssaop.OpARM64ZSMULHH)
 31215  		v.AddArg2(x, y)
 31216  		return true
 31217  	}
 31218  	// match: (MulHighInt16s x y)
 31219  	// result: (ZSMULHMergingH x y (Select0 <types.TypeMask> (PWHILELTH (MOVDconst [0]) (MOVDconst [16]))))
 31220  	for {
 31221  		x := v_0
 31222  		y := v_1
 31223  		v.Reset(ssaop.OpARM64ZSMULHMergingH)
 31224  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 31225  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTH, types.NewTuple(typ.Mask, types.TypeFlags))
 31226  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 31227  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 31228  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 31229  		v3.AuxInt = ssa.Int64ToAuxInt(16)
 31230  		v1.AddArg2(v2, v3)
 31231  		v0.AddArg(v1)
 31232  		v.AddArg3(x, y, v0)
 31233  		return true
 31234  	}
 31235  }
 31236  func rewriteValue_OpMulHighInt32s(v *ssa.Value) bool {
 31237  	v_1 := v.Args[1]
 31238  	v_0 := v.Args[0]
 31239  	b := v.Block
 31240  	typ := &b.Func.Config.Types
 31241  	// match: (MulHighInt32s x y)
 31242  	// cond: v.Block.CPUfeatures.HasFeature(ssa.CPUsve2)
 31243  	// result: (ZSMULHS x y)
 31244  	for {
 31245  		x := v_0
 31246  		y := v_1
 31247  		if !(v.Block.CPUfeatures.HasFeature(ssa.CPUsve2)) {
 31248  			break
 31249  		}
 31250  		v.Reset(ssaop.OpARM64ZSMULHS)
 31251  		v.AddArg2(x, y)
 31252  		return true
 31253  	}
 31254  	// match: (MulHighInt32s x y)
 31255  	// result: (ZSMULHMergingS x y (Select0 <types.TypeMask> (PWHILELTS (MOVDconst [0]) (MOVDconst [8]))))
 31256  	for {
 31257  		x := v_0
 31258  		y := v_1
 31259  		v.Reset(ssaop.OpARM64ZSMULHMergingS)
 31260  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 31261  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTS, types.NewTuple(typ.Mask, types.TypeFlags))
 31262  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 31263  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 31264  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 31265  		v3.AuxInt = ssa.Int64ToAuxInt(8)
 31266  		v1.AddArg2(v2, v3)
 31267  		v0.AddArg(v1)
 31268  		v.AddArg3(x, y, v0)
 31269  		return true
 31270  	}
 31271  }
 31272  func rewriteValue_OpMulHighInt64s(v *ssa.Value) bool {
 31273  	v_1 := v.Args[1]
 31274  	v_0 := v.Args[0]
 31275  	b := v.Block
 31276  	typ := &b.Func.Config.Types
 31277  	// match: (MulHighInt64s x y)
 31278  	// cond: v.Block.CPUfeatures.HasFeature(ssa.CPUsve2)
 31279  	// result: (ZSMULHD x y)
 31280  	for {
 31281  		x := v_0
 31282  		y := v_1
 31283  		if !(v.Block.CPUfeatures.HasFeature(ssa.CPUsve2)) {
 31284  			break
 31285  		}
 31286  		v.Reset(ssaop.OpARM64ZSMULHD)
 31287  		v.AddArg2(x, y)
 31288  		return true
 31289  	}
 31290  	// match: (MulHighInt64s x y)
 31291  	// result: (ZSMULHMergingD x y (Select0 <types.TypeMask> (PWHILELTD (MOVDconst [0]) (MOVDconst [4]))))
 31292  	for {
 31293  		x := v_0
 31294  		y := v_1
 31295  		v.Reset(ssaop.OpARM64ZSMULHMergingD)
 31296  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 31297  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTD, types.NewTuple(typ.Mask, types.TypeFlags))
 31298  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 31299  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 31300  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 31301  		v3.AuxInt = ssa.Int64ToAuxInt(4)
 31302  		v1.AddArg2(v2, v3)
 31303  		v0.AddArg(v1)
 31304  		v.AddArg3(x, y, v0)
 31305  		return true
 31306  	}
 31307  }
 31308  func rewriteValue_OpMulHighInt8s(v *ssa.Value) bool {
 31309  	v_1 := v.Args[1]
 31310  	v_0 := v.Args[0]
 31311  	b := v.Block
 31312  	typ := &b.Func.Config.Types
 31313  	// match: (MulHighInt8s x y)
 31314  	// cond: v.Block.CPUfeatures.HasFeature(ssa.CPUsve2)
 31315  	// result: (ZSMULHB x y)
 31316  	for {
 31317  		x := v_0
 31318  		y := v_1
 31319  		if !(v.Block.CPUfeatures.HasFeature(ssa.CPUsve2)) {
 31320  			break
 31321  		}
 31322  		v.Reset(ssaop.OpARM64ZSMULHB)
 31323  		v.AddArg2(x, y)
 31324  		return true
 31325  	}
 31326  	// match: (MulHighInt8s x y)
 31327  	// result: (ZSMULHMergingB x y (Select0 <types.TypeMask> (PWHILELTB (MOVDconst [0]) (MOVDconst [32]))))
 31328  	for {
 31329  		x := v_0
 31330  		y := v_1
 31331  		v.Reset(ssaop.OpARM64ZSMULHMergingB)
 31332  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 31333  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTB, types.NewTuple(typ.Mask, types.TypeFlags))
 31334  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 31335  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 31336  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 31337  		v3.AuxInt = ssa.Int64ToAuxInt(32)
 31338  		v1.AddArg2(v2, v3)
 31339  		v0.AddArg(v1)
 31340  		v.AddArg3(x, y, v0)
 31341  		return true
 31342  	}
 31343  }
 31344  func rewriteValue_OpMulHighUint16s(v *ssa.Value) bool {
 31345  	v_1 := v.Args[1]
 31346  	v_0 := v.Args[0]
 31347  	b := v.Block
 31348  	typ := &b.Func.Config.Types
 31349  	// match: (MulHighUint16s x y)
 31350  	// cond: v.Block.CPUfeatures.HasFeature(ssa.CPUsve2)
 31351  	// result: (ZUMULHH x y)
 31352  	for {
 31353  		x := v_0
 31354  		y := v_1
 31355  		if !(v.Block.CPUfeatures.HasFeature(ssa.CPUsve2)) {
 31356  			break
 31357  		}
 31358  		v.Reset(ssaop.OpARM64ZUMULHH)
 31359  		v.AddArg2(x, y)
 31360  		return true
 31361  	}
 31362  	// match: (MulHighUint16s x y)
 31363  	// result: (ZUMULHMergingH x y (Select0 <types.TypeMask> (PWHILELTH (MOVDconst [0]) (MOVDconst [16]))))
 31364  	for {
 31365  		x := v_0
 31366  		y := v_1
 31367  		v.Reset(ssaop.OpARM64ZUMULHMergingH)
 31368  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 31369  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTH, types.NewTuple(typ.Mask, types.TypeFlags))
 31370  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 31371  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 31372  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 31373  		v3.AuxInt = ssa.Int64ToAuxInt(16)
 31374  		v1.AddArg2(v2, v3)
 31375  		v0.AddArg(v1)
 31376  		v.AddArg3(x, y, v0)
 31377  		return true
 31378  	}
 31379  }
 31380  func rewriteValue_OpMulHighUint32s(v *ssa.Value) bool {
 31381  	v_1 := v.Args[1]
 31382  	v_0 := v.Args[0]
 31383  	b := v.Block
 31384  	typ := &b.Func.Config.Types
 31385  	// match: (MulHighUint32s x y)
 31386  	// cond: v.Block.CPUfeatures.HasFeature(ssa.CPUsve2)
 31387  	// result: (ZUMULHS x y)
 31388  	for {
 31389  		x := v_0
 31390  		y := v_1
 31391  		if !(v.Block.CPUfeatures.HasFeature(ssa.CPUsve2)) {
 31392  			break
 31393  		}
 31394  		v.Reset(ssaop.OpARM64ZUMULHS)
 31395  		v.AddArg2(x, y)
 31396  		return true
 31397  	}
 31398  	// match: (MulHighUint32s x y)
 31399  	// result: (ZUMULHMergingS x y (Select0 <types.TypeMask> (PWHILELTS (MOVDconst [0]) (MOVDconst [8]))))
 31400  	for {
 31401  		x := v_0
 31402  		y := v_1
 31403  		v.Reset(ssaop.OpARM64ZUMULHMergingS)
 31404  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 31405  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTS, types.NewTuple(typ.Mask, types.TypeFlags))
 31406  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 31407  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 31408  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 31409  		v3.AuxInt = ssa.Int64ToAuxInt(8)
 31410  		v1.AddArg2(v2, v3)
 31411  		v0.AddArg(v1)
 31412  		v.AddArg3(x, y, v0)
 31413  		return true
 31414  	}
 31415  }
 31416  func rewriteValue_OpMulHighUint64s(v *ssa.Value) bool {
 31417  	v_1 := v.Args[1]
 31418  	v_0 := v.Args[0]
 31419  	b := v.Block
 31420  	typ := &b.Func.Config.Types
 31421  	// match: (MulHighUint64s x y)
 31422  	// cond: v.Block.CPUfeatures.HasFeature(ssa.CPUsve2)
 31423  	// result: (ZUMULHD x y)
 31424  	for {
 31425  		x := v_0
 31426  		y := v_1
 31427  		if !(v.Block.CPUfeatures.HasFeature(ssa.CPUsve2)) {
 31428  			break
 31429  		}
 31430  		v.Reset(ssaop.OpARM64ZUMULHD)
 31431  		v.AddArg2(x, y)
 31432  		return true
 31433  	}
 31434  	// match: (MulHighUint64s x y)
 31435  	// result: (ZUMULHMergingD x y (Select0 <types.TypeMask> (PWHILELTD (MOVDconst [0]) (MOVDconst [4]))))
 31436  	for {
 31437  		x := v_0
 31438  		y := v_1
 31439  		v.Reset(ssaop.OpARM64ZUMULHMergingD)
 31440  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 31441  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTD, types.NewTuple(typ.Mask, types.TypeFlags))
 31442  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 31443  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 31444  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 31445  		v3.AuxInt = ssa.Int64ToAuxInt(4)
 31446  		v1.AddArg2(v2, v3)
 31447  		v0.AddArg(v1)
 31448  		v.AddArg3(x, y, v0)
 31449  		return true
 31450  	}
 31451  }
 31452  func rewriteValue_OpMulHighUint8s(v *ssa.Value) bool {
 31453  	v_1 := v.Args[1]
 31454  	v_0 := v.Args[0]
 31455  	b := v.Block
 31456  	typ := &b.Func.Config.Types
 31457  	// match: (MulHighUint8s x y)
 31458  	// cond: v.Block.CPUfeatures.HasFeature(ssa.CPUsve2)
 31459  	// result: (ZUMULHB x y)
 31460  	for {
 31461  		x := v_0
 31462  		y := v_1
 31463  		if !(v.Block.CPUfeatures.HasFeature(ssa.CPUsve2)) {
 31464  			break
 31465  		}
 31466  		v.Reset(ssaop.OpARM64ZUMULHB)
 31467  		v.AddArg2(x, y)
 31468  		return true
 31469  	}
 31470  	// match: (MulHighUint8s x y)
 31471  	// result: (ZUMULHMergingB x y (Select0 <types.TypeMask> (PWHILELTB (MOVDconst [0]) (MOVDconst [32]))))
 31472  	for {
 31473  		x := v_0
 31474  		y := v_1
 31475  		v.Reset(ssaop.OpARM64ZUMULHMergingB)
 31476  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 31477  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTB, types.NewTuple(typ.Mask, types.TypeFlags))
 31478  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 31479  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 31480  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 31481  		v3.AuxInt = ssa.Int64ToAuxInt(32)
 31482  		v1.AddArg2(v2, v3)
 31483  		v0.AddArg(v1)
 31484  		v.AddArg3(x, y, v0)
 31485  		return true
 31486  	}
 31487  }
 31488  func rewriteValue_OpMulInt16s(v *ssa.Value) bool {
 31489  	v_1 := v.Args[1]
 31490  	v_0 := v.Args[0]
 31491  	b := v.Block
 31492  	typ := &b.Func.Config.Types
 31493  	// match: (MulInt16s x y)
 31494  	// cond: v.Block.CPUfeatures.HasFeature(ssa.CPUsve2)
 31495  	// result: (ZMULH x y)
 31496  	for {
 31497  		x := v_0
 31498  		y := v_1
 31499  		if !(v.Block.CPUfeatures.HasFeature(ssa.CPUsve2)) {
 31500  			break
 31501  		}
 31502  		v.Reset(ssaop.OpARM64ZMULH)
 31503  		v.AddArg2(x, y)
 31504  		return true
 31505  	}
 31506  	// match: (MulInt16s x y)
 31507  	// result: (ZMULMergingH x y (Select0 <types.TypeMask> (PWHILELTH (MOVDconst [0]) (MOVDconst [16]))))
 31508  	for {
 31509  		x := v_0
 31510  		y := v_1
 31511  		v.Reset(ssaop.OpARM64ZMULMergingH)
 31512  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 31513  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTH, types.NewTuple(typ.Mask, types.TypeFlags))
 31514  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 31515  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 31516  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 31517  		v3.AuxInt = ssa.Int64ToAuxInt(16)
 31518  		v1.AddArg2(v2, v3)
 31519  		v0.AddArg(v1)
 31520  		v.AddArg3(x, y, v0)
 31521  		return true
 31522  	}
 31523  }
 31524  func rewriteValue_OpMulInt32s(v *ssa.Value) bool {
 31525  	v_1 := v.Args[1]
 31526  	v_0 := v.Args[0]
 31527  	b := v.Block
 31528  	typ := &b.Func.Config.Types
 31529  	// match: (MulInt32s x y)
 31530  	// cond: v.Block.CPUfeatures.HasFeature(ssa.CPUsve2)
 31531  	// result: (ZMULS x y)
 31532  	for {
 31533  		x := v_0
 31534  		y := v_1
 31535  		if !(v.Block.CPUfeatures.HasFeature(ssa.CPUsve2)) {
 31536  			break
 31537  		}
 31538  		v.Reset(ssaop.OpARM64ZMULS)
 31539  		v.AddArg2(x, y)
 31540  		return true
 31541  	}
 31542  	// match: (MulInt32s x y)
 31543  	// result: (ZMULMergingS x y (Select0 <types.TypeMask> (PWHILELTS (MOVDconst [0]) (MOVDconst [8]))))
 31544  	for {
 31545  		x := v_0
 31546  		y := v_1
 31547  		v.Reset(ssaop.OpARM64ZMULMergingS)
 31548  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 31549  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTS, types.NewTuple(typ.Mask, types.TypeFlags))
 31550  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 31551  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 31552  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 31553  		v3.AuxInt = ssa.Int64ToAuxInt(8)
 31554  		v1.AddArg2(v2, v3)
 31555  		v0.AddArg(v1)
 31556  		v.AddArg3(x, y, v0)
 31557  		return true
 31558  	}
 31559  }
 31560  func rewriteValue_OpMulInt64s(v *ssa.Value) bool {
 31561  	v_1 := v.Args[1]
 31562  	v_0 := v.Args[0]
 31563  	b := v.Block
 31564  	typ := &b.Func.Config.Types
 31565  	// match: (MulInt64s x y)
 31566  	// cond: v.Block.CPUfeatures.HasFeature(ssa.CPUsve2)
 31567  	// result: (ZMULD x y)
 31568  	for {
 31569  		x := v_0
 31570  		y := v_1
 31571  		if !(v.Block.CPUfeatures.HasFeature(ssa.CPUsve2)) {
 31572  			break
 31573  		}
 31574  		v.Reset(ssaop.OpARM64ZMULD)
 31575  		v.AddArg2(x, y)
 31576  		return true
 31577  	}
 31578  	// match: (MulInt64s x y)
 31579  	// result: (ZMULMergingD x y (Select0 <types.TypeMask> (PWHILELTD (MOVDconst [0]) (MOVDconst [4]))))
 31580  	for {
 31581  		x := v_0
 31582  		y := v_1
 31583  		v.Reset(ssaop.OpARM64ZMULMergingD)
 31584  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 31585  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTD, types.NewTuple(typ.Mask, types.TypeFlags))
 31586  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 31587  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 31588  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 31589  		v3.AuxInt = ssa.Int64ToAuxInt(4)
 31590  		v1.AddArg2(v2, v3)
 31591  		v0.AddArg(v1)
 31592  		v.AddArg3(x, y, v0)
 31593  		return true
 31594  	}
 31595  }
 31596  func rewriteValue_OpMulInt8s(v *ssa.Value) bool {
 31597  	v_1 := v.Args[1]
 31598  	v_0 := v.Args[0]
 31599  	b := v.Block
 31600  	typ := &b.Func.Config.Types
 31601  	// match: (MulInt8s x y)
 31602  	// cond: v.Block.CPUfeatures.HasFeature(ssa.CPUsve2)
 31603  	// result: (ZMULB x y)
 31604  	for {
 31605  		x := v_0
 31606  		y := v_1
 31607  		if !(v.Block.CPUfeatures.HasFeature(ssa.CPUsve2)) {
 31608  			break
 31609  		}
 31610  		v.Reset(ssaop.OpARM64ZMULB)
 31611  		v.AddArg2(x, y)
 31612  		return true
 31613  	}
 31614  	// match: (MulInt8s x y)
 31615  	// result: (ZMULMergingB x y (Select0 <types.TypeMask> (PWHILELTB (MOVDconst [0]) (MOVDconst [32]))))
 31616  	for {
 31617  		x := v_0
 31618  		y := v_1
 31619  		v.Reset(ssaop.OpARM64ZMULMergingB)
 31620  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 31621  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTB, types.NewTuple(typ.Mask, types.TypeFlags))
 31622  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 31623  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 31624  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 31625  		v3.AuxInt = ssa.Int64ToAuxInt(32)
 31626  		v1.AddArg2(v2, v3)
 31627  		v0.AddArg(v1)
 31628  		v.AddArg3(x, y, v0)
 31629  		return true
 31630  	}
 31631  }
 31632  func rewriteValue_OpMulUint16s(v *ssa.Value) bool {
 31633  	v_1 := v.Args[1]
 31634  	v_0 := v.Args[0]
 31635  	b := v.Block
 31636  	typ := &b.Func.Config.Types
 31637  	// match: (MulUint16s x y)
 31638  	// cond: v.Block.CPUfeatures.HasFeature(ssa.CPUsve2)
 31639  	// result: (ZMULH x y)
 31640  	for {
 31641  		x := v_0
 31642  		y := v_1
 31643  		if !(v.Block.CPUfeatures.HasFeature(ssa.CPUsve2)) {
 31644  			break
 31645  		}
 31646  		v.Reset(ssaop.OpARM64ZMULH)
 31647  		v.AddArg2(x, y)
 31648  		return true
 31649  	}
 31650  	// match: (MulUint16s x y)
 31651  	// result: (ZMULMergingH x y (Select0 <types.TypeMask> (PWHILELTH (MOVDconst [0]) (MOVDconst [16]))))
 31652  	for {
 31653  		x := v_0
 31654  		y := v_1
 31655  		v.Reset(ssaop.OpARM64ZMULMergingH)
 31656  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 31657  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTH, types.NewTuple(typ.Mask, types.TypeFlags))
 31658  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 31659  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 31660  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 31661  		v3.AuxInt = ssa.Int64ToAuxInt(16)
 31662  		v1.AddArg2(v2, v3)
 31663  		v0.AddArg(v1)
 31664  		v.AddArg3(x, y, v0)
 31665  		return true
 31666  	}
 31667  }
 31668  func rewriteValue_OpMulUint32s(v *ssa.Value) bool {
 31669  	v_1 := v.Args[1]
 31670  	v_0 := v.Args[0]
 31671  	b := v.Block
 31672  	typ := &b.Func.Config.Types
 31673  	// match: (MulUint32s x y)
 31674  	// cond: v.Block.CPUfeatures.HasFeature(ssa.CPUsve2)
 31675  	// result: (ZMULS x y)
 31676  	for {
 31677  		x := v_0
 31678  		y := v_1
 31679  		if !(v.Block.CPUfeatures.HasFeature(ssa.CPUsve2)) {
 31680  			break
 31681  		}
 31682  		v.Reset(ssaop.OpARM64ZMULS)
 31683  		v.AddArg2(x, y)
 31684  		return true
 31685  	}
 31686  	// match: (MulUint32s x y)
 31687  	// result: (ZMULMergingS x y (Select0 <types.TypeMask> (PWHILELTS (MOVDconst [0]) (MOVDconst [8]))))
 31688  	for {
 31689  		x := v_0
 31690  		y := v_1
 31691  		v.Reset(ssaop.OpARM64ZMULMergingS)
 31692  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 31693  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTS, types.NewTuple(typ.Mask, types.TypeFlags))
 31694  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 31695  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 31696  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 31697  		v3.AuxInt = ssa.Int64ToAuxInt(8)
 31698  		v1.AddArg2(v2, v3)
 31699  		v0.AddArg(v1)
 31700  		v.AddArg3(x, y, v0)
 31701  		return true
 31702  	}
 31703  }
 31704  func rewriteValue_OpMulUint64s(v *ssa.Value) bool {
 31705  	v_1 := v.Args[1]
 31706  	v_0 := v.Args[0]
 31707  	b := v.Block
 31708  	typ := &b.Func.Config.Types
 31709  	// match: (MulUint64s x y)
 31710  	// cond: v.Block.CPUfeatures.HasFeature(ssa.CPUsve2)
 31711  	// result: (ZMULD x y)
 31712  	for {
 31713  		x := v_0
 31714  		y := v_1
 31715  		if !(v.Block.CPUfeatures.HasFeature(ssa.CPUsve2)) {
 31716  			break
 31717  		}
 31718  		v.Reset(ssaop.OpARM64ZMULD)
 31719  		v.AddArg2(x, y)
 31720  		return true
 31721  	}
 31722  	// match: (MulUint64s x y)
 31723  	// result: (ZMULMergingD x y (Select0 <types.TypeMask> (PWHILELTD (MOVDconst [0]) (MOVDconst [4]))))
 31724  	for {
 31725  		x := v_0
 31726  		y := v_1
 31727  		v.Reset(ssaop.OpARM64ZMULMergingD)
 31728  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 31729  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTD, types.NewTuple(typ.Mask, types.TypeFlags))
 31730  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 31731  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 31732  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 31733  		v3.AuxInt = ssa.Int64ToAuxInt(4)
 31734  		v1.AddArg2(v2, v3)
 31735  		v0.AddArg(v1)
 31736  		v.AddArg3(x, y, v0)
 31737  		return true
 31738  	}
 31739  }
 31740  func rewriteValue_OpMulUint8s(v *ssa.Value) bool {
 31741  	v_1 := v.Args[1]
 31742  	v_0 := v.Args[0]
 31743  	b := v.Block
 31744  	typ := &b.Func.Config.Types
 31745  	// match: (MulUint8s x y)
 31746  	// cond: v.Block.CPUfeatures.HasFeature(ssa.CPUsve2)
 31747  	// result: (ZMULB x y)
 31748  	for {
 31749  		x := v_0
 31750  		y := v_1
 31751  		if !(v.Block.CPUfeatures.HasFeature(ssa.CPUsve2)) {
 31752  			break
 31753  		}
 31754  		v.Reset(ssaop.OpARM64ZMULB)
 31755  		v.AddArg2(x, y)
 31756  		return true
 31757  	}
 31758  	// match: (MulUint8s x y)
 31759  	// result: (ZMULMergingB x y (Select0 <types.TypeMask> (PWHILELTB (MOVDconst [0]) (MOVDconst [32]))))
 31760  	for {
 31761  		x := v_0
 31762  		y := v_1
 31763  		v.Reset(ssaop.OpARM64ZMULMergingB)
 31764  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 31765  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTB, types.NewTuple(typ.Mask, types.TypeFlags))
 31766  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 31767  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 31768  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 31769  		v3.AuxInt = ssa.Int64ToAuxInt(32)
 31770  		v1.AddArg2(v2, v3)
 31771  		v0.AddArg(v1)
 31772  		v.AddArg3(x, y, v0)
 31773  		return true
 31774  	}
 31775  }
 31776  func rewriteValue_OpNegFloat32s(v *ssa.Value) bool {
 31777  	v_0 := v.Args[0]
 31778  	b := v.Block
 31779  	typ := &b.Func.Config.Types
 31780  	// match: (NegFloat32s x)
 31781  	// result: (ZFNEGS x (Select0 <types.TypeMask> (PWHILELTS (MOVDconst [0]) (MOVDconst [8]))))
 31782  	for {
 31783  		x := v_0
 31784  		v.Reset(ssaop.OpARM64ZFNEGS)
 31785  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 31786  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTS, types.NewTuple(typ.Mask, types.TypeFlags))
 31787  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 31788  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 31789  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 31790  		v3.AuxInt = ssa.Int64ToAuxInt(8)
 31791  		v1.AddArg2(v2, v3)
 31792  		v0.AddArg(v1)
 31793  		v.AddArg2(x, v0)
 31794  		return true
 31795  	}
 31796  }
 31797  func rewriteValue_OpNegFloat64s(v *ssa.Value) bool {
 31798  	v_0 := v.Args[0]
 31799  	b := v.Block
 31800  	typ := &b.Func.Config.Types
 31801  	// match: (NegFloat64s x)
 31802  	// result: (ZFNEGD x (Select0 <types.TypeMask> (PWHILELTD (MOVDconst [0]) (MOVDconst [4]))))
 31803  	for {
 31804  		x := v_0
 31805  		v.Reset(ssaop.OpARM64ZFNEGD)
 31806  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 31807  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTD, types.NewTuple(typ.Mask, types.TypeFlags))
 31808  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 31809  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 31810  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 31811  		v3.AuxInt = ssa.Int64ToAuxInt(4)
 31812  		v1.AddArg2(v2, v3)
 31813  		v0.AddArg(v1)
 31814  		v.AddArg2(x, v0)
 31815  		return true
 31816  	}
 31817  }
 31818  func rewriteValue_OpNegInt16s(v *ssa.Value) bool {
 31819  	v_0 := v.Args[0]
 31820  	b := v.Block
 31821  	typ := &b.Func.Config.Types
 31822  	// match: (NegInt16s x)
 31823  	// result: (ZNEGH x (Select0 <types.TypeMask> (PWHILELTH (MOVDconst [0]) (MOVDconst [16]))))
 31824  	for {
 31825  		x := v_0
 31826  		v.Reset(ssaop.OpARM64ZNEGH)
 31827  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 31828  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTH, types.NewTuple(typ.Mask, types.TypeFlags))
 31829  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 31830  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 31831  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 31832  		v3.AuxInt = ssa.Int64ToAuxInt(16)
 31833  		v1.AddArg2(v2, v3)
 31834  		v0.AddArg(v1)
 31835  		v.AddArg2(x, v0)
 31836  		return true
 31837  	}
 31838  }
 31839  func rewriteValue_OpNegInt32s(v *ssa.Value) bool {
 31840  	v_0 := v.Args[0]
 31841  	b := v.Block
 31842  	typ := &b.Func.Config.Types
 31843  	// match: (NegInt32s x)
 31844  	// result: (ZNEGS x (Select0 <types.TypeMask> (PWHILELTS (MOVDconst [0]) (MOVDconst [8]))))
 31845  	for {
 31846  		x := v_0
 31847  		v.Reset(ssaop.OpARM64ZNEGS)
 31848  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 31849  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTS, types.NewTuple(typ.Mask, types.TypeFlags))
 31850  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 31851  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 31852  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 31853  		v3.AuxInt = ssa.Int64ToAuxInt(8)
 31854  		v1.AddArg2(v2, v3)
 31855  		v0.AddArg(v1)
 31856  		v.AddArg2(x, v0)
 31857  		return true
 31858  	}
 31859  }
 31860  func rewriteValue_OpNegInt64s(v *ssa.Value) bool {
 31861  	v_0 := v.Args[0]
 31862  	b := v.Block
 31863  	typ := &b.Func.Config.Types
 31864  	// match: (NegInt64s x)
 31865  	// result: (ZNEGD x (Select0 <types.TypeMask> (PWHILELTD (MOVDconst [0]) (MOVDconst [4]))))
 31866  	for {
 31867  		x := v_0
 31868  		v.Reset(ssaop.OpARM64ZNEGD)
 31869  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 31870  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTD, types.NewTuple(typ.Mask, types.TypeFlags))
 31871  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 31872  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 31873  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 31874  		v3.AuxInt = ssa.Int64ToAuxInt(4)
 31875  		v1.AddArg2(v2, v3)
 31876  		v0.AddArg(v1)
 31877  		v.AddArg2(x, v0)
 31878  		return true
 31879  	}
 31880  }
 31881  func rewriteValue_OpNegInt8s(v *ssa.Value) bool {
 31882  	v_0 := v.Args[0]
 31883  	b := v.Block
 31884  	typ := &b.Func.Config.Types
 31885  	// match: (NegInt8s x)
 31886  	// result: (ZNEGB x (Select0 <types.TypeMask> (PWHILELTB (MOVDconst [0]) (MOVDconst [32]))))
 31887  	for {
 31888  		x := v_0
 31889  		v.Reset(ssaop.OpARM64ZNEGB)
 31890  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 31891  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTB, types.NewTuple(typ.Mask, types.TypeFlags))
 31892  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 31893  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 31894  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 31895  		v3.AuxInt = ssa.Int64ToAuxInt(32)
 31896  		v1.AddArg2(v2, v3)
 31897  		v0.AddArg(v1)
 31898  		v.AddArg2(x, v0)
 31899  		return true
 31900  	}
 31901  }
 31902  func rewriteValue_OpNeq16(v *ssa.Value) bool {
 31903  	v_1 := v.Args[1]
 31904  	v_0 := v.Args[0]
 31905  	b := v.Block
 31906  	typ := &b.Func.Config.Types
 31907  	// match: (Neq16 x y)
 31908  	// result: (NotEqual (CMPW (ZeroExt16to32 x) (ZeroExt16to32 y)))
 31909  	for {
 31910  		x := v_0
 31911  		y := v_1
 31912  		v.Reset(ssaop.OpARM64NotEqual)
 31913  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMPW, types.TypeFlags)
 31914  		v1 := b.NewValue0(v.Pos, ssaop.OpZeroExt16to32, typ.UInt32)
 31915  		v1.AddArg(x)
 31916  		v2 := b.NewValue0(v.Pos, ssaop.OpZeroExt16to32, typ.UInt32)
 31917  		v2.AddArg(y)
 31918  		v0.AddArg2(v1, v2)
 31919  		v.AddArg(v0)
 31920  		return true
 31921  	}
 31922  }
 31923  func rewriteValue_OpNeq32(v *ssa.Value) bool {
 31924  	v_1 := v.Args[1]
 31925  	v_0 := v.Args[0]
 31926  	b := v.Block
 31927  	// match: (Neq32 x y)
 31928  	// result: (NotEqual (CMPW x y))
 31929  	for {
 31930  		x := v_0
 31931  		y := v_1
 31932  		v.Reset(ssaop.OpARM64NotEqual)
 31933  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMPW, types.TypeFlags)
 31934  		v0.AddArg2(x, y)
 31935  		v.AddArg(v0)
 31936  		return true
 31937  	}
 31938  }
 31939  func rewriteValue_OpNeq32F(v *ssa.Value) bool {
 31940  	v_1 := v.Args[1]
 31941  	v_0 := v.Args[0]
 31942  	b := v.Block
 31943  	// match: (Neq32F x y)
 31944  	// result: (NotEqual (FCMPS x y))
 31945  	for {
 31946  		x := v_0
 31947  		y := v_1
 31948  		v.Reset(ssaop.OpARM64NotEqual)
 31949  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64FCMPS, types.TypeFlags)
 31950  		v0.AddArg2(x, y)
 31951  		v.AddArg(v0)
 31952  		return true
 31953  	}
 31954  }
 31955  func rewriteValue_OpNeq64(v *ssa.Value) bool {
 31956  	v_1 := v.Args[1]
 31957  	v_0 := v.Args[0]
 31958  	b := v.Block
 31959  	// match: (Neq64 x y)
 31960  	// result: (NotEqual (CMP x y))
 31961  	for {
 31962  		x := v_0
 31963  		y := v_1
 31964  		v.Reset(ssaop.OpARM64NotEqual)
 31965  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMP, types.TypeFlags)
 31966  		v0.AddArg2(x, y)
 31967  		v.AddArg(v0)
 31968  		return true
 31969  	}
 31970  }
 31971  func rewriteValue_OpNeq64F(v *ssa.Value) bool {
 31972  	v_1 := v.Args[1]
 31973  	v_0 := v.Args[0]
 31974  	b := v.Block
 31975  	// match: (Neq64F x y)
 31976  	// result: (NotEqual (FCMPD x y))
 31977  	for {
 31978  		x := v_0
 31979  		y := v_1
 31980  		v.Reset(ssaop.OpARM64NotEqual)
 31981  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64FCMPD, types.TypeFlags)
 31982  		v0.AddArg2(x, y)
 31983  		v.AddArg(v0)
 31984  		return true
 31985  	}
 31986  }
 31987  func rewriteValue_OpNeq8(v *ssa.Value) bool {
 31988  	v_1 := v.Args[1]
 31989  	v_0 := v.Args[0]
 31990  	b := v.Block
 31991  	typ := &b.Func.Config.Types
 31992  	// match: (Neq8 x y)
 31993  	// result: (NotEqual (CMPW (ZeroExt8to32 x) (ZeroExt8to32 y)))
 31994  	for {
 31995  		x := v_0
 31996  		y := v_1
 31997  		v.Reset(ssaop.OpARM64NotEqual)
 31998  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMPW, types.TypeFlags)
 31999  		v1 := b.NewValue0(v.Pos, ssaop.OpZeroExt8to32, typ.UInt32)
 32000  		v1.AddArg(x)
 32001  		v2 := b.NewValue0(v.Pos, ssaop.OpZeroExt8to32, typ.UInt32)
 32002  		v2.AddArg(y)
 32003  		v0.AddArg2(v1, v2)
 32004  		v.AddArg(v0)
 32005  		return true
 32006  	}
 32007  }
 32008  func rewriteValue_OpNeqPtr(v *ssa.Value) bool {
 32009  	v_1 := v.Args[1]
 32010  	v_0 := v.Args[0]
 32011  	b := v.Block
 32012  	// match: (NeqPtr x y)
 32013  	// result: (NotEqual (CMP x y))
 32014  	for {
 32015  		x := v_0
 32016  		y := v_1
 32017  		v.Reset(ssaop.OpARM64NotEqual)
 32018  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMP, types.TypeFlags)
 32019  		v0.AddArg2(x, y)
 32020  		v.AddArg(v0)
 32021  		return true
 32022  	}
 32023  }
 32024  func rewriteValue_OpNot(v *ssa.Value) bool {
 32025  	v_0 := v.Args[0]
 32026  	b := v.Block
 32027  	typ := &b.Func.Config.Types
 32028  	// match: (Not x)
 32029  	// result: (XOR (MOVDconst [1]) x)
 32030  	for {
 32031  		x := v_0
 32032  		v.Reset(ssaop.OpARM64XOR)
 32033  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 32034  		v0.AuxInt = ssa.Int64ToAuxInt(1)
 32035  		v.AddArg2(v0, x)
 32036  		return true
 32037  	}
 32038  }
 32039  func rewriteValue_OpNotEqualFloat32s(v *ssa.Value) bool {
 32040  	v_1 := v.Args[1]
 32041  	v_0 := v.Args[0]
 32042  	b := v.Block
 32043  	typ := &b.Func.Config.Types
 32044  	// match: (NotEqualFloat32s x y)
 32045  	// result: (ZFCMNES x y (Select0 <types.TypeMask> (PWHILELTS (MOVDconst [0]) (MOVDconst [8]))))
 32046  	for {
 32047  		x := v_0
 32048  		y := v_1
 32049  		v.Reset(ssaop.OpARM64ZFCMNES)
 32050  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 32051  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTS, types.NewTuple(typ.Mask, types.TypeFlags))
 32052  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 32053  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 32054  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 32055  		v3.AuxInt = ssa.Int64ToAuxInt(8)
 32056  		v1.AddArg2(v2, v3)
 32057  		v0.AddArg(v1)
 32058  		v.AddArg3(x, y, v0)
 32059  		return true
 32060  	}
 32061  }
 32062  func rewriteValue_OpNotEqualFloat64s(v *ssa.Value) bool {
 32063  	v_1 := v.Args[1]
 32064  	v_0 := v.Args[0]
 32065  	b := v.Block
 32066  	typ := &b.Func.Config.Types
 32067  	// match: (NotEqualFloat64s x y)
 32068  	// result: (ZFCMNED x y (Select0 <types.TypeMask> (PWHILELTD (MOVDconst [0]) (MOVDconst [4]))))
 32069  	for {
 32070  		x := v_0
 32071  		y := v_1
 32072  		v.Reset(ssaop.OpARM64ZFCMNED)
 32073  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 32074  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTD, types.NewTuple(typ.Mask, types.TypeFlags))
 32075  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 32076  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 32077  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 32078  		v3.AuxInt = ssa.Int64ToAuxInt(4)
 32079  		v1.AddArg2(v2, v3)
 32080  		v0.AddArg(v1)
 32081  		v.AddArg3(x, y, v0)
 32082  		return true
 32083  	}
 32084  }
 32085  func rewriteValue_OpNotEqualInt16s(v *ssa.Value) bool {
 32086  	v_1 := v.Args[1]
 32087  	v_0 := v.Args[0]
 32088  	b := v.Block
 32089  	typ := &b.Func.Config.Types
 32090  	// match: (NotEqualInt16s x y)
 32091  	// result: (ZCMPNEH x y (Select0 <types.TypeMask> (PWHILELTH (MOVDconst [0]) (MOVDconst [16]))))
 32092  	for {
 32093  		x := v_0
 32094  		y := v_1
 32095  		v.Reset(ssaop.OpARM64ZCMPNEH)
 32096  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 32097  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTH, types.NewTuple(typ.Mask, types.TypeFlags))
 32098  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 32099  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 32100  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 32101  		v3.AuxInt = ssa.Int64ToAuxInt(16)
 32102  		v1.AddArg2(v2, v3)
 32103  		v0.AddArg(v1)
 32104  		v.AddArg3(x, y, v0)
 32105  		return true
 32106  	}
 32107  }
 32108  func rewriteValue_OpNotEqualInt32s(v *ssa.Value) bool {
 32109  	v_1 := v.Args[1]
 32110  	v_0 := v.Args[0]
 32111  	b := v.Block
 32112  	typ := &b.Func.Config.Types
 32113  	// match: (NotEqualInt32s x y)
 32114  	// result: (ZCMPNES x y (Select0 <types.TypeMask> (PWHILELTS (MOVDconst [0]) (MOVDconst [8]))))
 32115  	for {
 32116  		x := v_0
 32117  		y := v_1
 32118  		v.Reset(ssaop.OpARM64ZCMPNES)
 32119  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 32120  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTS, types.NewTuple(typ.Mask, types.TypeFlags))
 32121  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 32122  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 32123  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 32124  		v3.AuxInt = ssa.Int64ToAuxInt(8)
 32125  		v1.AddArg2(v2, v3)
 32126  		v0.AddArg(v1)
 32127  		v.AddArg3(x, y, v0)
 32128  		return true
 32129  	}
 32130  }
 32131  func rewriteValue_OpNotEqualInt64s(v *ssa.Value) bool {
 32132  	v_1 := v.Args[1]
 32133  	v_0 := v.Args[0]
 32134  	b := v.Block
 32135  	typ := &b.Func.Config.Types
 32136  	// match: (NotEqualInt64s x y)
 32137  	// result: (ZCMPNED x y (Select0 <types.TypeMask> (PWHILELTD (MOVDconst [0]) (MOVDconst [4]))))
 32138  	for {
 32139  		x := v_0
 32140  		y := v_1
 32141  		v.Reset(ssaop.OpARM64ZCMPNED)
 32142  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 32143  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTD, types.NewTuple(typ.Mask, types.TypeFlags))
 32144  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 32145  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 32146  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 32147  		v3.AuxInt = ssa.Int64ToAuxInt(4)
 32148  		v1.AddArg2(v2, v3)
 32149  		v0.AddArg(v1)
 32150  		v.AddArg3(x, y, v0)
 32151  		return true
 32152  	}
 32153  }
 32154  func rewriteValue_OpNotEqualInt8s(v *ssa.Value) bool {
 32155  	v_1 := v.Args[1]
 32156  	v_0 := v.Args[0]
 32157  	b := v.Block
 32158  	typ := &b.Func.Config.Types
 32159  	// match: (NotEqualInt8s x y)
 32160  	// result: (ZCMPNEB x y (Select0 <types.TypeMask> (PWHILELTB (MOVDconst [0]) (MOVDconst [32]))))
 32161  	for {
 32162  		x := v_0
 32163  		y := v_1
 32164  		v.Reset(ssaop.OpARM64ZCMPNEB)
 32165  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 32166  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTB, types.NewTuple(typ.Mask, types.TypeFlags))
 32167  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 32168  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 32169  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 32170  		v3.AuxInt = ssa.Int64ToAuxInt(32)
 32171  		v1.AddArg2(v2, v3)
 32172  		v0.AddArg(v1)
 32173  		v.AddArg3(x, y, v0)
 32174  		return true
 32175  	}
 32176  }
 32177  func rewriteValue_OpNotEqualUint16s(v *ssa.Value) bool {
 32178  	v_1 := v.Args[1]
 32179  	v_0 := v.Args[0]
 32180  	b := v.Block
 32181  	typ := &b.Func.Config.Types
 32182  	// match: (NotEqualUint16s x y)
 32183  	// result: (ZCMPNEH x y (Select0 <types.TypeMask> (PWHILELTH (MOVDconst [0]) (MOVDconst [16]))))
 32184  	for {
 32185  		x := v_0
 32186  		y := v_1
 32187  		v.Reset(ssaop.OpARM64ZCMPNEH)
 32188  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 32189  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTH, types.NewTuple(typ.Mask, types.TypeFlags))
 32190  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 32191  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 32192  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 32193  		v3.AuxInt = ssa.Int64ToAuxInt(16)
 32194  		v1.AddArg2(v2, v3)
 32195  		v0.AddArg(v1)
 32196  		v.AddArg3(x, y, v0)
 32197  		return true
 32198  	}
 32199  }
 32200  func rewriteValue_OpNotEqualUint32s(v *ssa.Value) bool {
 32201  	v_1 := v.Args[1]
 32202  	v_0 := v.Args[0]
 32203  	b := v.Block
 32204  	typ := &b.Func.Config.Types
 32205  	// match: (NotEqualUint32s x y)
 32206  	// result: (ZCMPNES x y (Select0 <types.TypeMask> (PWHILELTS (MOVDconst [0]) (MOVDconst [8]))))
 32207  	for {
 32208  		x := v_0
 32209  		y := v_1
 32210  		v.Reset(ssaop.OpARM64ZCMPNES)
 32211  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 32212  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTS, types.NewTuple(typ.Mask, types.TypeFlags))
 32213  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 32214  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 32215  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 32216  		v3.AuxInt = ssa.Int64ToAuxInt(8)
 32217  		v1.AddArg2(v2, v3)
 32218  		v0.AddArg(v1)
 32219  		v.AddArg3(x, y, v0)
 32220  		return true
 32221  	}
 32222  }
 32223  func rewriteValue_OpNotEqualUint64s(v *ssa.Value) bool {
 32224  	v_1 := v.Args[1]
 32225  	v_0 := v.Args[0]
 32226  	b := v.Block
 32227  	typ := &b.Func.Config.Types
 32228  	// match: (NotEqualUint64s x y)
 32229  	// result: (ZCMPNED x y (Select0 <types.TypeMask> (PWHILELTD (MOVDconst [0]) (MOVDconst [4]))))
 32230  	for {
 32231  		x := v_0
 32232  		y := v_1
 32233  		v.Reset(ssaop.OpARM64ZCMPNED)
 32234  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 32235  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTD, types.NewTuple(typ.Mask, types.TypeFlags))
 32236  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 32237  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 32238  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 32239  		v3.AuxInt = ssa.Int64ToAuxInt(4)
 32240  		v1.AddArg2(v2, v3)
 32241  		v0.AddArg(v1)
 32242  		v.AddArg3(x, y, v0)
 32243  		return true
 32244  	}
 32245  }
 32246  func rewriteValue_OpNotEqualUint8s(v *ssa.Value) bool {
 32247  	v_1 := v.Args[1]
 32248  	v_0 := v.Args[0]
 32249  	b := v.Block
 32250  	typ := &b.Func.Config.Types
 32251  	// match: (NotEqualUint8s x y)
 32252  	// result: (ZCMPNEB x y (Select0 <types.TypeMask> (PWHILELTB (MOVDconst [0]) (MOVDconst [32]))))
 32253  	for {
 32254  		x := v_0
 32255  		y := v_1
 32256  		v.Reset(ssaop.OpARM64ZCMPNEB)
 32257  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 32258  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTB, types.NewTuple(typ.Mask, types.TypeFlags))
 32259  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 32260  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 32261  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 32262  		v3.AuxInt = ssa.Int64ToAuxInt(32)
 32263  		v1.AddArg2(v2, v3)
 32264  		v0.AddArg(v1)
 32265  		v.AddArg3(x, y, v0)
 32266  		return true
 32267  	}
 32268  }
 32269  func rewriteValue_OpOffPtr(v *ssa.Value) bool {
 32270  	v_0 := v.Args[0]
 32271  	// match: (OffPtr [off] ptr:(SP))
 32272  	// cond: ssa.Is32Bit(off)
 32273  	// result: (MOVDaddr [int32(off)] ptr)
 32274  	for {
 32275  		off := ssa.AuxIntToInt64(v.AuxInt)
 32276  		ptr := v_0
 32277  		if ptr.Op != ssaop.OpSP || !(ssa.Is32Bit(off)) {
 32278  			break
 32279  		}
 32280  		v.Reset(ssaop.OpARM64MOVDaddr)
 32281  		v.AuxInt = ssa.Int32ToAuxInt(int32(off))
 32282  		v.AddArg(ptr)
 32283  		return true
 32284  	}
 32285  	// match: (OffPtr [off] ptr)
 32286  	// result: (ADDconst [off] ptr)
 32287  	for {
 32288  		off := ssa.AuxIntToInt64(v.AuxInt)
 32289  		ptr := v_0
 32290  		v.Reset(ssaop.OpARM64ADDconst)
 32291  		v.AuxInt = ssa.Int64ToAuxInt(off)
 32292  		v.AddArg(ptr)
 32293  		return true
 32294  	}
 32295  }
 32296  func rewriteValue_OpPopCount16(v *ssa.Value) bool {
 32297  	v_0 := v.Args[0]
 32298  	b := v.Block
 32299  	typ := &b.Func.Config.Types
 32300  	// match: (PopCount16 <t> x)
 32301  	// result: (FMOVDfpgp <t> (VUADDLV <typ.Float64> (VCNT <typ.Float64> (FMOVDgpfp <typ.Float64> (ZeroExt16to64 x)))))
 32302  	for {
 32303  		t := v.Type
 32304  		x := v_0
 32305  		v.Reset(ssaop.OpARM64FMOVDfpgp)
 32306  		v.Type = t
 32307  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64VUADDLV, typ.Float64)
 32308  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64VCNT, typ.Float64)
 32309  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64FMOVDgpfp, typ.Float64)
 32310  		v3 := b.NewValue0(v.Pos, ssaop.OpZeroExt16to64, typ.UInt64)
 32311  		v3.AddArg(x)
 32312  		v2.AddArg(v3)
 32313  		v1.AddArg(v2)
 32314  		v0.AddArg(v1)
 32315  		v.AddArg(v0)
 32316  		return true
 32317  	}
 32318  }
 32319  func rewriteValue_OpPopCount32(v *ssa.Value) bool {
 32320  	v_0 := v.Args[0]
 32321  	b := v.Block
 32322  	typ := &b.Func.Config.Types
 32323  	// match: (PopCount32 <t> x)
 32324  	// result: (FMOVDfpgp <t> (VUADDLV <typ.Float64> (VCNT <typ.Float64> (FMOVDgpfp <typ.Float64> (ZeroExt32to64 x)))))
 32325  	for {
 32326  		t := v.Type
 32327  		x := v_0
 32328  		v.Reset(ssaop.OpARM64FMOVDfpgp)
 32329  		v.Type = t
 32330  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64VUADDLV, typ.Float64)
 32331  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64VCNT, typ.Float64)
 32332  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64FMOVDgpfp, typ.Float64)
 32333  		v3 := b.NewValue0(v.Pos, ssaop.OpZeroExt32to64, typ.UInt64)
 32334  		v3.AddArg(x)
 32335  		v2.AddArg(v3)
 32336  		v1.AddArg(v2)
 32337  		v0.AddArg(v1)
 32338  		v.AddArg(v0)
 32339  		return true
 32340  	}
 32341  }
 32342  func rewriteValue_OpPopCount64(v *ssa.Value) bool {
 32343  	v_0 := v.Args[0]
 32344  	b := v.Block
 32345  	typ := &b.Func.Config.Types
 32346  	// match: (PopCount64 <t> x)
 32347  	// result: (FMOVDfpgp <t> (VUADDLV <typ.Float64> (VCNT <typ.Float64> (FMOVDgpfp <typ.Float64> x))))
 32348  	for {
 32349  		t := v.Type
 32350  		x := v_0
 32351  		v.Reset(ssaop.OpARM64FMOVDfpgp)
 32352  		v.Type = t
 32353  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64VUADDLV, typ.Float64)
 32354  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64VCNT, typ.Float64)
 32355  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64FMOVDgpfp, typ.Float64)
 32356  		v2.AddArg(x)
 32357  		v1.AddArg(v2)
 32358  		v0.AddArg(v1)
 32359  		v.AddArg(v0)
 32360  		return true
 32361  	}
 32362  }
 32363  func rewriteValue_OpPrefetchCache(v *ssa.Value) bool {
 32364  	v_1 := v.Args[1]
 32365  	v_0 := v.Args[0]
 32366  	// match: (PrefetchCache addr mem)
 32367  	// result: (PRFM [0] addr mem)
 32368  	for {
 32369  		addr := v_0
 32370  		mem := v_1
 32371  		v.Reset(ssaop.OpARM64PRFM)
 32372  		v.AuxInt = ssa.Int64ToAuxInt(0)
 32373  		v.AddArg2(addr, mem)
 32374  		return true
 32375  	}
 32376  }
 32377  func rewriteValue_OpPrefetchCacheStreamed(v *ssa.Value) bool {
 32378  	v_1 := v.Args[1]
 32379  	v_0 := v.Args[0]
 32380  	// match: (PrefetchCacheStreamed addr mem)
 32381  	// result: (PRFM [1] addr mem)
 32382  	for {
 32383  		addr := v_0
 32384  		mem := v_1
 32385  		v.Reset(ssaop.OpARM64PRFM)
 32386  		v.AuxInt = ssa.Int64ToAuxInt(1)
 32387  		v.AddArg2(addr, mem)
 32388  		return true
 32389  	}
 32390  }
 32391  func rewriteValue_OpPubBarrier(v *ssa.Value) bool {
 32392  	v_0 := v.Args[0]
 32393  	// match: (PubBarrier mem)
 32394  	// result: (DMB [0xe] mem)
 32395  	for {
 32396  		mem := v_0
 32397  		v.Reset(ssaop.OpARM64DMB)
 32398  		v.AuxInt = ssa.Int64ToAuxInt(0xe)
 32399  		v.AddArg(mem)
 32400  		return true
 32401  	}
 32402  }
 32403  func rewriteValue_OpRotateLeft16(v *ssa.Value) bool {
 32404  	v_1 := v.Args[1]
 32405  	v_0 := v.Args[0]
 32406  	b := v.Block
 32407  	typ := &b.Func.Config.Types
 32408  	// match: (RotateLeft16 <t> x (MOVDconst [c]))
 32409  	// result: (Or16 (Lsh16x64 <t> x (MOVDconst [c&15])) (Rsh16Ux64 <t> x (MOVDconst [-c&15])))
 32410  	for {
 32411  		t := v.Type
 32412  		x := v_0
 32413  		if v_1.Op != ssaop.OpARM64MOVDconst {
 32414  			break
 32415  		}
 32416  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 32417  		v.Reset(ssaop.OpOr16)
 32418  		v0 := b.NewValue0(v.Pos, ssaop.OpLsh16x64, t)
 32419  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 32420  		v1.AuxInt = ssa.Int64ToAuxInt(c & 15)
 32421  		v0.AddArg2(x, v1)
 32422  		v2 := b.NewValue0(v.Pos, ssaop.OpRsh16Ux64, t)
 32423  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 32424  		v3.AuxInt = ssa.Int64ToAuxInt(-c & 15)
 32425  		v2.AddArg2(x, v3)
 32426  		v.AddArg2(v0, v2)
 32427  		return true
 32428  	}
 32429  	// match: (RotateLeft16 <t> x y)
 32430  	// result: (RORW <t> (ORshiftLL <typ.UInt32> (ZeroExt16to32 x) (ZeroExt16to32 x) [16]) (NEG <typ.Int64> y))
 32431  	for {
 32432  		t := v.Type
 32433  		x := v_0
 32434  		y := v_1
 32435  		v.Reset(ssaop.OpARM64RORW)
 32436  		v.Type = t
 32437  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64ORshiftLL, typ.UInt32)
 32438  		v0.AuxInt = ssa.Int64ToAuxInt(16)
 32439  		v1 := b.NewValue0(v.Pos, ssaop.OpZeroExt16to32, typ.UInt32)
 32440  		v1.AddArg(x)
 32441  		v0.AddArg2(v1, v1)
 32442  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64NEG, typ.Int64)
 32443  		v2.AddArg(y)
 32444  		v.AddArg2(v0, v2)
 32445  		return true
 32446  	}
 32447  }
 32448  func rewriteValue_OpRotateLeft32(v *ssa.Value) bool {
 32449  	v_1 := v.Args[1]
 32450  	v_0 := v.Args[0]
 32451  	b := v.Block
 32452  	// match: (RotateLeft32 x y)
 32453  	// result: (RORW x (NEG <y.Type> y))
 32454  	for {
 32455  		x := v_0
 32456  		y := v_1
 32457  		v.Reset(ssaop.OpARM64RORW)
 32458  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64NEG, y.Type)
 32459  		v0.AddArg(y)
 32460  		v.AddArg2(x, v0)
 32461  		return true
 32462  	}
 32463  }
 32464  func rewriteValue_OpRotateLeft64(v *ssa.Value) bool {
 32465  	v_1 := v.Args[1]
 32466  	v_0 := v.Args[0]
 32467  	b := v.Block
 32468  	// match: (RotateLeft64 x y)
 32469  	// result: (ROR x (NEG <y.Type> y))
 32470  	for {
 32471  		x := v_0
 32472  		y := v_1
 32473  		v.Reset(ssaop.OpARM64ROR)
 32474  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64NEG, y.Type)
 32475  		v0.AddArg(y)
 32476  		v.AddArg2(x, v0)
 32477  		return true
 32478  	}
 32479  }
 32480  func rewriteValue_OpRotateLeft8(v *ssa.Value) bool {
 32481  	v_1 := v.Args[1]
 32482  	v_0 := v.Args[0]
 32483  	b := v.Block
 32484  	typ := &b.Func.Config.Types
 32485  	// match: (RotateLeft8 <t> x (MOVDconst [c]))
 32486  	// result: (Or8 (Lsh8x64 <t> x (MOVDconst [c&7])) (Rsh8Ux64 <t> x (MOVDconst [-c&7])))
 32487  	for {
 32488  		t := v.Type
 32489  		x := v_0
 32490  		if v_1.Op != ssaop.OpARM64MOVDconst {
 32491  			break
 32492  		}
 32493  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 32494  		v.Reset(ssaop.OpOr8)
 32495  		v0 := b.NewValue0(v.Pos, ssaop.OpLsh8x64, t)
 32496  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 32497  		v1.AuxInt = ssa.Int64ToAuxInt(c & 7)
 32498  		v0.AddArg2(x, v1)
 32499  		v2 := b.NewValue0(v.Pos, ssaop.OpRsh8Ux64, t)
 32500  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 32501  		v3.AuxInt = ssa.Int64ToAuxInt(-c & 7)
 32502  		v2.AddArg2(x, v3)
 32503  		v.AddArg2(v0, v2)
 32504  		return true
 32505  	}
 32506  	// match: (RotateLeft8 <t> x y)
 32507  	// result: (OR <t> (SLL <t> x (ANDconst <typ.Int64> [7] y)) (SRL <t> (ZeroExt8to64 x) (ANDconst <typ.Int64> [7] (NEG <typ.Int64> y))))
 32508  	for {
 32509  		t := v.Type
 32510  		x := v_0
 32511  		y := v_1
 32512  		v.Reset(ssaop.OpARM64OR)
 32513  		v.Type = t
 32514  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SLL, t)
 32515  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64ANDconst, typ.Int64)
 32516  		v1.AuxInt = ssa.Int64ToAuxInt(7)
 32517  		v1.AddArg(y)
 32518  		v0.AddArg2(x, v1)
 32519  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64SRL, t)
 32520  		v3 := b.NewValue0(v.Pos, ssaop.OpZeroExt8to64, typ.UInt64)
 32521  		v3.AddArg(x)
 32522  		v4 := b.NewValue0(v.Pos, ssaop.OpARM64ANDconst, typ.Int64)
 32523  		v4.AuxInt = ssa.Int64ToAuxInt(7)
 32524  		v5 := b.NewValue0(v.Pos, ssaop.OpARM64NEG, typ.Int64)
 32525  		v5.AddArg(y)
 32526  		v4.AddArg(v5)
 32527  		v2.AddArg2(v3, v4)
 32528  		v.AddArg2(v0, v2)
 32529  		return true
 32530  	}
 32531  }
 32532  func rewriteValue_OpRoundFloat32s(v *ssa.Value) bool {
 32533  	v_0 := v.Args[0]
 32534  	b := v.Block
 32535  	typ := &b.Func.Config.Types
 32536  	// match: (RoundFloat32s x)
 32537  	// result: (ZFRINTNS x (Select0 <types.TypeMask> (PWHILELTS (MOVDconst [0]) (MOVDconst [8]))))
 32538  	for {
 32539  		x := v_0
 32540  		v.Reset(ssaop.OpARM64ZFRINTNS)
 32541  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 32542  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTS, types.NewTuple(typ.Mask, types.TypeFlags))
 32543  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 32544  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 32545  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 32546  		v3.AuxInt = ssa.Int64ToAuxInt(8)
 32547  		v1.AddArg2(v2, v3)
 32548  		v0.AddArg(v1)
 32549  		v.AddArg2(x, v0)
 32550  		return true
 32551  	}
 32552  }
 32553  func rewriteValue_OpRoundFloat64s(v *ssa.Value) bool {
 32554  	v_0 := v.Args[0]
 32555  	b := v.Block
 32556  	typ := &b.Func.Config.Types
 32557  	// match: (RoundFloat64s x)
 32558  	// result: (ZFRINTND x (Select0 <types.TypeMask> (PWHILELTD (MOVDconst [0]) (MOVDconst [4]))))
 32559  	for {
 32560  		x := v_0
 32561  		v.Reset(ssaop.OpARM64ZFRINTND)
 32562  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 32563  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTD, types.NewTuple(typ.Mask, types.TypeFlags))
 32564  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 32565  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 32566  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 32567  		v3.AuxInt = ssa.Int64ToAuxInt(4)
 32568  		v1.AddArg2(v2, v3)
 32569  		v0.AddArg(v1)
 32570  		v.AddArg2(x, v0)
 32571  		return true
 32572  	}
 32573  }
 32574  func rewriteValue_OpRsh16Ux16(v *ssa.Value) bool {
 32575  	v_1 := v.Args[1]
 32576  	v_0 := v.Args[0]
 32577  	b := v.Block
 32578  	typ := &b.Func.Config.Types
 32579  	// match: (Rsh16Ux16 <t> [bounded] x y)
 32580  	// result: (Rsh64Ux16 <t> [bounded] (ZeroExt16to64 x) y)
 32581  	for {
 32582  		t := v.Type
 32583  		bounded := ssa.AuxIntToBool(v.AuxInt)
 32584  		x := v_0
 32585  		y := v_1
 32586  		v.Reset(ssaop.OpRsh64Ux16)
 32587  		v.Type = t
 32588  		v.AuxInt = ssa.BoolToAuxInt(bounded)
 32589  		v0 := b.NewValue0(v.Pos, ssaop.OpZeroExt16to64, typ.UInt64)
 32590  		v0.AddArg(x)
 32591  		v.AddArg2(v0, y)
 32592  		return true
 32593  	}
 32594  }
 32595  func rewriteValue_OpRsh16Ux32(v *ssa.Value) bool {
 32596  	v_1 := v.Args[1]
 32597  	v_0 := v.Args[0]
 32598  	b := v.Block
 32599  	typ := &b.Func.Config.Types
 32600  	// match: (Rsh16Ux32 <t> [bounded] x y)
 32601  	// result: (Rsh64Ux32 <t> [bounded] (ZeroExt16to64 x) y)
 32602  	for {
 32603  		t := v.Type
 32604  		bounded := ssa.AuxIntToBool(v.AuxInt)
 32605  		x := v_0
 32606  		y := v_1
 32607  		v.Reset(ssaop.OpRsh64Ux32)
 32608  		v.Type = t
 32609  		v.AuxInt = ssa.BoolToAuxInt(bounded)
 32610  		v0 := b.NewValue0(v.Pos, ssaop.OpZeroExt16to64, typ.UInt64)
 32611  		v0.AddArg(x)
 32612  		v.AddArg2(v0, y)
 32613  		return true
 32614  	}
 32615  }
 32616  func rewriteValue_OpRsh16Ux64(v *ssa.Value) bool {
 32617  	v_1 := v.Args[1]
 32618  	v_0 := v.Args[0]
 32619  	b := v.Block
 32620  	typ := &b.Func.Config.Types
 32621  	// match: (Rsh16Ux64 <t> [bounded] x y)
 32622  	// result: (Rsh64Ux64 <t> [bounded] (ZeroExt16to64 x) y)
 32623  	for {
 32624  		t := v.Type
 32625  		bounded := ssa.AuxIntToBool(v.AuxInt)
 32626  		x := v_0
 32627  		y := v_1
 32628  		v.Reset(ssaop.OpRsh64Ux64)
 32629  		v.Type = t
 32630  		v.AuxInt = ssa.BoolToAuxInt(bounded)
 32631  		v0 := b.NewValue0(v.Pos, ssaop.OpZeroExt16to64, typ.UInt64)
 32632  		v0.AddArg(x)
 32633  		v.AddArg2(v0, y)
 32634  		return true
 32635  	}
 32636  }
 32637  func rewriteValue_OpRsh16Ux8(v *ssa.Value) bool {
 32638  	v_1 := v.Args[1]
 32639  	v_0 := v.Args[0]
 32640  	b := v.Block
 32641  	typ := &b.Func.Config.Types
 32642  	// match: (Rsh16Ux8 <t> [bounded] x y)
 32643  	// result: (Rsh64Ux8 <t> [bounded] (ZeroExt16to64 x) y)
 32644  	for {
 32645  		t := v.Type
 32646  		bounded := ssa.AuxIntToBool(v.AuxInt)
 32647  		x := v_0
 32648  		y := v_1
 32649  		v.Reset(ssaop.OpRsh64Ux8)
 32650  		v.Type = t
 32651  		v.AuxInt = ssa.BoolToAuxInt(bounded)
 32652  		v0 := b.NewValue0(v.Pos, ssaop.OpZeroExt16to64, typ.UInt64)
 32653  		v0.AddArg(x)
 32654  		v.AddArg2(v0, y)
 32655  		return true
 32656  	}
 32657  }
 32658  func rewriteValue_OpRsh16x16(v *ssa.Value) bool {
 32659  	v_1 := v.Args[1]
 32660  	v_0 := v.Args[0]
 32661  	b := v.Block
 32662  	typ := &b.Func.Config.Types
 32663  	// match: (Rsh16x16 <t> [bounded] x y)
 32664  	// result: (Rsh64x16 <t> [bounded] (SignExt16to64 x) y)
 32665  	for {
 32666  		t := v.Type
 32667  		bounded := ssa.AuxIntToBool(v.AuxInt)
 32668  		x := v_0
 32669  		y := v_1
 32670  		v.Reset(ssaop.OpRsh64x16)
 32671  		v.Type = t
 32672  		v.AuxInt = ssa.BoolToAuxInt(bounded)
 32673  		v0 := b.NewValue0(v.Pos, ssaop.OpSignExt16to64, typ.Int64)
 32674  		v0.AddArg(x)
 32675  		v.AddArg2(v0, y)
 32676  		return true
 32677  	}
 32678  }
 32679  func rewriteValue_OpRsh16x32(v *ssa.Value) bool {
 32680  	v_1 := v.Args[1]
 32681  	v_0 := v.Args[0]
 32682  	b := v.Block
 32683  	typ := &b.Func.Config.Types
 32684  	// match: (Rsh16x32 <t> [bounded] x y)
 32685  	// result: (Rsh64x32 <t> [bounded] (SignExt16to64 x) y)
 32686  	for {
 32687  		t := v.Type
 32688  		bounded := ssa.AuxIntToBool(v.AuxInt)
 32689  		x := v_0
 32690  		y := v_1
 32691  		v.Reset(ssaop.OpRsh64x32)
 32692  		v.Type = t
 32693  		v.AuxInt = ssa.BoolToAuxInt(bounded)
 32694  		v0 := b.NewValue0(v.Pos, ssaop.OpSignExt16to64, typ.Int64)
 32695  		v0.AddArg(x)
 32696  		v.AddArg2(v0, y)
 32697  		return true
 32698  	}
 32699  }
 32700  func rewriteValue_OpRsh16x64(v *ssa.Value) bool {
 32701  	v_1 := v.Args[1]
 32702  	v_0 := v.Args[0]
 32703  	b := v.Block
 32704  	typ := &b.Func.Config.Types
 32705  	// match: (Rsh16x64 <t> [bounded] x y)
 32706  	// result: (Rsh64x64 <t> [bounded] (SignExt16to64 x) y)
 32707  	for {
 32708  		t := v.Type
 32709  		bounded := ssa.AuxIntToBool(v.AuxInt)
 32710  		x := v_0
 32711  		y := v_1
 32712  		v.Reset(ssaop.OpRsh64x64)
 32713  		v.Type = t
 32714  		v.AuxInt = ssa.BoolToAuxInt(bounded)
 32715  		v0 := b.NewValue0(v.Pos, ssaop.OpSignExt16to64, typ.Int64)
 32716  		v0.AddArg(x)
 32717  		v.AddArg2(v0, y)
 32718  		return true
 32719  	}
 32720  }
 32721  func rewriteValue_OpRsh16x8(v *ssa.Value) bool {
 32722  	v_1 := v.Args[1]
 32723  	v_0 := v.Args[0]
 32724  	b := v.Block
 32725  	typ := &b.Func.Config.Types
 32726  	// match: (Rsh16x8 <t> [bounded] x y)
 32727  	// result: (Rsh64x8 <t> [bounded] (SignExt16to64 x) y)
 32728  	for {
 32729  		t := v.Type
 32730  		bounded := ssa.AuxIntToBool(v.AuxInt)
 32731  		x := v_0
 32732  		y := v_1
 32733  		v.Reset(ssaop.OpRsh64x8)
 32734  		v.Type = t
 32735  		v.AuxInt = ssa.BoolToAuxInt(bounded)
 32736  		v0 := b.NewValue0(v.Pos, ssaop.OpSignExt16to64, typ.Int64)
 32737  		v0.AddArg(x)
 32738  		v.AddArg2(v0, y)
 32739  		return true
 32740  	}
 32741  }
 32742  func rewriteValue_OpRsh32Ux16(v *ssa.Value) bool {
 32743  	v_1 := v.Args[1]
 32744  	v_0 := v.Args[0]
 32745  	b := v.Block
 32746  	typ := &b.Func.Config.Types
 32747  	// match: (Rsh32Ux16 <t> [bounded] x y)
 32748  	// result: (Rsh64Ux16 <t> [bounded] (ZeroExt32to64 x) y)
 32749  	for {
 32750  		t := v.Type
 32751  		bounded := ssa.AuxIntToBool(v.AuxInt)
 32752  		x := v_0
 32753  		y := v_1
 32754  		v.Reset(ssaop.OpRsh64Ux16)
 32755  		v.Type = t
 32756  		v.AuxInt = ssa.BoolToAuxInt(bounded)
 32757  		v0 := b.NewValue0(v.Pos, ssaop.OpZeroExt32to64, typ.UInt64)
 32758  		v0.AddArg(x)
 32759  		v.AddArg2(v0, y)
 32760  		return true
 32761  	}
 32762  }
 32763  func rewriteValue_OpRsh32Ux32(v *ssa.Value) bool {
 32764  	v_1 := v.Args[1]
 32765  	v_0 := v.Args[0]
 32766  	b := v.Block
 32767  	typ := &b.Func.Config.Types
 32768  	// match: (Rsh32Ux32 <t> [bounded] x y)
 32769  	// result: (Rsh64Ux32 <t> [bounded] (ZeroExt32to64 x) y)
 32770  	for {
 32771  		t := v.Type
 32772  		bounded := ssa.AuxIntToBool(v.AuxInt)
 32773  		x := v_0
 32774  		y := v_1
 32775  		v.Reset(ssaop.OpRsh64Ux32)
 32776  		v.Type = t
 32777  		v.AuxInt = ssa.BoolToAuxInt(bounded)
 32778  		v0 := b.NewValue0(v.Pos, ssaop.OpZeroExt32to64, typ.UInt64)
 32779  		v0.AddArg(x)
 32780  		v.AddArg2(v0, y)
 32781  		return true
 32782  	}
 32783  }
 32784  func rewriteValue_OpRsh32Ux64(v *ssa.Value) bool {
 32785  	v_1 := v.Args[1]
 32786  	v_0 := v.Args[0]
 32787  	b := v.Block
 32788  	typ := &b.Func.Config.Types
 32789  	// match: (Rsh32Ux64 <t> [bounded] x y)
 32790  	// result: (Rsh64Ux64 <t> [bounded] (ZeroExt32to64 x) y)
 32791  	for {
 32792  		t := v.Type
 32793  		bounded := ssa.AuxIntToBool(v.AuxInt)
 32794  		x := v_0
 32795  		y := v_1
 32796  		v.Reset(ssaop.OpRsh64Ux64)
 32797  		v.Type = t
 32798  		v.AuxInt = ssa.BoolToAuxInt(bounded)
 32799  		v0 := b.NewValue0(v.Pos, ssaop.OpZeroExt32to64, typ.UInt64)
 32800  		v0.AddArg(x)
 32801  		v.AddArg2(v0, y)
 32802  		return true
 32803  	}
 32804  }
 32805  func rewriteValue_OpRsh32Ux8(v *ssa.Value) bool {
 32806  	v_1 := v.Args[1]
 32807  	v_0 := v.Args[0]
 32808  	b := v.Block
 32809  	typ := &b.Func.Config.Types
 32810  	// match: (Rsh32Ux8 <t> [bounded] x y)
 32811  	// result: (Rsh64Ux8 <t> [bounded] (ZeroExt32to64 x) y)
 32812  	for {
 32813  		t := v.Type
 32814  		bounded := ssa.AuxIntToBool(v.AuxInt)
 32815  		x := v_0
 32816  		y := v_1
 32817  		v.Reset(ssaop.OpRsh64Ux8)
 32818  		v.Type = t
 32819  		v.AuxInt = ssa.BoolToAuxInt(bounded)
 32820  		v0 := b.NewValue0(v.Pos, ssaop.OpZeroExt32to64, typ.UInt64)
 32821  		v0.AddArg(x)
 32822  		v.AddArg2(v0, y)
 32823  		return true
 32824  	}
 32825  }
 32826  func rewriteValue_OpRsh32x16(v *ssa.Value) bool {
 32827  	v_1 := v.Args[1]
 32828  	v_0 := v.Args[0]
 32829  	b := v.Block
 32830  	typ := &b.Func.Config.Types
 32831  	// match: (Rsh32x16 <t> [bounded] x y)
 32832  	// result: (Rsh64x16 <t> [bounded] (SignExt32to64 x) y)
 32833  	for {
 32834  		t := v.Type
 32835  		bounded := ssa.AuxIntToBool(v.AuxInt)
 32836  		x := v_0
 32837  		y := v_1
 32838  		v.Reset(ssaop.OpRsh64x16)
 32839  		v.Type = t
 32840  		v.AuxInt = ssa.BoolToAuxInt(bounded)
 32841  		v0 := b.NewValue0(v.Pos, ssaop.OpSignExt32to64, typ.Int64)
 32842  		v0.AddArg(x)
 32843  		v.AddArg2(v0, y)
 32844  		return true
 32845  	}
 32846  }
 32847  func rewriteValue_OpRsh32x32(v *ssa.Value) bool {
 32848  	v_1 := v.Args[1]
 32849  	v_0 := v.Args[0]
 32850  	b := v.Block
 32851  	typ := &b.Func.Config.Types
 32852  	// match: (Rsh32x32 <t> [bounded] x y)
 32853  	// result: (Rsh64x32 <t> [bounded] (SignExt32to64 x) y)
 32854  	for {
 32855  		t := v.Type
 32856  		bounded := ssa.AuxIntToBool(v.AuxInt)
 32857  		x := v_0
 32858  		y := v_1
 32859  		v.Reset(ssaop.OpRsh64x32)
 32860  		v.Type = t
 32861  		v.AuxInt = ssa.BoolToAuxInt(bounded)
 32862  		v0 := b.NewValue0(v.Pos, ssaop.OpSignExt32to64, typ.Int64)
 32863  		v0.AddArg(x)
 32864  		v.AddArg2(v0, y)
 32865  		return true
 32866  	}
 32867  }
 32868  func rewriteValue_OpRsh32x64(v *ssa.Value) bool {
 32869  	v_1 := v.Args[1]
 32870  	v_0 := v.Args[0]
 32871  	b := v.Block
 32872  	typ := &b.Func.Config.Types
 32873  	// match: (Rsh32x64 <t> [bounded] x y)
 32874  	// result: (Rsh64x64 <t> [bounded] (SignExt32to64 x) y)
 32875  	for {
 32876  		t := v.Type
 32877  		bounded := ssa.AuxIntToBool(v.AuxInt)
 32878  		x := v_0
 32879  		y := v_1
 32880  		v.Reset(ssaop.OpRsh64x64)
 32881  		v.Type = t
 32882  		v.AuxInt = ssa.BoolToAuxInt(bounded)
 32883  		v0 := b.NewValue0(v.Pos, ssaop.OpSignExt32to64, typ.Int64)
 32884  		v0.AddArg(x)
 32885  		v.AddArg2(v0, y)
 32886  		return true
 32887  	}
 32888  }
 32889  func rewriteValue_OpRsh32x8(v *ssa.Value) bool {
 32890  	v_1 := v.Args[1]
 32891  	v_0 := v.Args[0]
 32892  	b := v.Block
 32893  	typ := &b.Func.Config.Types
 32894  	// match: (Rsh32x8 <t> [bounded] x y)
 32895  	// result: (Rsh64x8 <t> [bounded] (SignExt32to64 x) y)
 32896  	for {
 32897  		t := v.Type
 32898  		bounded := ssa.AuxIntToBool(v.AuxInt)
 32899  		x := v_0
 32900  		y := v_1
 32901  		v.Reset(ssaop.OpRsh64x8)
 32902  		v.Type = t
 32903  		v.AuxInt = ssa.BoolToAuxInt(bounded)
 32904  		v0 := b.NewValue0(v.Pos, ssaop.OpSignExt32to64, typ.Int64)
 32905  		v0.AddArg(x)
 32906  		v.AddArg2(v0, y)
 32907  		return true
 32908  	}
 32909  }
 32910  func rewriteValue_OpRsh64Ux16(v *ssa.Value) bool {
 32911  	v_1 := v.Args[1]
 32912  	v_0 := v.Args[0]
 32913  	b := v.Block
 32914  	typ := &b.Func.Config.Types
 32915  	// match: (Rsh64Ux16 <t> x y)
 32916  	// cond: ssa.ShiftIsBounded(v)
 32917  	// result: (SRL <t> x y)
 32918  	for {
 32919  		t := v.Type
 32920  		x := v_0
 32921  		y := v_1
 32922  		if !(ssa.ShiftIsBounded(v)) {
 32923  			break
 32924  		}
 32925  		v.Reset(ssaop.OpARM64SRL)
 32926  		v.Type = t
 32927  		v.AddArg2(x, y)
 32928  		return true
 32929  	}
 32930  	// match: (Rsh64Ux16 <t> [bounded] x y)
 32931  	// cond: !ssa.ShiftIsBounded(v)
 32932  	// result: (Rsh64Ux32 <t> [bounded] x (ZeroExt16to32 y))
 32933  	for {
 32934  		t := v.Type
 32935  		bounded := ssa.AuxIntToBool(v.AuxInt)
 32936  		x := v_0
 32937  		y := v_1
 32938  		if !(!ssa.ShiftIsBounded(v)) {
 32939  			break
 32940  		}
 32941  		v.Reset(ssaop.OpRsh64Ux32)
 32942  		v.Type = t
 32943  		v.AuxInt = ssa.BoolToAuxInt(bounded)
 32944  		v0 := b.NewValue0(v.Pos, ssaop.OpZeroExt16to32, typ.UInt32)
 32945  		v0.AddArg(y)
 32946  		v.AddArg2(x, v0)
 32947  		return true
 32948  	}
 32949  	return false
 32950  }
 32951  func rewriteValue_OpRsh64Ux32(v *ssa.Value) bool {
 32952  	v_1 := v.Args[1]
 32953  	v_0 := v.Args[0]
 32954  	b := v.Block
 32955  	// match: (Rsh64Ux32 <t> x y)
 32956  	// cond: ssa.ShiftIsBounded(v)
 32957  	// result: (SRL <t> x y)
 32958  	for {
 32959  		t := v.Type
 32960  		x := v_0
 32961  		y := v_1
 32962  		if !(ssa.ShiftIsBounded(v)) {
 32963  			break
 32964  		}
 32965  		v.Reset(ssaop.OpARM64SRL)
 32966  		v.Type = t
 32967  		v.AddArg2(x, y)
 32968  		return true
 32969  	}
 32970  	// match: (Rsh64Ux32 <t> x y)
 32971  	// cond: !ssa.ShiftIsBounded(v)
 32972  	// result: (CSEL [ssaop.OpARM64LessThanU] (SRL <t> x y) (Const64 <t> [0]) (CMPWconst [64] y))
 32973  	for {
 32974  		t := v.Type
 32975  		x := v_0
 32976  		y := v_1
 32977  		if !(!ssa.ShiftIsBounded(v)) {
 32978  			break
 32979  		}
 32980  		v.Reset(ssaop.OpARM64CSEL)
 32981  		v.AuxInt = ssa.OpToAuxInt(ssaop.OpARM64LessThanU)
 32982  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SRL, t)
 32983  		v0.AddArg2(x, y)
 32984  		v1 := b.NewValue0(v.Pos, ssaop.OpConst64, t)
 32985  		v1.AuxInt = ssa.Int64ToAuxInt(0)
 32986  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64CMPWconst, types.TypeFlags)
 32987  		v2.AuxInt = ssa.Int32ToAuxInt(64)
 32988  		v2.AddArg(y)
 32989  		v.AddArg3(v0, v1, v2)
 32990  		return true
 32991  	}
 32992  	return false
 32993  }
 32994  func rewriteValue_OpRsh64Ux64(v *ssa.Value) bool {
 32995  	v_1 := v.Args[1]
 32996  	v_0 := v.Args[0]
 32997  	b := v.Block
 32998  	// match: (Rsh64Ux64 <t> x y)
 32999  	// cond: ssa.ShiftIsBounded(v)
 33000  	// result: (SRL <t> x y)
 33001  	for {
 33002  		t := v.Type
 33003  		x := v_0
 33004  		y := v_1
 33005  		if !(ssa.ShiftIsBounded(v)) {
 33006  			break
 33007  		}
 33008  		v.Reset(ssaop.OpARM64SRL)
 33009  		v.Type = t
 33010  		v.AddArg2(x, y)
 33011  		return true
 33012  	}
 33013  	// match: (Rsh64Ux64 <t> x y)
 33014  	// cond: !ssa.ShiftIsBounded(v)
 33015  	// result: (CSEL [ssaop.OpARM64LessThanU] (SRL <t> x y) (Const64 <t> [0]) (CMPconst [64] y))
 33016  	for {
 33017  		t := v.Type
 33018  		x := v_0
 33019  		y := v_1
 33020  		if !(!ssa.ShiftIsBounded(v)) {
 33021  			break
 33022  		}
 33023  		v.Reset(ssaop.OpARM64CSEL)
 33024  		v.AuxInt = ssa.OpToAuxInt(ssaop.OpARM64LessThanU)
 33025  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SRL, t)
 33026  		v0.AddArg2(x, y)
 33027  		v1 := b.NewValue0(v.Pos, ssaop.OpConst64, t)
 33028  		v1.AuxInt = ssa.Int64ToAuxInt(0)
 33029  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64CMPconst, types.TypeFlags)
 33030  		v2.AuxInt = ssa.Int64ToAuxInt(64)
 33031  		v2.AddArg(y)
 33032  		v.AddArg3(v0, v1, v2)
 33033  		return true
 33034  	}
 33035  	return false
 33036  }
 33037  func rewriteValue_OpRsh64Ux8(v *ssa.Value) bool {
 33038  	v_1 := v.Args[1]
 33039  	v_0 := v.Args[0]
 33040  	b := v.Block
 33041  	typ := &b.Func.Config.Types
 33042  	// match: (Rsh64Ux8 <t> x y)
 33043  	// cond: ssa.ShiftIsBounded(v)
 33044  	// result: (SRL <t> x y)
 33045  	for {
 33046  		t := v.Type
 33047  		x := v_0
 33048  		y := v_1
 33049  		if !(ssa.ShiftIsBounded(v)) {
 33050  			break
 33051  		}
 33052  		v.Reset(ssaop.OpARM64SRL)
 33053  		v.Type = t
 33054  		v.AddArg2(x, y)
 33055  		return true
 33056  	}
 33057  	// match: (Rsh64Ux8 <t> [bounded] x y)
 33058  	// cond: !ssa.ShiftIsBounded(v)
 33059  	// result: (Rsh64Ux32 <t> [bounded] x (ZeroExt8to32 y))
 33060  	for {
 33061  		t := v.Type
 33062  		bounded := ssa.AuxIntToBool(v.AuxInt)
 33063  		x := v_0
 33064  		y := v_1
 33065  		if !(!ssa.ShiftIsBounded(v)) {
 33066  			break
 33067  		}
 33068  		v.Reset(ssaop.OpRsh64Ux32)
 33069  		v.Type = t
 33070  		v.AuxInt = ssa.BoolToAuxInt(bounded)
 33071  		v0 := b.NewValue0(v.Pos, ssaop.OpZeroExt8to32, typ.UInt32)
 33072  		v0.AddArg(y)
 33073  		v.AddArg2(x, v0)
 33074  		return true
 33075  	}
 33076  	return false
 33077  }
 33078  func rewriteValue_OpRsh64x16(v *ssa.Value) bool {
 33079  	v_1 := v.Args[1]
 33080  	v_0 := v.Args[0]
 33081  	b := v.Block
 33082  	typ := &b.Func.Config.Types
 33083  	// match: (Rsh64x16 <t> x y)
 33084  	// cond: ssa.ShiftIsBounded(v)
 33085  	// result: (SRA <t> x y)
 33086  	for {
 33087  		t := v.Type
 33088  		x := v_0
 33089  		y := v_1
 33090  		if !(ssa.ShiftIsBounded(v)) {
 33091  			break
 33092  		}
 33093  		v.Reset(ssaop.OpARM64SRA)
 33094  		v.Type = t
 33095  		v.AddArg2(x, y)
 33096  		return true
 33097  	}
 33098  	// match: (Rsh64x16 <t> [bounded] x y)
 33099  	// cond: !ssa.ShiftIsBounded(v)
 33100  	// result: (Rsh64x32 <t> [bounded] x (ZeroExt16to32 y))
 33101  	for {
 33102  		t := v.Type
 33103  		bounded := ssa.AuxIntToBool(v.AuxInt)
 33104  		x := v_0
 33105  		y := v_1
 33106  		if !(!ssa.ShiftIsBounded(v)) {
 33107  			break
 33108  		}
 33109  		v.Reset(ssaop.OpRsh64x32)
 33110  		v.Type = t
 33111  		v.AuxInt = ssa.BoolToAuxInt(bounded)
 33112  		v0 := b.NewValue0(v.Pos, ssaop.OpZeroExt16to32, typ.UInt32)
 33113  		v0.AddArg(y)
 33114  		v.AddArg2(x, v0)
 33115  		return true
 33116  	}
 33117  	return false
 33118  }
 33119  func rewriteValue_OpRsh64x32(v *ssa.Value) bool {
 33120  	v_1 := v.Args[1]
 33121  	v_0 := v.Args[0]
 33122  	b := v.Block
 33123  	// match: (Rsh64x32 <t> x y)
 33124  	// cond: ssa.ShiftIsBounded(v)
 33125  	// result: (SRA <t> x y)
 33126  	for {
 33127  		t := v.Type
 33128  		x := v_0
 33129  		y := v_1
 33130  		if !(ssa.ShiftIsBounded(v)) {
 33131  			break
 33132  		}
 33133  		v.Reset(ssaop.OpARM64SRA)
 33134  		v.Type = t
 33135  		v.AddArg2(x, y)
 33136  		return true
 33137  	}
 33138  	// match: (Rsh64x32 <t> x y)
 33139  	// cond: !ssa.ShiftIsBounded(v)
 33140  	// result: (SRA x (CSEL [ssaop.OpARM64LessThanU] <y.Type> y (Const64 <y.Type> [63]) (CMPWconst [64] y)))
 33141  	for {
 33142  		x := v_0
 33143  		y := v_1
 33144  		if !(!ssa.ShiftIsBounded(v)) {
 33145  			break
 33146  		}
 33147  		v.Reset(ssaop.OpARM64SRA)
 33148  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CSEL, y.Type)
 33149  		v0.AuxInt = ssa.OpToAuxInt(ssaop.OpARM64LessThanU)
 33150  		v1 := b.NewValue0(v.Pos, ssaop.OpConst64, y.Type)
 33151  		v1.AuxInt = ssa.Int64ToAuxInt(63)
 33152  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64CMPWconst, types.TypeFlags)
 33153  		v2.AuxInt = ssa.Int32ToAuxInt(64)
 33154  		v2.AddArg(y)
 33155  		v0.AddArg3(y, v1, v2)
 33156  		v.AddArg2(x, v0)
 33157  		return true
 33158  	}
 33159  	return false
 33160  }
 33161  func rewriteValue_OpRsh64x64(v *ssa.Value) bool {
 33162  	v_1 := v.Args[1]
 33163  	v_0 := v.Args[0]
 33164  	b := v.Block
 33165  	// match: (Rsh64x64 <t> x y)
 33166  	// cond: ssa.ShiftIsBounded(v)
 33167  	// result: (SRA <t> x y)
 33168  	for {
 33169  		t := v.Type
 33170  		x := v_0
 33171  		y := v_1
 33172  		if !(ssa.ShiftIsBounded(v)) {
 33173  			break
 33174  		}
 33175  		v.Reset(ssaop.OpARM64SRA)
 33176  		v.Type = t
 33177  		v.AddArg2(x, y)
 33178  		return true
 33179  	}
 33180  	// match: (Rsh64x64 <t> x y)
 33181  	// cond: !ssa.ShiftIsBounded(v)
 33182  	// result: (SRA x (CSEL [ssaop.OpARM64LessThanU] <y.Type> y (Const64 <y.Type> [63]) (CMPconst [64] y)))
 33183  	for {
 33184  		x := v_0
 33185  		y := v_1
 33186  		if !(!ssa.ShiftIsBounded(v)) {
 33187  			break
 33188  		}
 33189  		v.Reset(ssaop.OpARM64SRA)
 33190  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CSEL, y.Type)
 33191  		v0.AuxInt = ssa.OpToAuxInt(ssaop.OpARM64LessThanU)
 33192  		v1 := b.NewValue0(v.Pos, ssaop.OpConst64, y.Type)
 33193  		v1.AuxInt = ssa.Int64ToAuxInt(63)
 33194  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64CMPconst, types.TypeFlags)
 33195  		v2.AuxInt = ssa.Int64ToAuxInt(64)
 33196  		v2.AddArg(y)
 33197  		v0.AddArg3(y, v1, v2)
 33198  		v.AddArg2(x, v0)
 33199  		return true
 33200  	}
 33201  	return false
 33202  }
 33203  func rewriteValue_OpRsh64x8(v *ssa.Value) bool {
 33204  	v_1 := v.Args[1]
 33205  	v_0 := v.Args[0]
 33206  	b := v.Block
 33207  	typ := &b.Func.Config.Types
 33208  	// match: (Rsh64x8 <t> x y)
 33209  	// cond: ssa.ShiftIsBounded(v)
 33210  	// result: (SRA <t> x y)
 33211  	for {
 33212  		t := v.Type
 33213  		x := v_0
 33214  		y := v_1
 33215  		if !(ssa.ShiftIsBounded(v)) {
 33216  			break
 33217  		}
 33218  		v.Reset(ssaop.OpARM64SRA)
 33219  		v.Type = t
 33220  		v.AddArg2(x, y)
 33221  		return true
 33222  	}
 33223  	// match: (Rsh64x8 <t> [bounded] x y)
 33224  	// cond: !ssa.ShiftIsBounded(v)
 33225  	// result: (Rsh64x32 <t> [bounded] x (ZeroExt8to32 y))
 33226  	for {
 33227  		t := v.Type
 33228  		bounded := ssa.AuxIntToBool(v.AuxInt)
 33229  		x := v_0
 33230  		y := v_1
 33231  		if !(!ssa.ShiftIsBounded(v)) {
 33232  			break
 33233  		}
 33234  		v.Reset(ssaop.OpRsh64x32)
 33235  		v.Type = t
 33236  		v.AuxInt = ssa.BoolToAuxInt(bounded)
 33237  		v0 := b.NewValue0(v.Pos, ssaop.OpZeroExt8to32, typ.UInt32)
 33238  		v0.AddArg(y)
 33239  		v.AddArg2(x, v0)
 33240  		return true
 33241  	}
 33242  	return false
 33243  }
 33244  func rewriteValue_OpRsh8Ux16(v *ssa.Value) bool {
 33245  	v_1 := v.Args[1]
 33246  	v_0 := v.Args[0]
 33247  	b := v.Block
 33248  	typ := &b.Func.Config.Types
 33249  	// match: (Rsh8Ux16 <t> [bounded] x y)
 33250  	// result: (Rsh64Ux16 <t> [bounded] (ZeroExt8to64 x) y)
 33251  	for {
 33252  		t := v.Type
 33253  		bounded := ssa.AuxIntToBool(v.AuxInt)
 33254  		x := v_0
 33255  		y := v_1
 33256  		v.Reset(ssaop.OpRsh64Ux16)
 33257  		v.Type = t
 33258  		v.AuxInt = ssa.BoolToAuxInt(bounded)
 33259  		v0 := b.NewValue0(v.Pos, ssaop.OpZeroExt8to64, typ.UInt64)
 33260  		v0.AddArg(x)
 33261  		v.AddArg2(v0, y)
 33262  		return true
 33263  	}
 33264  }
 33265  func rewriteValue_OpRsh8Ux32(v *ssa.Value) bool {
 33266  	v_1 := v.Args[1]
 33267  	v_0 := v.Args[0]
 33268  	b := v.Block
 33269  	typ := &b.Func.Config.Types
 33270  	// match: (Rsh8Ux32 <t> [bounded] x y)
 33271  	// result: (Rsh64Ux32 <t> [bounded] (ZeroExt8to64 x) y)
 33272  	for {
 33273  		t := v.Type
 33274  		bounded := ssa.AuxIntToBool(v.AuxInt)
 33275  		x := v_0
 33276  		y := v_1
 33277  		v.Reset(ssaop.OpRsh64Ux32)
 33278  		v.Type = t
 33279  		v.AuxInt = ssa.BoolToAuxInt(bounded)
 33280  		v0 := b.NewValue0(v.Pos, ssaop.OpZeroExt8to64, typ.UInt64)
 33281  		v0.AddArg(x)
 33282  		v.AddArg2(v0, y)
 33283  		return true
 33284  	}
 33285  }
 33286  func rewriteValue_OpRsh8Ux64(v *ssa.Value) bool {
 33287  	v_1 := v.Args[1]
 33288  	v_0 := v.Args[0]
 33289  	b := v.Block
 33290  	typ := &b.Func.Config.Types
 33291  	// match: (Rsh8Ux64 <t> [bounded] x y)
 33292  	// result: (Rsh64Ux64 <t> [bounded] (ZeroExt8to64 x) y)
 33293  	for {
 33294  		t := v.Type
 33295  		bounded := ssa.AuxIntToBool(v.AuxInt)
 33296  		x := v_0
 33297  		y := v_1
 33298  		v.Reset(ssaop.OpRsh64Ux64)
 33299  		v.Type = t
 33300  		v.AuxInt = ssa.BoolToAuxInt(bounded)
 33301  		v0 := b.NewValue0(v.Pos, ssaop.OpZeroExt8to64, typ.UInt64)
 33302  		v0.AddArg(x)
 33303  		v.AddArg2(v0, y)
 33304  		return true
 33305  	}
 33306  }
 33307  func rewriteValue_OpRsh8Ux8(v *ssa.Value) bool {
 33308  	v_1 := v.Args[1]
 33309  	v_0 := v.Args[0]
 33310  	b := v.Block
 33311  	typ := &b.Func.Config.Types
 33312  	// match: (Rsh8Ux8 <t> [bounded] x y)
 33313  	// result: (Rsh64Ux8 <t> [bounded] (ZeroExt8to64 x) y)
 33314  	for {
 33315  		t := v.Type
 33316  		bounded := ssa.AuxIntToBool(v.AuxInt)
 33317  		x := v_0
 33318  		y := v_1
 33319  		v.Reset(ssaop.OpRsh64Ux8)
 33320  		v.Type = t
 33321  		v.AuxInt = ssa.BoolToAuxInt(bounded)
 33322  		v0 := b.NewValue0(v.Pos, ssaop.OpZeroExt8to64, typ.UInt64)
 33323  		v0.AddArg(x)
 33324  		v.AddArg2(v0, y)
 33325  		return true
 33326  	}
 33327  }
 33328  func rewriteValue_OpRsh8x16(v *ssa.Value) bool {
 33329  	v_1 := v.Args[1]
 33330  	v_0 := v.Args[0]
 33331  	b := v.Block
 33332  	typ := &b.Func.Config.Types
 33333  	// match: (Rsh8x16 <t> [bounded] x y)
 33334  	// result: (Rsh64x16 <t> [bounded] (SignExt8to64 x) y)
 33335  	for {
 33336  		t := v.Type
 33337  		bounded := ssa.AuxIntToBool(v.AuxInt)
 33338  		x := v_0
 33339  		y := v_1
 33340  		v.Reset(ssaop.OpRsh64x16)
 33341  		v.Type = t
 33342  		v.AuxInt = ssa.BoolToAuxInt(bounded)
 33343  		v0 := b.NewValue0(v.Pos, ssaop.OpSignExt8to64, typ.Int64)
 33344  		v0.AddArg(x)
 33345  		v.AddArg2(v0, y)
 33346  		return true
 33347  	}
 33348  }
 33349  func rewriteValue_OpRsh8x32(v *ssa.Value) bool {
 33350  	v_1 := v.Args[1]
 33351  	v_0 := v.Args[0]
 33352  	b := v.Block
 33353  	typ := &b.Func.Config.Types
 33354  	// match: (Rsh8x32 <t> [bounded] x y)
 33355  	// result: (Rsh64x32 <t> [bounded] (SignExt8to64 x) y)
 33356  	for {
 33357  		t := v.Type
 33358  		bounded := ssa.AuxIntToBool(v.AuxInt)
 33359  		x := v_0
 33360  		y := v_1
 33361  		v.Reset(ssaop.OpRsh64x32)
 33362  		v.Type = t
 33363  		v.AuxInt = ssa.BoolToAuxInt(bounded)
 33364  		v0 := b.NewValue0(v.Pos, ssaop.OpSignExt8to64, typ.Int64)
 33365  		v0.AddArg(x)
 33366  		v.AddArg2(v0, y)
 33367  		return true
 33368  	}
 33369  }
 33370  func rewriteValue_OpRsh8x64(v *ssa.Value) bool {
 33371  	v_1 := v.Args[1]
 33372  	v_0 := v.Args[0]
 33373  	b := v.Block
 33374  	typ := &b.Func.Config.Types
 33375  	// match: (Rsh8x64 <t> [bounded] x y)
 33376  	// result: (Rsh64x64 <t> [bounded] (SignExt8to64 x) y)
 33377  	for {
 33378  		t := v.Type
 33379  		bounded := ssa.AuxIntToBool(v.AuxInt)
 33380  		x := v_0
 33381  		y := v_1
 33382  		v.Reset(ssaop.OpRsh64x64)
 33383  		v.Type = t
 33384  		v.AuxInt = ssa.BoolToAuxInt(bounded)
 33385  		v0 := b.NewValue0(v.Pos, ssaop.OpSignExt8to64, typ.Int64)
 33386  		v0.AddArg(x)
 33387  		v.AddArg2(v0, y)
 33388  		return true
 33389  	}
 33390  }
 33391  func rewriteValue_OpRsh8x8(v *ssa.Value) bool {
 33392  	v_1 := v.Args[1]
 33393  	v_0 := v.Args[0]
 33394  	b := v.Block
 33395  	typ := &b.Func.Config.Types
 33396  	// match: (Rsh8x8 <t> [bounded] x y)
 33397  	// result: (Rsh64x8 <t> [bounded] (SignExt8to64 x) y)
 33398  	for {
 33399  		t := v.Type
 33400  		bounded := ssa.AuxIntToBool(v.AuxInt)
 33401  		x := v_0
 33402  		y := v_1
 33403  		v.Reset(ssaop.OpRsh64x8)
 33404  		v.Type = t
 33405  		v.AuxInt = ssa.BoolToAuxInt(bounded)
 33406  		v0 := b.NewValue0(v.Pos, ssaop.OpSignExt8to64, typ.Int64)
 33407  		v0.AddArg(x)
 33408  		v.AddArg2(v0, y)
 33409  		return true
 33410  	}
 33411  }
 33412  func rewriteValue_OpScalableVectorLen(v *ssa.Value) bool {
 33413  	// match: (ScalableVectorLen)
 33414  	// result: (RDVL [1])
 33415  	for {
 33416  		v.Reset(ssaop.OpARM64RDVL)
 33417  		v.AuxInt = ssa.Int64ToAuxInt(1)
 33418  		return true
 33419  	}
 33420  }
 33421  func rewriteValue_OpSelect0(v *ssa.Value) bool {
 33422  	v_0 := v.Args[0]
 33423  	b := v.Block
 33424  	typ := &b.Func.Config.Types
 33425  	// match: (Select0 (Mul64uhilo x y))
 33426  	// result: (UMULH x y)
 33427  	for {
 33428  		if v_0.Op != ssaop.OpMul64uhilo {
 33429  			break
 33430  		}
 33431  		y := v_0.Args[1]
 33432  		x := v_0.Args[0]
 33433  		v.Reset(ssaop.OpARM64UMULH)
 33434  		v.AddArg2(x, y)
 33435  		return true
 33436  	}
 33437  	// match: (Select0 (Add64carry x y c))
 33438  	// result: (Select0 <typ.UInt64> (ADCSflags x y (Select1 <types.TypeFlags> (ADDSconstflags [-1] c))))
 33439  	for {
 33440  		if v_0.Op != ssaop.OpAdd64carry {
 33441  			break
 33442  		}
 33443  		c := v_0.Args[2]
 33444  		x := v_0.Args[0]
 33445  		y := v_0.Args[1]
 33446  		v.Reset(ssaop.OpSelect0)
 33447  		v.Type = typ.UInt64
 33448  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64ADCSflags, types.NewTuple(typ.UInt64, types.TypeFlags))
 33449  		v1 := b.NewValue0(v.Pos, ssaop.OpSelect1, types.TypeFlags)
 33450  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64ADDSconstflags, types.NewTuple(typ.UInt64, types.TypeFlags))
 33451  		v2.AuxInt = ssa.Int64ToAuxInt(-1)
 33452  		v2.AddArg(c)
 33453  		v1.AddArg(v2)
 33454  		v0.AddArg3(x, y, v1)
 33455  		v.AddArg(v0)
 33456  		return true
 33457  	}
 33458  	// match: (Select0 (Sub64borrow x y bo))
 33459  	// result: (Select0 <typ.UInt64> (SBCSflags x y (Select1 <types.TypeFlags> (NEGSflags bo))))
 33460  	for {
 33461  		if v_0.Op != ssaop.OpSub64borrow {
 33462  			break
 33463  		}
 33464  		bo := v_0.Args[2]
 33465  		x := v_0.Args[0]
 33466  		y := v_0.Args[1]
 33467  		v.Reset(ssaop.OpSelect0)
 33468  		v.Type = typ.UInt64
 33469  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SBCSflags, types.NewTuple(typ.UInt64, types.TypeFlags))
 33470  		v1 := b.NewValue0(v.Pos, ssaop.OpSelect1, types.TypeFlags)
 33471  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64NEGSflags, types.NewTuple(typ.UInt64, types.TypeFlags))
 33472  		v2.AddArg(bo)
 33473  		v1.AddArg(v2)
 33474  		v0.AddArg3(x, y, v1)
 33475  		v.AddArg(v0)
 33476  		return true
 33477  	}
 33478  	// match: (Select0 (Mul64uover x y))
 33479  	// result: (MUL x y)
 33480  	for {
 33481  		if v_0.Op != ssaop.OpMul64uover {
 33482  			break
 33483  		}
 33484  		y := v_0.Args[1]
 33485  		x := v_0.Args[0]
 33486  		v.Reset(ssaop.OpARM64MUL)
 33487  		v.AddArg2(x, y)
 33488  		return true
 33489  	}
 33490  	return false
 33491  }
 33492  func rewriteValue_OpSelect1(v *ssa.Value) bool {
 33493  	v_0 := v.Args[0]
 33494  	b := v.Block
 33495  	typ := &b.Func.Config.Types
 33496  	// match: (Select1 (Mul64uhilo x y))
 33497  	// result: (MUL x y)
 33498  	for {
 33499  		if v_0.Op != ssaop.OpMul64uhilo {
 33500  			break
 33501  		}
 33502  		y := v_0.Args[1]
 33503  		x := v_0.Args[0]
 33504  		v.Reset(ssaop.OpARM64MUL)
 33505  		v.AddArg2(x, y)
 33506  		return true
 33507  	}
 33508  	// match: (Select1 (Add64carry x y c))
 33509  	// result: (ADCzerocarry <typ.UInt64> (Select1 <types.TypeFlags> (ADCSflags x y (Select1 <types.TypeFlags> (ADDSconstflags [-1] c)))))
 33510  	for {
 33511  		if v_0.Op != ssaop.OpAdd64carry {
 33512  			break
 33513  		}
 33514  		c := v_0.Args[2]
 33515  		x := v_0.Args[0]
 33516  		y := v_0.Args[1]
 33517  		v.Reset(ssaop.OpARM64ADCzerocarry)
 33518  		v.Type = typ.UInt64
 33519  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect1, types.TypeFlags)
 33520  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64ADCSflags, types.NewTuple(typ.UInt64, types.TypeFlags))
 33521  		v2 := b.NewValue0(v.Pos, ssaop.OpSelect1, types.TypeFlags)
 33522  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64ADDSconstflags, types.NewTuple(typ.UInt64, types.TypeFlags))
 33523  		v3.AuxInt = ssa.Int64ToAuxInt(-1)
 33524  		v3.AddArg(c)
 33525  		v2.AddArg(v3)
 33526  		v1.AddArg3(x, y, v2)
 33527  		v0.AddArg(v1)
 33528  		v.AddArg(v0)
 33529  		return true
 33530  	}
 33531  	// match: (Select1 (Sub64borrow x y bo))
 33532  	// result: (NEG <typ.UInt64> (NGCzerocarry <typ.UInt64> (Select1 <types.TypeFlags> (SBCSflags x y (Select1 <types.TypeFlags> (NEGSflags bo))))))
 33533  	for {
 33534  		if v_0.Op != ssaop.OpSub64borrow {
 33535  			break
 33536  		}
 33537  		bo := v_0.Args[2]
 33538  		x := v_0.Args[0]
 33539  		y := v_0.Args[1]
 33540  		v.Reset(ssaop.OpARM64NEG)
 33541  		v.Type = typ.UInt64
 33542  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64NGCzerocarry, typ.UInt64)
 33543  		v1 := b.NewValue0(v.Pos, ssaop.OpSelect1, types.TypeFlags)
 33544  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64SBCSflags, types.NewTuple(typ.UInt64, types.TypeFlags))
 33545  		v3 := b.NewValue0(v.Pos, ssaop.OpSelect1, types.TypeFlags)
 33546  		v4 := b.NewValue0(v.Pos, ssaop.OpARM64NEGSflags, types.NewTuple(typ.UInt64, types.TypeFlags))
 33547  		v4.AddArg(bo)
 33548  		v3.AddArg(v4)
 33549  		v2.AddArg3(x, y, v3)
 33550  		v1.AddArg(v2)
 33551  		v0.AddArg(v1)
 33552  		v.AddArg(v0)
 33553  		return true
 33554  	}
 33555  	// match: (Select1 (Mul64uover x y))
 33556  	// result: (NotEqual (CMPconst (UMULH <typ.UInt64> x y) [0]))
 33557  	for {
 33558  		if v_0.Op != ssaop.OpMul64uover {
 33559  			break
 33560  		}
 33561  		y := v_0.Args[1]
 33562  		x := v_0.Args[0]
 33563  		v.Reset(ssaop.OpARM64NotEqual)
 33564  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMPconst, types.TypeFlags)
 33565  		v0.AuxInt = ssa.Int64ToAuxInt(0)
 33566  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64UMULH, typ.UInt64)
 33567  		v1.AddArg2(x, y)
 33568  		v0.AddArg(v1)
 33569  		v.AddArg(v0)
 33570  		return true
 33571  	}
 33572  	return false
 33573  }
 33574  func rewriteValue_OpSelectN(v *ssa.Value) bool {
 33575  	v_0 := v.Args[0]
 33576  	b := v.Block
 33577  	config := b.Func.Config
 33578  	// match: (SelectN [0] call:(CALLstatic {sym} s1:(MOVDstore _ (MOVDconst [sz]) s2:(MOVDstore _ src s3:(MOVDstore {t} _ dst mem)))))
 33579  	// cond: sz >= 0 && ssa.IsSameCall(sym, "runtime.memmove") && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && ssa.IsInlinableMemmove(dst, src, sz, config) && ssa.Clobber(s1, s2, s3, call)
 33580  	// result: (Move [sz] dst src mem)
 33581  	for {
 33582  		if ssa.AuxIntToInt64(v.AuxInt) != 0 {
 33583  			break
 33584  		}
 33585  		call := v_0
 33586  		if call.Op != ssaop.OpARM64CALLstatic || len(call.Args) != 1 {
 33587  			break
 33588  		}
 33589  		sym := ssa.AuxToCall(call.Aux)
 33590  		s1 := call.Args[0]
 33591  		if s1.Op != ssaop.OpARM64MOVDstore {
 33592  			break
 33593  		}
 33594  		_ = s1.Args[2]
 33595  		s1_1 := s1.Args[1]
 33596  		if s1_1.Op != ssaop.OpARM64MOVDconst {
 33597  			break
 33598  		}
 33599  		sz := ssa.AuxIntToInt64(s1_1.AuxInt)
 33600  		s2 := s1.Args[2]
 33601  		if s2.Op != ssaop.OpARM64MOVDstore {
 33602  			break
 33603  		}
 33604  		_ = s2.Args[2]
 33605  		src := s2.Args[1]
 33606  		s3 := s2.Args[2]
 33607  		if s3.Op != ssaop.OpARM64MOVDstore {
 33608  			break
 33609  		}
 33610  		mem := s3.Args[2]
 33611  		dst := s3.Args[1]
 33612  		if !(sz >= 0 && ssa.IsSameCall(sym, "runtime.memmove") && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && ssa.IsInlinableMemmove(dst, src, sz, config) && ssa.Clobber(s1, s2, s3, call)) {
 33613  			break
 33614  		}
 33615  		v.Reset(ssaop.OpMove)
 33616  		v.AuxInt = ssa.Int64ToAuxInt(sz)
 33617  		v.AddArg3(dst, src, mem)
 33618  		return true
 33619  	}
 33620  	// match: (SelectN [0] call:(CALLstatic {sym} dst src (MOVDconst [sz]) mem))
 33621  	// cond: sz >= 0 && ssa.IsSameCall(sym, "runtime.memmove") && call.Uses == 1 && ssa.IsInlinableMemmove(dst, src, sz, config) && ssa.Clobber(call)
 33622  	// result: (Move [sz] dst src mem)
 33623  	for {
 33624  		if ssa.AuxIntToInt64(v.AuxInt) != 0 {
 33625  			break
 33626  		}
 33627  		call := v_0
 33628  		if call.Op != ssaop.OpARM64CALLstatic || len(call.Args) != 4 {
 33629  			break
 33630  		}
 33631  		sym := ssa.AuxToCall(call.Aux)
 33632  		mem := call.Args[3]
 33633  		dst := call.Args[0]
 33634  		src := call.Args[1]
 33635  		call_2 := call.Args[2]
 33636  		if call_2.Op != ssaop.OpARM64MOVDconst {
 33637  			break
 33638  		}
 33639  		sz := ssa.AuxIntToInt64(call_2.AuxInt)
 33640  		if !(sz >= 0 && ssa.IsSameCall(sym, "runtime.memmove") && call.Uses == 1 && ssa.IsInlinableMemmove(dst, src, sz, config) && ssa.Clobber(call)) {
 33641  			break
 33642  		}
 33643  		v.Reset(ssaop.OpMove)
 33644  		v.AuxInt = ssa.Int64ToAuxInt(sz)
 33645  		v.AddArg3(dst, src, mem)
 33646  		return true
 33647  	}
 33648  	return false
 33649  }
 33650  func rewriteValue_OpShiftAllLeftInt16x8(v *ssa.Value) bool {
 33651  	v_1 := v.Args[1]
 33652  	v_0 := v.Args[0]
 33653  	b := v.Block
 33654  	typ := &b.Func.Config.Types
 33655  	// match: (ShiftAllLeftInt16x8 x y)
 33656  	// result: (VSSHL8H x (VDUPHbcast [0] (VMOVHins [0] x (CSEL <typ.UInt64> [ssaop.OpARM64LessThanU] y (MOVDconst [127]) (CMPconst [127] y)))))
 33657  	for {
 33658  		x := v_0
 33659  		y := v_1
 33660  		v.Reset(ssaop.OpARM64VSSHL8H)
 33661  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64VDUPHbcast, typ.Vec128)
 33662  		v0.AuxInt = ssa.Uint8ToAuxInt(0)
 33663  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64VMOVHins, typ.Vec128)
 33664  		v1.AuxInt = ssa.Uint8ToAuxInt(0)
 33665  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64CSEL, typ.UInt64)
 33666  		v2.AuxInt = ssa.OpToAuxInt(ssaop.OpARM64LessThanU)
 33667  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 33668  		v3.AuxInt = ssa.Int64ToAuxInt(127)
 33669  		v4 := b.NewValue0(v.Pos, ssaop.OpARM64CMPconst, types.TypeFlags)
 33670  		v4.AuxInt = ssa.Int64ToAuxInt(127)
 33671  		v4.AddArg(y)
 33672  		v2.AddArg3(y, v3, v4)
 33673  		v1.AddArg2(x, v2)
 33674  		v0.AddArg(v1)
 33675  		v.AddArg2(x, v0)
 33676  		return true
 33677  	}
 33678  }
 33679  func rewriteValue_OpShiftAllLeftInt32x4(v *ssa.Value) bool {
 33680  	v_1 := v.Args[1]
 33681  	v_0 := v.Args[0]
 33682  	b := v.Block
 33683  	typ := &b.Func.Config.Types
 33684  	// match: (ShiftAllLeftInt32x4 x y)
 33685  	// result: (VSSHL4S x (VDUPSbcast [0] (VMOVSins [0] x (CSEL <typ.UInt64> [ssaop.OpARM64LessThanU] y (MOVDconst [127]) (CMPconst [127] y)))))
 33686  	for {
 33687  		x := v_0
 33688  		y := v_1
 33689  		v.Reset(ssaop.OpARM64VSSHL4S)
 33690  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64VDUPSbcast, typ.Vec128)
 33691  		v0.AuxInt = ssa.Uint8ToAuxInt(0)
 33692  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64VMOVSins, typ.Vec128)
 33693  		v1.AuxInt = ssa.Uint8ToAuxInt(0)
 33694  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64CSEL, typ.UInt64)
 33695  		v2.AuxInt = ssa.OpToAuxInt(ssaop.OpARM64LessThanU)
 33696  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 33697  		v3.AuxInt = ssa.Int64ToAuxInt(127)
 33698  		v4 := b.NewValue0(v.Pos, ssaop.OpARM64CMPconst, types.TypeFlags)
 33699  		v4.AuxInt = ssa.Int64ToAuxInt(127)
 33700  		v4.AddArg(y)
 33701  		v2.AddArg3(y, v3, v4)
 33702  		v1.AddArg2(x, v2)
 33703  		v0.AddArg(v1)
 33704  		v.AddArg2(x, v0)
 33705  		return true
 33706  	}
 33707  }
 33708  func rewriteValue_OpShiftAllLeftInt64x2(v *ssa.Value) bool {
 33709  	v_1 := v.Args[1]
 33710  	v_0 := v.Args[0]
 33711  	b := v.Block
 33712  	typ := &b.Func.Config.Types
 33713  	// match: (ShiftAllLeftInt64x2 x y)
 33714  	// result: (VSSHL2D x (VDUPDbcast [0] (VMOVDins [0] x (CSEL <typ.UInt64> [ssaop.OpARM64LessThanU] y (MOVDconst [127]) (CMPconst [127] y)))))
 33715  	for {
 33716  		x := v_0
 33717  		y := v_1
 33718  		v.Reset(ssaop.OpARM64VSSHL2D)
 33719  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64VDUPDbcast, typ.Vec128)
 33720  		v0.AuxInt = ssa.Uint8ToAuxInt(0)
 33721  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64VMOVDins, typ.Vec128)
 33722  		v1.AuxInt = ssa.Uint8ToAuxInt(0)
 33723  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64CSEL, typ.UInt64)
 33724  		v2.AuxInt = ssa.OpToAuxInt(ssaop.OpARM64LessThanU)
 33725  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 33726  		v3.AuxInt = ssa.Int64ToAuxInt(127)
 33727  		v4 := b.NewValue0(v.Pos, ssaop.OpARM64CMPconst, types.TypeFlags)
 33728  		v4.AuxInt = ssa.Int64ToAuxInt(127)
 33729  		v4.AddArg(y)
 33730  		v2.AddArg3(y, v3, v4)
 33731  		v1.AddArg2(x, v2)
 33732  		v0.AddArg(v1)
 33733  		v.AddArg2(x, v0)
 33734  		return true
 33735  	}
 33736  }
 33737  func rewriteValue_OpShiftAllLeftInt8x16(v *ssa.Value) bool {
 33738  	v_1 := v.Args[1]
 33739  	v_0 := v.Args[0]
 33740  	b := v.Block
 33741  	typ := &b.Func.Config.Types
 33742  	// match: (ShiftAllLeftInt8x16 x y)
 33743  	// result: (VSSHL16B x (VDUPBbcast [0] (VMOVBins [0] x (CSEL <typ.UInt64> [ssaop.OpARM64LessThanU] y (MOVDconst [127]) (CMPconst [127] y)))))
 33744  	for {
 33745  		x := v_0
 33746  		y := v_1
 33747  		v.Reset(ssaop.OpARM64VSSHL16B)
 33748  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64VDUPBbcast, typ.Vec128)
 33749  		v0.AuxInt = ssa.Uint8ToAuxInt(0)
 33750  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64VMOVBins, typ.Vec128)
 33751  		v1.AuxInt = ssa.Uint8ToAuxInt(0)
 33752  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64CSEL, typ.UInt64)
 33753  		v2.AuxInt = ssa.OpToAuxInt(ssaop.OpARM64LessThanU)
 33754  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 33755  		v3.AuxInt = ssa.Int64ToAuxInt(127)
 33756  		v4 := b.NewValue0(v.Pos, ssaop.OpARM64CMPconst, types.TypeFlags)
 33757  		v4.AuxInt = ssa.Int64ToAuxInt(127)
 33758  		v4.AddArg(y)
 33759  		v2.AddArg3(y, v3, v4)
 33760  		v1.AddArg2(x, v2)
 33761  		v0.AddArg(v1)
 33762  		v.AddArg2(x, v0)
 33763  		return true
 33764  	}
 33765  }
 33766  func rewriteValue_OpShiftAllLeftUint16x8(v *ssa.Value) bool {
 33767  	v_1 := v.Args[1]
 33768  	v_0 := v.Args[0]
 33769  	b := v.Block
 33770  	typ := &b.Func.Config.Types
 33771  	// match: (ShiftAllLeftUint16x8 x y)
 33772  	// result: (VUSHL8H x (VDUPHbcast [0] (VMOVHins [0] x (CSEL <typ.UInt64> [ssaop.OpARM64LessThanU] y (MOVDconst [127]) (CMPconst [127] y)))))
 33773  	for {
 33774  		x := v_0
 33775  		y := v_1
 33776  		v.Reset(ssaop.OpARM64VUSHL8H)
 33777  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64VDUPHbcast, typ.Vec128)
 33778  		v0.AuxInt = ssa.Uint8ToAuxInt(0)
 33779  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64VMOVHins, typ.Vec128)
 33780  		v1.AuxInt = ssa.Uint8ToAuxInt(0)
 33781  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64CSEL, typ.UInt64)
 33782  		v2.AuxInt = ssa.OpToAuxInt(ssaop.OpARM64LessThanU)
 33783  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 33784  		v3.AuxInt = ssa.Int64ToAuxInt(127)
 33785  		v4 := b.NewValue0(v.Pos, ssaop.OpARM64CMPconst, types.TypeFlags)
 33786  		v4.AuxInt = ssa.Int64ToAuxInt(127)
 33787  		v4.AddArg(y)
 33788  		v2.AddArg3(y, v3, v4)
 33789  		v1.AddArg2(x, v2)
 33790  		v0.AddArg(v1)
 33791  		v.AddArg2(x, v0)
 33792  		return true
 33793  	}
 33794  }
 33795  func rewriteValue_OpShiftAllLeftUint32x4(v *ssa.Value) bool {
 33796  	v_1 := v.Args[1]
 33797  	v_0 := v.Args[0]
 33798  	b := v.Block
 33799  	typ := &b.Func.Config.Types
 33800  	// match: (ShiftAllLeftUint32x4 x y)
 33801  	// result: (VUSHL4S x (VDUPSbcast [0] (VMOVSins [0] x (CSEL <typ.UInt64> [ssaop.OpARM64LessThanU] y (MOVDconst [127]) (CMPconst [127] y)))))
 33802  	for {
 33803  		x := v_0
 33804  		y := v_1
 33805  		v.Reset(ssaop.OpARM64VUSHL4S)
 33806  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64VDUPSbcast, typ.Vec128)
 33807  		v0.AuxInt = ssa.Uint8ToAuxInt(0)
 33808  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64VMOVSins, typ.Vec128)
 33809  		v1.AuxInt = ssa.Uint8ToAuxInt(0)
 33810  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64CSEL, typ.UInt64)
 33811  		v2.AuxInt = ssa.OpToAuxInt(ssaop.OpARM64LessThanU)
 33812  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 33813  		v3.AuxInt = ssa.Int64ToAuxInt(127)
 33814  		v4 := b.NewValue0(v.Pos, ssaop.OpARM64CMPconst, types.TypeFlags)
 33815  		v4.AuxInt = ssa.Int64ToAuxInt(127)
 33816  		v4.AddArg(y)
 33817  		v2.AddArg3(y, v3, v4)
 33818  		v1.AddArg2(x, v2)
 33819  		v0.AddArg(v1)
 33820  		v.AddArg2(x, v0)
 33821  		return true
 33822  	}
 33823  }
 33824  func rewriteValue_OpShiftAllLeftUint64x2(v *ssa.Value) bool {
 33825  	v_1 := v.Args[1]
 33826  	v_0 := v.Args[0]
 33827  	b := v.Block
 33828  	typ := &b.Func.Config.Types
 33829  	// match: (ShiftAllLeftUint64x2 x y)
 33830  	// result: (VUSHL2D x (VDUPDbcast [0] (VMOVDins [0] x (CSEL <typ.UInt64> [ssaop.OpARM64LessThanU] y (MOVDconst [127]) (CMPconst [127] y)))))
 33831  	for {
 33832  		x := v_0
 33833  		y := v_1
 33834  		v.Reset(ssaop.OpARM64VUSHL2D)
 33835  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64VDUPDbcast, typ.Vec128)
 33836  		v0.AuxInt = ssa.Uint8ToAuxInt(0)
 33837  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64VMOVDins, typ.Vec128)
 33838  		v1.AuxInt = ssa.Uint8ToAuxInt(0)
 33839  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64CSEL, typ.UInt64)
 33840  		v2.AuxInt = ssa.OpToAuxInt(ssaop.OpARM64LessThanU)
 33841  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 33842  		v3.AuxInt = ssa.Int64ToAuxInt(127)
 33843  		v4 := b.NewValue0(v.Pos, ssaop.OpARM64CMPconst, types.TypeFlags)
 33844  		v4.AuxInt = ssa.Int64ToAuxInt(127)
 33845  		v4.AddArg(y)
 33846  		v2.AddArg3(y, v3, v4)
 33847  		v1.AddArg2(x, v2)
 33848  		v0.AddArg(v1)
 33849  		v.AddArg2(x, v0)
 33850  		return true
 33851  	}
 33852  }
 33853  func rewriteValue_OpShiftAllLeftUint8x16(v *ssa.Value) bool {
 33854  	v_1 := v.Args[1]
 33855  	v_0 := v.Args[0]
 33856  	b := v.Block
 33857  	typ := &b.Func.Config.Types
 33858  	// match: (ShiftAllLeftUint8x16 x y)
 33859  	// result: (VUSHL16B x (VDUPBbcast [0] (VMOVBins [0] x (CSEL <typ.UInt64> [ssaop.OpARM64LessThanU] y (MOVDconst [127]) (CMPconst [127] y)))))
 33860  	for {
 33861  		x := v_0
 33862  		y := v_1
 33863  		v.Reset(ssaop.OpARM64VUSHL16B)
 33864  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64VDUPBbcast, typ.Vec128)
 33865  		v0.AuxInt = ssa.Uint8ToAuxInt(0)
 33866  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64VMOVBins, typ.Vec128)
 33867  		v1.AuxInt = ssa.Uint8ToAuxInt(0)
 33868  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64CSEL, typ.UInt64)
 33869  		v2.AuxInt = ssa.OpToAuxInt(ssaop.OpARM64LessThanU)
 33870  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 33871  		v3.AuxInt = ssa.Int64ToAuxInt(127)
 33872  		v4 := b.NewValue0(v.Pos, ssaop.OpARM64CMPconst, types.TypeFlags)
 33873  		v4.AuxInt = ssa.Int64ToAuxInt(127)
 33874  		v4.AddArg(y)
 33875  		v2.AddArg3(y, v3, v4)
 33876  		v1.AddArg2(x, v2)
 33877  		v0.AddArg(v1)
 33878  		v.AddArg2(x, v0)
 33879  		return true
 33880  	}
 33881  }
 33882  func rewriteValue_OpShiftAllRightInt16x8(v *ssa.Value) bool {
 33883  	v_1 := v.Args[1]
 33884  	v_0 := v.Args[0]
 33885  	b := v.Block
 33886  	typ := &b.Func.Config.Types
 33887  	// match: (ShiftAllRightInt16x8 x y)
 33888  	// result: (VSSHL8H x (VDUPHbcast [0] (VMOVHins [0] x (NEG <typ.Int64> (CSEL <typ.UInt64> [ssaop.OpARM64LessThanU] y (MOVDconst [127]) (CMPconst [127] y))))))
 33889  	for {
 33890  		x := v_0
 33891  		y := v_1
 33892  		v.Reset(ssaop.OpARM64VSSHL8H)
 33893  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64VDUPHbcast, typ.Vec128)
 33894  		v0.AuxInt = ssa.Uint8ToAuxInt(0)
 33895  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64VMOVHins, typ.Vec128)
 33896  		v1.AuxInt = ssa.Uint8ToAuxInt(0)
 33897  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64NEG, typ.Int64)
 33898  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64CSEL, typ.UInt64)
 33899  		v3.AuxInt = ssa.OpToAuxInt(ssaop.OpARM64LessThanU)
 33900  		v4 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 33901  		v4.AuxInt = ssa.Int64ToAuxInt(127)
 33902  		v5 := b.NewValue0(v.Pos, ssaop.OpARM64CMPconst, types.TypeFlags)
 33903  		v5.AuxInt = ssa.Int64ToAuxInt(127)
 33904  		v5.AddArg(y)
 33905  		v3.AddArg3(y, v4, v5)
 33906  		v2.AddArg(v3)
 33907  		v1.AddArg2(x, v2)
 33908  		v0.AddArg(v1)
 33909  		v.AddArg2(x, v0)
 33910  		return true
 33911  	}
 33912  }
 33913  func rewriteValue_OpShiftAllRightInt32x4(v *ssa.Value) bool {
 33914  	v_1 := v.Args[1]
 33915  	v_0 := v.Args[0]
 33916  	b := v.Block
 33917  	typ := &b.Func.Config.Types
 33918  	// match: (ShiftAllRightInt32x4 x y)
 33919  	// result: (VSSHL4S x (VDUPSbcast [0] (VMOVSins [0] x (NEG <typ.Int64> (CSEL <typ.UInt64> [ssaop.OpARM64LessThanU] y (MOVDconst [127]) (CMPconst [127] y))))))
 33920  	for {
 33921  		x := v_0
 33922  		y := v_1
 33923  		v.Reset(ssaop.OpARM64VSSHL4S)
 33924  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64VDUPSbcast, typ.Vec128)
 33925  		v0.AuxInt = ssa.Uint8ToAuxInt(0)
 33926  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64VMOVSins, typ.Vec128)
 33927  		v1.AuxInt = ssa.Uint8ToAuxInt(0)
 33928  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64NEG, typ.Int64)
 33929  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64CSEL, typ.UInt64)
 33930  		v3.AuxInt = ssa.OpToAuxInt(ssaop.OpARM64LessThanU)
 33931  		v4 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 33932  		v4.AuxInt = ssa.Int64ToAuxInt(127)
 33933  		v5 := b.NewValue0(v.Pos, ssaop.OpARM64CMPconst, types.TypeFlags)
 33934  		v5.AuxInt = ssa.Int64ToAuxInt(127)
 33935  		v5.AddArg(y)
 33936  		v3.AddArg3(y, v4, v5)
 33937  		v2.AddArg(v3)
 33938  		v1.AddArg2(x, v2)
 33939  		v0.AddArg(v1)
 33940  		v.AddArg2(x, v0)
 33941  		return true
 33942  	}
 33943  }
 33944  func rewriteValue_OpShiftAllRightInt64x2(v *ssa.Value) bool {
 33945  	v_1 := v.Args[1]
 33946  	v_0 := v.Args[0]
 33947  	b := v.Block
 33948  	typ := &b.Func.Config.Types
 33949  	// match: (ShiftAllRightInt64x2 x y)
 33950  	// result: (VSSHL2D x (VDUPDbcast [0] (VMOVDins [0] x (NEG <typ.Int64> (CSEL <typ.UInt64> [ssaop.OpARM64LessThanU] y (MOVDconst [127]) (CMPconst [127] y))))))
 33951  	for {
 33952  		x := v_0
 33953  		y := v_1
 33954  		v.Reset(ssaop.OpARM64VSSHL2D)
 33955  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64VDUPDbcast, typ.Vec128)
 33956  		v0.AuxInt = ssa.Uint8ToAuxInt(0)
 33957  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64VMOVDins, typ.Vec128)
 33958  		v1.AuxInt = ssa.Uint8ToAuxInt(0)
 33959  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64NEG, typ.Int64)
 33960  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64CSEL, typ.UInt64)
 33961  		v3.AuxInt = ssa.OpToAuxInt(ssaop.OpARM64LessThanU)
 33962  		v4 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 33963  		v4.AuxInt = ssa.Int64ToAuxInt(127)
 33964  		v5 := b.NewValue0(v.Pos, ssaop.OpARM64CMPconst, types.TypeFlags)
 33965  		v5.AuxInt = ssa.Int64ToAuxInt(127)
 33966  		v5.AddArg(y)
 33967  		v3.AddArg3(y, v4, v5)
 33968  		v2.AddArg(v3)
 33969  		v1.AddArg2(x, v2)
 33970  		v0.AddArg(v1)
 33971  		v.AddArg2(x, v0)
 33972  		return true
 33973  	}
 33974  }
 33975  func rewriteValue_OpShiftAllRightInt8x16(v *ssa.Value) bool {
 33976  	v_1 := v.Args[1]
 33977  	v_0 := v.Args[0]
 33978  	b := v.Block
 33979  	typ := &b.Func.Config.Types
 33980  	// match: (ShiftAllRightInt8x16 x y)
 33981  	// result: (VSSHL16B x (VDUPBbcast [0] (VMOVBins [0] x (NEG <typ.Int64> (CSEL <typ.UInt64> [ssaop.OpARM64LessThanU] y (MOVDconst [127]) (CMPconst [127] y))))))
 33982  	for {
 33983  		x := v_0
 33984  		y := v_1
 33985  		v.Reset(ssaop.OpARM64VSSHL16B)
 33986  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64VDUPBbcast, typ.Vec128)
 33987  		v0.AuxInt = ssa.Uint8ToAuxInt(0)
 33988  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64VMOVBins, typ.Vec128)
 33989  		v1.AuxInt = ssa.Uint8ToAuxInt(0)
 33990  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64NEG, typ.Int64)
 33991  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64CSEL, typ.UInt64)
 33992  		v3.AuxInt = ssa.OpToAuxInt(ssaop.OpARM64LessThanU)
 33993  		v4 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 33994  		v4.AuxInt = ssa.Int64ToAuxInt(127)
 33995  		v5 := b.NewValue0(v.Pos, ssaop.OpARM64CMPconst, types.TypeFlags)
 33996  		v5.AuxInt = ssa.Int64ToAuxInt(127)
 33997  		v5.AddArg(y)
 33998  		v3.AddArg3(y, v4, v5)
 33999  		v2.AddArg(v3)
 34000  		v1.AddArg2(x, v2)
 34001  		v0.AddArg(v1)
 34002  		v.AddArg2(x, v0)
 34003  		return true
 34004  	}
 34005  }
 34006  func rewriteValue_OpShiftAllRightUint16x8(v *ssa.Value) bool {
 34007  	v_1 := v.Args[1]
 34008  	v_0 := v.Args[0]
 34009  	b := v.Block
 34010  	typ := &b.Func.Config.Types
 34011  	// match: (ShiftAllRightUint16x8 x y)
 34012  	// result: (VUSHL8H x (VDUPHbcast [0] (VMOVHins [0] x (NEG <typ.Int64> (CSEL <typ.UInt64> [ssaop.OpARM64LessThanU] y (MOVDconst [127]) (CMPconst [127] y))))))
 34013  	for {
 34014  		x := v_0
 34015  		y := v_1
 34016  		v.Reset(ssaop.OpARM64VUSHL8H)
 34017  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64VDUPHbcast, typ.Vec128)
 34018  		v0.AuxInt = ssa.Uint8ToAuxInt(0)
 34019  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64VMOVHins, typ.Vec128)
 34020  		v1.AuxInt = ssa.Uint8ToAuxInt(0)
 34021  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64NEG, typ.Int64)
 34022  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64CSEL, typ.UInt64)
 34023  		v3.AuxInt = ssa.OpToAuxInt(ssaop.OpARM64LessThanU)
 34024  		v4 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 34025  		v4.AuxInt = ssa.Int64ToAuxInt(127)
 34026  		v5 := b.NewValue0(v.Pos, ssaop.OpARM64CMPconst, types.TypeFlags)
 34027  		v5.AuxInt = ssa.Int64ToAuxInt(127)
 34028  		v5.AddArg(y)
 34029  		v3.AddArg3(y, v4, v5)
 34030  		v2.AddArg(v3)
 34031  		v1.AddArg2(x, v2)
 34032  		v0.AddArg(v1)
 34033  		v.AddArg2(x, v0)
 34034  		return true
 34035  	}
 34036  }
 34037  func rewriteValue_OpShiftAllRightUint32x4(v *ssa.Value) bool {
 34038  	v_1 := v.Args[1]
 34039  	v_0 := v.Args[0]
 34040  	b := v.Block
 34041  	typ := &b.Func.Config.Types
 34042  	// match: (ShiftAllRightUint32x4 x y)
 34043  	// result: (VUSHL4S x (VDUPSbcast [0] (VMOVSins [0] x (NEG <typ.Int64> (CSEL <typ.UInt64> [ssaop.OpARM64LessThanU] y (MOVDconst [127]) (CMPconst [127] y))))))
 34044  	for {
 34045  		x := v_0
 34046  		y := v_1
 34047  		v.Reset(ssaop.OpARM64VUSHL4S)
 34048  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64VDUPSbcast, typ.Vec128)
 34049  		v0.AuxInt = ssa.Uint8ToAuxInt(0)
 34050  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64VMOVSins, typ.Vec128)
 34051  		v1.AuxInt = ssa.Uint8ToAuxInt(0)
 34052  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64NEG, typ.Int64)
 34053  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64CSEL, typ.UInt64)
 34054  		v3.AuxInt = ssa.OpToAuxInt(ssaop.OpARM64LessThanU)
 34055  		v4 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 34056  		v4.AuxInt = ssa.Int64ToAuxInt(127)
 34057  		v5 := b.NewValue0(v.Pos, ssaop.OpARM64CMPconst, types.TypeFlags)
 34058  		v5.AuxInt = ssa.Int64ToAuxInt(127)
 34059  		v5.AddArg(y)
 34060  		v3.AddArg3(y, v4, v5)
 34061  		v2.AddArg(v3)
 34062  		v1.AddArg2(x, v2)
 34063  		v0.AddArg(v1)
 34064  		v.AddArg2(x, v0)
 34065  		return true
 34066  	}
 34067  }
 34068  func rewriteValue_OpShiftAllRightUint64x2(v *ssa.Value) bool {
 34069  	v_1 := v.Args[1]
 34070  	v_0 := v.Args[0]
 34071  	b := v.Block
 34072  	typ := &b.Func.Config.Types
 34073  	// match: (ShiftAllRightUint64x2 x y)
 34074  	// result: (VUSHL2D x (VDUPDbcast [0] (VMOVDins [0] x (NEG <typ.Int64> (CSEL <typ.UInt64> [ssaop.OpARM64LessThanU] y (MOVDconst [127]) (CMPconst [127] y))))))
 34075  	for {
 34076  		x := v_0
 34077  		y := v_1
 34078  		v.Reset(ssaop.OpARM64VUSHL2D)
 34079  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64VDUPDbcast, typ.Vec128)
 34080  		v0.AuxInt = ssa.Uint8ToAuxInt(0)
 34081  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64VMOVDins, typ.Vec128)
 34082  		v1.AuxInt = ssa.Uint8ToAuxInt(0)
 34083  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64NEG, typ.Int64)
 34084  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64CSEL, typ.UInt64)
 34085  		v3.AuxInt = ssa.OpToAuxInt(ssaop.OpARM64LessThanU)
 34086  		v4 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 34087  		v4.AuxInt = ssa.Int64ToAuxInt(127)
 34088  		v5 := b.NewValue0(v.Pos, ssaop.OpARM64CMPconst, types.TypeFlags)
 34089  		v5.AuxInt = ssa.Int64ToAuxInt(127)
 34090  		v5.AddArg(y)
 34091  		v3.AddArg3(y, v4, v5)
 34092  		v2.AddArg(v3)
 34093  		v1.AddArg2(x, v2)
 34094  		v0.AddArg(v1)
 34095  		v.AddArg2(x, v0)
 34096  		return true
 34097  	}
 34098  }
 34099  func rewriteValue_OpShiftAllRightUint8x16(v *ssa.Value) bool {
 34100  	v_1 := v.Args[1]
 34101  	v_0 := v.Args[0]
 34102  	b := v.Block
 34103  	typ := &b.Func.Config.Types
 34104  	// match: (ShiftAllRightUint8x16 x y)
 34105  	// result: (VUSHL16B x (VDUPBbcast [0] (VMOVBins [0] x (NEG <typ.Int64> (CSEL <typ.UInt64> [ssaop.OpARM64LessThanU] y (MOVDconst [127]) (CMPconst [127] y))))))
 34106  	for {
 34107  		x := v_0
 34108  		y := v_1
 34109  		v.Reset(ssaop.OpARM64VUSHL16B)
 34110  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64VDUPBbcast, typ.Vec128)
 34111  		v0.AuxInt = ssa.Uint8ToAuxInt(0)
 34112  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64VMOVBins, typ.Vec128)
 34113  		v1.AuxInt = ssa.Uint8ToAuxInt(0)
 34114  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64NEG, typ.Int64)
 34115  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64CSEL, typ.UInt64)
 34116  		v3.AuxInt = ssa.OpToAuxInt(ssaop.OpARM64LessThanU)
 34117  		v4 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 34118  		v4.AuxInt = ssa.Int64ToAuxInt(127)
 34119  		v5 := b.NewValue0(v.Pos, ssaop.OpARM64CMPconst, types.TypeFlags)
 34120  		v5.AuxInt = ssa.Int64ToAuxInt(127)
 34121  		v5.AddArg(y)
 34122  		v3.AddArg3(y, v4, v5)
 34123  		v2.AddArg(v3)
 34124  		v1.AddArg2(x, v2)
 34125  		v0.AddArg(v1)
 34126  		v.AddArg2(x, v0)
 34127  		return true
 34128  	}
 34129  }
 34130  func rewriteValue_OpSlicemask(v *ssa.Value) bool {
 34131  	v_0 := v.Args[0]
 34132  	b := v.Block
 34133  	// match: (Slicemask <t> x)
 34134  	// result: (SRAconst (NEG <t> x) [63])
 34135  	for {
 34136  		t := v.Type
 34137  		x := v_0
 34138  		v.Reset(ssaop.OpARM64SRAconst)
 34139  		v.AuxInt = ssa.Int64ToAuxInt(63)
 34140  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64NEG, t)
 34141  		v0.AddArg(x)
 34142  		v.AddArg(v0)
 34143  		return true
 34144  	}
 34145  }
 34146  func rewriteValue_OpSqrtFloat32s(v *ssa.Value) bool {
 34147  	v_0 := v.Args[0]
 34148  	b := v.Block
 34149  	typ := &b.Func.Config.Types
 34150  	// match: (SqrtFloat32s x)
 34151  	// result: (ZFSQRTS x (Select0 <types.TypeMask> (PWHILELTS (MOVDconst [0]) (MOVDconst [8]))))
 34152  	for {
 34153  		x := v_0
 34154  		v.Reset(ssaop.OpARM64ZFSQRTS)
 34155  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 34156  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTS, types.NewTuple(typ.Mask, types.TypeFlags))
 34157  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 34158  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 34159  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 34160  		v3.AuxInt = ssa.Int64ToAuxInt(8)
 34161  		v1.AddArg2(v2, v3)
 34162  		v0.AddArg(v1)
 34163  		v.AddArg2(x, v0)
 34164  		return true
 34165  	}
 34166  }
 34167  func rewriteValue_OpSqrtFloat64s(v *ssa.Value) bool {
 34168  	v_0 := v.Args[0]
 34169  	b := v.Block
 34170  	typ := &b.Func.Config.Types
 34171  	// match: (SqrtFloat64s x)
 34172  	// result: (ZFSQRTD x (Select0 <types.TypeMask> (PWHILELTD (MOVDconst [0]) (MOVDconst [4]))))
 34173  	for {
 34174  		x := v_0
 34175  		v.Reset(ssaop.OpARM64ZFSQRTD)
 34176  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 34177  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTD, types.NewTuple(typ.Mask, types.TypeFlags))
 34178  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 34179  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 34180  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 34181  		v3.AuxInt = ssa.Int64ToAuxInt(4)
 34182  		v1.AddArg2(v2, v3)
 34183  		v0.AddArg(v1)
 34184  		v.AddArg2(x, v0)
 34185  		return true
 34186  	}
 34187  }
 34188  func rewriteValue_OpStore(v *ssa.Value) bool {
 34189  	v_2 := v.Args[2]
 34190  	v_1 := v.Args[1]
 34191  	v_0 := v.Args[0]
 34192  	b := v.Block
 34193  	typ := &b.Func.Config.Types
 34194  	// match: (Store {t} ptr val mem)
 34195  	// cond: t.Size() == 1
 34196  	// result: (MOVBstore ptr val mem)
 34197  	for {
 34198  		t := ssa.AuxToType(v.Aux)
 34199  		ptr := v_0
 34200  		val := v_1
 34201  		mem := v_2
 34202  		if !(t.Size() == 1) {
 34203  			break
 34204  		}
 34205  		v.Reset(ssaop.OpARM64MOVBstore)
 34206  		v.AddArg3(ptr, val, mem)
 34207  		return true
 34208  	}
 34209  	// match: (Store {t} ptr val mem)
 34210  	// cond: t.Size() == 2
 34211  	// result: (MOVHstore ptr val mem)
 34212  	for {
 34213  		t := ssa.AuxToType(v.Aux)
 34214  		ptr := v_0
 34215  		val := v_1
 34216  		mem := v_2
 34217  		if !(t.Size() == 2) {
 34218  			break
 34219  		}
 34220  		v.Reset(ssaop.OpARM64MOVHstore)
 34221  		v.AddArg3(ptr, val, mem)
 34222  		return true
 34223  	}
 34224  	// match: (Store {t} ptr val mem)
 34225  	// cond: t.Size() == 4 && !t.IsFloat()
 34226  	// result: (MOVWstore ptr val mem)
 34227  	for {
 34228  		t := ssa.AuxToType(v.Aux)
 34229  		ptr := v_0
 34230  		val := v_1
 34231  		mem := v_2
 34232  		if !(t.Size() == 4 && !t.IsFloat()) {
 34233  			break
 34234  		}
 34235  		v.Reset(ssaop.OpARM64MOVWstore)
 34236  		v.AddArg3(ptr, val, mem)
 34237  		return true
 34238  	}
 34239  	// match: (Store {t} ptr val mem)
 34240  	// cond: t.Size() == 8 && !t.IsFloat() && !t.IsSIMD()
 34241  	// result: (MOVDstore ptr val mem)
 34242  	for {
 34243  		t := ssa.AuxToType(v.Aux)
 34244  		ptr := v_0
 34245  		val := v_1
 34246  		mem := v_2
 34247  		if !(t.Size() == 8 && !t.IsFloat() && !t.IsSIMD()) {
 34248  			break
 34249  		}
 34250  		v.Reset(ssaop.OpARM64MOVDstore)
 34251  		v.AddArg3(ptr, val, mem)
 34252  		return true
 34253  	}
 34254  	// match: (Store {t} ptr val mem)
 34255  	// cond: t.Size() == 4 && t.IsFloat()
 34256  	// result: (FMOVSstore ptr val mem)
 34257  	for {
 34258  		t := ssa.AuxToType(v.Aux)
 34259  		ptr := v_0
 34260  		val := v_1
 34261  		mem := v_2
 34262  		if !(t.Size() == 4 && t.IsFloat()) {
 34263  			break
 34264  		}
 34265  		v.Reset(ssaop.OpARM64FMOVSstore)
 34266  		v.AddArg3(ptr, val, mem)
 34267  		return true
 34268  	}
 34269  	// match: (Store {t} ptr val mem)
 34270  	// cond: t.Size() == 8 && t.IsFloat()
 34271  	// result: (FMOVDstore ptr val mem)
 34272  	for {
 34273  		t := ssa.AuxToType(v.Aux)
 34274  		ptr := v_0
 34275  		val := v_1
 34276  		mem := v_2
 34277  		if !(t.Size() == 8 && t.IsFloat()) {
 34278  			break
 34279  		}
 34280  		v.Reset(ssaop.OpARM64FMOVDstore)
 34281  		v.AddArg3(ptr, val, mem)
 34282  		return true
 34283  	}
 34284  	// match: (Store {t} ptr val mem)
 34285  	// cond: t.Size() == 16
 34286  	// result: (FMOVQstore ptr val mem)
 34287  	for {
 34288  		t := ssa.AuxToType(v.Aux)
 34289  		ptr := v_0
 34290  		val := v_1
 34291  		mem := v_2
 34292  		if !(t.Size() == 16) {
 34293  			break
 34294  		}
 34295  		v.Reset(ssaop.OpARM64FMOVQstore)
 34296  		v.AddArg3(ptr, val, mem)
 34297  		return true
 34298  	}
 34299  	// match: (Store {t} ptr val mem)
 34300  	// cond: t.Size() == 32 && t.IsSIMD()
 34301  	// result: (ZSTRstore ptr val mem)
 34302  	for {
 34303  		t := ssa.AuxToType(v.Aux)
 34304  		ptr := v_0
 34305  		val := v_1
 34306  		mem := v_2
 34307  		if !(t.Size() == 32 && t.IsSIMD()) {
 34308  			break
 34309  		}
 34310  		v.Reset(ssaop.OpARM64ZSTRstore)
 34311  		v.AddArg3(ptr, val, mem)
 34312  		return true
 34313  	}
 34314  	// match: (Store {t} ptr val mem)
 34315  	// cond: t.Size() == 8 && t.IsSIMD()
 34316  	// result: (PSTRstore ptr val (MOVDstore ptr (MOVDconst [0]) mem))
 34317  	for {
 34318  		t := ssa.AuxToType(v.Aux)
 34319  		ptr := v_0
 34320  		val := v_1
 34321  		mem := v_2
 34322  		if !(t.Size() == 8 && t.IsSIMD()) {
 34323  			break
 34324  		}
 34325  		v.Reset(ssaop.OpARM64PSTRstore)
 34326  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDstore, types.TypeMem)
 34327  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 34328  		v1.AuxInt = ssa.Int64ToAuxInt(0)
 34329  		v0.AddArg3(ptr, v1, mem)
 34330  		v.AddArg3(ptr, val, v0)
 34331  		return true
 34332  	}
 34333  	return false
 34334  }
 34335  func rewriteValue_OpStoreMasked8(v *ssa.Value) bool {
 34336  	v_3 := v.Args[3]
 34337  	v_2 := v.Args[2]
 34338  	v_1 := v.Args[1]
 34339  	v_0 := v.Args[0]
 34340  	// match: (StoreMasked8 {t} ptr mask val mem)
 34341  	// cond: t.Size() == 32
 34342  	// result: (ZST1BPredstore ptr val mask mem)
 34343  	for {
 34344  		t := ssa.AuxToType(v.Aux)
 34345  		ptr := v_0
 34346  		mask := v_1
 34347  		val := v_2
 34348  		mem := v_3
 34349  		if !(t.Size() == 32) {
 34350  			break
 34351  		}
 34352  		v.Reset(ssaop.OpARM64ZST1BPredstore)
 34353  		v.AddArg4(ptr, val, mask, mem)
 34354  		return true
 34355  	}
 34356  	return false
 34357  }
 34358  func rewriteValue_OpTruncFloat32s(v *ssa.Value) bool {
 34359  	v_0 := v.Args[0]
 34360  	b := v.Block
 34361  	typ := &b.Func.Config.Types
 34362  	// match: (TruncFloat32s x)
 34363  	// result: (ZFRINTZS x (Select0 <types.TypeMask> (PWHILELTS (MOVDconst [0]) (MOVDconst [8]))))
 34364  	for {
 34365  		x := v_0
 34366  		v.Reset(ssaop.OpARM64ZFRINTZS)
 34367  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 34368  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTS, types.NewTuple(typ.Mask, types.TypeFlags))
 34369  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 34370  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 34371  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 34372  		v3.AuxInt = ssa.Int64ToAuxInt(8)
 34373  		v1.AddArg2(v2, v3)
 34374  		v0.AddArg(v1)
 34375  		v.AddArg2(x, v0)
 34376  		return true
 34377  	}
 34378  }
 34379  func rewriteValue_OpTruncFloat64s(v *ssa.Value) bool {
 34380  	v_0 := v.Args[0]
 34381  	b := v.Block
 34382  	typ := &b.Func.Config.Types
 34383  	// match: (TruncFloat64s x)
 34384  	// result: (ZFRINTZD x (Select0 <types.TypeMask> (PWHILELTD (MOVDconst [0]) (MOVDconst [4]))))
 34385  	for {
 34386  		x := v_0
 34387  		v.Reset(ssaop.OpARM64ZFRINTZD)
 34388  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 34389  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTD, types.NewTuple(typ.Mask, types.TypeFlags))
 34390  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 34391  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 34392  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 34393  		v3.AuxInt = ssa.Int64ToAuxInt(4)
 34394  		v1.AddArg2(v2, v3)
 34395  		v0.AddArg(v1)
 34396  		v.AddArg2(x, v0)
 34397  		return true
 34398  	}
 34399  }
 34400  func rewriteValue_OpZero(v *ssa.Value) bool {
 34401  	v_1 := v.Args[1]
 34402  	v_0 := v.Args[0]
 34403  	b := v.Block
 34404  	typ := &b.Func.Config.Types
 34405  	// match: (Zero [0] _ mem)
 34406  	// result: mem
 34407  	for {
 34408  		if ssa.AuxIntToInt64(v.AuxInt) != 0 {
 34409  			break
 34410  		}
 34411  		mem := v_1
 34412  		v.CopyOf(mem)
 34413  		return true
 34414  	}
 34415  	// match: (Zero [1] ptr mem)
 34416  	// result: (MOVBstore ptr (MOVDconst [0]) mem)
 34417  	for {
 34418  		if ssa.AuxIntToInt64(v.AuxInt) != 1 {
 34419  			break
 34420  		}
 34421  		ptr := v_0
 34422  		mem := v_1
 34423  		v.Reset(ssaop.OpARM64MOVBstore)
 34424  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 34425  		v0.AuxInt = ssa.Int64ToAuxInt(0)
 34426  		v.AddArg3(ptr, v0, mem)
 34427  		return true
 34428  	}
 34429  	// match: (Zero [2] ptr mem)
 34430  	// result: (MOVHstore ptr (MOVDconst [0]) mem)
 34431  	for {
 34432  		if ssa.AuxIntToInt64(v.AuxInt) != 2 {
 34433  			break
 34434  		}
 34435  		ptr := v_0
 34436  		mem := v_1
 34437  		v.Reset(ssaop.OpARM64MOVHstore)
 34438  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 34439  		v0.AuxInt = ssa.Int64ToAuxInt(0)
 34440  		v.AddArg3(ptr, v0, mem)
 34441  		return true
 34442  	}
 34443  	// match: (Zero [4] ptr mem)
 34444  	// result: (MOVWstore ptr (MOVDconst [0]) mem)
 34445  	for {
 34446  		if ssa.AuxIntToInt64(v.AuxInt) != 4 {
 34447  			break
 34448  		}
 34449  		ptr := v_0
 34450  		mem := v_1
 34451  		v.Reset(ssaop.OpARM64MOVWstore)
 34452  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 34453  		v0.AuxInt = ssa.Int64ToAuxInt(0)
 34454  		v.AddArg3(ptr, v0, mem)
 34455  		return true
 34456  	}
 34457  	// match: (Zero [3] ptr mem)
 34458  	// result: (MOVBstore [2] ptr (MOVDconst [0]) (MOVHstore ptr (MOVDconst [0]) mem))
 34459  	for {
 34460  		if ssa.AuxIntToInt64(v.AuxInt) != 3 {
 34461  			break
 34462  		}
 34463  		ptr := v_0
 34464  		mem := v_1
 34465  		v.Reset(ssaop.OpARM64MOVBstore)
 34466  		v.AuxInt = ssa.Int32ToAuxInt(2)
 34467  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 34468  		v0.AuxInt = ssa.Int64ToAuxInt(0)
 34469  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64MOVHstore, types.TypeMem)
 34470  		v1.AddArg3(ptr, v0, mem)
 34471  		v.AddArg3(ptr, v0, v1)
 34472  		return true
 34473  	}
 34474  	// match: (Zero [5] ptr mem)
 34475  	// result: (MOVBstore [4] ptr (MOVDconst [0]) (MOVWstore ptr (MOVDconst [0]) mem))
 34476  	for {
 34477  		if ssa.AuxIntToInt64(v.AuxInt) != 5 {
 34478  			break
 34479  		}
 34480  		ptr := v_0
 34481  		mem := v_1
 34482  		v.Reset(ssaop.OpARM64MOVBstore)
 34483  		v.AuxInt = ssa.Int32ToAuxInt(4)
 34484  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 34485  		v0.AuxInt = ssa.Int64ToAuxInt(0)
 34486  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64MOVWstore, types.TypeMem)
 34487  		v1.AddArg3(ptr, v0, mem)
 34488  		v.AddArg3(ptr, v0, v1)
 34489  		return true
 34490  	}
 34491  	// match: (Zero [6] ptr mem)
 34492  	// result: (MOVHstore [4] ptr (MOVDconst [0]) (MOVWstore ptr (MOVDconst [0]) mem))
 34493  	for {
 34494  		if ssa.AuxIntToInt64(v.AuxInt) != 6 {
 34495  			break
 34496  		}
 34497  		ptr := v_0
 34498  		mem := v_1
 34499  		v.Reset(ssaop.OpARM64MOVHstore)
 34500  		v.AuxInt = ssa.Int32ToAuxInt(4)
 34501  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 34502  		v0.AuxInt = ssa.Int64ToAuxInt(0)
 34503  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64MOVWstore, types.TypeMem)
 34504  		v1.AddArg3(ptr, v0, mem)
 34505  		v.AddArg3(ptr, v0, v1)
 34506  		return true
 34507  	}
 34508  	// match: (Zero [7] ptr mem)
 34509  	// result: (MOVWstore [3] ptr (MOVDconst [0]) (MOVWstore ptr (MOVDconst [0]) mem))
 34510  	for {
 34511  		if ssa.AuxIntToInt64(v.AuxInt) != 7 {
 34512  			break
 34513  		}
 34514  		ptr := v_0
 34515  		mem := v_1
 34516  		v.Reset(ssaop.OpARM64MOVWstore)
 34517  		v.AuxInt = ssa.Int32ToAuxInt(3)
 34518  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 34519  		v0.AuxInt = ssa.Int64ToAuxInt(0)
 34520  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64MOVWstore, types.TypeMem)
 34521  		v1.AddArg3(ptr, v0, mem)
 34522  		v.AddArg3(ptr, v0, v1)
 34523  		return true
 34524  	}
 34525  	// match: (Zero [8] ptr mem)
 34526  	// result: (MOVDstore ptr (MOVDconst [0]) mem)
 34527  	for {
 34528  		if ssa.AuxIntToInt64(v.AuxInt) != 8 {
 34529  			break
 34530  		}
 34531  		ptr := v_0
 34532  		mem := v_1
 34533  		v.Reset(ssaop.OpARM64MOVDstore)
 34534  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 34535  		v0.AuxInt = ssa.Int64ToAuxInt(0)
 34536  		v.AddArg3(ptr, v0, mem)
 34537  		return true
 34538  	}
 34539  	// match: (Zero [9] ptr mem)
 34540  	// result: (MOVBstore [8] ptr (MOVDconst [0]) (MOVDstore ptr (MOVDconst [0]) mem))
 34541  	for {
 34542  		if ssa.AuxIntToInt64(v.AuxInt) != 9 {
 34543  			break
 34544  		}
 34545  		ptr := v_0
 34546  		mem := v_1
 34547  		v.Reset(ssaop.OpARM64MOVBstore)
 34548  		v.AuxInt = ssa.Int32ToAuxInt(8)
 34549  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 34550  		v0.AuxInt = ssa.Int64ToAuxInt(0)
 34551  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDstore, types.TypeMem)
 34552  		v1.AddArg3(ptr, v0, mem)
 34553  		v.AddArg3(ptr, v0, v1)
 34554  		return true
 34555  	}
 34556  	// match: (Zero [10] ptr mem)
 34557  	// result: (MOVHstore [8] ptr (MOVDconst [0]) (MOVDstore ptr (MOVDconst [0]) mem))
 34558  	for {
 34559  		if ssa.AuxIntToInt64(v.AuxInt) != 10 {
 34560  			break
 34561  		}
 34562  		ptr := v_0
 34563  		mem := v_1
 34564  		v.Reset(ssaop.OpARM64MOVHstore)
 34565  		v.AuxInt = ssa.Int32ToAuxInt(8)
 34566  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 34567  		v0.AuxInt = ssa.Int64ToAuxInt(0)
 34568  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDstore, types.TypeMem)
 34569  		v1.AddArg3(ptr, v0, mem)
 34570  		v.AddArg3(ptr, v0, v1)
 34571  		return true
 34572  	}
 34573  	// match: (Zero [11] ptr mem)
 34574  	// result: (MOVDstore [3] ptr (MOVDconst [0]) (MOVDstore ptr (MOVDconst [0]) mem))
 34575  	for {
 34576  		if ssa.AuxIntToInt64(v.AuxInt) != 11 {
 34577  			break
 34578  		}
 34579  		ptr := v_0
 34580  		mem := v_1
 34581  		v.Reset(ssaop.OpARM64MOVDstore)
 34582  		v.AuxInt = ssa.Int32ToAuxInt(3)
 34583  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 34584  		v0.AuxInt = ssa.Int64ToAuxInt(0)
 34585  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDstore, types.TypeMem)
 34586  		v1.AddArg3(ptr, v0, mem)
 34587  		v.AddArg3(ptr, v0, v1)
 34588  		return true
 34589  	}
 34590  	// match: (Zero [12] ptr mem)
 34591  	// result: (MOVWstore [8] ptr (MOVDconst [0]) (MOVDstore ptr (MOVDconst [0]) mem))
 34592  	for {
 34593  		if ssa.AuxIntToInt64(v.AuxInt) != 12 {
 34594  			break
 34595  		}
 34596  		ptr := v_0
 34597  		mem := v_1
 34598  		v.Reset(ssaop.OpARM64MOVWstore)
 34599  		v.AuxInt = ssa.Int32ToAuxInt(8)
 34600  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 34601  		v0.AuxInt = ssa.Int64ToAuxInt(0)
 34602  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDstore, types.TypeMem)
 34603  		v1.AddArg3(ptr, v0, mem)
 34604  		v.AddArg3(ptr, v0, v1)
 34605  		return true
 34606  	}
 34607  	// match: (Zero [13] ptr mem)
 34608  	// result: (MOVDstore [5] ptr (MOVDconst [0]) (MOVDstore ptr (MOVDconst [0]) mem))
 34609  	for {
 34610  		if ssa.AuxIntToInt64(v.AuxInt) != 13 {
 34611  			break
 34612  		}
 34613  		ptr := v_0
 34614  		mem := v_1
 34615  		v.Reset(ssaop.OpARM64MOVDstore)
 34616  		v.AuxInt = ssa.Int32ToAuxInt(5)
 34617  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 34618  		v0.AuxInt = ssa.Int64ToAuxInt(0)
 34619  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDstore, types.TypeMem)
 34620  		v1.AddArg3(ptr, v0, mem)
 34621  		v.AddArg3(ptr, v0, v1)
 34622  		return true
 34623  	}
 34624  	// match: (Zero [14] ptr mem)
 34625  	// result: (MOVDstore [6] ptr (MOVDconst [0]) (MOVDstore ptr (MOVDconst [0]) mem))
 34626  	for {
 34627  		if ssa.AuxIntToInt64(v.AuxInt) != 14 {
 34628  			break
 34629  		}
 34630  		ptr := v_0
 34631  		mem := v_1
 34632  		v.Reset(ssaop.OpARM64MOVDstore)
 34633  		v.AuxInt = ssa.Int32ToAuxInt(6)
 34634  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 34635  		v0.AuxInt = ssa.Int64ToAuxInt(0)
 34636  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDstore, types.TypeMem)
 34637  		v1.AddArg3(ptr, v0, mem)
 34638  		v.AddArg3(ptr, v0, v1)
 34639  		return true
 34640  	}
 34641  	// match: (Zero [15] ptr mem)
 34642  	// result: (MOVDstore [7] ptr (MOVDconst [0]) (MOVDstore ptr (MOVDconst [0]) mem))
 34643  	for {
 34644  		if ssa.AuxIntToInt64(v.AuxInt) != 15 {
 34645  			break
 34646  		}
 34647  		ptr := v_0
 34648  		mem := v_1
 34649  		v.Reset(ssaop.OpARM64MOVDstore)
 34650  		v.AuxInt = ssa.Int32ToAuxInt(7)
 34651  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 34652  		v0.AuxInt = ssa.Int64ToAuxInt(0)
 34653  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDstore, types.TypeMem)
 34654  		v1.AddArg3(ptr, v0, mem)
 34655  		v.AddArg3(ptr, v0, v1)
 34656  		return true
 34657  	}
 34658  	// match: (Zero [16] ptr mem)
 34659  	// result: (STP [0] ptr (MOVDconst [0]) (MOVDconst [0]) mem)
 34660  	for {
 34661  		if ssa.AuxIntToInt64(v.AuxInt) != 16 {
 34662  			break
 34663  		}
 34664  		ptr := v_0
 34665  		mem := v_1
 34666  		v.Reset(ssaop.OpARM64STP)
 34667  		v.AuxInt = ssa.Int32ToAuxInt(0)
 34668  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 34669  		v0.AuxInt = ssa.Int64ToAuxInt(0)
 34670  		v.AddArg4(ptr, v0, v0, mem)
 34671  		return true
 34672  	}
 34673  	// match: (Zero [s] ptr mem)
 34674  	// cond: s > 16 && s < 192
 34675  	// result: (LoweredZero [s] ptr mem)
 34676  	for {
 34677  		s := ssa.AuxIntToInt64(v.AuxInt)
 34678  		ptr := v_0
 34679  		mem := v_1
 34680  		if !(s > 16 && s < 192) {
 34681  			break
 34682  		}
 34683  		v.Reset(ssaop.OpARM64LoweredZero)
 34684  		v.AuxInt = ssa.Int64ToAuxInt(s)
 34685  		v.AddArg2(ptr, mem)
 34686  		return true
 34687  	}
 34688  	// match: (Zero [s] ptr mem)
 34689  	// cond: s >= 192
 34690  	// result: (LoweredZeroLoop [s] ptr mem)
 34691  	for {
 34692  		s := ssa.AuxIntToInt64(v.AuxInt)
 34693  		ptr := v_0
 34694  		mem := v_1
 34695  		if !(s >= 192) {
 34696  			break
 34697  		}
 34698  		v.Reset(ssaop.OpARM64LoweredZeroLoop)
 34699  		v.AuxInt = ssa.Int64ToAuxInt(s)
 34700  		v.AddArg2(ptr, mem)
 34701  		return true
 34702  	}
 34703  	return false
 34704  }
 34705  func rewriteValue_OpZeroSIMD(v *ssa.Value) bool {
 34706  	// match: (ZeroSIMD <t>)
 34707  	// cond: t.Size() == 16
 34708  	// result: (VMOVI16B [0] <t>)
 34709  	for {
 34710  		t := v.Type
 34711  		if !(t.Size() == 16) {
 34712  			break
 34713  		}
 34714  		v.Reset(ssaop.OpARM64VMOVI16B)
 34715  		v.Type = t
 34716  		v.AuxInt = ssa.Uint8ToAuxInt(0)
 34717  		return true
 34718  	}
 34719  	// match: (ZeroSIMD <t>)
 34720  	// cond: t.Size() == 32 && t.IsSIMD()
 34721  	// result: (ZDUPBconst [0])
 34722  	for {
 34723  		t := v.Type
 34724  		if !(t.Size() == 32 && t.IsSIMD()) {
 34725  			break
 34726  		}
 34727  		v.Reset(ssaop.OpARM64ZDUPBconst)
 34728  		v.AuxInt = ssa.Int8ToAuxInt(0)
 34729  		return true
 34730  	}
 34731  	// match: (ZeroSIMD <t>)
 34732  	// cond: t.Size() == 8 && t.IsSIMD()
 34733  	// result: (PPFALSEB)
 34734  	for {
 34735  		t := v.Type
 34736  		if !(t.Size() == 8 && t.IsSIMD()) {
 34737  			break
 34738  		}
 34739  		v.Reset(ssaop.OpARM64PPFALSEB)
 34740  		return true
 34741  	}
 34742  	return false
 34743  }
 34744  func rewriteValue_Opbroadcast1To16Int8x16(v *ssa.Value) bool {
 34745  	v_0 := v.Args[0]
 34746  	// match: (broadcast1To16Int8x16 x)
 34747  	// result: (VDUPBbcast [0] x)
 34748  	for {
 34749  		x := v_0
 34750  		v.Reset(ssaop.OpARM64VDUPBbcast)
 34751  		v.AuxInt = ssa.Uint8ToAuxInt(0)
 34752  		v.AddArg(x)
 34753  		return true
 34754  	}
 34755  }
 34756  func rewriteValue_Opbroadcast1To16Uint8x16(v *ssa.Value) bool {
 34757  	v_0 := v.Args[0]
 34758  	// match: (broadcast1To16Uint8x16 x)
 34759  	// result: (VDUPBbcast [0] x)
 34760  	for {
 34761  		x := v_0
 34762  		v.Reset(ssaop.OpARM64VDUPBbcast)
 34763  		v.AuxInt = ssa.Uint8ToAuxInt(0)
 34764  		v.AddArg(x)
 34765  		return true
 34766  	}
 34767  }
 34768  func rewriteValue_Opbroadcast1To2Float64x2(v *ssa.Value) bool {
 34769  	v_0 := v.Args[0]
 34770  	// match: (broadcast1To2Float64x2 x)
 34771  	// result: (VDUPDbcast [0] x)
 34772  	for {
 34773  		x := v_0
 34774  		v.Reset(ssaop.OpARM64VDUPDbcast)
 34775  		v.AuxInt = ssa.Uint8ToAuxInt(0)
 34776  		v.AddArg(x)
 34777  		return true
 34778  	}
 34779  }
 34780  func rewriteValue_Opbroadcast1To2Int64x2(v *ssa.Value) bool {
 34781  	v_0 := v.Args[0]
 34782  	// match: (broadcast1To2Int64x2 x)
 34783  	// result: (VDUPDbcast [0] x)
 34784  	for {
 34785  		x := v_0
 34786  		v.Reset(ssaop.OpARM64VDUPDbcast)
 34787  		v.AuxInt = ssa.Uint8ToAuxInt(0)
 34788  		v.AddArg(x)
 34789  		return true
 34790  	}
 34791  }
 34792  func rewriteValue_Opbroadcast1To2Uint64x2(v *ssa.Value) bool {
 34793  	v_0 := v.Args[0]
 34794  	// match: (broadcast1To2Uint64x2 x)
 34795  	// result: (VDUPDbcast [0] x)
 34796  	for {
 34797  		x := v_0
 34798  		v.Reset(ssaop.OpARM64VDUPDbcast)
 34799  		v.AuxInt = ssa.Uint8ToAuxInt(0)
 34800  		v.AddArg(x)
 34801  		return true
 34802  	}
 34803  }
 34804  func rewriteValue_Opbroadcast1To4Float32x4(v *ssa.Value) bool {
 34805  	v_0 := v.Args[0]
 34806  	// match: (broadcast1To4Float32x4 x)
 34807  	// result: (VDUPSbcast [0] x)
 34808  	for {
 34809  		x := v_0
 34810  		v.Reset(ssaop.OpARM64VDUPSbcast)
 34811  		v.AuxInt = ssa.Uint8ToAuxInt(0)
 34812  		v.AddArg(x)
 34813  		return true
 34814  	}
 34815  }
 34816  func rewriteValue_Opbroadcast1To4Int32x4(v *ssa.Value) bool {
 34817  	v_0 := v.Args[0]
 34818  	// match: (broadcast1To4Int32x4 x)
 34819  	// result: (VDUPSbcast [0] x)
 34820  	for {
 34821  		x := v_0
 34822  		v.Reset(ssaop.OpARM64VDUPSbcast)
 34823  		v.AuxInt = ssa.Uint8ToAuxInt(0)
 34824  		v.AddArg(x)
 34825  		return true
 34826  	}
 34827  }
 34828  func rewriteValue_Opbroadcast1To4Uint32x4(v *ssa.Value) bool {
 34829  	v_0 := v.Args[0]
 34830  	// match: (broadcast1To4Uint32x4 x)
 34831  	// result: (VDUPSbcast [0] x)
 34832  	for {
 34833  		x := v_0
 34834  		v.Reset(ssaop.OpARM64VDUPSbcast)
 34835  		v.AuxInt = ssa.Uint8ToAuxInt(0)
 34836  		v.AddArg(x)
 34837  		return true
 34838  	}
 34839  }
 34840  func rewriteValue_Opbroadcast1To8Int16x8(v *ssa.Value) bool {
 34841  	v_0 := v.Args[0]
 34842  	// match: (broadcast1To8Int16x8 x)
 34843  	// result: (VDUPHbcast [0] x)
 34844  	for {
 34845  		x := v_0
 34846  		v.Reset(ssaop.OpARM64VDUPHbcast)
 34847  		v.AuxInt = ssa.Uint8ToAuxInt(0)
 34848  		v.AddArg(x)
 34849  		return true
 34850  	}
 34851  }
 34852  func rewriteValue_Opbroadcast1To8Uint16x8(v *ssa.Value) bool {
 34853  	v_0 := v.Args[0]
 34854  	// match: (broadcast1To8Uint16x8 x)
 34855  	// result: (VDUPHbcast [0] x)
 34856  	for {
 34857  		x := v_0
 34858  		v.Reset(ssaop.OpARM64VDUPHbcast)
 34859  		v.AuxInt = ssa.Uint8ToAuxInt(0)
 34860  		v.AddArg(x)
 34861  		return true
 34862  	}
 34863  }
 34864  func RewriteBlock(b *ssa.Block) bool {
 34865  	typ := &b.Func.Config.Types
 34866  	switch b.Kind {
 34867  	case block.BlockARM64EQ:
 34868  		// match: (EQ (CMPconst [0] z:(AND x y)) yes no)
 34869  		// cond: z.Uses == 1
 34870  		// result: (EQ (TST x y) yes no)
 34871  		for b.Controls[0].Op == ssaop.OpARM64CMPconst {
 34872  			v_0 := b.Controls[0]
 34873  			if ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
 34874  				break
 34875  			}
 34876  			z := v_0.Args[0]
 34877  			if z.Op != ssaop.OpARM64AND {
 34878  				break
 34879  			}
 34880  			_ = z.Args[1]
 34881  			z_0 := z.Args[0]
 34882  			z_1 := z.Args[1]
 34883  			for _i0 := 0; _i0 <= 1; _i0, z_0, z_1 = _i0+1, z_1, z_0 {
 34884  				x := z_0
 34885  				y := z_1
 34886  				if !(z.Uses == 1) {
 34887  					continue
 34888  				}
 34889  				v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64TST, types.TypeFlags)
 34890  				v0.AddArg2(x, y)
 34891  				b.ResetWithControl(block.BlockARM64EQ, v0)
 34892  				return true
 34893  			}
 34894  			break
 34895  		}
 34896  		// match: (EQ (CMPconst [0] x:(ANDconst [c] y)) yes no)
 34897  		// cond: x.Uses == 1
 34898  		// result: (EQ (TSTconst [c] y) yes no)
 34899  		for b.Controls[0].Op == ssaop.OpARM64CMPconst {
 34900  			v_0 := b.Controls[0]
 34901  			if ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
 34902  				break
 34903  			}
 34904  			x := v_0.Args[0]
 34905  			if x.Op != ssaop.OpARM64ANDconst {
 34906  				break
 34907  			}
 34908  			c := ssa.AuxIntToInt64(x.AuxInt)
 34909  			y := x.Args[0]
 34910  			if !(x.Uses == 1) {
 34911  				break
 34912  			}
 34913  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64TSTconst, types.TypeFlags)
 34914  			v0.AuxInt = ssa.Int64ToAuxInt(c)
 34915  			v0.AddArg(y)
 34916  			b.ResetWithControl(block.BlockARM64EQ, v0)
 34917  			return true
 34918  		}
 34919  		// match: (EQ (CMPWconst [0] z:(AND x y)) yes no)
 34920  		// cond: z.Uses == 1
 34921  		// result: (EQ (TSTW x y) yes no)
 34922  		for b.Controls[0].Op == ssaop.OpARM64CMPWconst {
 34923  			v_0 := b.Controls[0]
 34924  			if ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
 34925  				break
 34926  			}
 34927  			z := v_0.Args[0]
 34928  			if z.Op != ssaop.OpARM64AND {
 34929  				break
 34930  			}
 34931  			_ = z.Args[1]
 34932  			z_0 := z.Args[0]
 34933  			z_1 := z.Args[1]
 34934  			for _i0 := 0; _i0 <= 1; _i0, z_0, z_1 = _i0+1, z_1, z_0 {
 34935  				x := z_0
 34936  				y := z_1
 34937  				if !(z.Uses == 1) {
 34938  					continue
 34939  				}
 34940  				v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64TSTW, types.TypeFlags)
 34941  				v0.AddArg2(x, y)
 34942  				b.ResetWithControl(block.BlockARM64EQ, v0)
 34943  				return true
 34944  			}
 34945  			break
 34946  		}
 34947  		// match: (EQ (CMPWconst [0] x:(ANDconst [c] y)) yes no)
 34948  		// cond: x.Uses == 1
 34949  		// result: (EQ (TSTWconst [int32(c)] y) yes no)
 34950  		for b.Controls[0].Op == ssaop.OpARM64CMPWconst {
 34951  			v_0 := b.Controls[0]
 34952  			if ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
 34953  				break
 34954  			}
 34955  			x := v_0.Args[0]
 34956  			if x.Op != ssaop.OpARM64ANDconst {
 34957  				break
 34958  			}
 34959  			c := ssa.AuxIntToInt64(x.AuxInt)
 34960  			y := x.Args[0]
 34961  			if !(x.Uses == 1) {
 34962  				break
 34963  			}
 34964  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64TSTWconst, types.TypeFlags)
 34965  			v0.AuxInt = ssa.Int32ToAuxInt(int32(c))
 34966  			v0.AddArg(y)
 34967  			b.ResetWithControl(block.BlockARM64EQ, v0)
 34968  			return true
 34969  		}
 34970  		// match: (EQ (CMPconst [0] x:(ADDconst [c] y)) yes no)
 34971  		// cond: x.Uses == 1
 34972  		// result: (EQ (CMNconst [c] y) yes no)
 34973  		for b.Controls[0].Op == ssaop.OpARM64CMPconst {
 34974  			v_0 := b.Controls[0]
 34975  			if ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
 34976  				break
 34977  			}
 34978  			x := v_0.Args[0]
 34979  			if x.Op != ssaop.OpARM64ADDconst {
 34980  				break
 34981  			}
 34982  			c := ssa.AuxIntToInt64(x.AuxInt)
 34983  			y := x.Args[0]
 34984  			if !(x.Uses == 1) {
 34985  				break
 34986  			}
 34987  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMNconst, types.TypeFlags)
 34988  			v0.AuxInt = ssa.Int64ToAuxInt(c)
 34989  			v0.AddArg(y)
 34990  			b.ResetWithControl(block.BlockARM64EQ, v0)
 34991  			return true
 34992  		}
 34993  		// match: (EQ (CMPWconst [0] x:(ADDconst [c] y)) yes no)
 34994  		// cond: x.Uses == 1
 34995  		// result: (EQ (CMNWconst [int32(c)] y) yes no)
 34996  		for b.Controls[0].Op == ssaop.OpARM64CMPWconst {
 34997  			v_0 := b.Controls[0]
 34998  			if ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
 34999  				break
 35000  			}
 35001  			x := v_0.Args[0]
 35002  			if x.Op != ssaop.OpARM64ADDconst {
 35003  				break
 35004  			}
 35005  			c := ssa.AuxIntToInt64(x.AuxInt)
 35006  			y := x.Args[0]
 35007  			if !(x.Uses == 1) {
 35008  				break
 35009  			}
 35010  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMNWconst, types.TypeFlags)
 35011  			v0.AuxInt = ssa.Int32ToAuxInt(int32(c))
 35012  			v0.AddArg(y)
 35013  			b.ResetWithControl(block.BlockARM64EQ, v0)
 35014  			return true
 35015  		}
 35016  		// match: (EQ (CMPconst [0] z:(ADD x y)) yes no)
 35017  		// cond: z.Uses == 1
 35018  		// result: (EQ (CMN x y) yes no)
 35019  		for b.Controls[0].Op == ssaop.OpARM64CMPconst {
 35020  			v_0 := b.Controls[0]
 35021  			if ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
 35022  				break
 35023  			}
 35024  			z := v_0.Args[0]
 35025  			if z.Op != ssaop.OpARM64ADD {
 35026  				break
 35027  			}
 35028  			_ = z.Args[1]
 35029  			z_0 := z.Args[0]
 35030  			z_1 := z.Args[1]
 35031  			for _i0 := 0; _i0 <= 1; _i0, z_0, z_1 = _i0+1, z_1, z_0 {
 35032  				x := z_0
 35033  				y := z_1
 35034  				if !(z.Uses == 1) {
 35035  					continue
 35036  				}
 35037  				v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMN, types.TypeFlags)
 35038  				v0.AddArg2(x, y)
 35039  				b.ResetWithControl(block.BlockARM64EQ, v0)
 35040  				return true
 35041  			}
 35042  			break
 35043  		}
 35044  		// match: (EQ (CMPWconst [0] z:(ADD x y)) yes no)
 35045  		// cond: z.Uses == 1
 35046  		// result: (EQ (CMNW x y) yes no)
 35047  		for b.Controls[0].Op == ssaop.OpARM64CMPWconst {
 35048  			v_0 := b.Controls[0]
 35049  			if ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
 35050  				break
 35051  			}
 35052  			z := v_0.Args[0]
 35053  			if z.Op != ssaop.OpARM64ADD {
 35054  				break
 35055  			}
 35056  			_ = z.Args[1]
 35057  			z_0 := z.Args[0]
 35058  			z_1 := z.Args[1]
 35059  			for _i0 := 0; _i0 <= 1; _i0, z_0, z_1 = _i0+1, z_1, z_0 {
 35060  				x := z_0
 35061  				y := z_1
 35062  				if !(z.Uses == 1) {
 35063  					continue
 35064  				}
 35065  				v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMNW, types.TypeFlags)
 35066  				v0.AddArg2(x, y)
 35067  				b.ResetWithControl(block.BlockARM64EQ, v0)
 35068  				return true
 35069  			}
 35070  			break
 35071  		}
 35072  		// match: (EQ (CMP x z:(NEG y)) yes no)
 35073  		// cond: z.Uses == 1
 35074  		// result: (EQ (CMN x y) yes no)
 35075  		for b.Controls[0].Op == ssaop.OpARM64CMP {
 35076  			v_0 := b.Controls[0]
 35077  			_ = v_0.Args[1]
 35078  			x := v_0.Args[0]
 35079  			z := v_0.Args[1]
 35080  			if z.Op != ssaop.OpARM64NEG {
 35081  				break
 35082  			}
 35083  			y := z.Args[0]
 35084  			if !(z.Uses == 1) {
 35085  				break
 35086  			}
 35087  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMN, types.TypeFlags)
 35088  			v0.AddArg2(x, y)
 35089  			b.ResetWithControl(block.BlockARM64EQ, v0)
 35090  			return true
 35091  		}
 35092  		// match: (EQ (CMPW x z:(NEG y)) yes no)
 35093  		// cond: z.Uses == 1
 35094  		// result: (EQ (CMNW x y) yes no)
 35095  		for b.Controls[0].Op == ssaop.OpARM64CMPW {
 35096  			v_0 := b.Controls[0]
 35097  			_ = v_0.Args[1]
 35098  			x := v_0.Args[0]
 35099  			z := v_0.Args[1]
 35100  			if z.Op != ssaop.OpARM64NEG {
 35101  				break
 35102  			}
 35103  			y := z.Args[0]
 35104  			if !(z.Uses == 1) {
 35105  				break
 35106  			}
 35107  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMNW, types.TypeFlags)
 35108  			v0.AddArg2(x, y)
 35109  			b.ResetWithControl(block.BlockARM64EQ, v0)
 35110  			return true
 35111  		}
 35112  		// match: (EQ (CMPconst [0] x) yes no)
 35113  		// result: (Z x yes no)
 35114  		for b.Controls[0].Op == ssaop.OpARM64CMPconst {
 35115  			v_0 := b.Controls[0]
 35116  			if ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
 35117  				break
 35118  			}
 35119  			x := v_0.Args[0]
 35120  			b.ResetWithControl(block.BlockARM64Z, x)
 35121  			return true
 35122  		}
 35123  		// match: (EQ (CMPWconst [0] x) yes no)
 35124  		// result: (ZW x yes no)
 35125  		for b.Controls[0].Op == ssaop.OpARM64CMPWconst {
 35126  			v_0 := b.Controls[0]
 35127  			if ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
 35128  				break
 35129  			}
 35130  			x := v_0.Args[0]
 35131  			b.ResetWithControl(block.BlockARM64ZW, x)
 35132  			return true
 35133  		}
 35134  		// match: (EQ (CMPconst [0] z:(MADD a x y)) yes no)
 35135  		// cond: z.Uses==1
 35136  		// result: (EQ (CMN a (MUL <x.Type> x y)) yes no)
 35137  		for b.Controls[0].Op == ssaop.OpARM64CMPconst {
 35138  			v_0 := b.Controls[0]
 35139  			if ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
 35140  				break
 35141  			}
 35142  			z := v_0.Args[0]
 35143  			if z.Op != ssaop.OpARM64MADD {
 35144  				break
 35145  			}
 35146  			y := z.Args[2]
 35147  			a := z.Args[0]
 35148  			x := z.Args[1]
 35149  			if !(z.Uses == 1) {
 35150  				break
 35151  			}
 35152  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMN, types.TypeFlags)
 35153  			v1 := b.NewValue0(v_0.Pos, ssaop.OpARM64MUL, x.Type)
 35154  			v1.AddArg2(x, y)
 35155  			v0.AddArg2(a, v1)
 35156  			b.ResetWithControl(block.BlockARM64EQ, v0)
 35157  			return true
 35158  		}
 35159  		// match: (EQ (CMPWconst [0] z:(MADDW a x y)) yes no)
 35160  		// cond: z.Uses==1
 35161  		// result: (EQ (CMNW a (MULW <x.Type> x y)) yes no)
 35162  		for b.Controls[0].Op == ssaop.OpARM64CMPWconst {
 35163  			v_0 := b.Controls[0]
 35164  			if ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
 35165  				break
 35166  			}
 35167  			z := v_0.Args[0]
 35168  			if z.Op != ssaop.OpARM64MADDW {
 35169  				break
 35170  			}
 35171  			y := z.Args[2]
 35172  			a := z.Args[0]
 35173  			x := z.Args[1]
 35174  			if !(z.Uses == 1) {
 35175  				break
 35176  			}
 35177  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMNW, types.TypeFlags)
 35178  			v1 := b.NewValue0(v_0.Pos, ssaop.OpARM64MULW, x.Type)
 35179  			v1.AddArg2(x, y)
 35180  			v0.AddArg2(a, v1)
 35181  			b.ResetWithControl(block.BlockARM64EQ, v0)
 35182  			return true
 35183  		}
 35184  		// match: (EQ (CMPconst [0] z:(MSUB a x y)) yes no)
 35185  		// cond: z.Uses==1
 35186  		// result: (EQ (CMP a (MUL <x.Type> x y)) yes no)
 35187  		for b.Controls[0].Op == ssaop.OpARM64CMPconst {
 35188  			v_0 := b.Controls[0]
 35189  			if ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
 35190  				break
 35191  			}
 35192  			z := v_0.Args[0]
 35193  			if z.Op != ssaop.OpARM64MSUB {
 35194  				break
 35195  			}
 35196  			y := z.Args[2]
 35197  			a := z.Args[0]
 35198  			x := z.Args[1]
 35199  			if !(z.Uses == 1) {
 35200  				break
 35201  			}
 35202  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMP, types.TypeFlags)
 35203  			v1 := b.NewValue0(v_0.Pos, ssaop.OpARM64MUL, x.Type)
 35204  			v1.AddArg2(x, y)
 35205  			v0.AddArg2(a, v1)
 35206  			b.ResetWithControl(block.BlockARM64EQ, v0)
 35207  			return true
 35208  		}
 35209  		// match: (EQ (CMPWconst [0] z:(MSUBW a x y)) yes no)
 35210  		// cond: z.Uses==1
 35211  		// result: (EQ (CMPW a (MULW <x.Type> x y)) yes no)
 35212  		for b.Controls[0].Op == ssaop.OpARM64CMPWconst {
 35213  			v_0 := b.Controls[0]
 35214  			if ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
 35215  				break
 35216  			}
 35217  			z := v_0.Args[0]
 35218  			if z.Op != ssaop.OpARM64MSUBW {
 35219  				break
 35220  			}
 35221  			y := z.Args[2]
 35222  			a := z.Args[0]
 35223  			x := z.Args[1]
 35224  			if !(z.Uses == 1) {
 35225  				break
 35226  			}
 35227  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMPW, types.TypeFlags)
 35228  			v1 := b.NewValue0(v_0.Pos, ssaop.OpARM64MULW, x.Type)
 35229  			v1.AddArg2(x, y)
 35230  			v0.AddArg2(a, v1)
 35231  			b.ResetWithControl(block.BlockARM64EQ, v0)
 35232  			return true
 35233  		}
 35234  		// match: (EQ (TSTconst [c] x) yes no)
 35235  		// cond: ssa.OneBit(c)
 35236  		// result: (TBZ [int64(ssa.Ntz64(c))] x yes no)
 35237  		for b.Controls[0].Op == ssaop.OpARM64TSTconst {
 35238  			v_0 := b.Controls[0]
 35239  			c := ssa.AuxIntToInt64(v_0.AuxInt)
 35240  			x := v_0.Args[0]
 35241  			if !(ssa.OneBit(c)) {
 35242  				break
 35243  			}
 35244  			b.ResetWithControl(block.BlockARM64TBZ, x)
 35245  			b.AuxInt = ssa.Int64ToAuxInt(int64(ssa.Ntz64(c)))
 35246  			return true
 35247  		}
 35248  		// match: (EQ (TSTWconst [c] x) yes no)
 35249  		// cond: ssa.OneBit(int64(uint32(c)))
 35250  		// result: (TBZ [int64(ssa.Ntz64(int64(uint32(c))))] x yes no)
 35251  		for b.Controls[0].Op == ssaop.OpARM64TSTWconst {
 35252  			v_0 := b.Controls[0]
 35253  			c := ssa.AuxIntToInt32(v_0.AuxInt)
 35254  			x := v_0.Args[0]
 35255  			if !(ssa.OneBit(int64(uint32(c)))) {
 35256  				break
 35257  			}
 35258  			b.ResetWithControl(block.BlockARM64TBZ, x)
 35259  			b.AuxInt = ssa.Int64ToAuxInt(int64(ssa.Ntz64(int64(uint32(c)))))
 35260  			return true
 35261  		}
 35262  		// match: (EQ (FlagConstant [fc]) yes no)
 35263  		// cond: fc.Eq()
 35264  		// result: (First yes no)
 35265  		for b.Controls[0].Op == ssaop.OpARM64FlagConstant {
 35266  			v_0 := b.Controls[0]
 35267  			fc := ssa.AuxIntToFlagConstant(v_0.AuxInt)
 35268  			if !(fc.Eq()) {
 35269  				break
 35270  			}
 35271  			b.Reset(block.BlockFirst)
 35272  			return true
 35273  		}
 35274  		// match: (EQ (FlagConstant [fc]) yes no)
 35275  		// cond: !fc.Eq()
 35276  		// result: (First no yes)
 35277  		for b.Controls[0].Op == ssaop.OpARM64FlagConstant {
 35278  			v_0 := b.Controls[0]
 35279  			fc := ssa.AuxIntToFlagConstant(v_0.AuxInt)
 35280  			if !(!fc.Eq()) {
 35281  				break
 35282  			}
 35283  			b.Reset(block.BlockFirst)
 35284  			b.SwapSuccessors()
 35285  			return true
 35286  		}
 35287  		// match: (EQ (InvertFlags cmp) yes no)
 35288  		// result: (EQ cmp yes no)
 35289  		for b.Controls[0].Op == ssaop.OpARM64InvertFlags {
 35290  			v_0 := b.Controls[0]
 35291  			cmp := v_0.Args[0]
 35292  			b.ResetWithControl(block.BlockARM64EQ, cmp)
 35293  			return true
 35294  		}
 35295  	case block.BlockARM64FGE:
 35296  		// match: (FGE (InvertFlags cmp) yes no)
 35297  		// result: (FLE cmp yes no)
 35298  		for b.Controls[0].Op == ssaop.OpARM64InvertFlags {
 35299  			v_0 := b.Controls[0]
 35300  			cmp := v_0.Args[0]
 35301  			b.ResetWithControl(block.BlockARM64FLE, cmp)
 35302  			return true
 35303  		}
 35304  	case block.BlockARM64FGT:
 35305  		// match: (FGT (InvertFlags cmp) yes no)
 35306  		// result: (FLT cmp yes no)
 35307  		for b.Controls[0].Op == ssaop.OpARM64InvertFlags {
 35308  			v_0 := b.Controls[0]
 35309  			cmp := v_0.Args[0]
 35310  			b.ResetWithControl(block.BlockARM64FLT, cmp)
 35311  			return true
 35312  		}
 35313  	case block.BlockARM64FLE:
 35314  		// match: (FLE (InvertFlags cmp) yes no)
 35315  		// result: (FGE cmp yes no)
 35316  		for b.Controls[0].Op == ssaop.OpARM64InvertFlags {
 35317  			v_0 := b.Controls[0]
 35318  			cmp := v_0.Args[0]
 35319  			b.ResetWithControl(block.BlockARM64FGE, cmp)
 35320  			return true
 35321  		}
 35322  	case block.BlockARM64FLT:
 35323  		// match: (FLT (InvertFlags cmp) yes no)
 35324  		// result: (FGT cmp yes no)
 35325  		for b.Controls[0].Op == ssaop.OpARM64InvertFlags {
 35326  			v_0 := b.Controls[0]
 35327  			cmp := v_0.Args[0]
 35328  			b.ResetWithControl(block.BlockARM64FGT, cmp)
 35329  			return true
 35330  		}
 35331  	case block.BlockARM64GE:
 35332  		// match: (GE (CMPconst [0] z:(AND x y)) yes no)
 35333  		// cond: z.Uses == 1
 35334  		// result: (GE (TST x y) yes no)
 35335  		for b.Controls[0].Op == ssaop.OpARM64CMPconst {
 35336  			v_0 := b.Controls[0]
 35337  			if ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
 35338  				break
 35339  			}
 35340  			z := v_0.Args[0]
 35341  			if z.Op != ssaop.OpARM64AND {
 35342  				break
 35343  			}
 35344  			_ = z.Args[1]
 35345  			z_0 := z.Args[0]
 35346  			z_1 := z.Args[1]
 35347  			for _i0 := 0; _i0 <= 1; _i0, z_0, z_1 = _i0+1, z_1, z_0 {
 35348  				x := z_0
 35349  				y := z_1
 35350  				if !(z.Uses == 1) {
 35351  					continue
 35352  				}
 35353  				v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64TST, types.TypeFlags)
 35354  				v0.AddArg2(x, y)
 35355  				b.ResetWithControl(block.BlockARM64GE, v0)
 35356  				return true
 35357  			}
 35358  			break
 35359  		}
 35360  		// match: (GE (CMPconst [0] x:(ANDconst [c] y)) yes no)
 35361  		// cond: x.Uses == 1
 35362  		// result: (GE (TSTconst [c] y) yes no)
 35363  		for b.Controls[0].Op == ssaop.OpARM64CMPconst {
 35364  			v_0 := b.Controls[0]
 35365  			if ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
 35366  				break
 35367  			}
 35368  			x := v_0.Args[0]
 35369  			if x.Op != ssaop.OpARM64ANDconst {
 35370  				break
 35371  			}
 35372  			c := ssa.AuxIntToInt64(x.AuxInt)
 35373  			y := x.Args[0]
 35374  			if !(x.Uses == 1) {
 35375  				break
 35376  			}
 35377  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64TSTconst, types.TypeFlags)
 35378  			v0.AuxInt = ssa.Int64ToAuxInt(c)
 35379  			v0.AddArg(y)
 35380  			b.ResetWithControl(block.BlockARM64GE, v0)
 35381  			return true
 35382  		}
 35383  		// match: (GE (CMPWconst [0] z:(AND x y)) yes no)
 35384  		// cond: z.Uses == 1
 35385  		// result: (GE (TSTW x y) yes no)
 35386  		for b.Controls[0].Op == ssaop.OpARM64CMPWconst {
 35387  			v_0 := b.Controls[0]
 35388  			if ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
 35389  				break
 35390  			}
 35391  			z := v_0.Args[0]
 35392  			if z.Op != ssaop.OpARM64AND {
 35393  				break
 35394  			}
 35395  			_ = z.Args[1]
 35396  			z_0 := z.Args[0]
 35397  			z_1 := z.Args[1]
 35398  			for _i0 := 0; _i0 <= 1; _i0, z_0, z_1 = _i0+1, z_1, z_0 {
 35399  				x := z_0
 35400  				y := z_1
 35401  				if !(z.Uses == 1) {
 35402  					continue
 35403  				}
 35404  				v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64TSTW, types.TypeFlags)
 35405  				v0.AddArg2(x, y)
 35406  				b.ResetWithControl(block.BlockARM64GE, v0)
 35407  				return true
 35408  			}
 35409  			break
 35410  		}
 35411  		// match: (GE (CMPWconst [0] x:(ANDconst [c] y)) yes no)
 35412  		// cond: x.Uses == 1
 35413  		// result: (GE (TSTWconst [int32(c)] y) yes no)
 35414  		for b.Controls[0].Op == ssaop.OpARM64CMPWconst {
 35415  			v_0 := b.Controls[0]
 35416  			if ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
 35417  				break
 35418  			}
 35419  			x := v_0.Args[0]
 35420  			if x.Op != ssaop.OpARM64ANDconst {
 35421  				break
 35422  			}
 35423  			c := ssa.AuxIntToInt64(x.AuxInt)
 35424  			y := x.Args[0]
 35425  			if !(x.Uses == 1) {
 35426  				break
 35427  			}
 35428  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64TSTWconst, types.TypeFlags)
 35429  			v0.AuxInt = ssa.Int32ToAuxInt(int32(c))
 35430  			v0.AddArg(y)
 35431  			b.ResetWithControl(block.BlockARM64GE, v0)
 35432  			return true
 35433  		}
 35434  		// match: (GE (CMPconst [0] x:(ADDconst [c] y)) yes no)
 35435  		// cond: x.Uses == 1
 35436  		// result: (GEnoov (CMNconst [c] y) yes no)
 35437  		for b.Controls[0].Op == ssaop.OpARM64CMPconst {
 35438  			v_0 := b.Controls[0]
 35439  			if ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
 35440  				break
 35441  			}
 35442  			x := v_0.Args[0]
 35443  			if x.Op != ssaop.OpARM64ADDconst {
 35444  				break
 35445  			}
 35446  			c := ssa.AuxIntToInt64(x.AuxInt)
 35447  			y := x.Args[0]
 35448  			if !(x.Uses == 1) {
 35449  				break
 35450  			}
 35451  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMNconst, types.TypeFlags)
 35452  			v0.AuxInt = ssa.Int64ToAuxInt(c)
 35453  			v0.AddArg(y)
 35454  			b.ResetWithControl(block.BlockARM64GEnoov, v0)
 35455  			return true
 35456  		}
 35457  		// match: (GE (CMPWconst [0] x:(ADDconst [c] y)) yes no)
 35458  		// cond: x.Uses == 1
 35459  		// result: (GEnoov (CMNWconst [int32(c)] y) yes no)
 35460  		for b.Controls[0].Op == ssaop.OpARM64CMPWconst {
 35461  			v_0 := b.Controls[0]
 35462  			if ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
 35463  				break
 35464  			}
 35465  			x := v_0.Args[0]
 35466  			if x.Op != ssaop.OpARM64ADDconst {
 35467  				break
 35468  			}
 35469  			c := ssa.AuxIntToInt64(x.AuxInt)
 35470  			y := x.Args[0]
 35471  			if !(x.Uses == 1) {
 35472  				break
 35473  			}
 35474  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMNWconst, types.TypeFlags)
 35475  			v0.AuxInt = ssa.Int32ToAuxInt(int32(c))
 35476  			v0.AddArg(y)
 35477  			b.ResetWithControl(block.BlockARM64GEnoov, v0)
 35478  			return true
 35479  		}
 35480  		// match: (GE (CMPconst [0] z:(ADD x y)) yes no)
 35481  		// cond: z.Uses == 1
 35482  		// result: (GEnoov (CMN x y) yes no)
 35483  		for b.Controls[0].Op == ssaop.OpARM64CMPconst {
 35484  			v_0 := b.Controls[0]
 35485  			if ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
 35486  				break
 35487  			}
 35488  			z := v_0.Args[0]
 35489  			if z.Op != ssaop.OpARM64ADD {
 35490  				break
 35491  			}
 35492  			_ = z.Args[1]
 35493  			z_0 := z.Args[0]
 35494  			z_1 := z.Args[1]
 35495  			for _i0 := 0; _i0 <= 1; _i0, z_0, z_1 = _i0+1, z_1, z_0 {
 35496  				x := z_0
 35497  				y := z_1
 35498  				if !(z.Uses == 1) {
 35499  					continue
 35500  				}
 35501  				v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMN, types.TypeFlags)
 35502  				v0.AddArg2(x, y)
 35503  				b.ResetWithControl(block.BlockARM64GEnoov, v0)
 35504  				return true
 35505  			}
 35506  			break
 35507  		}
 35508  		// match: (GE (CMPWconst [0] z:(ADD x y)) yes no)
 35509  		// cond: z.Uses == 1
 35510  		// result: (GEnoov (CMNW x y) yes no)
 35511  		for b.Controls[0].Op == ssaop.OpARM64CMPWconst {
 35512  			v_0 := b.Controls[0]
 35513  			if ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
 35514  				break
 35515  			}
 35516  			z := v_0.Args[0]
 35517  			if z.Op != ssaop.OpARM64ADD {
 35518  				break
 35519  			}
 35520  			_ = z.Args[1]
 35521  			z_0 := z.Args[0]
 35522  			z_1 := z.Args[1]
 35523  			for _i0 := 0; _i0 <= 1; _i0, z_0, z_1 = _i0+1, z_1, z_0 {
 35524  				x := z_0
 35525  				y := z_1
 35526  				if !(z.Uses == 1) {
 35527  					continue
 35528  				}
 35529  				v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMNW, types.TypeFlags)
 35530  				v0.AddArg2(x, y)
 35531  				b.ResetWithControl(block.BlockARM64GEnoov, v0)
 35532  				return true
 35533  			}
 35534  			break
 35535  		}
 35536  		// match: (GE (CMPconst [0] z:(MADD a x y)) yes no)
 35537  		// cond: z.Uses==1
 35538  		// result: (GEnoov (CMN a (MUL <x.Type> x y)) yes no)
 35539  		for b.Controls[0].Op == ssaop.OpARM64CMPconst {
 35540  			v_0 := b.Controls[0]
 35541  			if ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
 35542  				break
 35543  			}
 35544  			z := v_0.Args[0]
 35545  			if z.Op != ssaop.OpARM64MADD {
 35546  				break
 35547  			}
 35548  			y := z.Args[2]
 35549  			a := z.Args[0]
 35550  			x := z.Args[1]
 35551  			if !(z.Uses == 1) {
 35552  				break
 35553  			}
 35554  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMN, types.TypeFlags)
 35555  			v1 := b.NewValue0(v_0.Pos, ssaop.OpARM64MUL, x.Type)
 35556  			v1.AddArg2(x, y)
 35557  			v0.AddArg2(a, v1)
 35558  			b.ResetWithControl(block.BlockARM64GEnoov, v0)
 35559  			return true
 35560  		}
 35561  		// match: (GE (CMPWconst [0] z:(MADDW a x y)) yes no)
 35562  		// cond: z.Uses==1
 35563  		// result: (GEnoov (CMNW a (MULW <x.Type> x y)) yes no)
 35564  		for b.Controls[0].Op == ssaop.OpARM64CMPWconst {
 35565  			v_0 := b.Controls[0]
 35566  			if ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
 35567  				break
 35568  			}
 35569  			z := v_0.Args[0]
 35570  			if z.Op != ssaop.OpARM64MADDW {
 35571  				break
 35572  			}
 35573  			y := z.Args[2]
 35574  			a := z.Args[0]
 35575  			x := z.Args[1]
 35576  			if !(z.Uses == 1) {
 35577  				break
 35578  			}
 35579  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMNW, types.TypeFlags)
 35580  			v1 := b.NewValue0(v_0.Pos, ssaop.OpARM64MULW, x.Type)
 35581  			v1.AddArg2(x, y)
 35582  			v0.AddArg2(a, v1)
 35583  			b.ResetWithControl(block.BlockARM64GEnoov, v0)
 35584  			return true
 35585  		}
 35586  		// match: (GE (CMPWconst [0] x) yes no)
 35587  		// result: (TBZ [31] x yes no)
 35588  		for b.Controls[0].Op == ssaop.OpARM64CMPWconst {
 35589  			v_0 := b.Controls[0]
 35590  			if ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
 35591  				break
 35592  			}
 35593  			x := v_0.Args[0]
 35594  			b.ResetWithControl(block.BlockARM64TBZ, x)
 35595  			b.AuxInt = ssa.Int64ToAuxInt(31)
 35596  			return true
 35597  		}
 35598  		// match: (GE (CMPconst [0] x) yes no)
 35599  		// result: (TBZ [63] x yes no)
 35600  		for b.Controls[0].Op == ssaop.OpARM64CMPconst {
 35601  			v_0 := b.Controls[0]
 35602  			if ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
 35603  				break
 35604  			}
 35605  			x := v_0.Args[0]
 35606  			b.ResetWithControl(block.BlockARM64TBZ, x)
 35607  			b.AuxInt = ssa.Int64ToAuxInt(63)
 35608  			return true
 35609  		}
 35610  		// match: (GE (CMPWconst [128] x) yes no)
 35611  		// cond: ssa.ZeroUpper56Bits(x)
 35612  		// result: (TBNZ [7] x yes no)
 35613  		for b.Controls[0].Op == ssaop.OpARM64CMPWconst {
 35614  			v_0 := b.Controls[0]
 35615  			if ssa.AuxIntToInt32(v_0.AuxInt) != 128 {
 35616  				break
 35617  			}
 35618  			x := v_0.Args[0]
 35619  			if !(ssa.ZeroUpper56Bits(x)) {
 35620  				break
 35621  			}
 35622  			b.ResetWithControl(block.BlockARM64TBNZ, x)
 35623  			b.AuxInt = ssa.Int64ToAuxInt(7)
 35624  			return true
 35625  		}
 35626  		// match: (GE (CMPconst [128] x) yes no)
 35627  		// cond: ssa.ZeroUpper56Bits(x)
 35628  		// result: (TBNZ [7] x yes no)
 35629  		for b.Controls[0].Op == ssaop.OpARM64CMPconst {
 35630  			v_0 := b.Controls[0]
 35631  			if ssa.AuxIntToInt64(v_0.AuxInt) != 128 {
 35632  				break
 35633  			}
 35634  			x := v_0.Args[0]
 35635  			if !(ssa.ZeroUpper56Bits(x)) {
 35636  				break
 35637  			}
 35638  			b.ResetWithControl(block.BlockARM64TBNZ, x)
 35639  			b.AuxInt = ssa.Int64ToAuxInt(7)
 35640  			return true
 35641  		}
 35642  		// match: (GE (FlagConstant [fc]) yes no)
 35643  		// cond: fc.Ge()
 35644  		// result: (First yes no)
 35645  		for b.Controls[0].Op == ssaop.OpARM64FlagConstant {
 35646  			v_0 := b.Controls[0]
 35647  			fc := ssa.AuxIntToFlagConstant(v_0.AuxInt)
 35648  			if !(fc.Ge()) {
 35649  				break
 35650  			}
 35651  			b.Reset(block.BlockFirst)
 35652  			return true
 35653  		}
 35654  		// match: (GE (FlagConstant [fc]) yes no)
 35655  		// cond: !fc.Ge()
 35656  		// result: (First no yes)
 35657  		for b.Controls[0].Op == ssaop.OpARM64FlagConstant {
 35658  			v_0 := b.Controls[0]
 35659  			fc := ssa.AuxIntToFlagConstant(v_0.AuxInt)
 35660  			if !(!fc.Ge()) {
 35661  				break
 35662  			}
 35663  			b.Reset(block.BlockFirst)
 35664  			b.SwapSuccessors()
 35665  			return true
 35666  		}
 35667  		// match: (GE (InvertFlags cmp) yes no)
 35668  		// result: (LE cmp yes no)
 35669  		for b.Controls[0].Op == ssaop.OpARM64InvertFlags {
 35670  			v_0 := b.Controls[0]
 35671  			cmp := v_0.Args[0]
 35672  			b.ResetWithControl(block.BlockARM64LE, cmp)
 35673  			return true
 35674  		}
 35675  	case block.BlockARM64GEnoov:
 35676  		// match: (GEnoov (FlagConstant [fc]) yes no)
 35677  		// cond: fc.GeNoov()
 35678  		// result: (First yes no)
 35679  		for b.Controls[0].Op == ssaop.OpARM64FlagConstant {
 35680  			v_0 := b.Controls[0]
 35681  			fc := ssa.AuxIntToFlagConstant(v_0.AuxInt)
 35682  			if !(fc.GeNoov()) {
 35683  				break
 35684  			}
 35685  			b.Reset(block.BlockFirst)
 35686  			return true
 35687  		}
 35688  		// match: (GEnoov (FlagConstant [fc]) yes no)
 35689  		// cond: !fc.GeNoov()
 35690  		// result: (First no yes)
 35691  		for b.Controls[0].Op == ssaop.OpARM64FlagConstant {
 35692  			v_0 := b.Controls[0]
 35693  			fc := ssa.AuxIntToFlagConstant(v_0.AuxInt)
 35694  			if !(!fc.GeNoov()) {
 35695  				break
 35696  			}
 35697  			b.Reset(block.BlockFirst)
 35698  			b.SwapSuccessors()
 35699  			return true
 35700  		}
 35701  	case block.BlockARM64GT:
 35702  		// match: (GT (CMPconst [0] z:(AND x y)) yes no)
 35703  		// cond: z.Uses == 1
 35704  		// result: (GT (TST x y) yes no)
 35705  		for b.Controls[0].Op == ssaop.OpARM64CMPconst {
 35706  			v_0 := b.Controls[0]
 35707  			if ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
 35708  				break
 35709  			}
 35710  			z := v_0.Args[0]
 35711  			if z.Op != ssaop.OpARM64AND {
 35712  				break
 35713  			}
 35714  			_ = z.Args[1]
 35715  			z_0 := z.Args[0]
 35716  			z_1 := z.Args[1]
 35717  			for _i0 := 0; _i0 <= 1; _i0, z_0, z_1 = _i0+1, z_1, z_0 {
 35718  				x := z_0
 35719  				y := z_1
 35720  				if !(z.Uses == 1) {
 35721  					continue
 35722  				}
 35723  				v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64TST, types.TypeFlags)
 35724  				v0.AddArg2(x, y)
 35725  				b.ResetWithControl(block.BlockARM64GT, v0)
 35726  				return true
 35727  			}
 35728  			break
 35729  		}
 35730  		// match: (GT (CMPconst [0] x:(ANDconst [c] y)) yes no)
 35731  		// cond: x.Uses == 1
 35732  		// result: (GT (TSTconst [c] y) yes no)
 35733  		for b.Controls[0].Op == ssaop.OpARM64CMPconst {
 35734  			v_0 := b.Controls[0]
 35735  			if ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
 35736  				break
 35737  			}
 35738  			x := v_0.Args[0]
 35739  			if x.Op != ssaop.OpARM64ANDconst {
 35740  				break
 35741  			}
 35742  			c := ssa.AuxIntToInt64(x.AuxInt)
 35743  			y := x.Args[0]
 35744  			if !(x.Uses == 1) {
 35745  				break
 35746  			}
 35747  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64TSTconst, types.TypeFlags)
 35748  			v0.AuxInt = ssa.Int64ToAuxInt(c)
 35749  			v0.AddArg(y)
 35750  			b.ResetWithControl(block.BlockARM64GT, v0)
 35751  			return true
 35752  		}
 35753  		// match: (GT (CMPWconst [0] z:(AND x y)) yes no)
 35754  		// cond: z.Uses == 1
 35755  		// result: (GT (TSTW x y) yes no)
 35756  		for b.Controls[0].Op == ssaop.OpARM64CMPWconst {
 35757  			v_0 := b.Controls[0]
 35758  			if ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
 35759  				break
 35760  			}
 35761  			z := v_0.Args[0]
 35762  			if z.Op != ssaop.OpARM64AND {
 35763  				break
 35764  			}
 35765  			_ = z.Args[1]
 35766  			z_0 := z.Args[0]
 35767  			z_1 := z.Args[1]
 35768  			for _i0 := 0; _i0 <= 1; _i0, z_0, z_1 = _i0+1, z_1, z_0 {
 35769  				x := z_0
 35770  				y := z_1
 35771  				if !(z.Uses == 1) {
 35772  					continue
 35773  				}
 35774  				v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64TSTW, types.TypeFlags)
 35775  				v0.AddArg2(x, y)
 35776  				b.ResetWithControl(block.BlockARM64GT, v0)
 35777  				return true
 35778  			}
 35779  			break
 35780  		}
 35781  		// match: (GT (CMPWconst [0] x:(ANDconst [c] y)) yes no)
 35782  		// cond: x.Uses == 1
 35783  		// result: (GT (TSTWconst [int32(c)] y) yes no)
 35784  		for b.Controls[0].Op == ssaop.OpARM64CMPWconst {
 35785  			v_0 := b.Controls[0]
 35786  			if ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
 35787  				break
 35788  			}
 35789  			x := v_0.Args[0]
 35790  			if x.Op != ssaop.OpARM64ANDconst {
 35791  				break
 35792  			}
 35793  			c := ssa.AuxIntToInt64(x.AuxInt)
 35794  			y := x.Args[0]
 35795  			if !(x.Uses == 1) {
 35796  				break
 35797  			}
 35798  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64TSTWconst, types.TypeFlags)
 35799  			v0.AuxInt = ssa.Int32ToAuxInt(int32(c))
 35800  			v0.AddArg(y)
 35801  			b.ResetWithControl(block.BlockARM64GT, v0)
 35802  			return true
 35803  		}
 35804  		// match: (GT (CMPconst [0] x:(ADDconst [c] y)) yes no)
 35805  		// cond: x.Uses == 1
 35806  		// result: (GTnoov (CMNconst [c] y) yes no)
 35807  		for b.Controls[0].Op == ssaop.OpARM64CMPconst {
 35808  			v_0 := b.Controls[0]
 35809  			if ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
 35810  				break
 35811  			}
 35812  			x := v_0.Args[0]
 35813  			if x.Op != ssaop.OpARM64ADDconst {
 35814  				break
 35815  			}
 35816  			c := ssa.AuxIntToInt64(x.AuxInt)
 35817  			y := x.Args[0]
 35818  			if !(x.Uses == 1) {
 35819  				break
 35820  			}
 35821  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMNconst, types.TypeFlags)
 35822  			v0.AuxInt = ssa.Int64ToAuxInt(c)
 35823  			v0.AddArg(y)
 35824  			b.ResetWithControl(block.BlockARM64GTnoov, v0)
 35825  			return true
 35826  		}
 35827  		// match: (GT (CMPWconst [0] x:(ADDconst [c] y)) yes no)
 35828  		// cond: x.Uses == 1
 35829  		// result: (GTnoov (CMNWconst [int32(c)] y) yes no)
 35830  		for b.Controls[0].Op == ssaop.OpARM64CMPWconst {
 35831  			v_0 := b.Controls[0]
 35832  			if ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
 35833  				break
 35834  			}
 35835  			x := v_0.Args[0]
 35836  			if x.Op != ssaop.OpARM64ADDconst {
 35837  				break
 35838  			}
 35839  			c := ssa.AuxIntToInt64(x.AuxInt)
 35840  			y := x.Args[0]
 35841  			if !(x.Uses == 1) {
 35842  				break
 35843  			}
 35844  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMNWconst, types.TypeFlags)
 35845  			v0.AuxInt = ssa.Int32ToAuxInt(int32(c))
 35846  			v0.AddArg(y)
 35847  			b.ResetWithControl(block.BlockARM64GTnoov, v0)
 35848  			return true
 35849  		}
 35850  		// match: (GT (CMPconst [0] z:(ADD x y)) yes no)
 35851  		// cond: z.Uses == 1
 35852  		// result: (GTnoov (CMN x y) yes no)
 35853  		for b.Controls[0].Op == ssaop.OpARM64CMPconst {
 35854  			v_0 := b.Controls[0]
 35855  			if ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
 35856  				break
 35857  			}
 35858  			z := v_0.Args[0]
 35859  			if z.Op != ssaop.OpARM64ADD {
 35860  				break
 35861  			}
 35862  			_ = z.Args[1]
 35863  			z_0 := z.Args[0]
 35864  			z_1 := z.Args[1]
 35865  			for _i0 := 0; _i0 <= 1; _i0, z_0, z_1 = _i0+1, z_1, z_0 {
 35866  				x := z_0
 35867  				y := z_1
 35868  				if !(z.Uses == 1) {
 35869  					continue
 35870  				}
 35871  				v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMN, types.TypeFlags)
 35872  				v0.AddArg2(x, y)
 35873  				b.ResetWithControl(block.BlockARM64GTnoov, v0)
 35874  				return true
 35875  			}
 35876  			break
 35877  		}
 35878  		// match: (GT (CMPWconst [0] z:(ADD x y)) yes no)
 35879  		// cond: z.Uses == 1
 35880  		// result: (GTnoov (CMNW x y) yes no)
 35881  		for b.Controls[0].Op == ssaop.OpARM64CMPWconst {
 35882  			v_0 := b.Controls[0]
 35883  			if ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
 35884  				break
 35885  			}
 35886  			z := v_0.Args[0]
 35887  			if z.Op != ssaop.OpARM64ADD {
 35888  				break
 35889  			}
 35890  			_ = z.Args[1]
 35891  			z_0 := z.Args[0]
 35892  			z_1 := z.Args[1]
 35893  			for _i0 := 0; _i0 <= 1; _i0, z_0, z_1 = _i0+1, z_1, z_0 {
 35894  				x := z_0
 35895  				y := z_1
 35896  				if !(z.Uses == 1) {
 35897  					continue
 35898  				}
 35899  				v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMNW, types.TypeFlags)
 35900  				v0.AddArg2(x, y)
 35901  				b.ResetWithControl(block.BlockARM64GTnoov, v0)
 35902  				return true
 35903  			}
 35904  			break
 35905  		}
 35906  		// match: (GT (CMPconst [0] z:(MADD a x y)) yes no)
 35907  		// cond: z.Uses==1
 35908  		// result: (GTnoov (CMN a (MUL <x.Type> x y)) yes no)
 35909  		for b.Controls[0].Op == ssaop.OpARM64CMPconst {
 35910  			v_0 := b.Controls[0]
 35911  			if ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
 35912  				break
 35913  			}
 35914  			z := v_0.Args[0]
 35915  			if z.Op != ssaop.OpARM64MADD {
 35916  				break
 35917  			}
 35918  			y := z.Args[2]
 35919  			a := z.Args[0]
 35920  			x := z.Args[1]
 35921  			if !(z.Uses == 1) {
 35922  				break
 35923  			}
 35924  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMN, types.TypeFlags)
 35925  			v1 := b.NewValue0(v_0.Pos, ssaop.OpARM64MUL, x.Type)
 35926  			v1.AddArg2(x, y)
 35927  			v0.AddArg2(a, v1)
 35928  			b.ResetWithControl(block.BlockARM64GTnoov, v0)
 35929  			return true
 35930  		}
 35931  		// match: (GT (CMPWconst [0] z:(MADDW a x y)) yes no)
 35932  		// cond: z.Uses==1
 35933  		// result: (GTnoov (CMNW a (MULW <x.Type> x y)) yes no)
 35934  		for b.Controls[0].Op == ssaop.OpARM64CMPWconst {
 35935  			v_0 := b.Controls[0]
 35936  			if ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
 35937  				break
 35938  			}
 35939  			z := v_0.Args[0]
 35940  			if z.Op != ssaop.OpARM64MADDW {
 35941  				break
 35942  			}
 35943  			y := z.Args[2]
 35944  			a := z.Args[0]
 35945  			x := z.Args[1]
 35946  			if !(z.Uses == 1) {
 35947  				break
 35948  			}
 35949  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMNW, types.TypeFlags)
 35950  			v1 := b.NewValue0(v_0.Pos, ssaop.OpARM64MULW, x.Type)
 35951  			v1.AddArg2(x, y)
 35952  			v0.AddArg2(a, v1)
 35953  			b.ResetWithControl(block.BlockARM64GTnoov, v0)
 35954  			return true
 35955  		}
 35956  		// match: (GT (FlagConstant [fc]) yes no)
 35957  		// cond: fc.Gt()
 35958  		// result: (First yes no)
 35959  		for b.Controls[0].Op == ssaop.OpARM64FlagConstant {
 35960  			v_0 := b.Controls[0]
 35961  			fc := ssa.AuxIntToFlagConstant(v_0.AuxInt)
 35962  			if !(fc.Gt()) {
 35963  				break
 35964  			}
 35965  			b.Reset(block.BlockFirst)
 35966  			return true
 35967  		}
 35968  		// match: (GT (FlagConstant [fc]) yes no)
 35969  		// cond: !fc.Gt()
 35970  		// result: (First no yes)
 35971  		for b.Controls[0].Op == ssaop.OpARM64FlagConstant {
 35972  			v_0 := b.Controls[0]
 35973  			fc := ssa.AuxIntToFlagConstant(v_0.AuxInt)
 35974  			if !(!fc.Gt()) {
 35975  				break
 35976  			}
 35977  			b.Reset(block.BlockFirst)
 35978  			b.SwapSuccessors()
 35979  			return true
 35980  		}
 35981  		// match: (GT (InvertFlags cmp) yes no)
 35982  		// result: (LT cmp yes no)
 35983  		for b.Controls[0].Op == ssaop.OpARM64InvertFlags {
 35984  			v_0 := b.Controls[0]
 35985  			cmp := v_0.Args[0]
 35986  			b.ResetWithControl(block.BlockARM64LT, cmp)
 35987  			return true
 35988  		}
 35989  	case block.BlockARM64GTnoov:
 35990  		// match: (GTnoov (FlagConstant [fc]) yes no)
 35991  		// cond: fc.GtNoov()
 35992  		// result: (First yes no)
 35993  		for b.Controls[0].Op == ssaop.OpARM64FlagConstant {
 35994  			v_0 := b.Controls[0]
 35995  			fc := ssa.AuxIntToFlagConstant(v_0.AuxInt)
 35996  			if !(fc.GtNoov()) {
 35997  				break
 35998  			}
 35999  			b.Reset(block.BlockFirst)
 36000  			return true
 36001  		}
 36002  		// match: (GTnoov (FlagConstant [fc]) yes no)
 36003  		// cond: !fc.GtNoov()
 36004  		// result: (First no yes)
 36005  		for b.Controls[0].Op == ssaop.OpARM64FlagConstant {
 36006  			v_0 := b.Controls[0]
 36007  			fc := ssa.AuxIntToFlagConstant(v_0.AuxInt)
 36008  			if !(!fc.GtNoov()) {
 36009  				break
 36010  			}
 36011  			b.Reset(block.BlockFirst)
 36012  			b.SwapSuccessors()
 36013  			return true
 36014  		}
 36015  	case block.BlockIf:
 36016  		// match: (If (Equal cc) yes no)
 36017  		// result: (EQ cc yes no)
 36018  		for b.Controls[0].Op == ssaop.OpARM64Equal {
 36019  			v_0 := b.Controls[0]
 36020  			cc := v_0.Args[0]
 36021  			b.ResetWithControl(block.BlockARM64EQ, cc)
 36022  			return true
 36023  		}
 36024  		// match: (If (NotEqual cc) yes no)
 36025  		// result: (NE cc yes no)
 36026  		for b.Controls[0].Op == ssaop.OpARM64NotEqual {
 36027  			v_0 := b.Controls[0]
 36028  			cc := v_0.Args[0]
 36029  			b.ResetWithControl(block.BlockARM64NE, cc)
 36030  			return true
 36031  		}
 36032  		// match: (If (LessThan cc) yes no)
 36033  		// result: (LT cc yes no)
 36034  		for b.Controls[0].Op == ssaop.OpARM64LessThan {
 36035  			v_0 := b.Controls[0]
 36036  			cc := v_0.Args[0]
 36037  			b.ResetWithControl(block.BlockARM64LT, cc)
 36038  			return true
 36039  		}
 36040  		// match: (If (LessThanU cc) yes no)
 36041  		// result: (ULT cc yes no)
 36042  		for b.Controls[0].Op == ssaop.OpARM64LessThanU {
 36043  			v_0 := b.Controls[0]
 36044  			cc := v_0.Args[0]
 36045  			b.ResetWithControl(block.BlockARM64ULT, cc)
 36046  			return true
 36047  		}
 36048  		// match: (If (LessEqual cc) yes no)
 36049  		// result: (LE cc yes no)
 36050  		for b.Controls[0].Op == ssaop.OpARM64LessEqual {
 36051  			v_0 := b.Controls[0]
 36052  			cc := v_0.Args[0]
 36053  			b.ResetWithControl(block.BlockARM64LE, cc)
 36054  			return true
 36055  		}
 36056  		// match: (If (LessEqualU cc) yes no)
 36057  		// result: (ULE cc yes no)
 36058  		for b.Controls[0].Op == ssaop.OpARM64LessEqualU {
 36059  			v_0 := b.Controls[0]
 36060  			cc := v_0.Args[0]
 36061  			b.ResetWithControl(block.BlockARM64ULE, cc)
 36062  			return true
 36063  		}
 36064  		// match: (If (GreaterThan cc) yes no)
 36065  		// result: (GT cc yes no)
 36066  		for b.Controls[0].Op == ssaop.OpARM64GreaterThan {
 36067  			v_0 := b.Controls[0]
 36068  			cc := v_0.Args[0]
 36069  			b.ResetWithControl(block.BlockARM64GT, cc)
 36070  			return true
 36071  		}
 36072  		// match: (If (GreaterThanU cc) yes no)
 36073  		// result: (UGT cc yes no)
 36074  		for b.Controls[0].Op == ssaop.OpARM64GreaterThanU {
 36075  			v_0 := b.Controls[0]
 36076  			cc := v_0.Args[0]
 36077  			b.ResetWithControl(block.BlockARM64UGT, cc)
 36078  			return true
 36079  		}
 36080  		// match: (If (GreaterEqual cc) yes no)
 36081  		// result: (GE cc yes no)
 36082  		for b.Controls[0].Op == ssaop.OpARM64GreaterEqual {
 36083  			v_0 := b.Controls[0]
 36084  			cc := v_0.Args[0]
 36085  			b.ResetWithControl(block.BlockARM64GE, cc)
 36086  			return true
 36087  		}
 36088  		// match: (If (GreaterEqualU cc) yes no)
 36089  		// result: (UGE cc yes no)
 36090  		for b.Controls[0].Op == ssaop.OpARM64GreaterEqualU {
 36091  			v_0 := b.Controls[0]
 36092  			cc := v_0.Args[0]
 36093  			b.ResetWithControl(block.BlockARM64UGE, cc)
 36094  			return true
 36095  		}
 36096  		// match: (If (LessThanF cc) yes no)
 36097  		// result: (FLT cc yes no)
 36098  		for b.Controls[0].Op == ssaop.OpARM64LessThanF {
 36099  			v_0 := b.Controls[0]
 36100  			cc := v_0.Args[0]
 36101  			b.ResetWithControl(block.BlockARM64FLT, cc)
 36102  			return true
 36103  		}
 36104  		// match: (If (LessEqualF cc) yes no)
 36105  		// result: (FLE cc yes no)
 36106  		for b.Controls[0].Op == ssaop.OpARM64LessEqualF {
 36107  			v_0 := b.Controls[0]
 36108  			cc := v_0.Args[0]
 36109  			b.ResetWithControl(block.BlockARM64FLE, cc)
 36110  			return true
 36111  		}
 36112  		// match: (If (GreaterThanF cc) yes no)
 36113  		// result: (FGT cc yes no)
 36114  		for b.Controls[0].Op == ssaop.OpARM64GreaterThanF {
 36115  			v_0 := b.Controls[0]
 36116  			cc := v_0.Args[0]
 36117  			b.ResetWithControl(block.BlockARM64FGT, cc)
 36118  			return true
 36119  		}
 36120  		// match: (If (GreaterEqualF cc) yes no)
 36121  		// result: (FGE cc yes no)
 36122  		for b.Controls[0].Op == ssaop.OpARM64GreaterEqualF {
 36123  			v_0 := b.Controls[0]
 36124  			cc := v_0.Args[0]
 36125  			b.ResetWithControl(block.BlockARM64FGE, cc)
 36126  			return true
 36127  		}
 36128  		// match: (If cond yes no)
 36129  		// result: (TBNZ [0] cond yes no)
 36130  		for {
 36131  			cond := b.Controls[0]
 36132  			b.ResetWithControl(block.BlockARM64TBNZ, cond)
 36133  			b.AuxInt = ssa.Int64ToAuxInt(0)
 36134  			return true
 36135  		}
 36136  	case block.BlockJumpTable:
 36137  		// match: (JumpTable idx)
 36138  		// result: (JUMPTABLE {ssa.MakeJumpTableSym(b)} idx (MOVDaddr <typ.Uintptr> {ssa.MakeJumpTableSym(b)} (SB)))
 36139  		for {
 36140  			idx := b.Controls[0]
 36141  			v0 := b.NewValue0(b.Pos, ssaop.OpARM64MOVDaddr, typ.Uintptr)
 36142  			v0.Aux = ssa.SymToAux(ssa.MakeJumpTableSym(b))
 36143  			v1 := b.NewValue0(b.Pos, ssaop.OpSB, typ.Uintptr)
 36144  			v0.AddArg(v1)
 36145  			b.ResetWithControl2(block.BlockARM64JUMPTABLE, idx, v0)
 36146  			b.Aux = ssa.SymToAux(ssa.MakeJumpTableSym(b))
 36147  			return true
 36148  		}
 36149  	case block.BlockARM64LE:
 36150  		// match: (LE (CMPconst [0] z:(AND x y)) yes no)
 36151  		// cond: z.Uses == 1
 36152  		// result: (LE (TST x y) yes no)
 36153  		for b.Controls[0].Op == ssaop.OpARM64CMPconst {
 36154  			v_0 := b.Controls[0]
 36155  			if ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
 36156  				break
 36157  			}
 36158  			z := v_0.Args[0]
 36159  			if z.Op != ssaop.OpARM64AND {
 36160  				break
 36161  			}
 36162  			_ = z.Args[1]
 36163  			z_0 := z.Args[0]
 36164  			z_1 := z.Args[1]
 36165  			for _i0 := 0; _i0 <= 1; _i0, z_0, z_1 = _i0+1, z_1, z_0 {
 36166  				x := z_0
 36167  				y := z_1
 36168  				if !(z.Uses == 1) {
 36169  					continue
 36170  				}
 36171  				v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64TST, types.TypeFlags)
 36172  				v0.AddArg2(x, y)
 36173  				b.ResetWithControl(block.BlockARM64LE, v0)
 36174  				return true
 36175  			}
 36176  			break
 36177  		}
 36178  		// match: (LE (CMPconst [0] x:(ANDconst [c] y)) yes no)
 36179  		// cond: x.Uses == 1
 36180  		// result: (LE (TSTconst [c] y) yes no)
 36181  		for b.Controls[0].Op == ssaop.OpARM64CMPconst {
 36182  			v_0 := b.Controls[0]
 36183  			if ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
 36184  				break
 36185  			}
 36186  			x := v_0.Args[0]
 36187  			if x.Op != ssaop.OpARM64ANDconst {
 36188  				break
 36189  			}
 36190  			c := ssa.AuxIntToInt64(x.AuxInt)
 36191  			y := x.Args[0]
 36192  			if !(x.Uses == 1) {
 36193  				break
 36194  			}
 36195  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64TSTconst, types.TypeFlags)
 36196  			v0.AuxInt = ssa.Int64ToAuxInt(c)
 36197  			v0.AddArg(y)
 36198  			b.ResetWithControl(block.BlockARM64LE, v0)
 36199  			return true
 36200  		}
 36201  		// match: (LE (CMPWconst [0] z:(AND x y)) yes no)
 36202  		// cond: z.Uses == 1
 36203  		// result: (LE (TSTW x y) yes no)
 36204  		for b.Controls[0].Op == ssaop.OpARM64CMPWconst {
 36205  			v_0 := b.Controls[0]
 36206  			if ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
 36207  				break
 36208  			}
 36209  			z := v_0.Args[0]
 36210  			if z.Op != ssaop.OpARM64AND {
 36211  				break
 36212  			}
 36213  			_ = z.Args[1]
 36214  			z_0 := z.Args[0]
 36215  			z_1 := z.Args[1]
 36216  			for _i0 := 0; _i0 <= 1; _i0, z_0, z_1 = _i0+1, z_1, z_0 {
 36217  				x := z_0
 36218  				y := z_1
 36219  				if !(z.Uses == 1) {
 36220  					continue
 36221  				}
 36222  				v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64TSTW, types.TypeFlags)
 36223  				v0.AddArg2(x, y)
 36224  				b.ResetWithControl(block.BlockARM64LE, v0)
 36225  				return true
 36226  			}
 36227  			break
 36228  		}
 36229  		// match: (LE (CMPWconst [0] x:(ANDconst [c] y)) yes no)
 36230  		// cond: x.Uses == 1
 36231  		// result: (LE (TSTWconst [int32(c)] y) yes no)
 36232  		for b.Controls[0].Op == ssaop.OpARM64CMPWconst {
 36233  			v_0 := b.Controls[0]
 36234  			if ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
 36235  				break
 36236  			}
 36237  			x := v_0.Args[0]
 36238  			if x.Op != ssaop.OpARM64ANDconst {
 36239  				break
 36240  			}
 36241  			c := ssa.AuxIntToInt64(x.AuxInt)
 36242  			y := x.Args[0]
 36243  			if !(x.Uses == 1) {
 36244  				break
 36245  			}
 36246  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64TSTWconst, types.TypeFlags)
 36247  			v0.AuxInt = ssa.Int32ToAuxInt(int32(c))
 36248  			v0.AddArg(y)
 36249  			b.ResetWithControl(block.BlockARM64LE, v0)
 36250  			return true
 36251  		}
 36252  		// match: (LE (CMPconst [0] x:(ADDconst [c] y)) yes no)
 36253  		// cond: x.Uses == 1
 36254  		// result: (LEnoov (CMNconst [c] y) yes no)
 36255  		for b.Controls[0].Op == ssaop.OpARM64CMPconst {
 36256  			v_0 := b.Controls[0]
 36257  			if ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
 36258  				break
 36259  			}
 36260  			x := v_0.Args[0]
 36261  			if x.Op != ssaop.OpARM64ADDconst {
 36262  				break
 36263  			}
 36264  			c := ssa.AuxIntToInt64(x.AuxInt)
 36265  			y := x.Args[0]
 36266  			if !(x.Uses == 1) {
 36267  				break
 36268  			}
 36269  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMNconst, types.TypeFlags)
 36270  			v0.AuxInt = ssa.Int64ToAuxInt(c)
 36271  			v0.AddArg(y)
 36272  			b.ResetWithControl(block.BlockARM64LEnoov, v0)
 36273  			return true
 36274  		}
 36275  		// match: (LE (CMPWconst [0] x:(ADDconst [c] y)) yes no)
 36276  		// cond: x.Uses == 1
 36277  		// result: (LEnoov (CMNWconst [int32(c)] y) yes no)
 36278  		for b.Controls[0].Op == ssaop.OpARM64CMPWconst {
 36279  			v_0 := b.Controls[0]
 36280  			if ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
 36281  				break
 36282  			}
 36283  			x := v_0.Args[0]
 36284  			if x.Op != ssaop.OpARM64ADDconst {
 36285  				break
 36286  			}
 36287  			c := ssa.AuxIntToInt64(x.AuxInt)
 36288  			y := x.Args[0]
 36289  			if !(x.Uses == 1) {
 36290  				break
 36291  			}
 36292  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMNWconst, types.TypeFlags)
 36293  			v0.AuxInt = ssa.Int32ToAuxInt(int32(c))
 36294  			v0.AddArg(y)
 36295  			b.ResetWithControl(block.BlockARM64LEnoov, v0)
 36296  			return true
 36297  		}
 36298  		// match: (LE (CMPconst [0] z:(ADD x y)) yes no)
 36299  		// cond: z.Uses == 1
 36300  		// result: (LEnoov (CMN x y) yes no)
 36301  		for b.Controls[0].Op == ssaop.OpARM64CMPconst {
 36302  			v_0 := b.Controls[0]
 36303  			if ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
 36304  				break
 36305  			}
 36306  			z := v_0.Args[0]
 36307  			if z.Op != ssaop.OpARM64ADD {
 36308  				break
 36309  			}
 36310  			_ = z.Args[1]
 36311  			z_0 := z.Args[0]
 36312  			z_1 := z.Args[1]
 36313  			for _i0 := 0; _i0 <= 1; _i0, z_0, z_1 = _i0+1, z_1, z_0 {
 36314  				x := z_0
 36315  				y := z_1
 36316  				if !(z.Uses == 1) {
 36317  					continue
 36318  				}
 36319  				v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMN, types.TypeFlags)
 36320  				v0.AddArg2(x, y)
 36321  				b.ResetWithControl(block.BlockARM64LEnoov, v0)
 36322  				return true
 36323  			}
 36324  			break
 36325  		}
 36326  		// match: (LE (CMPWconst [0] z:(ADD x y)) yes no)
 36327  		// cond: z.Uses == 1
 36328  		// result: (LEnoov (CMNW x y) yes no)
 36329  		for b.Controls[0].Op == ssaop.OpARM64CMPWconst {
 36330  			v_0 := b.Controls[0]
 36331  			if ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
 36332  				break
 36333  			}
 36334  			z := v_0.Args[0]
 36335  			if z.Op != ssaop.OpARM64ADD {
 36336  				break
 36337  			}
 36338  			_ = z.Args[1]
 36339  			z_0 := z.Args[0]
 36340  			z_1 := z.Args[1]
 36341  			for _i0 := 0; _i0 <= 1; _i0, z_0, z_1 = _i0+1, z_1, z_0 {
 36342  				x := z_0
 36343  				y := z_1
 36344  				if !(z.Uses == 1) {
 36345  					continue
 36346  				}
 36347  				v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMNW, types.TypeFlags)
 36348  				v0.AddArg2(x, y)
 36349  				b.ResetWithControl(block.BlockARM64LEnoov, v0)
 36350  				return true
 36351  			}
 36352  			break
 36353  		}
 36354  		// match: (LE (CMPconst [0] z:(MADD a x y)) yes no)
 36355  		// cond: z.Uses==1
 36356  		// result: (LEnoov (CMN a (MUL <x.Type> x y)) yes no)
 36357  		for b.Controls[0].Op == ssaop.OpARM64CMPconst {
 36358  			v_0 := b.Controls[0]
 36359  			if ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
 36360  				break
 36361  			}
 36362  			z := v_0.Args[0]
 36363  			if z.Op != ssaop.OpARM64MADD {
 36364  				break
 36365  			}
 36366  			y := z.Args[2]
 36367  			a := z.Args[0]
 36368  			x := z.Args[1]
 36369  			if !(z.Uses == 1) {
 36370  				break
 36371  			}
 36372  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMN, types.TypeFlags)
 36373  			v1 := b.NewValue0(v_0.Pos, ssaop.OpARM64MUL, x.Type)
 36374  			v1.AddArg2(x, y)
 36375  			v0.AddArg2(a, v1)
 36376  			b.ResetWithControl(block.BlockARM64LEnoov, v0)
 36377  			return true
 36378  		}
 36379  		// match: (LE (CMPWconst [0] z:(MADDW a x y)) yes no)
 36380  		// cond: z.Uses==1
 36381  		// result: (LEnoov (CMNW a (MULW <x.Type> x y)) yes no)
 36382  		for b.Controls[0].Op == ssaop.OpARM64CMPWconst {
 36383  			v_0 := b.Controls[0]
 36384  			if ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
 36385  				break
 36386  			}
 36387  			z := v_0.Args[0]
 36388  			if z.Op != ssaop.OpARM64MADDW {
 36389  				break
 36390  			}
 36391  			y := z.Args[2]
 36392  			a := z.Args[0]
 36393  			x := z.Args[1]
 36394  			if !(z.Uses == 1) {
 36395  				break
 36396  			}
 36397  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMNW, types.TypeFlags)
 36398  			v1 := b.NewValue0(v_0.Pos, ssaop.OpARM64MULW, x.Type)
 36399  			v1.AddArg2(x, y)
 36400  			v0.AddArg2(a, v1)
 36401  			b.ResetWithControl(block.BlockARM64LEnoov, v0)
 36402  			return true
 36403  		}
 36404  		// match: (LE (FlagConstant [fc]) yes no)
 36405  		// cond: fc.Le()
 36406  		// result: (First yes no)
 36407  		for b.Controls[0].Op == ssaop.OpARM64FlagConstant {
 36408  			v_0 := b.Controls[0]
 36409  			fc := ssa.AuxIntToFlagConstant(v_0.AuxInt)
 36410  			if !(fc.Le()) {
 36411  				break
 36412  			}
 36413  			b.Reset(block.BlockFirst)
 36414  			return true
 36415  		}
 36416  		// match: (LE (FlagConstant [fc]) yes no)
 36417  		// cond: !fc.Le()
 36418  		// result: (First no yes)
 36419  		for b.Controls[0].Op == ssaop.OpARM64FlagConstant {
 36420  			v_0 := b.Controls[0]
 36421  			fc := ssa.AuxIntToFlagConstant(v_0.AuxInt)
 36422  			if !(!fc.Le()) {
 36423  				break
 36424  			}
 36425  			b.Reset(block.BlockFirst)
 36426  			b.SwapSuccessors()
 36427  			return true
 36428  		}
 36429  		// match: (LE (InvertFlags cmp) yes no)
 36430  		// result: (GE cmp yes no)
 36431  		for b.Controls[0].Op == ssaop.OpARM64InvertFlags {
 36432  			v_0 := b.Controls[0]
 36433  			cmp := v_0.Args[0]
 36434  			b.ResetWithControl(block.BlockARM64GE, cmp)
 36435  			return true
 36436  		}
 36437  	case block.BlockARM64LEnoov:
 36438  		// match: (LEnoov (FlagConstant [fc]) yes no)
 36439  		// cond: fc.LeNoov()
 36440  		// result: (First yes no)
 36441  		for b.Controls[0].Op == ssaop.OpARM64FlagConstant {
 36442  			v_0 := b.Controls[0]
 36443  			fc := ssa.AuxIntToFlagConstant(v_0.AuxInt)
 36444  			if !(fc.LeNoov()) {
 36445  				break
 36446  			}
 36447  			b.Reset(block.BlockFirst)
 36448  			return true
 36449  		}
 36450  		// match: (LEnoov (FlagConstant [fc]) yes no)
 36451  		// cond: !fc.LeNoov()
 36452  		// result: (First no yes)
 36453  		for b.Controls[0].Op == ssaop.OpARM64FlagConstant {
 36454  			v_0 := b.Controls[0]
 36455  			fc := ssa.AuxIntToFlagConstant(v_0.AuxInt)
 36456  			if !(!fc.LeNoov()) {
 36457  				break
 36458  			}
 36459  			b.Reset(block.BlockFirst)
 36460  			b.SwapSuccessors()
 36461  			return true
 36462  		}
 36463  	case block.BlockARM64LT:
 36464  		// match: (LT (CMPconst [0] z:(AND x y)) yes no)
 36465  		// cond: z.Uses == 1
 36466  		// result: (LT (TST x y) yes no)
 36467  		for b.Controls[0].Op == ssaop.OpARM64CMPconst {
 36468  			v_0 := b.Controls[0]
 36469  			if ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
 36470  				break
 36471  			}
 36472  			z := v_0.Args[0]
 36473  			if z.Op != ssaop.OpARM64AND {
 36474  				break
 36475  			}
 36476  			_ = z.Args[1]
 36477  			z_0 := z.Args[0]
 36478  			z_1 := z.Args[1]
 36479  			for _i0 := 0; _i0 <= 1; _i0, z_0, z_1 = _i0+1, z_1, z_0 {
 36480  				x := z_0
 36481  				y := z_1
 36482  				if !(z.Uses == 1) {
 36483  					continue
 36484  				}
 36485  				v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64TST, types.TypeFlags)
 36486  				v0.AddArg2(x, y)
 36487  				b.ResetWithControl(block.BlockARM64LT, v0)
 36488  				return true
 36489  			}
 36490  			break
 36491  		}
 36492  		// match: (LT (CMPconst [0] x:(ANDconst [c] y)) yes no)
 36493  		// cond: x.Uses == 1
 36494  		// result: (LT (TSTconst [c] y) yes no)
 36495  		for b.Controls[0].Op == ssaop.OpARM64CMPconst {
 36496  			v_0 := b.Controls[0]
 36497  			if ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
 36498  				break
 36499  			}
 36500  			x := v_0.Args[0]
 36501  			if x.Op != ssaop.OpARM64ANDconst {
 36502  				break
 36503  			}
 36504  			c := ssa.AuxIntToInt64(x.AuxInt)
 36505  			y := x.Args[0]
 36506  			if !(x.Uses == 1) {
 36507  				break
 36508  			}
 36509  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64TSTconst, types.TypeFlags)
 36510  			v0.AuxInt = ssa.Int64ToAuxInt(c)
 36511  			v0.AddArg(y)
 36512  			b.ResetWithControl(block.BlockARM64LT, v0)
 36513  			return true
 36514  		}
 36515  		// match: (LT (CMPWconst [0] z:(AND x y)) yes no)
 36516  		// cond: z.Uses == 1
 36517  		// result: (LT (TSTW x y) yes no)
 36518  		for b.Controls[0].Op == ssaop.OpARM64CMPWconst {
 36519  			v_0 := b.Controls[0]
 36520  			if ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
 36521  				break
 36522  			}
 36523  			z := v_0.Args[0]
 36524  			if z.Op != ssaop.OpARM64AND {
 36525  				break
 36526  			}
 36527  			_ = z.Args[1]
 36528  			z_0 := z.Args[0]
 36529  			z_1 := z.Args[1]
 36530  			for _i0 := 0; _i0 <= 1; _i0, z_0, z_1 = _i0+1, z_1, z_0 {
 36531  				x := z_0
 36532  				y := z_1
 36533  				if !(z.Uses == 1) {
 36534  					continue
 36535  				}
 36536  				v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64TSTW, types.TypeFlags)
 36537  				v0.AddArg2(x, y)
 36538  				b.ResetWithControl(block.BlockARM64LT, v0)
 36539  				return true
 36540  			}
 36541  			break
 36542  		}
 36543  		// match: (LT (CMPWconst [0] x:(ANDconst [c] y)) yes no)
 36544  		// cond: x.Uses == 1
 36545  		// result: (LT (TSTWconst [int32(c)] y) yes no)
 36546  		for b.Controls[0].Op == ssaop.OpARM64CMPWconst {
 36547  			v_0 := b.Controls[0]
 36548  			if ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
 36549  				break
 36550  			}
 36551  			x := v_0.Args[0]
 36552  			if x.Op != ssaop.OpARM64ANDconst {
 36553  				break
 36554  			}
 36555  			c := ssa.AuxIntToInt64(x.AuxInt)
 36556  			y := x.Args[0]
 36557  			if !(x.Uses == 1) {
 36558  				break
 36559  			}
 36560  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64TSTWconst, types.TypeFlags)
 36561  			v0.AuxInt = ssa.Int32ToAuxInt(int32(c))
 36562  			v0.AddArg(y)
 36563  			b.ResetWithControl(block.BlockARM64LT, v0)
 36564  			return true
 36565  		}
 36566  		// match: (LT (CMPconst [0] x:(ADDconst [c] y)) yes no)
 36567  		// cond: x.Uses == 1
 36568  		// result: (LTnoov (CMNconst [c] y) yes no)
 36569  		for b.Controls[0].Op == ssaop.OpARM64CMPconst {
 36570  			v_0 := b.Controls[0]
 36571  			if ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
 36572  				break
 36573  			}
 36574  			x := v_0.Args[0]
 36575  			if x.Op != ssaop.OpARM64ADDconst {
 36576  				break
 36577  			}
 36578  			c := ssa.AuxIntToInt64(x.AuxInt)
 36579  			y := x.Args[0]
 36580  			if !(x.Uses == 1) {
 36581  				break
 36582  			}
 36583  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMNconst, types.TypeFlags)
 36584  			v0.AuxInt = ssa.Int64ToAuxInt(c)
 36585  			v0.AddArg(y)
 36586  			b.ResetWithControl(block.BlockARM64LTnoov, v0)
 36587  			return true
 36588  		}
 36589  		// match: (LT (CMPWconst [0] x:(ADDconst [c] y)) yes no)
 36590  		// cond: x.Uses == 1
 36591  		// result: (LTnoov (CMNWconst [int32(c)] y) yes no)
 36592  		for b.Controls[0].Op == ssaop.OpARM64CMPWconst {
 36593  			v_0 := b.Controls[0]
 36594  			if ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
 36595  				break
 36596  			}
 36597  			x := v_0.Args[0]
 36598  			if x.Op != ssaop.OpARM64ADDconst {
 36599  				break
 36600  			}
 36601  			c := ssa.AuxIntToInt64(x.AuxInt)
 36602  			y := x.Args[0]
 36603  			if !(x.Uses == 1) {
 36604  				break
 36605  			}
 36606  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMNWconst, types.TypeFlags)
 36607  			v0.AuxInt = ssa.Int32ToAuxInt(int32(c))
 36608  			v0.AddArg(y)
 36609  			b.ResetWithControl(block.BlockARM64LTnoov, v0)
 36610  			return true
 36611  		}
 36612  		// match: (LT (CMPconst [0] z:(ADD x y)) yes no)
 36613  		// cond: z.Uses == 1
 36614  		// result: (LTnoov (CMN x y) yes no)
 36615  		for b.Controls[0].Op == ssaop.OpARM64CMPconst {
 36616  			v_0 := b.Controls[0]
 36617  			if ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
 36618  				break
 36619  			}
 36620  			z := v_0.Args[0]
 36621  			if z.Op != ssaop.OpARM64ADD {
 36622  				break
 36623  			}
 36624  			_ = z.Args[1]
 36625  			z_0 := z.Args[0]
 36626  			z_1 := z.Args[1]
 36627  			for _i0 := 0; _i0 <= 1; _i0, z_0, z_1 = _i0+1, z_1, z_0 {
 36628  				x := z_0
 36629  				y := z_1
 36630  				if !(z.Uses == 1) {
 36631  					continue
 36632  				}
 36633  				v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMN, types.TypeFlags)
 36634  				v0.AddArg2(x, y)
 36635  				b.ResetWithControl(block.BlockARM64LTnoov, v0)
 36636  				return true
 36637  			}
 36638  			break
 36639  		}
 36640  		// match: (LT (CMPWconst [0] z:(ADD x y)) yes no)
 36641  		// cond: z.Uses == 1
 36642  		// result: (LTnoov (CMNW x y) yes no)
 36643  		for b.Controls[0].Op == ssaop.OpARM64CMPWconst {
 36644  			v_0 := b.Controls[0]
 36645  			if ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
 36646  				break
 36647  			}
 36648  			z := v_0.Args[0]
 36649  			if z.Op != ssaop.OpARM64ADD {
 36650  				break
 36651  			}
 36652  			_ = z.Args[1]
 36653  			z_0 := z.Args[0]
 36654  			z_1 := z.Args[1]
 36655  			for _i0 := 0; _i0 <= 1; _i0, z_0, z_1 = _i0+1, z_1, z_0 {
 36656  				x := z_0
 36657  				y := z_1
 36658  				if !(z.Uses == 1) {
 36659  					continue
 36660  				}
 36661  				v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMNW, types.TypeFlags)
 36662  				v0.AddArg2(x, y)
 36663  				b.ResetWithControl(block.BlockARM64LTnoov, v0)
 36664  				return true
 36665  			}
 36666  			break
 36667  		}
 36668  		// match: (LT (CMPconst [0] z:(MADD a x y)) yes no)
 36669  		// cond: z.Uses==1
 36670  		// result: (LTnoov (CMN a (MUL <x.Type> x y)) yes no)
 36671  		for b.Controls[0].Op == ssaop.OpARM64CMPconst {
 36672  			v_0 := b.Controls[0]
 36673  			if ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
 36674  				break
 36675  			}
 36676  			z := v_0.Args[0]
 36677  			if z.Op != ssaop.OpARM64MADD {
 36678  				break
 36679  			}
 36680  			y := z.Args[2]
 36681  			a := z.Args[0]
 36682  			x := z.Args[1]
 36683  			if !(z.Uses == 1) {
 36684  				break
 36685  			}
 36686  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMN, types.TypeFlags)
 36687  			v1 := b.NewValue0(v_0.Pos, ssaop.OpARM64MUL, x.Type)
 36688  			v1.AddArg2(x, y)
 36689  			v0.AddArg2(a, v1)
 36690  			b.ResetWithControl(block.BlockARM64LTnoov, v0)
 36691  			return true
 36692  		}
 36693  		// match: (LT (CMPWconst [0] z:(MADDW a x y)) yes no)
 36694  		// cond: z.Uses==1
 36695  		// result: (LTnoov (CMNW a (MULW <x.Type> x y)) yes no)
 36696  		for b.Controls[0].Op == ssaop.OpARM64CMPWconst {
 36697  			v_0 := b.Controls[0]
 36698  			if ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
 36699  				break
 36700  			}
 36701  			z := v_0.Args[0]
 36702  			if z.Op != ssaop.OpARM64MADDW {
 36703  				break
 36704  			}
 36705  			y := z.Args[2]
 36706  			a := z.Args[0]
 36707  			x := z.Args[1]
 36708  			if !(z.Uses == 1) {
 36709  				break
 36710  			}
 36711  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMNW, types.TypeFlags)
 36712  			v1 := b.NewValue0(v_0.Pos, ssaop.OpARM64MULW, x.Type)
 36713  			v1.AddArg2(x, y)
 36714  			v0.AddArg2(a, v1)
 36715  			b.ResetWithControl(block.BlockARM64LTnoov, v0)
 36716  			return true
 36717  		}
 36718  		// match: (LT (CMPWconst [0] x) yes no)
 36719  		// result: (TBNZ [31] x yes no)
 36720  		for b.Controls[0].Op == ssaop.OpARM64CMPWconst {
 36721  			v_0 := b.Controls[0]
 36722  			if ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
 36723  				break
 36724  			}
 36725  			x := v_0.Args[0]
 36726  			b.ResetWithControl(block.BlockARM64TBNZ, x)
 36727  			b.AuxInt = ssa.Int64ToAuxInt(31)
 36728  			return true
 36729  		}
 36730  		// match: (LT (CMPconst [0] x) yes no)
 36731  		// result: (TBNZ [63] x yes no)
 36732  		for b.Controls[0].Op == ssaop.OpARM64CMPconst {
 36733  			v_0 := b.Controls[0]
 36734  			if ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
 36735  				break
 36736  			}
 36737  			x := v_0.Args[0]
 36738  			b.ResetWithControl(block.BlockARM64TBNZ, x)
 36739  			b.AuxInt = ssa.Int64ToAuxInt(63)
 36740  			return true
 36741  		}
 36742  		// match: (LT (CMPWconst [128] x) yes no)
 36743  		// cond: ssa.ZeroUpper56Bits(x)
 36744  		// result: (TBZ [7] x yes no)
 36745  		for b.Controls[0].Op == ssaop.OpARM64CMPWconst {
 36746  			v_0 := b.Controls[0]
 36747  			if ssa.AuxIntToInt32(v_0.AuxInt) != 128 {
 36748  				break
 36749  			}
 36750  			x := v_0.Args[0]
 36751  			if !(ssa.ZeroUpper56Bits(x)) {
 36752  				break
 36753  			}
 36754  			b.ResetWithControl(block.BlockARM64TBZ, x)
 36755  			b.AuxInt = ssa.Int64ToAuxInt(7)
 36756  			return true
 36757  		}
 36758  		// match: (LT (CMPconst [128] x) yes no)
 36759  		// cond: ssa.ZeroUpper56Bits(x)
 36760  		// result: (TBZ [7] x yes no)
 36761  		for b.Controls[0].Op == ssaop.OpARM64CMPconst {
 36762  			v_0 := b.Controls[0]
 36763  			if ssa.AuxIntToInt64(v_0.AuxInt) != 128 {
 36764  				break
 36765  			}
 36766  			x := v_0.Args[0]
 36767  			if !(ssa.ZeroUpper56Bits(x)) {
 36768  				break
 36769  			}
 36770  			b.ResetWithControl(block.BlockARM64TBZ, x)
 36771  			b.AuxInt = ssa.Int64ToAuxInt(7)
 36772  			return true
 36773  		}
 36774  		// match: (LT (FlagConstant [fc]) yes no)
 36775  		// cond: fc.Lt()
 36776  		// result: (First yes no)
 36777  		for b.Controls[0].Op == ssaop.OpARM64FlagConstant {
 36778  			v_0 := b.Controls[0]
 36779  			fc := ssa.AuxIntToFlagConstant(v_0.AuxInt)
 36780  			if !(fc.Lt()) {
 36781  				break
 36782  			}
 36783  			b.Reset(block.BlockFirst)
 36784  			return true
 36785  		}
 36786  		// match: (LT (FlagConstant [fc]) yes no)
 36787  		// cond: !fc.Lt()
 36788  		// result: (First no yes)
 36789  		for b.Controls[0].Op == ssaop.OpARM64FlagConstant {
 36790  			v_0 := b.Controls[0]
 36791  			fc := ssa.AuxIntToFlagConstant(v_0.AuxInt)
 36792  			if !(!fc.Lt()) {
 36793  				break
 36794  			}
 36795  			b.Reset(block.BlockFirst)
 36796  			b.SwapSuccessors()
 36797  			return true
 36798  		}
 36799  		// match: (LT (InvertFlags cmp) yes no)
 36800  		// result: (GT cmp yes no)
 36801  		for b.Controls[0].Op == ssaop.OpARM64InvertFlags {
 36802  			v_0 := b.Controls[0]
 36803  			cmp := v_0.Args[0]
 36804  			b.ResetWithControl(block.BlockARM64GT, cmp)
 36805  			return true
 36806  		}
 36807  	case block.BlockARM64LTnoov:
 36808  		// match: (LTnoov (FlagConstant [fc]) yes no)
 36809  		// cond: fc.LtNoov()
 36810  		// result: (First yes no)
 36811  		for b.Controls[0].Op == ssaop.OpARM64FlagConstant {
 36812  			v_0 := b.Controls[0]
 36813  			fc := ssa.AuxIntToFlagConstant(v_0.AuxInt)
 36814  			if !(fc.LtNoov()) {
 36815  				break
 36816  			}
 36817  			b.Reset(block.BlockFirst)
 36818  			return true
 36819  		}
 36820  		// match: (LTnoov (FlagConstant [fc]) yes no)
 36821  		// cond: !fc.LtNoov()
 36822  		// result: (First no yes)
 36823  		for b.Controls[0].Op == ssaop.OpARM64FlagConstant {
 36824  			v_0 := b.Controls[0]
 36825  			fc := ssa.AuxIntToFlagConstant(v_0.AuxInt)
 36826  			if !(!fc.LtNoov()) {
 36827  				break
 36828  			}
 36829  			b.Reset(block.BlockFirst)
 36830  			b.SwapSuccessors()
 36831  			return true
 36832  		}
 36833  	case block.BlockARM64NE:
 36834  		// match: (NE (CMPconst [0] z:(AND x y)) yes no)
 36835  		// cond: z.Uses == 1
 36836  		// result: (NE (TST x y) yes no)
 36837  		for b.Controls[0].Op == ssaop.OpARM64CMPconst {
 36838  			v_0 := b.Controls[0]
 36839  			if ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
 36840  				break
 36841  			}
 36842  			z := v_0.Args[0]
 36843  			if z.Op != ssaop.OpARM64AND {
 36844  				break
 36845  			}
 36846  			_ = z.Args[1]
 36847  			z_0 := z.Args[0]
 36848  			z_1 := z.Args[1]
 36849  			for _i0 := 0; _i0 <= 1; _i0, z_0, z_1 = _i0+1, z_1, z_0 {
 36850  				x := z_0
 36851  				y := z_1
 36852  				if !(z.Uses == 1) {
 36853  					continue
 36854  				}
 36855  				v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64TST, types.TypeFlags)
 36856  				v0.AddArg2(x, y)
 36857  				b.ResetWithControl(block.BlockARM64NE, v0)
 36858  				return true
 36859  			}
 36860  			break
 36861  		}
 36862  		// match: (NE (CMPconst [0] x:(ANDconst [c] y)) yes no)
 36863  		// cond: x.Uses == 1
 36864  		// result: (NE (TSTconst [c] y) yes no)
 36865  		for b.Controls[0].Op == ssaop.OpARM64CMPconst {
 36866  			v_0 := b.Controls[0]
 36867  			if ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
 36868  				break
 36869  			}
 36870  			x := v_0.Args[0]
 36871  			if x.Op != ssaop.OpARM64ANDconst {
 36872  				break
 36873  			}
 36874  			c := ssa.AuxIntToInt64(x.AuxInt)
 36875  			y := x.Args[0]
 36876  			if !(x.Uses == 1) {
 36877  				break
 36878  			}
 36879  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64TSTconst, types.TypeFlags)
 36880  			v0.AuxInt = ssa.Int64ToAuxInt(c)
 36881  			v0.AddArg(y)
 36882  			b.ResetWithControl(block.BlockARM64NE, v0)
 36883  			return true
 36884  		}
 36885  		// match: (NE (CMPWconst [0] z:(AND x y)) yes no)
 36886  		// cond: z.Uses == 1
 36887  		// result: (NE (TSTW x y) yes no)
 36888  		for b.Controls[0].Op == ssaop.OpARM64CMPWconst {
 36889  			v_0 := b.Controls[0]
 36890  			if ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
 36891  				break
 36892  			}
 36893  			z := v_0.Args[0]
 36894  			if z.Op != ssaop.OpARM64AND {
 36895  				break
 36896  			}
 36897  			_ = z.Args[1]
 36898  			z_0 := z.Args[0]
 36899  			z_1 := z.Args[1]
 36900  			for _i0 := 0; _i0 <= 1; _i0, z_0, z_1 = _i0+1, z_1, z_0 {
 36901  				x := z_0
 36902  				y := z_1
 36903  				if !(z.Uses == 1) {
 36904  					continue
 36905  				}
 36906  				v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64TSTW, types.TypeFlags)
 36907  				v0.AddArg2(x, y)
 36908  				b.ResetWithControl(block.BlockARM64NE, v0)
 36909  				return true
 36910  			}
 36911  			break
 36912  		}
 36913  		// match: (NE (CMPWconst [0] x:(ANDconst [c] y)) yes no)
 36914  		// cond: x.Uses == 1
 36915  		// result: (NE (TSTWconst [int32(c)] y) yes no)
 36916  		for b.Controls[0].Op == ssaop.OpARM64CMPWconst {
 36917  			v_0 := b.Controls[0]
 36918  			if ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
 36919  				break
 36920  			}
 36921  			x := v_0.Args[0]
 36922  			if x.Op != ssaop.OpARM64ANDconst {
 36923  				break
 36924  			}
 36925  			c := ssa.AuxIntToInt64(x.AuxInt)
 36926  			y := x.Args[0]
 36927  			if !(x.Uses == 1) {
 36928  				break
 36929  			}
 36930  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64TSTWconst, types.TypeFlags)
 36931  			v0.AuxInt = ssa.Int32ToAuxInt(int32(c))
 36932  			v0.AddArg(y)
 36933  			b.ResetWithControl(block.BlockARM64NE, v0)
 36934  			return true
 36935  		}
 36936  		// match: (NE (CMPconst [0] x:(ADDconst [c] y)) yes no)
 36937  		// cond: x.Uses == 1
 36938  		// result: (NE (CMNconst [c] y) yes no)
 36939  		for b.Controls[0].Op == ssaop.OpARM64CMPconst {
 36940  			v_0 := b.Controls[0]
 36941  			if ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
 36942  				break
 36943  			}
 36944  			x := v_0.Args[0]
 36945  			if x.Op != ssaop.OpARM64ADDconst {
 36946  				break
 36947  			}
 36948  			c := ssa.AuxIntToInt64(x.AuxInt)
 36949  			y := x.Args[0]
 36950  			if !(x.Uses == 1) {
 36951  				break
 36952  			}
 36953  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMNconst, types.TypeFlags)
 36954  			v0.AuxInt = ssa.Int64ToAuxInt(c)
 36955  			v0.AddArg(y)
 36956  			b.ResetWithControl(block.BlockARM64NE, v0)
 36957  			return true
 36958  		}
 36959  		// match: (NE (CMPWconst [0] x:(ADDconst [c] y)) yes no)
 36960  		// cond: x.Uses == 1
 36961  		// result: (NE (CMNWconst [int32(c)] y) yes no)
 36962  		for b.Controls[0].Op == ssaop.OpARM64CMPWconst {
 36963  			v_0 := b.Controls[0]
 36964  			if ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
 36965  				break
 36966  			}
 36967  			x := v_0.Args[0]
 36968  			if x.Op != ssaop.OpARM64ADDconst {
 36969  				break
 36970  			}
 36971  			c := ssa.AuxIntToInt64(x.AuxInt)
 36972  			y := x.Args[0]
 36973  			if !(x.Uses == 1) {
 36974  				break
 36975  			}
 36976  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMNWconst, types.TypeFlags)
 36977  			v0.AuxInt = ssa.Int32ToAuxInt(int32(c))
 36978  			v0.AddArg(y)
 36979  			b.ResetWithControl(block.BlockARM64NE, v0)
 36980  			return true
 36981  		}
 36982  		// match: (NE (CMPconst [0] z:(ADD x y)) yes no)
 36983  		// cond: z.Uses == 1
 36984  		// result: (NE (CMN x y) yes no)
 36985  		for b.Controls[0].Op == ssaop.OpARM64CMPconst {
 36986  			v_0 := b.Controls[0]
 36987  			if ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
 36988  				break
 36989  			}
 36990  			z := v_0.Args[0]
 36991  			if z.Op != ssaop.OpARM64ADD {
 36992  				break
 36993  			}
 36994  			_ = z.Args[1]
 36995  			z_0 := z.Args[0]
 36996  			z_1 := z.Args[1]
 36997  			for _i0 := 0; _i0 <= 1; _i0, z_0, z_1 = _i0+1, z_1, z_0 {
 36998  				x := z_0
 36999  				y := z_1
 37000  				if !(z.Uses == 1) {
 37001  					continue
 37002  				}
 37003  				v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMN, types.TypeFlags)
 37004  				v0.AddArg2(x, y)
 37005  				b.ResetWithControl(block.BlockARM64NE, v0)
 37006  				return true
 37007  			}
 37008  			break
 37009  		}
 37010  		// match: (NE (CMPWconst [0] z:(ADD x y)) yes no)
 37011  		// cond: z.Uses == 1
 37012  		// result: (NE (CMNW x y) yes no)
 37013  		for b.Controls[0].Op == ssaop.OpARM64CMPWconst {
 37014  			v_0 := b.Controls[0]
 37015  			if ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
 37016  				break
 37017  			}
 37018  			z := v_0.Args[0]
 37019  			if z.Op != ssaop.OpARM64ADD {
 37020  				break
 37021  			}
 37022  			_ = z.Args[1]
 37023  			z_0 := z.Args[0]
 37024  			z_1 := z.Args[1]
 37025  			for _i0 := 0; _i0 <= 1; _i0, z_0, z_1 = _i0+1, z_1, z_0 {
 37026  				x := z_0
 37027  				y := z_1
 37028  				if !(z.Uses == 1) {
 37029  					continue
 37030  				}
 37031  				v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMNW, types.TypeFlags)
 37032  				v0.AddArg2(x, y)
 37033  				b.ResetWithControl(block.BlockARM64NE, v0)
 37034  				return true
 37035  			}
 37036  			break
 37037  		}
 37038  		// match: (NE (CMP x z:(NEG y)) yes no)
 37039  		// cond: z.Uses == 1
 37040  		// result: (NE (CMN x y) yes no)
 37041  		for b.Controls[0].Op == ssaop.OpARM64CMP {
 37042  			v_0 := b.Controls[0]
 37043  			_ = v_0.Args[1]
 37044  			x := v_0.Args[0]
 37045  			z := v_0.Args[1]
 37046  			if z.Op != ssaop.OpARM64NEG {
 37047  				break
 37048  			}
 37049  			y := z.Args[0]
 37050  			if !(z.Uses == 1) {
 37051  				break
 37052  			}
 37053  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMN, types.TypeFlags)
 37054  			v0.AddArg2(x, y)
 37055  			b.ResetWithControl(block.BlockARM64NE, v0)
 37056  			return true
 37057  		}
 37058  		// match: (NE (CMPW x z:(NEG y)) yes no)
 37059  		// cond: z.Uses == 1
 37060  		// result: (NE (CMNW x y) yes no)
 37061  		for b.Controls[0].Op == ssaop.OpARM64CMPW {
 37062  			v_0 := b.Controls[0]
 37063  			_ = v_0.Args[1]
 37064  			x := v_0.Args[0]
 37065  			z := v_0.Args[1]
 37066  			if z.Op != ssaop.OpARM64NEG {
 37067  				break
 37068  			}
 37069  			y := z.Args[0]
 37070  			if !(z.Uses == 1) {
 37071  				break
 37072  			}
 37073  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMNW, types.TypeFlags)
 37074  			v0.AddArg2(x, y)
 37075  			b.ResetWithControl(block.BlockARM64NE, v0)
 37076  			return true
 37077  		}
 37078  		// match: (NE (CMPconst [0] x) yes no)
 37079  		// result: (NZ x yes no)
 37080  		for b.Controls[0].Op == ssaop.OpARM64CMPconst {
 37081  			v_0 := b.Controls[0]
 37082  			if ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
 37083  				break
 37084  			}
 37085  			x := v_0.Args[0]
 37086  			b.ResetWithControl(block.BlockARM64NZ, x)
 37087  			return true
 37088  		}
 37089  		// match: (NE (CMPWconst [0] x) yes no)
 37090  		// result: (NZW x yes no)
 37091  		for b.Controls[0].Op == ssaop.OpARM64CMPWconst {
 37092  			v_0 := b.Controls[0]
 37093  			if ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
 37094  				break
 37095  			}
 37096  			x := v_0.Args[0]
 37097  			b.ResetWithControl(block.BlockARM64NZW, x)
 37098  			return true
 37099  		}
 37100  		// match: (NE (CMPconst [0] z:(MADD a x y)) yes no)
 37101  		// cond: z.Uses==1
 37102  		// result: (NE (CMN a (MUL <x.Type> x y)) yes no)
 37103  		for b.Controls[0].Op == ssaop.OpARM64CMPconst {
 37104  			v_0 := b.Controls[0]
 37105  			if ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
 37106  				break
 37107  			}
 37108  			z := v_0.Args[0]
 37109  			if z.Op != ssaop.OpARM64MADD {
 37110  				break
 37111  			}
 37112  			y := z.Args[2]
 37113  			a := z.Args[0]
 37114  			x := z.Args[1]
 37115  			if !(z.Uses == 1) {
 37116  				break
 37117  			}
 37118  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMN, types.TypeFlags)
 37119  			v1 := b.NewValue0(v_0.Pos, ssaop.OpARM64MUL, x.Type)
 37120  			v1.AddArg2(x, y)
 37121  			v0.AddArg2(a, v1)
 37122  			b.ResetWithControl(block.BlockARM64NE, v0)
 37123  			return true
 37124  		}
 37125  		// match: (NE (CMPWconst [0] z:(MADDW a x y)) yes no)
 37126  		// cond: z.Uses==1
 37127  		// result: (NE (CMNW a (MULW <x.Type> x y)) yes no)
 37128  		for b.Controls[0].Op == ssaop.OpARM64CMPWconst {
 37129  			v_0 := b.Controls[0]
 37130  			if ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
 37131  				break
 37132  			}
 37133  			z := v_0.Args[0]
 37134  			if z.Op != ssaop.OpARM64MADDW {
 37135  				break
 37136  			}
 37137  			y := z.Args[2]
 37138  			a := z.Args[0]
 37139  			x := z.Args[1]
 37140  			if !(z.Uses == 1) {
 37141  				break
 37142  			}
 37143  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMNW, types.TypeFlags)
 37144  			v1 := b.NewValue0(v_0.Pos, ssaop.OpARM64MULW, x.Type)
 37145  			v1.AddArg2(x, y)
 37146  			v0.AddArg2(a, v1)
 37147  			b.ResetWithControl(block.BlockARM64NE, v0)
 37148  			return true
 37149  		}
 37150  		// match: (NE (CMPconst [0] z:(MSUB a x y)) yes no)
 37151  		// cond: z.Uses==1
 37152  		// result: (NE (CMP a (MUL <x.Type> x y)) yes no)
 37153  		for b.Controls[0].Op == ssaop.OpARM64CMPconst {
 37154  			v_0 := b.Controls[0]
 37155  			if ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
 37156  				break
 37157  			}
 37158  			z := v_0.Args[0]
 37159  			if z.Op != ssaop.OpARM64MSUB {
 37160  				break
 37161  			}
 37162  			y := z.Args[2]
 37163  			a := z.Args[0]
 37164  			x := z.Args[1]
 37165  			if !(z.Uses == 1) {
 37166  				break
 37167  			}
 37168  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMP, types.TypeFlags)
 37169  			v1 := b.NewValue0(v_0.Pos, ssaop.OpARM64MUL, x.Type)
 37170  			v1.AddArg2(x, y)
 37171  			v0.AddArg2(a, v1)
 37172  			b.ResetWithControl(block.BlockARM64NE, v0)
 37173  			return true
 37174  		}
 37175  		// match: (NE (CMPWconst [0] z:(MSUBW a x y)) yes no)
 37176  		// cond: z.Uses==1
 37177  		// result: (NE (CMPW a (MULW <x.Type> x y)) yes no)
 37178  		for b.Controls[0].Op == ssaop.OpARM64CMPWconst {
 37179  			v_0 := b.Controls[0]
 37180  			if ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
 37181  				break
 37182  			}
 37183  			z := v_0.Args[0]
 37184  			if z.Op != ssaop.OpARM64MSUBW {
 37185  				break
 37186  			}
 37187  			y := z.Args[2]
 37188  			a := z.Args[0]
 37189  			x := z.Args[1]
 37190  			if !(z.Uses == 1) {
 37191  				break
 37192  			}
 37193  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMPW, types.TypeFlags)
 37194  			v1 := b.NewValue0(v_0.Pos, ssaop.OpARM64MULW, x.Type)
 37195  			v1.AddArg2(x, y)
 37196  			v0.AddArg2(a, v1)
 37197  			b.ResetWithControl(block.BlockARM64NE, v0)
 37198  			return true
 37199  		}
 37200  		// match: (NE (TSTconst [c] x) yes no)
 37201  		// cond: ssa.OneBit(c)
 37202  		// result: (TBNZ [int64(ssa.Ntz64(c))] x yes no)
 37203  		for b.Controls[0].Op == ssaop.OpARM64TSTconst {
 37204  			v_0 := b.Controls[0]
 37205  			c := ssa.AuxIntToInt64(v_0.AuxInt)
 37206  			x := v_0.Args[0]
 37207  			if !(ssa.OneBit(c)) {
 37208  				break
 37209  			}
 37210  			b.ResetWithControl(block.BlockARM64TBNZ, x)
 37211  			b.AuxInt = ssa.Int64ToAuxInt(int64(ssa.Ntz64(c)))
 37212  			return true
 37213  		}
 37214  		// match: (NE (TSTWconst [c] x) yes no)
 37215  		// cond: ssa.OneBit(int64(uint32(c)))
 37216  		// result: (TBNZ [int64(ssa.Ntz64(int64(uint32(c))))] x yes no)
 37217  		for b.Controls[0].Op == ssaop.OpARM64TSTWconst {
 37218  			v_0 := b.Controls[0]
 37219  			c := ssa.AuxIntToInt32(v_0.AuxInt)
 37220  			x := v_0.Args[0]
 37221  			if !(ssa.OneBit(int64(uint32(c)))) {
 37222  				break
 37223  			}
 37224  			b.ResetWithControl(block.BlockARM64TBNZ, x)
 37225  			b.AuxInt = ssa.Int64ToAuxInt(int64(ssa.Ntz64(int64(uint32(c)))))
 37226  			return true
 37227  		}
 37228  		// match: (NE (FlagConstant [fc]) yes no)
 37229  		// cond: fc.Ne()
 37230  		// result: (First yes no)
 37231  		for b.Controls[0].Op == ssaop.OpARM64FlagConstant {
 37232  			v_0 := b.Controls[0]
 37233  			fc := ssa.AuxIntToFlagConstant(v_0.AuxInt)
 37234  			if !(fc.Ne()) {
 37235  				break
 37236  			}
 37237  			b.Reset(block.BlockFirst)
 37238  			return true
 37239  		}
 37240  		// match: (NE (FlagConstant [fc]) yes no)
 37241  		// cond: !fc.Ne()
 37242  		// result: (First no yes)
 37243  		for b.Controls[0].Op == ssaop.OpARM64FlagConstant {
 37244  			v_0 := b.Controls[0]
 37245  			fc := ssa.AuxIntToFlagConstant(v_0.AuxInt)
 37246  			if !(!fc.Ne()) {
 37247  				break
 37248  			}
 37249  			b.Reset(block.BlockFirst)
 37250  			b.SwapSuccessors()
 37251  			return true
 37252  		}
 37253  		// match: (NE (InvertFlags cmp) yes no)
 37254  		// result: (NE cmp yes no)
 37255  		for b.Controls[0].Op == ssaop.OpARM64InvertFlags {
 37256  			v_0 := b.Controls[0]
 37257  			cmp := v_0.Args[0]
 37258  			b.ResetWithControl(block.BlockARM64NE, cmp)
 37259  			return true
 37260  		}
 37261  	case block.BlockARM64NZ:
 37262  		// match: (NZ (Equal cc) yes no)
 37263  		// result: (EQ cc yes no)
 37264  		for b.Controls[0].Op == ssaop.OpARM64Equal {
 37265  			v_0 := b.Controls[0]
 37266  			cc := v_0.Args[0]
 37267  			b.ResetWithControl(block.BlockARM64EQ, cc)
 37268  			return true
 37269  		}
 37270  		// match: (NZ (NotEqual cc) yes no)
 37271  		// result: (NE cc yes no)
 37272  		for b.Controls[0].Op == ssaop.OpARM64NotEqual {
 37273  			v_0 := b.Controls[0]
 37274  			cc := v_0.Args[0]
 37275  			b.ResetWithControl(block.BlockARM64NE, cc)
 37276  			return true
 37277  		}
 37278  		// match: (NZ (LessThan cc) yes no)
 37279  		// result: (LT cc yes no)
 37280  		for b.Controls[0].Op == ssaop.OpARM64LessThan {
 37281  			v_0 := b.Controls[0]
 37282  			cc := v_0.Args[0]
 37283  			b.ResetWithControl(block.BlockARM64LT, cc)
 37284  			return true
 37285  		}
 37286  		// match: (NZ (LessThanU cc) yes no)
 37287  		// result: (ULT cc yes no)
 37288  		for b.Controls[0].Op == ssaop.OpARM64LessThanU {
 37289  			v_0 := b.Controls[0]
 37290  			cc := v_0.Args[0]
 37291  			b.ResetWithControl(block.BlockARM64ULT, cc)
 37292  			return true
 37293  		}
 37294  		// match: (NZ (LessEqual cc) yes no)
 37295  		// result: (LE cc yes no)
 37296  		for b.Controls[0].Op == ssaop.OpARM64LessEqual {
 37297  			v_0 := b.Controls[0]
 37298  			cc := v_0.Args[0]
 37299  			b.ResetWithControl(block.BlockARM64LE, cc)
 37300  			return true
 37301  		}
 37302  		// match: (NZ (LessEqualU cc) yes no)
 37303  		// result: (ULE cc yes no)
 37304  		for b.Controls[0].Op == ssaop.OpARM64LessEqualU {
 37305  			v_0 := b.Controls[0]
 37306  			cc := v_0.Args[0]
 37307  			b.ResetWithControl(block.BlockARM64ULE, cc)
 37308  			return true
 37309  		}
 37310  		// match: (NZ (GreaterThan cc) yes no)
 37311  		// result: (GT cc yes no)
 37312  		for b.Controls[0].Op == ssaop.OpARM64GreaterThan {
 37313  			v_0 := b.Controls[0]
 37314  			cc := v_0.Args[0]
 37315  			b.ResetWithControl(block.BlockARM64GT, cc)
 37316  			return true
 37317  		}
 37318  		// match: (NZ (GreaterThanU cc) yes no)
 37319  		// result: (UGT cc yes no)
 37320  		for b.Controls[0].Op == ssaop.OpARM64GreaterThanU {
 37321  			v_0 := b.Controls[0]
 37322  			cc := v_0.Args[0]
 37323  			b.ResetWithControl(block.BlockARM64UGT, cc)
 37324  			return true
 37325  		}
 37326  		// match: (NZ (GreaterEqual cc) yes no)
 37327  		// result: (GE cc yes no)
 37328  		for b.Controls[0].Op == ssaop.OpARM64GreaterEqual {
 37329  			v_0 := b.Controls[0]
 37330  			cc := v_0.Args[0]
 37331  			b.ResetWithControl(block.BlockARM64GE, cc)
 37332  			return true
 37333  		}
 37334  		// match: (NZ (GreaterEqualU cc) yes no)
 37335  		// result: (UGE cc yes no)
 37336  		for b.Controls[0].Op == ssaop.OpARM64GreaterEqualU {
 37337  			v_0 := b.Controls[0]
 37338  			cc := v_0.Args[0]
 37339  			b.ResetWithControl(block.BlockARM64UGE, cc)
 37340  			return true
 37341  		}
 37342  		// match: (NZ (LessThanF cc) yes no)
 37343  		// result: (FLT cc yes no)
 37344  		for b.Controls[0].Op == ssaop.OpARM64LessThanF {
 37345  			v_0 := b.Controls[0]
 37346  			cc := v_0.Args[0]
 37347  			b.ResetWithControl(block.BlockARM64FLT, cc)
 37348  			return true
 37349  		}
 37350  		// match: (NZ (LessEqualF cc) yes no)
 37351  		// result: (FLE cc yes no)
 37352  		for b.Controls[0].Op == ssaop.OpARM64LessEqualF {
 37353  			v_0 := b.Controls[0]
 37354  			cc := v_0.Args[0]
 37355  			b.ResetWithControl(block.BlockARM64FLE, cc)
 37356  			return true
 37357  		}
 37358  		// match: (NZ (GreaterThanF cc) yes no)
 37359  		// result: (FGT cc yes no)
 37360  		for b.Controls[0].Op == ssaop.OpARM64GreaterThanF {
 37361  			v_0 := b.Controls[0]
 37362  			cc := v_0.Args[0]
 37363  			b.ResetWithControl(block.BlockARM64FGT, cc)
 37364  			return true
 37365  		}
 37366  		// match: (NZ (GreaterEqualF cc) yes no)
 37367  		// result: (FGE cc yes no)
 37368  		for b.Controls[0].Op == ssaop.OpARM64GreaterEqualF {
 37369  			v_0 := b.Controls[0]
 37370  			cc := v_0.Args[0]
 37371  			b.ResetWithControl(block.BlockARM64FGE, cc)
 37372  			return true
 37373  		}
 37374  		// match: (NZ sub:(SUB x y))
 37375  		// cond: sub.Uses == 1
 37376  		// result: (NE (CMP x y))
 37377  		for b.Controls[0].Op == ssaop.OpARM64SUB {
 37378  			sub := b.Controls[0]
 37379  			y := sub.Args[1]
 37380  			x := sub.Args[0]
 37381  			if !(sub.Uses == 1) {
 37382  				break
 37383  			}
 37384  			v0 := b.NewValue0(sub.Pos, ssaop.OpARM64CMP, types.TypeFlags)
 37385  			v0.AddArg2(x, y)
 37386  			b.ResetWithControl(block.BlockARM64NE, v0)
 37387  			return true
 37388  		}
 37389  		// match: (NZ sub:(SUBconst [c] y))
 37390  		// cond: sub.Uses == 1
 37391  		// result: (NE (CMPconst [c] y))
 37392  		for b.Controls[0].Op == ssaop.OpARM64SUBconst {
 37393  			sub := b.Controls[0]
 37394  			c := ssa.AuxIntToInt64(sub.AuxInt)
 37395  			y := sub.Args[0]
 37396  			if !(sub.Uses == 1) {
 37397  				break
 37398  			}
 37399  			v0 := b.NewValue0(sub.Pos, ssaop.OpARM64CMPconst, types.TypeFlags)
 37400  			v0.AuxInt = ssa.Int64ToAuxInt(c)
 37401  			v0.AddArg(y)
 37402  			b.ResetWithControl(block.BlockARM64NE, v0)
 37403  			return true
 37404  		}
 37405  		// match: (NZ (ANDconst [c] x) yes no)
 37406  		// cond: ssa.OneBit(c)
 37407  		// result: (TBNZ [int64(ssa.Ntz64(c))] x yes no)
 37408  		for b.Controls[0].Op == ssaop.OpARM64ANDconst {
 37409  			v_0 := b.Controls[0]
 37410  			c := ssa.AuxIntToInt64(v_0.AuxInt)
 37411  			x := v_0.Args[0]
 37412  			if !(ssa.OneBit(c)) {
 37413  				break
 37414  			}
 37415  			b.ResetWithControl(block.BlockARM64TBNZ, x)
 37416  			b.AuxInt = ssa.Int64ToAuxInt(int64(ssa.Ntz64(c)))
 37417  			return true
 37418  		}
 37419  		// match: (NZ s:(SRLconst [63] x) yes no)
 37420  		// cond: s.Uses == 1
 37421  		// result: (TBNZ [63] x yes no)
 37422  		for b.Controls[0].Op == ssaop.OpARM64SRLconst {
 37423  			s := b.Controls[0]
 37424  			if ssa.AuxIntToInt64(s.AuxInt) != 63 {
 37425  				break
 37426  			}
 37427  			x := s.Args[0]
 37428  			if !(s.Uses == 1) {
 37429  				break
 37430  			}
 37431  			b.ResetWithControl(block.BlockARM64TBNZ, x)
 37432  			b.AuxInt = ssa.Int64ToAuxInt(63)
 37433  			return true
 37434  		}
 37435  		// match: (NZ s:(SRAconst [63] x) yes no)
 37436  		// cond: s.Uses == 1
 37437  		// result: (TBNZ [63] x yes no)
 37438  		for b.Controls[0].Op == ssaop.OpARM64SRAconst {
 37439  			s := b.Controls[0]
 37440  			if ssa.AuxIntToInt64(s.AuxInt) != 63 {
 37441  				break
 37442  			}
 37443  			x := s.Args[0]
 37444  			if !(s.Uses == 1) {
 37445  				break
 37446  			}
 37447  			b.ResetWithControl(block.BlockARM64TBNZ, x)
 37448  			b.AuxInt = ssa.Int64ToAuxInt(63)
 37449  			return true
 37450  		}
 37451  		// match: (NZ (MOVDconst [0]) yes no)
 37452  		// result: (First no yes)
 37453  		for b.Controls[0].Op == ssaop.OpARM64MOVDconst {
 37454  			v_0 := b.Controls[0]
 37455  			if ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
 37456  				break
 37457  			}
 37458  			b.Reset(block.BlockFirst)
 37459  			b.SwapSuccessors()
 37460  			return true
 37461  		}
 37462  		// match: (NZ (MOVDconst [c]) yes no)
 37463  		// cond: c != 0
 37464  		// result: (First yes no)
 37465  		for b.Controls[0].Op == ssaop.OpARM64MOVDconst {
 37466  			v_0 := b.Controls[0]
 37467  			c := ssa.AuxIntToInt64(v_0.AuxInt)
 37468  			if !(c != 0) {
 37469  				break
 37470  			}
 37471  			b.Reset(block.BlockFirst)
 37472  			return true
 37473  		}
 37474  	case block.BlockARM64NZW:
 37475  		// match: (NZW sub:(SUB x y))
 37476  		// cond: sub.Uses == 1
 37477  		// result: (NE (CMPW x y))
 37478  		for b.Controls[0].Op == ssaop.OpARM64SUB {
 37479  			sub := b.Controls[0]
 37480  			y := sub.Args[1]
 37481  			x := sub.Args[0]
 37482  			if !(sub.Uses == 1) {
 37483  				break
 37484  			}
 37485  			v0 := b.NewValue0(sub.Pos, ssaop.OpARM64CMPW, types.TypeFlags)
 37486  			v0.AddArg2(x, y)
 37487  			b.ResetWithControl(block.BlockARM64NE, v0)
 37488  			return true
 37489  		}
 37490  		// match: (NZW sub:(SUBconst [c] y))
 37491  		// cond: sub.Uses == 1
 37492  		// result: (NE (CMPWconst [int32(c)] y))
 37493  		for b.Controls[0].Op == ssaop.OpARM64SUBconst {
 37494  			sub := b.Controls[0]
 37495  			c := ssa.AuxIntToInt64(sub.AuxInt)
 37496  			y := sub.Args[0]
 37497  			if !(sub.Uses == 1) {
 37498  				break
 37499  			}
 37500  			v0 := b.NewValue0(sub.Pos, ssaop.OpARM64CMPWconst, types.TypeFlags)
 37501  			v0.AuxInt = ssa.Int32ToAuxInt(int32(c))
 37502  			v0.AddArg(y)
 37503  			b.ResetWithControl(block.BlockARM64NE, v0)
 37504  			return true
 37505  		}
 37506  		// match: (NZW (ANDconst [c] x) yes no)
 37507  		// cond: ssa.OneBit(int64(uint32(c)))
 37508  		// result: (TBNZ [int64(ssa.Ntz64(int64(uint32(c))))] x yes no)
 37509  		for b.Controls[0].Op == ssaop.OpARM64ANDconst {
 37510  			v_0 := b.Controls[0]
 37511  			c := ssa.AuxIntToInt64(v_0.AuxInt)
 37512  			x := v_0.Args[0]
 37513  			if !(ssa.OneBit(int64(uint32(c)))) {
 37514  				break
 37515  			}
 37516  			b.ResetWithControl(block.BlockARM64TBNZ, x)
 37517  			b.AuxInt = ssa.Int64ToAuxInt(int64(ssa.Ntz64(int64(uint32(c)))))
 37518  			return true
 37519  		}
 37520  		// match: (NZW (MOVDconst [c]) yes no)
 37521  		// cond: int32(c) == 0
 37522  		// result: (First no yes)
 37523  		for b.Controls[0].Op == ssaop.OpARM64MOVDconst {
 37524  			v_0 := b.Controls[0]
 37525  			c := ssa.AuxIntToInt64(v_0.AuxInt)
 37526  			if !(int32(c) == 0) {
 37527  				break
 37528  			}
 37529  			b.Reset(block.BlockFirst)
 37530  			b.SwapSuccessors()
 37531  			return true
 37532  		}
 37533  		// match: (NZW (MOVDconst [c]) yes no)
 37534  		// cond: int32(c) != 0
 37535  		// result: (First yes no)
 37536  		for b.Controls[0].Op == ssaop.OpARM64MOVDconst {
 37537  			v_0 := b.Controls[0]
 37538  			c := ssa.AuxIntToInt64(v_0.AuxInt)
 37539  			if !(int32(c) != 0) {
 37540  				break
 37541  			}
 37542  			b.Reset(block.BlockFirst)
 37543  			return true
 37544  		}
 37545  	case block.BlockARM64TBNZ:
 37546  		// match: (TBNZ [0] (Equal cc) yes no)
 37547  		// result: (EQ cc yes no)
 37548  		for b.Controls[0].Op == ssaop.OpARM64Equal {
 37549  			v_0 := b.Controls[0]
 37550  			cc := v_0.Args[0]
 37551  			if ssa.AuxIntToInt64(b.AuxInt) != 0 {
 37552  				break
 37553  			}
 37554  			b.ResetWithControl(block.BlockARM64EQ, cc)
 37555  			return true
 37556  		}
 37557  		// match: (TBNZ [0] (NotEqual cc) yes no)
 37558  		// result: (NE cc yes no)
 37559  		for b.Controls[0].Op == ssaop.OpARM64NotEqual {
 37560  			v_0 := b.Controls[0]
 37561  			cc := v_0.Args[0]
 37562  			if ssa.AuxIntToInt64(b.AuxInt) != 0 {
 37563  				break
 37564  			}
 37565  			b.ResetWithControl(block.BlockARM64NE, cc)
 37566  			return true
 37567  		}
 37568  		// match: (TBNZ [0] (LessThan cc) yes no)
 37569  		// result: (LT cc yes no)
 37570  		for b.Controls[0].Op == ssaop.OpARM64LessThan {
 37571  			v_0 := b.Controls[0]
 37572  			cc := v_0.Args[0]
 37573  			if ssa.AuxIntToInt64(b.AuxInt) != 0 {
 37574  				break
 37575  			}
 37576  			b.ResetWithControl(block.BlockARM64LT, cc)
 37577  			return true
 37578  		}
 37579  		// match: (TBNZ [0] (LessThanU cc) yes no)
 37580  		// result: (ULT cc yes no)
 37581  		for b.Controls[0].Op == ssaop.OpARM64LessThanU {
 37582  			v_0 := b.Controls[0]
 37583  			cc := v_0.Args[0]
 37584  			if ssa.AuxIntToInt64(b.AuxInt) != 0 {
 37585  				break
 37586  			}
 37587  			b.ResetWithControl(block.BlockARM64ULT, cc)
 37588  			return true
 37589  		}
 37590  		// match: (TBNZ [0] (LessEqual cc) yes no)
 37591  		// result: (LE cc yes no)
 37592  		for b.Controls[0].Op == ssaop.OpARM64LessEqual {
 37593  			v_0 := b.Controls[0]
 37594  			cc := v_0.Args[0]
 37595  			if ssa.AuxIntToInt64(b.AuxInt) != 0 {
 37596  				break
 37597  			}
 37598  			b.ResetWithControl(block.BlockARM64LE, cc)
 37599  			return true
 37600  		}
 37601  		// match: (TBNZ [0] (LessEqualU cc) yes no)
 37602  		// result: (ULE cc yes no)
 37603  		for b.Controls[0].Op == ssaop.OpARM64LessEqualU {
 37604  			v_0 := b.Controls[0]
 37605  			cc := v_0.Args[0]
 37606  			if ssa.AuxIntToInt64(b.AuxInt) != 0 {
 37607  				break
 37608  			}
 37609  			b.ResetWithControl(block.BlockARM64ULE, cc)
 37610  			return true
 37611  		}
 37612  		// match: (TBNZ [0] (GreaterThan cc) yes no)
 37613  		// result: (GT cc yes no)
 37614  		for b.Controls[0].Op == ssaop.OpARM64GreaterThan {
 37615  			v_0 := b.Controls[0]
 37616  			cc := v_0.Args[0]
 37617  			if ssa.AuxIntToInt64(b.AuxInt) != 0 {
 37618  				break
 37619  			}
 37620  			b.ResetWithControl(block.BlockARM64GT, cc)
 37621  			return true
 37622  		}
 37623  		// match: (TBNZ [0] (GreaterThanU cc) yes no)
 37624  		// result: (UGT cc yes no)
 37625  		for b.Controls[0].Op == ssaop.OpARM64GreaterThanU {
 37626  			v_0 := b.Controls[0]
 37627  			cc := v_0.Args[0]
 37628  			if ssa.AuxIntToInt64(b.AuxInt) != 0 {
 37629  				break
 37630  			}
 37631  			b.ResetWithControl(block.BlockARM64UGT, cc)
 37632  			return true
 37633  		}
 37634  		// match: (TBNZ [0] (GreaterEqual cc) yes no)
 37635  		// result: (GE cc yes no)
 37636  		for b.Controls[0].Op == ssaop.OpARM64GreaterEqual {
 37637  			v_0 := b.Controls[0]
 37638  			cc := v_0.Args[0]
 37639  			if ssa.AuxIntToInt64(b.AuxInt) != 0 {
 37640  				break
 37641  			}
 37642  			b.ResetWithControl(block.BlockARM64GE, cc)
 37643  			return true
 37644  		}
 37645  		// match: (TBNZ [0] (GreaterEqualU cc) yes no)
 37646  		// result: (UGE cc yes no)
 37647  		for b.Controls[0].Op == ssaop.OpARM64GreaterEqualU {
 37648  			v_0 := b.Controls[0]
 37649  			cc := v_0.Args[0]
 37650  			if ssa.AuxIntToInt64(b.AuxInt) != 0 {
 37651  				break
 37652  			}
 37653  			b.ResetWithControl(block.BlockARM64UGE, cc)
 37654  			return true
 37655  		}
 37656  		// match: (TBNZ [0] (LessThanF cc) yes no)
 37657  		// result: (FLT cc yes no)
 37658  		for b.Controls[0].Op == ssaop.OpARM64LessThanF {
 37659  			v_0 := b.Controls[0]
 37660  			cc := v_0.Args[0]
 37661  			if ssa.AuxIntToInt64(b.AuxInt) != 0 {
 37662  				break
 37663  			}
 37664  			b.ResetWithControl(block.BlockARM64FLT, cc)
 37665  			return true
 37666  		}
 37667  		// match: (TBNZ [0] (LessEqualF cc) yes no)
 37668  		// result: (FLE cc yes no)
 37669  		for b.Controls[0].Op == ssaop.OpARM64LessEqualF {
 37670  			v_0 := b.Controls[0]
 37671  			cc := v_0.Args[0]
 37672  			if ssa.AuxIntToInt64(b.AuxInt) != 0 {
 37673  				break
 37674  			}
 37675  			b.ResetWithControl(block.BlockARM64FLE, cc)
 37676  			return true
 37677  		}
 37678  		// match: (TBNZ [0] (GreaterThanF cc) yes no)
 37679  		// result: (FGT cc yes no)
 37680  		for b.Controls[0].Op == ssaop.OpARM64GreaterThanF {
 37681  			v_0 := b.Controls[0]
 37682  			cc := v_0.Args[0]
 37683  			if ssa.AuxIntToInt64(b.AuxInt) != 0 {
 37684  				break
 37685  			}
 37686  			b.ResetWithControl(block.BlockARM64FGT, cc)
 37687  			return true
 37688  		}
 37689  		// match: (TBNZ [0] (GreaterEqualF cc) yes no)
 37690  		// result: (FGE cc yes no)
 37691  		for b.Controls[0].Op == ssaop.OpARM64GreaterEqualF {
 37692  			v_0 := b.Controls[0]
 37693  			cc := v_0.Args[0]
 37694  			if ssa.AuxIntToInt64(b.AuxInt) != 0 {
 37695  				break
 37696  			}
 37697  			b.ResetWithControl(block.BlockARM64FGE, cc)
 37698  			return true
 37699  		}
 37700  		// match: (TBNZ [0] (XORconst [1] x) yes no)
 37701  		// result: (TBZ [0] x yes no)
 37702  		for b.Controls[0].Op == ssaop.OpARM64XORconst {
 37703  			v_0 := b.Controls[0]
 37704  			if ssa.AuxIntToInt64(v_0.AuxInt) != 1 {
 37705  				break
 37706  			}
 37707  			x := v_0.Args[0]
 37708  			if ssa.AuxIntToInt64(b.AuxInt) != 0 {
 37709  				break
 37710  			}
 37711  			b.ResetWithControl(block.BlockARM64TBZ, x)
 37712  			b.AuxInt = ssa.Int64ToAuxInt(0)
 37713  			return true
 37714  		}
 37715  		// match: (TBNZ [t] sv:(SRLconst [s] x) yes no)
 37716  		// cond: t+s < 64 && sv.Uses == 1
 37717  		// result: (TBNZ [t+s] x yes no )
 37718  		for b.Controls[0].Op == ssaop.OpARM64SRLconst {
 37719  			sv := b.Controls[0]
 37720  			s := ssa.AuxIntToInt64(sv.AuxInt)
 37721  			x := sv.Args[0]
 37722  			t := ssa.AuxIntToInt64(b.AuxInt)
 37723  			if !(t+s < 64 && sv.Uses == 1) {
 37724  				break
 37725  			}
 37726  			b.ResetWithControl(block.BlockARM64TBNZ, x)
 37727  			b.AuxInt = ssa.Int64ToAuxInt(t + s)
 37728  			return true
 37729  		}
 37730  		// match: (TBNZ [t] (SRLconst [s] x) yes no)
 37731  		// cond: t+s >= 64
 37732  		// result: (First no yes)
 37733  		for b.Controls[0].Op == ssaop.OpARM64SRLconst {
 37734  			v_0 := b.Controls[0]
 37735  			s := ssa.AuxIntToInt64(v_0.AuxInt)
 37736  			t := ssa.AuxIntToInt64(b.AuxInt)
 37737  			if !(t+s >= 64) {
 37738  				break
 37739  			}
 37740  			b.Reset(block.BlockFirst)
 37741  			b.SwapSuccessors()
 37742  			return true
 37743  		}
 37744  		// match: (TBNZ [t] sv:(SLLconst [s] x) yes no)
 37745  		// cond: t-s >= 0 && sv.Uses == 1
 37746  		// result: (TBNZ [t-s] x yes no )
 37747  		for b.Controls[0].Op == ssaop.OpARM64SLLconst {
 37748  			sv := b.Controls[0]
 37749  			s := ssa.AuxIntToInt64(sv.AuxInt)
 37750  			x := sv.Args[0]
 37751  			t := ssa.AuxIntToInt64(b.AuxInt)
 37752  			if !(t-s >= 0 && sv.Uses == 1) {
 37753  				break
 37754  			}
 37755  			b.ResetWithControl(block.BlockARM64TBNZ, x)
 37756  			b.AuxInt = ssa.Int64ToAuxInt(t - s)
 37757  			return true
 37758  		}
 37759  		// match: (TBNZ [t] (SLLconst [s] x) yes no)
 37760  		// cond: t-s < 0
 37761  		// result: (First no yes)
 37762  		for b.Controls[0].Op == ssaop.OpARM64SLLconst {
 37763  			v_0 := b.Controls[0]
 37764  			s := ssa.AuxIntToInt64(v_0.AuxInt)
 37765  			t := ssa.AuxIntToInt64(b.AuxInt)
 37766  			if !(t-s < 0) {
 37767  				break
 37768  			}
 37769  			b.Reset(block.BlockFirst)
 37770  			b.SwapSuccessors()
 37771  			return true
 37772  		}
 37773  		// match: (TBNZ [t] rv:(RORconst [r] x) yes no)
 37774  		// cond: rv.Uses == 1
 37775  		// result: (TBNZ [int64(uint64(t+r)%64)] x yes no)
 37776  		for b.Controls[0].Op == ssaop.OpARM64RORconst {
 37777  			rv := b.Controls[0]
 37778  			r := ssa.AuxIntToInt64(rv.AuxInt)
 37779  			x := rv.Args[0]
 37780  			t := ssa.AuxIntToInt64(b.AuxInt)
 37781  			if !(rv.Uses == 1) {
 37782  				break
 37783  			}
 37784  			b.ResetWithControl(block.BlockARM64TBNZ, x)
 37785  			b.AuxInt = ssa.Int64ToAuxInt(int64(uint64(t+r) % 64))
 37786  			return true
 37787  		}
 37788  		// match: (TBNZ [t] sv:(SRAconst [s] x) yes no)
 37789  		// cond: t+s < 64 && sv.Uses == 1
 37790  		// result: (TBNZ [t+s] x yes no)
 37791  		for b.Controls[0].Op == ssaop.OpARM64SRAconst {
 37792  			sv := b.Controls[0]
 37793  			s := ssa.AuxIntToInt64(sv.AuxInt)
 37794  			x := sv.Args[0]
 37795  			t := ssa.AuxIntToInt64(b.AuxInt)
 37796  			if !(t+s < 64 && sv.Uses == 1) {
 37797  				break
 37798  			}
 37799  			b.ResetWithControl(block.BlockARM64TBNZ, x)
 37800  			b.AuxInt = ssa.Int64ToAuxInt(t + s)
 37801  			return true
 37802  		}
 37803  		// match: (TBNZ [t] sv:(SRAconst [s] x) yes no)
 37804  		// cond: t+s >= 64 && sv.Uses == 1
 37805  		// result: (TBNZ [63 ] x yes no)
 37806  		for b.Controls[0].Op == ssaop.OpARM64SRAconst {
 37807  			sv := b.Controls[0]
 37808  			s := ssa.AuxIntToInt64(sv.AuxInt)
 37809  			x := sv.Args[0]
 37810  			t := ssa.AuxIntToInt64(b.AuxInt)
 37811  			if !(t+s >= 64 && sv.Uses == 1) {
 37812  				break
 37813  			}
 37814  			b.ResetWithControl(block.BlockARM64TBNZ, x)
 37815  			b.AuxInt = ssa.Int64ToAuxInt(63)
 37816  			return true
 37817  		}
 37818  	case block.BlockARM64TBZ:
 37819  		// match: (TBZ [0] (XORconst [1] x) yes no)
 37820  		// result: (TBNZ [0] x yes no)
 37821  		for b.Controls[0].Op == ssaop.OpARM64XORconst {
 37822  			v_0 := b.Controls[0]
 37823  			if ssa.AuxIntToInt64(v_0.AuxInt) != 1 {
 37824  				break
 37825  			}
 37826  			x := v_0.Args[0]
 37827  			if ssa.AuxIntToInt64(b.AuxInt) != 0 {
 37828  				break
 37829  			}
 37830  			b.ResetWithControl(block.BlockARM64TBNZ, x)
 37831  			b.AuxInt = ssa.Int64ToAuxInt(0)
 37832  			return true
 37833  		}
 37834  		// match: (TBZ [t] sv:(SRLconst [s] x) yes no)
 37835  		// cond: t+s < 64 && sv.Uses == 1
 37836  		// result: (TBZ [t+s] x yes no )
 37837  		for b.Controls[0].Op == ssaop.OpARM64SRLconst {
 37838  			sv := b.Controls[0]
 37839  			s := ssa.AuxIntToInt64(sv.AuxInt)
 37840  			x := sv.Args[0]
 37841  			t := ssa.AuxIntToInt64(b.AuxInt)
 37842  			if !(t+s < 64 && sv.Uses == 1) {
 37843  				break
 37844  			}
 37845  			b.ResetWithControl(block.BlockARM64TBZ, x)
 37846  			b.AuxInt = ssa.Int64ToAuxInt(t + s)
 37847  			return true
 37848  		}
 37849  		// match: (TBZ [t] (SRLconst [s] x) yes no)
 37850  		// cond: t+s >= 64
 37851  		// result: (First yes no )
 37852  		for b.Controls[0].Op == ssaop.OpARM64SRLconst {
 37853  			v_0 := b.Controls[0]
 37854  			s := ssa.AuxIntToInt64(v_0.AuxInt)
 37855  			t := ssa.AuxIntToInt64(b.AuxInt)
 37856  			if !(t+s >= 64) {
 37857  				break
 37858  			}
 37859  			b.Reset(block.BlockFirst)
 37860  			return true
 37861  		}
 37862  		// match: (TBZ [t] sv:(SLLconst [s] x) yes no)
 37863  		// cond: t-s >= 0 && sv.Uses == 1
 37864  		// result: (TBZ [t-s] x yes no )
 37865  		for b.Controls[0].Op == ssaop.OpARM64SLLconst {
 37866  			sv := b.Controls[0]
 37867  			s := ssa.AuxIntToInt64(sv.AuxInt)
 37868  			x := sv.Args[0]
 37869  			t := ssa.AuxIntToInt64(b.AuxInt)
 37870  			if !(t-s >= 0 && sv.Uses == 1) {
 37871  				break
 37872  			}
 37873  			b.ResetWithControl(block.BlockARM64TBZ, x)
 37874  			b.AuxInt = ssa.Int64ToAuxInt(t - s)
 37875  			return true
 37876  		}
 37877  		// match: (TBZ [t] (SLLconst [s] x) yes no)
 37878  		// cond: t-s < 0
 37879  		// result: (First yes no )
 37880  		for b.Controls[0].Op == ssaop.OpARM64SLLconst {
 37881  			v_0 := b.Controls[0]
 37882  			s := ssa.AuxIntToInt64(v_0.AuxInt)
 37883  			t := ssa.AuxIntToInt64(b.AuxInt)
 37884  			if !(t-s < 0) {
 37885  				break
 37886  			}
 37887  			b.Reset(block.BlockFirst)
 37888  			return true
 37889  		}
 37890  		// match: (TBZ [t] rv:(RORconst [r] x) yes no)
 37891  		// cond: rv.Uses == 1
 37892  		// result: (TBZ [int64(uint64(t+r)%64)] x yes no)
 37893  		for b.Controls[0].Op == ssaop.OpARM64RORconst {
 37894  			rv := b.Controls[0]
 37895  			r := ssa.AuxIntToInt64(rv.AuxInt)
 37896  			x := rv.Args[0]
 37897  			t := ssa.AuxIntToInt64(b.AuxInt)
 37898  			if !(rv.Uses == 1) {
 37899  				break
 37900  			}
 37901  			b.ResetWithControl(block.BlockARM64TBZ, x)
 37902  			b.AuxInt = ssa.Int64ToAuxInt(int64(uint64(t+r) % 64))
 37903  			return true
 37904  		}
 37905  		// match: (TBZ [t] sv:(SRAconst [s] x) yes no)
 37906  		// cond: t+s < 64 && sv.Uses == 1
 37907  		// result: (TBZ [t+s] x yes no)
 37908  		for b.Controls[0].Op == ssaop.OpARM64SRAconst {
 37909  			sv := b.Controls[0]
 37910  			s := ssa.AuxIntToInt64(sv.AuxInt)
 37911  			x := sv.Args[0]
 37912  			t := ssa.AuxIntToInt64(b.AuxInt)
 37913  			if !(t+s < 64 && sv.Uses == 1) {
 37914  				break
 37915  			}
 37916  			b.ResetWithControl(block.BlockARM64TBZ, x)
 37917  			b.AuxInt = ssa.Int64ToAuxInt(t + s)
 37918  			return true
 37919  		}
 37920  		// match: (TBZ [t] sv:(SRAconst [s] x) yes no)
 37921  		// cond: t+s >= 64 && sv.Uses == 1
 37922  		// result: (TBZ [63 ] x yes no)
 37923  		for b.Controls[0].Op == ssaop.OpARM64SRAconst {
 37924  			sv := b.Controls[0]
 37925  			s := ssa.AuxIntToInt64(sv.AuxInt)
 37926  			x := sv.Args[0]
 37927  			t := ssa.AuxIntToInt64(b.AuxInt)
 37928  			if !(t+s >= 64 && sv.Uses == 1) {
 37929  				break
 37930  			}
 37931  			b.ResetWithControl(block.BlockARM64TBZ, x)
 37932  			b.AuxInt = ssa.Int64ToAuxInt(63)
 37933  			return true
 37934  		}
 37935  	case block.BlockARM64UGE:
 37936  		// match: (UGE (CMPWconst [128] x) yes no)
 37937  		// cond: ssa.ZeroUpper56Bits(x)
 37938  		// result: (TBNZ [7] x yes no)
 37939  		for b.Controls[0].Op == ssaop.OpARM64CMPWconst {
 37940  			v_0 := b.Controls[0]
 37941  			if ssa.AuxIntToInt32(v_0.AuxInt) != 128 {
 37942  				break
 37943  			}
 37944  			x := v_0.Args[0]
 37945  			if !(ssa.ZeroUpper56Bits(x)) {
 37946  				break
 37947  			}
 37948  			b.ResetWithControl(block.BlockARM64TBNZ, x)
 37949  			b.AuxInt = ssa.Int64ToAuxInt(7)
 37950  			return true
 37951  		}
 37952  		// match: (UGE (CMPconst [128] x) yes no)
 37953  		// cond: ssa.ZeroUpper56Bits(x)
 37954  		// result: (TBNZ [7] x yes no)
 37955  		for b.Controls[0].Op == ssaop.OpARM64CMPconst {
 37956  			v_0 := b.Controls[0]
 37957  			if ssa.AuxIntToInt64(v_0.AuxInt) != 128 {
 37958  				break
 37959  			}
 37960  			x := v_0.Args[0]
 37961  			if !(ssa.ZeroUpper56Bits(x)) {
 37962  				break
 37963  			}
 37964  			b.ResetWithControl(block.BlockARM64TBNZ, x)
 37965  			b.AuxInt = ssa.Int64ToAuxInt(7)
 37966  			return true
 37967  		}
 37968  		// match: (UGE (FlagConstant [fc]) yes no)
 37969  		// cond: fc.Uge()
 37970  		// result: (First yes no)
 37971  		for b.Controls[0].Op == ssaop.OpARM64FlagConstant {
 37972  			v_0 := b.Controls[0]
 37973  			fc := ssa.AuxIntToFlagConstant(v_0.AuxInt)
 37974  			if !(fc.Uge()) {
 37975  				break
 37976  			}
 37977  			b.Reset(block.BlockFirst)
 37978  			return true
 37979  		}
 37980  		// match: (UGE (FlagConstant [fc]) yes no)
 37981  		// cond: !fc.Uge()
 37982  		// result: (First no yes)
 37983  		for b.Controls[0].Op == ssaop.OpARM64FlagConstant {
 37984  			v_0 := b.Controls[0]
 37985  			fc := ssa.AuxIntToFlagConstant(v_0.AuxInt)
 37986  			if !(!fc.Uge()) {
 37987  				break
 37988  			}
 37989  			b.Reset(block.BlockFirst)
 37990  			b.SwapSuccessors()
 37991  			return true
 37992  		}
 37993  		// match: (UGE (InvertFlags cmp) yes no)
 37994  		// result: (ULE cmp yes no)
 37995  		for b.Controls[0].Op == ssaop.OpARM64InvertFlags {
 37996  			v_0 := b.Controls[0]
 37997  			cmp := v_0.Args[0]
 37998  			b.ResetWithControl(block.BlockARM64ULE, cmp)
 37999  			return true
 38000  		}
 38001  	case block.BlockARM64UGT:
 38002  		// match: (UGT (CMPconst [0] x))
 38003  		// result: (NE (CMPconst [0] x))
 38004  		for b.Controls[0].Op == ssaop.OpARM64CMPconst {
 38005  			v_0 := b.Controls[0]
 38006  			if ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
 38007  				break
 38008  			}
 38009  			x := v_0.Args[0]
 38010  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMPconst, types.TypeFlags)
 38011  			v0.AuxInt = ssa.Int64ToAuxInt(0)
 38012  			v0.AddArg(x)
 38013  			b.ResetWithControl(block.BlockARM64NE, v0)
 38014  			return true
 38015  		}
 38016  		// match: (UGT (CMPWconst [0] x))
 38017  		// result: (NE (CMPWconst [0] x))
 38018  		for b.Controls[0].Op == ssaop.OpARM64CMPWconst {
 38019  			v_0 := b.Controls[0]
 38020  			if ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
 38021  				break
 38022  			}
 38023  			x := v_0.Args[0]
 38024  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMPWconst, types.TypeFlags)
 38025  			v0.AuxInt = ssa.Int32ToAuxInt(0)
 38026  			v0.AddArg(x)
 38027  			b.ResetWithControl(block.BlockARM64NE, v0)
 38028  			return true
 38029  		}
 38030  		// match: (UGT (FlagConstant [fc]) yes no)
 38031  		// cond: fc.Ugt()
 38032  		// result: (First yes no)
 38033  		for b.Controls[0].Op == ssaop.OpARM64FlagConstant {
 38034  			v_0 := b.Controls[0]
 38035  			fc := ssa.AuxIntToFlagConstant(v_0.AuxInt)
 38036  			if !(fc.Ugt()) {
 38037  				break
 38038  			}
 38039  			b.Reset(block.BlockFirst)
 38040  			return true
 38041  		}
 38042  		// match: (UGT (FlagConstant [fc]) yes no)
 38043  		// cond: !fc.Ugt()
 38044  		// result: (First no yes)
 38045  		for b.Controls[0].Op == ssaop.OpARM64FlagConstant {
 38046  			v_0 := b.Controls[0]
 38047  			fc := ssa.AuxIntToFlagConstant(v_0.AuxInt)
 38048  			if !(!fc.Ugt()) {
 38049  				break
 38050  			}
 38051  			b.Reset(block.BlockFirst)
 38052  			b.SwapSuccessors()
 38053  			return true
 38054  		}
 38055  		// match: (UGT (InvertFlags cmp) yes no)
 38056  		// result: (ULT cmp yes no)
 38057  		for b.Controls[0].Op == ssaop.OpARM64InvertFlags {
 38058  			v_0 := b.Controls[0]
 38059  			cmp := v_0.Args[0]
 38060  			b.ResetWithControl(block.BlockARM64ULT, cmp)
 38061  			return true
 38062  		}
 38063  	case block.BlockARM64ULE:
 38064  		// match: (ULE (CMPconst [0] x))
 38065  		// result: (EQ (CMPconst [0] x))
 38066  		for b.Controls[0].Op == ssaop.OpARM64CMPconst {
 38067  			v_0 := b.Controls[0]
 38068  			if ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
 38069  				break
 38070  			}
 38071  			x := v_0.Args[0]
 38072  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMPconst, types.TypeFlags)
 38073  			v0.AuxInt = ssa.Int64ToAuxInt(0)
 38074  			v0.AddArg(x)
 38075  			b.ResetWithControl(block.BlockARM64EQ, v0)
 38076  			return true
 38077  		}
 38078  		// match: (ULE (CMPWconst [0] x))
 38079  		// result: (EQ (CMPWconst [0] x))
 38080  		for b.Controls[0].Op == ssaop.OpARM64CMPWconst {
 38081  			v_0 := b.Controls[0]
 38082  			if ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
 38083  				break
 38084  			}
 38085  			x := v_0.Args[0]
 38086  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMPWconst, types.TypeFlags)
 38087  			v0.AuxInt = ssa.Int32ToAuxInt(0)
 38088  			v0.AddArg(x)
 38089  			b.ResetWithControl(block.BlockARM64EQ, v0)
 38090  			return true
 38091  		}
 38092  		// match: (ULE (FlagConstant [fc]) yes no)
 38093  		// cond: fc.Ule()
 38094  		// result: (First yes no)
 38095  		for b.Controls[0].Op == ssaop.OpARM64FlagConstant {
 38096  			v_0 := b.Controls[0]
 38097  			fc := ssa.AuxIntToFlagConstant(v_0.AuxInt)
 38098  			if !(fc.Ule()) {
 38099  				break
 38100  			}
 38101  			b.Reset(block.BlockFirst)
 38102  			return true
 38103  		}
 38104  		// match: (ULE (FlagConstant [fc]) yes no)
 38105  		// cond: !fc.Ule()
 38106  		// result: (First no yes)
 38107  		for b.Controls[0].Op == ssaop.OpARM64FlagConstant {
 38108  			v_0 := b.Controls[0]
 38109  			fc := ssa.AuxIntToFlagConstant(v_0.AuxInt)
 38110  			if !(!fc.Ule()) {
 38111  				break
 38112  			}
 38113  			b.Reset(block.BlockFirst)
 38114  			b.SwapSuccessors()
 38115  			return true
 38116  		}
 38117  		// match: (ULE (InvertFlags cmp) yes no)
 38118  		// result: (UGE cmp yes no)
 38119  		for b.Controls[0].Op == ssaop.OpARM64InvertFlags {
 38120  			v_0 := b.Controls[0]
 38121  			cmp := v_0.Args[0]
 38122  			b.ResetWithControl(block.BlockARM64UGE, cmp)
 38123  			return true
 38124  		}
 38125  	case block.BlockARM64ULT:
 38126  		// match: (ULT (CMPWconst [128] x) yes no)
 38127  		// cond: ssa.ZeroUpper56Bits(x)
 38128  		// result: (TBZ [7] x yes no)
 38129  		for b.Controls[0].Op == ssaop.OpARM64CMPWconst {
 38130  			v_0 := b.Controls[0]
 38131  			if ssa.AuxIntToInt32(v_0.AuxInt) != 128 {
 38132  				break
 38133  			}
 38134  			x := v_0.Args[0]
 38135  			if !(ssa.ZeroUpper56Bits(x)) {
 38136  				break
 38137  			}
 38138  			b.ResetWithControl(block.BlockARM64TBZ, x)
 38139  			b.AuxInt = ssa.Int64ToAuxInt(7)
 38140  			return true
 38141  		}
 38142  		// match: (ULT (CMPconst [128] x) yes no)
 38143  		// cond: ssa.ZeroUpper56Bits(x)
 38144  		// result: (TBZ [7] x yes no)
 38145  		for b.Controls[0].Op == ssaop.OpARM64CMPconst {
 38146  			v_0 := b.Controls[0]
 38147  			if ssa.AuxIntToInt64(v_0.AuxInt) != 128 {
 38148  				break
 38149  			}
 38150  			x := v_0.Args[0]
 38151  			if !(ssa.ZeroUpper56Bits(x)) {
 38152  				break
 38153  			}
 38154  			b.ResetWithControl(block.BlockARM64TBZ, x)
 38155  			b.AuxInt = ssa.Int64ToAuxInt(7)
 38156  			return true
 38157  		}
 38158  		// match: (ULT (FlagConstant [fc]) yes no)
 38159  		// cond: fc.Ult()
 38160  		// result: (First yes no)
 38161  		for b.Controls[0].Op == ssaop.OpARM64FlagConstant {
 38162  			v_0 := b.Controls[0]
 38163  			fc := ssa.AuxIntToFlagConstant(v_0.AuxInt)
 38164  			if !(fc.Ult()) {
 38165  				break
 38166  			}
 38167  			b.Reset(block.BlockFirst)
 38168  			return true
 38169  		}
 38170  		// match: (ULT (FlagConstant [fc]) yes no)
 38171  		// cond: !fc.Ult()
 38172  		// result: (First no yes)
 38173  		for b.Controls[0].Op == ssaop.OpARM64FlagConstant {
 38174  			v_0 := b.Controls[0]
 38175  			fc := ssa.AuxIntToFlagConstant(v_0.AuxInt)
 38176  			if !(!fc.Ult()) {
 38177  				break
 38178  			}
 38179  			b.Reset(block.BlockFirst)
 38180  			b.SwapSuccessors()
 38181  			return true
 38182  		}
 38183  		// match: (ULT (InvertFlags cmp) yes no)
 38184  		// result: (UGT cmp yes no)
 38185  		for b.Controls[0].Op == ssaop.OpARM64InvertFlags {
 38186  			v_0 := b.Controls[0]
 38187  			cmp := v_0.Args[0]
 38188  			b.ResetWithControl(block.BlockARM64UGT, cmp)
 38189  			return true
 38190  		}
 38191  	case block.BlockARM64Z:
 38192  		// match: (Z sub:(SUB x y))
 38193  		// cond: sub.Uses == 1
 38194  		// result: (EQ (CMP x y))
 38195  		for b.Controls[0].Op == ssaop.OpARM64SUB {
 38196  			sub := b.Controls[0]
 38197  			y := sub.Args[1]
 38198  			x := sub.Args[0]
 38199  			if !(sub.Uses == 1) {
 38200  				break
 38201  			}
 38202  			v0 := b.NewValue0(sub.Pos, ssaop.OpARM64CMP, types.TypeFlags)
 38203  			v0.AddArg2(x, y)
 38204  			b.ResetWithControl(block.BlockARM64EQ, v0)
 38205  			return true
 38206  		}
 38207  		// match: (Z sub:(SUBconst [c] y))
 38208  		// cond: sub.Uses == 1
 38209  		// result: (EQ (CMPconst [c] y))
 38210  		for b.Controls[0].Op == ssaop.OpARM64SUBconst {
 38211  			sub := b.Controls[0]
 38212  			c := ssa.AuxIntToInt64(sub.AuxInt)
 38213  			y := sub.Args[0]
 38214  			if !(sub.Uses == 1) {
 38215  				break
 38216  			}
 38217  			v0 := b.NewValue0(sub.Pos, ssaop.OpARM64CMPconst, types.TypeFlags)
 38218  			v0.AuxInt = ssa.Int64ToAuxInt(c)
 38219  			v0.AddArg(y)
 38220  			b.ResetWithControl(block.BlockARM64EQ, v0)
 38221  			return true
 38222  		}
 38223  		// match: (Z (ANDconst [c] x) yes no)
 38224  		// cond: ssa.OneBit(c)
 38225  		// result: (TBZ [int64(ssa.Ntz64(c))] x yes no)
 38226  		for b.Controls[0].Op == ssaop.OpARM64ANDconst {
 38227  			v_0 := b.Controls[0]
 38228  			c := ssa.AuxIntToInt64(v_0.AuxInt)
 38229  			x := v_0.Args[0]
 38230  			if !(ssa.OneBit(c)) {
 38231  				break
 38232  			}
 38233  			b.ResetWithControl(block.BlockARM64TBZ, x)
 38234  			b.AuxInt = ssa.Int64ToAuxInt(int64(ssa.Ntz64(c)))
 38235  			return true
 38236  		}
 38237  		// match: (Z s:(SRLconst [63] x) yes no)
 38238  		// cond: s.Uses == 1
 38239  		// result: (TBZ [63] x yes no)
 38240  		for b.Controls[0].Op == ssaop.OpARM64SRLconst {
 38241  			s := b.Controls[0]
 38242  			if ssa.AuxIntToInt64(s.AuxInt) != 63 {
 38243  				break
 38244  			}
 38245  			x := s.Args[0]
 38246  			if !(s.Uses == 1) {
 38247  				break
 38248  			}
 38249  			b.ResetWithControl(block.BlockARM64TBZ, x)
 38250  			b.AuxInt = ssa.Int64ToAuxInt(63)
 38251  			return true
 38252  		}
 38253  		// match: (Z s:(SRAconst [63] x) yes no)
 38254  		// cond: s.Uses == 1
 38255  		// result: (TBZ [63] x yes no)
 38256  		for b.Controls[0].Op == ssaop.OpARM64SRAconst {
 38257  			s := b.Controls[0]
 38258  			if ssa.AuxIntToInt64(s.AuxInt) != 63 {
 38259  				break
 38260  			}
 38261  			x := s.Args[0]
 38262  			if !(s.Uses == 1) {
 38263  				break
 38264  			}
 38265  			b.ResetWithControl(block.BlockARM64TBZ, x)
 38266  			b.AuxInt = ssa.Int64ToAuxInt(63)
 38267  			return true
 38268  		}
 38269  		// match: (Z (MOVDconst [0]) yes no)
 38270  		// result: (First yes no)
 38271  		for b.Controls[0].Op == ssaop.OpARM64MOVDconst {
 38272  			v_0 := b.Controls[0]
 38273  			if ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
 38274  				break
 38275  			}
 38276  			b.Reset(block.BlockFirst)
 38277  			return true
 38278  		}
 38279  		// match: (Z (MOVDconst [c]) yes no)
 38280  		// cond: c != 0
 38281  		// result: (First no yes)
 38282  		for b.Controls[0].Op == ssaop.OpARM64MOVDconst {
 38283  			v_0 := b.Controls[0]
 38284  			c := ssa.AuxIntToInt64(v_0.AuxInt)
 38285  			if !(c != 0) {
 38286  				break
 38287  			}
 38288  			b.Reset(block.BlockFirst)
 38289  			b.SwapSuccessors()
 38290  			return true
 38291  		}
 38292  	case block.BlockARM64ZW:
 38293  		// match: (ZW sub:(SUB x y))
 38294  		// cond: sub.Uses == 1
 38295  		// result: (EQ (CMPW x y))
 38296  		for b.Controls[0].Op == ssaop.OpARM64SUB {
 38297  			sub := b.Controls[0]
 38298  			y := sub.Args[1]
 38299  			x := sub.Args[0]
 38300  			if !(sub.Uses == 1) {
 38301  				break
 38302  			}
 38303  			v0 := b.NewValue0(sub.Pos, ssaop.OpARM64CMPW, types.TypeFlags)
 38304  			v0.AddArg2(x, y)
 38305  			b.ResetWithControl(block.BlockARM64EQ, v0)
 38306  			return true
 38307  		}
 38308  		// match: (ZW sub:(SUBconst [c] y))
 38309  		// cond: sub.Uses == 1
 38310  		// result: (EQ (CMPWconst [int32(c)] y))
 38311  		for b.Controls[0].Op == ssaop.OpARM64SUBconst {
 38312  			sub := b.Controls[0]
 38313  			c := ssa.AuxIntToInt64(sub.AuxInt)
 38314  			y := sub.Args[0]
 38315  			if !(sub.Uses == 1) {
 38316  				break
 38317  			}
 38318  			v0 := b.NewValue0(sub.Pos, ssaop.OpARM64CMPWconst, types.TypeFlags)
 38319  			v0.AuxInt = ssa.Int32ToAuxInt(int32(c))
 38320  			v0.AddArg(y)
 38321  			b.ResetWithControl(block.BlockARM64EQ, v0)
 38322  			return true
 38323  		}
 38324  		// match: (ZW (ANDconst [c] x) yes no)
 38325  		// cond: ssa.OneBit(int64(uint32(c)))
 38326  		// result: (TBZ [int64(ssa.Ntz64(int64(uint32(c))))] x yes no)
 38327  		for b.Controls[0].Op == ssaop.OpARM64ANDconst {
 38328  			v_0 := b.Controls[0]
 38329  			c := ssa.AuxIntToInt64(v_0.AuxInt)
 38330  			x := v_0.Args[0]
 38331  			if !(ssa.OneBit(int64(uint32(c)))) {
 38332  				break
 38333  			}
 38334  			b.ResetWithControl(block.BlockARM64TBZ, x)
 38335  			b.AuxInt = ssa.Int64ToAuxInt(int64(ssa.Ntz64(int64(uint32(c)))))
 38336  			return true
 38337  		}
 38338  		// match: (ZW (MOVDconst [c]) yes no)
 38339  		// cond: int32(c) == 0
 38340  		// result: (First yes no)
 38341  		for b.Controls[0].Op == ssaop.OpARM64MOVDconst {
 38342  			v_0 := b.Controls[0]
 38343  			c := ssa.AuxIntToInt64(v_0.AuxInt)
 38344  			if !(int32(c) == 0) {
 38345  				break
 38346  			}
 38347  			b.Reset(block.BlockFirst)
 38348  			return true
 38349  		}
 38350  		// match: (ZW (MOVDconst [c]) yes no)
 38351  		// cond: int32(c) != 0
 38352  		// result: (First no yes)
 38353  		for b.Controls[0].Op == ssaop.OpARM64MOVDconst {
 38354  			v_0 := b.Controls[0]
 38355  			c := ssa.AuxIntToInt64(v_0.AuxInt)
 38356  			if !(int32(c) != 0) {
 38357  				break
 38358  			}
 38359  			b.Reset(block.BlockFirst)
 38360  			b.SwapSuccessors()
 38361  			return true
 38362  		}
 38363  	}
 38364  	return false
 38365  }
 38366  

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