1
2
3 package ssa
4
5 import (
6 "cmd/internal/obj"
7 "cmd/internal/obj/arm"
8 "cmd/internal/obj/arm64"
9 "cmd/internal/obj/loong64"
10 "cmd/internal/obj/mips"
11 "cmd/internal/obj/ppc64"
12 "cmd/internal/obj/riscv"
13 "cmd/internal/obj/s390x"
14 "cmd/internal/obj/wasm"
15 "cmd/internal/obj/x86"
16 )
17
18 const (
19 BlockInvalid BlockKind = iota
20
21 Block386EQ
22 Block386NE
23 Block386LT
24 Block386LE
25 Block386GT
26 Block386GE
27 Block386OS
28 Block386OC
29 Block386ULT
30 Block386ULE
31 Block386UGT
32 Block386UGE
33 Block386EQF
34 Block386NEF
35 Block386ORD
36 Block386NAN
37
38 BlockAMD64EQ
39 BlockAMD64NE
40 BlockAMD64LT
41 BlockAMD64LE
42 BlockAMD64GT
43 BlockAMD64GE
44 BlockAMD64OS
45 BlockAMD64OC
46 BlockAMD64ULT
47 BlockAMD64ULE
48 BlockAMD64UGT
49 BlockAMD64UGE
50 BlockAMD64EQF
51 BlockAMD64NEF
52 BlockAMD64ORD
53 BlockAMD64NAN
54 BlockAMD64JUMPTABLE
55
56 BlockARMEQ
57 BlockARMNE
58 BlockARMLT
59 BlockARMLE
60 BlockARMGT
61 BlockARMGE
62 BlockARMULT
63 BlockARMULE
64 BlockARMUGT
65 BlockARMUGE
66 BlockARMLTnoov
67 BlockARMLEnoov
68 BlockARMGTnoov
69 BlockARMGEnoov
70
71 BlockARM64EQ
72 BlockARM64NE
73 BlockARM64LT
74 BlockARM64LE
75 BlockARM64GT
76 BlockARM64GE
77 BlockARM64ULT
78 BlockARM64ULE
79 BlockARM64UGT
80 BlockARM64UGE
81 BlockARM64Z
82 BlockARM64NZ
83 BlockARM64ZW
84 BlockARM64NZW
85 BlockARM64TBZ
86 BlockARM64TBNZ
87 BlockARM64FLT
88 BlockARM64FLE
89 BlockARM64FGT
90 BlockARM64FGE
91 BlockARM64LTnoov
92 BlockARM64LEnoov
93 BlockARM64GTnoov
94 BlockARM64GEnoov
95 BlockARM64JUMPTABLE
96
97 BlockLOONG64EQ
98 BlockLOONG64NE
99 BlockLOONG64LTZ
100 BlockLOONG64LEZ
101 BlockLOONG64GTZ
102 BlockLOONG64GEZ
103 BlockLOONG64FPT
104 BlockLOONG64FPF
105 BlockLOONG64BEQ
106 BlockLOONG64BNE
107 BlockLOONG64BGE
108 BlockLOONG64BLT
109 BlockLOONG64BGEU
110 BlockLOONG64BLTU
111
112 BlockMIPSEQ
113 BlockMIPSNE
114 BlockMIPSLTZ
115 BlockMIPSLEZ
116 BlockMIPSGTZ
117 BlockMIPSGEZ
118 BlockMIPSFPT
119 BlockMIPSFPF
120
121 BlockMIPS64EQ
122 BlockMIPS64NE
123 BlockMIPS64LTZ
124 BlockMIPS64LEZ
125 BlockMIPS64GTZ
126 BlockMIPS64GEZ
127 BlockMIPS64FPT
128 BlockMIPS64FPF
129
130 BlockPPC64EQ
131 BlockPPC64NE
132 BlockPPC64LT
133 BlockPPC64LE
134 BlockPPC64GT
135 BlockPPC64GE
136 BlockPPC64FLT
137 BlockPPC64FLE
138 BlockPPC64FGT
139 BlockPPC64FGE
140
141 BlockRISCV64BEQ
142 BlockRISCV64BNE
143 BlockRISCV64BLT
144 BlockRISCV64BGE
145 BlockRISCV64BLTU
146 BlockRISCV64BGEU
147 BlockRISCV64BEQZ
148 BlockRISCV64BNEZ
149 BlockRISCV64BLEZ
150 BlockRISCV64BGEZ
151 BlockRISCV64BLTZ
152 BlockRISCV64BGTZ
153
154 BlockS390XBRC
155 BlockS390XCRJ
156 BlockS390XCGRJ
157 BlockS390XCLRJ
158 BlockS390XCLGRJ
159 BlockS390XCIJ
160 BlockS390XCGIJ
161 BlockS390XCLIJ
162 BlockS390XCLGIJ
163
164 BlockPlain
165 BlockIf
166 BlockDefer
167 BlockRet
168 BlockRetJmp
169 BlockExit
170 BlockJumpTable
171 BlockFirst
172 )
173
174 var blockString = [...]string{
175 BlockInvalid: "BlockInvalid",
176
177 Block386EQ: "EQ",
178 Block386NE: "NE",
179 Block386LT: "LT",
180 Block386LE: "LE",
181 Block386GT: "GT",
182 Block386GE: "GE",
183 Block386OS: "OS",
184 Block386OC: "OC",
185 Block386ULT: "ULT",
186 Block386ULE: "ULE",
187 Block386UGT: "UGT",
188 Block386UGE: "UGE",
189 Block386EQF: "EQF",
190 Block386NEF: "NEF",
191 Block386ORD: "ORD",
192 Block386NAN: "NAN",
193
194 BlockAMD64EQ: "EQ",
195 BlockAMD64NE: "NE",
196 BlockAMD64LT: "LT",
197 BlockAMD64LE: "LE",
198 BlockAMD64GT: "GT",
199 BlockAMD64GE: "GE",
200 BlockAMD64OS: "OS",
201 BlockAMD64OC: "OC",
202 BlockAMD64ULT: "ULT",
203 BlockAMD64ULE: "ULE",
204 BlockAMD64UGT: "UGT",
205 BlockAMD64UGE: "UGE",
206 BlockAMD64EQF: "EQF",
207 BlockAMD64NEF: "NEF",
208 BlockAMD64ORD: "ORD",
209 BlockAMD64NAN: "NAN",
210 BlockAMD64JUMPTABLE: "JUMPTABLE",
211
212 BlockARMEQ: "EQ",
213 BlockARMNE: "NE",
214 BlockARMLT: "LT",
215 BlockARMLE: "LE",
216 BlockARMGT: "GT",
217 BlockARMGE: "GE",
218 BlockARMULT: "ULT",
219 BlockARMULE: "ULE",
220 BlockARMUGT: "UGT",
221 BlockARMUGE: "UGE",
222 BlockARMLTnoov: "LTnoov",
223 BlockARMLEnoov: "LEnoov",
224 BlockARMGTnoov: "GTnoov",
225 BlockARMGEnoov: "GEnoov",
226
227 BlockARM64EQ: "EQ",
228 BlockARM64NE: "NE",
229 BlockARM64LT: "LT",
230 BlockARM64LE: "LE",
231 BlockARM64GT: "GT",
232 BlockARM64GE: "GE",
233 BlockARM64ULT: "ULT",
234 BlockARM64ULE: "ULE",
235 BlockARM64UGT: "UGT",
236 BlockARM64UGE: "UGE",
237 BlockARM64Z: "Z",
238 BlockARM64NZ: "NZ",
239 BlockARM64ZW: "ZW",
240 BlockARM64NZW: "NZW",
241 BlockARM64TBZ: "TBZ",
242 BlockARM64TBNZ: "TBNZ",
243 BlockARM64FLT: "FLT",
244 BlockARM64FLE: "FLE",
245 BlockARM64FGT: "FGT",
246 BlockARM64FGE: "FGE",
247 BlockARM64LTnoov: "LTnoov",
248 BlockARM64LEnoov: "LEnoov",
249 BlockARM64GTnoov: "GTnoov",
250 BlockARM64GEnoov: "GEnoov",
251 BlockARM64JUMPTABLE: "JUMPTABLE",
252
253 BlockLOONG64EQ: "EQ",
254 BlockLOONG64NE: "NE",
255 BlockLOONG64LTZ: "LTZ",
256 BlockLOONG64LEZ: "LEZ",
257 BlockLOONG64GTZ: "GTZ",
258 BlockLOONG64GEZ: "GEZ",
259 BlockLOONG64FPT: "FPT",
260 BlockLOONG64FPF: "FPF",
261 BlockLOONG64BEQ: "BEQ",
262 BlockLOONG64BNE: "BNE",
263 BlockLOONG64BGE: "BGE",
264 BlockLOONG64BLT: "BLT",
265 BlockLOONG64BGEU: "BGEU",
266 BlockLOONG64BLTU: "BLTU",
267
268 BlockMIPSEQ: "EQ",
269 BlockMIPSNE: "NE",
270 BlockMIPSLTZ: "LTZ",
271 BlockMIPSLEZ: "LEZ",
272 BlockMIPSGTZ: "GTZ",
273 BlockMIPSGEZ: "GEZ",
274 BlockMIPSFPT: "FPT",
275 BlockMIPSFPF: "FPF",
276
277 BlockMIPS64EQ: "EQ",
278 BlockMIPS64NE: "NE",
279 BlockMIPS64LTZ: "LTZ",
280 BlockMIPS64LEZ: "LEZ",
281 BlockMIPS64GTZ: "GTZ",
282 BlockMIPS64GEZ: "GEZ",
283 BlockMIPS64FPT: "FPT",
284 BlockMIPS64FPF: "FPF",
285
286 BlockPPC64EQ: "EQ",
287 BlockPPC64NE: "NE",
288 BlockPPC64LT: "LT",
289 BlockPPC64LE: "LE",
290 BlockPPC64GT: "GT",
291 BlockPPC64GE: "GE",
292 BlockPPC64FLT: "FLT",
293 BlockPPC64FLE: "FLE",
294 BlockPPC64FGT: "FGT",
295 BlockPPC64FGE: "FGE",
296
297 BlockRISCV64BEQ: "BEQ",
298 BlockRISCV64BNE: "BNE",
299 BlockRISCV64BLT: "BLT",
300 BlockRISCV64BGE: "BGE",
301 BlockRISCV64BLTU: "BLTU",
302 BlockRISCV64BGEU: "BGEU",
303 BlockRISCV64BEQZ: "BEQZ",
304 BlockRISCV64BNEZ: "BNEZ",
305 BlockRISCV64BLEZ: "BLEZ",
306 BlockRISCV64BGEZ: "BGEZ",
307 BlockRISCV64BLTZ: "BLTZ",
308 BlockRISCV64BGTZ: "BGTZ",
309
310 BlockS390XBRC: "BRC",
311 BlockS390XCRJ: "CRJ",
312 BlockS390XCGRJ: "CGRJ",
313 BlockS390XCLRJ: "CLRJ",
314 BlockS390XCLGRJ: "CLGRJ",
315 BlockS390XCIJ: "CIJ",
316 BlockS390XCGIJ: "CGIJ",
317 BlockS390XCLIJ: "CLIJ",
318 BlockS390XCLGIJ: "CLGIJ",
319
320 BlockPlain: "Plain",
321 BlockIf: "If",
322 BlockDefer: "Defer",
323 BlockRet: "Ret",
324 BlockRetJmp: "RetJmp",
325 BlockExit: "Exit",
326 BlockJumpTable: "JumpTable",
327 BlockFirst: "First",
328 }
329
330 func (k BlockKind) String() string { return blockString[k] }
331 func (k BlockKind) AuxIntType() string {
332 switch k {
333 case BlockARM64TBZ:
334 return "int64"
335 case BlockARM64TBNZ:
336 return "int64"
337 case BlockS390XCIJ:
338 return "int8"
339 case BlockS390XCGIJ:
340 return "int8"
341 case BlockS390XCLIJ:
342 return "uint8"
343 case BlockS390XCLGIJ:
344 return "uint8"
345 }
346 return ""
347 }
348
349 const (
350 OpInvalid Op = iota
351
352 Op386ADDSS
353 Op386ADDSD
354 Op386SUBSS
355 Op386SUBSD
356 Op386MULSS
357 Op386MULSD
358 Op386DIVSS
359 Op386DIVSD
360 Op386MOVSSload
361 Op386MOVSDload
362 Op386MOVSSconst
363 Op386MOVSDconst
364 Op386MOVSSloadidx1
365 Op386MOVSSloadidx4
366 Op386MOVSDloadidx1
367 Op386MOVSDloadidx8
368 Op386MOVSSstore
369 Op386MOVSDstore
370 Op386MOVSSstoreidx1
371 Op386MOVSSstoreidx4
372 Op386MOVSDstoreidx1
373 Op386MOVSDstoreidx8
374 Op386ADDSSload
375 Op386ADDSDload
376 Op386SUBSSload
377 Op386SUBSDload
378 Op386MULSSload
379 Op386MULSDload
380 Op386DIVSSload
381 Op386DIVSDload
382 Op386ADDL
383 Op386ADDLconst
384 Op386ADDLcarry
385 Op386ADDLconstcarry
386 Op386ADCL
387 Op386ADCLconst
388 Op386SUBL
389 Op386SUBLconst
390 Op386SUBLcarry
391 Op386SUBLconstcarry
392 Op386SBBL
393 Op386SBBLconst
394 Op386MULL
395 Op386MULLconst
396 Op386MULLU
397 Op386HMULL
398 Op386HMULLU
399 Op386MULLQU
400 Op386AVGLU
401 Op386DIVL
402 Op386DIVW
403 Op386DIVLU
404 Op386DIVWU
405 Op386MODL
406 Op386MODW
407 Op386MODLU
408 Op386MODWU
409 Op386ANDL
410 Op386ANDLconst
411 Op386ORL
412 Op386ORLconst
413 Op386XORL
414 Op386XORLconst
415 Op386CMPL
416 Op386CMPW
417 Op386CMPB
418 Op386CMPLconst
419 Op386CMPWconst
420 Op386CMPBconst
421 Op386CMPLload
422 Op386CMPWload
423 Op386CMPBload
424 Op386CMPLconstload
425 Op386CMPWconstload
426 Op386CMPBconstload
427 Op386UCOMISS
428 Op386UCOMISD
429 Op386TESTL
430 Op386TESTW
431 Op386TESTB
432 Op386TESTLconst
433 Op386TESTWconst
434 Op386TESTBconst
435 Op386SHLL
436 Op386SHLLconst
437 Op386SHRL
438 Op386SHRW
439 Op386SHRB
440 Op386SHRLconst
441 Op386SHRWconst
442 Op386SHRBconst
443 Op386SARL
444 Op386SARW
445 Op386SARB
446 Op386SARLconst
447 Op386SARWconst
448 Op386SARBconst
449 Op386ROLL
450 Op386ROLW
451 Op386ROLB
452 Op386ROLLconst
453 Op386ROLWconst
454 Op386ROLBconst
455 Op386ADDLload
456 Op386SUBLload
457 Op386MULLload
458 Op386ANDLload
459 Op386ORLload
460 Op386XORLload
461 Op386ADDLloadidx4
462 Op386SUBLloadidx4
463 Op386MULLloadidx4
464 Op386ANDLloadidx4
465 Op386ORLloadidx4
466 Op386XORLloadidx4
467 Op386NEGL
468 Op386NOTL
469 Op386BSFL
470 Op386BSFW
471 Op386LoweredCtz32
472 Op386LoweredCtz64
473 Op386BSRL
474 Op386BSRW
475 Op386BSWAPL
476 Op386SQRTSD
477 Op386SQRTSS
478 Op386SBBLcarrymask
479 Op386SETEQ
480 Op386SETNE
481 Op386SETL
482 Op386SETLE
483 Op386SETG
484 Op386SETGE
485 Op386SETB
486 Op386SETBE
487 Op386SETA
488 Op386SETAE
489 Op386SETO
490 Op386SETEQF
491 Op386SETNEF
492 Op386SETORD
493 Op386SETNAN
494 Op386SETGF
495 Op386SETGEF
496 Op386MOVBLSX
497 Op386MOVBLZX
498 Op386MOVWLSX
499 Op386MOVWLZX
500 Op386MOVLconst
501 Op386CVTTSD2SL
502 Op386CVTTSS2SL
503 Op386CVTSL2SS
504 Op386CVTSL2SD
505 Op386CVTSD2SS
506 Op386CVTSS2SD
507 Op386PXOR
508 Op386LEAL
509 Op386LEAL1
510 Op386LEAL2
511 Op386LEAL4
512 Op386LEAL8
513 Op386MOVBload
514 Op386MOVBLSXload
515 Op386MOVWload
516 Op386MOVWLSXload
517 Op386MOVLload
518 Op386MOVBstore
519 Op386MOVWstore
520 Op386MOVLstore
521 Op386ADDLmodify
522 Op386SUBLmodify
523 Op386ANDLmodify
524 Op386ORLmodify
525 Op386XORLmodify
526 Op386ADDLmodifyidx4
527 Op386SUBLmodifyidx4
528 Op386ANDLmodifyidx4
529 Op386ORLmodifyidx4
530 Op386XORLmodifyidx4
531 Op386ADDLconstmodify
532 Op386ANDLconstmodify
533 Op386ORLconstmodify
534 Op386XORLconstmodify
535 Op386ADDLconstmodifyidx4
536 Op386ANDLconstmodifyidx4
537 Op386ORLconstmodifyidx4
538 Op386XORLconstmodifyidx4
539 Op386MOVBloadidx1
540 Op386MOVWloadidx1
541 Op386MOVWloadidx2
542 Op386MOVLloadidx1
543 Op386MOVLloadidx4
544 Op386MOVBstoreidx1
545 Op386MOVWstoreidx1
546 Op386MOVWstoreidx2
547 Op386MOVLstoreidx1
548 Op386MOVLstoreidx4
549 Op386MOVBstoreconst
550 Op386MOVWstoreconst
551 Op386MOVLstoreconst
552 Op386MOVBstoreconstidx1
553 Op386MOVWstoreconstidx1
554 Op386MOVWstoreconstidx2
555 Op386MOVLstoreconstidx1
556 Op386MOVLstoreconstidx4
557 Op386DUFFZERO
558 Op386REPSTOSL
559 Op386CALLstatic
560 Op386CALLtail
561 Op386CALLclosure
562 Op386CALLinter
563 Op386DUFFCOPY
564 Op386REPMOVSL
565 Op386InvertFlags
566 Op386LoweredGetG
567 Op386LoweredGetClosurePtr
568 Op386LoweredGetCallerPC
569 Op386LoweredGetCallerSP
570 Op386LoweredNilCheck
571 Op386LoweredWB
572 Op386LoweredPanicBoundsRR
573 Op386LoweredPanicBoundsRC
574 Op386LoweredPanicBoundsCR
575 Op386LoweredPanicBoundsCC
576 Op386LoweredPanicExtendRR
577 Op386LoweredPanicExtendRC
578 Op386FlagEQ
579 Op386FlagLT_ULT
580 Op386FlagLT_UGT
581 Op386FlagGT_UGT
582 Op386FlagGT_ULT
583 Op386MOVSSconst1
584 Op386MOVSDconst1
585 Op386MOVSSconst2
586 Op386MOVSDconst2
587
588 OpAMD64ADDSS
589 OpAMD64ADDSD
590 OpAMD64SUBSS
591 OpAMD64SUBSD
592 OpAMD64MULSS
593 OpAMD64MULSD
594 OpAMD64DIVSS
595 OpAMD64DIVSD
596 OpAMD64MOVSSload
597 OpAMD64MOVSDload
598 OpAMD64MOVSSconst
599 OpAMD64MOVSDconst
600 OpAMD64MOVSSloadidx1
601 OpAMD64MOVSSloadidx4
602 OpAMD64MOVSDloadidx1
603 OpAMD64MOVSDloadidx8
604 OpAMD64MOVSSstore
605 OpAMD64MOVSDstore
606 OpAMD64MOVSSstoreidx1
607 OpAMD64MOVSSstoreidx4
608 OpAMD64MOVSDstoreidx1
609 OpAMD64MOVSDstoreidx8
610 OpAMD64ADDSSload
611 OpAMD64ADDSDload
612 OpAMD64SUBSSload
613 OpAMD64SUBSDload
614 OpAMD64MULSSload
615 OpAMD64MULSDload
616 OpAMD64DIVSSload
617 OpAMD64DIVSDload
618 OpAMD64ADDSSloadidx1
619 OpAMD64ADDSSloadidx4
620 OpAMD64ADDSDloadidx1
621 OpAMD64ADDSDloadidx8
622 OpAMD64SUBSSloadidx1
623 OpAMD64SUBSSloadidx4
624 OpAMD64SUBSDloadidx1
625 OpAMD64SUBSDloadidx8
626 OpAMD64MULSSloadidx1
627 OpAMD64MULSSloadidx4
628 OpAMD64MULSDloadidx1
629 OpAMD64MULSDloadidx8
630 OpAMD64DIVSSloadidx1
631 OpAMD64DIVSSloadidx4
632 OpAMD64DIVSDloadidx1
633 OpAMD64DIVSDloadidx8
634 OpAMD64ADDQ
635 OpAMD64ADDL
636 OpAMD64ADDQconst
637 OpAMD64ADDLconst
638 OpAMD64ADDQconstmodify
639 OpAMD64ADDLconstmodify
640 OpAMD64SUBQ
641 OpAMD64SUBL
642 OpAMD64SUBQconst
643 OpAMD64SUBLconst
644 OpAMD64MULQ
645 OpAMD64MULL
646 OpAMD64MULQconst
647 OpAMD64MULLconst
648 OpAMD64MULLU
649 OpAMD64MULQU
650 OpAMD64HMULQ
651 OpAMD64HMULL
652 OpAMD64HMULQU
653 OpAMD64HMULLU
654 OpAMD64AVGQU
655 OpAMD64DIVQ
656 OpAMD64DIVL
657 OpAMD64DIVW
658 OpAMD64DIVQU
659 OpAMD64DIVLU
660 OpAMD64DIVWU
661 OpAMD64NEGLflags
662 OpAMD64ADDQconstflags
663 OpAMD64ADDLconstflags
664 OpAMD64ADDQcarry
665 OpAMD64ADCQ
666 OpAMD64ADDQconstcarry
667 OpAMD64ADCQconst
668 OpAMD64SUBQborrow
669 OpAMD64SBBQ
670 OpAMD64SUBQconstborrow
671 OpAMD64SBBQconst
672 OpAMD64MULQU2
673 OpAMD64DIVQU2
674 OpAMD64ANDQ
675 OpAMD64ANDL
676 OpAMD64ANDQconst
677 OpAMD64ANDLconst
678 OpAMD64ANDQconstmodify
679 OpAMD64ANDLconstmodify
680 OpAMD64ORQ
681 OpAMD64ORL
682 OpAMD64ORQconst
683 OpAMD64ORLconst
684 OpAMD64ORQconstmodify
685 OpAMD64ORLconstmodify
686 OpAMD64XORQ
687 OpAMD64XORL
688 OpAMD64XORQconst
689 OpAMD64XORLconst
690 OpAMD64XORQconstmodify
691 OpAMD64XORLconstmodify
692 OpAMD64CMPQ
693 OpAMD64CMPL
694 OpAMD64CMPW
695 OpAMD64CMPB
696 OpAMD64CMPQconst
697 OpAMD64CMPLconst
698 OpAMD64CMPWconst
699 OpAMD64CMPBconst
700 OpAMD64CMPQload
701 OpAMD64CMPLload
702 OpAMD64CMPWload
703 OpAMD64CMPBload
704 OpAMD64CMPQconstload
705 OpAMD64CMPLconstload
706 OpAMD64CMPWconstload
707 OpAMD64CMPBconstload
708 OpAMD64CMPQloadidx8
709 OpAMD64CMPQloadidx1
710 OpAMD64CMPLloadidx4
711 OpAMD64CMPLloadidx1
712 OpAMD64CMPWloadidx2
713 OpAMD64CMPWloadidx1
714 OpAMD64CMPBloadidx1
715 OpAMD64CMPQconstloadidx8
716 OpAMD64CMPQconstloadidx1
717 OpAMD64CMPLconstloadidx4
718 OpAMD64CMPLconstloadidx1
719 OpAMD64CMPWconstloadidx2
720 OpAMD64CMPWconstloadidx1
721 OpAMD64CMPBconstloadidx1
722 OpAMD64UCOMISS
723 OpAMD64UCOMISD
724 OpAMD64BTL
725 OpAMD64BTQ
726 OpAMD64BTCL
727 OpAMD64BTCQ
728 OpAMD64BTRL
729 OpAMD64BTRQ
730 OpAMD64BTSL
731 OpAMD64BTSQ
732 OpAMD64BTLconst
733 OpAMD64BTQconst
734 OpAMD64BTCQconst
735 OpAMD64BTRQconst
736 OpAMD64BTSQconst
737 OpAMD64BTSQconstmodify
738 OpAMD64BTRQconstmodify
739 OpAMD64BTCQconstmodify
740 OpAMD64TESTQ
741 OpAMD64TESTL
742 OpAMD64TESTW
743 OpAMD64TESTB
744 OpAMD64TESTQconst
745 OpAMD64TESTLconst
746 OpAMD64TESTWconst
747 OpAMD64TESTBconst
748 OpAMD64SHLQ
749 OpAMD64SHLL
750 OpAMD64SHLQconst
751 OpAMD64SHLLconst
752 OpAMD64SHRQ
753 OpAMD64SHRL
754 OpAMD64SHRW
755 OpAMD64SHRB
756 OpAMD64SHRQconst
757 OpAMD64SHRLconst
758 OpAMD64SHRWconst
759 OpAMD64SHRBconst
760 OpAMD64SARQ
761 OpAMD64SARL
762 OpAMD64SARW
763 OpAMD64SARB
764 OpAMD64SARQconst
765 OpAMD64SARLconst
766 OpAMD64SARWconst
767 OpAMD64SARBconst
768 OpAMD64SHRDQ
769 OpAMD64SHLDQ
770 OpAMD64ROLQ
771 OpAMD64ROLL
772 OpAMD64ROLW
773 OpAMD64ROLB
774 OpAMD64RORQ
775 OpAMD64RORL
776 OpAMD64RORW
777 OpAMD64RORB
778 OpAMD64ROLQconst
779 OpAMD64ROLLconst
780 OpAMD64ROLWconst
781 OpAMD64ROLBconst
782 OpAMD64ADDLload
783 OpAMD64ADDQload
784 OpAMD64SUBQload
785 OpAMD64SUBLload
786 OpAMD64ANDLload
787 OpAMD64ANDQload
788 OpAMD64ORQload
789 OpAMD64ORLload
790 OpAMD64XORQload
791 OpAMD64XORLload
792 OpAMD64ADDLloadidx1
793 OpAMD64ADDLloadidx4
794 OpAMD64ADDLloadidx8
795 OpAMD64ADDQloadidx1
796 OpAMD64ADDQloadidx8
797 OpAMD64SUBLloadidx1
798 OpAMD64SUBLloadidx4
799 OpAMD64SUBLloadidx8
800 OpAMD64SUBQloadidx1
801 OpAMD64SUBQloadidx8
802 OpAMD64ANDLloadidx1
803 OpAMD64ANDLloadidx4
804 OpAMD64ANDLloadidx8
805 OpAMD64ANDQloadidx1
806 OpAMD64ANDQloadidx8
807 OpAMD64ORLloadidx1
808 OpAMD64ORLloadidx4
809 OpAMD64ORLloadidx8
810 OpAMD64ORQloadidx1
811 OpAMD64ORQloadidx8
812 OpAMD64XORLloadidx1
813 OpAMD64XORLloadidx4
814 OpAMD64XORLloadidx8
815 OpAMD64XORQloadidx1
816 OpAMD64XORQloadidx8
817 OpAMD64ADDQmodify
818 OpAMD64SUBQmodify
819 OpAMD64ANDQmodify
820 OpAMD64ORQmodify
821 OpAMD64XORQmodify
822 OpAMD64ADDLmodify
823 OpAMD64SUBLmodify
824 OpAMD64ANDLmodify
825 OpAMD64ORLmodify
826 OpAMD64XORLmodify
827 OpAMD64ADDQmodifyidx1
828 OpAMD64ADDQmodifyidx8
829 OpAMD64SUBQmodifyidx1
830 OpAMD64SUBQmodifyidx8
831 OpAMD64ANDQmodifyidx1
832 OpAMD64ANDQmodifyidx8
833 OpAMD64ORQmodifyidx1
834 OpAMD64ORQmodifyidx8
835 OpAMD64XORQmodifyidx1
836 OpAMD64XORQmodifyidx8
837 OpAMD64ADDLmodifyidx1
838 OpAMD64ADDLmodifyidx4
839 OpAMD64ADDLmodifyidx8
840 OpAMD64SUBLmodifyidx1
841 OpAMD64SUBLmodifyidx4
842 OpAMD64SUBLmodifyidx8
843 OpAMD64ANDLmodifyidx1
844 OpAMD64ANDLmodifyidx4
845 OpAMD64ANDLmodifyidx8
846 OpAMD64ORLmodifyidx1
847 OpAMD64ORLmodifyidx4
848 OpAMD64ORLmodifyidx8
849 OpAMD64XORLmodifyidx1
850 OpAMD64XORLmodifyidx4
851 OpAMD64XORLmodifyidx8
852 OpAMD64ADDQconstmodifyidx1
853 OpAMD64ADDQconstmodifyidx8
854 OpAMD64ANDQconstmodifyidx1
855 OpAMD64ANDQconstmodifyidx8
856 OpAMD64ORQconstmodifyidx1
857 OpAMD64ORQconstmodifyidx8
858 OpAMD64XORQconstmodifyidx1
859 OpAMD64XORQconstmodifyidx8
860 OpAMD64ADDLconstmodifyidx1
861 OpAMD64ADDLconstmodifyidx4
862 OpAMD64ADDLconstmodifyidx8
863 OpAMD64ANDLconstmodifyidx1
864 OpAMD64ANDLconstmodifyidx4
865 OpAMD64ANDLconstmodifyidx8
866 OpAMD64ORLconstmodifyidx1
867 OpAMD64ORLconstmodifyidx4
868 OpAMD64ORLconstmodifyidx8
869 OpAMD64XORLconstmodifyidx1
870 OpAMD64XORLconstmodifyidx4
871 OpAMD64XORLconstmodifyidx8
872 OpAMD64NEGQ
873 OpAMD64NEGL
874 OpAMD64NOTQ
875 OpAMD64NOTL
876 OpAMD64BSFQ
877 OpAMD64BSFL
878 OpAMD64BSRQ
879 OpAMD64BSRL
880 OpAMD64CMOVQEQ
881 OpAMD64CMOVQNE
882 OpAMD64CMOVQLT
883 OpAMD64CMOVQGT
884 OpAMD64CMOVQLE
885 OpAMD64CMOVQGE
886 OpAMD64CMOVQLS
887 OpAMD64CMOVQHI
888 OpAMD64CMOVQCC
889 OpAMD64CMOVQCS
890 OpAMD64CMOVLEQ
891 OpAMD64CMOVLNE
892 OpAMD64CMOVLLT
893 OpAMD64CMOVLGT
894 OpAMD64CMOVLLE
895 OpAMD64CMOVLGE
896 OpAMD64CMOVLLS
897 OpAMD64CMOVLHI
898 OpAMD64CMOVLCC
899 OpAMD64CMOVLCS
900 OpAMD64CMOVWEQ
901 OpAMD64CMOVWNE
902 OpAMD64CMOVWLT
903 OpAMD64CMOVWGT
904 OpAMD64CMOVWLE
905 OpAMD64CMOVWGE
906 OpAMD64CMOVWLS
907 OpAMD64CMOVWHI
908 OpAMD64CMOVWCC
909 OpAMD64CMOVWCS
910 OpAMD64CMOVQEQF
911 OpAMD64CMOVQNEF
912 OpAMD64CMOVQGTF
913 OpAMD64CMOVQGEF
914 OpAMD64CMOVLEQF
915 OpAMD64CMOVLNEF
916 OpAMD64CMOVLGTF
917 OpAMD64CMOVLGEF
918 OpAMD64CMOVWEQF
919 OpAMD64CMOVWNEF
920 OpAMD64CMOVWGTF
921 OpAMD64CMOVWGEF
922 OpAMD64BSWAPQ
923 OpAMD64BSWAPL
924 OpAMD64POPCNTQ
925 OpAMD64POPCNTL
926 OpAMD64SQRTSD
927 OpAMD64SQRTSS
928 OpAMD64ROUNDSD
929 OpAMD64LoweredRound32F
930 OpAMD64LoweredRound64F
931 OpAMD64VFMADD231SS
932 OpAMD64VFMADD231SD
933 OpAMD64MINSD
934 OpAMD64MINSS
935 OpAMD64SBBQcarrymask
936 OpAMD64SBBLcarrymask
937 OpAMD64SETEQ
938 OpAMD64SETNE
939 OpAMD64SETL
940 OpAMD64SETLE
941 OpAMD64SETG
942 OpAMD64SETGE
943 OpAMD64SETB
944 OpAMD64SETBE
945 OpAMD64SETA
946 OpAMD64SETAE
947 OpAMD64SETO
948 OpAMD64SETEQstore
949 OpAMD64SETNEstore
950 OpAMD64SETLstore
951 OpAMD64SETLEstore
952 OpAMD64SETGstore
953 OpAMD64SETGEstore
954 OpAMD64SETBstore
955 OpAMD64SETBEstore
956 OpAMD64SETAstore
957 OpAMD64SETAEstore
958 OpAMD64SETEQstoreidx1
959 OpAMD64SETNEstoreidx1
960 OpAMD64SETLstoreidx1
961 OpAMD64SETLEstoreidx1
962 OpAMD64SETGstoreidx1
963 OpAMD64SETGEstoreidx1
964 OpAMD64SETBstoreidx1
965 OpAMD64SETBEstoreidx1
966 OpAMD64SETAstoreidx1
967 OpAMD64SETAEstoreidx1
968 OpAMD64SETEQF
969 OpAMD64SETNEF
970 OpAMD64SETORD
971 OpAMD64SETNAN
972 OpAMD64SETGF
973 OpAMD64SETGEF
974 OpAMD64MOVBQSX
975 OpAMD64MOVBQZX
976 OpAMD64MOVWQSX
977 OpAMD64MOVWQZX
978 OpAMD64MOVLQSX
979 OpAMD64MOVLQZX
980 OpAMD64MOVLconst
981 OpAMD64MOVQconst
982 OpAMD64CVTTSD2SL
983 OpAMD64CVTTSD2SQ
984 OpAMD64CVTTSS2SL
985 OpAMD64CVTTSS2SQ
986 OpAMD64CVTSL2SS
987 OpAMD64CVTSL2SD
988 OpAMD64CVTSQ2SS
989 OpAMD64CVTSQ2SD
990 OpAMD64CVTSD2SS
991 OpAMD64CVTSS2SD
992 OpAMD64MOVQi2f
993 OpAMD64MOVQf2i
994 OpAMD64MOVLi2f
995 OpAMD64MOVLf2i
996 OpAMD64PXOR
997 OpAMD64POR
998 OpAMD64LEAQ
999 OpAMD64LEAL
1000 OpAMD64LEAW
1001 OpAMD64LEAQ1
1002 OpAMD64LEAL1
1003 OpAMD64LEAW1
1004 OpAMD64LEAQ2
1005 OpAMD64LEAL2
1006 OpAMD64LEAW2
1007 OpAMD64LEAQ4
1008 OpAMD64LEAL4
1009 OpAMD64LEAW4
1010 OpAMD64LEAQ8
1011 OpAMD64LEAL8
1012 OpAMD64LEAW8
1013 OpAMD64MOVBload
1014 OpAMD64MOVBQSXload
1015 OpAMD64MOVWload
1016 OpAMD64MOVWQSXload
1017 OpAMD64MOVLload
1018 OpAMD64MOVLQSXload
1019 OpAMD64MOVQload
1020 OpAMD64MOVBstore
1021 OpAMD64MOVWstore
1022 OpAMD64MOVLstore
1023 OpAMD64MOVQstore
1024 OpAMD64MOVOload
1025 OpAMD64MOVOstore
1026 OpAMD64MOVBloadidx1
1027 OpAMD64MOVWloadidx1
1028 OpAMD64MOVWloadidx2
1029 OpAMD64MOVLloadidx1
1030 OpAMD64MOVLloadidx4
1031 OpAMD64MOVLloadidx8
1032 OpAMD64MOVQloadidx1
1033 OpAMD64MOVQloadidx8
1034 OpAMD64MOVBstoreidx1
1035 OpAMD64MOVWstoreidx1
1036 OpAMD64MOVWstoreidx2
1037 OpAMD64MOVLstoreidx1
1038 OpAMD64MOVLstoreidx4
1039 OpAMD64MOVLstoreidx8
1040 OpAMD64MOVQstoreidx1
1041 OpAMD64MOVQstoreidx8
1042 OpAMD64MOVBstoreconst
1043 OpAMD64MOVWstoreconst
1044 OpAMD64MOVLstoreconst
1045 OpAMD64MOVQstoreconst
1046 OpAMD64MOVOstoreconst
1047 OpAMD64MOVBstoreconstidx1
1048 OpAMD64MOVWstoreconstidx1
1049 OpAMD64MOVWstoreconstidx2
1050 OpAMD64MOVLstoreconstidx1
1051 OpAMD64MOVLstoreconstidx4
1052 OpAMD64MOVQstoreconstidx1
1053 OpAMD64MOVQstoreconstidx8
1054 OpAMD64DUFFZERO
1055 OpAMD64REPSTOSQ
1056 OpAMD64CALLstatic
1057 OpAMD64CALLtail
1058 OpAMD64CALLclosure
1059 OpAMD64CALLinter
1060 OpAMD64DUFFCOPY
1061 OpAMD64REPMOVSQ
1062 OpAMD64InvertFlags
1063 OpAMD64LoweredGetG
1064 OpAMD64LoweredGetClosurePtr
1065 OpAMD64LoweredGetCallerPC
1066 OpAMD64LoweredGetCallerSP
1067 OpAMD64LoweredNilCheck
1068 OpAMD64LoweredWB
1069 OpAMD64LoweredHasCPUFeature
1070 OpAMD64LoweredPanicBoundsRR
1071 OpAMD64LoweredPanicBoundsRC
1072 OpAMD64LoweredPanicBoundsCR
1073 OpAMD64LoweredPanicBoundsCC
1074 OpAMD64FlagEQ
1075 OpAMD64FlagLT_ULT
1076 OpAMD64FlagLT_UGT
1077 OpAMD64FlagGT_UGT
1078 OpAMD64FlagGT_ULT
1079 OpAMD64MOVBatomicload
1080 OpAMD64MOVLatomicload
1081 OpAMD64MOVQatomicload
1082 OpAMD64XCHGB
1083 OpAMD64XCHGL
1084 OpAMD64XCHGQ
1085 OpAMD64XADDLlock
1086 OpAMD64XADDQlock
1087 OpAMD64AddTupleFirst32
1088 OpAMD64AddTupleFirst64
1089 OpAMD64CMPXCHGLlock
1090 OpAMD64CMPXCHGQlock
1091 OpAMD64ANDBlock
1092 OpAMD64ANDLlock
1093 OpAMD64ANDQlock
1094 OpAMD64ORBlock
1095 OpAMD64ORLlock
1096 OpAMD64ORQlock
1097 OpAMD64LoweredAtomicAnd64
1098 OpAMD64LoweredAtomicAnd32
1099 OpAMD64LoweredAtomicOr64
1100 OpAMD64LoweredAtomicOr32
1101 OpAMD64PrefetchT0
1102 OpAMD64PrefetchNTA
1103 OpAMD64ANDNQ
1104 OpAMD64ANDNL
1105 OpAMD64BLSIQ
1106 OpAMD64BLSIL
1107 OpAMD64BLSMSKQ
1108 OpAMD64BLSMSKL
1109 OpAMD64BLSRQ
1110 OpAMD64BLSRL
1111 OpAMD64TZCNTQ
1112 OpAMD64TZCNTL
1113 OpAMD64LZCNTQ
1114 OpAMD64LZCNTL
1115 OpAMD64MOVBEWstore
1116 OpAMD64MOVBELload
1117 OpAMD64MOVBELstore
1118 OpAMD64MOVBEQload
1119 OpAMD64MOVBEQstore
1120 OpAMD64MOVBELloadidx1
1121 OpAMD64MOVBELloadidx4
1122 OpAMD64MOVBELloadidx8
1123 OpAMD64MOVBEQloadidx1
1124 OpAMD64MOVBEQloadidx8
1125 OpAMD64MOVBEWstoreidx1
1126 OpAMD64MOVBEWstoreidx2
1127 OpAMD64MOVBELstoreidx1
1128 OpAMD64MOVBELstoreidx4
1129 OpAMD64MOVBELstoreidx8
1130 OpAMD64MOVBEQstoreidx1
1131 OpAMD64MOVBEQstoreidx8
1132 OpAMD64SARXQ
1133 OpAMD64SARXL
1134 OpAMD64SHLXQ
1135 OpAMD64SHLXL
1136 OpAMD64SHRXQ
1137 OpAMD64SHRXL
1138 OpAMD64SARXLload
1139 OpAMD64SARXQload
1140 OpAMD64SHLXLload
1141 OpAMD64SHLXQload
1142 OpAMD64SHRXLload
1143 OpAMD64SHRXQload
1144 OpAMD64SARXLloadidx1
1145 OpAMD64SARXLloadidx4
1146 OpAMD64SARXLloadidx8
1147 OpAMD64SARXQloadidx1
1148 OpAMD64SARXQloadidx8
1149 OpAMD64SHLXLloadidx1
1150 OpAMD64SHLXLloadidx4
1151 OpAMD64SHLXLloadidx8
1152 OpAMD64SHLXQloadidx1
1153 OpAMD64SHLXQloadidx8
1154 OpAMD64SHRXLloadidx1
1155 OpAMD64SHRXLloadidx4
1156 OpAMD64SHRXLloadidx8
1157 OpAMD64SHRXQloadidx1
1158 OpAMD64SHRXQloadidx8
1159 OpAMD64PUNPCKLBW
1160 OpAMD64PSHUFLW
1161 OpAMD64PSHUFBbroadcast
1162 OpAMD64VPBROADCASTB
1163 OpAMD64PSIGNB
1164 OpAMD64PCMPEQB
1165 OpAMD64PMOVMSKB
1166
1167 OpARMADD
1168 OpARMADDconst
1169 OpARMSUB
1170 OpARMSUBconst
1171 OpARMRSB
1172 OpARMRSBconst
1173 OpARMMUL
1174 OpARMHMUL
1175 OpARMHMULU
1176 OpARMCALLudiv
1177 OpARMADDS
1178 OpARMADDSconst
1179 OpARMADC
1180 OpARMADCconst
1181 OpARMSUBS
1182 OpARMSUBSconst
1183 OpARMRSBSconst
1184 OpARMSBC
1185 OpARMSBCconst
1186 OpARMRSCconst
1187 OpARMMULLU
1188 OpARMMULA
1189 OpARMMULS
1190 OpARMADDF
1191 OpARMADDD
1192 OpARMSUBF
1193 OpARMSUBD
1194 OpARMMULF
1195 OpARMMULD
1196 OpARMNMULF
1197 OpARMNMULD
1198 OpARMDIVF
1199 OpARMDIVD
1200 OpARMMULAF
1201 OpARMMULAD
1202 OpARMMULSF
1203 OpARMMULSD
1204 OpARMFMULAD
1205 OpARMAND
1206 OpARMANDconst
1207 OpARMOR
1208 OpARMORconst
1209 OpARMXOR
1210 OpARMXORconst
1211 OpARMBIC
1212 OpARMBICconst
1213 OpARMBFX
1214 OpARMBFXU
1215 OpARMMVN
1216 OpARMNEGF
1217 OpARMNEGD
1218 OpARMSQRTD
1219 OpARMSQRTF
1220 OpARMABSD
1221 OpARMCLZ
1222 OpARMREV
1223 OpARMREV16
1224 OpARMRBIT
1225 OpARMSLL
1226 OpARMSLLconst
1227 OpARMSRL
1228 OpARMSRLconst
1229 OpARMSRA
1230 OpARMSRAconst
1231 OpARMSRR
1232 OpARMSRRconst
1233 OpARMADDshiftLL
1234 OpARMADDshiftRL
1235 OpARMADDshiftRA
1236 OpARMSUBshiftLL
1237 OpARMSUBshiftRL
1238 OpARMSUBshiftRA
1239 OpARMRSBshiftLL
1240 OpARMRSBshiftRL
1241 OpARMRSBshiftRA
1242 OpARMANDshiftLL
1243 OpARMANDshiftRL
1244 OpARMANDshiftRA
1245 OpARMORshiftLL
1246 OpARMORshiftRL
1247 OpARMORshiftRA
1248 OpARMXORshiftLL
1249 OpARMXORshiftRL
1250 OpARMXORshiftRA
1251 OpARMXORshiftRR
1252 OpARMBICshiftLL
1253 OpARMBICshiftRL
1254 OpARMBICshiftRA
1255 OpARMMVNshiftLL
1256 OpARMMVNshiftRL
1257 OpARMMVNshiftRA
1258 OpARMADCshiftLL
1259 OpARMADCshiftRL
1260 OpARMADCshiftRA
1261 OpARMSBCshiftLL
1262 OpARMSBCshiftRL
1263 OpARMSBCshiftRA
1264 OpARMRSCshiftLL
1265 OpARMRSCshiftRL
1266 OpARMRSCshiftRA
1267 OpARMADDSshiftLL
1268 OpARMADDSshiftRL
1269 OpARMADDSshiftRA
1270 OpARMSUBSshiftLL
1271 OpARMSUBSshiftRL
1272 OpARMSUBSshiftRA
1273 OpARMRSBSshiftLL
1274 OpARMRSBSshiftRL
1275 OpARMRSBSshiftRA
1276 OpARMADDshiftLLreg
1277 OpARMADDshiftRLreg
1278 OpARMADDshiftRAreg
1279 OpARMSUBshiftLLreg
1280 OpARMSUBshiftRLreg
1281 OpARMSUBshiftRAreg
1282 OpARMRSBshiftLLreg
1283 OpARMRSBshiftRLreg
1284 OpARMRSBshiftRAreg
1285 OpARMANDshiftLLreg
1286 OpARMANDshiftRLreg
1287 OpARMANDshiftRAreg
1288 OpARMORshiftLLreg
1289 OpARMORshiftRLreg
1290 OpARMORshiftRAreg
1291 OpARMXORshiftLLreg
1292 OpARMXORshiftRLreg
1293 OpARMXORshiftRAreg
1294 OpARMBICshiftLLreg
1295 OpARMBICshiftRLreg
1296 OpARMBICshiftRAreg
1297 OpARMMVNshiftLLreg
1298 OpARMMVNshiftRLreg
1299 OpARMMVNshiftRAreg
1300 OpARMADCshiftLLreg
1301 OpARMADCshiftRLreg
1302 OpARMADCshiftRAreg
1303 OpARMSBCshiftLLreg
1304 OpARMSBCshiftRLreg
1305 OpARMSBCshiftRAreg
1306 OpARMRSCshiftLLreg
1307 OpARMRSCshiftRLreg
1308 OpARMRSCshiftRAreg
1309 OpARMADDSshiftLLreg
1310 OpARMADDSshiftRLreg
1311 OpARMADDSshiftRAreg
1312 OpARMSUBSshiftLLreg
1313 OpARMSUBSshiftRLreg
1314 OpARMSUBSshiftRAreg
1315 OpARMRSBSshiftLLreg
1316 OpARMRSBSshiftRLreg
1317 OpARMRSBSshiftRAreg
1318 OpARMCMP
1319 OpARMCMPconst
1320 OpARMCMN
1321 OpARMCMNconst
1322 OpARMTST
1323 OpARMTSTconst
1324 OpARMTEQ
1325 OpARMTEQconst
1326 OpARMCMPF
1327 OpARMCMPD
1328 OpARMCMPshiftLL
1329 OpARMCMPshiftRL
1330 OpARMCMPshiftRA
1331 OpARMCMNshiftLL
1332 OpARMCMNshiftRL
1333 OpARMCMNshiftRA
1334 OpARMTSTshiftLL
1335 OpARMTSTshiftRL
1336 OpARMTSTshiftRA
1337 OpARMTEQshiftLL
1338 OpARMTEQshiftRL
1339 OpARMTEQshiftRA
1340 OpARMCMPshiftLLreg
1341 OpARMCMPshiftRLreg
1342 OpARMCMPshiftRAreg
1343 OpARMCMNshiftLLreg
1344 OpARMCMNshiftRLreg
1345 OpARMCMNshiftRAreg
1346 OpARMTSTshiftLLreg
1347 OpARMTSTshiftRLreg
1348 OpARMTSTshiftRAreg
1349 OpARMTEQshiftLLreg
1350 OpARMTEQshiftRLreg
1351 OpARMTEQshiftRAreg
1352 OpARMCMPF0
1353 OpARMCMPD0
1354 OpARMMOVWconst
1355 OpARMMOVFconst
1356 OpARMMOVDconst
1357 OpARMMOVWaddr
1358 OpARMMOVBload
1359 OpARMMOVBUload
1360 OpARMMOVHload
1361 OpARMMOVHUload
1362 OpARMMOVWload
1363 OpARMMOVFload
1364 OpARMMOVDload
1365 OpARMMOVBstore
1366 OpARMMOVHstore
1367 OpARMMOVWstore
1368 OpARMMOVFstore
1369 OpARMMOVDstore
1370 OpARMMOVWloadidx
1371 OpARMMOVWloadshiftLL
1372 OpARMMOVWloadshiftRL
1373 OpARMMOVWloadshiftRA
1374 OpARMMOVBUloadidx
1375 OpARMMOVBloadidx
1376 OpARMMOVHUloadidx
1377 OpARMMOVHloadidx
1378 OpARMMOVWstoreidx
1379 OpARMMOVWstoreshiftLL
1380 OpARMMOVWstoreshiftRL
1381 OpARMMOVWstoreshiftRA
1382 OpARMMOVBstoreidx
1383 OpARMMOVHstoreidx
1384 OpARMMOVBreg
1385 OpARMMOVBUreg
1386 OpARMMOVHreg
1387 OpARMMOVHUreg
1388 OpARMMOVWreg
1389 OpARMMOVWnop
1390 OpARMMOVWF
1391 OpARMMOVWD
1392 OpARMMOVWUF
1393 OpARMMOVWUD
1394 OpARMMOVFW
1395 OpARMMOVDW
1396 OpARMMOVFWU
1397 OpARMMOVDWU
1398 OpARMMOVFD
1399 OpARMMOVDF
1400 OpARMCMOVWHSconst
1401 OpARMCMOVWLSconst
1402 OpARMSRAcond
1403 OpARMCALLstatic
1404 OpARMCALLtail
1405 OpARMCALLclosure
1406 OpARMCALLinter
1407 OpARMLoweredNilCheck
1408 OpARMEqual
1409 OpARMNotEqual
1410 OpARMLessThan
1411 OpARMLessEqual
1412 OpARMGreaterThan
1413 OpARMGreaterEqual
1414 OpARMLessThanU
1415 OpARMLessEqualU
1416 OpARMGreaterThanU
1417 OpARMGreaterEqualU
1418 OpARMDUFFZERO
1419 OpARMDUFFCOPY
1420 OpARMLoweredZero
1421 OpARMLoweredMove
1422 OpARMLoweredGetClosurePtr
1423 OpARMLoweredGetCallerSP
1424 OpARMLoweredGetCallerPC
1425 OpARMLoweredPanicBoundsA
1426 OpARMLoweredPanicBoundsB
1427 OpARMLoweredPanicBoundsC
1428 OpARMLoweredPanicExtendA
1429 OpARMLoweredPanicExtendB
1430 OpARMLoweredPanicExtendC
1431 OpARMFlagConstant
1432 OpARMInvertFlags
1433 OpARMLoweredWB
1434
1435 OpARM64ADCSflags
1436 OpARM64ADCzerocarry
1437 OpARM64ADD
1438 OpARM64ADDconst
1439 OpARM64ADDSconstflags
1440 OpARM64ADDSflags
1441 OpARM64SUB
1442 OpARM64SUBconst
1443 OpARM64SBCSflags
1444 OpARM64SUBSflags
1445 OpARM64MUL
1446 OpARM64MULW
1447 OpARM64MNEG
1448 OpARM64MNEGW
1449 OpARM64MULH
1450 OpARM64UMULH
1451 OpARM64MULL
1452 OpARM64UMULL
1453 OpARM64DIV
1454 OpARM64UDIV
1455 OpARM64DIVW
1456 OpARM64UDIVW
1457 OpARM64MOD
1458 OpARM64UMOD
1459 OpARM64MODW
1460 OpARM64UMODW
1461 OpARM64FADDS
1462 OpARM64FADDD
1463 OpARM64FSUBS
1464 OpARM64FSUBD
1465 OpARM64FMULS
1466 OpARM64FMULD
1467 OpARM64FNMULS
1468 OpARM64FNMULD
1469 OpARM64FDIVS
1470 OpARM64FDIVD
1471 OpARM64AND
1472 OpARM64ANDconst
1473 OpARM64OR
1474 OpARM64ORconst
1475 OpARM64XOR
1476 OpARM64XORconst
1477 OpARM64BIC
1478 OpARM64EON
1479 OpARM64ORN
1480 OpARM64MVN
1481 OpARM64NEG
1482 OpARM64NEGSflags
1483 OpARM64NGCzerocarry
1484 OpARM64FABSD
1485 OpARM64FNEGS
1486 OpARM64FNEGD
1487 OpARM64FSQRTD
1488 OpARM64FSQRTS
1489 OpARM64FMIND
1490 OpARM64FMINS
1491 OpARM64FMAXD
1492 OpARM64FMAXS
1493 OpARM64REV
1494 OpARM64REVW
1495 OpARM64REV16
1496 OpARM64REV16W
1497 OpARM64RBIT
1498 OpARM64RBITW
1499 OpARM64CLZ
1500 OpARM64CLZW
1501 OpARM64VCNT
1502 OpARM64VUADDLV
1503 OpARM64LoweredRound32F
1504 OpARM64LoweredRound64F
1505 OpARM64FMADDS
1506 OpARM64FMADDD
1507 OpARM64FNMADDS
1508 OpARM64FNMADDD
1509 OpARM64FMSUBS
1510 OpARM64FMSUBD
1511 OpARM64FNMSUBS
1512 OpARM64FNMSUBD
1513 OpARM64MADD
1514 OpARM64MADDW
1515 OpARM64MSUB
1516 OpARM64MSUBW
1517 OpARM64SLL
1518 OpARM64SLLconst
1519 OpARM64SRL
1520 OpARM64SRLconst
1521 OpARM64SRA
1522 OpARM64SRAconst
1523 OpARM64ROR
1524 OpARM64RORW
1525 OpARM64RORconst
1526 OpARM64RORWconst
1527 OpARM64EXTRconst
1528 OpARM64EXTRWconst
1529 OpARM64CMP
1530 OpARM64CMPconst
1531 OpARM64CMPW
1532 OpARM64CMPWconst
1533 OpARM64CMN
1534 OpARM64CMNconst
1535 OpARM64CMNW
1536 OpARM64CMNWconst
1537 OpARM64TST
1538 OpARM64TSTconst
1539 OpARM64TSTW
1540 OpARM64TSTWconst
1541 OpARM64FCMPS
1542 OpARM64FCMPD
1543 OpARM64FCMPS0
1544 OpARM64FCMPD0
1545 OpARM64MVNshiftLL
1546 OpARM64MVNshiftRL
1547 OpARM64MVNshiftRA
1548 OpARM64MVNshiftRO
1549 OpARM64NEGshiftLL
1550 OpARM64NEGshiftRL
1551 OpARM64NEGshiftRA
1552 OpARM64ADDshiftLL
1553 OpARM64ADDshiftRL
1554 OpARM64ADDshiftRA
1555 OpARM64SUBshiftLL
1556 OpARM64SUBshiftRL
1557 OpARM64SUBshiftRA
1558 OpARM64ANDshiftLL
1559 OpARM64ANDshiftRL
1560 OpARM64ANDshiftRA
1561 OpARM64ANDshiftRO
1562 OpARM64ORshiftLL
1563 OpARM64ORshiftRL
1564 OpARM64ORshiftRA
1565 OpARM64ORshiftRO
1566 OpARM64XORshiftLL
1567 OpARM64XORshiftRL
1568 OpARM64XORshiftRA
1569 OpARM64XORshiftRO
1570 OpARM64BICshiftLL
1571 OpARM64BICshiftRL
1572 OpARM64BICshiftRA
1573 OpARM64BICshiftRO
1574 OpARM64EONshiftLL
1575 OpARM64EONshiftRL
1576 OpARM64EONshiftRA
1577 OpARM64EONshiftRO
1578 OpARM64ORNshiftLL
1579 OpARM64ORNshiftRL
1580 OpARM64ORNshiftRA
1581 OpARM64ORNshiftRO
1582 OpARM64CMPshiftLL
1583 OpARM64CMPshiftRL
1584 OpARM64CMPshiftRA
1585 OpARM64CMNshiftLL
1586 OpARM64CMNshiftRL
1587 OpARM64CMNshiftRA
1588 OpARM64TSTshiftLL
1589 OpARM64TSTshiftRL
1590 OpARM64TSTshiftRA
1591 OpARM64TSTshiftRO
1592 OpARM64BFI
1593 OpARM64BFXIL
1594 OpARM64SBFIZ
1595 OpARM64SBFX
1596 OpARM64UBFIZ
1597 OpARM64UBFX
1598 OpARM64MOVDconst
1599 OpARM64FMOVSconst
1600 OpARM64FMOVDconst
1601 OpARM64MOVDaddr
1602 OpARM64MOVBload
1603 OpARM64MOVBUload
1604 OpARM64MOVHload
1605 OpARM64MOVHUload
1606 OpARM64MOVWload
1607 OpARM64MOVWUload
1608 OpARM64MOVDload
1609 OpARM64FMOVSload
1610 OpARM64FMOVDload
1611 OpARM64LDP
1612 OpARM64LDPW
1613 OpARM64LDPSW
1614 OpARM64FLDPD
1615 OpARM64FLDPS
1616 OpARM64MOVDloadidx
1617 OpARM64MOVWloadidx
1618 OpARM64MOVWUloadidx
1619 OpARM64MOVHloadidx
1620 OpARM64MOVHUloadidx
1621 OpARM64MOVBloadidx
1622 OpARM64MOVBUloadidx
1623 OpARM64FMOVSloadidx
1624 OpARM64FMOVDloadidx
1625 OpARM64MOVHloadidx2
1626 OpARM64MOVHUloadidx2
1627 OpARM64MOVWloadidx4
1628 OpARM64MOVWUloadidx4
1629 OpARM64MOVDloadidx8
1630 OpARM64FMOVSloadidx4
1631 OpARM64FMOVDloadidx8
1632 OpARM64MOVBstore
1633 OpARM64MOVHstore
1634 OpARM64MOVWstore
1635 OpARM64MOVDstore
1636 OpARM64FMOVSstore
1637 OpARM64FMOVDstore
1638 OpARM64STP
1639 OpARM64STPW
1640 OpARM64FSTPD
1641 OpARM64FSTPS
1642 OpARM64MOVBstoreidx
1643 OpARM64MOVHstoreidx
1644 OpARM64MOVWstoreidx
1645 OpARM64MOVDstoreidx
1646 OpARM64FMOVSstoreidx
1647 OpARM64FMOVDstoreidx
1648 OpARM64MOVHstoreidx2
1649 OpARM64MOVWstoreidx4
1650 OpARM64MOVDstoreidx8
1651 OpARM64FMOVSstoreidx4
1652 OpARM64FMOVDstoreidx8
1653 OpARM64FMOVDgpfp
1654 OpARM64FMOVDfpgp
1655 OpARM64FMOVSgpfp
1656 OpARM64FMOVSfpgp
1657 OpARM64MOVBreg
1658 OpARM64MOVBUreg
1659 OpARM64MOVHreg
1660 OpARM64MOVHUreg
1661 OpARM64MOVWreg
1662 OpARM64MOVWUreg
1663 OpARM64MOVDreg
1664 OpARM64MOVDnop
1665 OpARM64SCVTFWS
1666 OpARM64SCVTFWD
1667 OpARM64UCVTFWS
1668 OpARM64UCVTFWD
1669 OpARM64SCVTFS
1670 OpARM64SCVTFD
1671 OpARM64UCVTFS
1672 OpARM64UCVTFD
1673 OpARM64FCVTZSSW
1674 OpARM64FCVTZSDW
1675 OpARM64FCVTZUSW
1676 OpARM64FCVTZUDW
1677 OpARM64FCVTZSS
1678 OpARM64FCVTZSD
1679 OpARM64FCVTZUS
1680 OpARM64FCVTZUD
1681 OpARM64FCVTSD
1682 OpARM64FCVTDS
1683 OpARM64FRINTAD
1684 OpARM64FRINTMD
1685 OpARM64FRINTND
1686 OpARM64FRINTPD
1687 OpARM64FRINTZD
1688 OpARM64CSEL
1689 OpARM64CSEL0
1690 OpARM64CSINC
1691 OpARM64CSINV
1692 OpARM64CSNEG
1693 OpARM64CSETM
1694 OpARM64CALLstatic
1695 OpARM64CALLtail
1696 OpARM64CALLclosure
1697 OpARM64CALLinter
1698 OpARM64LoweredNilCheck
1699 OpARM64Equal
1700 OpARM64NotEqual
1701 OpARM64LessThan
1702 OpARM64LessEqual
1703 OpARM64GreaterThan
1704 OpARM64GreaterEqual
1705 OpARM64LessThanU
1706 OpARM64LessEqualU
1707 OpARM64GreaterThanU
1708 OpARM64GreaterEqualU
1709 OpARM64LessThanF
1710 OpARM64LessEqualF
1711 OpARM64GreaterThanF
1712 OpARM64GreaterEqualF
1713 OpARM64NotLessThanF
1714 OpARM64NotLessEqualF
1715 OpARM64NotGreaterThanF
1716 OpARM64NotGreaterEqualF
1717 OpARM64LessThanNoov
1718 OpARM64GreaterEqualNoov
1719 OpARM64DUFFZERO
1720 OpARM64LoweredZero
1721 OpARM64DUFFCOPY
1722 OpARM64LoweredMove
1723 OpARM64LoweredGetClosurePtr
1724 OpARM64LoweredGetCallerSP
1725 OpARM64LoweredGetCallerPC
1726 OpARM64FlagConstant
1727 OpARM64InvertFlags
1728 OpARM64LDAR
1729 OpARM64LDARB
1730 OpARM64LDARW
1731 OpARM64STLRB
1732 OpARM64STLR
1733 OpARM64STLRW
1734 OpARM64LoweredAtomicExchange64
1735 OpARM64LoweredAtomicExchange32
1736 OpARM64LoweredAtomicExchange8
1737 OpARM64LoweredAtomicExchange64Variant
1738 OpARM64LoweredAtomicExchange32Variant
1739 OpARM64LoweredAtomicExchange8Variant
1740 OpARM64LoweredAtomicAdd64
1741 OpARM64LoweredAtomicAdd32
1742 OpARM64LoweredAtomicAdd64Variant
1743 OpARM64LoweredAtomicAdd32Variant
1744 OpARM64LoweredAtomicCas64
1745 OpARM64LoweredAtomicCas32
1746 OpARM64LoweredAtomicCas64Variant
1747 OpARM64LoweredAtomicCas32Variant
1748 OpARM64LoweredAtomicAnd8
1749 OpARM64LoweredAtomicOr8
1750 OpARM64LoweredAtomicAnd64
1751 OpARM64LoweredAtomicOr64
1752 OpARM64LoweredAtomicAnd32
1753 OpARM64LoweredAtomicOr32
1754 OpARM64LoweredAtomicAnd8Variant
1755 OpARM64LoweredAtomicOr8Variant
1756 OpARM64LoweredAtomicAnd64Variant
1757 OpARM64LoweredAtomicOr64Variant
1758 OpARM64LoweredAtomicAnd32Variant
1759 OpARM64LoweredAtomicOr32Variant
1760 OpARM64LoweredWB
1761 OpARM64LoweredPanicBoundsRR
1762 OpARM64LoweredPanicBoundsRC
1763 OpARM64LoweredPanicBoundsCR
1764 OpARM64LoweredPanicBoundsCC
1765 OpARM64PRFM
1766 OpARM64DMB
1767 OpARM64ZERO
1768
1769 OpLOONG64NEGV
1770 OpLOONG64NEGF
1771 OpLOONG64NEGD
1772 OpLOONG64SQRTD
1773 OpLOONG64SQRTF
1774 OpLOONG64ABSD
1775 OpLOONG64CLZW
1776 OpLOONG64CLZV
1777 OpLOONG64CTZW
1778 OpLOONG64CTZV
1779 OpLOONG64REVB2H
1780 OpLOONG64REVB2W
1781 OpLOONG64REVBV
1782 OpLOONG64BITREV4B
1783 OpLOONG64BITREVW
1784 OpLOONG64BITREVV
1785 OpLOONG64VPCNT64
1786 OpLOONG64VPCNT32
1787 OpLOONG64VPCNT16
1788 OpLOONG64ADDV
1789 OpLOONG64ADDVconst
1790 OpLOONG64SUBV
1791 OpLOONG64SUBVconst
1792 OpLOONG64MULV
1793 OpLOONG64MULHV
1794 OpLOONG64MULHVU
1795 OpLOONG64DIVV
1796 OpLOONG64DIVVU
1797 OpLOONG64REMV
1798 OpLOONG64REMVU
1799 OpLOONG64ADDF
1800 OpLOONG64ADDD
1801 OpLOONG64SUBF
1802 OpLOONG64SUBD
1803 OpLOONG64MULF
1804 OpLOONG64MULD
1805 OpLOONG64DIVF
1806 OpLOONG64DIVD
1807 OpLOONG64AND
1808 OpLOONG64ANDconst
1809 OpLOONG64OR
1810 OpLOONG64ORconst
1811 OpLOONG64XOR
1812 OpLOONG64XORconst
1813 OpLOONG64NOR
1814 OpLOONG64NORconst
1815 OpLOONG64ANDN
1816 OpLOONG64ORN
1817 OpLOONG64FMADDF
1818 OpLOONG64FMADDD
1819 OpLOONG64FMSUBF
1820 OpLOONG64FMSUBD
1821 OpLOONG64FNMADDF
1822 OpLOONG64FNMADDD
1823 OpLOONG64FNMSUBF
1824 OpLOONG64FNMSUBD
1825 OpLOONG64FMINF
1826 OpLOONG64FMIND
1827 OpLOONG64FMAXF
1828 OpLOONG64FMAXD
1829 OpLOONG64MASKEQZ
1830 OpLOONG64MASKNEZ
1831 OpLOONG64FCOPYSGD
1832 OpLOONG64SLL
1833 OpLOONG64SLLV
1834 OpLOONG64SLLconst
1835 OpLOONG64SLLVconst
1836 OpLOONG64SRL
1837 OpLOONG64SRLV
1838 OpLOONG64SRLconst
1839 OpLOONG64SRLVconst
1840 OpLOONG64SRA
1841 OpLOONG64SRAV
1842 OpLOONG64SRAconst
1843 OpLOONG64SRAVconst
1844 OpLOONG64ROTR
1845 OpLOONG64ROTRV
1846 OpLOONG64ROTRconst
1847 OpLOONG64ROTRVconst
1848 OpLOONG64SGT
1849 OpLOONG64SGTconst
1850 OpLOONG64SGTU
1851 OpLOONG64SGTUconst
1852 OpLOONG64CMPEQF
1853 OpLOONG64CMPEQD
1854 OpLOONG64CMPGEF
1855 OpLOONG64CMPGED
1856 OpLOONG64CMPGTF
1857 OpLOONG64CMPGTD
1858 OpLOONG64BSTRPICKW
1859 OpLOONG64BSTRPICKV
1860 OpLOONG64MOVVconst
1861 OpLOONG64MOVFconst
1862 OpLOONG64MOVDconst
1863 OpLOONG64MOVVaddr
1864 OpLOONG64MOVBload
1865 OpLOONG64MOVBUload
1866 OpLOONG64MOVHload
1867 OpLOONG64MOVHUload
1868 OpLOONG64MOVWload
1869 OpLOONG64MOVWUload
1870 OpLOONG64MOVVload
1871 OpLOONG64MOVFload
1872 OpLOONG64MOVDload
1873 OpLOONG64MOVVloadidx
1874 OpLOONG64MOVWloadidx
1875 OpLOONG64MOVWUloadidx
1876 OpLOONG64MOVHloadidx
1877 OpLOONG64MOVHUloadidx
1878 OpLOONG64MOVBloadidx
1879 OpLOONG64MOVBUloadidx
1880 OpLOONG64MOVFloadidx
1881 OpLOONG64MOVDloadidx
1882 OpLOONG64MOVBstore
1883 OpLOONG64MOVHstore
1884 OpLOONG64MOVWstore
1885 OpLOONG64MOVVstore
1886 OpLOONG64MOVFstore
1887 OpLOONG64MOVDstore
1888 OpLOONG64MOVBstoreidx
1889 OpLOONG64MOVHstoreidx
1890 OpLOONG64MOVWstoreidx
1891 OpLOONG64MOVVstoreidx
1892 OpLOONG64MOVFstoreidx
1893 OpLOONG64MOVDstoreidx
1894 OpLOONG64MOVBstorezero
1895 OpLOONG64MOVHstorezero
1896 OpLOONG64MOVWstorezero
1897 OpLOONG64MOVVstorezero
1898 OpLOONG64MOVBstorezeroidx
1899 OpLOONG64MOVHstorezeroidx
1900 OpLOONG64MOVWstorezeroidx
1901 OpLOONG64MOVVstorezeroidx
1902 OpLOONG64MOVWfpgp
1903 OpLOONG64MOVWgpfp
1904 OpLOONG64MOVVfpgp
1905 OpLOONG64MOVVgpfp
1906 OpLOONG64MOVBreg
1907 OpLOONG64MOVBUreg
1908 OpLOONG64MOVHreg
1909 OpLOONG64MOVHUreg
1910 OpLOONG64MOVWreg
1911 OpLOONG64MOVWUreg
1912 OpLOONG64MOVVreg
1913 OpLOONG64MOVVnop
1914 OpLOONG64MOVWF
1915 OpLOONG64MOVWD
1916 OpLOONG64MOVVF
1917 OpLOONG64MOVVD
1918 OpLOONG64TRUNCFW
1919 OpLOONG64TRUNCDW
1920 OpLOONG64TRUNCFV
1921 OpLOONG64TRUNCDV
1922 OpLOONG64MOVFD
1923 OpLOONG64MOVDF
1924 OpLOONG64LoweredRound32F
1925 OpLOONG64LoweredRound64F
1926 OpLOONG64CALLstatic
1927 OpLOONG64CALLtail
1928 OpLOONG64CALLclosure
1929 OpLOONG64CALLinter
1930 OpLOONG64DUFFZERO
1931 OpLOONG64DUFFCOPY
1932 OpLOONG64LoweredZero
1933 OpLOONG64LoweredMove
1934 OpLOONG64LoweredAtomicLoad8
1935 OpLOONG64LoweredAtomicLoad32
1936 OpLOONG64LoweredAtomicLoad64
1937 OpLOONG64LoweredAtomicStore8
1938 OpLOONG64LoweredAtomicStore32
1939 OpLOONG64LoweredAtomicStore64
1940 OpLOONG64LoweredAtomicStore8Variant
1941 OpLOONG64LoweredAtomicStore32Variant
1942 OpLOONG64LoweredAtomicStore64Variant
1943 OpLOONG64LoweredAtomicExchange32
1944 OpLOONG64LoweredAtomicExchange64
1945 OpLOONG64LoweredAtomicExchange8Variant
1946 OpLOONG64LoweredAtomicAdd32
1947 OpLOONG64LoweredAtomicAdd64
1948 OpLOONG64LoweredAtomicCas32
1949 OpLOONG64LoweredAtomicCas64
1950 OpLOONG64LoweredAtomicCas64Variant
1951 OpLOONG64LoweredAtomicCas32Variant
1952 OpLOONG64LoweredAtomicAnd32
1953 OpLOONG64LoweredAtomicOr32
1954 OpLOONG64LoweredAtomicAnd32value
1955 OpLOONG64LoweredAtomicAnd64value
1956 OpLOONG64LoweredAtomicOr32value
1957 OpLOONG64LoweredAtomicOr64value
1958 OpLOONG64LoweredNilCheck
1959 OpLOONG64FPFlagTrue
1960 OpLOONG64FPFlagFalse
1961 OpLOONG64LoweredGetClosurePtr
1962 OpLOONG64LoweredGetCallerSP
1963 OpLOONG64LoweredGetCallerPC
1964 OpLOONG64LoweredWB
1965 OpLOONG64LoweredPubBarrier
1966 OpLOONG64LoweredPanicBoundsA
1967 OpLOONG64LoweredPanicBoundsB
1968 OpLOONG64LoweredPanicBoundsC
1969 OpLOONG64PRELD
1970 OpLOONG64PRELDX
1971
1972 OpMIPSADD
1973 OpMIPSADDconst
1974 OpMIPSSUB
1975 OpMIPSSUBconst
1976 OpMIPSMUL
1977 OpMIPSMULT
1978 OpMIPSMULTU
1979 OpMIPSDIV
1980 OpMIPSDIVU
1981 OpMIPSADDF
1982 OpMIPSADDD
1983 OpMIPSSUBF
1984 OpMIPSSUBD
1985 OpMIPSMULF
1986 OpMIPSMULD
1987 OpMIPSDIVF
1988 OpMIPSDIVD
1989 OpMIPSAND
1990 OpMIPSANDconst
1991 OpMIPSOR
1992 OpMIPSORconst
1993 OpMIPSXOR
1994 OpMIPSXORconst
1995 OpMIPSNOR
1996 OpMIPSNORconst
1997 OpMIPSNEG
1998 OpMIPSNEGF
1999 OpMIPSNEGD
2000 OpMIPSABSD
2001 OpMIPSSQRTD
2002 OpMIPSSQRTF
2003 OpMIPSSLL
2004 OpMIPSSLLconst
2005 OpMIPSSRL
2006 OpMIPSSRLconst
2007 OpMIPSSRA
2008 OpMIPSSRAconst
2009 OpMIPSCLZ
2010 OpMIPSSGT
2011 OpMIPSSGTconst
2012 OpMIPSSGTzero
2013 OpMIPSSGTU
2014 OpMIPSSGTUconst
2015 OpMIPSSGTUzero
2016 OpMIPSCMPEQF
2017 OpMIPSCMPEQD
2018 OpMIPSCMPGEF
2019 OpMIPSCMPGED
2020 OpMIPSCMPGTF
2021 OpMIPSCMPGTD
2022 OpMIPSMOVWconst
2023 OpMIPSMOVFconst
2024 OpMIPSMOVDconst
2025 OpMIPSMOVWaddr
2026 OpMIPSMOVBload
2027 OpMIPSMOVBUload
2028 OpMIPSMOVHload
2029 OpMIPSMOVHUload
2030 OpMIPSMOVWload
2031 OpMIPSMOVFload
2032 OpMIPSMOVDload
2033 OpMIPSMOVBstore
2034 OpMIPSMOVHstore
2035 OpMIPSMOVWstore
2036 OpMIPSMOVFstore
2037 OpMIPSMOVDstore
2038 OpMIPSMOVBstorezero
2039 OpMIPSMOVHstorezero
2040 OpMIPSMOVWstorezero
2041 OpMIPSMOVWfpgp
2042 OpMIPSMOVWgpfp
2043 OpMIPSMOVBreg
2044 OpMIPSMOVBUreg
2045 OpMIPSMOVHreg
2046 OpMIPSMOVHUreg
2047 OpMIPSMOVWreg
2048 OpMIPSMOVWnop
2049 OpMIPSCMOVZ
2050 OpMIPSCMOVZzero
2051 OpMIPSMOVWF
2052 OpMIPSMOVWD
2053 OpMIPSTRUNCFW
2054 OpMIPSTRUNCDW
2055 OpMIPSMOVFD
2056 OpMIPSMOVDF
2057 OpMIPSCALLstatic
2058 OpMIPSCALLtail
2059 OpMIPSCALLclosure
2060 OpMIPSCALLinter
2061 OpMIPSLoweredAtomicLoad8
2062 OpMIPSLoweredAtomicLoad32
2063 OpMIPSLoweredAtomicStore8
2064 OpMIPSLoweredAtomicStore32
2065 OpMIPSLoweredAtomicStorezero
2066 OpMIPSLoweredAtomicExchange
2067 OpMIPSLoweredAtomicAdd
2068 OpMIPSLoweredAtomicAddconst
2069 OpMIPSLoweredAtomicCas
2070 OpMIPSLoweredAtomicAnd
2071 OpMIPSLoweredAtomicOr
2072 OpMIPSLoweredZero
2073 OpMIPSLoweredMove
2074 OpMIPSLoweredNilCheck
2075 OpMIPSFPFlagTrue
2076 OpMIPSFPFlagFalse
2077 OpMIPSLoweredGetClosurePtr
2078 OpMIPSLoweredGetCallerSP
2079 OpMIPSLoweredGetCallerPC
2080 OpMIPSLoweredWB
2081 OpMIPSLoweredPubBarrier
2082 OpMIPSLoweredPanicBoundsA
2083 OpMIPSLoweredPanicBoundsB
2084 OpMIPSLoweredPanicBoundsC
2085 OpMIPSLoweredPanicExtendA
2086 OpMIPSLoweredPanicExtendB
2087 OpMIPSLoweredPanicExtendC
2088
2089 OpMIPS64ADDV
2090 OpMIPS64ADDVconst
2091 OpMIPS64SUBV
2092 OpMIPS64SUBVconst
2093 OpMIPS64MULV
2094 OpMIPS64MULVU
2095 OpMIPS64DIVV
2096 OpMIPS64DIVVU
2097 OpMIPS64ADDF
2098 OpMIPS64ADDD
2099 OpMIPS64SUBF
2100 OpMIPS64SUBD
2101 OpMIPS64MULF
2102 OpMIPS64MULD
2103 OpMIPS64DIVF
2104 OpMIPS64DIVD
2105 OpMIPS64AND
2106 OpMIPS64ANDconst
2107 OpMIPS64OR
2108 OpMIPS64ORconst
2109 OpMIPS64XOR
2110 OpMIPS64XORconst
2111 OpMIPS64NOR
2112 OpMIPS64NORconst
2113 OpMIPS64NEGV
2114 OpMIPS64NEGF
2115 OpMIPS64NEGD
2116 OpMIPS64ABSD
2117 OpMIPS64SQRTD
2118 OpMIPS64SQRTF
2119 OpMIPS64SLLV
2120 OpMIPS64SLLVconst
2121 OpMIPS64SRLV
2122 OpMIPS64SRLVconst
2123 OpMIPS64SRAV
2124 OpMIPS64SRAVconst
2125 OpMIPS64SGT
2126 OpMIPS64SGTconst
2127 OpMIPS64SGTU
2128 OpMIPS64SGTUconst
2129 OpMIPS64CMPEQF
2130 OpMIPS64CMPEQD
2131 OpMIPS64CMPGEF
2132 OpMIPS64CMPGED
2133 OpMIPS64CMPGTF
2134 OpMIPS64CMPGTD
2135 OpMIPS64MOVVconst
2136 OpMIPS64MOVFconst
2137 OpMIPS64MOVDconst
2138 OpMIPS64MOVVaddr
2139 OpMIPS64MOVBload
2140 OpMIPS64MOVBUload
2141 OpMIPS64MOVHload
2142 OpMIPS64MOVHUload
2143 OpMIPS64MOVWload
2144 OpMIPS64MOVWUload
2145 OpMIPS64MOVVload
2146 OpMIPS64MOVFload
2147 OpMIPS64MOVDload
2148 OpMIPS64MOVBstore
2149 OpMIPS64MOVHstore
2150 OpMIPS64MOVWstore
2151 OpMIPS64MOVVstore
2152 OpMIPS64MOVFstore
2153 OpMIPS64MOVDstore
2154 OpMIPS64MOVBstorezero
2155 OpMIPS64MOVHstorezero
2156 OpMIPS64MOVWstorezero
2157 OpMIPS64MOVVstorezero
2158 OpMIPS64MOVWfpgp
2159 OpMIPS64MOVWgpfp
2160 OpMIPS64MOVVfpgp
2161 OpMIPS64MOVVgpfp
2162 OpMIPS64MOVBreg
2163 OpMIPS64MOVBUreg
2164 OpMIPS64MOVHreg
2165 OpMIPS64MOVHUreg
2166 OpMIPS64MOVWreg
2167 OpMIPS64MOVWUreg
2168 OpMIPS64MOVVreg
2169 OpMIPS64MOVVnop
2170 OpMIPS64MOVWF
2171 OpMIPS64MOVWD
2172 OpMIPS64MOVVF
2173 OpMIPS64MOVVD
2174 OpMIPS64TRUNCFW
2175 OpMIPS64TRUNCDW
2176 OpMIPS64TRUNCFV
2177 OpMIPS64TRUNCDV
2178 OpMIPS64MOVFD
2179 OpMIPS64MOVDF
2180 OpMIPS64CALLstatic
2181 OpMIPS64CALLtail
2182 OpMIPS64CALLclosure
2183 OpMIPS64CALLinter
2184 OpMIPS64DUFFZERO
2185 OpMIPS64DUFFCOPY
2186 OpMIPS64LoweredZero
2187 OpMIPS64LoweredMove
2188 OpMIPS64LoweredAtomicAnd32
2189 OpMIPS64LoweredAtomicOr32
2190 OpMIPS64LoweredAtomicLoad8
2191 OpMIPS64LoweredAtomicLoad32
2192 OpMIPS64LoweredAtomicLoad64
2193 OpMIPS64LoweredAtomicStore8
2194 OpMIPS64LoweredAtomicStore32
2195 OpMIPS64LoweredAtomicStore64
2196 OpMIPS64LoweredAtomicStorezero32
2197 OpMIPS64LoweredAtomicStorezero64
2198 OpMIPS64LoweredAtomicExchange32
2199 OpMIPS64LoweredAtomicExchange64
2200 OpMIPS64LoweredAtomicAdd32
2201 OpMIPS64LoweredAtomicAdd64
2202 OpMIPS64LoweredAtomicAddconst32
2203 OpMIPS64LoweredAtomicAddconst64
2204 OpMIPS64LoweredAtomicCas32
2205 OpMIPS64LoweredAtomicCas64
2206 OpMIPS64LoweredNilCheck
2207 OpMIPS64FPFlagTrue
2208 OpMIPS64FPFlagFalse
2209 OpMIPS64LoweredGetClosurePtr
2210 OpMIPS64LoweredGetCallerSP
2211 OpMIPS64LoweredGetCallerPC
2212 OpMIPS64LoweredWB
2213 OpMIPS64LoweredPubBarrier
2214 OpMIPS64LoweredPanicBoundsA
2215 OpMIPS64LoweredPanicBoundsB
2216 OpMIPS64LoweredPanicBoundsC
2217
2218 OpPPC64ADD
2219 OpPPC64ADDCC
2220 OpPPC64ADDconst
2221 OpPPC64ADDCCconst
2222 OpPPC64FADD
2223 OpPPC64FADDS
2224 OpPPC64SUB
2225 OpPPC64SUBCC
2226 OpPPC64SUBFCconst
2227 OpPPC64FSUB
2228 OpPPC64FSUBS
2229 OpPPC64XSMINJDP
2230 OpPPC64XSMAXJDP
2231 OpPPC64MULLD
2232 OpPPC64MULLW
2233 OpPPC64MULLDconst
2234 OpPPC64MULLWconst
2235 OpPPC64MADDLD
2236 OpPPC64MULHD
2237 OpPPC64MULHW
2238 OpPPC64MULHDU
2239 OpPPC64MULHDUCC
2240 OpPPC64MULHWU
2241 OpPPC64FMUL
2242 OpPPC64FMULS
2243 OpPPC64FMADD
2244 OpPPC64FMADDS
2245 OpPPC64FMSUB
2246 OpPPC64FMSUBS
2247 OpPPC64SRAD
2248 OpPPC64SRAW
2249 OpPPC64SRD
2250 OpPPC64SRW
2251 OpPPC64SLD
2252 OpPPC64SLW
2253 OpPPC64ROTL
2254 OpPPC64ROTLW
2255 OpPPC64CLRLSLWI
2256 OpPPC64CLRLSLDI
2257 OpPPC64ADDC
2258 OpPPC64SUBC
2259 OpPPC64ADDCconst
2260 OpPPC64SUBCconst
2261 OpPPC64ADDE
2262 OpPPC64ADDZE
2263 OpPPC64SUBE
2264 OpPPC64ADDZEzero
2265 OpPPC64SUBZEzero
2266 OpPPC64SRADconst
2267 OpPPC64SRAWconst
2268 OpPPC64SRDconst
2269 OpPPC64SRWconst
2270 OpPPC64SLDconst
2271 OpPPC64SLWconst
2272 OpPPC64ROTLconst
2273 OpPPC64ROTLWconst
2274 OpPPC64EXTSWSLconst
2275 OpPPC64RLWINM
2276 OpPPC64RLWNM
2277 OpPPC64RLWMI
2278 OpPPC64RLDICL
2279 OpPPC64RLDICLCC
2280 OpPPC64RLDICR
2281 OpPPC64CNTLZD
2282 OpPPC64CNTLZDCC
2283 OpPPC64CNTLZW
2284 OpPPC64CNTTZD
2285 OpPPC64CNTTZW
2286 OpPPC64POPCNTD
2287 OpPPC64POPCNTW
2288 OpPPC64POPCNTB
2289 OpPPC64FDIV
2290 OpPPC64FDIVS
2291 OpPPC64DIVD
2292 OpPPC64DIVW
2293 OpPPC64DIVDU
2294 OpPPC64DIVWU
2295 OpPPC64MODUD
2296 OpPPC64MODSD
2297 OpPPC64MODUW
2298 OpPPC64MODSW
2299 OpPPC64FCTIDZ
2300 OpPPC64FCTIWZ
2301 OpPPC64FCFID
2302 OpPPC64FCFIDS
2303 OpPPC64FRSP
2304 OpPPC64MFVSRD
2305 OpPPC64MTVSRD
2306 OpPPC64AND
2307 OpPPC64ANDN
2308 OpPPC64ANDNCC
2309 OpPPC64ANDCC
2310 OpPPC64OR
2311 OpPPC64ORN
2312 OpPPC64ORCC
2313 OpPPC64NOR
2314 OpPPC64NORCC
2315 OpPPC64XOR
2316 OpPPC64XORCC
2317 OpPPC64EQV
2318 OpPPC64NEG
2319 OpPPC64NEGCC
2320 OpPPC64BRD
2321 OpPPC64BRW
2322 OpPPC64BRH
2323 OpPPC64FNEG
2324 OpPPC64FSQRT
2325 OpPPC64FSQRTS
2326 OpPPC64FFLOOR
2327 OpPPC64FCEIL
2328 OpPPC64FTRUNC
2329 OpPPC64FROUND
2330 OpPPC64FABS
2331 OpPPC64FNABS
2332 OpPPC64FCPSGN
2333 OpPPC64ORconst
2334 OpPPC64XORconst
2335 OpPPC64ANDCCconst
2336 OpPPC64ANDconst
2337 OpPPC64MOVBreg
2338 OpPPC64MOVBZreg
2339 OpPPC64MOVHreg
2340 OpPPC64MOVHZreg
2341 OpPPC64MOVWreg
2342 OpPPC64MOVWZreg
2343 OpPPC64MOVBZload
2344 OpPPC64MOVHload
2345 OpPPC64MOVHZload
2346 OpPPC64MOVWload
2347 OpPPC64MOVWZload
2348 OpPPC64MOVDload
2349 OpPPC64MOVDBRload
2350 OpPPC64MOVWBRload
2351 OpPPC64MOVHBRload
2352 OpPPC64MOVBZloadidx
2353 OpPPC64MOVHloadidx
2354 OpPPC64MOVHZloadidx
2355 OpPPC64MOVWloadidx
2356 OpPPC64MOVWZloadidx
2357 OpPPC64MOVDloadidx
2358 OpPPC64MOVHBRloadidx
2359 OpPPC64MOVWBRloadidx
2360 OpPPC64MOVDBRloadidx
2361 OpPPC64FMOVDloadidx
2362 OpPPC64FMOVSloadidx
2363 OpPPC64DCBT
2364 OpPPC64MOVDBRstore
2365 OpPPC64MOVWBRstore
2366 OpPPC64MOVHBRstore
2367 OpPPC64FMOVDload
2368 OpPPC64FMOVSload
2369 OpPPC64MOVBstore
2370 OpPPC64MOVHstore
2371 OpPPC64MOVWstore
2372 OpPPC64MOVDstore
2373 OpPPC64FMOVDstore
2374 OpPPC64FMOVSstore
2375 OpPPC64MOVBstoreidx
2376 OpPPC64MOVHstoreidx
2377 OpPPC64MOVWstoreidx
2378 OpPPC64MOVDstoreidx
2379 OpPPC64FMOVDstoreidx
2380 OpPPC64FMOVSstoreidx
2381 OpPPC64MOVHBRstoreidx
2382 OpPPC64MOVWBRstoreidx
2383 OpPPC64MOVDBRstoreidx
2384 OpPPC64MOVBstorezero
2385 OpPPC64MOVHstorezero
2386 OpPPC64MOVWstorezero
2387 OpPPC64MOVDstorezero
2388 OpPPC64MOVDaddr
2389 OpPPC64MOVDconst
2390 OpPPC64FMOVDconst
2391 OpPPC64FMOVSconst
2392 OpPPC64FCMPU
2393 OpPPC64CMP
2394 OpPPC64CMPU
2395 OpPPC64CMPW
2396 OpPPC64CMPWU
2397 OpPPC64CMPconst
2398 OpPPC64CMPUconst
2399 OpPPC64CMPWconst
2400 OpPPC64CMPWUconst
2401 OpPPC64ISEL
2402 OpPPC64ISELZ
2403 OpPPC64SETBC
2404 OpPPC64SETBCR
2405 OpPPC64Equal
2406 OpPPC64NotEqual
2407 OpPPC64LessThan
2408 OpPPC64FLessThan
2409 OpPPC64LessEqual
2410 OpPPC64FLessEqual
2411 OpPPC64GreaterThan
2412 OpPPC64FGreaterThan
2413 OpPPC64GreaterEqual
2414 OpPPC64FGreaterEqual
2415 OpPPC64LoweredGetClosurePtr
2416 OpPPC64LoweredGetCallerSP
2417 OpPPC64LoweredGetCallerPC
2418 OpPPC64LoweredNilCheck
2419 OpPPC64LoweredRound32F
2420 OpPPC64LoweredRound64F
2421 OpPPC64CALLstatic
2422 OpPPC64CALLtail
2423 OpPPC64CALLclosure
2424 OpPPC64CALLinter
2425 OpPPC64LoweredZero
2426 OpPPC64LoweredZeroShort
2427 OpPPC64LoweredQuadZeroShort
2428 OpPPC64LoweredQuadZero
2429 OpPPC64LoweredMove
2430 OpPPC64LoweredMoveShort
2431 OpPPC64LoweredQuadMove
2432 OpPPC64LoweredQuadMoveShort
2433 OpPPC64LoweredAtomicStore8
2434 OpPPC64LoweredAtomicStore32
2435 OpPPC64LoweredAtomicStore64
2436 OpPPC64LoweredAtomicLoad8
2437 OpPPC64LoweredAtomicLoad32
2438 OpPPC64LoweredAtomicLoad64
2439 OpPPC64LoweredAtomicLoadPtr
2440 OpPPC64LoweredAtomicAdd32
2441 OpPPC64LoweredAtomicAdd64
2442 OpPPC64LoweredAtomicExchange8
2443 OpPPC64LoweredAtomicExchange32
2444 OpPPC64LoweredAtomicExchange64
2445 OpPPC64LoweredAtomicCas64
2446 OpPPC64LoweredAtomicCas32
2447 OpPPC64LoweredAtomicAnd8
2448 OpPPC64LoweredAtomicAnd32
2449 OpPPC64LoweredAtomicOr8
2450 OpPPC64LoweredAtomicOr32
2451 OpPPC64LoweredWB
2452 OpPPC64LoweredPubBarrier
2453 OpPPC64LoweredPanicBoundsA
2454 OpPPC64LoweredPanicBoundsB
2455 OpPPC64LoweredPanicBoundsC
2456 OpPPC64InvertFlags
2457 OpPPC64FlagEQ
2458 OpPPC64FlagLT
2459 OpPPC64FlagGT
2460
2461 OpRISCV64ADD
2462 OpRISCV64ADDI
2463 OpRISCV64ADDIW
2464 OpRISCV64NEG
2465 OpRISCV64NEGW
2466 OpRISCV64SUB
2467 OpRISCV64SUBW
2468 OpRISCV64MUL
2469 OpRISCV64MULW
2470 OpRISCV64MULH
2471 OpRISCV64MULHU
2472 OpRISCV64LoweredMuluhilo
2473 OpRISCV64LoweredMuluover
2474 OpRISCV64DIV
2475 OpRISCV64DIVU
2476 OpRISCV64DIVW
2477 OpRISCV64DIVUW
2478 OpRISCV64REM
2479 OpRISCV64REMU
2480 OpRISCV64REMW
2481 OpRISCV64REMUW
2482 OpRISCV64MOVaddr
2483 OpRISCV64MOVDconst
2484 OpRISCV64MOVBload
2485 OpRISCV64MOVHload
2486 OpRISCV64MOVWload
2487 OpRISCV64MOVDload
2488 OpRISCV64MOVBUload
2489 OpRISCV64MOVHUload
2490 OpRISCV64MOVWUload
2491 OpRISCV64MOVBstore
2492 OpRISCV64MOVHstore
2493 OpRISCV64MOVWstore
2494 OpRISCV64MOVDstore
2495 OpRISCV64MOVBstorezero
2496 OpRISCV64MOVHstorezero
2497 OpRISCV64MOVWstorezero
2498 OpRISCV64MOVDstorezero
2499 OpRISCV64MOVBreg
2500 OpRISCV64MOVHreg
2501 OpRISCV64MOVWreg
2502 OpRISCV64MOVDreg
2503 OpRISCV64MOVBUreg
2504 OpRISCV64MOVHUreg
2505 OpRISCV64MOVWUreg
2506 OpRISCV64MOVDnop
2507 OpRISCV64SLL
2508 OpRISCV64SLLW
2509 OpRISCV64SRA
2510 OpRISCV64SRAW
2511 OpRISCV64SRL
2512 OpRISCV64SRLW
2513 OpRISCV64SLLI
2514 OpRISCV64SLLIW
2515 OpRISCV64SRAI
2516 OpRISCV64SRAIW
2517 OpRISCV64SRLI
2518 OpRISCV64SRLIW
2519 OpRISCV64SH1ADD
2520 OpRISCV64SH2ADD
2521 OpRISCV64SH3ADD
2522 OpRISCV64AND
2523 OpRISCV64ANDN
2524 OpRISCV64ANDI
2525 OpRISCV64CLZ
2526 OpRISCV64CLZW
2527 OpRISCV64CPOP
2528 OpRISCV64CPOPW
2529 OpRISCV64CTZ
2530 OpRISCV64CTZW
2531 OpRISCV64NOT
2532 OpRISCV64OR
2533 OpRISCV64ORN
2534 OpRISCV64ORI
2535 OpRISCV64REV8
2536 OpRISCV64ROL
2537 OpRISCV64ROLW
2538 OpRISCV64ROR
2539 OpRISCV64RORI
2540 OpRISCV64RORIW
2541 OpRISCV64RORW
2542 OpRISCV64XNOR
2543 OpRISCV64XOR
2544 OpRISCV64XORI
2545 OpRISCV64MIN
2546 OpRISCV64MAX
2547 OpRISCV64MINU
2548 OpRISCV64MAXU
2549 OpRISCV64SEQZ
2550 OpRISCV64SNEZ
2551 OpRISCV64SLT
2552 OpRISCV64SLTI
2553 OpRISCV64SLTU
2554 OpRISCV64SLTIU
2555 OpRISCV64LoweredRound32F
2556 OpRISCV64LoweredRound64F
2557 OpRISCV64CALLstatic
2558 OpRISCV64CALLtail
2559 OpRISCV64CALLclosure
2560 OpRISCV64CALLinter
2561 OpRISCV64DUFFZERO
2562 OpRISCV64DUFFCOPY
2563 OpRISCV64LoweredZero
2564 OpRISCV64LoweredMove
2565 OpRISCV64LoweredAtomicLoad8
2566 OpRISCV64LoweredAtomicLoad32
2567 OpRISCV64LoweredAtomicLoad64
2568 OpRISCV64LoweredAtomicStore8
2569 OpRISCV64LoweredAtomicStore32
2570 OpRISCV64LoweredAtomicStore64
2571 OpRISCV64LoweredAtomicExchange32
2572 OpRISCV64LoweredAtomicExchange64
2573 OpRISCV64LoweredAtomicAdd32
2574 OpRISCV64LoweredAtomicAdd64
2575 OpRISCV64LoweredAtomicCas32
2576 OpRISCV64LoweredAtomicCas64
2577 OpRISCV64LoweredAtomicAnd32
2578 OpRISCV64LoweredAtomicOr32
2579 OpRISCV64LoweredNilCheck
2580 OpRISCV64LoweredGetClosurePtr
2581 OpRISCV64LoweredGetCallerSP
2582 OpRISCV64LoweredGetCallerPC
2583 OpRISCV64LoweredWB
2584 OpRISCV64LoweredPubBarrier
2585 OpRISCV64LoweredPanicBoundsA
2586 OpRISCV64LoweredPanicBoundsB
2587 OpRISCV64LoweredPanicBoundsC
2588 OpRISCV64FADDS
2589 OpRISCV64FSUBS
2590 OpRISCV64FMULS
2591 OpRISCV64FDIVS
2592 OpRISCV64FMADDS
2593 OpRISCV64FMSUBS
2594 OpRISCV64FNMADDS
2595 OpRISCV64FNMSUBS
2596 OpRISCV64FSQRTS
2597 OpRISCV64FNEGS
2598 OpRISCV64FMVSX
2599 OpRISCV64FCVTSW
2600 OpRISCV64FCVTSL
2601 OpRISCV64FCVTWS
2602 OpRISCV64FCVTLS
2603 OpRISCV64FMOVWload
2604 OpRISCV64FMOVWstore
2605 OpRISCV64FEQS
2606 OpRISCV64FNES
2607 OpRISCV64FLTS
2608 OpRISCV64FLES
2609 OpRISCV64LoweredFMAXS
2610 OpRISCV64LoweredFMINS
2611 OpRISCV64FADDD
2612 OpRISCV64FSUBD
2613 OpRISCV64FMULD
2614 OpRISCV64FDIVD
2615 OpRISCV64FMADDD
2616 OpRISCV64FMSUBD
2617 OpRISCV64FNMADDD
2618 OpRISCV64FNMSUBD
2619 OpRISCV64FSQRTD
2620 OpRISCV64FNEGD
2621 OpRISCV64FABSD
2622 OpRISCV64FSGNJD
2623 OpRISCV64FMVDX
2624 OpRISCV64FCVTDW
2625 OpRISCV64FCVTDL
2626 OpRISCV64FCVTWD
2627 OpRISCV64FCVTLD
2628 OpRISCV64FCVTDS
2629 OpRISCV64FCVTSD
2630 OpRISCV64FMOVDload
2631 OpRISCV64FMOVDstore
2632 OpRISCV64FEQD
2633 OpRISCV64FNED
2634 OpRISCV64FLTD
2635 OpRISCV64FLED
2636 OpRISCV64LoweredFMIND
2637 OpRISCV64LoweredFMAXD
2638
2639 OpS390XFADDS
2640 OpS390XFADD
2641 OpS390XFSUBS
2642 OpS390XFSUB
2643 OpS390XFMULS
2644 OpS390XFMUL
2645 OpS390XFDIVS
2646 OpS390XFDIV
2647 OpS390XFNEGS
2648 OpS390XFNEG
2649 OpS390XFMADDS
2650 OpS390XFMADD
2651 OpS390XFMSUBS
2652 OpS390XFMSUB
2653 OpS390XLPDFR
2654 OpS390XLNDFR
2655 OpS390XCPSDR
2656 OpS390XFIDBR
2657 OpS390XFMOVSload
2658 OpS390XFMOVDload
2659 OpS390XFMOVSconst
2660 OpS390XFMOVDconst
2661 OpS390XFMOVSloadidx
2662 OpS390XFMOVDloadidx
2663 OpS390XFMOVSstore
2664 OpS390XFMOVDstore
2665 OpS390XFMOVSstoreidx
2666 OpS390XFMOVDstoreidx
2667 OpS390XADD
2668 OpS390XADDW
2669 OpS390XADDconst
2670 OpS390XADDWconst
2671 OpS390XADDload
2672 OpS390XADDWload
2673 OpS390XSUB
2674 OpS390XSUBW
2675 OpS390XSUBconst
2676 OpS390XSUBWconst
2677 OpS390XSUBload
2678 OpS390XSUBWload
2679 OpS390XMULLD
2680 OpS390XMULLW
2681 OpS390XMULLDconst
2682 OpS390XMULLWconst
2683 OpS390XMULLDload
2684 OpS390XMULLWload
2685 OpS390XMULHD
2686 OpS390XMULHDU
2687 OpS390XDIVD
2688 OpS390XDIVW
2689 OpS390XDIVDU
2690 OpS390XDIVWU
2691 OpS390XMODD
2692 OpS390XMODW
2693 OpS390XMODDU
2694 OpS390XMODWU
2695 OpS390XAND
2696 OpS390XANDW
2697 OpS390XANDconst
2698 OpS390XANDWconst
2699 OpS390XANDload
2700 OpS390XANDWload
2701 OpS390XOR
2702 OpS390XORW
2703 OpS390XORconst
2704 OpS390XORWconst
2705 OpS390XORload
2706 OpS390XORWload
2707 OpS390XXOR
2708 OpS390XXORW
2709 OpS390XXORconst
2710 OpS390XXORWconst
2711 OpS390XXORload
2712 OpS390XXORWload
2713 OpS390XADDC
2714 OpS390XADDCconst
2715 OpS390XADDE
2716 OpS390XSUBC
2717 OpS390XSUBE
2718 OpS390XCMP
2719 OpS390XCMPW
2720 OpS390XCMPU
2721 OpS390XCMPWU
2722 OpS390XCMPconst
2723 OpS390XCMPWconst
2724 OpS390XCMPUconst
2725 OpS390XCMPWUconst
2726 OpS390XFCMPS
2727 OpS390XFCMP
2728 OpS390XLTDBR
2729 OpS390XLTEBR
2730 OpS390XSLD
2731 OpS390XSLW
2732 OpS390XSLDconst
2733 OpS390XSLWconst
2734 OpS390XSRD
2735 OpS390XSRW
2736 OpS390XSRDconst
2737 OpS390XSRWconst
2738 OpS390XSRAD
2739 OpS390XSRAW
2740 OpS390XSRADconst
2741 OpS390XSRAWconst
2742 OpS390XRLLG
2743 OpS390XRLL
2744 OpS390XRLLconst
2745 OpS390XRXSBG
2746 OpS390XRISBGZ
2747 OpS390XNEG
2748 OpS390XNEGW
2749 OpS390XNOT
2750 OpS390XNOTW
2751 OpS390XFSQRT
2752 OpS390XFSQRTS
2753 OpS390XLOCGR
2754 OpS390XMOVBreg
2755 OpS390XMOVBZreg
2756 OpS390XMOVHreg
2757 OpS390XMOVHZreg
2758 OpS390XMOVWreg
2759 OpS390XMOVWZreg
2760 OpS390XMOVDconst
2761 OpS390XLDGR
2762 OpS390XLGDR
2763 OpS390XCFDBRA
2764 OpS390XCGDBRA
2765 OpS390XCFEBRA
2766 OpS390XCGEBRA
2767 OpS390XCEFBRA
2768 OpS390XCDFBRA
2769 OpS390XCEGBRA
2770 OpS390XCDGBRA
2771 OpS390XCLFEBR
2772 OpS390XCLFDBR
2773 OpS390XCLGEBR
2774 OpS390XCLGDBR
2775 OpS390XCELFBR
2776 OpS390XCDLFBR
2777 OpS390XCELGBR
2778 OpS390XCDLGBR
2779 OpS390XLEDBR
2780 OpS390XLDEBR
2781 OpS390XMOVDaddr
2782 OpS390XMOVDaddridx
2783 OpS390XMOVBZload
2784 OpS390XMOVBload
2785 OpS390XMOVHZload
2786 OpS390XMOVHload
2787 OpS390XMOVWZload
2788 OpS390XMOVWload
2789 OpS390XMOVDload
2790 OpS390XMOVWBR
2791 OpS390XMOVDBR
2792 OpS390XMOVHBRload
2793 OpS390XMOVWBRload
2794 OpS390XMOVDBRload
2795 OpS390XMOVBstore
2796 OpS390XMOVHstore
2797 OpS390XMOVWstore
2798 OpS390XMOVDstore
2799 OpS390XMOVHBRstore
2800 OpS390XMOVWBRstore
2801 OpS390XMOVDBRstore
2802 OpS390XMVC
2803 OpS390XMOVBZloadidx
2804 OpS390XMOVBloadidx
2805 OpS390XMOVHZloadidx
2806 OpS390XMOVHloadidx
2807 OpS390XMOVWZloadidx
2808 OpS390XMOVWloadidx
2809 OpS390XMOVDloadidx
2810 OpS390XMOVHBRloadidx
2811 OpS390XMOVWBRloadidx
2812 OpS390XMOVDBRloadidx
2813 OpS390XMOVBstoreidx
2814 OpS390XMOVHstoreidx
2815 OpS390XMOVWstoreidx
2816 OpS390XMOVDstoreidx
2817 OpS390XMOVHBRstoreidx
2818 OpS390XMOVWBRstoreidx
2819 OpS390XMOVDBRstoreidx
2820 OpS390XMOVBstoreconst
2821 OpS390XMOVHstoreconst
2822 OpS390XMOVWstoreconst
2823 OpS390XMOVDstoreconst
2824 OpS390XCLEAR
2825 OpS390XCALLstatic
2826 OpS390XCALLtail
2827 OpS390XCALLclosure
2828 OpS390XCALLinter
2829 OpS390XInvertFlags
2830 OpS390XLoweredGetG
2831 OpS390XLoweredGetClosurePtr
2832 OpS390XLoweredGetCallerSP
2833 OpS390XLoweredGetCallerPC
2834 OpS390XLoweredNilCheck
2835 OpS390XLoweredRound32F
2836 OpS390XLoweredRound64F
2837 OpS390XLoweredWB
2838 OpS390XLoweredPanicBoundsA
2839 OpS390XLoweredPanicBoundsB
2840 OpS390XLoweredPanicBoundsC
2841 OpS390XFlagEQ
2842 OpS390XFlagLT
2843 OpS390XFlagGT
2844 OpS390XFlagOV
2845 OpS390XSYNC
2846 OpS390XMOVBZatomicload
2847 OpS390XMOVWZatomicload
2848 OpS390XMOVDatomicload
2849 OpS390XMOVBatomicstore
2850 OpS390XMOVWatomicstore
2851 OpS390XMOVDatomicstore
2852 OpS390XLAA
2853 OpS390XLAAG
2854 OpS390XAddTupleFirst32
2855 OpS390XAddTupleFirst64
2856 OpS390XLAN
2857 OpS390XLANfloor
2858 OpS390XLAO
2859 OpS390XLAOfloor
2860 OpS390XLoweredAtomicCas32
2861 OpS390XLoweredAtomicCas64
2862 OpS390XLoweredAtomicExchange32
2863 OpS390XLoweredAtomicExchange64
2864 OpS390XFLOGR
2865 OpS390XPOPCNT
2866 OpS390XMLGR
2867 OpS390XSumBytes2
2868 OpS390XSumBytes4
2869 OpS390XSumBytes8
2870 OpS390XSTMG2
2871 OpS390XSTMG3
2872 OpS390XSTMG4
2873 OpS390XSTM2
2874 OpS390XSTM3
2875 OpS390XSTM4
2876 OpS390XLoweredMove
2877 OpS390XLoweredZero
2878
2879 OpWasmLoweredStaticCall
2880 OpWasmLoweredTailCall
2881 OpWasmLoweredClosureCall
2882 OpWasmLoweredInterCall
2883 OpWasmLoweredAddr
2884 OpWasmLoweredMove
2885 OpWasmLoweredZero
2886 OpWasmLoweredGetClosurePtr
2887 OpWasmLoweredGetCallerPC
2888 OpWasmLoweredGetCallerSP
2889 OpWasmLoweredNilCheck
2890 OpWasmLoweredWB
2891 OpWasmLoweredConvert
2892 OpWasmSelect
2893 OpWasmI64Load8U
2894 OpWasmI64Load8S
2895 OpWasmI64Load16U
2896 OpWasmI64Load16S
2897 OpWasmI64Load32U
2898 OpWasmI64Load32S
2899 OpWasmI64Load
2900 OpWasmI64Store8
2901 OpWasmI64Store16
2902 OpWasmI64Store32
2903 OpWasmI64Store
2904 OpWasmF32Load
2905 OpWasmF64Load
2906 OpWasmF32Store
2907 OpWasmF64Store
2908 OpWasmI64Const
2909 OpWasmF32Const
2910 OpWasmF64Const
2911 OpWasmI64Eqz
2912 OpWasmI64Eq
2913 OpWasmI64Ne
2914 OpWasmI64LtS
2915 OpWasmI64LtU
2916 OpWasmI64GtS
2917 OpWasmI64GtU
2918 OpWasmI64LeS
2919 OpWasmI64LeU
2920 OpWasmI64GeS
2921 OpWasmI64GeU
2922 OpWasmF32Eq
2923 OpWasmF32Ne
2924 OpWasmF32Lt
2925 OpWasmF32Gt
2926 OpWasmF32Le
2927 OpWasmF32Ge
2928 OpWasmF64Eq
2929 OpWasmF64Ne
2930 OpWasmF64Lt
2931 OpWasmF64Gt
2932 OpWasmF64Le
2933 OpWasmF64Ge
2934 OpWasmI64Add
2935 OpWasmI64AddConst
2936 OpWasmI64Sub
2937 OpWasmI64Mul
2938 OpWasmI64DivS
2939 OpWasmI64DivU
2940 OpWasmI64RemS
2941 OpWasmI64RemU
2942 OpWasmI64And
2943 OpWasmI64Or
2944 OpWasmI64Xor
2945 OpWasmI64Shl
2946 OpWasmI64ShrS
2947 OpWasmI64ShrU
2948 OpWasmF32Neg
2949 OpWasmF32Add
2950 OpWasmF32Sub
2951 OpWasmF32Mul
2952 OpWasmF32Div
2953 OpWasmF64Neg
2954 OpWasmF64Add
2955 OpWasmF64Sub
2956 OpWasmF64Mul
2957 OpWasmF64Div
2958 OpWasmI64TruncSatF64S
2959 OpWasmI64TruncSatF64U
2960 OpWasmI64TruncSatF32S
2961 OpWasmI64TruncSatF32U
2962 OpWasmF32ConvertI64S
2963 OpWasmF32ConvertI64U
2964 OpWasmF64ConvertI64S
2965 OpWasmF64ConvertI64U
2966 OpWasmF32DemoteF64
2967 OpWasmF64PromoteF32
2968 OpWasmI64Extend8S
2969 OpWasmI64Extend16S
2970 OpWasmI64Extend32S
2971 OpWasmF32Sqrt
2972 OpWasmF32Trunc
2973 OpWasmF32Ceil
2974 OpWasmF32Floor
2975 OpWasmF32Nearest
2976 OpWasmF32Abs
2977 OpWasmF32Copysign
2978 OpWasmF64Sqrt
2979 OpWasmF64Trunc
2980 OpWasmF64Ceil
2981 OpWasmF64Floor
2982 OpWasmF64Nearest
2983 OpWasmF64Abs
2984 OpWasmF64Copysign
2985 OpWasmI64Ctz
2986 OpWasmI64Clz
2987 OpWasmI32Rotl
2988 OpWasmI64Rotl
2989 OpWasmI64Popcnt
2990
2991 OpAdd8
2992 OpAdd16
2993 OpAdd32
2994 OpAdd64
2995 OpAddPtr
2996 OpAdd32F
2997 OpAdd64F
2998 OpSub8
2999 OpSub16
3000 OpSub32
3001 OpSub64
3002 OpSubPtr
3003 OpSub32F
3004 OpSub64F
3005 OpMul8
3006 OpMul16
3007 OpMul32
3008 OpMul64
3009 OpMul32F
3010 OpMul64F
3011 OpDiv32F
3012 OpDiv64F
3013 OpHmul32
3014 OpHmul32u
3015 OpHmul64
3016 OpHmul64u
3017 OpMul32uhilo
3018 OpMul64uhilo
3019 OpMul32uover
3020 OpMul64uover
3021 OpAvg32u
3022 OpAvg64u
3023 OpDiv8
3024 OpDiv8u
3025 OpDiv16
3026 OpDiv16u
3027 OpDiv32
3028 OpDiv32u
3029 OpDiv64
3030 OpDiv64u
3031 OpDiv128u
3032 OpMod8
3033 OpMod8u
3034 OpMod16
3035 OpMod16u
3036 OpMod32
3037 OpMod32u
3038 OpMod64
3039 OpMod64u
3040 OpAnd8
3041 OpAnd16
3042 OpAnd32
3043 OpAnd64
3044 OpOr8
3045 OpOr16
3046 OpOr32
3047 OpOr64
3048 OpXor8
3049 OpXor16
3050 OpXor32
3051 OpXor64
3052 OpLsh8x8
3053 OpLsh8x16
3054 OpLsh8x32
3055 OpLsh8x64
3056 OpLsh16x8
3057 OpLsh16x16
3058 OpLsh16x32
3059 OpLsh16x64
3060 OpLsh32x8
3061 OpLsh32x16
3062 OpLsh32x32
3063 OpLsh32x64
3064 OpLsh64x8
3065 OpLsh64x16
3066 OpLsh64x32
3067 OpLsh64x64
3068 OpRsh8x8
3069 OpRsh8x16
3070 OpRsh8x32
3071 OpRsh8x64
3072 OpRsh16x8
3073 OpRsh16x16
3074 OpRsh16x32
3075 OpRsh16x64
3076 OpRsh32x8
3077 OpRsh32x16
3078 OpRsh32x32
3079 OpRsh32x64
3080 OpRsh64x8
3081 OpRsh64x16
3082 OpRsh64x32
3083 OpRsh64x64
3084 OpRsh8Ux8
3085 OpRsh8Ux16
3086 OpRsh8Ux32
3087 OpRsh8Ux64
3088 OpRsh16Ux8
3089 OpRsh16Ux16
3090 OpRsh16Ux32
3091 OpRsh16Ux64
3092 OpRsh32Ux8
3093 OpRsh32Ux16
3094 OpRsh32Ux32
3095 OpRsh32Ux64
3096 OpRsh64Ux8
3097 OpRsh64Ux16
3098 OpRsh64Ux32
3099 OpRsh64Ux64
3100 OpEq8
3101 OpEq16
3102 OpEq32
3103 OpEq64
3104 OpEqPtr
3105 OpEqInter
3106 OpEqSlice
3107 OpEq32F
3108 OpEq64F
3109 OpNeq8
3110 OpNeq16
3111 OpNeq32
3112 OpNeq64
3113 OpNeqPtr
3114 OpNeqInter
3115 OpNeqSlice
3116 OpNeq32F
3117 OpNeq64F
3118 OpLess8
3119 OpLess8U
3120 OpLess16
3121 OpLess16U
3122 OpLess32
3123 OpLess32U
3124 OpLess64
3125 OpLess64U
3126 OpLess32F
3127 OpLess64F
3128 OpLeq8
3129 OpLeq8U
3130 OpLeq16
3131 OpLeq16U
3132 OpLeq32
3133 OpLeq32U
3134 OpLeq64
3135 OpLeq64U
3136 OpLeq32F
3137 OpLeq64F
3138 OpCondSelect
3139 OpAndB
3140 OpOrB
3141 OpEqB
3142 OpNeqB
3143 OpNot
3144 OpNeg8
3145 OpNeg16
3146 OpNeg32
3147 OpNeg64
3148 OpNeg32F
3149 OpNeg64F
3150 OpCom8
3151 OpCom16
3152 OpCom32
3153 OpCom64
3154 OpCtz8
3155 OpCtz16
3156 OpCtz32
3157 OpCtz64
3158 OpCtz64On32
3159 OpCtz8NonZero
3160 OpCtz16NonZero
3161 OpCtz32NonZero
3162 OpCtz64NonZero
3163 OpBitLen8
3164 OpBitLen16
3165 OpBitLen32
3166 OpBitLen64
3167 OpBswap16
3168 OpBswap32
3169 OpBswap64
3170 OpBitRev8
3171 OpBitRev16
3172 OpBitRev32
3173 OpBitRev64
3174 OpPopCount8
3175 OpPopCount16
3176 OpPopCount32
3177 OpPopCount64
3178 OpRotateLeft64
3179 OpRotateLeft32
3180 OpRotateLeft16
3181 OpRotateLeft8
3182 OpSqrt
3183 OpSqrt32
3184 OpFloor
3185 OpCeil
3186 OpTrunc
3187 OpRound
3188 OpRoundToEven
3189 OpAbs
3190 OpCopysign
3191 OpMin64
3192 OpMax64
3193 OpMin64u
3194 OpMax64u
3195 OpMin64F
3196 OpMin32F
3197 OpMax64F
3198 OpMax32F
3199 OpFMA
3200 OpPhi
3201 OpCopy
3202 OpConvert
3203 OpConstBool
3204 OpConstString
3205 OpConstNil
3206 OpConst8
3207 OpConst16
3208 OpConst32
3209 OpConst64
3210 OpConst32F
3211 OpConst64F
3212 OpConstInterface
3213 OpConstSlice
3214 OpInitMem
3215 OpArg
3216 OpArgIntReg
3217 OpArgFloatReg
3218 OpAddr
3219 OpLocalAddr
3220 OpSP
3221 OpSB
3222 OpSPanchored
3223 OpLoad
3224 OpDereference
3225 OpStore
3226 OpMove
3227 OpZero
3228 OpStoreWB
3229 OpMoveWB
3230 OpZeroWB
3231 OpWBend
3232 OpWB
3233 OpHasCPUFeature
3234 OpPanicBounds
3235 OpPanicExtend
3236 OpClosureCall
3237 OpStaticCall
3238 OpInterCall
3239 OpTailCall
3240 OpClosureLECall
3241 OpStaticLECall
3242 OpInterLECall
3243 OpTailLECall
3244 OpSignExt8to16
3245 OpSignExt8to32
3246 OpSignExt8to64
3247 OpSignExt16to32
3248 OpSignExt16to64
3249 OpSignExt32to64
3250 OpZeroExt8to16
3251 OpZeroExt8to32
3252 OpZeroExt8to64
3253 OpZeroExt16to32
3254 OpZeroExt16to64
3255 OpZeroExt32to64
3256 OpTrunc16to8
3257 OpTrunc32to8
3258 OpTrunc32to16
3259 OpTrunc64to8
3260 OpTrunc64to16
3261 OpTrunc64to32
3262 OpCvt32to32F
3263 OpCvt32to64F
3264 OpCvt64to32F
3265 OpCvt64to64F
3266 OpCvt32Fto32
3267 OpCvt32Fto64
3268 OpCvt64Fto32
3269 OpCvt64Fto64
3270 OpCvt32Fto64F
3271 OpCvt64Fto32F
3272 OpCvtBoolToUint8
3273 OpRound32F
3274 OpRound64F
3275 OpIsNonNil
3276 OpIsInBounds
3277 OpIsSliceInBounds
3278 OpNilCheck
3279 OpGetG
3280 OpGetClosurePtr
3281 OpGetCallerPC
3282 OpGetCallerSP
3283 OpPtrIndex
3284 OpOffPtr
3285 OpSliceMake
3286 OpSlicePtr
3287 OpSliceLen
3288 OpSliceCap
3289 OpSlicePtrUnchecked
3290 OpComplexMake
3291 OpComplexReal
3292 OpComplexImag
3293 OpStringMake
3294 OpStringPtr
3295 OpStringLen
3296 OpIMake
3297 OpITab
3298 OpIData
3299 OpStructMake
3300 OpStructSelect
3301 OpArrayMake0
3302 OpArrayMake1
3303 OpArraySelect
3304 OpStoreReg
3305 OpLoadReg
3306 OpFwdRef
3307 OpUnknown
3308 OpVarDef
3309 OpVarLive
3310 OpKeepAlive
3311 OpInlMark
3312 OpInt64Make
3313 OpInt64Hi
3314 OpInt64Lo
3315 OpAdd32carry
3316 OpAdd32withcarry
3317 OpSub32carry
3318 OpSub32withcarry
3319 OpAdd64carry
3320 OpSub64borrow
3321 OpSignmask
3322 OpZeromask
3323 OpSlicemask
3324 OpSpectreIndex
3325 OpSpectreSliceIndex
3326 OpCvt32Uto32F
3327 OpCvt32Uto64F
3328 OpCvt32Fto32U
3329 OpCvt64Fto32U
3330 OpCvt64Uto32F
3331 OpCvt64Uto64F
3332 OpCvt32Fto64U
3333 OpCvt64Fto64U
3334 OpSelect0
3335 OpSelect1
3336 OpMakeTuple
3337 OpSelectN
3338 OpSelectNAddr
3339 OpMakeResult
3340 OpAtomicLoad8
3341 OpAtomicLoad32
3342 OpAtomicLoad64
3343 OpAtomicLoadPtr
3344 OpAtomicLoadAcq32
3345 OpAtomicLoadAcq64
3346 OpAtomicStore8
3347 OpAtomicStore32
3348 OpAtomicStore64
3349 OpAtomicStorePtrNoWB
3350 OpAtomicStoreRel32
3351 OpAtomicStoreRel64
3352 OpAtomicExchange8
3353 OpAtomicExchange32
3354 OpAtomicExchange64
3355 OpAtomicAdd32
3356 OpAtomicAdd64
3357 OpAtomicCompareAndSwap32
3358 OpAtomicCompareAndSwap64
3359 OpAtomicCompareAndSwapRel32
3360 OpAtomicAnd8
3361 OpAtomicOr8
3362 OpAtomicAnd32
3363 OpAtomicOr32
3364 OpAtomicAnd64value
3365 OpAtomicAnd32value
3366 OpAtomicAnd8value
3367 OpAtomicOr64value
3368 OpAtomicOr32value
3369 OpAtomicOr8value
3370 OpAtomicStore8Variant
3371 OpAtomicStore32Variant
3372 OpAtomicStore64Variant
3373 OpAtomicAdd32Variant
3374 OpAtomicAdd64Variant
3375 OpAtomicExchange8Variant
3376 OpAtomicExchange32Variant
3377 OpAtomicExchange64Variant
3378 OpAtomicCompareAndSwap32Variant
3379 OpAtomicCompareAndSwap64Variant
3380 OpAtomicAnd64valueVariant
3381 OpAtomicOr64valueVariant
3382 OpAtomicAnd32valueVariant
3383 OpAtomicOr32valueVariant
3384 OpAtomicAnd8valueVariant
3385 OpAtomicOr8valueVariant
3386 OpPubBarrier
3387 OpClobber
3388 OpClobberReg
3389 OpPrefetchCache
3390 OpPrefetchCacheStreamed
3391 )
3392
3393 var opcodeTable = [...]opInfo{
3394 {name: "OpInvalid"},
3395
3396 {
3397 name: "ADDSS",
3398 argLen: 2,
3399 commutative: true,
3400 resultInArg0: true,
3401 asm: x86.AADDSS,
3402 reg: regInfo{
3403 inputs: []inputInfo{
3404 {0, 65280},
3405 {1, 65280},
3406 },
3407 outputs: []outputInfo{
3408 {0, 65280},
3409 },
3410 },
3411 },
3412 {
3413 name: "ADDSD",
3414 argLen: 2,
3415 commutative: true,
3416 resultInArg0: true,
3417 asm: x86.AADDSD,
3418 reg: regInfo{
3419 inputs: []inputInfo{
3420 {0, 65280},
3421 {1, 65280},
3422 },
3423 outputs: []outputInfo{
3424 {0, 65280},
3425 },
3426 },
3427 },
3428 {
3429 name: "SUBSS",
3430 argLen: 2,
3431 resultInArg0: true,
3432 asm: x86.ASUBSS,
3433 reg: regInfo{
3434 inputs: []inputInfo{
3435 {0, 65280},
3436 {1, 65280},
3437 },
3438 outputs: []outputInfo{
3439 {0, 65280},
3440 },
3441 },
3442 },
3443 {
3444 name: "SUBSD",
3445 argLen: 2,
3446 resultInArg0: true,
3447 asm: x86.ASUBSD,
3448 reg: regInfo{
3449 inputs: []inputInfo{
3450 {0, 65280},
3451 {1, 65280},
3452 },
3453 outputs: []outputInfo{
3454 {0, 65280},
3455 },
3456 },
3457 },
3458 {
3459 name: "MULSS",
3460 argLen: 2,
3461 commutative: true,
3462 resultInArg0: true,
3463 asm: x86.AMULSS,
3464 reg: regInfo{
3465 inputs: []inputInfo{
3466 {0, 65280},
3467 {1, 65280},
3468 },
3469 outputs: []outputInfo{
3470 {0, 65280},
3471 },
3472 },
3473 },
3474 {
3475 name: "MULSD",
3476 argLen: 2,
3477 commutative: true,
3478 resultInArg0: true,
3479 asm: x86.AMULSD,
3480 reg: regInfo{
3481 inputs: []inputInfo{
3482 {0, 65280},
3483 {1, 65280},
3484 },
3485 outputs: []outputInfo{
3486 {0, 65280},
3487 },
3488 },
3489 },
3490 {
3491 name: "DIVSS",
3492 argLen: 2,
3493 resultInArg0: true,
3494 asm: x86.ADIVSS,
3495 reg: regInfo{
3496 inputs: []inputInfo{
3497 {0, 65280},
3498 {1, 65280},
3499 },
3500 outputs: []outputInfo{
3501 {0, 65280},
3502 },
3503 },
3504 },
3505 {
3506 name: "DIVSD",
3507 argLen: 2,
3508 resultInArg0: true,
3509 asm: x86.ADIVSD,
3510 reg: regInfo{
3511 inputs: []inputInfo{
3512 {0, 65280},
3513 {1, 65280},
3514 },
3515 outputs: []outputInfo{
3516 {0, 65280},
3517 },
3518 },
3519 },
3520 {
3521 name: "MOVSSload",
3522 auxType: auxSymOff,
3523 argLen: 2,
3524 faultOnNilArg0: true,
3525 symEffect: SymRead,
3526 asm: x86.AMOVSS,
3527 reg: regInfo{
3528 inputs: []inputInfo{
3529 {0, 65791},
3530 },
3531 outputs: []outputInfo{
3532 {0, 65280},
3533 },
3534 },
3535 },
3536 {
3537 name: "MOVSDload",
3538 auxType: auxSymOff,
3539 argLen: 2,
3540 faultOnNilArg0: true,
3541 symEffect: SymRead,
3542 asm: x86.AMOVSD,
3543 reg: regInfo{
3544 inputs: []inputInfo{
3545 {0, 65791},
3546 },
3547 outputs: []outputInfo{
3548 {0, 65280},
3549 },
3550 },
3551 },
3552 {
3553 name: "MOVSSconst",
3554 auxType: auxFloat32,
3555 argLen: 0,
3556 rematerializeable: true,
3557 asm: x86.AMOVSS,
3558 reg: regInfo{
3559 outputs: []outputInfo{
3560 {0, 65280},
3561 },
3562 },
3563 },
3564 {
3565 name: "MOVSDconst",
3566 auxType: auxFloat64,
3567 argLen: 0,
3568 rematerializeable: true,
3569 asm: x86.AMOVSD,
3570 reg: regInfo{
3571 outputs: []outputInfo{
3572 {0, 65280},
3573 },
3574 },
3575 },
3576 {
3577 name: "MOVSSloadidx1",
3578 auxType: auxSymOff,
3579 argLen: 3,
3580 symEffect: SymRead,
3581 asm: x86.AMOVSS,
3582 reg: regInfo{
3583 inputs: []inputInfo{
3584 {1, 255},
3585 {0, 65791},
3586 },
3587 outputs: []outputInfo{
3588 {0, 65280},
3589 },
3590 },
3591 },
3592 {
3593 name: "MOVSSloadidx4",
3594 auxType: auxSymOff,
3595 argLen: 3,
3596 symEffect: SymRead,
3597 asm: x86.AMOVSS,
3598 reg: regInfo{
3599 inputs: []inputInfo{
3600 {1, 255},
3601 {0, 65791},
3602 },
3603 outputs: []outputInfo{
3604 {0, 65280},
3605 },
3606 },
3607 },
3608 {
3609 name: "MOVSDloadidx1",
3610 auxType: auxSymOff,
3611 argLen: 3,
3612 symEffect: SymRead,
3613 asm: x86.AMOVSD,
3614 reg: regInfo{
3615 inputs: []inputInfo{
3616 {1, 255},
3617 {0, 65791},
3618 },
3619 outputs: []outputInfo{
3620 {0, 65280},
3621 },
3622 },
3623 },
3624 {
3625 name: "MOVSDloadidx8",
3626 auxType: auxSymOff,
3627 argLen: 3,
3628 symEffect: SymRead,
3629 asm: x86.AMOVSD,
3630 reg: regInfo{
3631 inputs: []inputInfo{
3632 {1, 255},
3633 {0, 65791},
3634 },
3635 outputs: []outputInfo{
3636 {0, 65280},
3637 },
3638 },
3639 },
3640 {
3641 name: "MOVSSstore",
3642 auxType: auxSymOff,
3643 argLen: 3,
3644 faultOnNilArg0: true,
3645 symEffect: SymWrite,
3646 asm: x86.AMOVSS,
3647 reg: regInfo{
3648 inputs: []inputInfo{
3649 {1, 65280},
3650 {0, 65791},
3651 },
3652 },
3653 },
3654 {
3655 name: "MOVSDstore",
3656 auxType: auxSymOff,
3657 argLen: 3,
3658 faultOnNilArg0: true,
3659 symEffect: SymWrite,
3660 asm: x86.AMOVSD,
3661 reg: regInfo{
3662 inputs: []inputInfo{
3663 {1, 65280},
3664 {0, 65791},
3665 },
3666 },
3667 },
3668 {
3669 name: "MOVSSstoreidx1",
3670 auxType: auxSymOff,
3671 argLen: 4,
3672 symEffect: SymWrite,
3673 asm: x86.AMOVSS,
3674 reg: regInfo{
3675 inputs: []inputInfo{
3676 {1, 255},
3677 {2, 65280},
3678 {0, 65791},
3679 },
3680 },
3681 },
3682 {
3683 name: "MOVSSstoreidx4",
3684 auxType: auxSymOff,
3685 argLen: 4,
3686 symEffect: SymWrite,
3687 asm: x86.AMOVSS,
3688 reg: regInfo{
3689 inputs: []inputInfo{
3690 {1, 255},
3691 {2, 65280},
3692 {0, 65791},
3693 },
3694 },
3695 },
3696 {
3697 name: "MOVSDstoreidx1",
3698 auxType: auxSymOff,
3699 argLen: 4,
3700 symEffect: SymWrite,
3701 asm: x86.AMOVSD,
3702 reg: regInfo{
3703 inputs: []inputInfo{
3704 {1, 255},
3705 {2, 65280},
3706 {0, 65791},
3707 },
3708 },
3709 },
3710 {
3711 name: "MOVSDstoreidx8",
3712 auxType: auxSymOff,
3713 argLen: 4,
3714 symEffect: SymWrite,
3715 asm: x86.AMOVSD,
3716 reg: regInfo{
3717 inputs: []inputInfo{
3718 {1, 255},
3719 {2, 65280},
3720 {0, 65791},
3721 },
3722 },
3723 },
3724 {
3725 name: "ADDSSload",
3726 auxType: auxSymOff,
3727 argLen: 3,
3728 resultInArg0: true,
3729 faultOnNilArg1: true,
3730 symEffect: SymRead,
3731 asm: x86.AADDSS,
3732 reg: regInfo{
3733 inputs: []inputInfo{
3734 {0, 65280},
3735 {1, 65791},
3736 },
3737 outputs: []outputInfo{
3738 {0, 65280},
3739 },
3740 },
3741 },
3742 {
3743 name: "ADDSDload",
3744 auxType: auxSymOff,
3745 argLen: 3,
3746 resultInArg0: true,
3747 faultOnNilArg1: true,
3748 symEffect: SymRead,
3749 asm: x86.AADDSD,
3750 reg: regInfo{
3751 inputs: []inputInfo{
3752 {0, 65280},
3753 {1, 65791},
3754 },
3755 outputs: []outputInfo{
3756 {0, 65280},
3757 },
3758 },
3759 },
3760 {
3761 name: "SUBSSload",
3762 auxType: auxSymOff,
3763 argLen: 3,
3764 resultInArg0: true,
3765 faultOnNilArg1: true,
3766 symEffect: SymRead,
3767 asm: x86.ASUBSS,
3768 reg: regInfo{
3769 inputs: []inputInfo{
3770 {0, 65280},
3771 {1, 65791},
3772 },
3773 outputs: []outputInfo{
3774 {0, 65280},
3775 },
3776 },
3777 },
3778 {
3779 name: "SUBSDload",
3780 auxType: auxSymOff,
3781 argLen: 3,
3782 resultInArg0: true,
3783 faultOnNilArg1: true,
3784 symEffect: SymRead,
3785 asm: x86.ASUBSD,
3786 reg: regInfo{
3787 inputs: []inputInfo{
3788 {0, 65280},
3789 {1, 65791},
3790 },
3791 outputs: []outputInfo{
3792 {0, 65280},
3793 },
3794 },
3795 },
3796 {
3797 name: "MULSSload",
3798 auxType: auxSymOff,
3799 argLen: 3,
3800 resultInArg0: true,
3801 faultOnNilArg1: true,
3802 symEffect: SymRead,
3803 asm: x86.AMULSS,
3804 reg: regInfo{
3805 inputs: []inputInfo{
3806 {0, 65280},
3807 {1, 65791},
3808 },
3809 outputs: []outputInfo{
3810 {0, 65280},
3811 },
3812 },
3813 },
3814 {
3815 name: "MULSDload",
3816 auxType: auxSymOff,
3817 argLen: 3,
3818 resultInArg0: true,
3819 faultOnNilArg1: true,
3820 symEffect: SymRead,
3821 asm: x86.AMULSD,
3822 reg: regInfo{
3823 inputs: []inputInfo{
3824 {0, 65280},
3825 {1, 65791},
3826 },
3827 outputs: []outputInfo{
3828 {0, 65280},
3829 },
3830 },
3831 },
3832 {
3833 name: "DIVSSload",
3834 auxType: auxSymOff,
3835 argLen: 3,
3836 resultInArg0: true,
3837 faultOnNilArg1: true,
3838 symEffect: SymRead,
3839 asm: x86.ADIVSS,
3840 reg: regInfo{
3841 inputs: []inputInfo{
3842 {0, 65280},
3843 {1, 65791},
3844 },
3845 outputs: []outputInfo{
3846 {0, 65280},
3847 },
3848 },
3849 },
3850 {
3851 name: "DIVSDload",
3852 auxType: auxSymOff,
3853 argLen: 3,
3854 resultInArg0: true,
3855 faultOnNilArg1: true,
3856 symEffect: SymRead,
3857 asm: x86.ADIVSD,
3858 reg: regInfo{
3859 inputs: []inputInfo{
3860 {0, 65280},
3861 {1, 65791},
3862 },
3863 outputs: []outputInfo{
3864 {0, 65280},
3865 },
3866 },
3867 },
3868 {
3869 name: "ADDL",
3870 argLen: 2,
3871 commutative: true,
3872 clobberFlags: true,
3873 asm: x86.AADDL,
3874 reg: regInfo{
3875 inputs: []inputInfo{
3876 {1, 239},
3877 {0, 255},
3878 },
3879 outputs: []outputInfo{
3880 {0, 239},
3881 },
3882 },
3883 },
3884 {
3885 name: "ADDLconst",
3886 auxType: auxInt32,
3887 argLen: 1,
3888 clobberFlags: true,
3889 asm: x86.AADDL,
3890 reg: regInfo{
3891 inputs: []inputInfo{
3892 {0, 255},
3893 },
3894 outputs: []outputInfo{
3895 {0, 239},
3896 },
3897 },
3898 },
3899 {
3900 name: "ADDLcarry",
3901 argLen: 2,
3902 commutative: true,
3903 resultInArg0: true,
3904 asm: x86.AADDL,
3905 reg: regInfo{
3906 inputs: []inputInfo{
3907 {0, 239},
3908 {1, 239},
3909 },
3910 outputs: []outputInfo{
3911 {1, 0},
3912 {0, 239},
3913 },
3914 },
3915 },
3916 {
3917 name: "ADDLconstcarry",
3918 auxType: auxInt32,
3919 argLen: 1,
3920 resultInArg0: true,
3921 asm: x86.AADDL,
3922 reg: regInfo{
3923 inputs: []inputInfo{
3924 {0, 239},
3925 },
3926 outputs: []outputInfo{
3927 {1, 0},
3928 {0, 239},
3929 },
3930 },
3931 },
3932 {
3933 name: "ADCL",
3934 argLen: 3,
3935 commutative: true,
3936 resultInArg0: true,
3937 clobberFlags: true,
3938 asm: x86.AADCL,
3939 reg: regInfo{
3940 inputs: []inputInfo{
3941 {0, 239},
3942 {1, 239},
3943 },
3944 outputs: []outputInfo{
3945 {0, 239},
3946 },
3947 },
3948 },
3949 {
3950 name: "ADCLconst",
3951 auxType: auxInt32,
3952 argLen: 2,
3953 resultInArg0: true,
3954 clobberFlags: true,
3955 asm: x86.AADCL,
3956 reg: regInfo{
3957 inputs: []inputInfo{
3958 {0, 239},
3959 },
3960 outputs: []outputInfo{
3961 {0, 239},
3962 },
3963 },
3964 },
3965 {
3966 name: "SUBL",
3967 argLen: 2,
3968 resultInArg0: true,
3969 clobberFlags: true,
3970 asm: x86.ASUBL,
3971 reg: regInfo{
3972 inputs: []inputInfo{
3973 {0, 239},
3974 {1, 239},
3975 },
3976 outputs: []outputInfo{
3977 {0, 239},
3978 },
3979 },
3980 },
3981 {
3982 name: "SUBLconst",
3983 auxType: auxInt32,
3984 argLen: 1,
3985 resultInArg0: true,
3986 clobberFlags: true,
3987 asm: x86.ASUBL,
3988 reg: regInfo{
3989 inputs: []inputInfo{
3990 {0, 239},
3991 },
3992 outputs: []outputInfo{
3993 {0, 239},
3994 },
3995 },
3996 },
3997 {
3998 name: "SUBLcarry",
3999 argLen: 2,
4000 resultInArg0: true,
4001 asm: x86.ASUBL,
4002 reg: regInfo{
4003 inputs: []inputInfo{
4004 {0, 239},
4005 {1, 239},
4006 },
4007 outputs: []outputInfo{
4008 {1, 0},
4009 {0, 239},
4010 },
4011 },
4012 },
4013 {
4014 name: "SUBLconstcarry",
4015 auxType: auxInt32,
4016 argLen: 1,
4017 resultInArg0: true,
4018 asm: x86.ASUBL,
4019 reg: regInfo{
4020 inputs: []inputInfo{
4021 {0, 239},
4022 },
4023 outputs: []outputInfo{
4024 {1, 0},
4025 {0, 239},
4026 },
4027 },
4028 },
4029 {
4030 name: "SBBL",
4031 argLen: 3,
4032 resultInArg0: true,
4033 clobberFlags: true,
4034 asm: x86.ASBBL,
4035 reg: regInfo{
4036 inputs: []inputInfo{
4037 {0, 239},
4038 {1, 239},
4039 },
4040 outputs: []outputInfo{
4041 {0, 239},
4042 },
4043 },
4044 },
4045 {
4046 name: "SBBLconst",
4047 auxType: auxInt32,
4048 argLen: 2,
4049 resultInArg0: true,
4050 clobberFlags: true,
4051 asm: x86.ASBBL,
4052 reg: regInfo{
4053 inputs: []inputInfo{
4054 {0, 239},
4055 },
4056 outputs: []outputInfo{
4057 {0, 239},
4058 },
4059 },
4060 },
4061 {
4062 name: "MULL",
4063 argLen: 2,
4064 commutative: true,
4065 resultInArg0: true,
4066 clobberFlags: true,
4067 asm: x86.AIMULL,
4068 reg: regInfo{
4069 inputs: []inputInfo{
4070 {0, 239},
4071 {1, 239},
4072 },
4073 outputs: []outputInfo{
4074 {0, 239},
4075 },
4076 },
4077 },
4078 {
4079 name: "MULLconst",
4080 auxType: auxInt32,
4081 argLen: 1,
4082 clobberFlags: true,
4083 asm: x86.AIMUL3L,
4084 reg: regInfo{
4085 inputs: []inputInfo{
4086 {0, 239},
4087 },
4088 outputs: []outputInfo{
4089 {0, 239},
4090 },
4091 },
4092 },
4093 {
4094 name: "MULLU",
4095 argLen: 2,
4096 commutative: true,
4097 clobberFlags: true,
4098 asm: x86.AMULL,
4099 reg: regInfo{
4100 inputs: []inputInfo{
4101 {0, 1},
4102 {1, 255},
4103 },
4104 clobbers: 4,
4105 outputs: []outputInfo{
4106 {1, 0},
4107 {0, 1},
4108 },
4109 },
4110 },
4111 {
4112 name: "HMULL",
4113 argLen: 2,
4114 commutative: true,
4115 clobberFlags: true,
4116 asm: x86.AIMULL,
4117 reg: regInfo{
4118 inputs: []inputInfo{
4119 {0, 1},
4120 {1, 255},
4121 },
4122 clobbers: 1,
4123 outputs: []outputInfo{
4124 {0, 4},
4125 },
4126 },
4127 },
4128 {
4129 name: "HMULLU",
4130 argLen: 2,
4131 commutative: true,
4132 clobberFlags: true,
4133 asm: x86.AMULL,
4134 reg: regInfo{
4135 inputs: []inputInfo{
4136 {0, 1},
4137 {1, 255},
4138 },
4139 clobbers: 1,
4140 outputs: []outputInfo{
4141 {0, 4},
4142 },
4143 },
4144 },
4145 {
4146 name: "MULLQU",
4147 argLen: 2,
4148 commutative: true,
4149 clobberFlags: true,
4150 asm: x86.AMULL,
4151 reg: regInfo{
4152 inputs: []inputInfo{
4153 {0, 1},
4154 {1, 255},
4155 },
4156 outputs: []outputInfo{
4157 {0, 4},
4158 {1, 1},
4159 },
4160 },
4161 },
4162 {
4163 name: "AVGLU",
4164 argLen: 2,
4165 commutative: true,
4166 resultInArg0: true,
4167 clobberFlags: true,
4168 reg: regInfo{
4169 inputs: []inputInfo{
4170 {0, 239},
4171 {1, 239},
4172 },
4173 outputs: []outputInfo{
4174 {0, 239},
4175 },
4176 },
4177 },
4178 {
4179 name: "DIVL",
4180 auxType: auxBool,
4181 argLen: 2,
4182 clobberFlags: true,
4183 asm: x86.AIDIVL,
4184 reg: regInfo{
4185 inputs: []inputInfo{
4186 {0, 1},
4187 {1, 251},
4188 },
4189 clobbers: 4,
4190 outputs: []outputInfo{
4191 {0, 1},
4192 },
4193 },
4194 },
4195 {
4196 name: "DIVW",
4197 auxType: auxBool,
4198 argLen: 2,
4199 clobberFlags: true,
4200 asm: x86.AIDIVW,
4201 reg: regInfo{
4202 inputs: []inputInfo{
4203 {0, 1},
4204 {1, 251},
4205 },
4206 clobbers: 4,
4207 outputs: []outputInfo{
4208 {0, 1},
4209 },
4210 },
4211 },
4212 {
4213 name: "DIVLU",
4214 argLen: 2,
4215 clobberFlags: true,
4216 asm: x86.ADIVL,
4217 reg: regInfo{
4218 inputs: []inputInfo{
4219 {0, 1},
4220 {1, 251},
4221 },
4222 clobbers: 4,
4223 outputs: []outputInfo{
4224 {0, 1},
4225 },
4226 },
4227 },
4228 {
4229 name: "DIVWU",
4230 argLen: 2,
4231 clobberFlags: true,
4232 asm: x86.ADIVW,
4233 reg: regInfo{
4234 inputs: []inputInfo{
4235 {0, 1},
4236 {1, 251},
4237 },
4238 clobbers: 4,
4239 outputs: []outputInfo{
4240 {0, 1},
4241 },
4242 },
4243 },
4244 {
4245 name: "MODL",
4246 auxType: auxBool,
4247 argLen: 2,
4248 clobberFlags: true,
4249 asm: x86.AIDIVL,
4250 reg: regInfo{
4251 inputs: []inputInfo{
4252 {0, 1},
4253 {1, 251},
4254 },
4255 clobbers: 1,
4256 outputs: []outputInfo{
4257 {0, 4},
4258 },
4259 },
4260 },
4261 {
4262 name: "MODW",
4263 auxType: auxBool,
4264 argLen: 2,
4265 clobberFlags: true,
4266 asm: x86.AIDIVW,
4267 reg: regInfo{
4268 inputs: []inputInfo{
4269 {0, 1},
4270 {1, 251},
4271 },
4272 clobbers: 1,
4273 outputs: []outputInfo{
4274 {0, 4},
4275 },
4276 },
4277 },
4278 {
4279 name: "MODLU",
4280 argLen: 2,
4281 clobberFlags: true,
4282 asm: x86.ADIVL,
4283 reg: regInfo{
4284 inputs: []inputInfo{
4285 {0, 1},
4286 {1, 251},
4287 },
4288 clobbers: 1,
4289 outputs: []outputInfo{
4290 {0, 4},
4291 },
4292 },
4293 },
4294 {
4295 name: "MODWU",
4296 argLen: 2,
4297 clobberFlags: true,
4298 asm: x86.ADIVW,
4299 reg: regInfo{
4300 inputs: []inputInfo{
4301 {0, 1},
4302 {1, 251},
4303 },
4304 clobbers: 1,
4305 outputs: []outputInfo{
4306 {0, 4},
4307 },
4308 },
4309 },
4310 {
4311 name: "ANDL",
4312 argLen: 2,
4313 commutative: true,
4314 resultInArg0: true,
4315 clobberFlags: true,
4316 asm: x86.AANDL,
4317 reg: regInfo{
4318 inputs: []inputInfo{
4319 {0, 239},
4320 {1, 239},
4321 },
4322 outputs: []outputInfo{
4323 {0, 239},
4324 },
4325 },
4326 },
4327 {
4328 name: "ANDLconst",
4329 auxType: auxInt32,
4330 argLen: 1,
4331 resultInArg0: true,
4332 clobberFlags: true,
4333 asm: x86.AANDL,
4334 reg: regInfo{
4335 inputs: []inputInfo{
4336 {0, 239},
4337 },
4338 outputs: []outputInfo{
4339 {0, 239},
4340 },
4341 },
4342 },
4343 {
4344 name: "ORL",
4345 argLen: 2,
4346 commutative: true,
4347 resultInArg0: true,
4348 clobberFlags: true,
4349 asm: x86.AORL,
4350 reg: regInfo{
4351 inputs: []inputInfo{
4352 {0, 239},
4353 {1, 239},
4354 },
4355 outputs: []outputInfo{
4356 {0, 239},
4357 },
4358 },
4359 },
4360 {
4361 name: "ORLconst",
4362 auxType: auxInt32,
4363 argLen: 1,
4364 resultInArg0: true,
4365 clobberFlags: true,
4366 asm: x86.AORL,
4367 reg: regInfo{
4368 inputs: []inputInfo{
4369 {0, 239},
4370 },
4371 outputs: []outputInfo{
4372 {0, 239},
4373 },
4374 },
4375 },
4376 {
4377 name: "XORL",
4378 argLen: 2,
4379 commutative: true,
4380 resultInArg0: true,
4381 clobberFlags: true,
4382 asm: x86.AXORL,
4383 reg: regInfo{
4384 inputs: []inputInfo{
4385 {0, 239},
4386 {1, 239},
4387 },
4388 outputs: []outputInfo{
4389 {0, 239},
4390 },
4391 },
4392 },
4393 {
4394 name: "XORLconst",
4395 auxType: auxInt32,
4396 argLen: 1,
4397 resultInArg0: true,
4398 clobberFlags: true,
4399 asm: x86.AXORL,
4400 reg: regInfo{
4401 inputs: []inputInfo{
4402 {0, 239},
4403 },
4404 outputs: []outputInfo{
4405 {0, 239},
4406 },
4407 },
4408 },
4409 {
4410 name: "CMPL",
4411 argLen: 2,
4412 asm: x86.ACMPL,
4413 reg: regInfo{
4414 inputs: []inputInfo{
4415 {0, 255},
4416 {1, 255},
4417 },
4418 },
4419 },
4420 {
4421 name: "CMPW",
4422 argLen: 2,
4423 asm: x86.ACMPW,
4424 reg: regInfo{
4425 inputs: []inputInfo{
4426 {0, 255},
4427 {1, 255},
4428 },
4429 },
4430 },
4431 {
4432 name: "CMPB",
4433 argLen: 2,
4434 asm: x86.ACMPB,
4435 reg: regInfo{
4436 inputs: []inputInfo{
4437 {0, 255},
4438 {1, 255},
4439 },
4440 },
4441 },
4442 {
4443 name: "CMPLconst",
4444 auxType: auxInt32,
4445 argLen: 1,
4446 asm: x86.ACMPL,
4447 reg: regInfo{
4448 inputs: []inputInfo{
4449 {0, 255},
4450 },
4451 },
4452 },
4453 {
4454 name: "CMPWconst",
4455 auxType: auxInt16,
4456 argLen: 1,
4457 asm: x86.ACMPW,
4458 reg: regInfo{
4459 inputs: []inputInfo{
4460 {0, 255},
4461 },
4462 },
4463 },
4464 {
4465 name: "CMPBconst",
4466 auxType: auxInt8,
4467 argLen: 1,
4468 asm: x86.ACMPB,
4469 reg: regInfo{
4470 inputs: []inputInfo{
4471 {0, 255},
4472 },
4473 },
4474 },
4475 {
4476 name: "CMPLload",
4477 auxType: auxSymOff,
4478 argLen: 3,
4479 faultOnNilArg0: true,
4480 symEffect: SymRead,
4481 asm: x86.ACMPL,
4482 reg: regInfo{
4483 inputs: []inputInfo{
4484 {1, 255},
4485 {0, 65791},
4486 },
4487 },
4488 },
4489 {
4490 name: "CMPWload",
4491 auxType: auxSymOff,
4492 argLen: 3,
4493 faultOnNilArg0: true,
4494 symEffect: SymRead,
4495 asm: x86.ACMPW,
4496 reg: regInfo{
4497 inputs: []inputInfo{
4498 {1, 255},
4499 {0, 65791},
4500 },
4501 },
4502 },
4503 {
4504 name: "CMPBload",
4505 auxType: auxSymOff,
4506 argLen: 3,
4507 faultOnNilArg0: true,
4508 symEffect: SymRead,
4509 asm: x86.ACMPB,
4510 reg: regInfo{
4511 inputs: []inputInfo{
4512 {1, 255},
4513 {0, 65791},
4514 },
4515 },
4516 },
4517 {
4518 name: "CMPLconstload",
4519 auxType: auxSymValAndOff,
4520 argLen: 2,
4521 faultOnNilArg0: true,
4522 symEffect: SymRead,
4523 asm: x86.ACMPL,
4524 reg: regInfo{
4525 inputs: []inputInfo{
4526 {0, 65791},
4527 },
4528 },
4529 },
4530 {
4531 name: "CMPWconstload",
4532 auxType: auxSymValAndOff,
4533 argLen: 2,
4534 faultOnNilArg0: true,
4535 symEffect: SymRead,
4536 asm: x86.ACMPW,
4537 reg: regInfo{
4538 inputs: []inputInfo{
4539 {0, 65791},
4540 },
4541 },
4542 },
4543 {
4544 name: "CMPBconstload",
4545 auxType: auxSymValAndOff,
4546 argLen: 2,
4547 faultOnNilArg0: true,
4548 symEffect: SymRead,
4549 asm: x86.ACMPB,
4550 reg: regInfo{
4551 inputs: []inputInfo{
4552 {0, 65791},
4553 },
4554 },
4555 },
4556 {
4557 name: "UCOMISS",
4558 argLen: 2,
4559 asm: x86.AUCOMISS,
4560 reg: regInfo{
4561 inputs: []inputInfo{
4562 {0, 65280},
4563 {1, 65280},
4564 },
4565 },
4566 },
4567 {
4568 name: "UCOMISD",
4569 argLen: 2,
4570 asm: x86.AUCOMISD,
4571 reg: regInfo{
4572 inputs: []inputInfo{
4573 {0, 65280},
4574 {1, 65280},
4575 },
4576 },
4577 },
4578 {
4579 name: "TESTL",
4580 argLen: 2,
4581 commutative: true,
4582 asm: x86.ATESTL,
4583 reg: regInfo{
4584 inputs: []inputInfo{
4585 {0, 255},
4586 {1, 255},
4587 },
4588 },
4589 },
4590 {
4591 name: "TESTW",
4592 argLen: 2,
4593 commutative: true,
4594 asm: x86.ATESTW,
4595 reg: regInfo{
4596 inputs: []inputInfo{
4597 {0, 255},
4598 {1, 255},
4599 },
4600 },
4601 },
4602 {
4603 name: "TESTB",
4604 argLen: 2,
4605 commutative: true,
4606 asm: x86.ATESTB,
4607 reg: regInfo{
4608 inputs: []inputInfo{
4609 {0, 255},
4610 {1, 255},
4611 },
4612 },
4613 },
4614 {
4615 name: "TESTLconst",
4616 auxType: auxInt32,
4617 argLen: 1,
4618 asm: x86.ATESTL,
4619 reg: regInfo{
4620 inputs: []inputInfo{
4621 {0, 255},
4622 },
4623 },
4624 },
4625 {
4626 name: "TESTWconst",
4627 auxType: auxInt16,
4628 argLen: 1,
4629 asm: x86.ATESTW,
4630 reg: regInfo{
4631 inputs: []inputInfo{
4632 {0, 255},
4633 },
4634 },
4635 },
4636 {
4637 name: "TESTBconst",
4638 auxType: auxInt8,
4639 argLen: 1,
4640 asm: x86.ATESTB,
4641 reg: regInfo{
4642 inputs: []inputInfo{
4643 {0, 255},
4644 },
4645 },
4646 },
4647 {
4648 name: "SHLL",
4649 argLen: 2,
4650 resultInArg0: true,
4651 clobberFlags: true,
4652 asm: x86.ASHLL,
4653 reg: regInfo{
4654 inputs: []inputInfo{
4655 {1, 2},
4656 {0, 239},
4657 },
4658 outputs: []outputInfo{
4659 {0, 239},
4660 },
4661 },
4662 },
4663 {
4664 name: "SHLLconst",
4665 auxType: auxInt32,
4666 argLen: 1,
4667 resultInArg0: true,
4668 clobberFlags: true,
4669 asm: x86.ASHLL,
4670 reg: regInfo{
4671 inputs: []inputInfo{
4672 {0, 239},
4673 },
4674 outputs: []outputInfo{
4675 {0, 239},
4676 },
4677 },
4678 },
4679 {
4680 name: "SHRL",
4681 argLen: 2,
4682 resultInArg0: true,
4683 clobberFlags: true,
4684 asm: x86.ASHRL,
4685 reg: regInfo{
4686 inputs: []inputInfo{
4687 {1, 2},
4688 {0, 239},
4689 },
4690 outputs: []outputInfo{
4691 {0, 239},
4692 },
4693 },
4694 },
4695 {
4696 name: "SHRW",
4697 argLen: 2,
4698 resultInArg0: true,
4699 clobberFlags: true,
4700 asm: x86.ASHRW,
4701 reg: regInfo{
4702 inputs: []inputInfo{
4703 {1, 2},
4704 {0, 239},
4705 },
4706 outputs: []outputInfo{
4707 {0, 239},
4708 },
4709 },
4710 },
4711 {
4712 name: "SHRB",
4713 argLen: 2,
4714 resultInArg0: true,
4715 clobberFlags: true,
4716 asm: x86.ASHRB,
4717 reg: regInfo{
4718 inputs: []inputInfo{
4719 {1, 2},
4720 {0, 239},
4721 },
4722 outputs: []outputInfo{
4723 {0, 239},
4724 },
4725 },
4726 },
4727 {
4728 name: "SHRLconst",
4729 auxType: auxInt32,
4730 argLen: 1,
4731 resultInArg0: true,
4732 clobberFlags: true,
4733 asm: x86.ASHRL,
4734 reg: regInfo{
4735 inputs: []inputInfo{
4736 {0, 239},
4737 },
4738 outputs: []outputInfo{
4739 {0, 239},
4740 },
4741 },
4742 },
4743 {
4744 name: "SHRWconst",
4745 auxType: auxInt16,
4746 argLen: 1,
4747 resultInArg0: true,
4748 clobberFlags: true,
4749 asm: x86.ASHRW,
4750 reg: regInfo{
4751 inputs: []inputInfo{
4752 {0, 239},
4753 },
4754 outputs: []outputInfo{
4755 {0, 239},
4756 },
4757 },
4758 },
4759 {
4760 name: "SHRBconst",
4761 auxType: auxInt8,
4762 argLen: 1,
4763 resultInArg0: true,
4764 clobberFlags: true,
4765 asm: x86.ASHRB,
4766 reg: regInfo{
4767 inputs: []inputInfo{
4768 {0, 239},
4769 },
4770 outputs: []outputInfo{
4771 {0, 239},
4772 },
4773 },
4774 },
4775 {
4776 name: "SARL",
4777 argLen: 2,
4778 resultInArg0: true,
4779 clobberFlags: true,
4780 asm: x86.ASARL,
4781 reg: regInfo{
4782 inputs: []inputInfo{
4783 {1, 2},
4784 {0, 239},
4785 },
4786 outputs: []outputInfo{
4787 {0, 239},
4788 },
4789 },
4790 },
4791 {
4792 name: "SARW",
4793 argLen: 2,
4794 resultInArg0: true,
4795 clobberFlags: true,
4796 asm: x86.ASARW,
4797 reg: regInfo{
4798 inputs: []inputInfo{
4799 {1, 2},
4800 {0, 239},
4801 },
4802 outputs: []outputInfo{
4803 {0, 239},
4804 },
4805 },
4806 },
4807 {
4808 name: "SARB",
4809 argLen: 2,
4810 resultInArg0: true,
4811 clobberFlags: true,
4812 asm: x86.ASARB,
4813 reg: regInfo{
4814 inputs: []inputInfo{
4815 {1, 2},
4816 {0, 239},
4817 },
4818 outputs: []outputInfo{
4819 {0, 239},
4820 },
4821 },
4822 },
4823 {
4824 name: "SARLconst",
4825 auxType: auxInt32,
4826 argLen: 1,
4827 resultInArg0: true,
4828 clobberFlags: true,
4829 asm: x86.ASARL,
4830 reg: regInfo{
4831 inputs: []inputInfo{
4832 {0, 239},
4833 },
4834 outputs: []outputInfo{
4835 {0, 239},
4836 },
4837 },
4838 },
4839 {
4840 name: "SARWconst",
4841 auxType: auxInt16,
4842 argLen: 1,
4843 resultInArg0: true,
4844 clobberFlags: true,
4845 asm: x86.ASARW,
4846 reg: regInfo{
4847 inputs: []inputInfo{
4848 {0, 239},
4849 },
4850 outputs: []outputInfo{
4851 {0, 239},
4852 },
4853 },
4854 },
4855 {
4856 name: "SARBconst",
4857 auxType: auxInt8,
4858 argLen: 1,
4859 resultInArg0: true,
4860 clobberFlags: true,
4861 asm: x86.ASARB,
4862 reg: regInfo{
4863 inputs: []inputInfo{
4864 {0, 239},
4865 },
4866 outputs: []outputInfo{
4867 {0, 239},
4868 },
4869 },
4870 },
4871 {
4872 name: "ROLL",
4873 argLen: 2,
4874 resultInArg0: true,
4875 clobberFlags: true,
4876 asm: x86.AROLL,
4877 reg: regInfo{
4878 inputs: []inputInfo{
4879 {1, 2},
4880 {0, 239},
4881 },
4882 outputs: []outputInfo{
4883 {0, 239},
4884 },
4885 },
4886 },
4887 {
4888 name: "ROLW",
4889 argLen: 2,
4890 resultInArg0: true,
4891 clobberFlags: true,
4892 asm: x86.AROLW,
4893 reg: regInfo{
4894 inputs: []inputInfo{
4895 {1, 2},
4896 {0, 239},
4897 },
4898 outputs: []outputInfo{
4899 {0, 239},
4900 },
4901 },
4902 },
4903 {
4904 name: "ROLB",
4905 argLen: 2,
4906 resultInArg0: true,
4907 clobberFlags: true,
4908 asm: x86.AROLB,
4909 reg: regInfo{
4910 inputs: []inputInfo{
4911 {1, 2},
4912 {0, 239},
4913 },
4914 outputs: []outputInfo{
4915 {0, 239},
4916 },
4917 },
4918 },
4919 {
4920 name: "ROLLconst",
4921 auxType: auxInt32,
4922 argLen: 1,
4923 resultInArg0: true,
4924 clobberFlags: true,
4925 asm: x86.AROLL,
4926 reg: regInfo{
4927 inputs: []inputInfo{
4928 {0, 239},
4929 },
4930 outputs: []outputInfo{
4931 {0, 239},
4932 },
4933 },
4934 },
4935 {
4936 name: "ROLWconst",
4937 auxType: auxInt16,
4938 argLen: 1,
4939 resultInArg0: true,
4940 clobberFlags: true,
4941 asm: x86.AROLW,
4942 reg: regInfo{
4943 inputs: []inputInfo{
4944 {0, 239},
4945 },
4946 outputs: []outputInfo{
4947 {0, 239},
4948 },
4949 },
4950 },
4951 {
4952 name: "ROLBconst",
4953 auxType: auxInt8,
4954 argLen: 1,
4955 resultInArg0: true,
4956 clobberFlags: true,
4957 asm: x86.AROLB,
4958 reg: regInfo{
4959 inputs: []inputInfo{
4960 {0, 239},
4961 },
4962 outputs: []outputInfo{
4963 {0, 239},
4964 },
4965 },
4966 },
4967 {
4968 name: "ADDLload",
4969 auxType: auxSymOff,
4970 argLen: 3,
4971 resultInArg0: true,
4972 clobberFlags: true,
4973 faultOnNilArg1: true,
4974 symEffect: SymRead,
4975 asm: x86.AADDL,
4976 reg: regInfo{
4977 inputs: []inputInfo{
4978 {0, 239},
4979 {1, 65791},
4980 },
4981 outputs: []outputInfo{
4982 {0, 239},
4983 },
4984 },
4985 },
4986 {
4987 name: "SUBLload",
4988 auxType: auxSymOff,
4989 argLen: 3,
4990 resultInArg0: true,
4991 clobberFlags: true,
4992 faultOnNilArg1: true,
4993 symEffect: SymRead,
4994 asm: x86.ASUBL,
4995 reg: regInfo{
4996 inputs: []inputInfo{
4997 {0, 239},
4998 {1, 65791},
4999 },
5000 outputs: []outputInfo{
5001 {0, 239},
5002 },
5003 },
5004 },
5005 {
5006 name: "MULLload",
5007 auxType: auxSymOff,
5008 argLen: 3,
5009 resultInArg0: true,
5010 clobberFlags: true,
5011 faultOnNilArg1: true,
5012 symEffect: SymRead,
5013 asm: x86.AIMULL,
5014 reg: regInfo{
5015 inputs: []inputInfo{
5016 {0, 239},
5017 {1, 65791},
5018 },
5019 outputs: []outputInfo{
5020 {0, 239},
5021 },
5022 },
5023 },
5024 {
5025 name: "ANDLload",
5026 auxType: auxSymOff,
5027 argLen: 3,
5028 resultInArg0: true,
5029 clobberFlags: true,
5030 faultOnNilArg1: true,
5031 symEffect: SymRead,
5032 asm: x86.AANDL,
5033 reg: regInfo{
5034 inputs: []inputInfo{
5035 {0, 239},
5036 {1, 65791},
5037 },
5038 outputs: []outputInfo{
5039 {0, 239},
5040 },
5041 },
5042 },
5043 {
5044 name: "ORLload",
5045 auxType: auxSymOff,
5046 argLen: 3,
5047 resultInArg0: true,
5048 clobberFlags: true,
5049 faultOnNilArg1: true,
5050 symEffect: SymRead,
5051 asm: x86.AORL,
5052 reg: regInfo{
5053 inputs: []inputInfo{
5054 {0, 239},
5055 {1, 65791},
5056 },
5057 outputs: []outputInfo{
5058 {0, 239},
5059 },
5060 },
5061 },
5062 {
5063 name: "XORLload",
5064 auxType: auxSymOff,
5065 argLen: 3,
5066 resultInArg0: true,
5067 clobberFlags: true,
5068 faultOnNilArg1: true,
5069 symEffect: SymRead,
5070 asm: x86.AXORL,
5071 reg: regInfo{
5072 inputs: []inputInfo{
5073 {0, 239},
5074 {1, 65791},
5075 },
5076 outputs: []outputInfo{
5077 {0, 239},
5078 },
5079 },
5080 },
5081 {
5082 name: "ADDLloadidx4",
5083 auxType: auxSymOff,
5084 argLen: 4,
5085 resultInArg0: true,
5086 clobberFlags: true,
5087 symEffect: SymRead,
5088 asm: x86.AADDL,
5089 reg: regInfo{
5090 inputs: []inputInfo{
5091 {0, 239},
5092 {2, 255},
5093 {1, 65791},
5094 },
5095 outputs: []outputInfo{
5096 {0, 239},
5097 },
5098 },
5099 },
5100 {
5101 name: "SUBLloadidx4",
5102 auxType: auxSymOff,
5103 argLen: 4,
5104 resultInArg0: true,
5105 clobberFlags: true,
5106 symEffect: SymRead,
5107 asm: x86.ASUBL,
5108 reg: regInfo{
5109 inputs: []inputInfo{
5110 {0, 239},
5111 {2, 255},
5112 {1, 65791},
5113 },
5114 outputs: []outputInfo{
5115 {0, 239},
5116 },
5117 },
5118 },
5119 {
5120 name: "MULLloadidx4",
5121 auxType: auxSymOff,
5122 argLen: 4,
5123 resultInArg0: true,
5124 clobberFlags: true,
5125 symEffect: SymRead,
5126 asm: x86.AIMULL,
5127 reg: regInfo{
5128 inputs: []inputInfo{
5129 {0, 239},
5130 {2, 255},
5131 {1, 65791},
5132 },
5133 outputs: []outputInfo{
5134 {0, 239},
5135 },
5136 },
5137 },
5138 {
5139 name: "ANDLloadidx4",
5140 auxType: auxSymOff,
5141 argLen: 4,
5142 resultInArg0: true,
5143 clobberFlags: true,
5144 symEffect: SymRead,
5145 asm: x86.AANDL,
5146 reg: regInfo{
5147 inputs: []inputInfo{
5148 {0, 239},
5149 {2, 255},
5150 {1, 65791},
5151 },
5152 outputs: []outputInfo{
5153 {0, 239},
5154 },
5155 },
5156 },
5157 {
5158 name: "ORLloadidx4",
5159 auxType: auxSymOff,
5160 argLen: 4,
5161 resultInArg0: true,
5162 clobberFlags: true,
5163 symEffect: SymRead,
5164 asm: x86.AORL,
5165 reg: regInfo{
5166 inputs: []inputInfo{
5167 {0, 239},
5168 {2, 255},
5169 {1, 65791},
5170 },
5171 outputs: []outputInfo{
5172 {0, 239},
5173 },
5174 },
5175 },
5176 {
5177 name: "XORLloadidx4",
5178 auxType: auxSymOff,
5179 argLen: 4,
5180 resultInArg0: true,
5181 clobberFlags: true,
5182 symEffect: SymRead,
5183 asm: x86.AXORL,
5184 reg: regInfo{
5185 inputs: []inputInfo{
5186 {0, 239},
5187 {2, 255},
5188 {1, 65791},
5189 },
5190 outputs: []outputInfo{
5191 {0, 239},
5192 },
5193 },
5194 },
5195 {
5196 name: "NEGL",
5197 argLen: 1,
5198 resultInArg0: true,
5199 clobberFlags: true,
5200 asm: x86.ANEGL,
5201 reg: regInfo{
5202 inputs: []inputInfo{
5203 {0, 239},
5204 },
5205 outputs: []outputInfo{
5206 {0, 239},
5207 },
5208 },
5209 },
5210 {
5211 name: "NOTL",
5212 argLen: 1,
5213 resultInArg0: true,
5214 asm: x86.ANOTL,
5215 reg: regInfo{
5216 inputs: []inputInfo{
5217 {0, 239},
5218 },
5219 outputs: []outputInfo{
5220 {0, 239},
5221 },
5222 },
5223 },
5224 {
5225 name: "BSFL",
5226 argLen: 1,
5227 clobberFlags: true,
5228 asm: x86.ABSFL,
5229 reg: regInfo{
5230 inputs: []inputInfo{
5231 {0, 239},
5232 },
5233 outputs: []outputInfo{
5234 {0, 239},
5235 },
5236 },
5237 },
5238 {
5239 name: "BSFW",
5240 argLen: 1,
5241 clobberFlags: true,
5242 asm: x86.ABSFW,
5243 reg: regInfo{
5244 inputs: []inputInfo{
5245 {0, 239},
5246 },
5247 outputs: []outputInfo{
5248 {0, 239},
5249 },
5250 },
5251 },
5252 {
5253 name: "LoweredCtz32",
5254 argLen: 1,
5255 clobberFlags: true,
5256 reg: regInfo{
5257 inputs: []inputInfo{
5258 {0, 239},
5259 },
5260 outputs: []outputInfo{
5261 {0, 239},
5262 },
5263 },
5264 },
5265 {
5266 name: "LoweredCtz64",
5267 argLen: 2,
5268 resultNotInArgs: true,
5269 clobberFlags: true,
5270 reg: regInfo{
5271 inputs: []inputInfo{
5272 {0, 239},
5273 {1, 239},
5274 },
5275 outputs: []outputInfo{
5276 {0, 239},
5277 },
5278 },
5279 },
5280 {
5281 name: "BSRL",
5282 argLen: 1,
5283 clobberFlags: true,
5284 asm: x86.ABSRL,
5285 reg: regInfo{
5286 inputs: []inputInfo{
5287 {0, 239},
5288 },
5289 outputs: []outputInfo{
5290 {0, 239},
5291 },
5292 },
5293 },
5294 {
5295 name: "BSRW",
5296 argLen: 1,
5297 clobberFlags: true,
5298 asm: x86.ABSRW,
5299 reg: regInfo{
5300 inputs: []inputInfo{
5301 {0, 239},
5302 },
5303 outputs: []outputInfo{
5304 {0, 239},
5305 },
5306 },
5307 },
5308 {
5309 name: "BSWAPL",
5310 argLen: 1,
5311 resultInArg0: true,
5312 asm: x86.ABSWAPL,
5313 reg: regInfo{
5314 inputs: []inputInfo{
5315 {0, 239},
5316 },
5317 outputs: []outputInfo{
5318 {0, 239},
5319 },
5320 },
5321 },
5322 {
5323 name: "SQRTSD",
5324 argLen: 1,
5325 asm: x86.ASQRTSD,
5326 reg: regInfo{
5327 inputs: []inputInfo{
5328 {0, 65280},
5329 },
5330 outputs: []outputInfo{
5331 {0, 65280},
5332 },
5333 },
5334 },
5335 {
5336 name: "SQRTSS",
5337 argLen: 1,
5338 asm: x86.ASQRTSS,
5339 reg: regInfo{
5340 inputs: []inputInfo{
5341 {0, 65280},
5342 },
5343 outputs: []outputInfo{
5344 {0, 65280},
5345 },
5346 },
5347 },
5348 {
5349 name: "SBBLcarrymask",
5350 argLen: 1,
5351 asm: x86.ASBBL,
5352 reg: regInfo{
5353 outputs: []outputInfo{
5354 {0, 239},
5355 },
5356 },
5357 },
5358 {
5359 name: "SETEQ",
5360 argLen: 1,
5361 asm: x86.ASETEQ,
5362 reg: regInfo{
5363 outputs: []outputInfo{
5364 {0, 239},
5365 },
5366 },
5367 },
5368 {
5369 name: "SETNE",
5370 argLen: 1,
5371 asm: x86.ASETNE,
5372 reg: regInfo{
5373 outputs: []outputInfo{
5374 {0, 239},
5375 },
5376 },
5377 },
5378 {
5379 name: "SETL",
5380 argLen: 1,
5381 asm: x86.ASETLT,
5382 reg: regInfo{
5383 outputs: []outputInfo{
5384 {0, 239},
5385 },
5386 },
5387 },
5388 {
5389 name: "SETLE",
5390 argLen: 1,
5391 asm: x86.ASETLE,
5392 reg: regInfo{
5393 outputs: []outputInfo{
5394 {0, 239},
5395 },
5396 },
5397 },
5398 {
5399 name: "SETG",
5400 argLen: 1,
5401 asm: x86.ASETGT,
5402 reg: regInfo{
5403 outputs: []outputInfo{
5404 {0, 239},
5405 },
5406 },
5407 },
5408 {
5409 name: "SETGE",
5410 argLen: 1,
5411 asm: x86.ASETGE,
5412 reg: regInfo{
5413 outputs: []outputInfo{
5414 {0, 239},
5415 },
5416 },
5417 },
5418 {
5419 name: "SETB",
5420 argLen: 1,
5421 asm: x86.ASETCS,
5422 reg: regInfo{
5423 outputs: []outputInfo{
5424 {0, 239},
5425 },
5426 },
5427 },
5428 {
5429 name: "SETBE",
5430 argLen: 1,
5431 asm: x86.ASETLS,
5432 reg: regInfo{
5433 outputs: []outputInfo{
5434 {0, 239},
5435 },
5436 },
5437 },
5438 {
5439 name: "SETA",
5440 argLen: 1,
5441 asm: x86.ASETHI,
5442 reg: regInfo{
5443 outputs: []outputInfo{
5444 {0, 239},
5445 },
5446 },
5447 },
5448 {
5449 name: "SETAE",
5450 argLen: 1,
5451 asm: x86.ASETCC,
5452 reg: regInfo{
5453 outputs: []outputInfo{
5454 {0, 239},
5455 },
5456 },
5457 },
5458 {
5459 name: "SETO",
5460 argLen: 1,
5461 asm: x86.ASETOS,
5462 reg: regInfo{
5463 outputs: []outputInfo{
5464 {0, 239},
5465 },
5466 },
5467 },
5468 {
5469 name: "SETEQF",
5470 argLen: 1,
5471 clobberFlags: true,
5472 asm: x86.ASETEQ,
5473 reg: regInfo{
5474 clobbers: 1,
5475 outputs: []outputInfo{
5476 {0, 238},
5477 },
5478 },
5479 },
5480 {
5481 name: "SETNEF",
5482 argLen: 1,
5483 clobberFlags: true,
5484 asm: x86.ASETNE,
5485 reg: regInfo{
5486 clobbers: 1,
5487 outputs: []outputInfo{
5488 {0, 238},
5489 },
5490 },
5491 },
5492 {
5493 name: "SETORD",
5494 argLen: 1,
5495 asm: x86.ASETPC,
5496 reg: regInfo{
5497 outputs: []outputInfo{
5498 {0, 239},
5499 },
5500 },
5501 },
5502 {
5503 name: "SETNAN",
5504 argLen: 1,
5505 asm: x86.ASETPS,
5506 reg: regInfo{
5507 outputs: []outputInfo{
5508 {0, 239},
5509 },
5510 },
5511 },
5512 {
5513 name: "SETGF",
5514 argLen: 1,
5515 asm: x86.ASETHI,
5516 reg: regInfo{
5517 outputs: []outputInfo{
5518 {0, 239},
5519 },
5520 },
5521 },
5522 {
5523 name: "SETGEF",
5524 argLen: 1,
5525 asm: x86.ASETCC,
5526 reg: regInfo{
5527 outputs: []outputInfo{
5528 {0, 239},
5529 },
5530 },
5531 },
5532 {
5533 name: "MOVBLSX",
5534 argLen: 1,
5535 asm: x86.AMOVBLSX,
5536 reg: regInfo{
5537 inputs: []inputInfo{
5538 {0, 239},
5539 },
5540 outputs: []outputInfo{
5541 {0, 239},
5542 },
5543 },
5544 },
5545 {
5546 name: "MOVBLZX",
5547 argLen: 1,
5548 asm: x86.AMOVBLZX,
5549 reg: regInfo{
5550 inputs: []inputInfo{
5551 {0, 239},
5552 },
5553 outputs: []outputInfo{
5554 {0, 239},
5555 },
5556 },
5557 },
5558 {
5559 name: "MOVWLSX",
5560 argLen: 1,
5561 asm: x86.AMOVWLSX,
5562 reg: regInfo{
5563 inputs: []inputInfo{
5564 {0, 239},
5565 },
5566 outputs: []outputInfo{
5567 {0, 239},
5568 },
5569 },
5570 },
5571 {
5572 name: "MOVWLZX",
5573 argLen: 1,
5574 asm: x86.AMOVWLZX,
5575 reg: regInfo{
5576 inputs: []inputInfo{
5577 {0, 239},
5578 },
5579 outputs: []outputInfo{
5580 {0, 239},
5581 },
5582 },
5583 },
5584 {
5585 name: "MOVLconst",
5586 auxType: auxInt32,
5587 argLen: 0,
5588 rematerializeable: true,
5589 asm: x86.AMOVL,
5590 reg: regInfo{
5591 outputs: []outputInfo{
5592 {0, 239},
5593 },
5594 },
5595 },
5596 {
5597 name: "CVTTSD2SL",
5598 argLen: 1,
5599 asm: x86.ACVTTSD2SL,
5600 reg: regInfo{
5601 inputs: []inputInfo{
5602 {0, 65280},
5603 },
5604 outputs: []outputInfo{
5605 {0, 239},
5606 },
5607 },
5608 },
5609 {
5610 name: "CVTTSS2SL",
5611 argLen: 1,
5612 asm: x86.ACVTTSS2SL,
5613 reg: regInfo{
5614 inputs: []inputInfo{
5615 {0, 65280},
5616 },
5617 outputs: []outputInfo{
5618 {0, 239},
5619 },
5620 },
5621 },
5622 {
5623 name: "CVTSL2SS",
5624 argLen: 1,
5625 asm: x86.ACVTSL2SS,
5626 reg: regInfo{
5627 inputs: []inputInfo{
5628 {0, 239},
5629 },
5630 outputs: []outputInfo{
5631 {0, 65280},
5632 },
5633 },
5634 },
5635 {
5636 name: "CVTSL2SD",
5637 argLen: 1,
5638 asm: x86.ACVTSL2SD,
5639 reg: regInfo{
5640 inputs: []inputInfo{
5641 {0, 239},
5642 },
5643 outputs: []outputInfo{
5644 {0, 65280},
5645 },
5646 },
5647 },
5648 {
5649 name: "CVTSD2SS",
5650 argLen: 1,
5651 asm: x86.ACVTSD2SS,
5652 reg: regInfo{
5653 inputs: []inputInfo{
5654 {0, 65280},
5655 },
5656 outputs: []outputInfo{
5657 {0, 65280},
5658 },
5659 },
5660 },
5661 {
5662 name: "CVTSS2SD",
5663 argLen: 1,
5664 asm: x86.ACVTSS2SD,
5665 reg: regInfo{
5666 inputs: []inputInfo{
5667 {0, 65280},
5668 },
5669 outputs: []outputInfo{
5670 {0, 65280},
5671 },
5672 },
5673 },
5674 {
5675 name: "PXOR",
5676 argLen: 2,
5677 commutative: true,
5678 resultInArg0: true,
5679 asm: x86.APXOR,
5680 reg: regInfo{
5681 inputs: []inputInfo{
5682 {0, 65280},
5683 {1, 65280},
5684 },
5685 outputs: []outputInfo{
5686 {0, 65280},
5687 },
5688 },
5689 },
5690 {
5691 name: "LEAL",
5692 auxType: auxSymOff,
5693 argLen: 1,
5694 rematerializeable: true,
5695 symEffect: SymAddr,
5696 reg: regInfo{
5697 inputs: []inputInfo{
5698 {0, 65791},
5699 },
5700 outputs: []outputInfo{
5701 {0, 239},
5702 },
5703 },
5704 },
5705 {
5706 name: "LEAL1",
5707 auxType: auxSymOff,
5708 argLen: 2,
5709 commutative: true,
5710 symEffect: SymAddr,
5711 reg: regInfo{
5712 inputs: []inputInfo{
5713 {1, 255},
5714 {0, 65791},
5715 },
5716 outputs: []outputInfo{
5717 {0, 239},
5718 },
5719 },
5720 },
5721 {
5722 name: "LEAL2",
5723 auxType: auxSymOff,
5724 argLen: 2,
5725 symEffect: SymAddr,
5726 reg: regInfo{
5727 inputs: []inputInfo{
5728 {1, 255},
5729 {0, 65791},
5730 },
5731 outputs: []outputInfo{
5732 {0, 239},
5733 },
5734 },
5735 },
5736 {
5737 name: "LEAL4",
5738 auxType: auxSymOff,
5739 argLen: 2,
5740 symEffect: SymAddr,
5741 reg: regInfo{
5742 inputs: []inputInfo{
5743 {1, 255},
5744 {0, 65791},
5745 },
5746 outputs: []outputInfo{
5747 {0, 239},
5748 },
5749 },
5750 },
5751 {
5752 name: "LEAL8",
5753 auxType: auxSymOff,
5754 argLen: 2,
5755 symEffect: SymAddr,
5756 reg: regInfo{
5757 inputs: []inputInfo{
5758 {1, 255},
5759 {0, 65791},
5760 },
5761 outputs: []outputInfo{
5762 {0, 239},
5763 },
5764 },
5765 },
5766 {
5767 name: "MOVBload",
5768 auxType: auxSymOff,
5769 argLen: 2,
5770 faultOnNilArg0: true,
5771 symEffect: SymRead,
5772 asm: x86.AMOVBLZX,
5773 reg: regInfo{
5774 inputs: []inputInfo{
5775 {0, 65791},
5776 },
5777 outputs: []outputInfo{
5778 {0, 239},
5779 },
5780 },
5781 },
5782 {
5783 name: "MOVBLSXload",
5784 auxType: auxSymOff,
5785 argLen: 2,
5786 faultOnNilArg0: true,
5787 symEffect: SymRead,
5788 asm: x86.AMOVBLSX,
5789 reg: regInfo{
5790 inputs: []inputInfo{
5791 {0, 65791},
5792 },
5793 outputs: []outputInfo{
5794 {0, 239},
5795 },
5796 },
5797 },
5798 {
5799 name: "MOVWload",
5800 auxType: auxSymOff,
5801 argLen: 2,
5802 faultOnNilArg0: true,
5803 symEffect: SymRead,
5804 asm: x86.AMOVWLZX,
5805 reg: regInfo{
5806 inputs: []inputInfo{
5807 {0, 65791},
5808 },
5809 outputs: []outputInfo{
5810 {0, 239},
5811 },
5812 },
5813 },
5814 {
5815 name: "MOVWLSXload",
5816 auxType: auxSymOff,
5817 argLen: 2,
5818 faultOnNilArg0: true,
5819 symEffect: SymRead,
5820 asm: x86.AMOVWLSX,
5821 reg: regInfo{
5822 inputs: []inputInfo{
5823 {0, 65791},
5824 },
5825 outputs: []outputInfo{
5826 {0, 239},
5827 },
5828 },
5829 },
5830 {
5831 name: "MOVLload",
5832 auxType: auxSymOff,
5833 argLen: 2,
5834 faultOnNilArg0: true,
5835 symEffect: SymRead,
5836 asm: x86.AMOVL,
5837 reg: regInfo{
5838 inputs: []inputInfo{
5839 {0, 65791},
5840 },
5841 outputs: []outputInfo{
5842 {0, 239},
5843 },
5844 },
5845 },
5846 {
5847 name: "MOVBstore",
5848 auxType: auxSymOff,
5849 argLen: 3,
5850 faultOnNilArg0: true,
5851 symEffect: SymWrite,
5852 asm: x86.AMOVB,
5853 reg: regInfo{
5854 inputs: []inputInfo{
5855 {1, 255},
5856 {0, 65791},
5857 },
5858 },
5859 },
5860 {
5861 name: "MOVWstore",
5862 auxType: auxSymOff,
5863 argLen: 3,
5864 faultOnNilArg0: true,
5865 symEffect: SymWrite,
5866 asm: x86.AMOVW,
5867 reg: regInfo{
5868 inputs: []inputInfo{
5869 {1, 255},
5870 {0, 65791},
5871 },
5872 },
5873 },
5874 {
5875 name: "MOVLstore",
5876 auxType: auxSymOff,
5877 argLen: 3,
5878 faultOnNilArg0: true,
5879 symEffect: SymWrite,
5880 asm: x86.AMOVL,
5881 reg: regInfo{
5882 inputs: []inputInfo{
5883 {1, 255},
5884 {0, 65791},
5885 },
5886 },
5887 },
5888 {
5889 name: "ADDLmodify",
5890 auxType: auxSymOff,
5891 argLen: 3,
5892 clobberFlags: true,
5893 faultOnNilArg0: true,
5894 symEffect: SymRead | SymWrite,
5895 asm: x86.AADDL,
5896 reg: regInfo{
5897 inputs: []inputInfo{
5898 {1, 255},
5899 {0, 65791},
5900 },
5901 },
5902 },
5903 {
5904 name: "SUBLmodify",
5905 auxType: auxSymOff,
5906 argLen: 3,
5907 clobberFlags: true,
5908 faultOnNilArg0: true,
5909 symEffect: SymRead | SymWrite,
5910 asm: x86.ASUBL,
5911 reg: regInfo{
5912 inputs: []inputInfo{
5913 {1, 255},
5914 {0, 65791},
5915 },
5916 },
5917 },
5918 {
5919 name: "ANDLmodify",
5920 auxType: auxSymOff,
5921 argLen: 3,
5922 clobberFlags: true,
5923 faultOnNilArg0: true,
5924 symEffect: SymRead | SymWrite,
5925 asm: x86.AANDL,
5926 reg: regInfo{
5927 inputs: []inputInfo{
5928 {1, 255},
5929 {0, 65791},
5930 },
5931 },
5932 },
5933 {
5934 name: "ORLmodify",
5935 auxType: auxSymOff,
5936 argLen: 3,
5937 clobberFlags: true,
5938 faultOnNilArg0: true,
5939 symEffect: SymRead | SymWrite,
5940 asm: x86.AORL,
5941 reg: regInfo{
5942 inputs: []inputInfo{
5943 {1, 255},
5944 {0, 65791},
5945 },
5946 },
5947 },
5948 {
5949 name: "XORLmodify",
5950 auxType: auxSymOff,
5951 argLen: 3,
5952 clobberFlags: true,
5953 faultOnNilArg0: true,
5954 symEffect: SymRead | SymWrite,
5955 asm: x86.AXORL,
5956 reg: regInfo{
5957 inputs: []inputInfo{
5958 {1, 255},
5959 {0, 65791},
5960 },
5961 },
5962 },
5963 {
5964 name: "ADDLmodifyidx4",
5965 auxType: auxSymOff,
5966 argLen: 4,
5967 clobberFlags: true,
5968 symEffect: SymRead | SymWrite,
5969 asm: x86.AADDL,
5970 reg: regInfo{
5971 inputs: []inputInfo{
5972 {1, 255},
5973 {2, 255},
5974 {0, 65791},
5975 },
5976 },
5977 },
5978 {
5979 name: "SUBLmodifyidx4",
5980 auxType: auxSymOff,
5981 argLen: 4,
5982 clobberFlags: true,
5983 symEffect: SymRead | SymWrite,
5984 asm: x86.ASUBL,
5985 reg: regInfo{
5986 inputs: []inputInfo{
5987 {1, 255},
5988 {2, 255},
5989 {0, 65791},
5990 },
5991 },
5992 },
5993 {
5994 name: "ANDLmodifyidx4",
5995 auxType: auxSymOff,
5996 argLen: 4,
5997 clobberFlags: true,
5998 symEffect: SymRead | SymWrite,
5999 asm: x86.AANDL,
6000 reg: regInfo{
6001 inputs: []inputInfo{
6002 {1, 255},
6003 {2, 255},
6004 {0, 65791},
6005 },
6006 },
6007 },
6008 {
6009 name: "ORLmodifyidx4",
6010 auxType: auxSymOff,
6011 argLen: 4,
6012 clobberFlags: true,
6013 symEffect: SymRead | SymWrite,
6014 asm: x86.AORL,
6015 reg: regInfo{
6016 inputs: []inputInfo{
6017 {1, 255},
6018 {2, 255},
6019 {0, 65791},
6020 },
6021 },
6022 },
6023 {
6024 name: "XORLmodifyidx4",
6025 auxType: auxSymOff,
6026 argLen: 4,
6027 clobberFlags: true,
6028 symEffect: SymRead | SymWrite,
6029 asm: x86.AXORL,
6030 reg: regInfo{
6031 inputs: []inputInfo{
6032 {1, 255},
6033 {2, 255},
6034 {0, 65791},
6035 },
6036 },
6037 },
6038 {
6039 name: "ADDLconstmodify",
6040 auxType: auxSymValAndOff,
6041 argLen: 2,
6042 clobberFlags: true,
6043 faultOnNilArg0: true,
6044 symEffect: SymRead | SymWrite,
6045 asm: x86.AADDL,
6046 reg: regInfo{
6047 inputs: []inputInfo{
6048 {0, 65791},
6049 },
6050 },
6051 },
6052 {
6053 name: "ANDLconstmodify",
6054 auxType: auxSymValAndOff,
6055 argLen: 2,
6056 clobberFlags: true,
6057 faultOnNilArg0: true,
6058 symEffect: SymRead | SymWrite,
6059 asm: x86.AANDL,
6060 reg: regInfo{
6061 inputs: []inputInfo{
6062 {0, 65791},
6063 },
6064 },
6065 },
6066 {
6067 name: "ORLconstmodify",
6068 auxType: auxSymValAndOff,
6069 argLen: 2,
6070 clobberFlags: true,
6071 faultOnNilArg0: true,
6072 symEffect: SymRead | SymWrite,
6073 asm: x86.AORL,
6074 reg: regInfo{
6075 inputs: []inputInfo{
6076 {0, 65791},
6077 },
6078 },
6079 },
6080 {
6081 name: "XORLconstmodify",
6082 auxType: auxSymValAndOff,
6083 argLen: 2,
6084 clobberFlags: true,
6085 faultOnNilArg0: true,
6086 symEffect: SymRead | SymWrite,
6087 asm: x86.AXORL,
6088 reg: regInfo{
6089 inputs: []inputInfo{
6090 {0, 65791},
6091 },
6092 },
6093 },
6094 {
6095 name: "ADDLconstmodifyidx4",
6096 auxType: auxSymValAndOff,
6097 argLen: 3,
6098 clobberFlags: true,
6099 symEffect: SymRead | SymWrite,
6100 asm: x86.AADDL,
6101 reg: regInfo{
6102 inputs: []inputInfo{
6103 {1, 255},
6104 {0, 65791},
6105 },
6106 },
6107 },
6108 {
6109 name: "ANDLconstmodifyidx4",
6110 auxType: auxSymValAndOff,
6111 argLen: 3,
6112 clobberFlags: true,
6113 symEffect: SymRead | SymWrite,
6114 asm: x86.AANDL,
6115 reg: regInfo{
6116 inputs: []inputInfo{
6117 {1, 255},
6118 {0, 65791},
6119 },
6120 },
6121 },
6122 {
6123 name: "ORLconstmodifyidx4",
6124 auxType: auxSymValAndOff,
6125 argLen: 3,
6126 clobberFlags: true,
6127 symEffect: SymRead | SymWrite,
6128 asm: x86.AORL,
6129 reg: regInfo{
6130 inputs: []inputInfo{
6131 {1, 255},
6132 {0, 65791},
6133 },
6134 },
6135 },
6136 {
6137 name: "XORLconstmodifyidx4",
6138 auxType: auxSymValAndOff,
6139 argLen: 3,
6140 clobberFlags: true,
6141 symEffect: SymRead | SymWrite,
6142 asm: x86.AXORL,
6143 reg: regInfo{
6144 inputs: []inputInfo{
6145 {1, 255},
6146 {0, 65791},
6147 },
6148 },
6149 },
6150 {
6151 name: "MOVBloadidx1",
6152 auxType: auxSymOff,
6153 argLen: 3,
6154 commutative: true,
6155 symEffect: SymRead,
6156 asm: x86.AMOVBLZX,
6157 reg: regInfo{
6158 inputs: []inputInfo{
6159 {1, 255},
6160 {0, 65791},
6161 },
6162 outputs: []outputInfo{
6163 {0, 239},
6164 },
6165 },
6166 },
6167 {
6168 name: "MOVWloadidx1",
6169 auxType: auxSymOff,
6170 argLen: 3,
6171 commutative: true,
6172 symEffect: SymRead,
6173 asm: x86.AMOVWLZX,
6174 reg: regInfo{
6175 inputs: []inputInfo{
6176 {1, 255},
6177 {0, 65791},
6178 },
6179 outputs: []outputInfo{
6180 {0, 239},
6181 },
6182 },
6183 },
6184 {
6185 name: "MOVWloadidx2",
6186 auxType: auxSymOff,
6187 argLen: 3,
6188 symEffect: SymRead,
6189 asm: x86.AMOVWLZX,
6190 reg: regInfo{
6191 inputs: []inputInfo{
6192 {1, 255},
6193 {0, 65791},
6194 },
6195 outputs: []outputInfo{
6196 {0, 239},
6197 },
6198 },
6199 },
6200 {
6201 name: "MOVLloadidx1",
6202 auxType: auxSymOff,
6203 argLen: 3,
6204 commutative: true,
6205 symEffect: SymRead,
6206 asm: x86.AMOVL,
6207 reg: regInfo{
6208 inputs: []inputInfo{
6209 {1, 255},
6210 {0, 65791},
6211 },
6212 outputs: []outputInfo{
6213 {0, 239},
6214 },
6215 },
6216 },
6217 {
6218 name: "MOVLloadidx4",
6219 auxType: auxSymOff,
6220 argLen: 3,
6221 symEffect: SymRead,
6222 asm: x86.AMOVL,
6223 reg: regInfo{
6224 inputs: []inputInfo{
6225 {1, 255},
6226 {0, 65791},
6227 },
6228 outputs: []outputInfo{
6229 {0, 239},
6230 },
6231 },
6232 },
6233 {
6234 name: "MOVBstoreidx1",
6235 auxType: auxSymOff,
6236 argLen: 4,
6237 commutative: true,
6238 symEffect: SymWrite,
6239 asm: x86.AMOVB,
6240 reg: regInfo{
6241 inputs: []inputInfo{
6242 {1, 255},
6243 {2, 255},
6244 {0, 65791},
6245 },
6246 },
6247 },
6248 {
6249 name: "MOVWstoreidx1",
6250 auxType: auxSymOff,
6251 argLen: 4,
6252 commutative: true,
6253 symEffect: SymWrite,
6254 asm: x86.AMOVW,
6255 reg: regInfo{
6256 inputs: []inputInfo{
6257 {1, 255},
6258 {2, 255},
6259 {0, 65791},
6260 },
6261 },
6262 },
6263 {
6264 name: "MOVWstoreidx2",
6265 auxType: auxSymOff,
6266 argLen: 4,
6267 symEffect: SymWrite,
6268 asm: x86.AMOVW,
6269 reg: regInfo{
6270 inputs: []inputInfo{
6271 {1, 255},
6272 {2, 255},
6273 {0, 65791},
6274 },
6275 },
6276 },
6277 {
6278 name: "MOVLstoreidx1",
6279 auxType: auxSymOff,
6280 argLen: 4,
6281 commutative: true,
6282 symEffect: SymWrite,
6283 asm: x86.AMOVL,
6284 reg: regInfo{
6285 inputs: []inputInfo{
6286 {1, 255},
6287 {2, 255},
6288 {0, 65791},
6289 },
6290 },
6291 },
6292 {
6293 name: "MOVLstoreidx4",
6294 auxType: auxSymOff,
6295 argLen: 4,
6296 symEffect: SymWrite,
6297 asm: x86.AMOVL,
6298 reg: regInfo{
6299 inputs: []inputInfo{
6300 {1, 255},
6301 {2, 255},
6302 {0, 65791},
6303 },
6304 },
6305 },
6306 {
6307 name: "MOVBstoreconst",
6308 auxType: auxSymValAndOff,
6309 argLen: 2,
6310 faultOnNilArg0: true,
6311 symEffect: SymWrite,
6312 asm: x86.AMOVB,
6313 reg: regInfo{
6314 inputs: []inputInfo{
6315 {0, 65791},
6316 },
6317 },
6318 },
6319 {
6320 name: "MOVWstoreconst",
6321 auxType: auxSymValAndOff,
6322 argLen: 2,
6323 faultOnNilArg0: true,
6324 symEffect: SymWrite,
6325 asm: x86.AMOVW,
6326 reg: regInfo{
6327 inputs: []inputInfo{
6328 {0, 65791},
6329 },
6330 },
6331 },
6332 {
6333 name: "MOVLstoreconst",
6334 auxType: auxSymValAndOff,
6335 argLen: 2,
6336 faultOnNilArg0: true,
6337 symEffect: SymWrite,
6338 asm: x86.AMOVL,
6339 reg: regInfo{
6340 inputs: []inputInfo{
6341 {0, 65791},
6342 },
6343 },
6344 },
6345 {
6346 name: "MOVBstoreconstidx1",
6347 auxType: auxSymValAndOff,
6348 argLen: 3,
6349 symEffect: SymWrite,
6350 asm: x86.AMOVB,
6351 reg: regInfo{
6352 inputs: []inputInfo{
6353 {1, 255},
6354 {0, 65791},
6355 },
6356 },
6357 },
6358 {
6359 name: "MOVWstoreconstidx1",
6360 auxType: auxSymValAndOff,
6361 argLen: 3,
6362 symEffect: SymWrite,
6363 asm: x86.AMOVW,
6364 reg: regInfo{
6365 inputs: []inputInfo{
6366 {1, 255},
6367 {0, 65791},
6368 },
6369 },
6370 },
6371 {
6372 name: "MOVWstoreconstidx2",
6373 auxType: auxSymValAndOff,
6374 argLen: 3,
6375 symEffect: SymWrite,
6376 asm: x86.AMOVW,
6377 reg: regInfo{
6378 inputs: []inputInfo{
6379 {1, 255},
6380 {0, 65791},
6381 },
6382 },
6383 },
6384 {
6385 name: "MOVLstoreconstidx1",
6386 auxType: auxSymValAndOff,
6387 argLen: 3,
6388 symEffect: SymWrite,
6389 asm: x86.AMOVL,
6390 reg: regInfo{
6391 inputs: []inputInfo{
6392 {1, 255},
6393 {0, 65791},
6394 },
6395 },
6396 },
6397 {
6398 name: "MOVLstoreconstidx4",
6399 auxType: auxSymValAndOff,
6400 argLen: 3,
6401 symEffect: SymWrite,
6402 asm: x86.AMOVL,
6403 reg: regInfo{
6404 inputs: []inputInfo{
6405 {1, 255},
6406 {0, 65791},
6407 },
6408 },
6409 },
6410 {
6411 name: "DUFFZERO",
6412 auxType: auxInt64,
6413 argLen: 3,
6414 faultOnNilArg0: true,
6415 reg: regInfo{
6416 inputs: []inputInfo{
6417 {0, 128},
6418 {1, 1},
6419 },
6420 clobbers: 130,
6421 },
6422 },
6423 {
6424 name: "REPSTOSL",
6425 argLen: 4,
6426 faultOnNilArg0: true,
6427 reg: regInfo{
6428 inputs: []inputInfo{
6429 {0, 128},
6430 {1, 2},
6431 {2, 1},
6432 },
6433 clobbers: 130,
6434 },
6435 },
6436 {
6437 name: "CALLstatic",
6438 auxType: auxCallOff,
6439 argLen: 1,
6440 clobberFlags: true,
6441 call: true,
6442 reg: regInfo{
6443 clobbers: 65519,
6444 },
6445 },
6446 {
6447 name: "CALLtail",
6448 auxType: auxCallOff,
6449 argLen: 1,
6450 clobberFlags: true,
6451 call: true,
6452 tailCall: true,
6453 reg: regInfo{
6454 clobbers: 65519,
6455 },
6456 },
6457 {
6458 name: "CALLclosure",
6459 auxType: auxCallOff,
6460 argLen: 3,
6461 clobberFlags: true,
6462 call: true,
6463 reg: regInfo{
6464 inputs: []inputInfo{
6465 {1, 4},
6466 {0, 255},
6467 },
6468 clobbers: 65519,
6469 },
6470 },
6471 {
6472 name: "CALLinter",
6473 auxType: auxCallOff,
6474 argLen: 2,
6475 clobberFlags: true,
6476 call: true,
6477 reg: regInfo{
6478 inputs: []inputInfo{
6479 {0, 239},
6480 },
6481 clobbers: 65519,
6482 },
6483 },
6484 {
6485 name: "DUFFCOPY",
6486 auxType: auxInt64,
6487 argLen: 3,
6488 clobberFlags: true,
6489 faultOnNilArg0: true,
6490 faultOnNilArg1: true,
6491 reg: regInfo{
6492 inputs: []inputInfo{
6493 {0, 128},
6494 {1, 64},
6495 },
6496 clobbers: 194,
6497 },
6498 },
6499 {
6500 name: "REPMOVSL",
6501 argLen: 4,
6502 faultOnNilArg0: true,
6503 faultOnNilArg1: true,
6504 reg: regInfo{
6505 inputs: []inputInfo{
6506 {0, 128},
6507 {1, 64},
6508 {2, 2},
6509 },
6510 clobbers: 194,
6511 },
6512 },
6513 {
6514 name: "InvertFlags",
6515 argLen: 1,
6516 reg: regInfo{},
6517 },
6518 {
6519 name: "LoweredGetG",
6520 argLen: 1,
6521 reg: regInfo{
6522 outputs: []outputInfo{
6523 {0, 239},
6524 },
6525 },
6526 },
6527 {
6528 name: "LoweredGetClosurePtr",
6529 argLen: 0,
6530 zeroWidth: true,
6531 reg: regInfo{
6532 outputs: []outputInfo{
6533 {0, 4},
6534 },
6535 },
6536 },
6537 {
6538 name: "LoweredGetCallerPC",
6539 argLen: 0,
6540 rematerializeable: true,
6541 reg: regInfo{
6542 outputs: []outputInfo{
6543 {0, 239},
6544 },
6545 },
6546 },
6547 {
6548 name: "LoweredGetCallerSP",
6549 argLen: 1,
6550 rematerializeable: true,
6551 reg: regInfo{
6552 outputs: []outputInfo{
6553 {0, 239},
6554 },
6555 },
6556 },
6557 {
6558 name: "LoweredNilCheck",
6559 argLen: 2,
6560 clobberFlags: true,
6561 nilCheck: true,
6562 faultOnNilArg0: true,
6563 reg: regInfo{
6564 inputs: []inputInfo{
6565 {0, 255},
6566 },
6567 },
6568 },
6569 {
6570 name: "LoweredWB",
6571 auxType: auxInt64,
6572 argLen: 1,
6573 clobberFlags: true,
6574 reg: regInfo{
6575 clobbers: 65280,
6576 outputs: []outputInfo{
6577 {0, 128},
6578 },
6579 },
6580 },
6581 {
6582 name: "LoweredPanicBoundsRR",
6583 auxType: auxInt64,
6584 argLen: 3,
6585 call: true,
6586 reg: regInfo{
6587 inputs: []inputInfo{
6588 {0, 239},
6589 {1, 239},
6590 },
6591 },
6592 },
6593 {
6594 name: "LoweredPanicBoundsRC",
6595 auxType: auxPanicBoundsC,
6596 argLen: 2,
6597 call: true,
6598 reg: regInfo{
6599 inputs: []inputInfo{
6600 {0, 239},
6601 },
6602 },
6603 },
6604 {
6605 name: "LoweredPanicBoundsCR",
6606 auxType: auxPanicBoundsC,
6607 argLen: 2,
6608 call: true,
6609 reg: regInfo{
6610 inputs: []inputInfo{
6611 {0, 239},
6612 },
6613 },
6614 },
6615 {
6616 name: "LoweredPanicBoundsCC",
6617 auxType: auxPanicBoundsCC,
6618 argLen: 1,
6619 call: true,
6620 reg: regInfo{},
6621 },
6622 {
6623 name: "LoweredPanicExtendRR",
6624 auxType: auxInt64,
6625 argLen: 4,
6626 call: true,
6627 reg: regInfo{
6628 inputs: []inputInfo{
6629 {0, 15},
6630 {1, 15},
6631 {2, 239},
6632 },
6633 },
6634 },
6635 {
6636 name: "LoweredPanicExtendRC",
6637 auxType: auxPanicBoundsC,
6638 argLen: 3,
6639 call: true,
6640 reg: regInfo{
6641 inputs: []inputInfo{
6642 {0, 15},
6643 {1, 15},
6644 },
6645 },
6646 },
6647 {
6648 name: "FlagEQ",
6649 argLen: 0,
6650 reg: regInfo{},
6651 },
6652 {
6653 name: "FlagLT_ULT",
6654 argLen: 0,
6655 reg: regInfo{},
6656 },
6657 {
6658 name: "FlagLT_UGT",
6659 argLen: 0,
6660 reg: regInfo{},
6661 },
6662 {
6663 name: "FlagGT_UGT",
6664 argLen: 0,
6665 reg: regInfo{},
6666 },
6667 {
6668 name: "FlagGT_ULT",
6669 argLen: 0,
6670 reg: regInfo{},
6671 },
6672 {
6673 name: "MOVSSconst1",
6674 auxType: auxFloat32,
6675 argLen: 0,
6676 reg: regInfo{
6677 outputs: []outputInfo{
6678 {0, 239},
6679 },
6680 },
6681 },
6682 {
6683 name: "MOVSDconst1",
6684 auxType: auxFloat64,
6685 argLen: 0,
6686 reg: regInfo{
6687 outputs: []outputInfo{
6688 {0, 239},
6689 },
6690 },
6691 },
6692 {
6693 name: "MOVSSconst2",
6694 argLen: 1,
6695 asm: x86.AMOVSS,
6696 reg: regInfo{
6697 inputs: []inputInfo{
6698 {0, 239},
6699 },
6700 outputs: []outputInfo{
6701 {0, 65280},
6702 },
6703 },
6704 },
6705 {
6706 name: "MOVSDconst2",
6707 argLen: 1,
6708 asm: x86.AMOVSD,
6709 reg: regInfo{
6710 inputs: []inputInfo{
6711 {0, 239},
6712 },
6713 outputs: []outputInfo{
6714 {0, 65280},
6715 },
6716 },
6717 },
6718
6719 {
6720 name: "ADDSS",
6721 argLen: 2,
6722 commutative: true,
6723 resultInArg0: true,
6724 asm: x86.AADDSS,
6725 reg: regInfo{
6726 inputs: []inputInfo{
6727 {0, 2147418112},
6728 {1, 2147418112},
6729 },
6730 outputs: []outputInfo{
6731 {0, 2147418112},
6732 },
6733 },
6734 },
6735 {
6736 name: "ADDSD",
6737 argLen: 2,
6738 commutative: true,
6739 resultInArg0: true,
6740 asm: x86.AADDSD,
6741 reg: regInfo{
6742 inputs: []inputInfo{
6743 {0, 2147418112},
6744 {1, 2147418112},
6745 },
6746 outputs: []outputInfo{
6747 {0, 2147418112},
6748 },
6749 },
6750 },
6751 {
6752 name: "SUBSS",
6753 argLen: 2,
6754 resultInArg0: true,
6755 asm: x86.ASUBSS,
6756 reg: regInfo{
6757 inputs: []inputInfo{
6758 {0, 2147418112},
6759 {1, 2147418112},
6760 },
6761 outputs: []outputInfo{
6762 {0, 2147418112},
6763 },
6764 },
6765 },
6766 {
6767 name: "SUBSD",
6768 argLen: 2,
6769 resultInArg0: true,
6770 asm: x86.ASUBSD,
6771 reg: regInfo{
6772 inputs: []inputInfo{
6773 {0, 2147418112},
6774 {1, 2147418112},
6775 },
6776 outputs: []outputInfo{
6777 {0, 2147418112},
6778 },
6779 },
6780 },
6781 {
6782 name: "MULSS",
6783 argLen: 2,
6784 commutative: true,
6785 resultInArg0: true,
6786 asm: x86.AMULSS,
6787 reg: regInfo{
6788 inputs: []inputInfo{
6789 {0, 2147418112},
6790 {1, 2147418112},
6791 },
6792 outputs: []outputInfo{
6793 {0, 2147418112},
6794 },
6795 },
6796 },
6797 {
6798 name: "MULSD",
6799 argLen: 2,
6800 commutative: true,
6801 resultInArg0: true,
6802 asm: x86.AMULSD,
6803 reg: regInfo{
6804 inputs: []inputInfo{
6805 {0, 2147418112},
6806 {1, 2147418112},
6807 },
6808 outputs: []outputInfo{
6809 {0, 2147418112},
6810 },
6811 },
6812 },
6813 {
6814 name: "DIVSS",
6815 argLen: 2,
6816 resultInArg0: true,
6817 asm: x86.ADIVSS,
6818 reg: regInfo{
6819 inputs: []inputInfo{
6820 {0, 2147418112},
6821 {1, 2147418112},
6822 },
6823 outputs: []outputInfo{
6824 {0, 2147418112},
6825 },
6826 },
6827 },
6828 {
6829 name: "DIVSD",
6830 argLen: 2,
6831 resultInArg0: true,
6832 asm: x86.ADIVSD,
6833 reg: regInfo{
6834 inputs: []inputInfo{
6835 {0, 2147418112},
6836 {1, 2147418112},
6837 },
6838 outputs: []outputInfo{
6839 {0, 2147418112},
6840 },
6841 },
6842 },
6843 {
6844 name: "MOVSSload",
6845 auxType: auxSymOff,
6846 argLen: 2,
6847 faultOnNilArg0: true,
6848 symEffect: SymRead,
6849 asm: x86.AMOVSS,
6850 reg: regInfo{
6851 inputs: []inputInfo{
6852 {0, 4295016447},
6853 },
6854 outputs: []outputInfo{
6855 {0, 2147418112},
6856 },
6857 },
6858 },
6859 {
6860 name: "MOVSDload",
6861 auxType: auxSymOff,
6862 argLen: 2,
6863 faultOnNilArg0: true,
6864 symEffect: SymRead,
6865 asm: x86.AMOVSD,
6866 reg: regInfo{
6867 inputs: []inputInfo{
6868 {0, 4295016447},
6869 },
6870 outputs: []outputInfo{
6871 {0, 2147418112},
6872 },
6873 },
6874 },
6875 {
6876 name: "MOVSSconst",
6877 auxType: auxFloat32,
6878 argLen: 0,
6879 rematerializeable: true,
6880 asm: x86.AMOVSS,
6881 reg: regInfo{
6882 outputs: []outputInfo{
6883 {0, 2147418112},
6884 },
6885 },
6886 },
6887 {
6888 name: "MOVSDconst",
6889 auxType: auxFloat64,
6890 argLen: 0,
6891 rematerializeable: true,
6892 asm: x86.AMOVSD,
6893 reg: regInfo{
6894 outputs: []outputInfo{
6895 {0, 2147418112},
6896 },
6897 },
6898 },
6899 {
6900 name: "MOVSSloadidx1",
6901 auxType: auxSymOff,
6902 argLen: 3,
6903 symEffect: SymRead,
6904 asm: x86.AMOVSS,
6905 scale: 1,
6906 reg: regInfo{
6907 inputs: []inputInfo{
6908 {1, 49151},
6909 {0, 4295016447},
6910 },
6911 outputs: []outputInfo{
6912 {0, 2147418112},
6913 },
6914 },
6915 },
6916 {
6917 name: "MOVSSloadidx4",
6918 auxType: auxSymOff,
6919 argLen: 3,
6920 symEffect: SymRead,
6921 asm: x86.AMOVSS,
6922 scale: 4,
6923 reg: regInfo{
6924 inputs: []inputInfo{
6925 {1, 49151},
6926 {0, 4295016447},
6927 },
6928 outputs: []outputInfo{
6929 {0, 2147418112},
6930 },
6931 },
6932 },
6933 {
6934 name: "MOVSDloadidx1",
6935 auxType: auxSymOff,
6936 argLen: 3,
6937 symEffect: SymRead,
6938 asm: x86.AMOVSD,
6939 scale: 1,
6940 reg: regInfo{
6941 inputs: []inputInfo{
6942 {1, 49151},
6943 {0, 4295016447},
6944 },
6945 outputs: []outputInfo{
6946 {0, 2147418112},
6947 },
6948 },
6949 },
6950 {
6951 name: "MOVSDloadidx8",
6952 auxType: auxSymOff,
6953 argLen: 3,
6954 symEffect: SymRead,
6955 asm: x86.AMOVSD,
6956 scale: 8,
6957 reg: regInfo{
6958 inputs: []inputInfo{
6959 {1, 49151},
6960 {0, 4295016447},
6961 },
6962 outputs: []outputInfo{
6963 {0, 2147418112},
6964 },
6965 },
6966 },
6967 {
6968 name: "MOVSSstore",
6969 auxType: auxSymOff,
6970 argLen: 3,
6971 faultOnNilArg0: true,
6972 symEffect: SymWrite,
6973 asm: x86.AMOVSS,
6974 reg: regInfo{
6975 inputs: []inputInfo{
6976 {1, 2147418112},
6977 {0, 4295016447},
6978 },
6979 },
6980 },
6981 {
6982 name: "MOVSDstore",
6983 auxType: auxSymOff,
6984 argLen: 3,
6985 faultOnNilArg0: true,
6986 symEffect: SymWrite,
6987 asm: x86.AMOVSD,
6988 reg: regInfo{
6989 inputs: []inputInfo{
6990 {1, 2147418112},
6991 {0, 4295016447},
6992 },
6993 },
6994 },
6995 {
6996 name: "MOVSSstoreidx1",
6997 auxType: auxSymOff,
6998 argLen: 4,
6999 symEffect: SymWrite,
7000 asm: x86.AMOVSS,
7001 scale: 1,
7002 reg: regInfo{
7003 inputs: []inputInfo{
7004 {1, 49151},
7005 {2, 2147418112},
7006 {0, 4295016447},
7007 },
7008 },
7009 },
7010 {
7011 name: "MOVSSstoreidx4",
7012 auxType: auxSymOff,
7013 argLen: 4,
7014 symEffect: SymWrite,
7015 asm: x86.AMOVSS,
7016 scale: 4,
7017 reg: regInfo{
7018 inputs: []inputInfo{
7019 {1, 49151},
7020 {2, 2147418112},
7021 {0, 4295016447},
7022 },
7023 },
7024 },
7025 {
7026 name: "MOVSDstoreidx1",
7027 auxType: auxSymOff,
7028 argLen: 4,
7029 symEffect: SymWrite,
7030 asm: x86.AMOVSD,
7031 scale: 1,
7032 reg: regInfo{
7033 inputs: []inputInfo{
7034 {1, 49151},
7035 {2, 2147418112},
7036 {0, 4295016447},
7037 },
7038 },
7039 },
7040 {
7041 name: "MOVSDstoreidx8",
7042 auxType: auxSymOff,
7043 argLen: 4,
7044 symEffect: SymWrite,
7045 asm: x86.AMOVSD,
7046 scale: 8,
7047 reg: regInfo{
7048 inputs: []inputInfo{
7049 {1, 49151},
7050 {2, 2147418112},
7051 {0, 4295016447},
7052 },
7053 },
7054 },
7055 {
7056 name: "ADDSSload",
7057 auxType: auxSymOff,
7058 argLen: 3,
7059 resultInArg0: true,
7060 faultOnNilArg1: true,
7061 symEffect: SymRead,
7062 asm: x86.AADDSS,
7063 reg: regInfo{
7064 inputs: []inputInfo{
7065 {0, 2147418112},
7066 {1, 4295032831},
7067 },
7068 outputs: []outputInfo{
7069 {0, 2147418112},
7070 },
7071 },
7072 },
7073 {
7074 name: "ADDSDload",
7075 auxType: auxSymOff,
7076 argLen: 3,
7077 resultInArg0: true,
7078 faultOnNilArg1: true,
7079 symEffect: SymRead,
7080 asm: x86.AADDSD,
7081 reg: regInfo{
7082 inputs: []inputInfo{
7083 {0, 2147418112},
7084 {1, 4295032831},
7085 },
7086 outputs: []outputInfo{
7087 {0, 2147418112},
7088 },
7089 },
7090 },
7091 {
7092 name: "SUBSSload",
7093 auxType: auxSymOff,
7094 argLen: 3,
7095 resultInArg0: true,
7096 faultOnNilArg1: true,
7097 symEffect: SymRead,
7098 asm: x86.ASUBSS,
7099 reg: regInfo{
7100 inputs: []inputInfo{
7101 {0, 2147418112},
7102 {1, 4295032831},
7103 },
7104 outputs: []outputInfo{
7105 {0, 2147418112},
7106 },
7107 },
7108 },
7109 {
7110 name: "SUBSDload",
7111 auxType: auxSymOff,
7112 argLen: 3,
7113 resultInArg0: true,
7114 faultOnNilArg1: true,
7115 symEffect: SymRead,
7116 asm: x86.ASUBSD,
7117 reg: regInfo{
7118 inputs: []inputInfo{
7119 {0, 2147418112},
7120 {1, 4295032831},
7121 },
7122 outputs: []outputInfo{
7123 {0, 2147418112},
7124 },
7125 },
7126 },
7127 {
7128 name: "MULSSload",
7129 auxType: auxSymOff,
7130 argLen: 3,
7131 resultInArg0: true,
7132 faultOnNilArg1: true,
7133 symEffect: SymRead,
7134 asm: x86.AMULSS,
7135 reg: regInfo{
7136 inputs: []inputInfo{
7137 {0, 2147418112},
7138 {1, 4295032831},
7139 },
7140 outputs: []outputInfo{
7141 {0, 2147418112},
7142 },
7143 },
7144 },
7145 {
7146 name: "MULSDload",
7147 auxType: auxSymOff,
7148 argLen: 3,
7149 resultInArg0: true,
7150 faultOnNilArg1: true,
7151 symEffect: SymRead,
7152 asm: x86.AMULSD,
7153 reg: regInfo{
7154 inputs: []inputInfo{
7155 {0, 2147418112},
7156 {1, 4295032831},
7157 },
7158 outputs: []outputInfo{
7159 {0, 2147418112},
7160 },
7161 },
7162 },
7163 {
7164 name: "DIVSSload",
7165 auxType: auxSymOff,
7166 argLen: 3,
7167 resultInArg0: true,
7168 faultOnNilArg1: true,
7169 symEffect: SymRead,
7170 asm: x86.ADIVSS,
7171 reg: regInfo{
7172 inputs: []inputInfo{
7173 {0, 2147418112},
7174 {1, 4295032831},
7175 },
7176 outputs: []outputInfo{
7177 {0, 2147418112},
7178 },
7179 },
7180 },
7181 {
7182 name: "DIVSDload",
7183 auxType: auxSymOff,
7184 argLen: 3,
7185 resultInArg0: true,
7186 faultOnNilArg1: true,
7187 symEffect: SymRead,
7188 asm: x86.ADIVSD,
7189 reg: regInfo{
7190 inputs: []inputInfo{
7191 {0, 2147418112},
7192 {1, 4295032831},
7193 },
7194 outputs: []outputInfo{
7195 {0, 2147418112},
7196 },
7197 },
7198 },
7199 {
7200 name: "ADDSSloadidx1",
7201 auxType: auxSymOff,
7202 argLen: 4,
7203 resultInArg0: true,
7204 symEffect: SymRead,
7205 asm: x86.AADDSS,
7206 scale: 1,
7207 reg: regInfo{
7208 inputs: []inputInfo{
7209 {0, 2147418112},
7210 {2, 4295016447},
7211 {1, 4295032831},
7212 },
7213 outputs: []outputInfo{
7214 {0, 2147418112},
7215 },
7216 },
7217 },
7218 {
7219 name: "ADDSSloadidx4",
7220 auxType: auxSymOff,
7221 argLen: 4,
7222 resultInArg0: true,
7223 symEffect: SymRead,
7224 asm: x86.AADDSS,
7225 scale: 4,
7226 reg: regInfo{
7227 inputs: []inputInfo{
7228 {0, 2147418112},
7229 {2, 4295016447},
7230 {1, 4295032831},
7231 },
7232 outputs: []outputInfo{
7233 {0, 2147418112},
7234 },
7235 },
7236 },
7237 {
7238 name: "ADDSDloadidx1",
7239 auxType: auxSymOff,
7240 argLen: 4,
7241 resultInArg0: true,
7242 symEffect: SymRead,
7243 asm: x86.AADDSD,
7244 scale: 1,
7245 reg: regInfo{
7246 inputs: []inputInfo{
7247 {0, 2147418112},
7248 {2, 4295016447},
7249 {1, 4295032831},
7250 },
7251 outputs: []outputInfo{
7252 {0, 2147418112},
7253 },
7254 },
7255 },
7256 {
7257 name: "ADDSDloadidx8",
7258 auxType: auxSymOff,
7259 argLen: 4,
7260 resultInArg0: true,
7261 symEffect: SymRead,
7262 asm: x86.AADDSD,
7263 scale: 8,
7264 reg: regInfo{
7265 inputs: []inputInfo{
7266 {0, 2147418112},
7267 {2, 4295016447},
7268 {1, 4295032831},
7269 },
7270 outputs: []outputInfo{
7271 {0, 2147418112},
7272 },
7273 },
7274 },
7275 {
7276 name: "SUBSSloadidx1",
7277 auxType: auxSymOff,
7278 argLen: 4,
7279 resultInArg0: true,
7280 symEffect: SymRead,
7281 asm: x86.ASUBSS,
7282 scale: 1,
7283 reg: regInfo{
7284 inputs: []inputInfo{
7285 {0, 2147418112},
7286 {2, 4295016447},
7287 {1, 4295032831},
7288 },
7289 outputs: []outputInfo{
7290 {0, 2147418112},
7291 },
7292 },
7293 },
7294 {
7295 name: "SUBSSloadidx4",
7296 auxType: auxSymOff,
7297 argLen: 4,
7298 resultInArg0: true,
7299 symEffect: SymRead,
7300 asm: x86.ASUBSS,
7301 scale: 4,
7302 reg: regInfo{
7303 inputs: []inputInfo{
7304 {0, 2147418112},
7305 {2, 4295016447},
7306 {1, 4295032831},
7307 },
7308 outputs: []outputInfo{
7309 {0, 2147418112},
7310 },
7311 },
7312 },
7313 {
7314 name: "SUBSDloadidx1",
7315 auxType: auxSymOff,
7316 argLen: 4,
7317 resultInArg0: true,
7318 symEffect: SymRead,
7319 asm: x86.ASUBSD,
7320 scale: 1,
7321 reg: regInfo{
7322 inputs: []inputInfo{
7323 {0, 2147418112},
7324 {2, 4295016447},
7325 {1, 4295032831},
7326 },
7327 outputs: []outputInfo{
7328 {0, 2147418112},
7329 },
7330 },
7331 },
7332 {
7333 name: "SUBSDloadidx8",
7334 auxType: auxSymOff,
7335 argLen: 4,
7336 resultInArg0: true,
7337 symEffect: SymRead,
7338 asm: x86.ASUBSD,
7339 scale: 8,
7340 reg: regInfo{
7341 inputs: []inputInfo{
7342 {0, 2147418112},
7343 {2, 4295016447},
7344 {1, 4295032831},
7345 },
7346 outputs: []outputInfo{
7347 {0, 2147418112},
7348 },
7349 },
7350 },
7351 {
7352 name: "MULSSloadidx1",
7353 auxType: auxSymOff,
7354 argLen: 4,
7355 resultInArg0: true,
7356 symEffect: SymRead,
7357 asm: x86.AMULSS,
7358 scale: 1,
7359 reg: regInfo{
7360 inputs: []inputInfo{
7361 {0, 2147418112},
7362 {2, 4295016447},
7363 {1, 4295032831},
7364 },
7365 outputs: []outputInfo{
7366 {0, 2147418112},
7367 },
7368 },
7369 },
7370 {
7371 name: "MULSSloadidx4",
7372 auxType: auxSymOff,
7373 argLen: 4,
7374 resultInArg0: true,
7375 symEffect: SymRead,
7376 asm: x86.AMULSS,
7377 scale: 4,
7378 reg: regInfo{
7379 inputs: []inputInfo{
7380 {0, 2147418112},
7381 {2, 4295016447},
7382 {1, 4295032831},
7383 },
7384 outputs: []outputInfo{
7385 {0, 2147418112},
7386 },
7387 },
7388 },
7389 {
7390 name: "MULSDloadidx1",
7391 auxType: auxSymOff,
7392 argLen: 4,
7393 resultInArg0: true,
7394 symEffect: SymRead,
7395 asm: x86.AMULSD,
7396 scale: 1,
7397 reg: regInfo{
7398 inputs: []inputInfo{
7399 {0, 2147418112},
7400 {2, 4295016447},
7401 {1, 4295032831},
7402 },
7403 outputs: []outputInfo{
7404 {0, 2147418112},
7405 },
7406 },
7407 },
7408 {
7409 name: "MULSDloadidx8",
7410 auxType: auxSymOff,
7411 argLen: 4,
7412 resultInArg0: true,
7413 symEffect: SymRead,
7414 asm: x86.AMULSD,
7415 scale: 8,
7416 reg: regInfo{
7417 inputs: []inputInfo{
7418 {0, 2147418112},
7419 {2, 4295016447},
7420 {1, 4295032831},
7421 },
7422 outputs: []outputInfo{
7423 {0, 2147418112},
7424 },
7425 },
7426 },
7427 {
7428 name: "DIVSSloadidx1",
7429 auxType: auxSymOff,
7430 argLen: 4,
7431 resultInArg0: true,
7432 symEffect: SymRead,
7433 asm: x86.ADIVSS,
7434 scale: 1,
7435 reg: regInfo{
7436 inputs: []inputInfo{
7437 {0, 2147418112},
7438 {2, 4295016447},
7439 {1, 4295032831},
7440 },
7441 outputs: []outputInfo{
7442 {0, 2147418112},
7443 },
7444 },
7445 },
7446 {
7447 name: "DIVSSloadidx4",
7448 auxType: auxSymOff,
7449 argLen: 4,
7450 resultInArg0: true,
7451 symEffect: SymRead,
7452 asm: x86.ADIVSS,
7453 scale: 4,
7454 reg: regInfo{
7455 inputs: []inputInfo{
7456 {0, 2147418112},
7457 {2, 4295016447},
7458 {1, 4295032831},
7459 },
7460 outputs: []outputInfo{
7461 {0, 2147418112},
7462 },
7463 },
7464 },
7465 {
7466 name: "DIVSDloadidx1",
7467 auxType: auxSymOff,
7468 argLen: 4,
7469 resultInArg0: true,
7470 symEffect: SymRead,
7471 asm: x86.ADIVSD,
7472 scale: 1,
7473 reg: regInfo{
7474 inputs: []inputInfo{
7475 {0, 2147418112},
7476 {2, 4295016447},
7477 {1, 4295032831},
7478 },
7479 outputs: []outputInfo{
7480 {0, 2147418112},
7481 },
7482 },
7483 },
7484 {
7485 name: "DIVSDloadidx8",
7486 auxType: auxSymOff,
7487 argLen: 4,
7488 resultInArg0: true,
7489 symEffect: SymRead,
7490 asm: x86.ADIVSD,
7491 scale: 8,
7492 reg: regInfo{
7493 inputs: []inputInfo{
7494 {0, 2147418112},
7495 {2, 4295016447},
7496 {1, 4295032831},
7497 },
7498 outputs: []outputInfo{
7499 {0, 2147418112},
7500 },
7501 },
7502 },
7503 {
7504 name: "ADDQ",
7505 argLen: 2,
7506 commutative: true,
7507 clobberFlags: true,
7508 asm: x86.AADDQ,
7509 reg: regInfo{
7510 inputs: []inputInfo{
7511 {1, 49135},
7512 {0, 49151},
7513 },
7514 outputs: []outputInfo{
7515 {0, 49135},
7516 },
7517 },
7518 },
7519 {
7520 name: "ADDL",
7521 argLen: 2,
7522 commutative: true,
7523 clobberFlags: true,
7524 asm: x86.AADDL,
7525 reg: regInfo{
7526 inputs: []inputInfo{
7527 {1, 49135},
7528 {0, 49151},
7529 },
7530 outputs: []outputInfo{
7531 {0, 49135},
7532 },
7533 },
7534 },
7535 {
7536 name: "ADDQconst",
7537 auxType: auxInt32,
7538 argLen: 1,
7539 clobberFlags: true,
7540 asm: x86.AADDQ,
7541 reg: regInfo{
7542 inputs: []inputInfo{
7543 {0, 49151},
7544 },
7545 outputs: []outputInfo{
7546 {0, 49135},
7547 },
7548 },
7549 },
7550 {
7551 name: "ADDLconst",
7552 auxType: auxInt32,
7553 argLen: 1,
7554 clobberFlags: true,
7555 asm: x86.AADDL,
7556 reg: regInfo{
7557 inputs: []inputInfo{
7558 {0, 49151},
7559 },
7560 outputs: []outputInfo{
7561 {0, 49135},
7562 },
7563 },
7564 },
7565 {
7566 name: "ADDQconstmodify",
7567 auxType: auxSymValAndOff,
7568 argLen: 2,
7569 clobberFlags: true,
7570 faultOnNilArg0: true,
7571 symEffect: SymRead | SymWrite,
7572 asm: x86.AADDQ,
7573 reg: regInfo{
7574 inputs: []inputInfo{
7575 {0, 4295032831},
7576 },
7577 },
7578 },
7579 {
7580 name: "ADDLconstmodify",
7581 auxType: auxSymValAndOff,
7582 argLen: 2,
7583 clobberFlags: true,
7584 faultOnNilArg0: true,
7585 symEffect: SymRead | SymWrite,
7586 asm: x86.AADDL,
7587 reg: regInfo{
7588 inputs: []inputInfo{
7589 {0, 4295032831},
7590 },
7591 },
7592 },
7593 {
7594 name: "SUBQ",
7595 argLen: 2,
7596 resultInArg0: true,
7597 clobberFlags: true,
7598 asm: x86.ASUBQ,
7599 reg: regInfo{
7600 inputs: []inputInfo{
7601 {0, 49135},
7602 {1, 49135},
7603 },
7604 outputs: []outputInfo{
7605 {0, 49135},
7606 },
7607 },
7608 },
7609 {
7610 name: "SUBL",
7611 argLen: 2,
7612 resultInArg0: true,
7613 clobberFlags: true,
7614 asm: x86.ASUBL,
7615 reg: regInfo{
7616 inputs: []inputInfo{
7617 {0, 49135},
7618 {1, 49135},
7619 },
7620 outputs: []outputInfo{
7621 {0, 49135},
7622 },
7623 },
7624 },
7625 {
7626 name: "SUBQconst",
7627 auxType: auxInt32,
7628 argLen: 1,
7629 resultInArg0: true,
7630 clobberFlags: true,
7631 asm: x86.ASUBQ,
7632 reg: regInfo{
7633 inputs: []inputInfo{
7634 {0, 49135},
7635 },
7636 outputs: []outputInfo{
7637 {0, 49135},
7638 },
7639 },
7640 },
7641 {
7642 name: "SUBLconst",
7643 auxType: auxInt32,
7644 argLen: 1,
7645 resultInArg0: true,
7646 clobberFlags: true,
7647 asm: x86.ASUBL,
7648 reg: regInfo{
7649 inputs: []inputInfo{
7650 {0, 49135},
7651 },
7652 outputs: []outputInfo{
7653 {0, 49135},
7654 },
7655 },
7656 },
7657 {
7658 name: "MULQ",
7659 argLen: 2,
7660 commutative: true,
7661 resultInArg0: true,
7662 clobberFlags: true,
7663 asm: x86.AIMULQ,
7664 reg: regInfo{
7665 inputs: []inputInfo{
7666 {0, 49135},
7667 {1, 49135},
7668 },
7669 outputs: []outputInfo{
7670 {0, 49135},
7671 },
7672 },
7673 },
7674 {
7675 name: "MULL",
7676 argLen: 2,
7677 commutative: true,
7678 resultInArg0: true,
7679 clobberFlags: true,
7680 asm: x86.AIMULL,
7681 reg: regInfo{
7682 inputs: []inputInfo{
7683 {0, 49135},
7684 {1, 49135},
7685 },
7686 outputs: []outputInfo{
7687 {0, 49135},
7688 },
7689 },
7690 },
7691 {
7692 name: "MULQconst",
7693 auxType: auxInt32,
7694 argLen: 1,
7695 clobberFlags: true,
7696 asm: x86.AIMUL3Q,
7697 reg: regInfo{
7698 inputs: []inputInfo{
7699 {0, 49135},
7700 },
7701 outputs: []outputInfo{
7702 {0, 49135},
7703 },
7704 },
7705 },
7706 {
7707 name: "MULLconst",
7708 auxType: auxInt32,
7709 argLen: 1,
7710 clobberFlags: true,
7711 asm: x86.AIMUL3L,
7712 reg: regInfo{
7713 inputs: []inputInfo{
7714 {0, 49135},
7715 },
7716 outputs: []outputInfo{
7717 {0, 49135},
7718 },
7719 },
7720 },
7721 {
7722 name: "MULLU",
7723 argLen: 2,
7724 commutative: true,
7725 clobberFlags: true,
7726 asm: x86.AMULL,
7727 reg: regInfo{
7728 inputs: []inputInfo{
7729 {0, 1},
7730 {1, 49151},
7731 },
7732 clobbers: 4,
7733 outputs: []outputInfo{
7734 {1, 0},
7735 {0, 1},
7736 },
7737 },
7738 },
7739 {
7740 name: "MULQU",
7741 argLen: 2,
7742 commutative: true,
7743 clobberFlags: true,
7744 asm: x86.AMULQ,
7745 reg: regInfo{
7746 inputs: []inputInfo{
7747 {0, 1},
7748 {1, 49151},
7749 },
7750 clobbers: 4,
7751 outputs: []outputInfo{
7752 {1, 0},
7753 {0, 1},
7754 },
7755 },
7756 },
7757 {
7758 name: "HMULQ",
7759 argLen: 2,
7760 clobberFlags: true,
7761 asm: x86.AIMULQ,
7762 reg: regInfo{
7763 inputs: []inputInfo{
7764 {0, 1},
7765 {1, 49151},
7766 },
7767 clobbers: 1,
7768 outputs: []outputInfo{
7769 {0, 4},
7770 },
7771 },
7772 },
7773 {
7774 name: "HMULL",
7775 argLen: 2,
7776 clobberFlags: true,
7777 asm: x86.AIMULL,
7778 reg: regInfo{
7779 inputs: []inputInfo{
7780 {0, 1},
7781 {1, 49151},
7782 },
7783 clobbers: 1,
7784 outputs: []outputInfo{
7785 {0, 4},
7786 },
7787 },
7788 },
7789 {
7790 name: "HMULQU",
7791 argLen: 2,
7792 clobberFlags: true,
7793 asm: x86.AMULQ,
7794 reg: regInfo{
7795 inputs: []inputInfo{
7796 {0, 1},
7797 {1, 49151},
7798 },
7799 clobbers: 1,
7800 outputs: []outputInfo{
7801 {0, 4},
7802 },
7803 },
7804 },
7805 {
7806 name: "HMULLU",
7807 argLen: 2,
7808 clobberFlags: true,
7809 asm: x86.AMULL,
7810 reg: regInfo{
7811 inputs: []inputInfo{
7812 {0, 1},
7813 {1, 49151},
7814 },
7815 clobbers: 1,
7816 outputs: []outputInfo{
7817 {0, 4},
7818 },
7819 },
7820 },
7821 {
7822 name: "AVGQU",
7823 argLen: 2,
7824 commutative: true,
7825 resultInArg0: true,
7826 clobberFlags: true,
7827 reg: regInfo{
7828 inputs: []inputInfo{
7829 {0, 49135},
7830 {1, 49135},
7831 },
7832 outputs: []outputInfo{
7833 {0, 49135},
7834 },
7835 },
7836 },
7837 {
7838 name: "DIVQ",
7839 auxType: auxBool,
7840 argLen: 2,
7841 clobberFlags: true,
7842 asm: x86.AIDIVQ,
7843 reg: regInfo{
7844 inputs: []inputInfo{
7845 {0, 1},
7846 {1, 49147},
7847 },
7848 outputs: []outputInfo{
7849 {0, 1},
7850 {1, 4},
7851 },
7852 },
7853 },
7854 {
7855 name: "DIVL",
7856 auxType: auxBool,
7857 argLen: 2,
7858 clobberFlags: true,
7859 asm: x86.AIDIVL,
7860 reg: regInfo{
7861 inputs: []inputInfo{
7862 {0, 1},
7863 {1, 49147},
7864 },
7865 outputs: []outputInfo{
7866 {0, 1},
7867 {1, 4},
7868 },
7869 },
7870 },
7871 {
7872 name: "DIVW",
7873 auxType: auxBool,
7874 argLen: 2,
7875 clobberFlags: true,
7876 asm: x86.AIDIVW,
7877 reg: regInfo{
7878 inputs: []inputInfo{
7879 {0, 1},
7880 {1, 49147},
7881 },
7882 outputs: []outputInfo{
7883 {0, 1},
7884 {1, 4},
7885 },
7886 },
7887 },
7888 {
7889 name: "DIVQU",
7890 argLen: 2,
7891 clobberFlags: true,
7892 asm: x86.ADIVQ,
7893 reg: regInfo{
7894 inputs: []inputInfo{
7895 {0, 1},
7896 {1, 49147},
7897 },
7898 outputs: []outputInfo{
7899 {0, 1},
7900 {1, 4},
7901 },
7902 },
7903 },
7904 {
7905 name: "DIVLU",
7906 argLen: 2,
7907 clobberFlags: true,
7908 asm: x86.ADIVL,
7909 reg: regInfo{
7910 inputs: []inputInfo{
7911 {0, 1},
7912 {1, 49147},
7913 },
7914 outputs: []outputInfo{
7915 {0, 1},
7916 {1, 4},
7917 },
7918 },
7919 },
7920 {
7921 name: "DIVWU",
7922 argLen: 2,
7923 clobberFlags: true,
7924 asm: x86.ADIVW,
7925 reg: regInfo{
7926 inputs: []inputInfo{
7927 {0, 1},
7928 {1, 49147},
7929 },
7930 outputs: []outputInfo{
7931 {0, 1},
7932 {1, 4},
7933 },
7934 },
7935 },
7936 {
7937 name: "NEGLflags",
7938 argLen: 1,
7939 resultInArg0: true,
7940 asm: x86.ANEGL,
7941 reg: regInfo{
7942 inputs: []inputInfo{
7943 {0, 49135},
7944 },
7945 outputs: []outputInfo{
7946 {1, 0},
7947 {0, 49135},
7948 },
7949 },
7950 },
7951 {
7952 name: "ADDQconstflags",
7953 auxType: auxInt32,
7954 argLen: 1,
7955 resultInArg0: true,
7956 asm: x86.AADDQ,
7957 reg: regInfo{
7958 inputs: []inputInfo{
7959 {0, 49135},
7960 },
7961 outputs: []outputInfo{
7962 {1, 0},
7963 {0, 49135},
7964 },
7965 },
7966 },
7967 {
7968 name: "ADDLconstflags",
7969 auxType: auxInt32,
7970 argLen: 1,
7971 resultInArg0: true,
7972 asm: x86.AADDL,
7973 reg: regInfo{
7974 inputs: []inputInfo{
7975 {0, 49135},
7976 },
7977 outputs: []outputInfo{
7978 {1, 0},
7979 {0, 49135},
7980 },
7981 },
7982 },
7983 {
7984 name: "ADDQcarry",
7985 argLen: 2,
7986 commutative: true,
7987 resultInArg0: true,
7988 asm: x86.AADDQ,
7989 reg: regInfo{
7990 inputs: []inputInfo{
7991 {0, 49135},
7992 {1, 49135},
7993 },
7994 outputs: []outputInfo{
7995 {1, 0},
7996 {0, 49135},
7997 },
7998 },
7999 },
8000 {
8001 name: "ADCQ",
8002 argLen: 3,
8003 commutative: true,
8004 resultInArg0: true,
8005 asm: x86.AADCQ,
8006 reg: regInfo{
8007 inputs: []inputInfo{
8008 {0, 49135},
8009 {1, 49135},
8010 },
8011 outputs: []outputInfo{
8012 {1, 0},
8013 {0, 49135},
8014 },
8015 },
8016 },
8017 {
8018 name: "ADDQconstcarry",
8019 auxType: auxInt32,
8020 argLen: 1,
8021 resultInArg0: true,
8022 asm: x86.AADDQ,
8023 reg: regInfo{
8024 inputs: []inputInfo{
8025 {0, 49135},
8026 },
8027 outputs: []outputInfo{
8028 {1, 0},
8029 {0, 49135},
8030 },
8031 },
8032 },
8033 {
8034 name: "ADCQconst",
8035 auxType: auxInt32,
8036 argLen: 2,
8037 resultInArg0: true,
8038 asm: x86.AADCQ,
8039 reg: regInfo{
8040 inputs: []inputInfo{
8041 {0, 49135},
8042 },
8043 outputs: []outputInfo{
8044 {1, 0},
8045 {0, 49135},
8046 },
8047 },
8048 },
8049 {
8050 name: "SUBQborrow",
8051 argLen: 2,
8052 resultInArg0: true,
8053 asm: x86.ASUBQ,
8054 reg: regInfo{
8055 inputs: []inputInfo{
8056 {0, 49135},
8057 {1, 49135},
8058 },
8059 outputs: []outputInfo{
8060 {1, 0},
8061 {0, 49135},
8062 },
8063 },
8064 },
8065 {
8066 name: "SBBQ",
8067 argLen: 3,
8068 resultInArg0: true,
8069 asm: x86.ASBBQ,
8070 reg: regInfo{
8071 inputs: []inputInfo{
8072 {0, 49135},
8073 {1, 49135},
8074 },
8075 outputs: []outputInfo{
8076 {1, 0},
8077 {0, 49135},
8078 },
8079 },
8080 },
8081 {
8082 name: "SUBQconstborrow",
8083 auxType: auxInt32,
8084 argLen: 1,
8085 resultInArg0: true,
8086 asm: x86.ASUBQ,
8087 reg: regInfo{
8088 inputs: []inputInfo{
8089 {0, 49135},
8090 },
8091 outputs: []outputInfo{
8092 {1, 0},
8093 {0, 49135},
8094 },
8095 },
8096 },
8097 {
8098 name: "SBBQconst",
8099 auxType: auxInt32,
8100 argLen: 2,
8101 resultInArg0: true,
8102 asm: x86.ASBBQ,
8103 reg: regInfo{
8104 inputs: []inputInfo{
8105 {0, 49135},
8106 },
8107 outputs: []outputInfo{
8108 {1, 0},
8109 {0, 49135},
8110 },
8111 },
8112 },
8113 {
8114 name: "MULQU2",
8115 argLen: 2,
8116 commutative: true,
8117 clobberFlags: true,
8118 asm: x86.AMULQ,
8119 reg: regInfo{
8120 inputs: []inputInfo{
8121 {0, 1},
8122 {1, 49151},
8123 },
8124 outputs: []outputInfo{
8125 {0, 4},
8126 {1, 1},
8127 },
8128 },
8129 },
8130 {
8131 name: "DIVQU2",
8132 argLen: 3,
8133 clobberFlags: true,
8134 asm: x86.ADIVQ,
8135 reg: regInfo{
8136 inputs: []inputInfo{
8137 {0, 4},
8138 {1, 1},
8139 {2, 49151},
8140 },
8141 outputs: []outputInfo{
8142 {0, 1},
8143 {1, 4},
8144 },
8145 },
8146 },
8147 {
8148 name: "ANDQ",
8149 argLen: 2,
8150 commutative: true,
8151 resultInArg0: true,
8152 clobberFlags: true,
8153 asm: x86.AANDQ,
8154 reg: regInfo{
8155 inputs: []inputInfo{
8156 {0, 49135},
8157 {1, 49135},
8158 },
8159 outputs: []outputInfo{
8160 {0, 49135},
8161 },
8162 },
8163 },
8164 {
8165 name: "ANDL",
8166 argLen: 2,
8167 commutative: true,
8168 resultInArg0: true,
8169 clobberFlags: true,
8170 asm: x86.AANDL,
8171 reg: regInfo{
8172 inputs: []inputInfo{
8173 {0, 49135},
8174 {1, 49135},
8175 },
8176 outputs: []outputInfo{
8177 {0, 49135},
8178 },
8179 },
8180 },
8181 {
8182 name: "ANDQconst",
8183 auxType: auxInt32,
8184 argLen: 1,
8185 resultInArg0: true,
8186 clobberFlags: true,
8187 asm: x86.AANDQ,
8188 reg: regInfo{
8189 inputs: []inputInfo{
8190 {0, 49135},
8191 },
8192 outputs: []outputInfo{
8193 {0, 49135},
8194 },
8195 },
8196 },
8197 {
8198 name: "ANDLconst",
8199 auxType: auxInt32,
8200 argLen: 1,
8201 resultInArg0: true,
8202 clobberFlags: true,
8203 asm: x86.AANDL,
8204 reg: regInfo{
8205 inputs: []inputInfo{
8206 {0, 49135},
8207 },
8208 outputs: []outputInfo{
8209 {0, 49135},
8210 },
8211 },
8212 },
8213 {
8214 name: "ANDQconstmodify",
8215 auxType: auxSymValAndOff,
8216 argLen: 2,
8217 clobberFlags: true,
8218 faultOnNilArg0: true,
8219 symEffect: SymRead | SymWrite,
8220 asm: x86.AANDQ,
8221 reg: regInfo{
8222 inputs: []inputInfo{
8223 {0, 4295032831},
8224 },
8225 },
8226 },
8227 {
8228 name: "ANDLconstmodify",
8229 auxType: auxSymValAndOff,
8230 argLen: 2,
8231 clobberFlags: true,
8232 faultOnNilArg0: true,
8233 symEffect: SymRead | SymWrite,
8234 asm: x86.AANDL,
8235 reg: regInfo{
8236 inputs: []inputInfo{
8237 {0, 4295032831},
8238 },
8239 },
8240 },
8241 {
8242 name: "ORQ",
8243 argLen: 2,
8244 commutative: true,
8245 resultInArg0: true,
8246 clobberFlags: true,
8247 asm: x86.AORQ,
8248 reg: regInfo{
8249 inputs: []inputInfo{
8250 {0, 49135},
8251 {1, 49135},
8252 },
8253 outputs: []outputInfo{
8254 {0, 49135},
8255 },
8256 },
8257 },
8258 {
8259 name: "ORL",
8260 argLen: 2,
8261 commutative: true,
8262 resultInArg0: true,
8263 clobberFlags: true,
8264 asm: x86.AORL,
8265 reg: regInfo{
8266 inputs: []inputInfo{
8267 {0, 49135},
8268 {1, 49135},
8269 },
8270 outputs: []outputInfo{
8271 {0, 49135},
8272 },
8273 },
8274 },
8275 {
8276 name: "ORQconst",
8277 auxType: auxInt32,
8278 argLen: 1,
8279 resultInArg0: true,
8280 clobberFlags: true,
8281 asm: x86.AORQ,
8282 reg: regInfo{
8283 inputs: []inputInfo{
8284 {0, 49135},
8285 },
8286 outputs: []outputInfo{
8287 {0, 49135},
8288 },
8289 },
8290 },
8291 {
8292 name: "ORLconst",
8293 auxType: auxInt32,
8294 argLen: 1,
8295 resultInArg0: true,
8296 clobberFlags: true,
8297 asm: x86.AORL,
8298 reg: regInfo{
8299 inputs: []inputInfo{
8300 {0, 49135},
8301 },
8302 outputs: []outputInfo{
8303 {0, 49135},
8304 },
8305 },
8306 },
8307 {
8308 name: "ORQconstmodify",
8309 auxType: auxSymValAndOff,
8310 argLen: 2,
8311 clobberFlags: true,
8312 faultOnNilArg0: true,
8313 symEffect: SymRead | SymWrite,
8314 asm: x86.AORQ,
8315 reg: regInfo{
8316 inputs: []inputInfo{
8317 {0, 4295032831},
8318 },
8319 },
8320 },
8321 {
8322 name: "ORLconstmodify",
8323 auxType: auxSymValAndOff,
8324 argLen: 2,
8325 clobberFlags: true,
8326 faultOnNilArg0: true,
8327 symEffect: SymRead | SymWrite,
8328 asm: x86.AORL,
8329 reg: regInfo{
8330 inputs: []inputInfo{
8331 {0, 4295032831},
8332 },
8333 },
8334 },
8335 {
8336 name: "XORQ",
8337 argLen: 2,
8338 commutative: true,
8339 resultInArg0: true,
8340 clobberFlags: true,
8341 asm: x86.AXORQ,
8342 reg: regInfo{
8343 inputs: []inputInfo{
8344 {0, 49135},
8345 {1, 49135},
8346 },
8347 outputs: []outputInfo{
8348 {0, 49135},
8349 },
8350 },
8351 },
8352 {
8353 name: "XORL",
8354 argLen: 2,
8355 commutative: true,
8356 resultInArg0: true,
8357 clobberFlags: true,
8358 asm: x86.AXORL,
8359 reg: regInfo{
8360 inputs: []inputInfo{
8361 {0, 49135},
8362 {1, 49135},
8363 },
8364 outputs: []outputInfo{
8365 {0, 49135},
8366 },
8367 },
8368 },
8369 {
8370 name: "XORQconst",
8371 auxType: auxInt32,
8372 argLen: 1,
8373 resultInArg0: true,
8374 clobberFlags: true,
8375 asm: x86.AXORQ,
8376 reg: regInfo{
8377 inputs: []inputInfo{
8378 {0, 49135},
8379 },
8380 outputs: []outputInfo{
8381 {0, 49135},
8382 },
8383 },
8384 },
8385 {
8386 name: "XORLconst",
8387 auxType: auxInt32,
8388 argLen: 1,
8389 resultInArg0: true,
8390 clobberFlags: true,
8391 asm: x86.AXORL,
8392 reg: regInfo{
8393 inputs: []inputInfo{
8394 {0, 49135},
8395 },
8396 outputs: []outputInfo{
8397 {0, 49135},
8398 },
8399 },
8400 },
8401 {
8402 name: "XORQconstmodify",
8403 auxType: auxSymValAndOff,
8404 argLen: 2,
8405 clobberFlags: true,
8406 faultOnNilArg0: true,
8407 symEffect: SymRead | SymWrite,
8408 asm: x86.AXORQ,
8409 reg: regInfo{
8410 inputs: []inputInfo{
8411 {0, 4295032831},
8412 },
8413 },
8414 },
8415 {
8416 name: "XORLconstmodify",
8417 auxType: auxSymValAndOff,
8418 argLen: 2,
8419 clobberFlags: true,
8420 faultOnNilArg0: true,
8421 symEffect: SymRead | SymWrite,
8422 asm: x86.AXORL,
8423 reg: regInfo{
8424 inputs: []inputInfo{
8425 {0, 4295032831},
8426 },
8427 },
8428 },
8429 {
8430 name: "CMPQ",
8431 argLen: 2,
8432 asm: x86.ACMPQ,
8433 reg: regInfo{
8434 inputs: []inputInfo{
8435 {0, 49151},
8436 {1, 49151},
8437 },
8438 },
8439 },
8440 {
8441 name: "CMPL",
8442 argLen: 2,
8443 asm: x86.ACMPL,
8444 reg: regInfo{
8445 inputs: []inputInfo{
8446 {0, 49151},
8447 {1, 49151},
8448 },
8449 },
8450 },
8451 {
8452 name: "CMPW",
8453 argLen: 2,
8454 asm: x86.ACMPW,
8455 reg: regInfo{
8456 inputs: []inputInfo{
8457 {0, 49151},
8458 {1, 49151},
8459 },
8460 },
8461 },
8462 {
8463 name: "CMPB",
8464 argLen: 2,
8465 asm: x86.ACMPB,
8466 reg: regInfo{
8467 inputs: []inputInfo{
8468 {0, 49151},
8469 {1, 49151},
8470 },
8471 },
8472 },
8473 {
8474 name: "CMPQconst",
8475 auxType: auxInt32,
8476 argLen: 1,
8477 asm: x86.ACMPQ,
8478 reg: regInfo{
8479 inputs: []inputInfo{
8480 {0, 49151},
8481 },
8482 },
8483 },
8484 {
8485 name: "CMPLconst",
8486 auxType: auxInt32,
8487 argLen: 1,
8488 asm: x86.ACMPL,
8489 reg: regInfo{
8490 inputs: []inputInfo{
8491 {0, 49151},
8492 },
8493 },
8494 },
8495 {
8496 name: "CMPWconst",
8497 auxType: auxInt16,
8498 argLen: 1,
8499 asm: x86.ACMPW,
8500 reg: regInfo{
8501 inputs: []inputInfo{
8502 {0, 49151},
8503 },
8504 },
8505 },
8506 {
8507 name: "CMPBconst",
8508 auxType: auxInt8,
8509 argLen: 1,
8510 asm: x86.ACMPB,
8511 reg: regInfo{
8512 inputs: []inputInfo{
8513 {0, 49151},
8514 },
8515 },
8516 },
8517 {
8518 name: "CMPQload",
8519 auxType: auxSymOff,
8520 argLen: 3,
8521 faultOnNilArg0: true,
8522 symEffect: SymRead,
8523 asm: x86.ACMPQ,
8524 reg: regInfo{
8525 inputs: []inputInfo{
8526 {1, 49151},
8527 {0, 4295032831},
8528 },
8529 },
8530 },
8531 {
8532 name: "CMPLload",
8533 auxType: auxSymOff,
8534 argLen: 3,
8535 faultOnNilArg0: true,
8536 symEffect: SymRead,
8537 asm: x86.ACMPL,
8538 reg: regInfo{
8539 inputs: []inputInfo{
8540 {1, 49151},
8541 {0, 4295032831},
8542 },
8543 },
8544 },
8545 {
8546 name: "CMPWload",
8547 auxType: auxSymOff,
8548 argLen: 3,
8549 faultOnNilArg0: true,
8550 symEffect: SymRead,
8551 asm: x86.ACMPW,
8552 reg: regInfo{
8553 inputs: []inputInfo{
8554 {1, 49151},
8555 {0, 4295032831},
8556 },
8557 },
8558 },
8559 {
8560 name: "CMPBload",
8561 auxType: auxSymOff,
8562 argLen: 3,
8563 faultOnNilArg0: true,
8564 symEffect: SymRead,
8565 asm: x86.ACMPB,
8566 reg: regInfo{
8567 inputs: []inputInfo{
8568 {1, 49151},
8569 {0, 4295032831},
8570 },
8571 },
8572 },
8573 {
8574 name: "CMPQconstload",
8575 auxType: auxSymValAndOff,
8576 argLen: 2,
8577 faultOnNilArg0: true,
8578 symEffect: SymRead,
8579 asm: x86.ACMPQ,
8580 reg: regInfo{
8581 inputs: []inputInfo{
8582 {0, 4295032831},
8583 },
8584 },
8585 },
8586 {
8587 name: "CMPLconstload",
8588 auxType: auxSymValAndOff,
8589 argLen: 2,
8590 faultOnNilArg0: true,
8591 symEffect: SymRead,
8592 asm: x86.ACMPL,
8593 reg: regInfo{
8594 inputs: []inputInfo{
8595 {0, 4295032831},
8596 },
8597 },
8598 },
8599 {
8600 name: "CMPWconstload",
8601 auxType: auxSymValAndOff,
8602 argLen: 2,
8603 faultOnNilArg0: true,
8604 symEffect: SymRead,
8605 asm: x86.ACMPW,
8606 reg: regInfo{
8607 inputs: []inputInfo{
8608 {0, 4295032831},
8609 },
8610 },
8611 },
8612 {
8613 name: "CMPBconstload",
8614 auxType: auxSymValAndOff,
8615 argLen: 2,
8616 faultOnNilArg0: true,
8617 symEffect: SymRead,
8618 asm: x86.ACMPB,
8619 reg: regInfo{
8620 inputs: []inputInfo{
8621 {0, 4295032831},
8622 },
8623 },
8624 },
8625 {
8626 name: "CMPQloadidx8",
8627 auxType: auxSymOff,
8628 argLen: 4,
8629 symEffect: SymRead,
8630 asm: x86.ACMPQ,
8631 scale: 8,
8632 reg: regInfo{
8633 inputs: []inputInfo{
8634 {1, 49151},
8635 {2, 49151},
8636 {0, 4295032831},
8637 },
8638 },
8639 },
8640 {
8641 name: "CMPQloadidx1",
8642 auxType: auxSymOff,
8643 argLen: 4,
8644 commutative: true,
8645 symEffect: SymRead,
8646 asm: x86.ACMPQ,
8647 scale: 1,
8648 reg: regInfo{
8649 inputs: []inputInfo{
8650 {1, 49151},
8651 {2, 49151},
8652 {0, 4295032831},
8653 },
8654 },
8655 },
8656 {
8657 name: "CMPLloadidx4",
8658 auxType: auxSymOff,
8659 argLen: 4,
8660 symEffect: SymRead,
8661 asm: x86.ACMPL,
8662 scale: 4,
8663 reg: regInfo{
8664 inputs: []inputInfo{
8665 {1, 49151},
8666 {2, 49151},
8667 {0, 4295032831},
8668 },
8669 },
8670 },
8671 {
8672 name: "CMPLloadidx1",
8673 auxType: auxSymOff,
8674 argLen: 4,
8675 commutative: true,
8676 symEffect: SymRead,
8677 asm: x86.ACMPL,
8678 scale: 1,
8679 reg: regInfo{
8680 inputs: []inputInfo{
8681 {1, 49151},
8682 {2, 49151},
8683 {0, 4295032831},
8684 },
8685 },
8686 },
8687 {
8688 name: "CMPWloadidx2",
8689 auxType: auxSymOff,
8690 argLen: 4,
8691 symEffect: SymRead,
8692 asm: x86.ACMPW,
8693 scale: 2,
8694 reg: regInfo{
8695 inputs: []inputInfo{
8696 {1, 49151},
8697 {2, 49151},
8698 {0, 4295032831},
8699 },
8700 },
8701 },
8702 {
8703 name: "CMPWloadidx1",
8704 auxType: auxSymOff,
8705 argLen: 4,
8706 commutative: true,
8707 symEffect: SymRead,
8708 asm: x86.ACMPW,
8709 scale: 1,
8710 reg: regInfo{
8711 inputs: []inputInfo{
8712 {1, 49151},
8713 {2, 49151},
8714 {0, 4295032831},
8715 },
8716 },
8717 },
8718 {
8719 name: "CMPBloadidx1",
8720 auxType: auxSymOff,
8721 argLen: 4,
8722 commutative: true,
8723 symEffect: SymRead,
8724 asm: x86.ACMPB,
8725 scale: 1,
8726 reg: regInfo{
8727 inputs: []inputInfo{
8728 {1, 49151},
8729 {2, 49151},
8730 {0, 4295032831},
8731 },
8732 },
8733 },
8734 {
8735 name: "CMPQconstloadidx8",
8736 auxType: auxSymValAndOff,
8737 argLen: 3,
8738 symEffect: SymRead,
8739 asm: x86.ACMPQ,
8740 scale: 8,
8741 reg: regInfo{
8742 inputs: []inputInfo{
8743 {1, 49151},
8744 {0, 4295032831},
8745 },
8746 },
8747 },
8748 {
8749 name: "CMPQconstloadidx1",
8750 auxType: auxSymValAndOff,
8751 argLen: 3,
8752 commutative: true,
8753 symEffect: SymRead,
8754 asm: x86.ACMPQ,
8755 scale: 1,
8756 reg: regInfo{
8757 inputs: []inputInfo{
8758 {1, 49151},
8759 {0, 4295032831},
8760 },
8761 },
8762 },
8763 {
8764 name: "CMPLconstloadidx4",
8765 auxType: auxSymValAndOff,
8766 argLen: 3,
8767 symEffect: SymRead,
8768 asm: x86.ACMPL,
8769 scale: 4,
8770 reg: regInfo{
8771 inputs: []inputInfo{
8772 {1, 49151},
8773 {0, 4295032831},
8774 },
8775 },
8776 },
8777 {
8778 name: "CMPLconstloadidx1",
8779 auxType: auxSymValAndOff,
8780 argLen: 3,
8781 commutative: true,
8782 symEffect: SymRead,
8783 asm: x86.ACMPL,
8784 scale: 1,
8785 reg: regInfo{
8786 inputs: []inputInfo{
8787 {1, 49151},
8788 {0, 4295032831},
8789 },
8790 },
8791 },
8792 {
8793 name: "CMPWconstloadidx2",
8794 auxType: auxSymValAndOff,
8795 argLen: 3,
8796 symEffect: SymRead,
8797 asm: x86.ACMPW,
8798 scale: 2,
8799 reg: regInfo{
8800 inputs: []inputInfo{
8801 {1, 49151},
8802 {0, 4295032831},
8803 },
8804 },
8805 },
8806 {
8807 name: "CMPWconstloadidx1",
8808 auxType: auxSymValAndOff,
8809 argLen: 3,
8810 commutative: true,
8811 symEffect: SymRead,
8812 asm: x86.ACMPW,
8813 scale: 1,
8814 reg: regInfo{
8815 inputs: []inputInfo{
8816 {1, 49151},
8817 {0, 4295032831},
8818 },
8819 },
8820 },
8821 {
8822 name: "CMPBconstloadidx1",
8823 auxType: auxSymValAndOff,
8824 argLen: 3,
8825 commutative: true,
8826 symEffect: SymRead,
8827 asm: x86.ACMPB,
8828 scale: 1,
8829 reg: regInfo{
8830 inputs: []inputInfo{
8831 {1, 49151},
8832 {0, 4295032831},
8833 },
8834 },
8835 },
8836 {
8837 name: "UCOMISS",
8838 argLen: 2,
8839 asm: x86.AUCOMISS,
8840 reg: regInfo{
8841 inputs: []inputInfo{
8842 {0, 2147418112},
8843 {1, 2147418112},
8844 },
8845 },
8846 },
8847 {
8848 name: "UCOMISD",
8849 argLen: 2,
8850 asm: x86.AUCOMISD,
8851 reg: regInfo{
8852 inputs: []inputInfo{
8853 {0, 2147418112},
8854 {1, 2147418112},
8855 },
8856 },
8857 },
8858 {
8859 name: "BTL",
8860 argLen: 2,
8861 asm: x86.ABTL,
8862 reg: regInfo{
8863 inputs: []inputInfo{
8864 {0, 49151},
8865 {1, 49151},
8866 },
8867 },
8868 },
8869 {
8870 name: "BTQ",
8871 argLen: 2,
8872 asm: x86.ABTQ,
8873 reg: regInfo{
8874 inputs: []inputInfo{
8875 {0, 49151},
8876 {1, 49151},
8877 },
8878 },
8879 },
8880 {
8881 name: "BTCL",
8882 argLen: 2,
8883 resultInArg0: true,
8884 clobberFlags: true,
8885 asm: x86.ABTCL,
8886 reg: regInfo{
8887 inputs: []inputInfo{
8888 {0, 49135},
8889 {1, 49135},
8890 },
8891 outputs: []outputInfo{
8892 {0, 49135},
8893 },
8894 },
8895 },
8896 {
8897 name: "BTCQ",
8898 argLen: 2,
8899 resultInArg0: true,
8900 clobberFlags: true,
8901 asm: x86.ABTCQ,
8902 reg: regInfo{
8903 inputs: []inputInfo{
8904 {0, 49135},
8905 {1, 49135},
8906 },
8907 outputs: []outputInfo{
8908 {0, 49135},
8909 },
8910 },
8911 },
8912 {
8913 name: "BTRL",
8914 argLen: 2,
8915 resultInArg0: true,
8916 clobberFlags: true,
8917 asm: x86.ABTRL,
8918 reg: regInfo{
8919 inputs: []inputInfo{
8920 {0, 49135},
8921 {1, 49135},
8922 },
8923 outputs: []outputInfo{
8924 {0, 49135},
8925 },
8926 },
8927 },
8928 {
8929 name: "BTRQ",
8930 argLen: 2,
8931 resultInArg0: true,
8932 clobberFlags: true,
8933 asm: x86.ABTRQ,
8934 reg: regInfo{
8935 inputs: []inputInfo{
8936 {0, 49135},
8937 {1, 49135},
8938 },
8939 outputs: []outputInfo{
8940 {0, 49135},
8941 },
8942 },
8943 },
8944 {
8945 name: "BTSL",
8946 argLen: 2,
8947 resultInArg0: true,
8948 clobberFlags: true,
8949 asm: x86.ABTSL,
8950 reg: regInfo{
8951 inputs: []inputInfo{
8952 {0, 49135},
8953 {1, 49135},
8954 },
8955 outputs: []outputInfo{
8956 {0, 49135},
8957 },
8958 },
8959 },
8960 {
8961 name: "BTSQ",
8962 argLen: 2,
8963 resultInArg0: true,
8964 clobberFlags: true,
8965 asm: x86.ABTSQ,
8966 reg: regInfo{
8967 inputs: []inputInfo{
8968 {0, 49135},
8969 {1, 49135},
8970 },
8971 outputs: []outputInfo{
8972 {0, 49135},
8973 },
8974 },
8975 },
8976 {
8977 name: "BTLconst",
8978 auxType: auxInt8,
8979 argLen: 1,
8980 asm: x86.ABTL,
8981 reg: regInfo{
8982 inputs: []inputInfo{
8983 {0, 49151},
8984 },
8985 },
8986 },
8987 {
8988 name: "BTQconst",
8989 auxType: auxInt8,
8990 argLen: 1,
8991 asm: x86.ABTQ,
8992 reg: regInfo{
8993 inputs: []inputInfo{
8994 {0, 49151},
8995 },
8996 },
8997 },
8998 {
8999 name: "BTCQconst",
9000 auxType: auxInt8,
9001 argLen: 1,
9002 resultInArg0: true,
9003 clobberFlags: true,
9004 asm: x86.ABTCQ,
9005 reg: regInfo{
9006 inputs: []inputInfo{
9007 {0, 49135},
9008 },
9009 outputs: []outputInfo{
9010 {0, 49135},
9011 },
9012 },
9013 },
9014 {
9015 name: "BTRQconst",
9016 auxType: auxInt8,
9017 argLen: 1,
9018 resultInArg0: true,
9019 clobberFlags: true,
9020 asm: x86.ABTRQ,
9021 reg: regInfo{
9022 inputs: []inputInfo{
9023 {0, 49135},
9024 },
9025 outputs: []outputInfo{
9026 {0, 49135},
9027 },
9028 },
9029 },
9030 {
9031 name: "BTSQconst",
9032 auxType: auxInt8,
9033 argLen: 1,
9034 resultInArg0: true,
9035 clobberFlags: true,
9036 asm: x86.ABTSQ,
9037 reg: regInfo{
9038 inputs: []inputInfo{
9039 {0, 49135},
9040 },
9041 outputs: []outputInfo{
9042 {0, 49135},
9043 },
9044 },
9045 },
9046 {
9047 name: "BTSQconstmodify",
9048 auxType: auxSymValAndOff,
9049 argLen: 2,
9050 clobberFlags: true,
9051 faultOnNilArg0: true,
9052 symEffect: SymRead | SymWrite,
9053 asm: x86.ABTSQ,
9054 reg: regInfo{
9055 inputs: []inputInfo{
9056 {0, 4295032831},
9057 },
9058 },
9059 },
9060 {
9061 name: "BTRQconstmodify",
9062 auxType: auxSymValAndOff,
9063 argLen: 2,
9064 clobberFlags: true,
9065 faultOnNilArg0: true,
9066 symEffect: SymRead | SymWrite,
9067 asm: x86.ABTRQ,
9068 reg: regInfo{
9069 inputs: []inputInfo{
9070 {0, 4295032831},
9071 },
9072 },
9073 },
9074 {
9075 name: "BTCQconstmodify",
9076 auxType: auxSymValAndOff,
9077 argLen: 2,
9078 clobberFlags: true,
9079 faultOnNilArg0: true,
9080 symEffect: SymRead | SymWrite,
9081 asm: x86.ABTCQ,
9082 reg: regInfo{
9083 inputs: []inputInfo{
9084 {0, 4295032831},
9085 },
9086 },
9087 },
9088 {
9089 name: "TESTQ",
9090 argLen: 2,
9091 commutative: true,
9092 asm: x86.ATESTQ,
9093 reg: regInfo{
9094 inputs: []inputInfo{
9095 {0, 49151},
9096 {1, 49151},
9097 },
9098 },
9099 },
9100 {
9101 name: "TESTL",
9102 argLen: 2,
9103 commutative: true,
9104 asm: x86.ATESTL,
9105 reg: regInfo{
9106 inputs: []inputInfo{
9107 {0, 49151},
9108 {1, 49151},
9109 },
9110 },
9111 },
9112 {
9113 name: "TESTW",
9114 argLen: 2,
9115 commutative: true,
9116 asm: x86.ATESTW,
9117 reg: regInfo{
9118 inputs: []inputInfo{
9119 {0, 49151},
9120 {1, 49151},
9121 },
9122 },
9123 },
9124 {
9125 name: "TESTB",
9126 argLen: 2,
9127 commutative: true,
9128 asm: x86.ATESTB,
9129 reg: regInfo{
9130 inputs: []inputInfo{
9131 {0, 49151},
9132 {1, 49151},
9133 },
9134 },
9135 },
9136 {
9137 name: "TESTQconst",
9138 auxType: auxInt32,
9139 argLen: 1,
9140 asm: x86.ATESTQ,
9141 reg: regInfo{
9142 inputs: []inputInfo{
9143 {0, 49151},
9144 },
9145 },
9146 },
9147 {
9148 name: "TESTLconst",
9149 auxType: auxInt32,
9150 argLen: 1,
9151 asm: x86.ATESTL,
9152 reg: regInfo{
9153 inputs: []inputInfo{
9154 {0, 49151},
9155 },
9156 },
9157 },
9158 {
9159 name: "TESTWconst",
9160 auxType: auxInt16,
9161 argLen: 1,
9162 asm: x86.ATESTW,
9163 reg: regInfo{
9164 inputs: []inputInfo{
9165 {0, 49151},
9166 },
9167 },
9168 },
9169 {
9170 name: "TESTBconst",
9171 auxType: auxInt8,
9172 argLen: 1,
9173 asm: x86.ATESTB,
9174 reg: regInfo{
9175 inputs: []inputInfo{
9176 {0, 49151},
9177 },
9178 },
9179 },
9180 {
9181 name: "SHLQ",
9182 argLen: 2,
9183 resultInArg0: true,
9184 clobberFlags: true,
9185 asm: x86.ASHLQ,
9186 reg: regInfo{
9187 inputs: []inputInfo{
9188 {1, 2},
9189 {0, 49135},
9190 },
9191 outputs: []outputInfo{
9192 {0, 49135},
9193 },
9194 },
9195 },
9196 {
9197 name: "SHLL",
9198 argLen: 2,
9199 resultInArg0: true,
9200 clobberFlags: true,
9201 asm: x86.ASHLL,
9202 reg: regInfo{
9203 inputs: []inputInfo{
9204 {1, 2},
9205 {0, 49135},
9206 },
9207 outputs: []outputInfo{
9208 {0, 49135},
9209 },
9210 },
9211 },
9212 {
9213 name: "SHLQconst",
9214 auxType: auxInt8,
9215 argLen: 1,
9216 resultInArg0: true,
9217 clobberFlags: true,
9218 asm: x86.ASHLQ,
9219 reg: regInfo{
9220 inputs: []inputInfo{
9221 {0, 49135},
9222 },
9223 outputs: []outputInfo{
9224 {0, 49135},
9225 },
9226 },
9227 },
9228 {
9229 name: "SHLLconst",
9230 auxType: auxInt8,
9231 argLen: 1,
9232 resultInArg0: true,
9233 clobberFlags: true,
9234 asm: x86.ASHLL,
9235 reg: regInfo{
9236 inputs: []inputInfo{
9237 {0, 49135},
9238 },
9239 outputs: []outputInfo{
9240 {0, 49135},
9241 },
9242 },
9243 },
9244 {
9245 name: "SHRQ",
9246 argLen: 2,
9247 resultInArg0: true,
9248 clobberFlags: true,
9249 asm: x86.ASHRQ,
9250 reg: regInfo{
9251 inputs: []inputInfo{
9252 {1, 2},
9253 {0, 49135},
9254 },
9255 outputs: []outputInfo{
9256 {0, 49135},
9257 },
9258 },
9259 },
9260 {
9261 name: "SHRL",
9262 argLen: 2,
9263 resultInArg0: true,
9264 clobberFlags: true,
9265 asm: x86.ASHRL,
9266 reg: regInfo{
9267 inputs: []inputInfo{
9268 {1, 2},
9269 {0, 49135},
9270 },
9271 outputs: []outputInfo{
9272 {0, 49135},
9273 },
9274 },
9275 },
9276 {
9277 name: "SHRW",
9278 argLen: 2,
9279 resultInArg0: true,
9280 clobberFlags: true,
9281 asm: x86.ASHRW,
9282 reg: regInfo{
9283 inputs: []inputInfo{
9284 {1, 2},
9285 {0, 49135},
9286 },
9287 outputs: []outputInfo{
9288 {0, 49135},
9289 },
9290 },
9291 },
9292 {
9293 name: "SHRB",
9294 argLen: 2,
9295 resultInArg0: true,
9296 clobberFlags: true,
9297 asm: x86.ASHRB,
9298 reg: regInfo{
9299 inputs: []inputInfo{
9300 {1, 2},
9301 {0, 49135},
9302 },
9303 outputs: []outputInfo{
9304 {0, 49135},
9305 },
9306 },
9307 },
9308 {
9309 name: "SHRQconst",
9310 auxType: auxInt8,
9311 argLen: 1,
9312 resultInArg0: true,
9313 clobberFlags: true,
9314 asm: x86.ASHRQ,
9315 reg: regInfo{
9316 inputs: []inputInfo{
9317 {0, 49135},
9318 },
9319 outputs: []outputInfo{
9320 {0, 49135},
9321 },
9322 },
9323 },
9324 {
9325 name: "SHRLconst",
9326 auxType: auxInt8,
9327 argLen: 1,
9328 resultInArg0: true,
9329 clobberFlags: true,
9330 asm: x86.ASHRL,
9331 reg: regInfo{
9332 inputs: []inputInfo{
9333 {0, 49135},
9334 },
9335 outputs: []outputInfo{
9336 {0, 49135},
9337 },
9338 },
9339 },
9340 {
9341 name: "SHRWconst",
9342 auxType: auxInt8,
9343 argLen: 1,
9344 resultInArg0: true,
9345 clobberFlags: true,
9346 asm: x86.ASHRW,
9347 reg: regInfo{
9348 inputs: []inputInfo{
9349 {0, 49135},
9350 },
9351 outputs: []outputInfo{
9352 {0, 49135},
9353 },
9354 },
9355 },
9356 {
9357 name: "SHRBconst",
9358 auxType: auxInt8,
9359 argLen: 1,
9360 resultInArg0: true,
9361 clobberFlags: true,
9362 asm: x86.ASHRB,
9363 reg: regInfo{
9364 inputs: []inputInfo{
9365 {0, 49135},
9366 },
9367 outputs: []outputInfo{
9368 {0, 49135},
9369 },
9370 },
9371 },
9372 {
9373 name: "SARQ",
9374 argLen: 2,
9375 resultInArg0: true,
9376 clobberFlags: true,
9377 asm: x86.ASARQ,
9378 reg: regInfo{
9379 inputs: []inputInfo{
9380 {1, 2},
9381 {0, 49135},
9382 },
9383 outputs: []outputInfo{
9384 {0, 49135},
9385 },
9386 },
9387 },
9388 {
9389 name: "SARL",
9390 argLen: 2,
9391 resultInArg0: true,
9392 clobberFlags: true,
9393 asm: x86.ASARL,
9394 reg: regInfo{
9395 inputs: []inputInfo{
9396 {1, 2},
9397 {0, 49135},
9398 },
9399 outputs: []outputInfo{
9400 {0, 49135},
9401 },
9402 },
9403 },
9404 {
9405 name: "SARW",
9406 argLen: 2,
9407 resultInArg0: true,
9408 clobberFlags: true,
9409 asm: x86.ASARW,
9410 reg: regInfo{
9411 inputs: []inputInfo{
9412 {1, 2},
9413 {0, 49135},
9414 },
9415 outputs: []outputInfo{
9416 {0, 49135},
9417 },
9418 },
9419 },
9420 {
9421 name: "SARB",
9422 argLen: 2,
9423 resultInArg0: true,
9424 clobberFlags: true,
9425 asm: x86.ASARB,
9426 reg: regInfo{
9427 inputs: []inputInfo{
9428 {1, 2},
9429 {0, 49135},
9430 },
9431 outputs: []outputInfo{
9432 {0, 49135},
9433 },
9434 },
9435 },
9436 {
9437 name: "SARQconst",
9438 auxType: auxInt8,
9439 argLen: 1,
9440 resultInArg0: true,
9441 clobberFlags: true,
9442 asm: x86.ASARQ,
9443 reg: regInfo{
9444 inputs: []inputInfo{
9445 {0, 49135},
9446 },
9447 outputs: []outputInfo{
9448 {0, 49135},
9449 },
9450 },
9451 },
9452 {
9453 name: "SARLconst",
9454 auxType: auxInt8,
9455 argLen: 1,
9456 resultInArg0: true,
9457 clobberFlags: true,
9458 asm: x86.ASARL,
9459 reg: regInfo{
9460 inputs: []inputInfo{
9461 {0, 49135},
9462 },
9463 outputs: []outputInfo{
9464 {0, 49135},
9465 },
9466 },
9467 },
9468 {
9469 name: "SARWconst",
9470 auxType: auxInt8,
9471 argLen: 1,
9472 resultInArg0: true,
9473 clobberFlags: true,
9474 asm: x86.ASARW,
9475 reg: regInfo{
9476 inputs: []inputInfo{
9477 {0, 49135},
9478 },
9479 outputs: []outputInfo{
9480 {0, 49135},
9481 },
9482 },
9483 },
9484 {
9485 name: "SARBconst",
9486 auxType: auxInt8,
9487 argLen: 1,
9488 resultInArg0: true,
9489 clobberFlags: true,
9490 asm: x86.ASARB,
9491 reg: regInfo{
9492 inputs: []inputInfo{
9493 {0, 49135},
9494 },
9495 outputs: []outputInfo{
9496 {0, 49135},
9497 },
9498 },
9499 },
9500 {
9501 name: "SHRDQ",
9502 argLen: 3,
9503 resultInArg0: true,
9504 clobberFlags: true,
9505 asm: x86.ASHRQ,
9506 reg: regInfo{
9507 inputs: []inputInfo{
9508 {2, 2},
9509 {0, 49135},
9510 {1, 49135},
9511 },
9512 outputs: []outputInfo{
9513 {0, 49135},
9514 },
9515 },
9516 },
9517 {
9518 name: "SHLDQ",
9519 argLen: 3,
9520 resultInArg0: true,
9521 clobberFlags: true,
9522 asm: x86.ASHLQ,
9523 reg: regInfo{
9524 inputs: []inputInfo{
9525 {2, 2},
9526 {0, 49135},
9527 {1, 49135},
9528 },
9529 outputs: []outputInfo{
9530 {0, 49135},
9531 },
9532 },
9533 },
9534 {
9535 name: "ROLQ",
9536 argLen: 2,
9537 resultInArg0: true,
9538 clobberFlags: true,
9539 asm: x86.AROLQ,
9540 reg: regInfo{
9541 inputs: []inputInfo{
9542 {1, 2},
9543 {0, 49135},
9544 },
9545 outputs: []outputInfo{
9546 {0, 49135},
9547 },
9548 },
9549 },
9550 {
9551 name: "ROLL",
9552 argLen: 2,
9553 resultInArg0: true,
9554 clobberFlags: true,
9555 asm: x86.AROLL,
9556 reg: regInfo{
9557 inputs: []inputInfo{
9558 {1, 2},
9559 {0, 49135},
9560 },
9561 outputs: []outputInfo{
9562 {0, 49135},
9563 },
9564 },
9565 },
9566 {
9567 name: "ROLW",
9568 argLen: 2,
9569 resultInArg0: true,
9570 clobberFlags: true,
9571 asm: x86.AROLW,
9572 reg: regInfo{
9573 inputs: []inputInfo{
9574 {1, 2},
9575 {0, 49135},
9576 },
9577 outputs: []outputInfo{
9578 {0, 49135},
9579 },
9580 },
9581 },
9582 {
9583 name: "ROLB",
9584 argLen: 2,
9585 resultInArg0: true,
9586 clobberFlags: true,
9587 asm: x86.AROLB,
9588 reg: regInfo{
9589 inputs: []inputInfo{
9590 {1, 2},
9591 {0, 49135},
9592 },
9593 outputs: []outputInfo{
9594 {0, 49135},
9595 },
9596 },
9597 },
9598 {
9599 name: "RORQ",
9600 argLen: 2,
9601 resultInArg0: true,
9602 clobberFlags: true,
9603 asm: x86.ARORQ,
9604 reg: regInfo{
9605 inputs: []inputInfo{
9606 {1, 2},
9607 {0, 49135},
9608 },
9609 outputs: []outputInfo{
9610 {0, 49135},
9611 },
9612 },
9613 },
9614 {
9615 name: "RORL",
9616 argLen: 2,
9617 resultInArg0: true,
9618 clobberFlags: true,
9619 asm: x86.ARORL,
9620 reg: regInfo{
9621 inputs: []inputInfo{
9622 {1, 2},
9623 {0, 49135},
9624 },
9625 outputs: []outputInfo{
9626 {0, 49135},
9627 },
9628 },
9629 },
9630 {
9631 name: "RORW",
9632 argLen: 2,
9633 resultInArg0: true,
9634 clobberFlags: true,
9635 asm: x86.ARORW,
9636 reg: regInfo{
9637 inputs: []inputInfo{
9638 {1, 2},
9639 {0, 49135},
9640 },
9641 outputs: []outputInfo{
9642 {0, 49135},
9643 },
9644 },
9645 },
9646 {
9647 name: "RORB",
9648 argLen: 2,
9649 resultInArg0: true,
9650 clobberFlags: true,
9651 asm: x86.ARORB,
9652 reg: regInfo{
9653 inputs: []inputInfo{
9654 {1, 2},
9655 {0, 49135},
9656 },
9657 outputs: []outputInfo{
9658 {0, 49135},
9659 },
9660 },
9661 },
9662 {
9663 name: "ROLQconst",
9664 auxType: auxInt8,
9665 argLen: 1,
9666 resultInArg0: true,
9667 clobberFlags: true,
9668 asm: x86.AROLQ,
9669 reg: regInfo{
9670 inputs: []inputInfo{
9671 {0, 49135},
9672 },
9673 outputs: []outputInfo{
9674 {0, 49135},
9675 },
9676 },
9677 },
9678 {
9679 name: "ROLLconst",
9680 auxType: auxInt8,
9681 argLen: 1,
9682 resultInArg0: true,
9683 clobberFlags: true,
9684 asm: x86.AROLL,
9685 reg: regInfo{
9686 inputs: []inputInfo{
9687 {0, 49135},
9688 },
9689 outputs: []outputInfo{
9690 {0, 49135},
9691 },
9692 },
9693 },
9694 {
9695 name: "ROLWconst",
9696 auxType: auxInt8,
9697 argLen: 1,
9698 resultInArg0: true,
9699 clobberFlags: true,
9700 asm: x86.AROLW,
9701 reg: regInfo{
9702 inputs: []inputInfo{
9703 {0, 49135},
9704 },
9705 outputs: []outputInfo{
9706 {0, 49135},
9707 },
9708 },
9709 },
9710 {
9711 name: "ROLBconst",
9712 auxType: auxInt8,
9713 argLen: 1,
9714 resultInArg0: true,
9715 clobberFlags: true,
9716 asm: x86.AROLB,
9717 reg: regInfo{
9718 inputs: []inputInfo{
9719 {0, 49135},
9720 },
9721 outputs: []outputInfo{
9722 {0, 49135},
9723 },
9724 },
9725 },
9726 {
9727 name: "ADDLload",
9728 auxType: auxSymOff,
9729 argLen: 3,
9730 resultInArg0: true,
9731 clobberFlags: true,
9732 faultOnNilArg1: true,
9733 symEffect: SymRead,
9734 asm: x86.AADDL,
9735 reg: regInfo{
9736 inputs: []inputInfo{
9737 {0, 49135},
9738 {1, 4295032831},
9739 },
9740 outputs: []outputInfo{
9741 {0, 49135},
9742 },
9743 },
9744 },
9745 {
9746 name: "ADDQload",
9747 auxType: auxSymOff,
9748 argLen: 3,
9749 resultInArg0: true,
9750 clobberFlags: true,
9751 faultOnNilArg1: true,
9752 symEffect: SymRead,
9753 asm: x86.AADDQ,
9754 reg: regInfo{
9755 inputs: []inputInfo{
9756 {0, 49135},
9757 {1, 4295032831},
9758 },
9759 outputs: []outputInfo{
9760 {0, 49135},
9761 },
9762 },
9763 },
9764 {
9765 name: "SUBQload",
9766 auxType: auxSymOff,
9767 argLen: 3,
9768 resultInArg0: true,
9769 clobberFlags: true,
9770 faultOnNilArg1: true,
9771 symEffect: SymRead,
9772 asm: x86.ASUBQ,
9773 reg: regInfo{
9774 inputs: []inputInfo{
9775 {0, 49135},
9776 {1, 4295032831},
9777 },
9778 outputs: []outputInfo{
9779 {0, 49135},
9780 },
9781 },
9782 },
9783 {
9784 name: "SUBLload",
9785 auxType: auxSymOff,
9786 argLen: 3,
9787 resultInArg0: true,
9788 clobberFlags: true,
9789 faultOnNilArg1: true,
9790 symEffect: SymRead,
9791 asm: x86.ASUBL,
9792 reg: regInfo{
9793 inputs: []inputInfo{
9794 {0, 49135},
9795 {1, 4295032831},
9796 },
9797 outputs: []outputInfo{
9798 {0, 49135},
9799 },
9800 },
9801 },
9802 {
9803 name: "ANDLload",
9804 auxType: auxSymOff,
9805 argLen: 3,
9806 resultInArg0: true,
9807 clobberFlags: true,
9808 faultOnNilArg1: true,
9809 symEffect: SymRead,
9810 asm: x86.AANDL,
9811 reg: regInfo{
9812 inputs: []inputInfo{
9813 {0, 49135},
9814 {1, 4295032831},
9815 },
9816 outputs: []outputInfo{
9817 {0, 49135},
9818 },
9819 },
9820 },
9821 {
9822 name: "ANDQload",
9823 auxType: auxSymOff,
9824 argLen: 3,
9825 resultInArg0: true,
9826 clobberFlags: true,
9827 faultOnNilArg1: true,
9828 symEffect: SymRead,
9829 asm: x86.AANDQ,
9830 reg: regInfo{
9831 inputs: []inputInfo{
9832 {0, 49135},
9833 {1, 4295032831},
9834 },
9835 outputs: []outputInfo{
9836 {0, 49135},
9837 },
9838 },
9839 },
9840 {
9841 name: "ORQload",
9842 auxType: auxSymOff,
9843 argLen: 3,
9844 resultInArg0: true,
9845 clobberFlags: true,
9846 faultOnNilArg1: true,
9847 symEffect: SymRead,
9848 asm: x86.AORQ,
9849 reg: regInfo{
9850 inputs: []inputInfo{
9851 {0, 49135},
9852 {1, 4295032831},
9853 },
9854 outputs: []outputInfo{
9855 {0, 49135},
9856 },
9857 },
9858 },
9859 {
9860 name: "ORLload",
9861 auxType: auxSymOff,
9862 argLen: 3,
9863 resultInArg0: true,
9864 clobberFlags: true,
9865 faultOnNilArg1: true,
9866 symEffect: SymRead,
9867 asm: x86.AORL,
9868 reg: regInfo{
9869 inputs: []inputInfo{
9870 {0, 49135},
9871 {1, 4295032831},
9872 },
9873 outputs: []outputInfo{
9874 {0, 49135},
9875 },
9876 },
9877 },
9878 {
9879 name: "XORQload",
9880 auxType: auxSymOff,
9881 argLen: 3,
9882 resultInArg0: true,
9883 clobberFlags: true,
9884 faultOnNilArg1: true,
9885 symEffect: SymRead,
9886 asm: x86.AXORQ,
9887 reg: regInfo{
9888 inputs: []inputInfo{
9889 {0, 49135},
9890 {1, 4295032831},
9891 },
9892 outputs: []outputInfo{
9893 {0, 49135},
9894 },
9895 },
9896 },
9897 {
9898 name: "XORLload",
9899 auxType: auxSymOff,
9900 argLen: 3,
9901 resultInArg0: true,
9902 clobberFlags: true,
9903 faultOnNilArg1: true,
9904 symEffect: SymRead,
9905 asm: x86.AXORL,
9906 reg: regInfo{
9907 inputs: []inputInfo{
9908 {0, 49135},
9909 {1, 4295032831},
9910 },
9911 outputs: []outputInfo{
9912 {0, 49135},
9913 },
9914 },
9915 },
9916 {
9917 name: "ADDLloadidx1",
9918 auxType: auxSymOff,
9919 argLen: 4,
9920 resultInArg0: true,
9921 clobberFlags: true,
9922 symEffect: SymRead,
9923 asm: x86.AADDL,
9924 scale: 1,
9925 reg: regInfo{
9926 inputs: []inputInfo{
9927 {0, 49135},
9928 {2, 49151},
9929 {1, 4295032831},
9930 },
9931 outputs: []outputInfo{
9932 {0, 49135},
9933 },
9934 },
9935 },
9936 {
9937 name: "ADDLloadidx4",
9938 auxType: auxSymOff,
9939 argLen: 4,
9940 resultInArg0: true,
9941 clobberFlags: true,
9942 symEffect: SymRead,
9943 asm: x86.AADDL,
9944 scale: 4,
9945 reg: regInfo{
9946 inputs: []inputInfo{
9947 {0, 49135},
9948 {2, 49151},
9949 {1, 4295032831},
9950 },
9951 outputs: []outputInfo{
9952 {0, 49135},
9953 },
9954 },
9955 },
9956 {
9957 name: "ADDLloadidx8",
9958 auxType: auxSymOff,
9959 argLen: 4,
9960 resultInArg0: true,
9961 clobberFlags: true,
9962 symEffect: SymRead,
9963 asm: x86.AADDL,
9964 scale: 8,
9965 reg: regInfo{
9966 inputs: []inputInfo{
9967 {0, 49135},
9968 {2, 49151},
9969 {1, 4295032831},
9970 },
9971 outputs: []outputInfo{
9972 {0, 49135},
9973 },
9974 },
9975 },
9976 {
9977 name: "ADDQloadidx1",
9978 auxType: auxSymOff,
9979 argLen: 4,
9980 resultInArg0: true,
9981 clobberFlags: true,
9982 symEffect: SymRead,
9983 asm: x86.AADDQ,
9984 scale: 1,
9985 reg: regInfo{
9986 inputs: []inputInfo{
9987 {0, 49135},
9988 {2, 49151},
9989 {1, 4295032831},
9990 },
9991 outputs: []outputInfo{
9992 {0, 49135},
9993 },
9994 },
9995 },
9996 {
9997 name: "ADDQloadidx8",
9998 auxType: auxSymOff,
9999 argLen: 4,
10000 resultInArg0: true,
10001 clobberFlags: true,
10002 symEffect: SymRead,
10003 asm: x86.AADDQ,
10004 scale: 8,
10005 reg: regInfo{
10006 inputs: []inputInfo{
10007 {0, 49135},
10008 {2, 49151},
10009 {1, 4295032831},
10010 },
10011 outputs: []outputInfo{
10012 {0, 49135},
10013 },
10014 },
10015 },
10016 {
10017 name: "SUBLloadidx1",
10018 auxType: auxSymOff,
10019 argLen: 4,
10020 resultInArg0: true,
10021 clobberFlags: true,
10022 symEffect: SymRead,
10023 asm: x86.ASUBL,
10024 scale: 1,
10025 reg: regInfo{
10026 inputs: []inputInfo{
10027 {0, 49135},
10028 {2, 49151},
10029 {1, 4295032831},
10030 },
10031 outputs: []outputInfo{
10032 {0, 49135},
10033 },
10034 },
10035 },
10036 {
10037 name: "SUBLloadidx4",
10038 auxType: auxSymOff,
10039 argLen: 4,
10040 resultInArg0: true,
10041 clobberFlags: true,
10042 symEffect: SymRead,
10043 asm: x86.ASUBL,
10044 scale: 4,
10045 reg: regInfo{
10046 inputs: []inputInfo{
10047 {0, 49135},
10048 {2, 49151},
10049 {1, 4295032831},
10050 },
10051 outputs: []outputInfo{
10052 {0, 49135},
10053 },
10054 },
10055 },
10056 {
10057 name: "SUBLloadidx8",
10058 auxType: auxSymOff,
10059 argLen: 4,
10060 resultInArg0: true,
10061 clobberFlags: true,
10062 symEffect: SymRead,
10063 asm: x86.ASUBL,
10064 scale: 8,
10065 reg: regInfo{
10066 inputs: []inputInfo{
10067 {0, 49135},
10068 {2, 49151},
10069 {1, 4295032831},
10070 },
10071 outputs: []outputInfo{
10072 {0, 49135},
10073 },
10074 },
10075 },
10076 {
10077 name: "SUBQloadidx1",
10078 auxType: auxSymOff,
10079 argLen: 4,
10080 resultInArg0: true,
10081 clobberFlags: true,
10082 symEffect: SymRead,
10083 asm: x86.ASUBQ,
10084 scale: 1,
10085 reg: regInfo{
10086 inputs: []inputInfo{
10087 {0, 49135},
10088 {2, 49151},
10089 {1, 4295032831},
10090 },
10091 outputs: []outputInfo{
10092 {0, 49135},
10093 },
10094 },
10095 },
10096 {
10097 name: "SUBQloadidx8",
10098 auxType: auxSymOff,
10099 argLen: 4,
10100 resultInArg0: true,
10101 clobberFlags: true,
10102 symEffect: SymRead,
10103 asm: x86.ASUBQ,
10104 scale: 8,
10105 reg: regInfo{
10106 inputs: []inputInfo{
10107 {0, 49135},
10108 {2, 49151},
10109 {1, 4295032831},
10110 },
10111 outputs: []outputInfo{
10112 {0, 49135},
10113 },
10114 },
10115 },
10116 {
10117 name: "ANDLloadidx1",
10118 auxType: auxSymOff,
10119 argLen: 4,
10120 resultInArg0: true,
10121 clobberFlags: true,
10122 symEffect: SymRead,
10123 asm: x86.AANDL,
10124 scale: 1,
10125 reg: regInfo{
10126 inputs: []inputInfo{
10127 {0, 49135},
10128 {2, 49151},
10129 {1, 4295032831},
10130 },
10131 outputs: []outputInfo{
10132 {0, 49135},
10133 },
10134 },
10135 },
10136 {
10137 name: "ANDLloadidx4",
10138 auxType: auxSymOff,
10139 argLen: 4,
10140 resultInArg0: true,
10141 clobberFlags: true,
10142 symEffect: SymRead,
10143 asm: x86.AANDL,
10144 scale: 4,
10145 reg: regInfo{
10146 inputs: []inputInfo{
10147 {0, 49135},
10148 {2, 49151},
10149 {1, 4295032831},
10150 },
10151 outputs: []outputInfo{
10152 {0, 49135},
10153 },
10154 },
10155 },
10156 {
10157 name: "ANDLloadidx8",
10158 auxType: auxSymOff,
10159 argLen: 4,
10160 resultInArg0: true,
10161 clobberFlags: true,
10162 symEffect: SymRead,
10163 asm: x86.AANDL,
10164 scale: 8,
10165 reg: regInfo{
10166 inputs: []inputInfo{
10167 {0, 49135},
10168 {2, 49151},
10169 {1, 4295032831},
10170 },
10171 outputs: []outputInfo{
10172 {0, 49135},
10173 },
10174 },
10175 },
10176 {
10177 name: "ANDQloadidx1",
10178 auxType: auxSymOff,
10179 argLen: 4,
10180 resultInArg0: true,
10181 clobberFlags: true,
10182 symEffect: SymRead,
10183 asm: x86.AANDQ,
10184 scale: 1,
10185 reg: regInfo{
10186 inputs: []inputInfo{
10187 {0, 49135},
10188 {2, 49151},
10189 {1, 4295032831},
10190 },
10191 outputs: []outputInfo{
10192 {0, 49135},
10193 },
10194 },
10195 },
10196 {
10197 name: "ANDQloadidx8",
10198 auxType: auxSymOff,
10199 argLen: 4,
10200 resultInArg0: true,
10201 clobberFlags: true,
10202 symEffect: SymRead,
10203 asm: x86.AANDQ,
10204 scale: 8,
10205 reg: regInfo{
10206 inputs: []inputInfo{
10207 {0, 49135},
10208 {2, 49151},
10209 {1, 4295032831},
10210 },
10211 outputs: []outputInfo{
10212 {0, 49135},
10213 },
10214 },
10215 },
10216 {
10217 name: "ORLloadidx1",
10218 auxType: auxSymOff,
10219 argLen: 4,
10220 resultInArg0: true,
10221 clobberFlags: true,
10222 symEffect: SymRead,
10223 asm: x86.AORL,
10224 scale: 1,
10225 reg: regInfo{
10226 inputs: []inputInfo{
10227 {0, 49135},
10228 {2, 49151},
10229 {1, 4295032831},
10230 },
10231 outputs: []outputInfo{
10232 {0, 49135},
10233 },
10234 },
10235 },
10236 {
10237 name: "ORLloadidx4",
10238 auxType: auxSymOff,
10239 argLen: 4,
10240 resultInArg0: true,
10241 clobberFlags: true,
10242 symEffect: SymRead,
10243 asm: x86.AORL,
10244 scale: 4,
10245 reg: regInfo{
10246 inputs: []inputInfo{
10247 {0, 49135},
10248 {2, 49151},
10249 {1, 4295032831},
10250 },
10251 outputs: []outputInfo{
10252 {0, 49135},
10253 },
10254 },
10255 },
10256 {
10257 name: "ORLloadidx8",
10258 auxType: auxSymOff,
10259 argLen: 4,
10260 resultInArg0: true,
10261 clobberFlags: true,
10262 symEffect: SymRead,
10263 asm: x86.AORL,
10264 scale: 8,
10265 reg: regInfo{
10266 inputs: []inputInfo{
10267 {0, 49135},
10268 {2, 49151},
10269 {1, 4295032831},
10270 },
10271 outputs: []outputInfo{
10272 {0, 49135},
10273 },
10274 },
10275 },
10276 {
10277 name: "ORQloadidx1",
10278 auxType: auxSymOff,
10279 argLen: 4,
10280 resultInArg0: true,
10281 clobberFlags: true,
10282 symEffect: SymRead,
10283 asm: x86.AORQ,
10284 scale: 1,
10285 reg: regInfo{
10286 inputs: []inputInfo{
10287 {0, 49135},
10288 {2, 49151},
10289 {1, 4295032831},
10290 },
10291 outputs: []outputInfo{
10292 {0, 49135},
10293 },
10294 },
10295 },
10296 {
10297 name: "ORQloadidx8",
10298 auxType: auxSymOff,
10299 argLen: 4,
10300 resultInArg0: true,
10301 clobberFlags: true,
10302 symEffect: SymRead,
10303 asm: x86.AORQ,
10304 scale: 8,
10305 reg: regInfo{
10306 inputs: []inputInfo{
10307 {0, 49135},
10308 {2, 49151},
10309 {1, 4295032831},
10310 },
10311 outputs: []outputInfo{
10312 {0, 49135},
10313 },
10314 },
10315 },
10316 {
10317 name: "XORLloadidx1",
10318 auxType: auxSymOff,
10319 argLen: 4,
10320 resultInArg0: true,
10321 clobberFlags: true,
10322 symEffect: SymRead,
10323 asm: x86.AXORL,
10324 scale: 1,
10325 reg: regInfo{
10326 inputs: []inputInfo{
10327 {0, 49135},
10328 {2, 49151},
10329 {1, 4295032831},
10330 },
10331 outputs: []outputInfo{
10332 {0, 49135},
10333 },
10334 },
10335 },
10336 {
10337 name: "XORLloadidx4",
10338 auxType: auxSymOff,
10339 argLen: 4,
10340 resultInArg0: true,
10341 clobberFlags: true,
10342 symEffect: SymRead,
10343 asm: x86.AXORL,
10344 scale: 4,
10345 reg: regInfo{
10346 inputs: []inputInfo{
10347 {0, 49135},
10348 {2, 49151},
10349 {1, 4295032831},
10350 },
10351 outputs: []outputInfo{
10352 {0, 49135},
10353 },
10354 },
10355 },
10356 {
10357 name: "XORLloadidx8",
10358 auxType: auxSymOff,
10359 argLen: 4,
10360 resultInArg0: true,
10361 clobberFlags: true,
10362 symEffect: SymRead,
10363 asm: x86.AXORL,
10364 scale: 8,
10365 reg: regInfo{
10366 inputs: []inputInfo{
10367 {0, 49135},
10368 {2, 49151},
10369 {1, 4295032831},
10370 },
10371 outputs: []outputInfo{
10372 {0, 49135},
10373 },
10374 },
10375 },
10376 {
10377 name: "XORQloadidx1",
10378 auxType: auxSymOff,
10379 argLen: 4,
10380 resultInArg0: true,
10381 clobberFlags: true,
10382 symEffect: SymRead,
10383 asm: x86.AXORQ,
10384 scale: 1,
10385 reg: regInfo{
10386 inputs: []inputInfo{
10387 {0, 49135},
10388 {2, 49151},
10389 {1, 4295032831},
10390 },
10391 outputs: []outputInfo{
10392 {0, 49135},
10393 },
10394 },
10395 },
10396 {
10397 name: "XORQloadidx8",
10398 auxType: auxSymOff,
10399 argLen: 4,
10400 resultInArg0: true,
10401 clobberFlags: true,
10402 symEffect: SymRead,
10403 asm: x86.AXORQ,
10404 scale: 8,
10405 reg: regInfo{
10406 inputs: []inputInfo{
10407 {0, 49135},
10408 {2, 49151},
10409 {1, 4295032831},
10410 },
10411 outputs: []outputInfo{
10412 {0, 49135},
10413 },
10414 },
10415 },
10416 {
10417 name: "ADDQmodify",
10418 auxType: auxSymOff,
10419 argLen: 3,
10420 clobberFlags: true,
10421 faultOnNilArg0: true,
10422 symEffect: SymRead | SymWrite,
10423 asm: x86.AADDQ,
10424 reg: regInfo{
10425 inputs: []inputInfo{
10426 {1, 49151},
10427 {0, 4295032831},
10428 },
10429 },
10430 },
10431 {
10432 name: "SUBQmodify",
10433 auxType: auxSymOff,
10434 argLen: 3,
10435 clobberFlags: true,
10436 faultOnNilArg0: true,
10437 symEffect: SymRead | SymWrite,
10438 asm: x86.ASUBQ,
10439 reg: regInfo{
10440 inputs: []inputInfo{
10441 {1, 49151},
10442 {0, 4295032831},
10443 },
10444 },
10445 },
10446 {
10447 name: "ANDQmodify",
10448 auxType: auxSymOff,
10449 argLen: 3,
10450 clobberFlags: true,
10451 faultOnNilArg0: true,
10452 symEffect: SymRead | SymWrite,
10453 asm: x86.AANDQ,
10454 reg: regInfo{
10455 inputs: []inputInfo{
10456 {1, 49151},
10457 {0, 4295032831},
10458 },
10459 },
10460 },
10461 {
10462 name: "ORQmodify",
10463 auxType: auxSymOff,
10464 argLen: 3,
10465 clobberFlags: true,
10466 faultOnNilArg0: true,
10467 symEffect: SymRead | SymWrite,
10468 asm: x86.AORQ,
10469 reg: regInfo{
10470 inputs: []inputInfo{
10471 {1, 49151},
10472 {0, 4295032831},
10473 },
10474 },
10475 },
10476 {
10477 name: "XORQmodify",
10478 auxType: auxSymOff,
10479 argLen: 3,
10480 clobberFlags: true,
10481 faultOnNilArg0: true,
10482 symEffect: SymRead | SymWrite,
10483 asm: x86.AXORQ,
10484 reg: regInfo{
10485 inputs: []inputInfo{
10486 {1, 49151},
10487 {0, 4295032831},
10488 },
10489 },
10490 },
10491 {
10492 name: "ADDLmodify",
10493 auxType: auxSymOff,
10494 argLen: 3,
10495 clobberFlags: true,
10496 faultOnNilArg0: true,
10497 symEffect: SymRead | SymWrite,
10498 asm: x86.AADDL,
10499 reg: regInfo{
10500 inputs: []inputInfo{
10501 {1, 49151},
10502 {0, 4295032831},
10503 },
10504 },
10505 },
10506 {
10507 name: "SUBLmodify",
10508 auxType: auxSymOff,
10509 argLen: 3,
10510 clobberFlags: true,
10511 faultOnNilArg0: true,
10512 symEffect: SymRead | SymWrite,
10513 asm: x86.ASUBL,
10514 reg: regInfo{
10515 inputs: []inputInfo{
10516 {1, 49151},
10517 {0, 4295032831},
10518 },
10519 },
10520 },
10521 {
10522 name: "ANDLmodify",
10523 auxType: auxSymOff,
10524 argLen: 3,
10525 clobberFlags: true,
10526 faultOnNilArg0: true,
10527 symEffect: SymRead | SymWrite,
10528 asm: x86.AANDL,
10529 reg: regInfo{
10530 inputs: []inputInfo{
10531 {1, 49151},
10532 {0, 4295032831},
10533 },
10534 },
10535 },
10536 {
10537 name: "ORLmodify",
10538 auxType: auxSymOff,
10539 argLen: 3,
10540 clobberFlags: true,
10541 faultOnNilArg0: true,
10542 symEffect: SymRead | SymWrite,
10543 asm: x86.AORL,
10544 reg: regInfo{
10545 inputs: []inputInfo{
10546 {1, 49151},
10547 {0, 4295032831},
10548 },
10549 },
10550 },
10551 {
10552 name: "XORLmodify",
10553 auxType: auxSymOff,
10554 argLen: 3,
10555 clobberFlags: true,
10556 faultOnNilArg0: true,
10557 symEffect: SymRead | SymWrite,
10558 asm: x86.AXORL,
10559 reg: regInfo{
10560 inputs: []inputInfo{
10561 {1, 49151},
10562 {0, 4295032831},
10563 },
10564 },
10565 },
10566 {
10567 name: "ADDQmodifyidx1",
10568 auxType: auxSymOff,
10569 argLen: 4,
10570 clobberFlags: true,
10571 symEffect: SymRead | SymWrite,
10572 asm: x86.AADDQ,
10573 scale: 1,
10574 reg: regInfo{
10575 inputs: []inputInfo{
10576 {1, 49151},
10577 {2, 49151},
10578 {0, 4295032831},
10579 },
10580 },
10581 },
10582 {
10583 name: "ADDQmodifyidx8",
10584 auxType: auxSymOff,
10585 argLen: 4,
10586 clobberFlags: true,
10587 symEffect: SymRead | SymWrite,
10588 asm: x86.AADDQ,
10589 scale: 8,
10590 reg: regInfo{
10591 inputs: []inputInfo{
10592 {1, 49151},
10593 {2, 49151},
10594 {0, 4295032831},
10595 },
10596 },
10597 },
10598 {
10599 name: "SUBQmodifyidx1",
10600 auxType: auxSymOff,
10601 argLen: 4,
10602 clobberFlags: true,
10603 symEffect: SymRead | SymWrite,
10604 asm: x86.ASUBQ,
10605 scale: 1,
10606 reg: regInfo{
10607 inputs: []inputInfo{
10608 {1, 49151},
10609 {2, 49151},
10610 {0, 4295032831},
10611 },
10612 },
10613 },
10614 {
10615 name: "SUBQmodifyidx8",
10616 auxType: auxSymOff,
10617 argLen: 4,
10618 clobberFlags: true,
10619 symEffect: SymRead | SymWrite,
10620 asm: x86.ASUBQ,
10621 scale: 8,
10622 reg: regInfo{
10623 inputs: []inputInfo{
10624 {1, 49151},
10625 {2, 49151},
10626 {0, 4295032831},
10627 },
10628 },
10629 },
10630 {
10631 name: "ANDQmodifyidx1",
10632 auxType: auxSymOff,
10633 argLen: 4,
10634 clobberFlags: true,
10635 symEffect: SymRead | SymWrite,
10636 asm: x86.AANDQ,
10637 scale: 1,
10638 reg: regInfo{
10639 inputs: []inputInfo{
10640 {1, 49151},
10641 {2, 49151},
10642 {0, 4295032831},
10643 },
10644 },
10645 },
10646 {
10647 name: "ANDQmodifyidx8",
10648 auxType: auxSymOff,
10649 argLen: 4,
10650 clobberFlags: true,
10651 symEffect: SymRead | SymWrite,
10652 asm: x86.AANDQ,
10653 scale: 8,
10654 reg: regInfo{
10655 inputs: []inputInfo{
10656 {1, 49151},
10657 {2, 49151},
10658 {0, 4295032831},
10659 },
10660 },
10661 },
10662 {
10663 name: "ORQmodifyidx1",
10664 auxType: auxSymOff,
10665 argLen: 4,
10666 clobberFlags: true,
10667 symEffect: SymRead | SymWrite,
10668 asm: x86.AORQ,
10669 scale: 1,
10670 reg: regInfo{
10671 inputs: []inputInfo{
10672 {1, 49151},
10673 {2, 49151},
10674 {0, 4295032831},
10675 },
10676 },
10677 },
10678 {
10679 name: "ORQmodifyidx8",
10680 auxType: auxSymOff,
10681 argLen: 4,
10682 clobberFlags: true,
10683 symEffect: SymRead | SymWrite,
10684 asm: x86.AORQ,
10685 scale: 8,
10686 reg: regInfo{
10687 inputs: []inputInfo{
10688 {1, 49151},
10689 {2, 49151},
10690 {0, 4295032831},
10691 },
10692 },
10693 },
10694 {
10695 name: "XORQmodifyidx1",
10696 auxType: auxSymOff,
10697 argLen: 4,
10698 clobberFlags: true,
10699 symEffect: SymRead | SymWrite,
10700 asm: x86.AXORQ,
10701 scale: 1,
10702 reg: regInfo{
10703 inputs: []inputInfo{
10704 {1, 49151},
10705 {2, 49151},
10706 {0, 4295032831},
10707 },
10708 },
10709 },
10710 {
10711 name: "XORQmodifyidx8",
10712 auxType: auxSymOff,
10713 argLen: 4,
10714 clobberFlags: true,
10715 symEffect: SymRead | SymWrite,
10716 asm: x86.AXORQ,
10717 scale: 8,
10718 reg: regInfo{
10719 inputs: []inputInfo{
10720 {1, 49151},
10721 {2, 49151},
10722 {0, 4295032831},
10723 },
10724 },
10725 },
10726 {
10727 name: "ADDLmodifyidx1",
10728 auxType: auxSymOff,
10729 argLen: 4,
10730 clobberFlags: true,
10731 symEffect: SymRead | SymWrite,
10732 asm: x86.AADDL,
10733 scale: 1,
10734 reg: regInfo{
10735 inputs: []inputInfo{
10736 {1, 49151},
10737 {2, 49151},
10738 {0, 4295032831},
10739 },
10740 },
10741 },
10742 {
10743 name: "ADDLmodifyidx4",
10744 auxType: auxSymOff,
10745 argLen: 4,
10746 clobberFlags: true,
10747 symEffect: SymRead | SymWrite,
10748 asm: x86.AADDL,
10749 scale: 4,
10750 reg: regInfo{
10751 inputs: []inputInfo{
10752 {1, 49151},
10753 {2, 49151},
10754 {0, 4295032831},
10755 },
10756 },
10757 },
10758 {
10759 name: "ADDLmodifyidx8",
10760 auxType: auxSymOff,
10761 argLen: 4,
10762 clobberFlags: true,
10763 symEffect: SymRead | SymWrite,
10764 asm: x86.AADDL,
10765 scale: 8,
10766 reg: regInfo{
10767 inputs: []inputInfo{
10768 {1, 49151},
10769 {2, 49151},
10770 {0, 4295032831},
10771 },
10772 },
10773 },
10774 {
10775 name: "SUBLmodifyidx1",
10776 auxType: auxSymOff,
10777 argLen: 4,
10778 clobberFlags: true,
10779 symEffect: SymRead | SymWrite,
10780 asm: x86.ASUBL,
10781 scale: 1,
10782 reg: regInfo{
10783 inputs: []inputInfo{
10784 {1, 49151},
10785 {2, 49151},
10786 {0, 4295032831},
10787 },
10788 },
10789 },
10790 {
10791 name: "SUBLmodifyidx4",
10792 auxType: auxSymOff,
10793 argLen: 4,
10794 clobberFlags: true,
10795 symEffect: SymRead | SymWrite,
10796 asm: x86.ASUBL,
10797 scale: 4,
10798 reg: regInfo{
10799 inputs: []inputInfo{
10800 {1, 49151},
10801 {2, 49151},
10802 {0, 4295032831},
10803 },
10804 },
10805 },
10806 {
10807 name: "SUBLmodifyidx8",
10808 auxType: auxSymOff,
10809 argLen: 4,
10810 clobberFlags: true,
10811 symEffect: SymRead | SymWrite,
10812 asm: x86.ASUBL,
10813 scale: 8,
10814 reg: regInfo{
10815 inputs: []inputInfo{
10816 {1, 49151},
10817 {2, 49151},
10818 {0, 4295032831},
10819 },
10820 },
10821 },
10822 {
10823 name: "ANDLmodifyidx1",
10824 auxType: auxSymOff,
10825 argLen: 4,
10826 clobberFlags: true,
10827 symEffect: SymRead | SymWrite,
10828 asm: x86.AANDL,
10829 scale: 1,
10830 reg: regInfo{
10831 inputs: []inputInfo{
10832 {1, 49151},
10833 {2, 49151},
10834 {0, 4295032831},
10835 },
10836 },
10837 },
10838 {
10839 name: "ANDLmodifyidx4",
10840 auxType: auxSymOff,
10841 argLen: 4,
10842 clobberFlags: true,
10843 symEffect: SymRead | SymWrite,
10844 asm: x86.AANDL,
10845 scale: 4,
10846 reg: regInfo{
10847 inputs: []inputInfo{
10848 {1, 49151},
10849 {2, 49151},
10850 {0, 4295032831},
10851 },
10852 },
10853 },
10854 {
10855 name: "ANDLmodifyidx8",
10856 auxType: auxSymOff,
10857 argLen: 4,
10858 clobberFlags: true,
10859 symEffect: SymRead | SymWrite,
10860 asm: x86.AANDL,
10861 scale: 8,
10862 reg: regInfo{
10863 inputs: []inputInfo{
10864 {1, 49151},
10865 {2, 49151},
10866 {0, 4295032831},
10867 },
10868 },
10869 },
10870 {
10871 name: "ORLmodifyidx1",
10872 auxType: auxSymOff,
10873 argLen: 4,
10874 clobberFlags: true,
10875 symEffect: SymRead | SymWrite,
10876 asm: x86.AORL,
10877 scale: 1,
10878 reg: regInfo{
10879 inputs: []inputInfo{
10880 {1, 49151},
10881 {2, 49151},
10882 {0, 4295032831},
10883 },
10884 },
10885 },
10886 {
10887 name: "ORLmodifyidx4",
10888 auxType: auxSymOff,
10889 argLen: 4,
10890 clobberFlags: true,
10891 symEffect: SymRead | SymWrite,
10892 asm: x86.AORL,
10893 scale: 4,
10894 reg: regInfo{
10895 inputs: []inputInfo{
10896 {1, 49151},
10897 {2, 49151},
10898 {0, 4295032831},
10899 },
10900 },
10901 },
10902 {
10903 name: "ORLmodifyidx8",
10904 auxType: auxSymOff,
10905 argLen: 4,
10906 clobberFlags: true,
10907 symEffect: SymRead | SymWrite,
10908 asm: x86.AORL,
10909 scale: 8,
10910 reg: regInfo{
10911 inputs: []inputInfo{
10912 {1, 49151},
10913 {2, 49151},
10914 {0, 4295032831},
10915 },
10916 },
10917 },
10918 {
10919 name: "XORLmodifyidx1",
10920 auxType: auxSymOff,
10921 argLen: 4,
10922 clobberFlags: true,
10923 symEffect: SymRead | SymWrite,
10924 asm: x86.AXORL,
10925 scale: 1,
10926 reg: regInfo{
10927 inputs: []inputInfo{
10928 {1, 49151},
10929 {2, 49151},
10930 {0, 4295032831},
10931 },
10932 },
10933 },
10934 {
10935 name: "XORLmodifyidx4",
10936 auxType: auxSymOff,
10937 argLen: 4,
10938 clobberFlags: true,
10939 symEffect: SymRead | SymWrite,
10940 asm: x86.AXORL,
10941 scale: 4,
10942 reg: regInfo{
10943 inputs: []inputInfo{
10944 {1, 49151},
10945 {2, 49151},
10946 {0, 4295032831},
10947 },
10948 },
10949 },
10950 {
10951 name: "XORLmodifyidx8",
10952 auxType: auxSymOff,
10953 argLen: 4,
10954 clobberFlags: true,
10955 symEffect: SymRead | SymWrite,
10956 asm: x86.AXORL,
10957 scale: 8,
10958 reg: regInfo{
10959 inputs: []inputInfo{
10960 {1, 49151},
10961 {2, 49151},
10962 {0, 4295032831},
10963 },
10964 },
10965 },
10966 {
10967 name: "ADDQconstmodifyidx1",
10968 auxType: auxSymValAndOff,
10969 argLen: 3,
10970 clobberFlags: true,
10971 symEffect: SymRead | SymWrite,
10972 asm: x86.AADDQ,
10973 scale: 1,
10974 reg: regInfo{
10975 inputs: []inputInfo{
10976 {1, 49151},
10977 {0, 4295032831},
10978 },
10979 },
10980 },
10981 {
10982 name: "ADDQconstmodifyidx8",
10983 auxType: auxSymValAndOff,
10984 argLen: 3,
10985 clobberFlags: true,
10986 symEffect: SymRead | SymWrite,
10987 asm: x86.AADDQ,
10988 scale: 8,
10989 reg: regInfo{
10990 inputs: []inputInfo{
10991 {1, 49151},
10992 {0, 4295032831},
10993 },
10994 },
10995 },
10996 {
10997 name: "ANDQconstmodifyidx1",
10998 auxType: auxSymValAndOff,
10999 argLen: 3,
11000 clobberFlags: true,
11001 symEffect: SymRead | SymWrite,
11002 asm: x86.AANDQ,
11003 scale: 1,
11004 reg: regInfo{
11005 inputs: []inputInfo{
11006 {1, 49151},
11007 {0, 4295032831},
11008 },
11009 },
11010 },
11011 {
11012 name: "ANDQconstmodifyidx8",
11013 auxType: auxSymValAndOff,
11014 argLen: 3,
11015 clobberFlags: true,
11016 symEffect: SymRead | SymWrite,
11017 asm: x86.AANDQ,
11018 scale: 8,
11019 reg: regInfo{
11020 inputs: []inputInfo{
11021 {1, 49151},
11022 {0, 4295032831},
11023 },
11024 },
11025 },
11026 {
11027 name: "ORQconstmodifyidx1",
11028 auxType: auxSymValAndOff,
11029 argLen: 3,
11030 clobberFlags: true,
11031 symEffect: SymRead | SymWrite,
11032 asm: x86.AORQ,
11033 scale: 1,
11034 reg: regInfo{
11035 inputs: []inputInfo{
11036 {1, 49151},
11037 {0, 4295032831},
11038 },
11039 },
11040 },
11041 {
11042 name: "ORQconstmodifyidx8",
11043 auxType: auxSymValAndOff,
11044 argLen: 3,
11045 clobberFlags: true,
11046 symEffect: SymRead | SymWrite,
11047 asm: x86.AORQ,
11048 scale: 8,
11049 reg: regInfo{
11050 inputs: []inputInfo{
11051 {1, 49151},
11052 {0, 4295032831},
11053 },
11054 },
11055 },
11056 {
11057 name: "XORQconstmodifyidx1",
11058 auxType: auxSymValAndOff,
11059 argLen: 3,
11060 clobberFlags: true,
11061 symEffect: SymRead | SymWrite,
11062 asm: x86.AXORQ,
11063 scale: 1,
11064 reg: regInfo{
11065 inputs: []inputInfo{
11066 {1, 49151},
11067 {0, 4295032831},
11068 },
11069 },
11070 },
11071 {
11072 name: "XORQconstmodifyidx8",
11073 auxType: auxSymValAndOff,
11074 argLen: 3,
11075 clobberFlags: true,
11076 symEffect: SymRead | SymWrite,
11077 asm: x86.AXORQ,
11078 scale: 8,
11079 reg: regInfo{
11080 inputs: []inputInfo{
11081 {1, 49151},
11082 {0, 4295032831},
11083 },
11084 },
11085 },
11086 {
11087 name: "ADDLconstmodifyidx1",
11088 auxType: auxSymValAndOff,
11089 argLen: 3,
11090 clobberFlags: true,
11091 symEffect: SymRead | SymWrite,
11092 asm: x86.AADDL,
11093 scale: 1,
11094 reg: regInfo{
11095 inputs: []inputInfo{
11096 {1, 49151},
11097 {0, 4295032831},
11098 },
11099 },
11100 },
11101 {
11102 name: "ADDLconstmodifyidx4",
11103 auxType: auxSymValAndOff,
11104 argLen: 3,
11105 clobberFlags: true,
11106 symEffect: SymRead | SymWrite,
11107 asm: x86.AADDL,
11108 scale: 4,
11109 reg: regInfo{
11110 inputs: []inputInfo{
11111 {1, 49151},
11112 {0, 4295032831},
11113 },
11114 },
11115 },
11116 {
11117 name: "ADDLconstmodifyidx8",
11118 auxType: auxSymValAndOff,
11119 argLen: 3,
11120 clobberFlags: true,
11121 symEffect: SymRead | SymWrite,
11122 asm: x86.AADDL,
11123 scale: 8,
11124 reg: regInfo{
11125 inputs: []inputInfo{
11126 {1, 49151},
11127 {0, 4295032831},
11128 },
11129 },
11130 },
11131 {
11132 name: "ANDLconstmodifyidx1",
11133 auxType: auxSymValAndOff,
11134 argLen: 3,
11135 clobberFlags: true,
11136 symEffect: SymRead | SymWrite,
11137 asm: x86.AANDL,
11138 scale: 1,
11139 reg: regInfo{
11140 inputs: []inputInfo{
11141 {1, 49151},
11142 {0, 4295032831},
11143 },
11144 },
11145 },
11146 {
11147 name: "ANDLconstmodifyidx4",
11148 auxType: auxSymValAndOff,
11149 argLen: 3,
11150 clobberFlags: true,
11151 symEffect: SymRead | SymWrite,
11152 asm: x86.AANDL,
11153 scale: 4,
11154 reg: regInfo{
11155 inputs: []inputInfo{
11156 {1, 49151},
11157 {0, 4295032831},
11158 },
11159 },
11160 },
11161 {
11162 name: "ANDLconstmodifyidx8",
11163 auxType: auxSymValAndOff,
11164 argLen: 3,
11165 clobberFlags: true,
11166 symEffect: SymRead | SymWrite,
11167 asm: x86.AANDL,
11168 scale: 8,
11169 reg: regInfo{
11170 inputs: []inputInfo{
11171 {1, 49151},
11172 {0, 4295032831},
11173 },
11174 },
11175 },
11176 {
11177 name: "ORLconstmodifyidx1",
11178 auxType: auxSymValAndOff,
11179 argLen: 3,
11180 clobberFlags: true,
11181 symEffect: SymRead | SymWrite,
11182 asm: x86.AORL,
11183 scale: 1,
11184 reg: regInfo{
11185 inputs: []inputInfo{
11186 {1, 49151},
11187 {0, 4295032831},
11188 },
11189 },
11190 },
11191 {
11192 name: "ORLconstmodifyidx4",
11193 auxType: auxSymValAndOff,
11194 argLen: 3,
11195 clobberFlags: true,
11196 symEffect: SymRead | SymWrite,
11197 asm: x86.AORL,
11198 scale: 4,
11199 reg: regInfo{
11200 inputs: []inputInfo{
11201 {1, 49151},
11202 {0, 4295032831},
11203 },
11204 },
11205 },
11206 {
11207 name: "ORLconstmodifyidx8",
11208 auxType: auxSymValAndOff,
11209 argLen: 3,
11210 clobberFlags: true,
11211 symEffect: SymRead | SymWrite,
11212 asm: x86.AORL,
11213 scale: 8,
11214 reg: regInfo{
11215 inputs: []inputInfo{
11216 {1, 49151},
11217 {0, 4295032831},
11218 },
11219 },
11220 },
11221 {
11222 name: "XORLconstmodifyidx1",
11223 auxType: auxSymValAndOff,
11224 argLen: 3,
11225 clobberFlags: true,
11226 symEffect: SymRead | SymWrite,
11227 asm: x86.AXORL,
11228 scale: 1,
11229 reg: regInfo{
11230 inputs: []inputInfo{
11231 {1, 49151},
11232 {0, 4295032831},
11233 },
11234 },
11235 },
11236 {
11237 name: "XORLconstmodifyidx4",
11238 auxType: auxSymValAndOff,
11239 argLen: 3,
11240 clobberFlags: true,
11241 symEffect: SymRead | SymWrite,
11242 asm: x86.AXORL,
11243 scale: 4,
11244 reg: regInfo{
11245 inputs: []inputInfo{
11246 {1, 49151},
11247 {0, 4295032831},
11248 },
11249 },
11250 },
11251 {
11252 name: "XORLconstmodifyidx8",
11253 auxType: auxSymValAndOff,
11254 argLen: 3,
11255 clobberFlags: true,
11256 symEffect: SymRead | SymWrite,
11257 asm: x86.AXORL,
11258 scale: 8,
11259 reg: regInfo{
11260 inputs: []inputInfo{
11261 {1, 49151},
11262 {0, 4295032831},
11263 },
11264 },
11265 },
11266 {
11267 name: "NEGQ",
11268 argLen: 1,
11269 resultInArg0: true,
11270 clobberFlags: true,
11271 asm: x86.ANEGQ,
11272 reg: regInfo{
11273 inputs: []inputInfo{
11274 {0, 49135},
11275 },
11276 outputs: []outputInfo{
11277 {0, 49135},
11278 },
11279 },
11280 },
11281 {
11282 name: "NEGL",
11283 argLen: 1,
11284 resultInArg0: true,
11285 clobberFlags: true,
11286 asm: x86.ANEGL,
11287 reg: regInfo{
11288 inputs: []inputInfo{
11289 {0, 49135},
11290 },
11291 outputs: []outputInfo{
11292 {0, 49135},
11293 },
11294 },
11295 },
11296 {
11297 name: "NOTQ",
11298 argLen: 1,
11299 resultInArg0: true,
11300 asm: x86.ANOTQ,
11301 reg: regInfo{
11302 inputs: []inputInfo{
11303 {0, 49135},
11304 },
11305 outputs: []outputInfo{
11306 {0, 49135},
11307 },
11308 },
11309 },
11310 {
11311 name: "NOTL",
11312 argLen: 1,
11313 resultInArg0: true,
11314 asm: x86.ANOTL,
11315 reg: regInfo{
11316 inputs: []inputInfo{
11317 {0, 49135},
11318 },
11319 outputs: []outputInfo{
11320 {0, 49135},
11321 },
11322 },
11323 },
11324 {
11325 name: "BSFQ",
11326 argLen: 1,
11327 asm: x86.ABSFQ,
11328 reg: regInfo{
11329 inputs: []inputInfo{
11330 {0, 49135},
11331 },
11332 outputs: []outputInfo{
11333 {1, 0},
11334 {0, 49135},
11335 },
11336 },
11337 },
11338 {
11339 name: "BSFL",
11340 argLen: 1,
11341 clobberFlags: true,
11342 asm: x86.ABSFL,
11343 reg: regInfo{
11344 inputs: []inputInfo{
11345 {0, 49135},
11346 },
11347 outputs: []outputInfo{
11348 {0, 49135},
11349 },
11350 },
11351 },
11352 {
11353 name: "BSRQ",
11354 argLen: 1,
11355 asm: x86.ABSRQ,
11356 reg: regInfo{
11357 inputs: []inputInfo{
11358 {0, 49135},
11359 },
11360 outputs: []outputInfo{
11361 {1, 0},
11362 {0, 49135},
11363 },
11364 },
11365 },
11366 {
11367 name: "BSRL",
11368 argLen: 1,
11369 clobberFlags: true,
11370 asm: x86.ABSRL,
11371 reg: regInfo{
11372 inputs: []inputInfo{
11373 {0, 49135},
11374 },
11375 outputs: []outputInfo{
11376 {0, 49135},
11377 },
11378 },
11379 },
11380 {
11381 name: "CMOVQEQ",
11382 argLen: 3,
11383 resultInArg0: true,
11384 asm: x86.ACMOVQEQ,
11385 reg: regInfo{
11386 inputs: []inputInfo{
11387 {0, 49135},
11388 {1, 49135},
11389 },
11390 outputs: []outputInfo{
11391 {0, 49135},
11392 },
11393 },
11394 },
11395 {
11396 name: "CMOVQNE",
11397 argLen: 3,
11398 resultInArg0: true,
11399 asm: x86.ACMOVQNE,
11400 reg: regInfo{
11401 inputs: []inputInfo{
11402 {0, 49135},
11403 {1, 49135},
11404 },
11405 outputs: []outputInfo{
11406 {0, 49135},
11407 },
11408 },
11409 },
11410 {
11411 name: "CMOVQLT",
11412 argLen: 3,
11413 resultInArg0: true,
11414 asm: x86.ACMOVQLT,
11415 reg: regInfo{
11416 inputs: []inputInfo{
11417 {0, 49135},
11418 {1, 49135},
11419 },
11420 outputs: []outputInfo{
11421 {0, 49135},
11422 },
11423 },
11424 },
11425 {
11426 name: "CMOVQGT",
11427 argLen: 3,
11428 resultInArg0: true,
11429 asm: x86.ACMOVQGT,
11430 reg: regInfo{
11431 inputs: []inputInfo{
11432 {0, 49135},
11433 {1, 49135},
11434 },
11435 outputs: []outputInfo{
11436 {0, 49135},
11437 },
11438 },
11439 },
11440 {
11441 name: "CMOVQLE",
11442 argLen: 3,
11443 resultInArg0: true,
11444 asm: x86.ACMOVQLE,
11445 reg: regInfo{
11446 inputs: []inputInfo{
11447 {0, 49135},
11448 {1, 49135},
11449 },
11450 outputs: []outputInfo{
11451 {0, 49135},
11452 },
11453 },
11454 },
11455 {
11456 name: "CMOVQGE",
11457 argLen: 3,
11458 resultInArg0: true,
11459 asm: x86.ACMOVQGE,
11460 reg: regInfo{
11461 inputs: []inputInfo{
11462 {0, 49135},
11463 {1, 49135},
11464 },
11465 outputs: []outputInfo{
11466 {0, 49135},
11467 },
11468 },
11469 },
11470 {
11471 name: "CMOVQLS",
11472 argLen: 3,
11473 resultInArg0: true,
11474 asm: x86.ACMOVQLS,
11475 reg: regInfo{
11476 inputs: []inputInfo{
11477 {0, 49135},
11478 {1, 49135},
11479 },
11480 outputs: []outputInfo{
11481 {0, 49135},
11482 },
11483 },
11484 },
11485 {
11486 name: "CMOVQHI",
11487 argLen: 3,
11488 resultInArg0: true,
11489 asm: x86.ACMOVQHI,
11490 reg: regInfo{
11491 inputs: []inputInfo{
11492 {0, 49135},
11493 {1, 49135},
11494 },
11495 outputs: []outputInfo{
11496 {0, 49135},
11497 },
11498 },
11499 },
11500 {
11501 name: "CMOVQCC",
11502 argLen: 3,
11503 resultInArg0: true,
11504 asm: x86.ACMOVQCC,
11505 reg: regInfo{
11506 inputs: []inputInfo{
11507 {0, 49135},
11508 {1, 49135},
11509 },
11510 outputs: []outputInfo{
11511 {0, 49135},
11512 },
11513 },
11514 },
11515 {
11516 name: "CMOVQCS",
11517 argLen: 3,
11518 resultInArg0: true,
11519 asm: x86.ACMOVQCS,
11520 reg: regInfo{
11521 inputs: []inputInfo{
11522 {0, 49135},
11523 {1, 49135},
11524 },
11525 outputs: []outputInfo{
11526 {0, 49135},
11527 },
11528 },
11529 },
11530 {
11531 name: "CMOVLEQ",
11532 argLen: 3,
11533 resultInArg0: true,
11534 asm: x86.ACMOVLEQ,
11535 reg: regInfo{
11536 inputs: []inputInfo{
11537 {0, 49135},
11538 {1, 49135},
11539 },
11540 outputs: []outputInfo{
11541 {0, 49135},
11542 },
11543 },
11544 },
11545 {
11546 name: "CMOVLNE",
11547 argLen: 3,
11548 resultInArg0: true,
11549 asm: x86.ACMOVLNE,
11550 reg: regInfo{
11551 inputs: []inputInfo{
11552 {0, 49135},
11553 {1, 49135},
11554 },
11555 outputs: []outputInfo{
11556 {0, 49135},
11557 },
11558 },
11559 },
11560 {
11561 name: "CMOVLLT",
11562 argLen: 3,
11563 resultInArg0: true,
11564 asm: x86.ACMOVLLT,
11565 reg: regInfo{
11566 inputs: []inputInfo{
11567 {0, 49135},
11568 {1, 49135},
11569 },
11570 outputs: []outputInfo{
11571 {0, 49135},
11572 },
11573 },
11574 },
11575 {
11576 name: "CMOVLGT",
11577 argLen: 3,
11578 resultInArg0: true,
11579 asm: x86.ACMOVLGT,
11580 reg: regInfo{
11581 inputs: []inputInfo{
11582 {0, 49135},
11583 {1, 49135},
11584 },
11585 outputs: []outputInfo{
11586 {0, 49135},
11587 },
11588 },
11589 },
11590 {
11591 name: "CMOVLLE",
11592 argLen: 3,
11593 resultInArg0: true,
11594 asm: x86.ACMOVLLE,
11595 reg: regInfo{
11596 inputs: []inputInfo{
11597 {0, 49135},
11598 {1, 49135},
11599 },
11600 outputs: []outputInfo{
11601 {0, 49135},
11602 },
11603 },
11604 },
11605 {
11606 name: "CMOVLGE",
11607 argLen: 3,
11608 resultInArg0: true,
11609 asm: x86.ACMOVLGE,
11610 reg: regInfo{
11611 inputs: []inputInfo{
11612 {0, 49135},
11613 {1, 49135},
11614 },
11615 outputs: []outputInfo{
11616 {0, 49135},
11617 },
11618 },
11619 },
11620 {
11621 name: "CMOVLLS",
11622 argLen: 3,
11623 resultInArg0: true,
11624 asm: x86.ACMOVLLS,
11625 reg: regInfo{
11626 inputs: []inputInfo{
11627 {0, 49135},
11628 {1, 49135},
11629 },
11630 outputs: []outputInfo{
11631 {0, 49135},
11632 },
11633 },
11634 },
11635 {
11636 name: "CMOVLHI",
11637 argLen: 3,
11638 resultInArg0: true,
11639 asm: x86.ACMOVLHI,
11640 reg: regInfo{
11641 inputs: []inputInfo{
11642 {0, 49135},
11643 {1, 49135},
11644 },
11645 outputs: []outputInfo{
11646 {0, 49135},
11647 },
11648 },
11649 },
11650 {
11651 name: "CMOVLCC",
11652 argLen: 3,
11653 resultInArg0: true,
11654 asm: x86.ACMOVLCC,
11655 reg: regInfo{
11656 inputs: []inputInfo{
11657 {0, 49135},
11658 {1, 49135},
11659 },
11660 outputs: []outputInfo{
11661 {0, 49135},
11662 },
11663 },
11664 },
11665 {
11666 name: "CMOVLCS",
11667 argLen: 3,
11668 resultInArg0: true,
11669 asm: x86.ACMOVLCS,
11670 reg: regInfo{
11671 inputs: []inputInfo{
11672 {0, 49135},
11673 {1, 49135},
11674 },
11675 outputs: []outputInfo{
11676 {0, 49135},
11677 },
11678 },
11679 },
11680 {
11681 name: "CMOVWEQ",
11682 argLen: 3,
11683 resultInArg0: true,
11684 asm: x86.ACMOVWEQ,
11685 reg: regInfo{
11686 inputs: []inputInfo{
11687 {0, 49135},
11688 {1, 49135},
11689 },
11690 outputs: []outputInfo{
11691 {0, 49135},
11692 },
11693 },
11694 },
11695 {
11696 name: "CMOVWNE",
11697 argLen: 3,
11698 resultInArg0: true,
11699 asm: x86.ACMOVWNE,
11700 reg: regInfo{
11701 inputs: []inputInfo{
11702 {0, 49135},
11703 {1, 49135},
11704 },
11705 outputs: []outputInfo{
11706 {0, 49135},
11707 },
11708 },
11709 },
11710 {
11711 name: "CMOVWLT",
11712 argLen: 3,
11713 resultInArg0: true,
11714 asm: x86.ACMOVWLT,
11715 reg: regInfo{
11716 inputs: []inputInfo{
11717 {0, 49135},
11718 {1, 49135},
11719 },
11720 outputs: []outputInfo{
11721 {0, 49135},
11722 },
11723 },
11724 },
11725 {
11726 name: "CMOVWGT",
11727 argLen: 3,
11728 resultInArg0: true,
11729 asm: x86.ACMOVWGT,
11730 reg: regInfo{
11731 inputs: []inputInfo{
11732 {0, 49135},
11733 {1, 49135},
11734 },
11735 outputs: []outputInfo{
11736 {0, 49135},
11737 },
11738 },
11739 },
11740 {
11741 name: "CMOVWLE",
11742 argLen: 3,
11743 resultInArg0: true,
11744 asm: x86.ACMOVWLE,
11745 reg: regInfo{
11746 inputs: []inputInfo{
11747 {0, 49135},
11748 {1, 49135},
11749 },
11750 outputs: []outputInfo{
11751 {0, 49135},
11752 },
11753 },
11754 },
11755 {
11756 name: "CMOVWGE",
11757 argLen: 3,
11758 resultInArg0: true,
11759 asm: x86.ACMOVWGE,
11760 reg: regInfo{
11761 inputs: []inputInfo{
11762 {0, 49135},
11763 {1, 49135},
11764 },
11765 outputs: []outputInfo{
11766 {0, 49135},
11767 },
11768 },
11769 },
11770 {
11771 name: "CMOVWLS",
11772 argLen: 3,
11773 resultInArg0: true,
11774 asm: x86.ACMOVWLS,
11775 reg: regInfo{
11776 inputs: []inputInfo{
11777 {0, 49135},
11778 {1, 49135},
11779 },
11780 outputs: []outputInfo{
11781 {0, 49135},
11782 },
11783 },
11784 },
11785 {
11786 name: "CMOVWHI",
11787 argLen: 3,
11788 resultInArg0: true,
11789 asm: x86.ACMOVWHI,
11790 reg: regInfo{
11791 inputs: []inputInfo{
11792 {0, 49135},
11793 {1, 49135},
11794 },
11795 outputs: []outputInfo{
11796 {0, 49135},
11797 },
11798 },
11799 },
11800 {
11801 name: "CMOVWCC",
11802 argLen: 3,
11803 resultInArg0: true,
11804 asm: x86.ACMOVWCC,
11805 reg: regInfo{
11806 inputs: []inputInfo{
11807 {0, 49135},
11808 {1, 49135},
11809 },
11810 outputs: []outputInfo{
11811 {0, 49135},
11812 },
11813 },
11814 },
11815 {
11816 name: "CMOVWCS",
11817 argLen: 3,
11818 resultInArg0: true,
11819 asm: x86.ACMOVWCS,
11820 reg: regInfo{
11821 inputs: []inputInfo{
11822 {0, 49135},
11823 {1, 49135},
11824 },
11825 outputs: []outputInfo{
11826 {0, 49135},
11827 },
11828 },
11829 },
11830 {
11831 name: "CMOVQEQF",
11832 argLen: 3,
11833 resultInArg0: true,
11834 needIntTemp: true,
11835 asm: x86.ACMOVQNE,
11836 reg: regInfo{
11837 inputs: []inputInfo{
11838 {0, 49135},
11839 {1, 49135},
11840 },
11841 outputs: []outputInfo{
11842 {0, 49135},
11843 },
11844 },
11845 },
11846 {
11847 name: "CMOVQNEF",
11848 argLen: 3,
11849 resultInArg0: true,
11850 asm: x86.ACMOVQNE,
11851 reg: regInfo{
11852 inputs: []inputInfo{
11853 {0, 49135},
11854 {1, 49135},
11855 },
11856 outputs: []outputInfo{
11857 {0, 49135},
11858 },
11859 },
11860 },
11861 {
11862 name: "CMOVQGTF",
11863 argLen: 3,
11864 resultInArg0: true,
11865 asm: x86.ACMOVQHI,
11866 reg: regInfo{
11867 inputs: []inputInfo{
11868 {0, 49135},
11869 {1, 49135},
11870 },
11871 outputs: []outputInfo{
11872 {0, 49135},
11873 },
11874 },
11875 },
11876 {
11877 name: "CMOVQGEF",
11878 argLen: 3,
11879 resultInArg0: true,
11880 asm: x86.ACMOVQCC,
11881 reg: regInfo{
11882 inputs: []inputInfo{
11883 {0, 49135},
11884 {1, 49135},
11885 },
11886 outputs: []outputInfo{
11887 {0, 49135},
11888 },
11889 },
11890 },
11891 {
11892 name: "CMOVLEQF",
11893 argLen: 3,
11894 resultInArg0: true,
11895 needIntTemp: true,
11896 asm: x86.ACMOVLNE,
11897 reg: regInfo{
11898 inputs: []inputInfo{
11899 {0, 49135},
11900 {1, 49135},
11901 },
11902 outputs: []outputInfo{
11903 {0, 49135},
11904 },
11905 },
11906 },
11907 {
11908 name: "CMOVLNEF",
11909 argLen: 3,
11910 resultInArg0: true,
11911 asm: x86.ACMOVLNE,
11912 reg: regInfo{
11913 inputs: []inputInfo{
11914 {0, 49135},
11915 {1, 49135},
11916 },
11917 outputs: []outputInfo{
11918 {0, 49135},
11919 },
11920 },
11921 },
11922 {
11923 name: "CMOVLGTF",
11924 argLen: 3,
11925 resultInArg0: true,
11926 asm: x86.ACMOVLHI,
11927 reg: regInfo{
11928 inputs: []inputInfo{
11929 {0, 49135},
11930 {1, 49135},
11931 },
11932 outputs: []outputInfo{
11933 {0, 49135},
11934 },
11935 },
11936 },
11937 {
11938 name: "CMOVLGEF",
11939 argLen: 3,
11940 resultInArg0: true,
11941 asm: x86.ACMOVLCC,
11942 reg: regInfo{
11943 inputs: []inputInfo{
11944 {0, 49135},
11945 {1, 49135},
11946 },
11947 outputs: []outputInfo{
11948 {0, 49135},
11949 },
11950 },
11951 },
11952 {
11953 name: "CMOVWEQF",
11954 argLen: 3,
11955 resultInArg0: true,
11956 needIntTemp: true,
11957 asm: x86.ACMOVWNE,
11958 reg: regInfo{
11959 inputs: []inputInfo{
11960 {0, 49135},
11961 {1, 49135},
11962 },
11963 outputs: []outputInfo{
11964 {0, 49135},
11965 },
11966 },
11967 },
11968 {
11969 name: "CMOVWNEF",
11970 argLen: 3,
11971 resultInArg0: true,
11972 asm: x86.ACMOVWNE,
11973 reg: regInfo{
11974 inputs: []inputInfo{
11975 {0, 49135},
11976 {1, 49135},
11977 },
11978 outputs: []outputInfo{
11979 {0, 49135},
11980 },
11981 },
11982 },
11983 {
11984 name: "CMOVWGTF",
11985 argLen: 3,
11986 resultInArg0: true,
11987 asm: x86.ACMOVWHI,
11988 reg: regInfo{
11989 inputs: []inputInfo{
11990 {0, 49135},
11991 {1, 49135},
11992 },
11993 outputs: []outputInfo{
11994 {0, 49135},
11995 },
11996 },
11997 },
11998 {
11999 name: "CMOVWGEF",
12000 argLen: 3,
12001 resultInArg0: true,
12002 asm: x86.ACMOVWCC,
12003 reg: regInfo{
12004 inputs: []inputInfo{
12005 {0, 49135},
12006 {1, 49135},
12007 },
12008 outputs: []outputInfo{
12009 {0, 49135},
12010 },
12011 },
12012 },
12013 {
12014 name: "BSWAPQ",
12015 argLen: 1,
12016 resultInArg0: true,
12017 asm: x86.ABSWAPQ,
12018 reg: regInfo{
12019 inputs: []inputInfo{
12020 {0, 49135},
12021 },
12022 outputs: []outputInfo{
12023 {0, 49135},
12024 },
12025 },
12026 },
12027 {
12028 name: "BSWAPL",
12029 argLen: 1,
12030 resultInArg0: true,
12031 asm: x86.ABSWAPL,
12032 reg: regInfo{
12033 inputs: []inputInfo{
12034 {0, 49135},
12035 },
12036 outputs: []outputInfo{
12037 {0, 49135},
12038 },
12039 },
12040 },
12041 {
12042 name: "POPCNTQ",
12043 argLen: 1,
12044 clobberFlags: true,
12045 asm: x86.APOPCNTQ,
12046 reg: regInfo{
12047 inputs: []inputInfo{
12048 {0, 49135},
12049 },
12050 outputs: []outputInfo{
12051 {0, 49135},
12052 },
12053 },
12054 },
12055 {
12056 name: "POPCNTL",
12057 argLen: 1,
12058 clobberFlags: true,
12059 asm: x86.APOPCNTL,
12060 reg: regInfo{
12061 inputs: []inputInfo{
12062 {0, 49135},
12063 },
12064 outputs: []outputInfo{
12065 {0, 49135},
12066 },
12067 },
12068 },
12069 {
12070 name: "SQRTSD",
12071 argLen: 1,
12072 asm: x86.ASQRTSD,
12073 reg: regInfo{
12074 inputs: []inputInfo{
12075 {0, 2147418112},
12076 },
12077 outputs: []outputInfo{
12078 {0, 2147418112},
12079 },
12080 },
12081 },
12082 {
12083 name: "SQRTSS",
12084 argLen: 1,
12085 asm: x86.ASQRTSS,
12086 reg: regInfo{
12087 inputs: []inputInfo{
12088 {0, 2147418112},
12089 },
12090 outputs: []outputInfo{
12091 {0, 2147418112},
12092 },
12093 },
12094 },
12095 {
12096 name: "ROUNDSD",
12097 auxType: auxInt8,
12098 argLen: 1,
12099 asm: x86.AROUNDSD,
12100 reg: regInfo{
12101 inputs: []inputInfo{
12102 {0, 2147418112},
12103 },
12104 outputs: []outputInfo{
12105 {0, 2147418112},
12106 },
12107 },
12108 },
12109 {
12110 name: "LoweredRound32F",
12111 argLen: 1,
12112 resultInArg0: true,
12113 zeroWidth: true,
12114 reg: regInfo{
12115 inputs: []inputInfo{
12116 {0, 2147418112},
12117 },
12118 outputs: []outputInfo{
12119 {0, 2147418112},
12120 },
12121 },
12122 },
12123 {
12124 name: "LoweredRound64F",
12125 argLen: 1,
12126 resultInArg0: true,
12127 zeroWidth: true,
12128 reg: regInfo{
12129 inputs: []inputInfo{
12130 {0, 2147418112},
12131 },
12132 outputs: []outputInfo{
12133 {0, 2147418112},
12134 },
12135 },
12136 },
12137 {
12138 name: "VFMADD231SS",
12139 argLen: 3,
12140 resultInArg0: true,
12141 asm: x86.AVFMADD231SS,
12142 reg: regInfo{
12143 inputs: []inputInfo{
12144 {0, 2147418112},
12145 {1, 2147418112},
12146 {2, 2147418112},
12147 },
12148 outputs: []outputInfo{
12149 {0, 2147418112},
12150 },
12151 },
12152 },
12153 {
12154 name: "VFMADD231SD",
12155 argLen: 3,
12156 resultInArg0: true,
12157 asm: x86.AVFMADD231SD,
12158 reg: regInfo{
12159 inputs: []inputInfo{
12160 {0, 2147418112},
12161 {1, 2147418112},
12162 {2, 2147418112},
12163 },
12164 outputs: []outputInfo{
12165 {0, 2147418112},
12166 },
12167 },
12168 },
12169 {
12170 name: "MINSD",
12171 argLen: 2,
12172 resultInArg0: true,
12173 asm: x86.AMINSD,
12174 reg: regInfo{
12175 inputs: []inputInfo{
12176 {0, 2147418112},
12177 {1, 2147418112},
12178 },
12179 outputs: []outputInfo{
12180 {0, 2147418112},
12181 },
12182 },
12183 },
12184 {
12185 name: "MINSS",
12186 argLen: 2,
12187 resultInArg0: true,
12188 asm: x86.AMINSS,
12189 reg: regInfo{
12190 inputs: []inputInfo{
12191 {0, 2147418112},
12192 {1, 2147418112},
12193 },
12194 outputs: []outputInfo{
12195 {0, 2147418112},
12196 },
12197 },
12198 },
12199 {
12200 name: "SBBQcarrymask",
12201 argLen: 1,
12202 asm: x86.ASBBQ,
12203 reg: regInfo{
12204 outputs: []outputInfo{
12205 {0, 49135},
12206 },
12207 },
12208 },
12209 {
12210 name: "SBBLcarrymask",
12211 argLen: 1,
12212 asm: x86.ASBBL,
12213 reg: regInfo{
12214 outputs: []outputInfo{
12215 {0, 49135},
12216 },
12217 },
12218 },
12219 {
12220 name: "SETEQ",
12221 argLen: 1,
12222 asm: x86.ASETEQ,
12223 reg: regInfo{
12224 outputs: []outputInfo{
12225 {0, 49135},
12226 },
12227 },
12228 },
12229 {
12230 name: "SETNE",
12231 argLen: 1,
12232 asm: x86.ASETNE,
12233 reg: regInfo{
12234 outputs: []outputInfo{
12235 {0, 49135},
12236 },
12237 },
12238 },
12239 {
12240 name: "SETL",
12241 argLen: 1,
12242 asm: x86.ASETLT,
12243 reg: regInfo{
12244 outputs: []outputInfo{
12245 {0, 49135},
12246 },
12247 },
12248 },
12249 {
12250 name: "SETLE",
12251 argLen: 1,
12252 asm: x86.ASETLE,
12253 reg: regInfo{
12254 outputs: []outputInfo{
12255 {0, 49135},
12256 },
12257 },
12258 },
12259 {
12260 name: "SETG",
12261 argLen: 1,
12262 asm: x86.ASETGT,
12263 reg: regInfo{
12264 outputs: []outputInfo{
12265 {0, 49135},
12266 },
12267 },
12268 },
12269 {
12270 name: "SETGE",
12271 argLen: 1,
12272 asm: x86.ASETGE,
12273 reg: regInfo{
12274 outputs: []outputInfo{
12275 {0, 49135},
12276 },
12277 },
12278 },
12279 {
12280 name: "SETB",
12281 argLen: 1,
12282 asm: x86.ASETCS,
12283 reg: regInfo{
12284 outputs: []outputInfo{
12285 {0, 49135},
12286 },
12287 },
12288 },
12289 {
12290 name: "SETBE",
12291 argLen: 1,
12292 asm: x86.ASETLS,
12293 reg: regInfo{
12294 outputs: []outputInfo{
12295 {0, 49135},
12296 },
12297 },
12298 },
12299 {
12300 name: "SETA",
12301 argLen: 1,
12302 asm: x86.ASETHI,
12303 reg: regInfo{
12304 outputs: []outputInfo{
12305 {0, 49135},
12306 },
12307 },
12308 },
12309 {
12310 name: "SETAE",
12311 argLen: 1,
12312 asm: x86.ASETCC,
12313 reg: regInfo{
12314 outputs: []outputInfo{
12315 {0, 49135},
12316 },
12317 },
12318 },
12319 {
12320 name: "SETO",
12321 argLen: 1,
12322 asm: x86.ASETOS,
12323 reg: regInfo{
12324 outputs: []outputInfo{
12325 {0, 49135},
12326 },
12327 },
12328 },
12329 {
12330 name: "SETEQstore",
12331 auxType: auxSymOff,
12332 argLen: 3,
12333 faultOnNilArg0: true,
12334 symEffect: SymWrite,
12335 asm: x86.ASETEQ,
12336 reg: regInfo{
12337 inputs: []inputInfo{
12338 {0, 4295032831},
12339 },
12340 },
12341 },
12342 {
12343 name: "SETNEstore",
12344 auxType: auxSymOff,
12345 argLen: 3,
12346 faultOnNilArg0: true,
12347 symEffect: SymWrite,
12348 asm: x86.ASETNE,
12349 reg: regInfo{
12350 inputs: []inputInfo{
12351 {0, 4295032831},
12352 },
12353 },
12354 },
12355 {
12356 name: "SETLstore",
12357 auxType: auxSymOff,
12358 argLen: 3,
12359 faultOnNilArg0: true,
12360 symEffect: SymWrite,
12361 asm: x86.ASETLT,
12362 reg: regInfo{
12363 inputs: []inputInfo{
12364 {0, 4295032831},
12365 },
12366 },
12367 },
12368 {
12369 name: "SETLEstore",
12370 auxType: auxSymOff,
12371 argLen: 3,
12372 faultOnNilArg0: true,
12373 symEffect: SymWrite,
12374 asm: x86.ASETLE,
12375 reg: regInfo{
12376 inputs: []inputInfo{
12377 {0, 4295032831},
12378 },
12379 },
12380 },
12381 {
12382 name: "SETGstore",
12383 auxType: auxSymOff,
12384 argLen: 3,
12385 faultOnNilArg0: true,
12386 symEffect: SymWrite,
12387 asm: x86.ASETGT,
12388 reg: regInfo{
12389 inputs: []inputInfo{
12390 {0, 4295032831},
12391 },
12392 },
12393 },
12394 {
12395 name: "SETGEstore",
12396 auxType: auxSymOff,
12397 argLen: 3,
12398 faultOnNilArg0: true,
12399 symEffect: SymWrite,
12400 asm: x86.ASETGE,
12401 reg: regInfo{
12402 inputs: []inputInfo{
12403 {0, 4295032831},
12404 },
12405 },
12406 },
12407 {
12408 name: "SETBstore",
12409 auxType: auxSymOff,
12410 argLen: 3,
12411 faultOnNilArg0: true,
12412 symEffect: SymWrite,
12413 asm: x86.ASETCS,
12414 reg: regInfo{
12415 inputs: []inputInfo{
12416 {0, 4295032831},
12417 },
12418 },
12419 },
12420 {
12421 name: "SETBEstore",
12422 auxType: auxSymOff,
12423 argLen: 3,
12424 faultOnNilArg0: true,
12425 symEffect: SymWrite,
12426 asm: x86.ASETLS,
12427 reg: regInfo{
12428 inputs: []inputInfo{
12429 {0, 4295032831},
12430 },
12431 },
12432 },
12433 {
12434 name: "SETAstore",
12435 auxType: auxSymOff,
12436 argLen: 3,
12437 faultOnNilArg0: true,
12438 symEffect: SymWrite,
12439 asm: x86.ASETHI,
12440 reg: regInfo{
12441 inputs: []inputInfo{
12442 {0, 4295032831},
12443 },
12444 },
12445 },
12446 {
12447 name: "SETAEstore",
12448 auxType: auxSymOff,
12449 argLen: 3,
12450 faultOnNilArg0: true,
12451 symEffect: SymWrite,
12452 asm: x86.ASETCC,
12453 reg: regInfo{
12454 inputs: []inputInfo{
12455 {0, 4295032831},
12456 },
12457 },
12458 },
12459 {
12460 name: "SETEQstoreidx1",
12461 auxType: auxSymOff,
12462 argLen: 4,
12463 commutative: true,
12464 symEffect: SymWrite,
12465 asm: x86.ASETEQ,
12466 scale: 1,
12467 reg: regInfo{
12468 inputs: []inputInfo{
12469 {1, 49151},
12470 {0, 4295032831},
12471 },
12472 },
12473 },
12474 {
12475 name: "SETNEstoreidx1",
12476 auxType: auxSymOff,
12477 argLen: 4,
12478 commutative: true,
12479 symEffect: SymWrite,
12480 asm: x86.ASETNE,
12481 scale: 1,
12482 reg: regInfo{
12483 inputs: []inputInfo{
12484 {1, 49151},
12485 {0, 4295032831},
12486 },
12487 },
12488 },
12489 {
12490 name: "SETLstoreidx1",
12491 auxType: auxSymOff,
12492 argLen: 4,
12493 commutative: true,
12494 symEffect: SymWrite,
12495 asm: x86.ASETLT,
12496 scale: 1,
12497 reg: regInfo{
12498 inputs: []inputInfo{
12499 {1, 49151},
12500 {0, 4295032831},
12501 },
12502 },
12503 },
12504 {
12505 name: "SETLEstoreidx1",
12506 auxType: auxSymOff,
12507 argLen: 4,
12508 commutative: true,
12509 symEffect: SymWrite,
12510 asm: x86.ASETLE,
12511 scale: 1,
12512 reg: regInfo{
12513 inputs: []inputInfo{
12514 {1, 49151},
12515 {0, 4295032831},
12516 },
12517 },
12518 },
12519 {
12520 name: "SETGstoreidx1",
12521 auxType: auxSymOff,
12522 argLen: 4,
12523 commutative: true,
12524 symEffect: SymWrite,
12525 asm: x86.ASETGT,
12526 scale: 1,
12527 reg: regInfo{
12528 inputs: []inputInfo{
12529 {1, 49151},
12530 {0, 4295032831},
12531 },
12532 },
12533 },
12534 {
12535 name: "SETGEstoreidx1",
12536 auxType: auxSymOff,
12537 argLen: 4,
12538 commutative: true,
12539 symEffect: SymWrite,
12540 asm: x86.ASETGE,
12541 scale: 1,
12542 reg: regInfo{
12543 inputs: []inputInfo{
12544 {1, 49151},
12545 {0, 4295032831},
12546 },
12547 },
12548 },
12549 {
12550 name: "SETBstoreidx1",
12551 auxType: auxSymOff,
12552 argLen: 4,
12553 commutative: true,
12554 symEffect: SymWrite,
12555 asm: x86.ASETCS,
12556 scale: 1,
12557 reg: regInfo{
12558 inputs: []inputInfo{
12559 {1, 49151},
12560 {0, 4295032831},
12561 },
12562 },
12563 },
12564 {
12565 name: "SETBEstoreidx1",
12566 auxType: auxSymOff,
12567 argLen: 4,
12568 commutative: true,
12569 symEffect: SymWrite,
12570 asm: x86.ASETLS,
12571 scale: 1,
12572 reg: regInfo{
12573 inputs: []inputInfo{
12574 {1, 49151},
12575 {0, 4295032831},
12576 },
12577 },
12578 },
12579 {
12580 name: "SETAstoreidx1",
12581 auxType: auxSymOff,
12582 argLen: 4,
12583 commutative: true,
12584 symEffect: SymWrite,
12585 asm: x86.ASETHI,
12586 scale: 1,
12587 reg: regInfo{
12588 inputs: []inputInfo{
12589 {1, 49151},
12590 {0, 4295032831},
12591 },
12592 },
12593 },
12594 {
12595 name: "SETAEstoreidx1",
12596 auxType: auxSymOff,
12597 argLen: 4,
12598 commutative: true,
12599 symEffect: SymWrite,
12600 asm: x86.ASETCC,
12601 scale: 1,
12602 reg: regInfo{
12603 inputs: []inputInfo{
12604 {1, 49151},
12605 {0, 4295032831},
12606 },
12607 },
12608 },
12609 {
12610 name: "SETEQF",
12611 argLen: 1,
12612 clobberFlags: true,
12613 needIntTemp: true,
12614 asm: x86.ASETEQ,
12615 reg: regInfo{
12616 outputs: []outputInfo{
12617 {0, 49135},
12618 },
12619 },
12620 },
12621 {
12622 name: "SETNEF",
12623 argLen: 1,
12624 clobberFlags: true,
12625 needIntTemp: true,
12626 asm: x86.ASETNE,
12627 reg: regInfo{
12628 outputs: []outputInfo{
12629 {0, 49135},
12630 },
12631 },
12632 },
12633 {
12634 name: "SETORD",
12635 argLen: 1,
12636 asm: x86.ASETPC,
12637 reg: regInfo{
12638 outputs: []outputInfo{
12639 {0, 49135},
12640 },
12641 },
12642 },
12643 {
12644 name: "SETNAN",
12645 argLen: 1,
12646 asm: x86.ASETPS,
12647 reg: regInfo{
12648 outputs: []outputInfo{
12649 {0, 49135},
12650 },
12651 },
12652 },
12653 {
12654 name: "SETGF",
12655 argLen: 1,
12656 asm: x86.ASETHI,
12657 reg: regInfo{
12658 outputs: []outputInfo{
12659 {0, 49135},
12660 },
12661 },
12662 },
12663 {
12664 name: "SETGEF",
12665 argLen: 1,
12666 asm: x86.ASETCC,
12667 reg: regInfo{
12668 outputs: []outputInfo{
12669 {0, 49135},
12670 },
12671 },
12672 },
12673 {
12674 name: "MOVBQSX",
12675 argLen: 1,
12676 asm: x86.AMOVBQSX,
12677 reg: regInfo{
12678 inputs: []inputInfo{
12679 {0, 49135},
12680 },
12681 outputs: []outputInfo{
12682 {0, 49135},
12683 },
12684 },
12685 },
12686 {
12687 name: "MOVBQZX",
12688 argLen: 1,
12689 asm: x86.AMOVBLZX,
12690 reg: regInfo{
12691 inputs: []inputInfo{
12692 {0, 49135},
12693 },
12694 outputs: []outputInfo{
12695 {0, 49135},
12696 },
12697 },
12698 },
12699 {
12700 name: "MOVWQSX",
12701 argLen: 1,
12702 asm: x86.AMOVWQSX,
12703 reg: regInfo{
12704 inputs: []inputInfo{
12705 {0, 49135},
12706 },
12707 outputs: []outputInfo{
12708 {0, 49135},
12709 },
12710 },
12711 },
12712 {
12713 name: "MOVWQZX",
12714 argLen: 1,
12715 asm: x86.AMOVWLZX,
12716 reg: regInfo{
12717 inputs: []inputInfo{
12718 {0, 49135},
12719 },
12720 outputs: []outputInfo{
12721 {0, 49135},
12722 },
12723 },
12724 },
12725 {
12726 name: "MOVLQSX",
12727 argLen: 1,
12728 asm: x86.AMOVLQSX,
12729 reg: regInfo{
12730 inputs: []inputInfo{
12731 {0, 49135},
12732 },
12733 outputs: []outputInfo{
12734 {0, 49135},
12735 },
12736 },
12737 },
12738 {
12739 name: "MOVLQZX",
12740 argLen: 1,
12741 asm: x86.AMOVL,
12742 reg: regInfo{
12743 inputs: []inputInfo{
12744 {0, 49135},
12745 },
12746 outputs: []outputInfo{
12747 {0, 49135},
12748 },
12749 },
12750 },
12751 {
12752 name: "MOVLconst",
12753 auxType: auxInt32,
12754 argLen: 0,
12755 rematerializeable: true,
12756 asm: x86.AMOVL,
12757 reg: regInfo{
12758 outputs: []outputInfo{
12759 {0, 49135},
12760 },
12761 },
12762 },
12763 {
12764 name: "MOVQconst",
12765 auxType: auxInt64,
12766 argLen: 0,
12767 rematerializeable: true,
12768 asm: x86.AMOVQ,
12769 reg: regInfo{
12770 outputs: []outputInfo{
12771 {0, 49135},
12772 },
12773 },
12774 },
12775 {
12776 name: "CVTTSD2SL",
12777 argLen: 1,
12778 asm: x86.ACVTTSD2SL,
12779 reg: regInfo{
12780 inputs: []inputInfo{
12781 {0, 2147418112},
12782 },
12783 outputs: []outputInfo{
12784 {0, 49135},
12785 },
12786 },
12787 },
12788 {
12789 name: "CVTTSD2SQ",
12790 argLen: 1,
12791 asm: x86.ACVTTSD2SQ,
12792 reg: regInfo{
12793 inputs: []inputInfo{
12794 {0, 2147418112},
12795 },
12796 outputs: []outputInfo{
12797 {0, 49135},
12798 },
12799 },
12800 },
12801 {
12802 name: "CVTTSS2SL",
12803 argLen: 1,
12804 asm: x86.ACVTTSS2SL,
12805 reg: regInfo{
12806 inputs: []inputInfo{
12807 {0, 2147418112},
12808 },
12809 outputs: []outputInfo{
12810 {0, 49135},
12811 },
12812 },
12813 },
12814 {
12815 name: "CVTTSS2SQ",
12816 argLen: 1,
12817 asm: x86.ACVTTSS2SQ,
12818 reg: regInfo{
12819 inputs: []inputInfo{
12820 {0, 2147418112},
12821 },
12822 outputs: []outputInfo{
12823 {0, 49135},
12824 },
12825 },
12826 },
12827 {
12828 name: "CVTSL2SS",
12829 argLen: 1,
12830 asm: x86.ACVTSL2SS,
12831 reg: regInfo{
12832 inputs: []inputInfo{
12833 {0, 49135},
12834 },
12835 outputs: []outputInfo{
12836 {0, 2147418112},
12837 },
12838 },
12839 },
12840 {
12841 name: "CVTSL2SD",
12842 argLen: 1,
12843 asm: x86.ACVTSL2SD,
12844 reg: regInfo{
12845 inputs: []inputInfo{
12846 {0, 49135},
12847 },
12848 outputs: []outputInfo{
12849 {0, 2147418112},
12850 },
12851 },
12852 },
12853 {
12854 name: "CVTSQ2SS",
12855 argLen: 1,
12856 asm: x86.ACVTSQ2SS,
12857 reg: regInfo{
12858 inputs: []inputInfo{
12859 {0, 49135},
12860 },
12861 outputs: []outputInfo{
12862 {0, 2147418112},
12863 },
12864 },
12865 },
12866 {
12867 name: "CVTSQ2SD",
12868 argLen: 1,
12869 asm: x86.ACVTSQ2SD,
12870 reg: regInfo{
12871 inputs: []inputInfo{
12872 {0, 49135},
12873 },
12874 outputs: []outputInfo{
12875 {0, 2147418112},
12876 },
12877 },
12878 },
12879 {
12880 name: "CVTSD2SS",
12881 argLen: 1,
12882 asm: x86.ACVTSD2SS,
12883 reg: regInfo{
12884 inputs: []inputInfo{
12885 {0, 2147418112},
12886 },
12887 outputs: []outputInfo{
12888 {0, 2147418112},
12889 },
12890 },
12891 },
12892 {
12893 name: "CVTSS2SD",
12894 argLen: 1,
12895 asm: x86.ACVTSS2SD,
12896 reg: regInfo{
12897 inputs: []inputInfo{
12898 {0, 2147418112},
12899 },
12900 outputs: []outputInfo{
12901 {0, 2147418112},
12902 },
12903 },
12904 },
12905 {
12906 name: "MOVQi2f",
12907 argLen: 1,
12908 reg: regInfo{
12909 inputs: []inputInfo{
12910 {0, 49135},
12911 },
12912 outputs: []outputInfo{
12913 {0, 2147418112},
12914 },
12915 },
12916 },
12917 {
12918 name: "MOVQf2i",
12919 argLen: 1,
12920 reg: regInfo{
12921 inputs: []inputInfo{
12922 {0, 2147418112},
12923 },
12924 outputs: []outputInfo{
12925 {0, 49135},
12926 },
12927 },
12928 },
12929 {
12930 name: "MOVLi2f",
12931 argLen: 1,
12932 reg: regInfo{
12933 inputs: []inputInfo{
12934 {0, 49135},
12935 },
12936 outputs: []outputInfo{
12937 {0, 2147418112},
12938 },
12939 },
12940 },
12941 {
12942 name: "MOVLf2i",
12943 argLen: 1,
12944 reg: regInfo{
12945 inputs: []inputInfo{
12946 {0, 2147418112},
12947 },
12948 outputs: []outputInfo{
12949 {0, 49135},
12950 },
12951 },
12952 },
12953 {
12954 name: "PXOR",
12955 argLen: 2,
12956 commutative: true,
12957 resultInArg0: true,
12958 asm: x86.APXOR,
12959 reg: regInfo{
12960 inputs: []inputInfo{
12961 {0, 2147418112},
12962 {1, 2147418112},
12963 },
12964 outputs: []outputInfo{
12965 {0, 2147418112},
12966 },
12967 },
12968 },
12969 {
12970 name: "POR",
12971 argLen: 2,
12972 commutative: true,
12973 resultInArg0: true,
12974 asm: x86.APOR,
12975 reg: regInfo{
12976 inputs: []inputInfo{
12977 {0, 2147418112},
12978 {1, 2147418112},
12979 },
12980 outputs: []outputInfo{
12981 {0, 2147418112},
12982 },
12983 },
12984 },
12985 {
12986 name: "LEAQ",
12987 auxType: auxSymOff,
12988 argLen: 1,
12989 rematerializeable: true,
12990 symEffect: SymAddr,
12991 asm: x86.ALEAQ,
12992 reg: regInfo{
12993 inputs: []inputInfo{
12994 {0, 4295032831},
12995 },
12996 outputs: []outputInfo{
12997 {0, 49135},
12998 },
12999 },
13000 },
13001 {
13002 name: "LEAL",
13003 auxType: auxSymOff,
13004 argLen: 1,
13005 rematerializeable: true,
13006 symEffect: SymAddr,
13007 asm: x86.ALEAL,
13008 reg: regInfo{
13009 inputs: []inputInfo{
13010 {0, 4295032831},
13011 },
13012 outputs: []outputInfo{
13013 {0, 49135},
13014 },
13015 },
13016 },
13017 {
13018 name: "LEAW",
13019 auxType: auxSymOff,
13020 argLen: 1,
13021 rematerializeable: true,
13022 symEffect: SymAddr,
13023 asm: x86.ALEAW,
13024 reg: regInfo{
13025 inputs: []inputInfo{
13026 {0, 4295032831},
13027 },
13028 outputs: []outputInfo{
13029 {0, 49135},
13030 },
13031 },
13032 },
13033 {
13034 name: "LEAQ1",
13035 auxType: auxSymOff,
13036 argLen: 2,
13037 commutative: true,
13038 symEffect: SymAddr,
13039 asm: x86.ALEAQ,
13040 scale: 1,
13041 reg: regInfo{
13042 inputs: []inputInfo{
13043 {1, 49151},
13044 {0, 4295032831},
13045 },
13046 outputs: []outputInfo{
13047 {0, 49135},
13048 },
13049 },
13050 },
13051 {
13052 name: "LEAL1",
13053 auxType: auxSymOff,
13054 argLen: 2,
13055 commutative: true,
13056 symEffect: SymAddr,
13057 asm: x86.ALEAL,
13058 scale: 1,
13059 reg: regInfo{
13060 inputs: []inputInfo{
13061 {1, 49151},
13062 {0, 4295032831},
13063 },
13064 outputs: []outputInfo{
13065 {0, 49135},
13066 },
13067 },
13068 },
13069 {
13070 name: "LEAW1",
13071 auxType: auxSymOff,
13072 argLen: 2,
13073 commutative: true,
13074 symEffect: SymAddr,
13075 asm: x86.ALEAW,
13076 scale: 1,
13077 reg: regInfo{
13078 inputs: []inputInfo{
13079 {1, 49151},
13080 {0, 4295032831},
13081 },
13082 outputs: []outputInfo{
13083 {0, 49135},
13084 },
13085 },
13086 },
13087 {
13088 name: "LEAQ2",
13089 auxType: auxSymOff,
13090 argLen: 2,
13091 symEffect: SymAddr,
13092 asm: x86.ALEAQ,
13093 scale: 2,
13094 reg: regInfo{
13095 inputs: []inputInfo{
13096 {1, 49151},
13097 {0, 4295032831},
13098 },
13099 outputs: []outputInfo{
13100 {0, 49135},
13101 },
13102 },
13103 },
13104 {
13105 name: "LEAL2",
13106 auxType: auxSymOff,
13107 argLen: 2,
13108 symEffect: SymAddr,
13109 asm: x86.ALEAL,
13110 scale: 2,
13111 reg: regInfo{
13112 inputs: []inputInfo{
13113 {1, 49151},
13114 {0, 4295032831},
13115 },
13116 outputs: []outputInfo{
13117 {0, 49135},
13118 },
13119 },
13120 },
13121 {
13122 name: "LEAW2",
13123 auxType: auxSymOff,
13124 argLen: 2,
13125 symEffect: SymAddr,
13126 asm: x86.ALEAW,
13127 scale: 2,
13128 reg: regInfo{
13129 inputs: []inputInfo{
13130 {1, 49151},
13131 {0, 4295032831},
13132 },
13133 outputs: []outputInfo{
13134 {0, 49135},
13135 },
13136 },
13137 },
13138 {
13139 name: "LEAQ4",
13140 auxType: auxSymOff,
13141 argLen: 2,
13142 symEffect: SymAddr,
13143 asm: x86.ALEAQ,
13144 scale: 4,
13145 reg: regInfo{
13146 inputs: []inputInfo{
13147 {1, 49151},
13148 {0, 4295032831},
13149 },
13150 outputs: []outputInfo{
13151 {0, 49135},
13152 },
13153 },
13154 },
13155 {
13156 name: "LEAL4",
13157 auxType: auxSymOff,
13158 argLen: 2,
13159 symEffect: SymAddr,
13160 asm: x86.ALEAL,
13161 scale: 4,
13162 reg: regInfo{
13163 inputs: []inputInfo{
13164 {1, 49151},
13165 {0, 4295032831},
13166 },
13167 outputs: []outputInfo{
13168 {0, 49135},
13169 },
13170 },
13171 },
13172 {
13173 name: "LEAW4",
13174 auxType: auxSymOff,
13175 argLen: 2,
13176 symEffect: SymAddr,
13177 asm: x86.ALEAW,
13178 scale: 4,
13179 reg: regInfo{
13180 inputs: []inputInfo{
13181 {1, 49151},
13182 {0, 4295032831},
13183 },
13184 outputs: []outputInfo{
13185 {0, 49135},
13186 },
13187 },
13188 },
13189 {
13190 name: "LEAQ8",
13191 auxType: auxSymOff,
13192 argLen: 2,
13193 symEffect: SymAddr,
13194 asm: x86.ALEAQ,
13195 scale: 8,
13196 reg: regInfo{
13197 inputs: []inputInfo{
13198 {1, 49151},
13199 {0, 4295032831},
13200 },
13201 outputs: []outputInfo{
13202 {0, 49135},
13203 },
13204 },
13205 },
13206 {
13207 name: "LEAL8",
13208 auxType: auxSymOff,
13209 argLen: 2,
13210 symEffect: SymAddr,
13211 asm: x86.ALEAL,
13212 scale: 8,
13213 reg: regInfo{
13214 inputs: []inputInfo{
13215 {1, 49151},
13216 {0, 4295032831},
13217 },
13218 outputs: []outputInfo{
13219 {0, 49135},
13220 },
13221 },
13222 },
13223 {
13224 name: "LEAW8",
13225 auxType: auxSymOff,
13226 argLen: 2,
13227 symEffect: SymAddr,
13228 asm: x86.ALEAW,
13229 scale: 8,
13230 reg: regInfo{
13231 inputs: []inputInfo{
13232 {1, 49151},
13233 {0, 4295032831},
13234 },
13235 outputs: []outputInfo{
13236 {0, 49135},
13237 },
13238 },
13239 },
13240 {
13241 name: "MOVBload",
13242 auxType: auxSymOff,
13243 argLen: 2,
13244 faultOnNilArg0: true,
13245 symEffect: SymRead,
13246 asm: x86.AMOVBLZX,
13247 reg: regInfo{
13248 inputs: []inputInfo{
13249 {0, 4295032831},
13250 },
13251 outputs: []outputInfo{
13252 {0, 49135},
13253 },
13254 },
13255 },
13256 {
13257 name: "MOVBQSXload",
13258 auxType: auxSymOff,
13259 argLen: 2,
13260 faultOnNilArg0: true,
13261 symEffect: SymRead,
13262 asm: x86.AMOVBQSX,
13263 reg: regInfo{
13264 inputs: []inputInfo{
13265 {0, 4295032831},
13266 },
13267 outputs: []outputInfo{
13268 {0, 49135},
13269 },
13270 },
13271 },
13272 {
13273 name: "MOVWload",
13274 auxType: auxSymOff,
13275 argLen: 2,
13276 faultOnNilArg0: true,
13277 symEffect: SymRead,
13278 asm: x86.AMOVWLZX,
13279 reg: regInfo{
13280 inputs: []inputInfo{
13281 {0, 4295032831},
13282 },
13283 outputs: []outputInfo{
13284 {0, 49135},
13285 },
13286 },
13287 },
13288 {
13289 name: "MOVWQSXload",
13290 auxType: auxSymOff,
13291 argLen: 2,
13292 faultOnNilArg0: true,
13293 symEffect: SymRead,
13294 asm: x86.AMOVWQSX,
13295 reg: regInfo{
13296 inputs: []inputInfo{
13297 {0, 4295032831},
13298 },
13299 outputs: []outputInfo{
13300 {0, 49135},
13301 },
13302 },
13303 },
13304 {
13305 name: "MOVLload",
13306 auxType: auxSymOff,
13307 argLen: 2,
13308 faultOnNilArg0: true,
13309 symEffect: SymRead,
13310 asm: x86.AMOVL,
13311 reg: regInfo{
13312 inputs: []inputInfo{
13313 {0, 4295032831},
13314 },
13315 outputs: []outputInfo{
13316 {0, 49135},
13317 },
13318 },
13319 },
13320 {
13321 name: "MOVLQSXload",
13322 auxType: auxSymOff,
13323 argLen: 2,
13324 faultOnNilArg0: true,
13325 symEffect: SymRead,
13326 asm: x86.AMOVLQSX,
13327 reg: regInfo{
13328 inputs: []inputInfo{
13329 {0, 4295032831},
13330 },
13331 outputs: []outputInfo{
13332 {0, 49135},
13333 },
13334 },
13335 },
13336 {
13337 name: "MOVQload",
13338 auxType: auxSymOff,
13339 argLen: 2,
13340 faultOnNilArg0: true,
13341 symEffect: SymRead,
13342 asm: x86.AMOVQ,
13343 reg: regInfo{
13344 inputs: []inputInfo{
13345 {0, 4295032831},
13346 },
13347 outputs: []outputInfo{
13348 {0, 49135},
13349 },
13350 },
13351 },
13352 {
13353 name: "MOVBstore",
13354 auxType: auxSymOff,
13355 argLen: 3,
13356 faultOnNilArg0: true,
13357 symEffect: SymWrite,
13358 asm: x86.AMOVB,
13359 reg: regInfo{
13360 inputs: []inputInfo{
13361 {1, 49151},
13362 {0, 4295032831},
13363 },
13364 },
13365 },
13366 {
13367 name: "MOVWstore",
13368 auxType: auxSymOff,
13369 argLen: 3,
13370 faultOnNilArg0: true,
13371 symEffect: SymWrite,
13372 asm: x86.AMOVW,
13373 reg: regInfo{
13374 inputs: []inputInfo{
13375 {1, 49151},
13376 {0, 4295032831},
13377 },
13378 },
13379 },
13380 {
13381 name: "MOVLstore",
13382 auxType: auxSymOff,
13383 argLen: 3,
13384 faultOnNilArg0: true,
13385 symEffect: SymWrite,
13386 asm: x86.AMOVL,
13387 reg: regInfo{
13388 inputs: []inputInfo{
13389 {1, 49151},
13390 {0, 4295032831},
13391 },
13392 },
13393 },
13394 {
13395 name: "MOVQstore",
13396 auxType: auxSymOff,
13397 argLen: 3,
13398 faultOnNilArg0: true,
13399 symEffect: SymWrite,
13400 asm: x86.AMOVQ,
13401 reg: regInfo{
13402 inputs: []inputInfo{
13403 {1, 49151},
13404 {0, 4295032831},
13405 },
13406 },
13407 },
13408 {
13409 name: "MOVOload",
13410 auxType: auxSymOff,
13411 argLen: 2,
13412 faultOnNilArg0: true,
13413 symEffect: SymRead,
13414 asm: x86.AMOVUPS,
13415 reg: regInfo{
13416 inputs: []inputInfo{
13417 {0, 4295016447},
13418 },
13419 outputs: []outputInfo{
13420 {0, 2147418112},
13421 },
13422 },
13423 },
13424 {
13425 name: "MOVOstore",
13426 auxType: auxSymOff,
13427 argLen: 3,
13428 faultOnNilArg0: true,
13429 symEffect: SymWrite,
13430 asm: x86.AMOVUPS,
13431 reg: regInfo{
13432 inputs: []inputInfo{
13433 {1, 2147418112},
13434 {0, 4295016447},
13435 },
13436 },
13437 },
13438 {
13439 name: "MOVBloadidx1",
13440 auxType: auxSymOff,
13441 argLen: 3,
13442 commutative: true,
13443 symEffect: SymRead,
13444 asm: x86.AMOVBLZX,
13445 scale: 1,
13446 reg: regInfo{
13447 inputs: []inputInfo{
13448 {1, 49151},
13449 {0, 4295032831},
13450 },
13451 outputs: []outputInfo{
13452 {0, 49135},
13453 },
13454 },
13455 },
13456 {
13457 name: "MOVWloadidx1",
13458 auxType: auxSymOff,
13459 argLen: 3,
13460 commutative: true,
13461 symEffect: SymRead,
13462 asm: x86.AMOVWLZX,
13463 scale: 1,
13464 reg: regInfo{
13465 inputs: []inputInfo{
13466 {1, 49151},
13467 {0, 4295032831},
13468 },
13469 outputs: []outputInfo{
13470 {0, 49135},
13471 },
13472 },
13473 },
13474 {
13475 name: "MOVWloadidx2",
13476 auxType: auxSymOff,
13477 argLen: 3,
13478 symEffect: SymRead,
13479 asm: x86.AMOVWLZX,
13480 scale: 2,
13481 reg: regInfo{
13482 inputs: []inputInfo{
13483 {1, 49151},
13484 {0, 4295032831},
13485 },
13486 outputs: []outputInfo{
13487 {0, 49135},
13488 },
13489 },
13490 },
13491 {
13492 name: "MOVLloadidx1",
13493 auxType: auxSymOff,
13494 argLen: 3,
13495 commutative: true,
13496 symEffect: SymRead,
13497 asm: x86.AMOVL,
13498 scale: 1,
13499 reg: regInfo{
13500 inputs: []inputInfo{
13501 {1, 49151},
13502 {0, 4295032831},
13503 },
13504 outputs: []outputInfo{
13505 {0, 49135},
13506 },
13507 },
13508 },
13509 {
13510 name: "MOVLloadidx4",
13511 auxType: auxSymOff,
13512 argLen: 3,
13513 symEffect: SymRead,
13514 asm: x86.AMOVL,
13515 scale: 4,
13516 reg: regInfo{
13517 inputs: []inputInfo{
13518 {1, 49151},
13519 {0, 4295032831},
13520 },
13521 outputs: []outputInfo{
13522 {0, 49135},
13523 },
13524 },
13525 },
13526 {
13527 name: "MOVLloadidx8",
13528 auxType: auxSymOff,
13529 argLen: 3,
13530 symEffect: SymRead,
13531 asm: x86.AMOVL,
13532 scale: 8,
13533 reg: regInfo{
13534 inputs: []inputInfo{
13535 {1, 49151},
13536 {0, 4295032831},
13537 },
13538 outputs: []outputInfo{
13539 {0, 49135},
13540 },
13541 },
13542 },
13543 {
13544 name: "MOVQloadidx1",
13545 auxType: auxSymOff,
13546 argLen: 3,
13547 commutative: true,
13548 symEffect: SymRead,
13549 asm: x86.AMOVQ,
13550 scale: 1,
13551 reg: regInfo{
13552 inputs: []inputInfo{
13553 {1, 49151},
13554 {0, 4295032831},
13555 },
13556 outputs: []outputInfo{
13557 {0, 49135},
13558 },
13559 },
13560 },
13561 {
13562 name: "MOVQloadidx8",
13563 auxType: auxSymOff,
13564 argLen: 3,
13565 symEffect: SymRead,
13566 asm: x86.AMOVQ,
13567 scale: 8,
13568 reg: regInfo{
13569 inputs: []inputInfo{
13570 {1, 49151},
13571 {0, 4295032831},
13572 },
13573 outputs: []outputInfo{
13574 {0, 49135},
13575 },
13576 },
13577 },
13578 {
13579 name: "MOVBstoreidx1",
13580 auxType: auxSymOff,
13581 argLen: 4,
13582 commutative: true,
13583 symEffect: SymWrite,
13584 asm: x86.AMOVB,
13585 scale: 1,
13586 reg: regInfo{
13587 inputs: []inputInfo{
13588 {1, 49151},
13589 {2, 49151},
13590 {0, 4295032831},
13591 },
13592 },
13593 },
13594 {
13595 name: "MOVWstoreidx1",
13596 auxType: auxSymOff,
13597 argLen: 4,
13598 commutative: true,
13599 symEffect: SymWrite,
13600 asm: x86.AMOVW,
13601 scale: 1,
13602 reg: regInfo{
13603 inputs: []inputInfo{
13604 {1, 49151},
13605 {2, 49151},
13606 {0, 4295032831},
13607 },
13608 },
13609 },
13610 {
13611 name: "MOVWstoreidx2",
13612 auxType: auxSymOff,
13613 argLen: 4,
13614 symEffect: SymWrite,
13615 asm: x86.AMOVW,
13616 scale: 2,
13617 reg: regInfo{
13618 inputs: []inputInfo{
13619 {1, 49151},
13620 {2, 49151},
13621 {0, 4295032831},
13622 },
13623 },
13624 },
13625 {
13626 name: "MOVLstoreidx1",
13627 auxType: auxSymOff,
13628 argLen: 4,
13629 commutative: true,
13630 symEffect: SymWrite,
13631 asm: x86.AMOVL,
13632 scale: 1,
13633 reg: regInfo{
13634 inputs: []inputInfo{
13635 {1, 49151},
13636 {2, 49151},
13637 {0, 4295032831},
13638 },
13639 },
13640 },
13641 {
13642 name: "MOVLstoreidx4",
13643 auxType: auxSymOff,
13644 argLen: 4,
13645 symEffect: SymWrite,
13646 asm: x86.AMOVL,
13647 scale: 4,
13648 reg: regInfo{
13649 inputs: []inputInfo{
13650 {1, 49151},
13651 {2, 49151},
13652 {0, 4295032831},
13653 },
13654 },
13655 },
13656 {
13657 name: "MOVLstoreidx8",
13658 auxType: auxSymOff,
13659 argLen: 4,
13660 symEffect: SymWrite,
13661 asm: x86.AMOVL,
13662 scale: 8,
13663 reg: regInfo{
13664 inputs: []inputInfo{
13665 {1, 49151},
13666 {2, 49151},
13667 {0, 4295032831},
13668 },
13669 },
13670 },
13671 {
13672 name: "MOVQstoreidx1",
13673 auxType: auxSymOff,
13674 argLen: 4,
13675 commutative: true,
13676 symEffect: SymWrite,
13677 asm: x86.AMOVQ,
13678 scale: 1,
13679 reg: regInfo{
13680 inputs: []inputInfo{
13681 {1, 49151},
13682 {2, 49151},
13683 {0, 4295032831},
13684 },
13685 },
13686 },
13687 {
13688 name: "MOVQstoreidx8",
13689 auxType: auxSymOff,
13690 argLen: 4,
13691 symEffect: SymWrite,
13692 asm: x86.AMOVQ,
13693 scale: 8,
13694 reg: regInfo{
13695 inputs: []inputInfo{
13696 {1, 49151},
13697 {2, 49151},
13698 {0, 4295032831},
13699 },
13700 },
13701 },
13702 {
13703 name: "MOVBstoreconst",
13704 auxType: auxSymValAndOff,
13705 argLen: 2,
13706 faultOnNilArg0: true,
13707 symEffect: SymWrite,
13708 asm: x86.AMOVB,
13709 reg: regInfo{
13710 inputs: []inputInfo{
13711 {0, 4295032831},
13712 },
13713 },
13714 },
13715 {
13716 name: "MOVWstoreconst",
13717 auxType: auxSymValAndOff,
13718 argLen: 2,
13719 faultOnNilArg0: true,
13720 symEffect: SymWrite,
13721 asm: x86.AMOVW,
13722 reg: regInfo{
13723 inputs: []inputInfo{
13724 {0, 4295032831},
13725 },
13726 },
13727 },
13728 {
13729 name: "MOVLstoreconst",
13730 auxType: auxSymValAndOff,
13731 argLen: 2,
13732 faultOnNilArg0: true,
13733 symEffect: SymWrite,
13734 asm: x86.AMOVL,
13735 reg: regInfo{
13736 inputs: []inputInfo{
13737 {0, 4295032831},
13738 },
13739 },
13740 },
13741 {
13742 name: "MOVQstoreconst",
13743 auxType: auxSymValAndOff,
13744 argLen: 2,
13745 faultOnNilArg0: true,
13746 symEffect: SymWrite,
13747 asm: x86.AMOVQ,
13748 reg: regInfo{
13749 inputs: []inputInfo{
13750 {0, 4295032831},
13751 },
13752 },
13753 },
13754 {
13755 name: "MOVOstoreconst",
13756 auxType: auxSymValAndOff,
13757 argLen: 2,
13758 faultOnNilArg0: true,
13759 symEffect: SymWrite,
13760 asm: x86.AMOVUPS,
13761 reg: regInfo{
13762 inputs: []inputInfo{
13763 {0, 4295032831},
13764 },
13765 },
13766 },
13767 {
13768 name: "MOVBstoreconstidx1",
13769 auxType: auxSymValAndOff,
13770 argLen: 3,
13771 commutative: true,
13772 symEffect: SymWrite,
13773 asm: x86.AMOVB,
13774 scale: 1,
13775 reg: regInfo{
13776 inputs: []inputInfo{
13777 {1, 49151},
13778 {0, 4295032831},
13779 },
13780 },
13781 },
13782 {
13783 name: "MOVWstoreconstidx1",
13784 auxType: auxSymValAndOff,
13785 argLen: 3,
13786 commutative: true,
13787 symEffect: SymWrite,
13788 asm: x86.AMOVW,
13789 scale: 1,
13790 reg: regInfo{
13791 inputs: []inputInfo{
13792 {1, 49151},
13793 {0, 4295032831},
13794 },
13795 },
13796 },
13797 {
13798 name: "MOVWstoreconstidx2",
13799 auxType: auxSymValAndOff,
13800 argLen: 3,
13801 symEffect: SymWrite,
13802 asm: x86.AMOVW,
13803 scale: 2,
13804 reg: regInfo{
13805 inputs: []inputInfo{
13806 {1, 49151},
13807 {0, 4295032831},
13808 },
13809 },
13810 },
13811 {
13812 name: "MOVLstoreconstidx1",
13813 auxType: auxSymValAndOff,
13814 argLen: 3,
13815 commutative: true,
13816 symEffect: SymWrite,
13817 asm: x86.AMOVL,
13818 scale: 1,
13819 reg: regInfo{
13820 inputs: []inputInfo{
13821 {1, 49151},
13822 {0, 4295032831},
13823 },
13824 },
13825 },
13826 {
13827 name: "MOVLstoreconstidx4",
13828 auxType: auxSymValAndOff,
13829 argLen: 3,
13830 symEffect: SymWrite,
13831 asm: x86.AMOVL,
13832 scale: 4,
13833 reg: regInfo{
13834 inputs: []inputInfo{
13835 {1, 49151},
13836 {0, 4295032831},
13837 },
13838 },
13839 },
13840 {
13841 name: "MOVQstoreconstidx1",
13842 auxType: auxSymValAndOff,
13843 argLen: 3,
13844 commutative: true,
13845 symEffect: SymWrite,
13846 asm: x86.AMOVQ,
13847 scale: 1,
13848 reg: regInfo{
13849 inputs: []inputInfo{
13850 {1, 49151},
13851 {0, 4295032831},
13852 },
13853 },
13854 },
13855 {
13856 name: "MOVQstoreconstidx8",
13857 auxType: auxSymValAndOff,
13858 argLen: 3,
13859 symEffect: SymWrite,
13860 asm: x86.AMOVQ,
13861 scale: 8,
13862 reg: regInfo{
13863 inputs: []inputInfo{
13864 {1, 49151},
13865 {0, 4295032831},
13866 },
13867 },
13868 },
13869 {
13870 name: "DUFFZERO",
13871 auxType: auxInt64,
13872 argLen: 2,
13873 unsafePoint: true,
13874 reg: regInfo{
13875 inputs: []inputInfo{
13876 {0, 128},
13877 },
13878 clobbers: 128,
13879 },
13880 },
13881 {
13882 name: "REPSTOSQ",
13883 argLen: 4,
13884 faultOnNilArg0: true,
13885 reg: regInfo{
13886 inputs: []inputInfo{
13887 {0, 128},
13888 {1, 2},
13889 {2, 1},
13890 },
13891 clobbers: 130,
13892 },
13893 },
13894 {
13895 name: "CALLstatic",
13896 auxType: auxCallOff,
13897 argLen: -1,
13898 clobberFlags: true,
13899 call: true,
13900 reg: regInfo{
13901 clobbers: 2147483631,
13902 },
13903 },
13904 {
13905 name: "CALLtail",
13906 auxType: auxCallOff,
13907 argLen: -1,
13908 clobberFlags: true,
13909 call: true,
13910 tailCall: true,
13911 reg: regInfo{
13912 clobbers: 2147483631,
13913 },
13914 },
13915 {
13916 name: "CALLclosure",
13917 auxType: auxCallOff,
13918 argLen: -1,
13919 clobberFlags: true,
13920 call: true,
13921 reg: regInfo{
13922 inputs: []inputInfo{
13923 {1, 4},
13924 {0, 49151},
13925 },
13926 clobbers: 2147483631,
13927 },
13928 },
13929 {
13930 name: "CALLinter",
13931 auxType: auxCallOff,
13932 argLen: -1,
13933 clobberFlags: true,
13934 call: true,
13935 reg: regInfo{
13936 inputs: []inputInfo{
13937 {0, 49135},
13938 },
13939 clobbers: 2147483631,
13940 },
13941 },
13942 {
13943 name: "DUFFCOPY",
13944 auxType: auxInt64,
13945 argLen: 3,
13946 clobberFlags: true,
13947 unsafePoint: true,
13948 reg: regInfo{
13949 inputs: []inputInfo{
13950 {0, 128},
13951 {1, 64},
13952 },
13953 clobbers: 65728,
13954 },
13955 },
13956 {
13957 name: "REPMOVSQ",
13958 argLen: 4,
13959 faultOnNilArg0: true,
13960 faultOnNilArg1: true,
13961 reg: regInfo{
13962 inputs: []inputInfo{
13963 {0, 128},
13964 {1, 64},
13965 {2, 2},
13966 },
13967 clobbers: 194,
13968 },
13969 },
13970 {
13971 name: "InvertFlags",
13972 argLen: 1,
13973 reg: regInfo{},
13974 },
13975 {
13976 name: "LoweredGetG",
13977 argLen: 1,
13978 reg: regInfo{
13979 outputs: []outputInfo{
13980 {0, 49135},
13981 },
13982 },
13983 },
13984 {
13985 name: "LoweredGetClosurePtr",
13986 argLen: 0,
13987 zeroWidth: true,
13988 reg: regInfo{
13989 outputs: []outputInfo{
13990 {0, 4},
13991 },
13992 },
13993 },
13994 {
13995 name: "LoweredGetCallerPC",
13996 argLen: 0,
13997 rematerializeable: true,
13998 reg: regInfo{
13999 outputs: []outputInfo{
14000 {0, 49135},
14001 },
14002 },
14003 },
14004 {
14005 name: "LoweredGetCallerSP",
14006 argLen: 1,
14007 rematerializeable: true,
14008 reg: regInfo{
14009 outputs: []outputInfo{
14010 {0, 49135},
14011 },
14012 },
14013 },
14014 {
14015 name: "LoweredNilCheck",
14016 argLen: 2,
14017 clobberFlags: true,
14018 nilCheck: true,
14019 faultOnNilArg0: true,
14020 reg: regInfo{
14021 inputs: []inputInfo{
14022 {0, 49151},
14023 },
14024 },
14025 },
14026 {
14027 name: "LoweredWB",
14028 auxType: auxInt64,
14029 argLen: 1,
14030 clobberFlags: true,
14031 reg: regInfo{
14032 clobbers: 2147418112,
14033 outputs: []outputInfo{
14034 {0, 2048},
14035 },
14036 },
14037 },
14038 {
14039 name: "LoweredHasCPUFeature",
14040 auxType: auxSym,
14041 argLen: 0,
14042 rematerializeable: true,
14043 symEffect: SymNone,
14044 reg: regInfo{
14045 outputs: []outputInfo{
14046 {0, 49135},
14047 },
14048 },
14049 },
14050 {
14051 name: "LoweredPanicBoundsRR",
14052 auxType: auxInt64,
14053 argLen: 3,
14054 call: true,
14055 reg: regInfo{
14056 inputs: []inputInfo{
14057 {0, 49135},
14058 {1, 49135},
14059 },
14060 },
14061 },
14062 {
14063 name: "LoweredPanicBoundsRC",
14064 auxType: auxPanicBoundsC,
14065 argLen: 2,
14066 call: true,
14067 reg: regInfo{
14068 inputs: []inputInfo{
14069 {0, 49135},
14070 },
14071 },
14072 },
14073 {
14074 name: "LoweredPanicBoundsCR",
14075 auxType: auxPanicBoundsC,
14076 argLen: 2,
14077 call: true,
14078 reg: regInfo{
14079 inputs: []inputInfo{
14080 {0, 49135},
14081 },
14082 },
14083 },
14084 {
14085 name: "LoweredPanicBoundsCC",
14086 auxType: auxPanicBoundsCC,
14087 argLen: 1,
14088 call: true,
14089 reg: regInfo{},
14090 },
14091 {
14092 name: "FlagEQ",
14093 argLen: 0,
14094 reg: regInfo{},
14095 },
14096 {
14097 name: "FlagLT_ULT",
14098 argLen: 0,
14099 reg: regInfo{},
14100 },
14101 {
14102 name: "FlagLT_UGT",
14103 argLen: 0,
14104 reg: regInfo{},
14105 },
14106 {
14107 name: "FlagGT_UGT",
14108 argLen: 0,
14109 reg: regInfo{},
14110 },
14111 {
14112 name: "FlagGT_ULT",
14113 argLen: 0,
14114 reg: regInfo{},
14115 },
14116 {
14117 name: "MOVBatomicload",
14118 auxType: auxSymOff,
14119 argLen: 2,
14120 faultOnNilArg0: true,
14121 symEffect: SymRead,
14122 asm: x86.AMOVB,
14123 reg: regInfo{
14124 inputs: []inputInfo{
14125 {0, 4295032831},
14126 },
14127 outputs: []outputInfo{
14128 {0, 49135},
14129 },
14130 },
14131 },
14132 {
14133 name: "MOVLatomicload",
14134 auxType: auxSymOff,
14135 argLen: 2,
14136 faultOnNilArg0: true,
14137 symEffect: SymRead,
14138 asm: x86.AMOVL,
14139 reg: regInfo{
14140 inputs: []inputInfo{
14141 {0, 4295032831},
14142 },
14143 outputs: []outputInfo{
14144 {0, 49135},
14145 },
14146 },
14147 },
14148 {
14149 name: "MOVQatomicload",
14150 auxType: auxSymOff,
14151 argLen: 2,
14152 faultOnNilArg0: true,
14153 symEffect: SymRead,
14154 asm: x86.AMOVQ,
14155 reg: regInfo{
14156 inputs: []inputInfo{
14157 {0, 4295032831},
14158 },
14159 outputs: []outputInfo{
14160 {0, 49135},
14161 },
14162 },
14163 },
14164 {
14165 name: "XCHGB",
14166 auxType: auxSymOff,
14167 argLen: 3,
14168 resultInArg0: true,
14169 faultOnNilArg1: true,
14170 hasSideEffects: true,
14171 symEffect: SymRdWr,
14172 asm: x86.AXCHGB,
14173 reg: regInfo{
14174 inputs: []inputInfo{
14175 {0, 49135},
14176 {1, 4295032831},
14177 },
14178 outputs: []outputInfo{
14179 {0, 49135},
14180 },
14181 },
14182 },
14183 {
14184 name: "XCHGL",
14185 auxType: auxSymOff,
14186 argLen: 3,
14187 resultInArg0: true,
14188 faultOnNilArg1: true,
14189 hasSideEffects: true,
14190 symEffect: SymRdWr,
14191 asm: x86.AXCHGL,
14192 reg: regInfo{
14193 inputs: []inputInfo{
14194 {0, 49135},
14195 {1, 4295032831},
14196 },
14197 outputs: []outputInfo{
14198 {0, 49135},
14199 },
14200 },
14201 },
14202 {
14203 name: "XCHGQ",
14204 auxType: auxSymOff,
14205 argLen: 3,
14206 resultInArg0: true,
14207 faultOnNilArg1: true,
14208 hasSideEffects: true,
14209 symEffect: SymRdWr,
14210 asm: x86.AXCHGQ,
14211 reg: regInfo{
14212 inputs: []inputInfo{
14213 {0, 49135},
14214 {1, 4295032831},
14215 },
14216 outputs: []outputInfo{
14217 {0, 49135},
14218 },
14219 },
14220 },
14221 {
14222 name: "XADDLlock",
14223 auxType: auxSymOff,
14224 argLen: 3,
14225 resultInArg0: true,
14226 clobberFlags: true,
14227 faultOnNilArg1: true,
14228 hasSideEffects: true,
14229 symEffect: SymRdWr,
14230 asm: x86.AXADDL,
14231 reg: regInfo{
14232 inputs: []inputInfo{
14233 {0, 49135},
14234 {1, 4295032831},
14235 },
14236 outputs: []outputInfo{
14237 {0, 49135},
14238 },
14239 },
14240 },
14241 {
14242 name: "XADDQlock",
14243 auxType: auxSymOff,
14244 argLen: 3,
14245 resultInArg0: true,
14246 clobberFlags: true,
14247 faultOnNilArg1: true,
14248 hasSideEffects: true,
14249 symEffect: SymRdWr,
14250 asm: x86.AXADDQ,
14251 reg: regInfo{
14252 inputs: []inputInfo{
14253 {0, 49135},
14254 {1, 4295032831},
14255 },
14256 outputs: []outputInfo{
14257 {0, 49135},
14258 },
14259 },
14260 },
14261 {
14262 name: "AddTupleFirst32",
14263 argLen: 2,
14264 reg: regInfo{},
14265 },
14266 {
14267 name: "AddTupleFirst64",
14268 argLen: 2,
14269 reg: regInfo{},
14270 },
14271 {
14272 name: "CMPXCHGLlock",
14273 auxType: auxSymOff,
14274 argLen: 4,
14275 clobberFlags: true,
14276 faultOnNilArg0: true,
14277 hasSideEffects: true,
14278 symEffect: SymRdWr,
14279 asm: x86.ACMPXCHGL,
14280 reg: regInfo{
14281 inputs: []inputInfo{
14282 {1, 1},
14283 {0, 49135},
14284 {2, 49135},
14285 },
14286 clobbers: 1,
14287 outputs: []outputInfo{
14288 {1, 0},
14289 {0, 49135},
14290 },
14291 },
14292 },
14293 {
14294 name: "CMPXCHGQlock",
14295 auxType: auxSymOff,
14296 argLen: 4,
14297 clobberFlags: true,
14298 faultOnNilArg0: true,
14299 hasSideEffects: true,
14300 symEffect: SymRdWr,
14301 asm: x86.ACMPXCHGQ,
14302 reg: regInfo{
14303 inputs: []inputInfo{
14304 {1, 1},
14305 {0, 49135},
14306 {2, 49135},
14307 },
14308 clobbers: 1,
14309 outputs: []outputInfo{
14310 {1, 0},
14311 {0, 49135},
14312 },
14313 },
14314 },
14315 {
14316 name: "ANDBlock",
14317 auxType: auxSymOff,
14318 argLen: 3,
14319 clobberFlags: true,
14320 faultOnNilArg0: true,
14321 hasSideEffects: true,
14322 symEffect: SymRdWr,
14323 asm: x86.AANDB,
14324 reg: regInfo{
14325 inputs: []inputInfo{
14326 {1, 49151},
14327 {0, 4295032831},
14328 },
14329 },
14330 },
14331 {
14332 name: "ANDLlock",
14333 auxType: auxSymOff,
14334 argLen: 3,
14335 clobberFlags: true,
14336 faultOnNilArg0: true,
14337 hasSideEffects: true,
14338 symEffect: SymRdWr,
14339 asm: x86.AANDL,
14340 reg: regInfo{
14341 inputs: []inputInfo{
14342 {1, 49151},
14343 {0, 4295032831},
14344 },
14345 },
14346 },
14347 {
14348 name: "ANDQlock",
14349 auxType: auxSymOff,
14350 argLen: 3,
14351 clobberFlags: true,
14352 faultOnNilArg0: true,
14353 hasSideEffects: true,
14354 symEffect: SymRdWr,
14355 asm: x86.AANDQ,
14356 reg: regInfo{
14357 inputs: []inputInfo{
14358 {1, 49151},
14359 {0, 4295032831},
14360 },
14361 },
14362 },
14363 {
14364 name: "ORBlock",
14365 auxType: auxSymOff,
14366 argLen: 3,
14367 clobberFlags: true,
14368 faultOnNilArg0: true,
14369 hasSideEffects: true,
14370 symEffect: SymRdWr,
14371 asm: x86.AORB,
14372 reg: regInfo{
14373 inputs: []inputInfo{
14374 {1, 49151},
14375 {0, 4295032831},
14376 },
14377 },
14378 },
14379 {
14380 name: "ORLlock",
14381 auxType: auxSymOff,
14382 argLen: 3,
14383 clobberFlags: true,
14384 faultOnNilArg0: true,
14385 hasSideEffects: true,
14386 symEffect: SymRdWr,
14387 asm: x86.AORL,
14388 reg: regInfo{
14389 inputs: []inputInfo{
14390 {1, 49151},
14391 {0, 4295032831},
14392 },
14393 },
14394 },
14395 {
14396 name: "ORQlock",
14397 auxType: auxSymOff,
14398 argLen: 3,
14399 clobberFlags: true,
14400 faultOnNilArg0: true,
14401 hasSideEffects: true,
14402 symEffect: SymRdWr,
14403 asm: x86.AORQ,
14404 reg: regInfo{
14405 inputs: []inputInfo{
14406 {1, 49151},
14407 {0, 4295032831},
14408 },
14409 },
14410 },
14411 {
14412 name: "LoweredAtomicAnd64",
14413 auxType: auxSymOff,
14414 argLen: 3,
14415 resultNotInArgs: true,
14416 clobberFlags: true,
14417 needIntTemp: true,
14418 faultOnNilArg0: true,
14419 hasSideEffects: true,
14420 unsafePoint: true,
14421 symEffect: SymRdWr,
14422 asm: x86.AANDQ,
14423 reg: regInfo{
14424 inputs: []inputInfo{
14425 {0, 49134},
14426 {1, 49134},
14427 },
14428 outputs: []outputInfo{
14429 {1, 0},
14430 {0, 1},
14431 },
14432 },
14433 },
14434 {
14435 name: "LoweredAtomicAnd32",
14436 auxType: auxSymOff,
14437 argLen: 3,
14438 resultNotInArgs: true,
14439 clobberFlags: true,
14440 needIntTemp: true,
14441 faultOnNilArg0: true,
14442 hasSideEffects: true,
14443 unsafePoint: true,
14444 symEffect: SymRdWr,
14445 asm: x86.AANDL,
14446 reg: regInfo{
14447 inputs: []inputInfo{
14448 {0, 49134},
14449 {1, 49134},
14450 },
14451 outputs: []outputInfo{
14452 {1, 0},
14453 {0, 1},
14454 },
14455 },
14456 },
14457 {
14458 name: "LoweredAtomicOr64",
14459 auxType: auxSymOff,
14460 argLen: 3,
14461 resultNotInArgs: true,
14462 clobberFlags: true,
14463 needIntTemp: true,
14464 faultOnNilArg0: true,
14465 hasSideEffects: true,
14466 unsafePoint: true,
14467 symEffect: SymRdWr,
14468 asm: x86.AORQ,
14469 reg: regInfo{
14470 inputs: []inputInfo{
14471 {0, 49134},
14472 {1, 49134},
14473 },
14474 outputs: []outputInfo{
14475 {1, 0},
14476 {0, 1},
14477 },
14478 },
14479 },
14480 {
14481 name: "LoweredAtomicOr32",
14482 auxType: auxSymOff,
14483 argLen: 3,
14484 resultNotInArgs: true,
14485 clobberFlags: true,
14486 needIntTemp: true,
14487 faultOnNilArg0: true,
14488 hasSideEffects: true,
14489 unsafePoint: true,
14490 symEffect: SymRdWr,
14491 asm: x86.AORL,
14492 reg: regInfo{
14493 inputs: []inputInfo{
14494 {0, 49134},
14495 {1, 49134},
14496 },
14497 outputs: []outputInfo{
14498 {1, 0},
14499 {0, 1},
14500 },
14501 },
14502 },
14503 {
14504 name: "PrefetchT0",
14505 argLen: 2,
14506 hasSideEffects: true,
14507 asm: x86.APREFETCHT0,
14508 reg: regInfo{
14509 inputs: []inputInfo{
14510 {0, 4295032831},
14511 },
14512 },
14513 },
14514 {
14515 name: "PrefetchNTA",
14516 argLen: 2,
14517 hasSideEffects: true,
14518 asm: x86.APREFETCHNTA,
14519 reg: regInfo{
14520 inputs: []inputInfo{
14521 {0, 4295032831},
14522 },
14523 },
14524 },
14525 {
14526 name: "ANDNQ",
14527 argLen: 2,
14528 clobberFlags: true,
14529 asm: x86.AANDNQ,
14530 reg: regInfo{
14531 inputs: []inputInfo{
14532 {0, 49135},
14533 {1, 49135},
14534 },
14535 outputs: []outputInfo{
14536 {0, 49135},
14537 },
14538 },
14539 },
14540 {
14541 name: "ANDNL",
14542 argLen: 2,
14543 clobberFlags: true,
14544 asm: x86.AANDNL,
14545 reg: regInfo{
14546 inputs: []inputInfo{
14547 {0, 49135},
14548 {1, 49135},
14549 },
14550 outputs: []outputInfo{
14551 {0, 49135},
14552 },
14553 },
14554 },
14555 {
14556 name: "BLSIQ",
14557 argLen: 1,
14558 clobberFlags: true,
14559 asm: x86.ABLSIQ,
14560 reg: regInfo{
14561 inputs: []inputInfo{
14562 {0, 49135},
14563 },
14564 outputs: []outputInfo{
14565 {0, 49135},
14566 },
14567 },
14568 },
14569 {
14570 name: "BLSIL",
14571 argLen: 1,
14572 clobberFlags: true,
14573 asm: x86.ABLSIL,
14574 reg: regInfo{
14575 inputs: []inputInfo{
14576 {0, 49135},
14577 },
14578 outputs: []outputInfo{
14579 {0, 49135},
14580 },
14581 },
14582 },
14583 {
14584 name: "BLSMSKQ",
14585 argLen: 1,
14586 clobberFlags: true,
14587 asm: x86.ABLSMSKQ,
14588 reg: regInfo{
14589 inputs: []inputInfo{
14590 {0, 49135},
14591 },
14592 outputs: []outputInfo{
14593 {0, 49135},
14594 },
14595 },
14596 },
14597 {
14598 name: "BLSMSKL",
14599 argLen: 1,
14600 clobberFlags: true,
14601 asm: x86.ABLSMSKL,
14602 reg: regInfo{
14603 inputs: []inputInfo{
14604 {0, 49135},
14605 },
14606 outputs: []outputInfo{
14607 {0, 49135},
14608 },
14609 },
14610 },
14611 {
14612 name: "BLSRQ",
14613 argLen: 1,
14614 asm: x86.ABLSRQ,
14615 reg: regInfo{
14616 inputs: []inputInfo{
14617 {0, 49135},
14618 },
14619 outputs: []outputInfo{
14620 {1, 0},
14621 {0, 49135},
14622 },
14623 },
14624 },
14625 {
14626 name: "BLSRL",
14627 argLen: 1,
14628 asm: x86.ABLSRL,
14629 reg: regInfo{
14630 inputs: []inputInfo{
14631 {0, 49135},
14632 },
14633 outputs: []outputInfo{
14634 {1, 0},
14635 {0, 49135},
14636 },
14637 },
14638 },
14639 {
14640 name: "TZCNTQ",
14641 argLen: 1,
14642 clobberFlags: true,
14643 asm: x86.ATZCNTQ,
14644 reg: regInfo{
14645 inputs: []inputInfo{
14646 {0, 49135},
14647 },
14648 outputs: []outputInfo{
14649 {0, 49135},
14650 },
14651 },
14652 },
14653 {
14654 name: "TZCNTL",
14655 argLen: 1,
14656 clobberFlags: true,
14657 asm: x86.ATZCNTL,
14658 reg: regInfo{
14659 inputs: []inputInfo{
14660 {0, 49135},
14661 },
14662 outputs: []outputInfo{
14663 {0, 49135},
14664 },
14665 },
14666 },
14667 {
14668 name: "LZCNTQ",
14669 argLen: 1,
14670 clobberFlags: true,
14671 asm: x86.ALZCNTQ,
14672 reg: regInfo{
14673 inputs: []inputInfo{
14674 {0, 49135},
14675 },
14676 outputs: []outputInfo{
14677 {0, 49135},
14678 },
14679 },
14680 },
14681 {
14682 name: "LZCNTL",
14683 argLen: 1,
14684 clobberFlags: true,
14685 asm: x86.ALZCNTL,
14686 reg: regInfo{
14687 inputs: []inputInfo{
14688 {0, 49135},
14689 },
14690 outputs: []outputInfo{
14691 {0, 49135},
14692 },
14693 },
14694 },
14695 {
14696 name: "MOVBEWstore",
14697 auxType: auxSymOff,
14698 argLen: 3,
14699 faultOnNilArg0: true,
14700 symEffect: SymWrite,
14701 asm: x86.AMOVBEW,
14702 reg: regInfo{
14703 inputs: []inputInfo{
14704 {1, 49151},
14705 {0, 4295032831},
14706 },
14707 },
14708 },
14709 {
14710 name: "MOVBELload",
14711 auxType: auxSymOff,
14712 argLen: 2,
14713 faultOnNilArg0: true,
14714 symEffect: SymRead,
14715 asm: x86.AMOVBEL,
14716 reg: regInfo{
14717 inputs: []inputInfo{
14718 {0, 4295032831},
14719 },
14720 outputs: []outputInfo{
14721 {0, 49135},
14722 },
14723 },
14724 },
14725 {
14726 name: "MOVBELstore",
14727 auxType: auxSymOff,
14728 argLen: 3,
14729 faultOnNilArg0: true,
14730 symEffect: SymWrite,
14731 asm: x86.AMOVBEL,
14732 reg: regInfo{
14733 inputs: []inputInfo{
14734 {1, 49151},
14735 {0, 4295032831},
14736 },
14737 },
14738 },
14739 {
14740 name: "MOVBEQload",
14741 auxType: auxSymOff,
14742 argLen: 2,
14743 faultOnNilArg0: true,
14744 symEffect: SymRead,
14745 asm: x86.AMOVBEQ,
14746 reg: regInfo{
14747 inputs: []inputInfo{
14748 {0, 4295032831},
14749 },
14750 outputs: []outputInfo{
14751 {0, 49135},
14752 },
14753 },
14754 },
14755 {
14756 name: "MOVBEQstore",
14757 auxType: auxSymOff,
14758 argLen: 3,
14759 faultOnNilArg0: true,
14760 symEffect: SymWrite,
14761 asm: x86.AMOVBEQ,
14762 reg: regInfo{
14763 inputs: []inputInfo{
14764 {1, 49151},
14765 {0, 4295032831},
14766 },
14767 },
14768 },
14769 {
14770 name: "MOVBELloadidx1",
14771 auxType: auxSymOff,
14772 argLen: 3,
14773 commutative: true,
14774 symEffect: SymRead,
14775 asm: x86.AMOVBEL,
14776 scale: 1,
14777 reg: regInfo{
14778 inputs: []inputInfo{
14779 {1, 49151},
14780 {0, 4295032831},
14781 },
14782 outputs: []outputInfo{
14783 {0, 49135},
14784 },
14785 },
14786 },
14787 {
14788 name: "MOVBELloadidx4",
14789 auxType: auxSymOff,
14790 argLen: 3,
14791 symEffect: SymRead,
14792 asm: x86.AMOVBEL,
14793 scale: 4,
14794 reg: regInfo{
14795 inputs: []inputInfo{
14796 {1, 49151},
14797 {0, 4295032831},
14798 },
14799 outputs: []outputInfo{
14800 {0, 49135},
14801 },
14802 },
14803 },
14804 {
14805 name: "MOVBELloadidx8",
14806 auxType: auxSymOff,
14807 argLen: 3,
14808 symEffect: SymRead,
14809 asm: x86.AMOVBEL,
14810 scale: 8,
14811 reg: regInfo{
14812 inputs: []inputInfo{
14813 {1, 49151},
14814 {0, 4295032831},
14815 },
14816 outputs: []outputInfo{
14817 {0, 49135},
14818 },
14819 },
14820 },
14821 {
14822 name: "MOVBEQloadidx1",
14823 auxType: auxSymOff,
14824 argLen: 3,
14825 commutative: true,
14826 symEffect: SymRead,
14827 asm: x86.AMOVBEQ,
14828 scale: 1,
14829 reg: regInfo{
14830 inputs: []inputInfo{
14831 {1, 49151},
14832 {0, 4295032831},
14833 },
14834 outputs: []outputInfo{
14835 {0, 49135},
14836 },
14837 },
14838 },
14839 {
14840 name: "MOVBEQloadidx8",
14841 auxType: auxSymOff,
14842 argLen: 3,
14843 symEffect: SymRead,
14844 asm: x86.AMOVBEQ,
14845 scale: 8,
14846 reg: regInfo{
14847 inputs: []inputInfo{
14848 {1, 49151},
14849 {0, 4295032831},
14850 },
14851 outputs: []outputInfo{
14852 {0, 49135},
14853 },
14854 },
14855 },
14856 {
14857 name: "MOVBEWstoreidx1",
14858 auxType: auxSymOff,
14859 argLen: 4,
14860 commutative: true,
14861 symEffect: SymWrite,
14862 asm: x86.AMOVBEW,
14863 scale: 1,
14864 reg: regInfo{
14865 inputs: []inputInfo{
14866 {1, 49151},
14867 {2, 49151},
14868 {0, 4295032831},
14869 },
14870 },
14871 },
14872 {
14873 name: "MOVBEWstoreidx2",
14874 auxType: auxSymOff,
14875 argLen: 4,
14876 symEffect: SymWrite,
14877 asm: x86.AMOVBEW,
14878 scale: 2,
14879 reg: regInfo{
14880 inputs: []inputInfo{
14881 {1, 49151},
14882 {2, 49151},
14883 {0, 4295032831},
14884 },
14885 },
14886 },
14887 {
14888 name: "MOVBELstoreidx1",
14889 auxType: auxSymOff,
14890 argLen: 4,
14891 commutative: true,
14892 symEffect: SymWrite,
14893 asm: x86.AMOVBEL,
14894 scale: 1,
14895 reg: regInfo{
14896 inputs: []inputInfo{
14897 {1, 49151},
14898 {2, 49151},
14899 {0, 4295032831},
14900 },
14901 },
14902 },
14903 {
14904 name: "MOVBELstoreidx4",
14905 auxType: auxSymOff,
14906 argLen: 4,
14907 symEffect: SymWrite,
14908 asm: x86.AMOVBEL,
14909 scale: 4,
14910 reg: regInfo{
14911 inputs: []inputInfo{
14912 {1, 49151},
14913 {2, 49151},
14914 {0, 4295032831},
14915 },
14916 },
14917 },
14918 {
14919 name: "MOVBELstoreidx8",
14920 auxType: auxSymOff,
14921 argLen: 4,
14922 symEffect: SymWrite,
14923 asm: x86.AMOVBEL,
14924 scale: 8,
14925 reg: regInfo{
14926 inputs: []inputInfo{
14927 {1, 49151},
14928 {2, 49151},
14929 {0, 4295032831},
14930 },
14931 },
14932 },
14933 {
14934 name: "MOVBEQstoreidx1",
14935 auxType: auxSymOff,
14936 argLen: 4,
14937 commutative: true,
14938 symEffect: SymWrite,
14939 asm: x86.AMOVBEQ,
14940 scale: 1,
14941 reg: regInfo{
14942 inputs: []inputInfo{
14943 {1, 49151},
14944 {2, 49151},
14945 {0, 4295032831},
14946 },
14947 },
14948 },
14949 {
14950 name: "MOVBEQstoreidx8",
14951 auxType: auxSymOff,
14952 argLen: 4,
14953 symEffect: SymWrite,
14954 asm: x86.AMOVBEQ,
14955 scale: 8,
14956 reg: regInfo{
14957 inputs: []inputInfo{
14958 {1, 49151},
14959 {2, 49151},
14960 {0, 4295032831},
14961 },
14962 },
14963 },
14964 {
14965 name: "SARXQ",
14966 argLen: 2,
14967 asm: x86.ASARXQ,
14968 reg: regInfo{
14969 inputs: []inputInfo{
14970 {0, 49135},
14971 {1, 49135},
14972 },
14973 outputs: []outputInfo{
14974 {0, 49135},
14975 },
14976 },
14977 },
14978 {
14979 name: "SARXL",
14980 argLen: 2,
14981 asm: x86.ASARXL,
14982 reg: regInfo{
14983 inputs: []inputInfo{
14984 {0, 49135},
14985 {1, 49135},
14986 },
14987 outputs: []outputInfo{
14988 {0, 49135},
14989 },
14990 },
14991 },
14992 {
14993 name: "SHLXQ",
14994 argLen: 2,
14995 asm: x86.ASHLXQ,
14996 reg: regInfo{
14997 inputs: []inputInfo{
14998 {0, 49135},
14999 {1, 49135},
15000 },
15001 outputs: []outputInfo{
15002 {0, 49135},
15003 },
15004 },
15005 },
15006 {
15007 name: "SHLXL",
15008 argLen: 2,
15009 asm: x86.ASHLXL,
15010 reg: regInfo{
15011 inputs: []inputInfo{
15012 {0, 49135},
15013 {1, 49135},
15014 },
15015 outputs: []outputInfo{
15016 {0, 49135},
15017 },
15018 },
15019 },
15020 {
15021 name: "SHRXQ",
15022 argLen: 2,
15023 asm: x86.ASHRXQ,
15024 reg: regInfo{
15025 inputs: []inputInfo{
15026 {0, 49135},
15027 {1, 49135},
15028 },
15029 outputs: []outputInfo{
15030 {0, 49135},
15031 },
15032 },
15033 },
15034 {
15035 name: "SHRXL",
15036 argLen: 2,
15037 asm: x86.ASHRXL,
15038 reg: regInfo{
15039 inputs: []inputInfo{
15040 {0, 49135},
15041 {1, 49135},
15042 },
15043 outputs: []outputInfo{
15044 {0, 49135},
15045 },
15046 },
15047 },
15048 {
15049 name: "SARXLload",
15050 auxType: auxSymOff,
15051 argLen: 3,
15052 faultOnNilArg0: true,
15053 symEffect: SymRead,
15054 asm: x86.ASARXL,
15055 reg: regInfo{
15056 inputs: []inputInfo{
15057 {1, 49135},
15058 {0, 4295032831},
15059 },
15060 outputs: []outputInfo{
15061 {0, 49135},
15062 },
15063 },
15064 },
15065 {
15066 name: "SARXQload",
15067 auxType: auxSymOff,
15068 argLen: 3,
15069 faultOnNilArg0: true,
15070 symEffect: SymRead,
15071 asm: x86.ASARXQ,
15072 reg: regInfo{
15073 inputs: []inputInfo{
15074 {1, 49135},
15075 {0, 4295032831},
15076 },
15077 outputs: []outputInfo{
15078 {0, 49135},
15079 },
15080 },
15081 },
15082 {
15083 name: "SHLXLload",
15084 auxType: auxSymOff,
15085 argLen: 3,
15086 faultOnNilArg0: true,
15087 symEffect: SymRead,
15088 asm: x86.ASHLXL,
15089 reg: regInfo{
15090 inputs: []inputInfo{
15091 {1, 49135},
15092 {0, 4295032831},
15093 },
15094 outputs: []outputInfo{
15095 {0, 49135},
15096 },
15097 },
15098 },
15099 {
15100 name: "SHLXQload",
15101 auxType: auxSymOff,
15102 argLen: 3,
15103 faultOnNilArg0: true,
15104 symEffect: SymRead,
15105 asm: x86.ASHLXQ,
15106 reg: regInfo{
15107 inputs: []inputInfo{
15108 {1, 49135},
15109 {0, 4295032831},
15110 },
15111 outputs: []outputInfo{
15112 {0, 49135},
15113 },
15114 },
15115 },
15116 {
15117 name: "SHRXLload",
15118 auxType: auxSymOff,
15119 argLen: 3,
15120 faultOnNilArg0: true,
15121 symEffect: SymRead,
15122 asm: x86.ASHRXL,
15123 reg: regInfo{
15124 inputs: []inputInfo{
15125 {1, 49135},
15126 {0, 4295032831},
15127 },
15128 outputs: []outputInfo{
15129 {0, 49135},
15130 },
15131 },
15132 },
15133 {
15134 name: "SHRXQload",
15135 auxType: auxSymOff,
15136 argLen: 3,
15137 faultOnNilArg0: true,
15138 symEffect: SymRead,
15139 asm: x86.ASHRXQ,
15140 reg: regInfo{
15141 inputs: []inputInfo{
15142 {1, 49135},
15143 {0, 4295032831},
15144 },
15145 outputs: []outputInfo{
15146 {0, 49135},
15147 },
15148 },
15149 },
15150 {
15151 name: "SARXLloadidx1",
15152 auxType: auxSymOff,
15153 argLen: 4,
15154 faultOnNilArg0: true,
15155 symEffect: SymRead,
15156 asm: x86.ASARXL,
15157 scale: 1,
15158 reg: regInfo{
15159 inputs: []inputInfo{
15160 {2, 49135},
15161 {1, 49151},
15162 {0, 4295032831},
15163 },
15164 outputs: []outputInfo{
15165 {0, 49135},
15166 },
15167 },
15168 },
15169 {
15170 name: "SARXLloadidx4",
15171 auxType: auxSymOff,
15172 argLen: 4,
15173 faultOnNilArg0: true,
15174 symEffect: SymRead,
15175 asm: x86.ASARXL,
15176 scale: 4,
15177 reg: regInfo{
15178 inputs: []inputInfo{
15179 {2, 49135},
15180 {1, 49151},
15181 {0, 4295032831},
15182 },
15183 outputs: []outputInfo{
15184 {0, 49135},
15185 },
15186 },
15187 },
15188 {
15189 name: "SARXLloadidx8",
15190 auxType: auxSymOff,
15191 argLen: 4,
15192 faultOnNilArg0: true,
15193 symEffect: SymRead,
15194 asm: x86.ASARXL,
15195 scale: 8,
15196 reg: regInfo{
15197 inputs: []inputInfo{
15198 {2, 49135},
15199 {1, 49151},
15200 {0, 4295032831},
15201 },
15202 outputs: []outputInfo{
15203 {0, 49135},
15204 },
15205 },
15206 },
15207 {
15208 name: "SARXQloadidx1",
15209 auxType: auxSymOff,
15210 argLen: 4,
15211 faultOnNilArg0: true,
15212 symEffect: SymRead,
15213 asm: x86.ASARXQ,
15214 scale: 1,
15215 reg: regInfo{
15216 inputs: []inputInfo{
15217 {2, 49135},
15218 {1, 49151},
15219 {0, 4295032831},
15220 },
15221 outputs: []outputInfo{
15222 {0, 49135},
15223 },
15224 },
15225 },
15226 {
15227 name: "SARXQloadidx8",
15228 auxType: auxSymOff,
15229 argLen: 4,
15230 faultOnNilArg0: true,
15231 symEffect: SymRead,
15232 asm: x86.ASARXQ,
15233 scale: 8,
15234 reg: regInfo{
15235 inputs: []inputInfo{
15236 {2, 49135},
15237 {1, 49151},
15238 {0, 4295032831},
15239 },
15240 outputs: []outputInfo{
15241 {0, 49135},
15242 },
15243 },
15244 },
15245 {
15246 name: "SHLXLloadidx1",
15247 auxType: auxSymOff,
15248 argLen: 4,
15249 faultOnNilArg0: true,
15250 symEffect: SymRead,
15251 asm: x86.ASHLXL,
15252 scale: 1,
15253 reg: regInfo{
15254 inputs: []inputInfo{
15255 {2, 49135},
15256 {1, 49151},
15257 {0, 4295032831},
15258 },
15259 outputs: []outputInfo{
15260 {0, 49135},
15261 },
15262 },
15263 },
15264 {
15265 name: "SHLXLloadidx4",
15266 auxType: auxSymOff,
15267 argLen: 4,
15268 faultOnNilArg0: true,
15269 symEffect: SymRead,
15270 asm: x86.ASHLXL,
15271 scale: 4,
15272 reg: regInfo{
15273 inputs: []inputInfo{
15274 {2, 49135},
15275 {1, 49151},
15276 {0, 4295032831},
15277 },
15278 outputs: []outputInfo{
15279 {0, 49135},
15280 },
15281 },
15282 },
15283 {
15284 name: "SHLXLloadidx8",
15285 auxType: auxSymOff,
15286 argLen: 4,
15287 faultOnNilArg0: true,
15288 symEffect: SymRead,
15289 asm: x86.ASHLXL,
15290 scale: 8,
15291 reg: regInfo{
15292 inputs: []inputInfo{
15293 {2, 49135},
15294 {1, 49151},
15295 {0, 4295032831},
15296 },
15297 outputs: []outputInfo{
15298 {0, 49135},
15299 },
15300 },
15301 },
15302 {
15303 name: "SHLXQloadidx1",
15304 auxType: auxSymOff,
15305 argLen: 4,
15306 faultOnNilArg0: true,
15307 symEffect: SymRead,
15308 asm: x86.ASHLXQ,
15309 scale: 1,
15310 reg: regInfo{
15311 inputs: []inputInfo{
15312 {2, 49135},
15313 {1, 49151},
15314 {0, 4295032831},
15315 },
15316 outputs: []outputInfo{
15317 {0, 49135},
15318 },
15319 },
15320 },
15321 {
15322 name: "SHLXQloadidx8",
15323 auxType: auxSymOff,
15324 argLen: 4,
15325 faultOnNilArg0: true,
15326 symEffect: SymRead,
15327 asm: x86.ASHLXQ,
15328 scale: 8,
15329 reg: regInfo{
15330 inputs: []inputInfo{
15331 {2, 49135},
15332 {1, 49151},
15333 {0, 4295032831},
15334 },
15335 outputs: []outputInfo{
15336 {0, 49135},
15337 },
15338 },
15339 },
15340 {
15341 name: "SHRXLloadidx1",
15342 auxType: auxSymOff,
15343 argLen: 4,
15344 faultOnNilArg0: true,
15345 symEffect: SymRead,
15346 asm: x86.ASHRXL,
15347 scale: 1,
15348 reg: regInfo{
15349 inputs: []inputInfo{
15350 {2, 49135},
15351 {1, 49151},
15352 {0, 4295032831},
15353 },
15354 outputs: []outputInfo{
15355 {0, 49135},
15356 },
15357 },
15358 },
15359 {
15360 name: "SHRXLloadidx4",
15361 auxType: auxSymOff,
15362 argLen: 4,
15363 faultOnNilArg0: true,
15364 symEffect: SymRead,
15365 asm: x86.ASHRXL,
15366 scale: 4,
15367 reg: regInfo{
15368 inputs: []inputInfo{
15369 {2, 49135},
15370 {1, 49151},
15371 {0, 4295032831},
15372 },
15373 outputs: []outputInfo{
15374 {0, 49135},
15375 },
15376 },
15377 },
15378 {
15379 name: "SHRXLloadidx8",
15380 auxType: auxSymOff,
15381 argLen: 4,
15382 faultOnNilArg0: true,
15383 symEffect: SymRead,
15384 asm: x86.ASHRXL,
15385 scale: 8,
15386 reg: regInfo{
15387 inputs: []inputInfo{
15388 {2, 49135},
15389 {1, 49151},
15390 {0, 4295032831},
15391 },
15392 outputs: []outputInfo{
15393 {0, 49135},
15394 },
15395 },
15396 },
15397 {
15398 name: "SHRXQloadidx1",
15399 auxType: auxSymOff,
15400 argLen: 4,
15401 faultOnNilArg0: true,
15402 symEffect: SymRead,
15403 asm: x86.ASHRXQ,
15404 scale: 1,
15405 reg: regInfo{
15406 inputs: []inputInfo{
15407 {2, 49135},
15408 {1, 49151},
15409 {0, 4295032831},
15410 },
15411 outputs: []outputInfo{
15412 {0, 49135},
15413 },
15414 },
15415 },
15416 {
15417 name: "SHRXQloadidx8",
15418 auxType: auxSymOff,
15419 argLen: 4,
15420 faultOnNilArg0: true,
15421 symEffect: SymRead,
15422 asm: x86.ASHRXQ,
15423 scale: 8,
15424 reg: regInfo{
15425 inputs: []inputInfo{
15426 {2, 49135},
15427 {1, 49151},
15428 {0, 4295032831},
15429 },
15430 outputs: []outputInfo{
15431 {0, 49135},
15432 },
15433 },
15434 },
15435 {
15436 name: "PUNPCKLBW",
15437 argLen: 2,
15438 resultInArg0: true,
15439 asm: x86.APUNPCKLBW,
15440 reg: regInfo{
15441 inputs: []inputInfo{
15442 {0, 2147418112},
15443 {1, 2147418112},
15444 },
15445 outputs: []outputInfo{
15446 {0, 2147418112},
15447 },
15448 },
15449 },
15450 {
15451 name: "PSHUFLW",
15452 auxType: auxInt8,
15453 argLen: 1,
15454 asm: x86.APSHUFLW,
15455 reg: regInfo{
15456 inputs: []inputInfo{
15457 {0, 2147418112},
15458 },
15459 outputs: []outputInfo{
15460 {0, 2147418112},
15461 },
15462 },
15463 },
15464 {
15465 name: "PSHUFBbroadcast",
15466 argLen: 1,
15467 resultInArg0: true,
15468 asm: x86.APSHUFB,
15469 reg: regInfo{
15470 inputs: []inputInfo{
15471 {0, 2147418112},
15472 },
15473 outputs: []outputInfo{
15474 {0, 2147418112},
15475 },
15476 },
15477 },
15478 {
15479 name: "VPBROADCASTB",
15480 argLen: 1,
15481 asm: x86.AVPBROADCASTB,
15482 reg: regInfo{
15483 inputs: []inputInfo{
15484 {0, 49135},
15485 },
15486 outputs: []outputInfo{
15487 {0, 2147418112},
15488 },
15489 },
15490 },
15491 {
15492 name: "PSIGNB",
15493 argLen: 2,
15494 resultInArg0: true,
15495 asm: x86.APSIGNB,
15496 reg: regInfo{
15497 inputs: []inputInfo{
15498 {0, 2147418112},
15499 {1, 2147418112},
15500 },
15501 outputs: []outputInfo{
15502 {0, 2147418112},
15503 },
15504 },
15505 },
15506 {
15507 name: "PCMPEQB",
15508 argLen: 2,
15509 commutative: true,
15510 resultInArg0: true,
15511 asm: x86.APCMPEQB,
15512 reg: regInfo{
15513 inputs: []inputInfo{
15514 {0, 2147418112},
15515 {1, 2147418112},
15516 },
15517 outputs: []outputInfo{
15518 {0, 2147418112},
15519 },
15520 },
15521 },
15522 {
15523 name: "PMOVMSKB",
15524 argLen: 1,
15525 asm: x86.APMOVMSKB,
15526 reg: regInfo{
15527 inputs: []inputInfo{
15528 {0, 2147418112},
15529 },
15530 outputs: []outputInfo{
15531 {0, 49135},
15532 },
15533 },
15534 },
15535
15536 {
15537 name: "ADD",
15538 argLen: 2,
15539 commutative: true,
15540 asm: arm.AADD,
15541 reg: regInfo{
15542 inputs: []inputInfo{
15543 {0, 22527},
15544 {1, 22527},
15545 },
15546 outputs: []outputInfo{
15547 {0, 21503},
15548 },
15549 },
15550 },
15551 {
15552 name: "ADDconst",
15553 auxType: auxInt32,
15554 argLen: 1,
15555 asm: arm.AADD,
15556 reg: regInfo{
15557 inputs: []inputInfo{
15558 {0, 30719},
15559 },
15560 outputs: []outputInfo{
15561 {0, 21503},
15562 },
15563 },
15564 },
15565 {
15566 name: "SUB",
15567 argLen: 2,
15568 asm: arm.ASUB,
15569 reg: regInfo{
15570 inputs: []inputInfo{
15571 {0, 22527},
15572 {1, 22527},
15573 },
15574 outputs: []outputInfo{
15575 {0, 21503},
15576 },
15577 },
15578 },
15579 {
15580 name: "SUBconst",
15581 auxType: auxInt32,
15582 argLen: 1,
15583 asm: arm.ASUB,
15584 reg: regInfo{
15585 inputs: []inputInfo{
15586 {0, 22527},
15587 },
15588 outputs: []outputInfo{
15589 {0, 21503},
15590 },
15591 },
15592 },
15593 {
15594 name: "RSB",
15595 argLen: 2,
15596 asm: arm.ARSB,
15597 reg: regInfo{
15598 inputs: []inputInfo{
15599 {0, 22527},
15600 {1, 22527},
15601 },
15602 outputs: []outputInfo{
15603 {0, 21503},
15604 },
15605 },
15606 },
15607 {
15608 name: "RSBconst",
15609 auxType: auxInt32,
15610 argLen: 1,
15611 asm: arm.ARSB,
15612 reg: regInfo{
15613 inputs: []inputInfo{
15614 {0, 22527},
15615 },
15616 outputs: []outputInfo{
15617 {0, 21503},
15618 },
15619 },
15620 },
15621 {
15622 name: "MUL",
15623 argLen: 2,
15624 commutative: true,
15625 asm: arm.AMUL,
15626 reg: regInfo{
15627 inputs: []inputInfo{
15628 {0, 22527},
15629 {1, 22527},
15630 },
15631 outputs: []outputInfo{
15632 {0, 21503},
15633 },
15634 },
15635 },
15636 {
15637 name: "HMUL",
15638 argLen: 2,
15639 commutative: true,
15640 asm: arm.AMULL,
15641 reg: regInfo{
15642 inputs: []inputInfo{
15643 {0, 22527},
15644 {1, 22527},
15645 },
15646 outputs: []outputInfo{
15647 {0, 21503},
15648 },
15649 },
15650 },
15651 {
15652 name: "HMULU",
15653 argLen: 2,
15654 commutative: true,
15655 asm: arm.AMULLU,
15656 reg: regInfo{
15657 inputs: []inputInfo{
15658 {0, 22527},
15659 {1, 22527},
15660 },
15661 outputs: []outputInfo{
15662 {0, 21503},
15663 },
15664 },
15665 },
15666 {
15667 name: "CALLudiv",
15668 argLen: 2,
15669 clobberFlags: true,
15670 reg: regInfo{
15671 inputs: []inputInfo{
15672 {0, 2},
15673 {1, 1},
15674 },
15675 clobbers: 20492,
15676 outputs: []outputInfo{
15677 {0, 1},
15678 {1, 2},
15679 },
15680 },
15681 },
15682 {
15683 name: "ADDS",
15684 argLen: 2,
15685 commutative: true,
15686 asm: arm.AADD,
15687 reg: regInfo{
15688 inputs: []inputInfo{
15689 {0, 22527},
15690 {1, 22527},
15691 },
15692 outputs: []outputInfo{
15693 {1, 0},
15694 {0, 21503},
15695 },
15696 },
15697 },
15698 {
15699 name: "ADDSconst",
15700 auxType: auxInt32,
15701 argLen: 1,
15702 asm: arm.AADD,
15703 reg: regInfo{
15704 inputs: []inputInfo{
15705 {0, 22527},
15706 },
15707 outputs: []outputInfo{
15708 {1, 0},
15709 {0, 21503},
15710 },
15711 },
15712 },
15713 {
15714 name: "ADC",
15715 argLen: 3,
15716 commutative: true,
15717 asm: arm.AADC,
15718 reg: regInfo{
15719 inputs: []inputInfo{
15720 {0, 21503},
15721 {1, 21503},
15722 },
15723 outputs: []outputInfo{
15724 {0, 21503},
15725 },
15726 },
15727 },
15728 {
15729 name: "ADCconst",
15730 auxType: auxInt32,
15731 argLen: 2,
15732 asm: arm.AADC,
15733 reg: regInfo{
15734 inputs: []inputInfo{
15735 {0, 21503},
15736 },
15737 outputs: []outputInfo{
15738 {0, 21503},
15739 },
15740 },
15741 },
15742 {
15743 name: "SUBS",
15744 argLen: 2,
15745 asm: arm.ASUB,
15746 reg: regInfo{
15747 inputs: []inputInfo{
15748 {0, 22527},
15749 {1, 22527},
15750 },
15751 outputs: []outputInfo{
15752 {1, 0},
15753 {0, 21503},
15754 },
15755 },
15756 },
15757 {
15758 name: "SUBSconst",
15759 auxType: auxInt32,
15760 argLen: 1,
15761 asm: arm.ASUB,
15762 reg: regInfo{
15763 inputs: []inputInfo{
15764 {0, 22527},
15765 },
15766 outputs: []outputInfo{
15767 {1, 0},
15768 {0, 21503},
15769 },
15770 },
15771 },
15772 {
15773 name: "RSBSconst",
15774 auxType: auxInt32,
15775 argLen: 1,
15776 asm: arm.ARSB,
15777 reg: regInfo{
15778 inputs: []inputInfo{
15779 {0, 22527},
15780 },
15781 outputs: []outputInfo{
15782 {1, 0},
15783 {0, 21503},
15784 },
15785 },
15786 },
15787 {
15788 name: "SBC",
15789 argLen: 3,
15790 asm: arm.ASBC,
15791 reg: regInfo{
15792 inputs: []inputInfo{
15793 {0, 21503},
15794 {1, 21503},
15795 },
15796 outputs: []outputInfo{
15797 {0, 21503},
15798 },
15799 },
15800 },
15801 {
15802 name: "SBCconst",
15803 auxType: auxInt32,
15804 argLen: 2,
15805 asm: arm.ASBC,
15806 reg: regInfo{
15807 inputs: []inputInfo{
15808 {0, 21503},
15809 },
15810 outputs: []outputInfo{
15811 {0, 21503},
15812 },
15813 },
15814 },
15815 {
15816 name: "RSCconst",
15817 auxType: auxInt32,
15818 argLen: 2,
15819 asm: arm.ARSC,
15820 reg: regInfo{
15821 inputs: []inputInfo{
15822 {0, 21503},
15823 },
15824 outputs: []outputInfo{
15825 {0, 21503},
15826 },
15827 },
15828 },
15829 {
15830 name: "MULLU",
15831 argLen: 2,
15832 commutative: true,
15833 asm: arm.AMULLU,
15834 reg: regInfo{
15835 inputs: []inputInfo{
15836 {0, 22527},
15837 {1, 22527},
15838 },
15839 outputs: []outputInfo{
15840 {0, 21503},
15841 {1, 21503},
15842 },
15843 },
15844 },
15845 {
15846 name: "MULA",
15847 argLen: 3,
15848 asm: arm.AMULA,
15849 reg: regInfo{
15850 inputs: []inputInfo{
15851 {0, 21503},
15852 {1, 21503},
15853 {2, 21503},
15854 },
15855 outputs: []outputInfo{
15856 {0, 21503},
15857 },
15858 },
15859 },
15860 {
15861 name: "MULS",
15862 argLen: 3,
15863 asm: arm.AMULS,
15864 reg: regInfo{
15865 inputs: []inputInfo{
15866 {0, 21503},
15867 {1, 21503},
15868 {2, 21503},
15869 },
15870 outputs: []outputInfo{
15871 {0, 21503},
15872 },
15873 },
15874 },
15875 {
15876 name: "ADDF",
15877 argLen: 2,
15878 commutative: true,
15879 asm: arm.AADDF,
15880 reg: regInfo{
15881 inputs: []inputInfo{
15882 {0, 4294901760},
15883 {1, 4294901760},
15884 },
15885 outputs: []outputInfo{
15886 {0, 4294901760},
15887 },
15888 },
15889 },
15890 {
15891 name: "ADDD",
15892 argLen: 2,
15893 commutative: true,
15894 asm: arm.AADDD,
15895 reg: regInfo{
15896 inputs: []inputInfo{
15897 {0, 4294901760},
15898 {1, 4294901760},
15899 },
15900 outputs: []outputInfo{
15901 {0, 4294901760},
15902 },
15903 },
15904 },
15905 {
15906 name: "SUBF",
15907 argLen: 2,
15908 asm: arm.ASUBF,
15909 reg: regInfo{
15910 inputs: []inputInfo{
15911 {0, 4294901760},
15912 {1, 4294901760},
15913 },
15914 outputs: []outputInfo{
15915 {0, 4294901760},
15916 },
15917 },
15918 },
15919 {
15920 name: "SUBD",
15921 argLen: 2,
15922 asm: arm.ASUBD,
15923 reg: regInfo{
15924 inputs: []inputInfo{
15925 {0, 4294901760},
15926 {1, 4294901760},
15927 },
15928 outputs: []outputInfo{
15929 {0, 4294901760},
15930 },
15931 },
15932 },
15933 {
15934 name: "MULF",
15935 argLen: 2,
15936 commutative: true,
15937 asm: arm.AMULF,
15938 reg: regInfo{
15939 inputs: []inputInfo{
15940 {0, 4294901760},
15941 {1, 4294901760},
15942 },
15943 outputs: []outputInfo{
15944 {0, 4294901760},
15945 },
15946 },
15947 },
15948 {
15949 name: "MULD",
15950 argLen: 2,
15951 commutative: true,
15952 asm: arm.AMULD,
15953 reg: regInfo{
15954 inputs: []inputInfo{
15955 {0, 4294901760},
15956 {1, 4294901760},
15957 },
15958 outputs: []outputInfo{
15959 {0, 4294901760},
15960 },
15961 },
15962 },
15963 {
15964 name: "NMULF",
15965 argLen: 2,
15966 commutative: true,
15967 asm: arm.ANMULF,
15968 reg: regInfo{
15969 inputs: []inputInfo{
15970 {0, 4294901760},
15971 {1, 4294901760},
15972 },
15973 outputs: []outputInfo{
15974 {0, 4294901760},
15975 },
15976 },
15977 },
15978 {
15979 name: "NMULD",
15980 argLen: 2,
15981 commutative: true,
15982 asm: arm.ANMULD,
15983 reg: regInfo{
15984 inputs: []inputInfo{
15985 {0, 4294901760},
15986 {1, 4294901760},
15987 },
15988 outputs: []outputInfo{
15989 {0, 4294901760},
15990 },
15991 },
15992 },
15993 {
15994 name: "DIVF",
15995 argLen: 2,
15996 asm: arm.ADIVF,
15997 reg: regInfo{
15998 inputs: []inputInfo{
15999 {0, 4294901760},
16000 {1, 4294901760},
16001 },
16002 outputs: []outputInfo{
16003 {0, 4294901760},
16004 },
16005 },
16006 },
16007 {
16008 name: "DIVD",
16009 argLen: 2,
16010 asm: arm.ADIVD,
16011 reg: regInfo{
16012 inputs: []inputInfo{
16013 {0, 4294901760},
16014 {1, 4294901760},
16015 },
16016 outputs: []outputInfo{
16017 {0, 4294901760},
16018 },
16019 },
16020 },
16021 {
16022 name: "MULAF",
16023 argLen: 3,
16024 resultInArg0: true,
16025 asm: arm.AMULAF,
16026 reg: regInfo{
16027 inputs: []inputInfo{
16028 {0, 4294901760},
16029 {1, 4294901760},
16030 {2, 4294901760},
16031 },
16032 outputs: []outputInfo{
16033 {0, 4294901760},
16034 },
16035 },
16036 },
16037 {
16038 name: "MULAD",
16039 argLen: 3,
16040 resultInArg0: true,
16041 asm: arm.AMULAD,
16042 reg: regInfo{
16043 inputs: []inputInfo{
16044 {0, 4294901760},
16045 {1, 4294901760},
16046 {2, 4294901760},
16047 },
16048 outputs: []outputInfo{
16049 {0, 4294901760},
16050 },
16051 },
16052 },
16053 {
16054 name: "MULSF",
16055 argLen: 3,
16056 resultInArg0: true,
16057 asm: arm.AMULSF,
16058 reg: regInfo{
16059 inputs: []inputInfo{
16060 {0, 4294901760},
16061 {1, 4294901760},
16062 {2, 4294901760},
16063 },
16064 outputs: []outputInfo{
16065 {0, 4294901760},
16066 },
16067 },
16068 },
16069 {
16070 name: "MULSD",
16071 argLen: 3,
16072 resultInArg0: true,
16073 asm: arm.AMULSD,
16074 reg: regInfo{
16075 inputs: []inputInfo{
16076 {0, 4294901760},
16077 {1, 4294901760},
16078 {2, 4294901760},
16079 },
16080 outputs: []outputInfo{
16081 {0, 4294901760},
16082 },
16083 },
16084 },
16085 {
16086 name: "FMULAD",
16087 argLen: 3,
16088 resultInArg0: true,
16089 asm: arm.AFMULAD,
16090 reg: regInfo{
16091 inputs: []inputInfo{
16092 {0, 4294901760},
16093 {1, 4294901760},
16094 {2, 4294901760},
16095 },
16096 outputs: []outputInfo{
16097 {0, 4294901760},
16098 },
16099 },
16100 },
16101 {
16102 name: "AND",
16103 argLen: 2,
16104 commutative: true,
16105 asm: arm.AAND,
16106 reg: regInfo{
16107 inputs: []inputInfo{
16108 {0, 22527},
16109 {1, 22527},
16110 },
16111 outputs: []outputInfo{
16112 {0, 21503},
16113 },
16114 },
16115 },
16116 {
16117 name: "ANDconst",
16118 auxType: auxInt32,
16119 argLen: 1,
16120 asm: arm.AAND,
16121 reg: regInfo{
16122 inputs: []inputInfo{
16123 {0, 22527},
16124 },
16125 outputs: []outputInfo{
16126 {0, 21503},
16127 },
16128 },
16129 },
16130 {
16131 name: "OR",
16132 argLen: 2,
16133 commutative: true,
16134 asm: arm.AORR,
16135 reg: regInfo{
16136 inputs: []inputInfo{
16137 {0, 22527},
16138 {1, 22527},
16139 },
16140 outputs: []outputInfo{
16141 {0, 21503},
16142 },
16143 },
16144 },
16145 {
16146 name: "ORconst",
16147 auxType: auxInt32,
16148 argLen: 1,
16149 asm: arm.AORR,
16150 reg: regInfo{
16151 inputs: []inputInfo{
16152 {0, 22527},
16153 },
16154 outputs: []outputInfo{
16155 {0, 21503},
16156 },
16157 },
16158 },
16159 {
16160 name: "XOR",
16161 argLen: 2,
16162 commutative: true,
16163 asm: arm.AEOR,
16164 reg: regInfo{
16165 inputs: []inputInfo{
16166 {0, 22527},
16167 {1, 22527},
16168 },
16169 outputs: []outputInfo{
16170 {0, 21503},
16171 },
16172 },
16173 },
16174 {
16175 name: "XORconst",
16176 auxType: auxInt32,
16177 argLen: 1,
16178 asm: arm.AEOR,
16179 reg: regInfo{
16180 inputs: []inputInfo{
16181 {0, 22527},
16182 },
16183 outputs: []outputInfo{
16184 {0, 21503},
16185 },
16186 },
16187 },
16188 {
16189 name: "BIC",
16190 argLen: 2,
16191 asm: arm.ABIC,
16192 reg: regInfo{
16193 inputs: []inputInfo{
16194 {0, 22527},
16195 {1, 22527},
16196 },
16197 outputs: []outputInfo{
16198 {0, 21503},
16199 },
16200 },
16201 },
16202 {
16203 name: "BICconst",
16204 auxType: auxInt32,
16205 argLen: 1,
16206 asm: arm.ABIC,
16207 reg: regInfo{
16208 inputs: []inputInfo{
16209 {0, 22527},
16210 },
16211 outputs: []outputInfo{
16212 {0, 21503},
16213 },
16214 },
16215 },
16216 {
16217 name: "BFX",
16218 auxType: auxInt32,
16219 argLen: 1,
16220 asm: arm.ABFX,
16221 reg: regInfo{
16222 inputs: []inputInfo{
16223 {0, 22527},
16224 },
16225 outputs: []outputInfo{
16226 {0, 21503},
16227 },
16228 },
16229 },
16230 {
16231 name: "BFXU",
16232 auxType: auxInt32,
16233 argLen: 1,
16234 asm: arm.ABFXU,
16235 reg: regInfo{
16236 inputs: []inputInfo{
16237 {0, 22527},
16238 },
16239 outputs: []outputInfo{
16240 {0, 21503},
16241 },
16242 },
16243 },
16244 {
16245 name: "MVN",
16246 argLen: 1,
16247 asm: arm.AMVN,
16248 reg: regInfo{
16249 inputs: []inputInfo{
16250 {0, 22527},
16251 },
16252 outputs: []outputInfo{
16253 {0, 21503},
16254 },
16255 },
16256 },
16257 {
16258 name: "NEGF",
16259 argLen: 1,
16260 asm: arm.ANEGF,
16261 reg: regInfo{
16262 inputs: []inputInfo{
16263 {0, 4294901760},
16264 },
16265 outputs: []outputInfo{
16266 {0, 4294901760},
16267 },
16268 },
16269 },
16270 {
16271 name: "NEGD",
16272 argLen: 1,
16273 asm: arm.ANEGD,
16274 reg: regInfo{
16275 inputs: []inputInfo{
16276 {0, 4294901760},
16277 },
16278 outputs: []outputInfo{
16279 {0, 4294901760},
16280 },
16281 },
16282 },
16283 {
16284 name: "SQRTD",
16285 argLen: 1,
16286 asm: arm.ASQRTD,
16287 reg: regInfo{
16288 inputs: []inputInfo{
16289 {0, 4294901760},
16290 },
16291 outputs: []outputInfo{
16292 {0, 4294901760},
16293 },
16294 },
16295 },
16296 {
16297 name: "SQRTF",
16298 argLen: 1,
16299 asm: arm.ASQRTF,
16300 reg: regInfo{
16301 inputs: []inputInfo{
16302 {0, 4294901760},
16303 },
16304 outputs: []outputInfo{
16305 {0, 4294901760},
16306 },
16307 },
16308 },
16309 {
16310 name: "ABSD",
16311 argLen: 1,
16312 asm: arm.AABSD,
16313 reg: regInfo{
16314 inputs: []inputInfo{
16315 {0, 4294901760},
16316 },
16317 outputs: []outputInfo{
16318 {0, 4294901760},
16319 },
16320 },
16321 },
16322 {
16323 name: "CLZ",
16324 argLen: 1,
16325 asm: arm.ACLZ,
16326 reg: regInfo{
16327 inputs: []inputInfo{
16328 {0, 22527},
16329 },
16330 outputs: []outputInfo{
16331 {0, 21503},
16332 },
16333 },
16334 },
16335 {
16336 name: "REV",
16337 argLen: 1,
16338 asm: arm.AREV,
16339 reg: regInfo{
16340 inputs: []inputInfo{
16341 {0, 22527},
16342 },
16343 outputs: []outputInfo{
16344 {0, 21503},
16345 },
16346 },
16347 },
16348 {
16349 name: "REV16",
16350 argLen: 1,
16351 asm: arm.AREV16,
16352 reg: regInfo{
16353 inputs: []inputInfo{
16354 {0, 22527},
16355 },
16356 outputs: []outputInfo{
16357 {0, 21503},
16358 },
16359 },
16360 },
16361 {
16362 name: "RBIT",
16363 argLen: 1,
16364 asm: arm.ARBIT,
16365 reg: regInfo{
16366 inputs: []inputInfo{
16367 {0, 22527},
16368 },
16369 outputs: []outputInfo{
16370 {0, 21503},
16371 },
16372 },
16373 },
16374 {
16375 name: "SLL",
16376 argLen: 2,
16377 asm: arm.ASLL,
16378 reg: regInfo{
16379 inputs: []inputInfo{
16380 {0, 22527},
16381 {1, 22527},
16382 },
16383 outputs: []outputInfo{
16384 {0, 21503},
16385 },
16386 },
16387 },
16388 {
16389 name: "SLLconst",
16390 auxType: auxInt32,
16391 argLen: 1,
16392 asm: arm.ASLL,
16393 reg: regInfo{
16394 inputs: []inputInfo{
16395 {0, 22527},
16396 },
16397 outputs: []outputInfo{
16398 {0, 21503},
16399 },
16400 },
16401 },
16402 {
16403 name: "SRL",
16404 argLen: 2,
16405 asm: arm.ASRL,
16406 reg: regInfo{
16407 inputs: []inputInfo{
16408 {0, 22527},
16409 {1, 22527},
16410 },
16411 outputs: []outputInfo{
16412 {0, 21503},
16413 },
16414 },
16415 },
16416 {
16417 name: "SRLconst",
16418 auxType: auxInt32,
16419 argLen: 1,
16420 asm: arm.ASRL,
16421 reg: regInfo{
16422 inputs: []inputInfo{
16423 {0, 22527},
16424 },
16425 outputs: []outputInfo{
16426 {0, 21503},
16427 },
16428 },
16429 },
16430 {
16431 name: "SRA",
16432 argLen: 2,
16433 asm: arm.ASRA,
16434 reg: regInfo{
16435 inputs: []inputInfo{
16436 {0, 22527},
16437 {1, 22527},
16438 },
16439 outputs: []outputInfo{
16440 {0, 21503},
16441 },
16442 },
16443 },
16444 {
16445 name: "SRAconst",
16446 auxType: auxInt32,
16447 argLen: 1,
16448 asm: arm.ASRA,
16449 reg: regInfo{
16450 inputs: []inputInfo{
16451 {0, 22527},
16452 },
16453 outputs: []outputInfo{
16454 {0, 21503},
16455 },
16456 },
16457 },
16458 {
16459 name: "SRR",
16460 argLen: 2,
16461 reg: regInfo{
16462 inputs: []inputInfo{
16463 {0, 22527},
16464 {1, 22527},
16465 },
16466 outputs: []outputInfo{
16467 {0, 21503},
16468 },
16469 },
16470 },
16471 {
16472 name: "SRRconst",
16473 auxType: auxInt32,
16474 argLen: 1,
16475 reg: regInfo{
16476 inputs: []inputInfo{
16477 {0, 22527},
16478 },
16479 outputs: []outputInfo{
16480 {0, 21503},
16481 },
16482 },
16483 },
16484 {
16485 name: "ADDshiftLL",
16486 auxType: auxInt32,
16487 argLen: 2,
16488 asm: arm.AADD,
16489 reg: regInfo{
16490 inputs: []inputInfo{
16491 {0, 22527},
16492 {1, 22527},
16493 },
16494 outputs: []outputInfo{
16495 {0, 21503},
16496 },
16497 },
16498 },
16499 {
16500 name: "ADDshiftRL",
16501 auxType: auxInt32,
16502 argLen: 2,
16503 asm: arm.AADD,
16504 reg: regInfo{
16505 inputs: []inputInfo{
16506 {0, 22527},
16507 {1, 22527},
16508 },
16509 outputs: []outputInfo{
16510 {0, 21503},
16511 },
16512 },
16513 },
16514 {
16515 name: "ADDshiftRA",
16516 auxType: auxInt32,
16517 argLen: 2,
16518 asm: arm.AADD,
16519 reg: regInfo{
16520 inputs: []inputInfo{
16521 {0, 22527},
16522 {1, 22527},
16523 },
16524 outputs: []outputInfo{
16525 {0, 21503},
16526 },
16527 },
16528 },
16529 {
16530 name: "SUBshiftLL",
16531 auxType: auxInt32,
16532 argLen: 2,
16533 asm: arm.ASUB,
16534 reg: regInfo{
16535 inputs: []inputInfo{
16536 {0, 22527},
16537 {1, 22527},
16538 },
16539 outputs: []outputInfo{
16540 {0, 21503},
16541 },
16542 },
16543 },
16544 {
16545 name: "SUBshiftRL",
16546 auxType: auxInt32,
16547 argLen: 2,
16548 asm: arm.ASUB,
16549 reg: regInfo{
16550 inputs: []inputInfo{
16551 {0, 22527},
16552 {1, 22527},
16553 },
16554 outputs: []outputInfo{
16555 {0, 21503},
16556 },
16557 },
16558 },
16559 {
16560 name: "SUBshiftRA",
16561 auxType: auxInt32,
16562 argLen: 2,
16563 asm: arm.ASUB,
16564 reg: regInfo{
16565 inputs: []inputInfo{
16566 {0, 22527},
16567 {1, 22527},
16568 },
16569 outputs: []outputInfo{
16570 {0, 21503},
16571 },
16572 },
16573 },
16574 {
16575 name: "RSBshiftLL",
16576 auxType: auxInt32,
16577 argLen: 2,
16578 asm: arm.ARSB,
16579 reg: regInfo{
16580 inputs: []inputInfo{
16581 {0, 22527},
16582 {1, 22527},
16583 },
16584 outputs: []outputInfo{
16585 {0, 21503},
16586 },
16587 },
16588 },
16589 {
16590 name: "RSBshiftRL",
16591 auxType: auxInt32,
16592 argLen: 2,
16593 asm: arm.ARSB,
16594 reg: regInfo{
16595 inputs: []inputInfo{
16596 {0, 22527},
16597 {1, 22527},
16598 },
16599 outputs: []outputInfo{
16600 {0, 21503},
16601 },
16602 },
16603 },
16604 {
16605 name: "RSBshiftRA",
16606 auxType: auxInt32,
16607 argLen: 2,
16608 asm: arm.ARSB,
16609 reg: regInfo{
16610 inputs: []inputInfo{
16611 {0, 22527},
16612 {1, 22527},
16613 },
16614 outputs: []outputInfo{
16615 {0, 21503},
16616 },
16617 },
16618 },
16619 {
16620 name: "ANDshiftLL",
16621 auxType: auxInt32,
16622 argLen: 2,
16623 asm: arm.AAND,
16624 reg: regInfo{
16625 inputs: []inputInfo{
16626 {0, 22527},
16627 {1, 22527},
16628 },
16629 outputs: []outputInfo{
16630 {0, 21503},
16631 },
16632 },
16633 },
16634 {
16635 name: "ANDshiftRL",
16636 auxType: auxInt32,
16637 argLen: 2,
16638 asm: arm.AAND,
16639 reg: regInfo{
16640 inputs: []inputInfo{
16641 {0, 22527},
16642 {1, 22527},
16643 },
16644 outputs: []outputInfo{
16645 {0, 21503},
16646 },
16647 },
16648 },
16649 {
16650 name: "ANDshiftRA",
16651 auxType: auxInt32,
16652 argLen: 2,
16653 asm: arm.AAND,
16654 reg: regInfo{
16655 inputs: []inputInfo{
16656 {0, 22527},
16657 {1, 22527},
16658 },
16659 outputs: []outputInfo{
16660 {0, 21503},
16661 },
16662 },
16663 },
16664 {
16665 name: "ORshiftLL",
16666 auxType: auxInt32,
16667 argLen: 2,
16668 asm: arm.AORR,
16669 reg: regInfo{
16670 inputs: []inputInfo{
16671 {0, 22527},
16672 {1, 22527},
16673 },
16674 outputs: []outputInfo{
16675 {0, 21503},
16676 },
16677 },
16678 },
16679 {
16680 name: "ORshiftRL",
16681 auxType: auxInt32,
16682 argLen: 2,
16683 asm: arm.AORR,
16684 reg: regInfo{
16685 inputs: []inputInfo{
16686 {0, 22527},
16687 {1, 22527},
16688 },
16689 outputs: []outputInfo{
16690 {0, 21503},
16691 },
16692 },
16693 },
16694 {
16695 name: "ORshiftRA",
16696 auxType: auxInt32,
16697 argLen: 2,
16698 asm: arm.AORR,
16699 reg: regInfo{
16700 inputs: []inputInfo{
16701 {0, 22527},
16702 {1, 22527},
16703 },
16704 outputs: []outputInfo{
16705 {0, 21503},
16706 },
16707 },
16708 },
16709 {
16710 name: "XORshiftLL",
16711 auxType: auxInt32,
16712 argLen: 2,
16713 asm: arm.AEOR,
16714 reg: regInfo{
16715 inputs: []inputInfo{
16716 {0, 22527},
16717 {1, 22527},
16718 },
16719 outputs: []outputInfo{
16720 {0, 21503},
16721 },
16722 },
16723 },
16724 {
16725 name: "XORshiftRL",
16726 auxType: auxInt32,
16727 argLen: 2,
16728 asm: arm.AEOR,
16729 reg: regInfo{
16730 inputs: []inputInfo{
16731 {0, 22527},
16732 {1, 22527},
16733 },
16734 outputs: []outputInfo{
16735 {0, 21503},
16736 },
16737 },
16738 },
16739 {
16740 name: "XORshiftRA",
16741 auxType: auxInt32,
16742 argLen: 2,
16743 asm: arm.AEOR,
16744 reg: regInfo{
16745 inputs: []inputInfo{
16746 {0, 22527},
16747 {1, 22527},
16748 },
16749 outputs: []outputInfo{
16750 {0, 21503},
16751 },
16752 },
16753 },
16754 {
16755 name: "XORshiftRR",
16756 auxType: auxInt32,
16757 argLen: 2,
16758 asm: arm.AEOR,
16759 reg: regInfo{
16760 inputs: []inputInfo{
16761 {0, 22527},
16762 {1, 22527},
16763 },
16764 outputs: []outputInfo{
16765 {0, 21503},
16766 },
16767 },
16768 },
16769 {
16770 name: "BICshiftLL",
16771 auxType: auxInt32,
16772 argLen: 2,
16773 asm: arm.ABIC,
16774 reg: regInfo{
16775 inputs: []inputInfo{
16776 {0, 22527},
16777 {1, 22527},
16778 },
16779 outputs: []outputInfo{
16780 {0, 21503},
16781 },
16782 },
16783 },
16784 {
16785 name: "BICshiftRL",
16786 auxType: auxInt32,
16787 argLen: 2,
16788 asm: arm.ABIC,
16789 reg: regInfo{
16790 inputs: []inputInfo{
16791 {0, 22527},
16792 {1, 22527},
16793 },
16794 outputs: []outputInfo{
16795 {0, 21503},
16796 },
16797 },
16798 },
16799 {
16800 name: "BICshiftRA",
16801 auxType: auxInt32,
16802 argLen: 2,
16803 asm: arm.ABIC,
16804 reg: regInfo{
16805 inputs: []inputInfo{
16806 {0, 22527},
16807 {1, 22527},
16808 },
16809 outputs: []outputInfo{
16810 {0, 21503},
16811 },
16812 },
16813 },
16814 {
16815 name: "MVNshiftLL",
16816 auxType: auxInt32,
16817 argLen: 1,
16818 asm: arm.AMVN,
16819 reg: regInfo{
16820 inputs: []inputInfo{
16821 {0, 22527},
16822 },
16823 outputs: []outputInfo{
16824 {0, 21503},
16825 },
16826 },
16827 },
16828 {
16829 name: "MVNshiftRL",
16830 auxType: auxInt32,
16831 argLen: 1,
16832 asm: arm.AMVN,
16833 reg: regInfo{
16834 inputs: []inputInfo{
16835 {0, 22527},
16836 },
16837 outputs: []outputInfo{
16838 {0, 21503},
16839 },
16840 },
16841 },
16842 {
16843 name: "MVNshiftRA",
16844 auxType: auxInt32,
16845 argLen: 1,
16846 asm: arm.AMVN,
16847 reg: regInfo{
16848 inputs: []inputInfo{
16849 {0, 22527},
16850 },
16851 outputs: []outputInfo{
16852 {0, 21503},
16853 },
16854 },
16855 },
16856 {
16857 name: "ADCshiftLL",
16858 auxType: auxInt32,
16859 argLen: 3,
16860 asm: arm.AADC,
16861 reg: regInfo{
16862 inputs: []inputInfo{
16863 {0, 21503},
16864 {1, 21503},
16865 },
16866 outputs: []outputInfo{
16867 {0, 21503},
16868 },
16869 },
16870 },
16871 {
16872 name: "ADCshiftRL",
16873 auxType: auxInt32,
16874 argLen: 3,
16875 asm: arm.AADC,
16876 reg: regInfo{
16877 inputs: []inputInfo{
16878 {0, 21503},
16879 {1, 21503},
16880 },
16881 outputs: []outputInfo{
16882 {0, 21503},
16883 },
16884 },
16885 },
16886 {
16887 name: "ADCshiftRA",
16888 auxType: auxInt32,
16889 argLen: 3,
16890 asm: arm.AADC,
16891 reg: regInfo{
16892 inputs: []inputInfo{
16893 {0, 21503},
16894 {1, 21503},
16895 },
16896 outputs: []outputInfo{
16897 {0, 21503},
16898 },
16899 },
16900 },
16901 {
16902 name: "SBCshiftLL",
16903 auxType: auxInt32,
16904 argLen: 3,
16905 asm: arm.ASBC,
16906 reg: regInfo{
16907 inputs: []inputInfo{
16908 {0, 21503},
16909 {1, 21503},
16910 },
16911 outputs: []outputInfo{
16912 {0, 21503},
16913 },
16914 },
16915 },
16916 {
16917 name: "SBCshiftRL",
16918 auxType: auxInt32,
16919 argLen: 3,
16920 asm: arm.ASBC,
16921 reg: regInfo{
16922 inputs: []inputInfo{
16923 {0, 21503},
16924 {1, 21503},
16925 },
16926 outputs: []outputInfo{
16927 {0, 21503},
16928 },
16929 },
16930 },
16931 {
16932 name: "SBCshiftRA",
16933 auxType: auxInt32,
16934 argLen: 3,
16935 asm: arm.ASBC,
16936 reg: regInfo{
16937 inputs: []inputInfo{
16938 {0, 21503},
16939 {1, 21503},
16940 },
16941 outputs: []outputInfo{
16942 {0, 21503},
16943 },
16944 },
16945 },
16946 {
16947 name: "RSCshiftLL",
16948 auxType: auxInt32,
16949 argLen: 3,
16950 asm: arm.ARSC,
16951 reg: regInfo{
16952 inputs: []inputInfo{
16953 {0, 21503},
16954 {1, 21503},
16955 },
16956 outputs: []outputInfo{
16957 {0, 21503},
16958 },
16959 },
16960 },
16961 {
16962 name: "RSCshiftRL",
16963 auxType: auxInt32,
16964 argLen: 3,
16965 asm: arm.ARSC,
16966 reg: regInfo{
16967 inputs: []inputInfo{
16968 {0, 21503},
16969 {1, 21503},
16970 },
16971 outputs: []outputInfo{
16972 {0, 21503},
16973 },
16974 },
16975 },
16976 {
16977 name: "RSCshiftRA",
16978 auxType: auxInt32,
16979 argLen: 3,
16980 asm: arm.ARSC,
16981 reg: regInfo{
16982 inputs: []inputInfo{
16983 {0, 21503},
16984 {1, 21503},
16985 },
16986 outputs: []outputInfo{
16987 {0, 21503},
16988 },
16989 },
16990 },
16991 {
16992 name: "ADDSshiftLL",
16993 auxType: auxInt32,
16994 argLen: 2,
16995 asm: arm.AADD,
16996 reg: regInfo{
16997 inputs: []inputInfo{
16998 {0, 22527},
16999 {1, 22527},
17000 },
17001 outputs: []outputInfo{
17002 {1, 0},
17003 {0, 21503},
17004 },
17005 },
17006 },
17007 {
17008 name: "ADDSshiftRL",
17009 auxType: auxInt32,
17010 argLen: 2,
17011 asm: arm.AADD,
17012 reg: regInfo{
17013 inputs: []inputInfo{
17014 {0, 22527},
17015 {1, 22527},
17016 },
17017 outputs: []outputInfo{
17018 {1, 0},
17019 {0, 21503},
17020 },
17021 },
17022 },
17023 {
17024 name: "ADDSshiftRA",
17025 auxType: auxInt32,
17026 argLen: 2,
17027 asm: arm.AADD,
17028 reg: regInfo{
17029 inputs: []inputInfo{
17030 {0, 22527},
17031 {1, 22527},
17032 },
17033 outputs: []outputInfo{
17034 {1, 0},
17035 {0, 21503},
17036 },
17037 },
17038 },
17039 {
17040 name: "SUBSshiftLL",
17041 auxType: auxInt32,
17042 argLen: 2,
17043 asm: arm.ASUB,
17044 reg: regInfo{
17045 inputs: []inputInfo{
17046 {0, 22527},
17047 {1, 22527},
17048 },
17049 outputs: []outputInfo{
17050 {1, 0},
17051 {0, 21503},
17052 },
17053 },
17054 },
17055 {
17056 name: "SUBSshiftRL",
17057 auxType: auxInt32,
17058 argLen: 2,
17059 asm: arm.ASUB,
17060 reg: regInfo{
17061 inputs: []inputInfo{
17062 {0, 22527},
17063 {1, 22527},
17064 },
17065 outputs: []outputInfo{
17066 {1, 0},
17067 {0, 21503},
17068 },
17069 },
17070 },
17071 {
17072 name: "SUBSshiftRA",
17073 auxType: auxInt32,
17074 argLen: 2,
17075 asm: arm.ASUB,
17076 reg: regInfo{
17077 inputs: []inputInfo{
17078 {0, 22527},
17079 {1, 22527},
17080 },
17081 outputs: []outputInfo{
17082 {1, 0},
17083 {0, 21503},
17084 },
17085 },
17086 },
17087 {
17088 name: "RSBSshiftLL",
17089 auxType: auxInt32,
17090 argLen: 2,
17091 asm: arm.ARSB,
17092 reg: regInfo{
17093 inputs: []inputInfo{
17094 {0, 22527},
17095 {1, 22527},
17096 },
17097 outputs: []outputInfo{
17098 {1, 0},
17099 {0, 21503},
17100 },
17101 },
17102 },
17103 {
17104 name: "RSBSshiftRL",
17105 auxType: auxInt32,
17106 argLen: 2,
17107 asm: arm.ARSB,
17108 reg: regInfo{
17109 inputs: []inputInfo{
17110 {0, 22527},
17111 {1, 22527},
17112 },
17113 outputs: []outputInfo{
17114 {1, 0},
17115 {0, 21503},
17116 },
17117 },
17118 },
17119 {
17120 name: "RSBSshiftRA",
17121 auxType: auxInt32,
17122 argLen: 2,
17123 asm: arm.ARSB,
17124 reg: regInfo{
17125 inputs: []inputInfo{
17126 {0, 22527},
17127 {1, 22527},
17128 },
17129 outputs: []outputInfo{
17130 {1, 0},
17131 {0, 21503},
17132 },
17133 },
17134 },
17135 {
17136 name: "ADDshiftLLreg",
17137 argLen: 3,
17138 asm: arm.AADD,
17139 reg: regInfo{
17140 inputs: []inputInfo{
17141 {0, 21503},
17142 {1, 21503},
17143 {2, 21503},
17144 },
17145 outputs: []outputInfo{
17146 {0, 21503},
17147 },
17148 },
17149 },
17150 {
17151 name: "ADDshiftRLreg",
17152 argLen: 3,
17153 asm: arm.AADD,
17154 reg: regInfo{
17155 inputs: []inputInfo{
17156 {0, 21503},
17157 {1, 21503},
17158 {2, 21503},
17159 },
17160 outputs: []outputInfo{
17161 {0, 21503},
17162 },
17163 },
17164 },
17165 {
17166 name: "ADDshiftRAreg",
17167 argLen: 3,
17168 asm: arm.AADD,
17169 reg: regInfo{
17170 inputs: []inputInfo{
17171 {0, 21503},
17172 {1, 21503},
17173 {2, 21503},
17174 },
17175 outputs: []outputInfo{
17176 {0, 21503},
17177 },
17178 },
17179 },
17180 {
17181 name: "SUBshiftLLreg",
17182 argLen: 3,
17183 asm: arm.ASUB,
17184 reg: regInfo{
17185 inputs: []inputInfo{
17186 {0, 21503},
17187 {1, 21503},
17188 {2, 21503},
17189 },
17190 outputs: []outputInfo{
17191 {0, 21503},
17192 },
17193 },
17194 },
17195 {
17196 name: "SUBshiftRLreg",
17197 argLen: 3,
17198 asm: arm.ASUB,
17199 reg: regInfo{
17200 inputs: []inputInfo{
17201 {0, 21503},
17202 {1, 21503},
17203 {2, 21503},
17204 },
17205 outputs: []outputInfo{
17206 {0, 21503},
17207 },
17208 },
17209 },
17210 {
17211 name: "SUBshiftRAreg",
17212 argLen: 3,
17213 asm: arm.ASUB,
17214 reg: regInfo{
17215 inputs: []inputInfo{
17216 {0, 21503},
17217 {1, 21503},
17218 {2, 21503},
17219 },
17220 outputs: []outputInfo{
17221 {0, 21503},
17222 },
17223 },
17224 },
17225 {
17226 name: "RSBshiftLLreg",
17227 argLen: 3,
17228 asm: arm.ARSB,
17229 reg: regInfo{
17230 inputs: []inputInfo{
17231 {0, 21503},
17232 {1, 21503},
17233 {2, 21503},
17234 },
17235 outputs: []outputInfo{
17236 {0, 21503},
17237 },
17238 },
17239 },
17240 {
17241 name: "RSBshiftRLreg",
17242 argLen: 3,
17243 asm: arm.ARSB,
17244 reg: regInfo{
17245 inputs: []inputInfo{
17246 {0, 21503},
17247 {1, 21503},
17248 {2, 21503},
17249 },
17250 outputs: []outputInfo{
17251 {0, 21503},
17252 },
17253 },
17254 },
17255 {
17256 name: "RSBshiftRAreg",
17257 argLen: 3,
17258 asm: arm.ARSB,
17259 reg: regInfo{
17260 inputs: []inputInfo{
17261 {0, 21503},
17262 {1, 21503},
17263 {2, 21503},
17264 },
17265 outputs: []outputInfo{
17266 {0, 21503},
17267 },
17268 },
17269 },
17270 {
17271 name: "ANDshiftLLreg",
17272 argLen: 3,
17273 asm: arm.AAND,
17274 reg: regInfo{
17275 inputs: []inputInfo{
17276 {0, 21503},
17277 {1, 21503},
17278 {2, 21503},
17279 },
17280 outputs: []outputInfo{
17281 {0, 21503},
17282 },
17283 },
17284 },
17285 {
17286 name: "ANDshiftRLreg",
17287 argLen: 3,
17288 asm: arm.AAND,
17289 reg: regInfo{
17290 inputs: []inputInfo{
17291 {0, 21503},
17292 {1, 21503},
17293 {2, 21503},
17294 },
17295 outputs: []outputInfo{
17296 {0, 21503},
17297 },
17298 },
17299 },
17300 {
17301 name: "ANDshiftRAreg",
17302 argLen: 3,
17303 asm: arm.AAND,
17304 reg: regInfo{
17305 inputs: []inputInfo{
17306 {0, 21503},
17307 {1, 21503},
17308 {2, 21503},
17309 },
17310 outputs: []outputInfo{
17311 {0, 21503},
17312 },
17313 },
17314 },
17315 {
17316 name: "ORshiftLLreg",
17317 argLen: 3,
17318 asm: arm.AORR,
17319 reg: regInfo{
17320 inputs: []inputInfo{
17321 {0, 21503},
17322 {1, 21503},
17323 {2, 21503},
17324 },
17325 outputs: []outputInfo{
17326 {0, 21503},
17327 },
17328 },
17329 },
17330 {
17331 name: "ORshiftRLreg",
17332 argLen: 3,
17333 asm: arm.AORR,
17334 reg: regInfo{
17335 inputs: []inputInfo{
17336 {0, 21503},
17337 {1, 21503},
17338 {2, 21503},
17339 },
17340 outputs: []outputInfo{
17341 {0, 21503},
17342 },
17343 },
17344 },
17345 {
17346 name: "ORshiftRAreg",
17347 argLen: 3,
17348 asm: arm.AORR,
17349 reg: regInfo{
17350 inputs: []inputInfo{
17351 {0, 21503},
17352 {1, 21503},
17353 {2, 21503},
17354 },
17355 outputs: []outputInfo{
17356 {0, 21503},
17357 },
17358 },
17359 },
17360 {
17361 name: "XORshiftLLreg",
17362 argLen: 3,
17363 asm: arm.AEOR,
17364 reg: regInfo{
17365 inputs: []inputInfo{
17366 {0, 21503},
17367 {1, 21503},
17368 {2, 21503},
17369 },
17370 outputs: []outputInfo{
17371 {0, 21503},
17372 },
17373 },
17374 },
17375 {
17376 name: "XORshiftRLreg",
17377 argLen: 3,
17378 asm: arm.AEOR,
17379 reg: regInfo{
17380 inputs: []inputInfo{
17381 {0, 21503},
17382 {1, 21503},
17383 {2, 21503},
17384 },
17385 outputs: []outputInfo{
17386 {0, 21503},
17387 },
17388 },
17389 },
17390 {
17391 name: "XORshiftRAreg",
17392 argLen: 3,
17393 asm: arm.AEOR,
17394 reg: regInfo{
17395 inputs: []inputInfo{
17396 {0, 21503},
17397 {1, 21503},
17398 {2, 21503},
17399 },
17400 outputs: []outputInfo{
17401 {0, 21503},
17402 },
17403 },
17404 },
17405 {
17406 name: "BICshiftLLreg",
17407 argLen: 3,
17408 asm: arm.ABIC,
17409 reg: regInfo{
17410 inputs: []inputInfo{
17411 {0, 21503},
17412 {1, 21503},
17413 {2, 21503},
17414 },
17415 outputs: []outputInfo{
17416 {0, 21503},
17417 },
17418 },
17419 },
17420 {
17421 name: "BICshiftRLreg",
17422 argLen: 3,
17423 asm: arm.ABIC,
17424 reg: regInfo{
17425 inputs: []inputInfo{
17426 {0, 21503},
17427 {1, 21503},
17428 {2, 21503},
17429 },
17430 outputs: []outputInfo{
17431 {0, 21503},
17432 },
17433 },
17434 },
17435 {
17436 name: "BICshiftRAreg",
17437 argLen: 3,
17438 asm: arm.ABIC,
17439 reg: regInfo{
17440 inputs: []inputInfo{
17441 {0, 21503},
17442 {1, 21503},
17443 {2, 21503},
17444 },
17445 outputs: []outputInfo{
17446 {0, 21503},
17447 },
17448 },
17449 },
17450 {
17451 name: "MVNshiftLLreg",
17452 argLen: 2,
17453 asm: arm.AMVN,
17454 reg: regInfo{
17455 inputs: []inputInfo{
17456 {0, 22527},
17457 {1, 22527},
17458 },
17459 outputs: []outputInfo{
17460 {0, 21503},
17461 },
17462 },
17463 },
17464 {
17465 name: "MVNshiftRLreg",
17466 argLen: 2,
17467 asm: arm.AMVN,
17468 reg: regInfo{
17469 inputs: []inputInfo{
17470 {0, 22527},
17471 {1, 22527},
17472 },
17473 outputs: []outputInfo{
17474 {0, 21503},
17475 },
17476 },
17477 },
17478 {
17479 name: "MVNshiftRAreg",
17480 argLen: 2,
17481 asm: arm.AMVN,
17482 reg: regInfo{
17483 inputs: []inputInfo{
17484 {0, 22527},
17485 {1, 22527},
17486 },
17487 outputs: []outputInfo{
17488 {0, 21503},
17489 },
17490 },
17491 },
17492 {
17493 name: "ADCshiftLLreg",
17494 argLen: 4,
17495 asm: arm.AADC,
17496 reg: regInfo{
17497 inputs: []inputInfo{
17498 {0, 21503},
17499 {1, 21503},
17500 {2, 21503},
17501 },
17502 outputs: []outputInfo{
17503 {0, 21503},
17504 },
17505 },
17506 },
17507 {
17508 name: "ADCshiftRLreg",
17509 argLen: 4,
17510 asm: arm.AADC,
17511 reg: regInfo{
17512 inputs: []inputInfo{
17513 {0, 21503},
17514 {1, 21503},
17515 {2, 21503},
17516 },
17517 outputs: []outputInfo{
17518 {0, 21503},
17519 },
17520 },
17521 },
17522 {
17523 name: "ADCshiftRAreg",
17524 argLen: 4,
17525 asm: arm.AADC,
17526 reg: regInfo{
17527 inputs: []inputInfo{
17528 {0, 21503},
17529 {1, 21503},
17530 {2, 21503},
17531 },
17532 outputs: []outputInfo{
17533 {0, 21503},
17534 },
17535 },
17536 },
17537 {
17538 name: "SBCshiftLLreg",
17539 argLen: 4,
17540 asm: arm.ASBC,
17541 reg: regInfo{
17542 inputs: []inputInfo{
17543 {0, 21503},
17544 {1, 21503},
17545 {2, 21503},
17546 },
17547 outputs: []outputInfo{
17548 {0, 21503},
17549 },
17550 },
17551 },
17552 {
17553 name: "SBCshiftRLreg",
17554 argLen: 4,
17555 asm: arm.ASBC,
17556 reg: regInfo{
17557 inputs: []inputInfo{
17558 {0, 21503},
17559 {1, 21503},
17560 {2, 21503},
17561 },
17562 outputs: []outputInfo{
17563 {0, 21503},
17564 },
17565 },
17566 },
17567 {
17568 name: "SBCshiftRAreg",
17569 argLen: 4,
17570 asm: arm.ASBC,
17571 reg: regInfo{
17572 inputs: []inputInfo{
17573 {0, 21503},
17574 {1, 21503},
17575 {2, 21503},
17576 },
17577 outputs: []outputInfo{
17578 {0, 21503},
17579 },
17580 },
17581 },
17582 {
17583 name: "RSCshiftLLreg",
17584 argLen: 4,
17585 asm: arm.ARSC,
17586 reg: regInfo{
17587 inputs: []inputInfo{
17588 {0, 21503},
17589 {1, 21503},
17590 {2, 21503},
17591 },
17592 outputs: []outputInfo{
17593 {0, 21503},
17594 },
17595 },
17596 },
17597 {
17598 name: "RSCshiftRLreg",
17599 argLen: 4,
17600 asm: arm.ARSC,
17601 reg: regInfo{
17602 inputs: []inputInfo{
17603 {0, 21503},
17604 {1, 21503},
17605 {2, 21503},
17606 },
17607 outputs: []outputInfo{
17608 {0, 21503},
17609 },
17610 },
17611 },
17612 {
17613 name: "RSCshiftRAreg",
17614 argLen: 4,
17615 asm: arm.ARSC,
17616 reg: regInfo{
17617 inputs: []inputInfo{
17618 {0, 21503},
17619 {1, 21503},
17620 {2, 21503},
17621 },
17622 outputs: []outputInfo{
17623 {0, 21503},
17624 },
17625 },
17626 },
17627 {
17628 name: "ADDSshiftLLreg",
17629 argLen: 3,
17630 asm: arm.AADD,
17631 reg: regInfo{
17632 inputs: []inputInfo{
17633 {0, 21503},
17634 {1, 21503},
17635 {2, 21503},
17636 },
17637 outputs: []outputInfo{
17638 {1, 0},
17639 {0, 21503},
17640 },
17641 },
17642 },
17643 {
17644 name: "ADDSshiftRLreg",
17645 argLen: 3,
17646 asm: arm.AADD,
17647 reg: regInfo{
17648 inputs: []inputInfo{
17649 {0, 21503},
17650 {1, 21503},
17651 {2, 21503},
17652 },
17653 outputs: []outputInfo{
17654 {1, 0},
17655 {0, 21503},
17656 },
17657 },
17658 },
17659 {
17660 name: "ADDSshiftRAreg",
17661 argLen: 3,
17662 asm: arm.AADD,
17663 reg: regInfo{
17664 inputs: []inputInfo{
17665 {0, 21503},
17666 {1, 21503},
17667 {2, 21503},
17668 },
17669 outputs: []outputInfo{
17670 {1, 0},
17671 {0, 21503},
17672 },
17673 },
17674 },
17675 {
17676 name: "SUBSshiftLLreg",
17677 argLen: 3,
17678 asm: arm.ASUB,
17679 reg: regInfo{
17680 inputs: []inputInfo{
17681 {0, 21503},
17682 {1, 21503},
17683 {2, 21503},
17684 },
17685 outputs: []outputInfo{
17686 {1, 0},
17687 {0, 21503},
17688 },
17689 },
17690 },
17691 {
17692 name: "SUBSshiftRLreg",
17693 argLen: 3,
17694 asm: arm.ASUB,
17695 reg: regInfo{
17696 inputs: []inputInfo{
17697 {0, 21503},
17698 {1, 21503},
17699 {2, 21503},
17700 },
17701 outputs: []outputInfo{
17702 {1, 0},
17703 {0, 21503},
17704 },
17705 },
17706 },
17707 {
17708 name: "SUBSshiftRAreg",
17709 argLen: 3,
17710 asm: arm.ASUB,
17711 reg: regInfo{
17712 inputs: []inputInfo{
17713 {0, 21503},
17714 {1, 21503},
17715 {2, 21503},
17716 },
17717 outputs: []outputInfo{
17718 {1, 0},
17719 {0, 21503},
17720 },
17721 },
17722 },
17723 {
17724 name: "RSBSshiftLLreg",
17725 argLen: 3,
17726 asm: arm.ARSB,
17727 reg: regInfo{
17728 inputs: []inputInfo{
17729 {0, 21503},
17730 {1, 21503},
17731 {2, 21503},
17732 },
17733 outputs: []outputInfo{
17734 {1, 0},
17735 {0, 21503},
17736 },
17737 },
17738 },
17739 {
17740 name: "RSBSshiftRLreg",
17741 argLen: 3,
17742 asm: arm.ARSB,
17743 reg: regInfo{
17744 inputs: []inputInfo{
17745 {0, 21503},
17746 {1, 21503},
17747 {2, 21503},
17748 },
17749 outputs: []outputInfo{
17750 {1, 0},
17751 {0, 21503},
17752 },
17753 },
17754 },
17755 {
17756 name: "RSBSshiftRAreg",
17757 argLen: 3,
17758 asm: arm.ARSB,
17759 reg: regInfo{
17760 inputs: []inputInfo{
17761 {0, 21503},
17762 {1, 21503},
17763 {2, 21503},
17764 },
17765 outputs: []outputInfo{
17766 {1, 0},
17767 {0, 21503},
17768 },
17769 },
17770 },
17771 {
17772 name: "CMP",
17773 argLen: 2,
17774 asm: arm.ACMP,
17775 reg: regInfo{
17776 inputs: []inputInfo{
17777 {0, 22527},
17778 {1, 22527},
17779 },
17780 },
17781 },
17782 {
17783 name: "CMPconst",
17784 auxType: auxInt32,
17785 argLen: 1,
17786 asm: arm.ACMP,
17787 reg: regInfo{
17788 inputs: []inputInfo{
17789 {0, 22527},
17790 },
17791 },
17792 },
17793 {
17794 name: "CMN",
17795 argLen: 2,
17796 commutative: true,
17797 asm: arm.ACMN,
17798 reg: regInfo{
17799 inputs: []inputInfo{
17800 {0, 22527},
17801 {1, 22527},
17802 },
17803 },
17804 },
17805 {
17806 name: "CMNconst",
17807 auxType: auxInt32,
17808 argLen: 1,
17809 asm: arm.ACMN,
17810 reg: regInfo{
17811 inputs: []inputInfo{
17812 {0, 22527},
17813 },
17814 },
17815 },
17816 {
17817 name: "TST",
17818 argLen: 2,
17819 commutative: true,
17820 asm: arm.ATST,
17821 reg: regInfo{
17822 inputs: []inputInfo{
17823 {0, 22527},
17824 {1, 22527},
17825 },
17826 },
17827 },
17828 {
17829 name: "TSTconst",
17830 auxType: auxInt32,
17831 argLen: 1,
17832 asm: arm.ATST,
17833 reg: regInfo{
17834 inputs: []inputInfo{
17835 {0, 22527},
17836 },
17837 },
17838 },
17839 {
17840 name: "TEQ",
17841 argLen: 2,
17842 commutative: true,
17843 asm: arm.ATEQ,
17844 reg: regInfo{
17845 inputs: []inputInfo{
17846 {0, 22527},
17847 {1, 22527},
17848 },
17849 },
17850 },
17851 {
17852 name: "TEQconst",
17853 auxType: auxInt32,
17854 argLen: 1,
17855 asm: arm.ATEQ,
17856 reg: regInfo{
17857 inputs: []inputInfo{
17858 {0, 22527},
17859 },
17860 },
17861 },
17862 {
17863 name: "CMPF",
17864 argLen: 2,
17865 asm: arm.ACMPF,
17866 reg: regInfo{
17867 inputs: []inputInfo{
17868 {0, 4294901760},
17869 {1, 4294901760},
17870 },
17871 },
17872 },
17873 {
17874 name: "CMPD",
17875 argLen: 2,
17876 asm: arm.ACMPD,
17877 reg: regInfo{
17878 inputs: []inputInfo{
17879 {0, 4294901760},
17880 {1, 4294901760},
17881 },
17882 },
17883 },
17884 {
17885 name: "CMPshiftLL",
17886 auxType: auxInt32,
17887 argLen: 2,
17888 asm: arm.ACMP,
17889 reg: regInfo{
17890 inputs: []inputInfo{
17891 {0, 22527},
17892 {1, 22527},
17893 },
17894 },
17895 },
17896 {
17897 name: "CMPshiftRL",
17898 auxType: auxInt32,
17899 argLen: 2,
17900 asm: arm.ACMP,
17901 reg: regInfo{
17902 inputs: []inputInfo{
17903 {0, 22527},
17904 {1, 22527},
17905 },
17906 },
17907 },
17908 {
17909 name: "CMPshiftRA",
17910 auxType: auxInt32,
17911 argLen: 2,
17912 asm: arm.ACMP,
17913 reg: regInfo{
17914 inputs: []inputInfo{
17915 {0, 22527},
17916 {1, 22527},
17917 },
17918 },
17919 },
17920 {
17921 name: "CMNshiftLL",
17922 auxType: auxInt32,
17923 argLen: 2,
17924 asm: arm.ACMN,
17925 reg: regInfo{
17926 inputs: []inputInfo{
17927 {0, 22527},
17928 {1, 22527},
17929 },
17930 },
17931 },
17932 {
17933 name: "CMNshiftRL",
17934 auxType: auxInt32,
17935 argLen: 2,
17936 asm: arm.ACMN,
17937 reg: regInfo{
17938 inputs: []inputInfo{
17939 {0, 22527},
17940 {1, 22527},
17941 },
17942 },
17943 },
17944 {
17945 name: "CMNshiftRA",
17946 auxType: auxInt32,
17947 argLen: 2,
17948 asm: arm.ACMN,
17949 reg: regInfo{
17950 inputs: []inputInfo{
17951 {0, 22527},
17952 {1, 22527},
17953 },
17954 },
17955 },
17956 {
17957 name: "TSTshiftLL",
17958 auxType: auxInt32,
17959 argLen: 2,
17960 asm: arm.ATST,
17961 reg: regInfo{
17962 inputs: []inputInfo{
17963 {0, 22527},
17964 {1, 22527},
17965 },
17966 },
17967 },
17968 {
17969 name: "TSTshiftRL",
17970 auxType: auxInt32,
17971 argLen: 2,
17972 asm: arm.ATST,
17973 reg: regInfo{
17974 inputs: []inputInfo{
17975 {0, 22527},
17976 {1, 22527},
17977 },
17978 },
17979 },
17980 {
17981 name: "TSTshiftRA",
17982 auxType: auxInt32,
17983 argLen: 2,
17984 asm: arm.ATST,
17985 reg: regInfo{
17986 inputs: []inputInfo{
17987 {0, 22527},
17988 {1, 22527},
17989 },
17990 },
17991 },
17992 {
17993 name: "TEQshiftLL",
17994 auxType: auxInt32,
17995 argLen: 2,
17996 asm: arm.ATEQ,
17997 reg: regInfo{
17998 inputs: []inputInfo{
17999 {0, 22527},
18000 {1, 22527},
18001 },
18002 },
18003 },
18004 {
18005 name: "TEQshiftRL",
18006 auxType: auxInt32,
18007 argLen: 2,
18008 asm: arm.ATEQ,
18009 reg: regInfo{
18010 inputs: []inputInfo{
18011 {0, 22527},
18012 {1, 22527},
18013 },
18014 },
18015 },
18016 {
18017 name: "TEQshiftRA",
18018 auxType: auxInt32,
18019 argLen: 2,
18020 asm: arm.ATEQ,
18021 reg: regInfo{
18022 inputs: []inputInfo{
18023 {0, 22527},
18024 {1, 22527},
18025 },
18026 },
18027 },
18028 {
18029 name: "CMPshiftLLreg",
18030 argLen: 3,
18031 asm: arm.ACMP,
18032 reg: regInfo{
18033 inputs: []inputInfo{
18034 {0, 21503},
18035 {1, 21503},
18036 {2, 21503},
18037 },
18038 },
18039 },
18040 {
18041 name: "CMPshiftRLreg",
18042 argLen: 3,
18043 asm: arm.ACMP,
18044 reg: regInfo{
18045 inputs: []inputInfo{
18046 {0, 21503},
18047 {1, 21503},
18048 {2, 21503},
18049 },
18050 },
18051 },
18052 {
18053 name: "CMPshiftRAreg",
18054 argLen: 3,
18055 asm: arm.ACMP,
18056 reg: regInfo{
18057 inputs: []inputInfo{
18058 {0, 21503},
18059 {1, 21503},
18060 {2, 21503},
18061 },
18062 },
18063 },
18064 {
18065 name: "CMNshiftLLreg",
18066 argLen: 3,
18067 asm: arm.ACMN,
18068 reg: regInfo{
18069 inputs: []inputInfo{
18070 {0, 21503},
18071 {1, 21503},
18072 {2, 21503},
18073 },
18074 },
18075 },
18076 {
18077 name: "CMNshiftRLreg",
18078 argLen: 3,
18079 asm: arm.ACMN,
18080 reg: regInfo{
18081 inputs: []inputInfo{
18082 {0, 21503},
18083 {1, 21503},
18084 {2, 21503},
18085 },
18086 },
18087 },
18088 {
18089 name: "CMNshiftRAreg",
18090 argLen: 3,
18091 asm: arm.ACMN,
18092 reg: regInfo{
18093 inputs: []inputInfo{
18094 {0, 21503},
18095 {1, 21503},
18096 {2, 21503},
18097 },
18098 },
18099 },
18100 {
18101 name: "TSTshiftLLreg",
18102 argLen: 3,
18103 asm: arm.ATST,
18104 reg: regInfo{
18105 inputs: []inputInfo{
18106 {0, 21503},
18107 {1, 21503},
18108 {2, 21503},
18109 },
18110 },
18111 },
18112 {
18113 name: "TSTshiftRLreg",
18114 argLen: 3,
18115 asm: arm.ATST,
18116 reg: regInfo{
18117 inputs: []inputInfo{
18118 {0, 21503},
18119 {1, 21503},
18120 {2, 21503},
18121 },
18122 },
18123 },
18124 {
18125 name: "TSTshiftRAreg",
18126 argLen: 3,
18127 asm: arm.ATST,
18128 reg: regInfo{
18129 inputs: []inputInfo{
18130 {0, 21503},
18131 {1, 21503},
18132 {2, 21503},
18133 },
18134 },
18135 },
18136 {
18137 name: "TEQshiftLLreg",
18138 argLen: 3,
18139 asm: arm.ATEQ,
18140 reg: regInfo{
18141 inputs: []inputInfo{
18142 {0, 21503},
18143 {1, 21503},
18144 {2, 21503},
18145 },
18146 },
18147 },
18148 {
18149 name: "TEQshiftRLreg",
18150 argLen: 3,
18151 asm: arm.ATEQ,
18152 reg: regInfo{
18153 inputs: []inputInfo{
18154 {0, 21503},
18155 {1, 21503},
18156 {2, 21503},
18157 },
18158 },
18159 },
18160 {
18161 name: "TEQshiftRAreg",
18162 argLen: 3,
18163 asm: arm.ATEQ,
18164 reg: regInfo{
18165 inputs: []inputInfo{
18166 {0, 21503},
18167 {1, 21503},
18168 {2, 21503},
18169 },
18170 },
18171 },
18172 {
18173 name: "CMPF0",
18174 argLen: 1,
18175 asm: arm.ACMPF,
18176 reg: regInfo{
18177 inputs: []inputInfo{
18178 {0, 4294901760},
18179 },
18180 },
18181 },
18182 {
18183 name: "CMPD0",
18184 argLen: 1,
18185 asm: arm.ACMPD,
18186 reg: regInfo{
18187 inputs: []inputInfo{
18188 {0, 4294901760},
18189 },
18190 },
18191 },
18192 {
18193 name: "MOVWconst",
18194 auxType: auxInt32,
18195 argLen: 0,
18196 rematerializeable: true,
18197 asm: arm.AMOVW,
18198 reg: regInfo{
18199 outputs: []outputInfo{
18200 {0, 21503},
18201 },
18202 },
18203 },
18204 {
18205 name: "MOVFconst",
18206 auxType: auxFloat64,
18207 argLen: 0,
18208 rematerializeable: true,
18209 asm: arm.AMOVF,
18210 reg: regInfo{
18211 outputs: []outputInfo{
18212 {0, 4294901760},
18213 },
18214 },
18215 },
18216 {
18217 name: "MOVDconst",
18218 auxType: auxFloat64,
18219 argLen: 0,
18220 rematerializeable: true,
18221 asm: arm.AMOVD,
18222 reg: regInfo{
18223 outputs: []outputInfo{
18224 {0, 4294901760},
18225 },
18226 },
18227 },
18228 {
18229 name: "MOVWaddr",
18230 auxType: auxSymOff,
18231 argLen: 1,
18232 rematerializeable: true,
18233 symEffect: SymAddr,
18234 asm: arm.AMOVW,
18235 reg: regInfo{
18236 inputs: []inputInfo{
18237 {0, 4294975488},
18238 },
18239 outputs: []outputInfo{
18240 {0, 21503},
18241 },
18242 },
18243 },
18244 {
18245 name: "MOVBload",
18246 auxType: auxSymOff,
18247 argLen: 2,
18248 faultOnNilArg0: true,
18249 symEffect: SymRead,
18250 asm: arm.AMOVB,
18251 reg: regInfo{
18252 inputs: []inputInfo{
18253 {0, 4294998015},
18254 },
18255 outputs: []outputInfo{
18256 {0, 21503},
18257 },
18258 },
18259 },
18260 {
18261 name: "MOVBUload",
18262 auxType: auxSymOff,
18263 argLen: 2,
18264 faultOnNilArg0: true,
18265 symEffect: SymRead,
18266 asm: arm.AMOVBU,
18267 reg: regInfo{
18268 inputs: []inputInfo{
18269 {0, 4294998015},
18270 },
18271 outputs: []outputInfo{
18272 {0, 21503},
18273 },
18274 },
18275 },
18276 {
18277 name: "MOVHload",
18278 auxType: auxSymOff,
18279 argLen: 2,
18280 faultOnNilArg0: true,
18281 symEffect: SymRead,
18282 asm: arm.AMOVH,
18283 reg: regInfo{
18284 inputs: []inputInfo{
18285 {0, 4294998015},
18286 },
18287 outputs: []outputInfo{
18288 {0, 21503},
18289 },
18290 },
18291 },
18292 {
18293 name: "MOVHUload",
18294 auxType: auxSymOff,
18295 argLen: 2,
18296 faultOnNilArg0: true,
18297 symEffect: SymRead,
18298 asm: arm.AMOVHU,
18299 reg: regInfo{
18300 inputs: []inputInfo{
18301 {0, 4294998015},
18302 },
18303 outputs: []outputInfo{
18304 {0, 21503},
18305 },
18306 },
18307 },
18308 {
18309 name: "MOVWload",
18310 auxType: auxSymOff,
18311 argLen: 2,
18312 faultOnNilArg0: true,
18313 symEffect: SymRead,
18314 asm: arm.AMOVW,
18315 reg: regInfo{
18316 inputs: []inputInfo{
18317 {0, 4294998015},
18318 },
18319 outputs: []outputInfo{
18320 {0, 21503},
18321 },
18322 },
18323 },
18324 {
18325 name: "MOVFload",
18326 auxType: auxSymOff,
18327 argLen: 2,
18328 faultOnNilArg0: true,
18329 symEffect: SymRead,
18330 asm: arm.AMOVF,
18331 reg: regInfo{
18332 inputs: []inputInfo{
18333 {0, 4294998015},
18334 },
18335 outputs: []outputInfo{
18336 {0, 4294901760},
18337 },
18338 },
18339 },
18340 {
18341 name: "MOVDload",
18342 auxType: auxSymOff,
18343 argLen: 2,
18344 faultOnNilArg0: true,
18345 symEffect: SymRead,
18346 asm: arm.AMOVD,
18347 reg: regInfo{
18348 inputs: []inputInfo{
18349 {0, 4294998015},
18350 },
18351 outputs: []outputInfo{
18352 {0, 4294901760},
18353 },
18354 },
18355 },
18356 {
18357 name: "MOVBstore",
18358 auxType: auxSymOff,
18359 argLen: 3,
18360 faultOnNilArg0: true,
18361 symEffect: SymWrite,
18362 asm: arm.AMOVB,
18363 reg: regInfo{
18364 inputs: []inputInfo{
18365 {1, 22527},
18366 {0, 4294998015},
18367 },
18368 },
18369 },
18370 {
18371 name: "MOVHstore",
18372 auxType: auxSymOff,
18373 argLen: 3,
18374 faultOnNilArg0: true,
18375 symEffect: SymWrite,
18376 asm: arm.AMOVH,
18377 reg: regInfo{
18378 inputs: []inputInfo{
18379 {1, 22527},
18380 {0, 4294998015},
18381 },
18382 },
18383 },
18384 {
18385 name: "MOVWstore",
18386 auxType: auxSymOff,
18387 argLen: 3,
18388 faultOnNilArg0: true,
18389 symEffect: SymWrite,
18390 asm: arm.AMOVW,
18391 reg: regInfo{
18392 inputs: []inputInfo{
18393 {1, 22527},
18394 {0, 4294998015},
18395 },
18396 },
18397 },
18398 {
18399 name: "MOVFstore",
18400 auxType: auxSymOff,
18401 argLen: 3,
18402 faultOnNilArg0: true,
18403 symEffect: SymWrite,
18404 asm: arm.AMOVF,
18405 reg: regInfo{
18406 inputs: []inputInfo{
18407 {0, 4294998015},
18408 {1, 4294901760},
18409 },
18410 },
18411 },
18412 {
18413 name: "MOVDstore",
18414 auxType: auxSymOff,
18415 argLen: 3,
18416 faultOnNilArg0: true,
18417 symEffect: SymWrite,
18418 asm: arm.AMOVD,
18419 reg: regInfo{
18420 inputs: []inputInfo{
18421 {0, 4294998015},
18422 {1, 4294901760},
18423 },
18424 },
18425 },
18426 {
18427 name: "MOVWloadidx",
18428 argLen: 3,
18429 asm: arm.AMOVW,
18430 reg: regInfo{
18431 inputs: []inputInfo{
18432 {1, 22527},
18433 {0, 4294998015},
18434 },
18435 outputs: []outputInfo{
18436 {0, 21503},
18437 },
18438 },
18439 },
18440 {
18441 name: "MOVWloadshiftLL",
18442 auxType: auxInt32,
18443 argLen: 3,
18444 asm: arm.AMOVW,
18445 reg: regInfo{
18446 inputs: []inputInfo{
18447 {1, 22527},
18448 {0, 4294998015},
18449 },
18450 outputs: []outputInfo{
18451 {0, 21503},
18452 },
18453 },
18454 },
18455 {
18456 name: "MOVWloadshiftRL",
18457 auxType: auxInt32,
18458 argLen: 3,
18459 asm: arm.AMOVW,
18460 reg: regInfo{
18461 inputs: []inputInfo{
18462 {1, 22527},
18463 {0, 4294998015},
18464 },
18465 outputs: []outputInfo{
18466 {0, 21503},
18467 },
18468 },
18469 },
18470 {
18471 name: "MOVWloadshiftRA",
18472 auxType: auxInt32,
18473 argLen: 3,
18474 asm: arm.AMOVW,
18475 reg: regInfo{
18476 inputs: []inputInfo{
18477 {1, 22527},
18478 {0, 4294998015},
18479 },
18480 outputs: []outputInfo{
18481 {0, 21503},
18482 },
18483 },
18484 },
18485 {
18486 name: "MOVBUloadidx",
18487 argLen: 3,
18488 asm: arm.AMOVBU,
18489 reg: regInfo{
18490 inputs: []inputInfo{
18491 {1, 22527},
18492 {0, 4294998015},
18493 },
18494 outputs: []outputInfo{
18495 {0, 21503},
18496 },
18497 },
18498 },
18499 {
18500 name: "MOVBloadidx",
18501 argLen: 3,
18502 asm: arm.AMOVB,
18503 reg: regInfo{
18504 inputs: []inputInfo{
18505 {1, 22527},
18506 {0, 4294998015},
18507 },
18508 outputs: []outputInfo{
18509 {0, 21503},
18510 },
18511 },
18512 },
18513 {
18514 name: "MOVHUloadidx",
18515 argLen: 3,
18516 asm: arm.AMOVHU,
18517 reg: regInfo{
18518 inputs: []inputInfo{
18519 {1, 22527},
18520 {0, 4294998015},
18521 },
18522 outputs: []outputInfo{
18523 {0, 21503},
18524 },
18525 },
18526 },
18527 {
18528 name: "MOVHloadidx",
18529 argLen: 3,
18530 asm: arm.AMOVH,
18531 reg: regInfo{
18532 inputs: []inputInfo{
18533 {1, 22527},
18534 {0, 4294998015},
18535 },
18536 outputs: []outputInfo{
18537 {0, 21503},
18538 },
18539 },
18540 },
18541 {
18542 name: "MOVWstoreidx",
18543 argLen: 4,
18544 asm: arm.AMOVW,
18545 reg: regInfo{
18546 inputs: []inputInfo{
18547 {1, 22527},
18548 {2, 22527},
18549 {0, 4294998015},
18550 },
18551 },
18552 },
18553 {
18554 name: "MOVWstoreshiftLL",
18555 auxType: auxInt32,
18556 argLen: 4,
18557 asm: arm.AMOVW,
18558 reg: regInfo{
18559 inputs: []inputInfo{
18560 {1, 22527},
18561 {2, 22527},
18562 {0, 4294998015},
18563 },
18564 },
18565 },
18566 {
18567 name: "MOVWstoreshiftRL",
18568 auxType: auxInt32,
18569 argLen: 4,
18570 asm: arm.AMOVW,
18571 reg: regInfo{
18572 inputs: []inputInfo{
18573 {1, 22527},
18574 {2, 22527},
18575 {0, 4294998015},
18576 },
18577 },
18578 },
18579 {
18580 name: "MOVWstoreshiftRA",
18581 auxType: auxInt32,
18582 argLen: 4,
18583 asm: arm.AMOVW,
18584 reg: regInfo{
18585 inputs: []inputInfo{
18586 {1, 22527},
18587 {2, 22527},
18588 {0, 4294998015},
18589 },
18590 },
18591 },
18592 {
18593 name: "MOVBstoreidx",
18594 argLen: 4,
18595 asm: arm.AMOVB,
18596 reg: regInfo{
18597 inputs: []inputInfo{
18598 {1, 22527},
18599 {2, 22527},
18600 {0, 4294998015},
18601 },
18602 },
18603 },
18604 {
18605 name: "MOVHstoreidx",
18606 argLen: 4,
18607 asm: arm.AMOVH,
18608 reg: regInfo{
18609 inputs: []inputInfo{
18610 {1, 22527},
18611 {2, 22527},
18612 {0, 4294998015},
18613 },
18614 },
18615 },
18616 {
18617 name: "MOVBreg",
18618 argLen: 1,
18619 asm: arm.AMOVBS,
18620 reg: regInfo{
18621 inputs: []inputInfo{
18622 {0, 22527},
18623 },
18624 outputs: []outputInfo{
18625 {0, 21503},
18626 },
18627 },
18628 },
18629 {
18630 name: "MOVBUreg",
18631 argLen: 1,
18632 asm: arm.AMOVBU,
18633 reg: regInfo{
18634 inputs: []inputInfo{
18635 {0, 22527},
18636 },
18637 outputs: []outputInfo{
18638 {0, 21503},
18639 },
18640 },
18641 },
18642 {
18643 name: "MOVHreg",
18644 argLen: 1,
18645 asm: arm.AMOVHS,
18646 reg: regInfo{
18647 inputs: []inputInfo{
18648 {0, 22527},
18649 },
18650 outputs: []outputInfo{
18651 {0, 21503},
18652 },
18653 },
18654 },
18655 {
18656 name: "MOVHUreg",
18657 argLen: 1,
18658 asm: arm.AMOVHU,
18659 reg: regInfo{
18660 inputs: []inputInfo{
18661 {0, 22527},
18662 },
18663 outputs: []outputInfo{
18664 {0, 21503},
18665 },
18666 },
18667 },
18668 {
18669 name: "MOVWreg",
18670 argLen: 1,
18671 asm: arm.AMOVW,
18672 reg: regInfo{
18673 inputs: []inputInfo{
18674 {0, 22527},
18675 },
18676 outputs: []outputInfo{
18677 {0, 21503},
18678 },
18679 },
18680 },
18681 {
18682 name: "MOVWnop",
18683 argLen: 1,
18684 resultInArg0: true,
18685 reg: regInfo{
18686 inputs: []inputInfo{
18687 {0, 21503},
18688 },
18689 outputs: []outputInfo{
18690 {0, 21503},
18691 },
18692 },
18693 },
18694 {
18695 name: "MOVWF",
18696 argLen: 1,
18697 asm: arm.AMOVWF,
18698 reg: regInfo{
18699 inputs: []inputInfo{
18700 {0, 21503},
18701 },
18702 clobbers: 2147483648,
18703 outputs: []outputInfo{
18704 {0, 4294901760},
18705 },
18706 },
18707 },
18708 {
18709 name: "MOVWD",
18710 argLen: 1,
18711 asm: arm.AMOVWD,
18712 reg: regInfo{
18713 inputs: []inputInfo{
18714 {0, 21503},
18715 },
18716 clobbers: 2147483648,
18717 outputs: []outputInfo{
18718 {0, 4294901760},
18719 },
18720 },
18721 },
18722 {
18723 name: "MOVWUF",
18724 argLen: 1,
18725 asm: arm.AMOVWF,
18726 reg: regInfo{
18727 inputs: []inputInfo{
18728 {0, 21503},
18729 },
18730 clobbers: 2147483648,
18731 outputs: []outputInfo{
18732 {0, 4294901760},
18733 },
18734 },
18735 },
18736 {
18737 name: "MOVWUD",
18738 argLen: 1,
18739 asm: arm.AMOVWD,
18740 reg: regInfo{
18741 inputs: []inputInfo{
18742 {0, 21503},
18743 },
18744 clobbers: 2147483648,
18745 outputs: []outputInfo{
18746 {0, 4294901760},
18747 },
18748 },
18749 },
18750 {
18751 name: "MOVFW",
18752 argLen: 1,
18753 asm: arm.AMOVFW,
18754 reg: regInfo{
18755 inputs: []inputInfo{
18756 {0, 4294901760},
18757 },
18758 clobbers: 2147483648,
18759 outputs: []outputInfo{
18760 {0, 21503},
18761 },
18762 },
18763 },
18764 {
18765 name: "MOVDW",
18766 argLen: 1,
18767 asm: arm.AMOVDW,
18768 reg: regInfo{
18769 inputs: []inputInfo{
18770 {0, 4294901760},
18771 },
18772 clobbers: 2147483648,
18773 outputs: []outputInfo{
18774 {0, 21503},
18775 },
18776 },
18777 },
18778 {
18779 name: "MOVFWU",
18780 argLen: 1,
18781 asm: arm.AMOVFW,
18782 reg: regInfo{
18783 inputs: []inputInfo{
18784 {0, 4294901760},
18785 },
18786 clobbers: 2147483648,
18787 outputs: []outputInfo{
18788 {0, 21503},
18789 },
18790 },
18791 },
18792 {
18793 name: "MOVDWU",
18794 argLen: 1,
18795 asm: arm.AMOVDW,
18796 reg: regInfo{
18797 inputs: []inputInfo{
18798 {0, 4294901760},
18799 },
18800 clobbers: 2147483648,
18801 outputs: []outputInfo{
18802 {0, 21503},
18803 },
18804 },
18805 },
18806 {
18807 name: "MOVFD",
18808 argLen: 1,
18809 asm: arm.AMOVFD,
18810 reg: regInfo{
18811 inputs: []inputInfo{
18812 {0, 4294901760},
18813 },
18814 outputs: []outputInfo{
18815 {0, 4294901760},
18816 },
18817 },
18818 },
18819 {
18820 name: "MOVDF",
18821 argLen: 1,
18822 asm: arm.AMOVDF,
18823 reg: regInfo{
18824 inputs: []inputInfo{
18825 {0, 4294901760},
18826 },
18827 outputs: []outputInfo{
18828 {0, 4294901760},
18829 },
18830 },
18831 },
18832 {
18833 name: "CMOVWHSconst",
18834 auxType: auxInt32,
18835 argLen: 2,
18836 resultInArg0: true,
18837 asm: arm.AMOVW,
18838 reg: regInfo{
18839 inputs: []inputInfo{
18840 {0, 21503},
18841 },
18842 outputs: []outputInfo{
18843 {0, 21503},
18844 },
18845 },
18846 },
18847 {
18848 name: "CMOVWLSconst",
18849 auxType: auxInt32,
18850 argLen: 2,
18851 resultInArg0: true,
18852 asm: arm.AMOVW,
18853 reg: regInfo{
18854 inputs: []inputInfo{
18855 {0, 21503},
18856 },
18857 outputs: []outputInfo{
18858 {0, 21503},
18859 },
18860 },
18861 },
18862 {
18863 name: "SRAcond",
18864 argLen: 3,
18865 asm: arm.ASRA,
18866 reg: regInfo{
18867 inputs: []inputInfo{
18868 {0, 21503},
18869 {1, 21503},
18870 },
18871 outputs: []outputInfo{
18872 {0, 21503},
18873 },
18874 },
18875 },
18876 {
18877 name: "CALLstatic",
18878 auxType: auxCallOff,
18879 argLen: 1,
18880 clobberFlags: true,
18881 call: true,
18882 reg: regInfo{
18883 clobbers: 4294924287,
18884 },
18885 },
18886 {
18887 name: "CALLtail",
18888 auxType: auxCallOff,
18889 argLen: 1,
18890 clobberFlags: true,
18891 call: true,
18892 tailCall: true,
18893 reg: regInfo{
18894 clobbers: 4294924287,
18895 },
18896 },
18897 {
18898 name: "CALLclosure",
18899 auxType: auxCallOff,
18900 argLen: 3,
18901 clobberFlags: true,
18902 call: true,
18903 reg: regInfo{
18904 inputs: []inputInfo{
18905 {1, 128},
18906 {0, 29695},
18907 },
18908 clobbers: 4294924287,
18909 },
18910 },
18911 {
18912 name: "CALLinter",
18913 auxType: auxCallOff,
18914 argLen: 2,
18915 clobberFlags: true,
18916 call: true,
18917 reg: regInfo{
18918 inputs: []inputInfo{
18919 {0, 21503},
18920 },
18921 clobbers: 4294924287,
18922 },
18923 },
18924 {
18925 name: "LoweredNilCheck",
18926 argLen: 2,
18927 nilCheck: true,
18928 faultOnNilArg0: true,
18929 reg: regInfo{
18930 inputs: []inputInfo{
18931 {0, 22527},
18932 },
18933 },
18934 },
18935 {
18936 name: "Equal",
18937 argLen: 1,
18938 reg: regInfo{
18939 outputs: []outputInfo{
18940 {0, 21503},
18941 },
18942 },
18943 },
18944 {
18945 name: "NotEqual",
18946 argLen: 1,
18947 reg: regInfo{
18948 outputs: []outputInfo{
18949 {0, 21503},
18950 },
18951 },
18952 },
18953 {
18954 name: "LessThan",
18955 argLen: 1,
18956 reg: regInfo{
18957 outputs: []outputInfo{
18958 {0, 21503},
18959 },
18960 },
18961 },
18962 {
18963 name: "LessEqual",
18964 argLen: 1,
18965 reg: regInfo{
18966 outputs: []outputInfo{
18967 {0, 21503},
18968 },
18969 },
18970 },
18971 {
18972 name: "GreaterThan",
18973 argLen: 1,
18974 reg: regInfo{
18975 outputs: []outputInfo{
18976 {0, 21503},
18977 },
18978 },
18979 },
18980 {
18981 name: "GreaterEqual",
18982 argLen: 1,
18983 reg: regInfo{
18984 outputs: []outputInfo{
18985 {0, 21503},
18986 },
18987 },
18988 },
18989 {
18990 name: "LessThanU",
18991 argLen: 1,
18992 reg: regInfo{
18993 outputs: []outputInfo{
18994 {0, 21503},
18995 },
18996 },
18997 },
18998 {
18999 name: "LessEqualU",
19000 argLen: 1,
19001 reg: regInfo{
19002 outputs: []outputInfo{
19003 {0, 21503},
19004 },
19005 },
19006 },
19007 {
19008 name: "GreaterThanU",
19009 argLen: 1,
19010 reg: regInfo{
19011 outputs: []outputInfo{
19012 {0, 21503},
19013 },
19014 },
19015 },
19016 {
19017 name: "GreaterEqualU",
19018 argLen: 1,
19019 reg: regInfo{
19020 outputs: []outputInfo{
19021 {0, 21503},
19022 },
19023 },
19024 },
19025 {
19026 name: "DUFFZERO",
19027 auxType: auxInt64,
19028 argLen: 3,
19029 faultOnNilArg0: true,
19030 reg: regInfo{
19031 inputs: []inputInfo{
19032 {0, 2},
19033 {1, 1},
19034 },
19035 clobbers: 20482,
19036 },
19037 },
19038 {
19039 name: "DUFFCOPY",
19040 auxType: auxInt64,
19041 argLen: 3,
19042 faultOnNilArg0: true,
19043 faultOnNilArg1: true,
19044 reg: regInfo{
19045 inputs: []inputInfo{
19046 {0, 4},
19047 {1, 2},
19048 },
19049 clobbers: 20487,
19050 },
19051 },
19052 {
19053 name: "LoweredZero",
19054 auxType: auxInt64,
19055 argLen: 4,
19056 clobberFlags: true,
19057 faultOnNilArg0: true,
19058 reg: regInfo{
19059 inputs: []inputInfo{
19060 {0, 2},
19061 {1, 21503},
19062 {2, 21503},
19063 },
19064 clobbers: 2,
19065 },
19066 },
19067 {
19068 name: "LoweredMove",
19069 auxType: auxInt64,
19070 argLen: 4,
19071 clobberFlags: true,
19072 faultOnNilArg0: true,
19073 faultOnNilArg1: true,
19074 reg: regInfo{
19075 inputs: []inputInfo{
19076 {0, 4},
19077 {1, 2},
19078 {2, 21503},
19079 },
19080 clobbers: 6,
19081 },
19082 },
19083 {
19084 name: "LoweredGetClosurePtr",
19085 argLen: 0,
19086 zeroWidth: true,
19087 reg: regInfo{
19088 outputs: []outputInfo{
19089 {0, 128},
19090 },
19091 },
19092 },
19093 {
19094 name: "LoweredGetCallerSP",
19095 argLen: 1,
19096 rematerializeable: true,
19097 reg: regInfo{
19098 outputs: []outputInfo{
19099 {0, 21503},
19100 },
19101 },
19102 },
19103 {
19104 name: "LoweredGetCallerPC",
19105 argLen: 0,
19106 rematerializeable: true,
19107 reg: regInfo{
19108 outputs: []outputInfo{
19109 {0, 21503},
19110 },
19111 },
19112 },
19113 {
19114 name: "LoweredPanicBoundsA",
19115 auxType: auxInt64,
19116 argLen: 3,
19117 call: true,
19118 reg: regInfo{
19119 inputs: []inputInfo{
19120 {0, 4},
19121 {1, 8},
19122 },
19123 },
19124 },
19125 {
19126 name: "LoweredPanicBoundsB",
19127 auxType: auxInt64,
19128 argLen: 3,
19129 call: true,
19130 reg: regInfo{
19131 inputs: []inputInfo{
19132 {0, 2},
19133 {1, 4},
19134 },
19135 },
19136 },
19137 {
19138 name: "LoweredPanicBoundsC",
19139 auxType: auxInt64,
19140 argLen: 3,
19141 call: true,
19142 reg: regInfo{
19143 inputs: []inputInfo{
19144 {0, 1},
19145 {1, 2},
19146 },
19147 },
19148 },
19149 {
19150 name: "LoweredPanicExtendA",
19151 auxType: auxInt64,
19152 argLen: 4,
19153 call: true,
19154 reg: regInfo{
19155 inputs: []inputInfo{
19156 {0, 16},
19157 {1, 4},
19158 {2, 8},
19159 },
19160 },
19161 },
19162 {
19163 name: "LoweredPanicExtendB",
19164 auxType: auxInt64,
19165 argLen: 4,
19166 call: true,
19167 reg: regInfo{
19168 inputs: []inputInfo{
19169 {0, 16},
19170 {1, 2},
19171 {2, 4},
19172 },
19173 },
19174 },
19175 {
19176 name: "LoweredPanicExtendC",
19177 auxType: auxInt64,
19178 argLen: 4,
19179 call: true,
19180 reg: regInfo{
19181 inputs: []inputInfo{
19182 {0, 16},
19183 {1, 1},
19184 {2, 2},
19185 },
19186 },
19187 },
19188 {
19189 name: "FlagConstant",
19190 auxType: auxFlagConstant,
19191 argLen: 0,
19192 reg: regInfo{},
19193 },
19194 {
19195 name: "InvertFlags",
19196 argLen: 1,
19197 reg: regInfo{},
19198 },
19199 {
19200 name: "LoweredWB",
19201 auxType: auxInt64,
19202 argLen: 1,
19203 clobberFlags: true,
19204 reg: regInfo{
19205 clobbers: 4294922240,
19206 outputs: []outputInfo{
19207 {0, 256},
19208 },
19209 },
19210 },
19211
19212 {
19213 name: "ADCSflags",
19214 argLen: 3,
19215 commutative: true,
19216 asm: arm64.AADCS,
19217 reg: regInfo{
19218 inputs: []inputInfo{
19219 {0, 335544319},
19220 {1, 335544319},
19221 },
19222 outputs: []outputInfo{
19223 {1, 0},
19224 {0, 335544319},
19225 },
19226 },
19227 },
19228 {
19229 name: "ADCzerocarry",
19230 argLen: 1,
19231 asm: arm64.AADC,
19232 reg: regInfo{
19233 outputs: []outputInfo{
19234 {0, 335544319},
19235 },
19236 },
19237 },
19238 {
19239 name: "ADD",
19240 argLen: 2,
19241 commutative: true,
19242 asm: arm64.AADD,
19243 reg: regInfo{
19244 inputs: []inputInfo{
19245 {0, 402653183},
19246 {1, 402653183},
19247 },
19248 outputs: []outputInfo{
19249 {0, 335544319},
19250 },
19251 },
19252 },
19253 {
19254 name: "ADDconst",
19255 auxType: auxInt64,
19256 argLen: 1,
19257 asm: arm64.AADD,
19258 reg: regInfo{
19259 inputs: []inputInfo{
19260 {0, 1476395007},
19261 },
19262 outputs: []outputInfo{
19263 {0, 335544319},
19264 },
19265 },
19266 },
19267 {
19268 name: "ADDSconstflags",
19269 auxType: auxInt64,
19270 argLen: 1,
19271 asm: arm64.AADDS,
19272 reg: regInfo{
19273 inputs: []inputInfo{
19274 {0, 402653183},
19275 },
19276 outputs: []outputInfo{
19277 {1, 0},
19278 {0, 335544319},
19279 },
19280 },
19281 },
19282 {
19283 name: "ADDSflags",
19284 argLen: 2,
19285 commutative: true,
19286 asm: arm64.AADDS,
19287 reg: regInfo{
19288 inputs: []inputInfo{
19289 {0, 335544319},
19290 {1, 335544319},
19291 },
19292 outputs: []outputInfo{
19293 {1, 0},
19294 {0, 335544319},
19295 },
19296 },
19297 },
19298 {
19299 name: "SUB",
19300 argLen: 2,
19301 asm: arm64.ASUB,
19302 reg: regInfo{
19303 inputs: []inputInfo{
19304 {0, 402653183},
19305 {1, 402653183},
19306 },
19307 outputs: []outputInfo{
19308 {0, 335544319},
19309 },
19310 },
19311 },
19312 {
19313 name: "SUBconst",
19314 auxType: auxInt64,
19315 argLen: 1,
19316 asm: arm64.ASUB,
19317 reg: regInfo{
19318 inputs: []inputInfo{
19319 {0, 402653183},
19320 },
19321 outputs: []outputInfo{
19322 {0, 335544319},
19323 },
19324 },
19325 },
19326 {
19327 name: "SBCSflags",
19328 argLen: 3,
19329 asm: arm64.ASBCS,
19330 reg: regInfo{
19331 inputs: []inputInfo{
19332 {0, 335544319},
19333 {1, 335544319},
19334 },
19335 outputs: []outputInfo{
19336 {1, 0},
19337 {0, 335544319},
19338 },
19339 },
19340 },
19341 {
19342 name: "SUBSflags",
19343 argLen: 2,
19344 asm: arm64.ASUBS,
19345 reg: regInfo{
19346 inputs: []inputInfo{
19347 {0, 335544319},
19348 {1, 335544319},
19349 },
19350 outputs: []outputInfo{
19351 {1, 0},
19352 {0, 335544319},
19353 },
19354 },
19355 },
19356 {
19357 name: "MUL",
19358 argLen: 2,
19359 commutative: true,
19360 asm: arm64.AMUL,
19361 reg: regInfo{
19362 inputs: []inputInfo{
19363 {0, 402653183},
19364 {1, 402653183},
19365 },
19366 outputs: []outputInfo{
19367 {0, 335544319},
19368 },
19369 },
19370 },
19371 {
19372 name: "MULW",
19373 argLen: 2,
19374 commutative: true,
19375 asm: arm64.AMULW,
19376 reg: regInfo{
19377 inputs: []inputInfo{
19378 {0, 402653183},
19379 {1, 402653183},
19380 },
19381 outputs: []outputInfo{
19382 {0, 335544319},
19383 },
19384 },
19385 },
19386 {
19387 name: "MNEG",
19388 argLen: 2,
19389 commutative: true,
19390 asm: arm64.AMNEG,
19391 reg: regInfo{
19392 inputs: []inputInfo{
19393 {0, 402653183},
19394 {1, 402653183},
19395 },
19396 outputs: []outputInfo{
19397 {0, 335544319},
19398 },
19399 },
19400 },
19401 {
19402 name: "MNEGW",
19403 argLen: 2,
19404 commutative: true,
19405 asm: arm64.AMNEGW,
19406 reg: regInfo{
19407 inputs: []inputInfo{
19408 {0, 402653183},
19409 {1, 402653183},
19410 },
19411 outputs: []outputInfo{
19412 {0, 335544319},
19413 },
19414 },
19415 },
19416 {
19417 name: "MULH",
19418 argLen: 2,
19419 commutative: true,
19420 asm: arm64.ASMULH,
19421 reg: regInfo{
19422 inputs: []inputInfo{
19423 {0, 402653183},
19424 {1, 402653183},
19425 },
19426 outputs: []outputInfo{
19427 {0, 335544319},
19428 },
19429 },
19430 },
19431 {
19432 name: "UMULH",
19433 argLen: 2,
19434 commutative: true,
19435 asm: arm64.AUMULH,
19436 reg: regInfo{
19437 inputs: []inputInfo{
19438 {0, 402653183},
19439 {1, 402653183},
19440 },
19441 outputs: []outputInfo{
19442 {0, 335544319},
19443 },
19444 },
19445 },
19446 {
19447 name: "MULL",
19448 argLen: 2,
19449 commutative: true,
19450 asm: arm64.ASMULL,
19451 reg: regInfo{
19452 inputs: []inputInfo{
19453 {0, 402653183},
19454 {1, 402653183},
19455 },
19456 outputs: []outputInfo{
19457 {0, 335544319},
19458 },
19459 },
19460 },
19461 {
19462 name: "UMULL",
19463 argLen: 2,
19464 commutative: true,
19465 asm: arm64.AUMULL,
19466 reg: regInfo{
19467 inputs: []inputInfo{
19468 {0, 402653183},
19469 {1, 402653183},
19470 },
19471 outputs: []outputInfo{
19472 {0, 335544319},
19473 },
19474 },
19475 },
19476 {
19477 name: "DIV",
19478 argLen: 2,
19479 asm: arm64.ASDIV,
19480 reg: regInfo{
19481 inputs: []inputInfo{
19482 {0, 402653183},
19483 {1, 402653183},
19484 },
19485 outputs: []outputInfo{
19486 {0, 335544319},
19487 },
19488 },
19489 },
19490 {
19491 name: "UDIV",
19492 argLen: 2,
19493 asm: arm64.AUDIV,
19494 reg: regInfo{
19495 inputs: []inputInfo{
19496 {0, 402653183},
19497 {1, 402653183},
19498 },
19499 outputs: []outputInfo{
19500 {0, 335544319},
19501 },
19502 },
19503 },
19504 {
19505 name: "DIVW",
19506 argLen: 2,
19507 asm: arm64.ASDIVW,
19508 reg: regInfo{
19509 inputs: []inputInfo{
19510 {0, 402653183},
19511 {1, 402653183},
19512 },
19513 outputs: []outputInfo{
19514 {0, 335544319},
19515 },
19516 },
19517 },
19518 {
19519 name: "UDIVW",
19520 argLen: 2,
19521 asm: arm64.AUDIVW,
19522 reg: regInfo{
19523 inputs: []inputInfo{
19524 {0, 402653183},
19525 {1, 402653183},
19526 },
19527 outputs: []outputInfo{
19528 {0, 335544319},
19529 },
19530 },
19531 },
19532 {
19533 name: "MOD",
19534 argLen: 2,
19535 asm: arm64.AREM,
19536 reg: regInfo{
19537 inputs: []inputInfo{
19538 {0, 402653183},
19539 {1, 402653183},
19540 },
19541 outputs: []outputInfo{
19542 {0, 335544319},
19543 },
19544 },
19545 },
19546 {
19547 name: "UMOD",
19548 argLen: 2,
19549 asm: arm64.AUREM,
19550 reg: regInfo{
19551 inputs: []inputInfo{
19552 {0, 402653183},
19553 {1, 402653183},
19554 },
19555 outputs: []outputInfo{
19556 {0, 335544319},
19557 },
19558 },
19559 },
19560 {
19561 name: "MODW",
19562 argLen: 2,
19563 asm: arm64.AREMW,
19564 reg: regInfo{
19565 inputs: []inputInfo{
19566 {0, 402653183},
19567 {1, 402653183},
19568 },
19569 outputs: []outputInfo{
19570 {0, 335544319},
19571 },
19572 },
19573 },
19574 {
19575 name: "UMODW",
19576 argLen: 2,
19577 asm: arm64.AUREMW,
19578 reg: regInfo{
19579 inputs: []inputInfo{
19580 {0, 402653183},
19581 {1, 402653183},
19582 },
19583 outputs: []outputInfo{
19584 {0, 335544319},
19585 },
19586 },
19587 },
19588 {
19589 name: "FADDS",
19590 argLen: 2,
19591 commutative: true,
19592 asm: arm64.AFADDS,
19593 reg: regInfo{
19594 inputs: []inputInfo{
19595 {0, 9223372034707292160},
19596 {1, 9223372034707292160},
19597 },
19598 outputs: []outputInfo{
19599 {0, 9223372034707292160},
19600 },
19601 },
19602 },
19603 {
19604 name: "FADDD",
19605 argLen: 2,
19606 commutative: true,
19607 asm: arm64.AFADDD,
19608 reg: regInfo{
19609 inputs: []inputInfo{
19610 {0, 9223372034707292160},
19611 {1, 9223372034707292160},
19612 },
19613 outputs: []outputInfo{
19614 {0, 9223372034707292160},
19615 },
19616 },
19617 },
19618 {
19619 name: "FSUBS",
19620 argLen: 2,
19621 asm: arm64.AFSUBS,
19622 reg: regInfo{
19623 inputs: []inputInfo{
19624 {0, 9223372034707292160},
19625 {1, 9223372034707292160},
19626 },
19627 outputs: []outputInfo{
19628 {0, 9223372034707292160},
19629 },
19630 },
19631 },
19632 {
19633 name: "FSUBD",
19634 argLen: 2,
19635 asm: arm64.AFSUBD,
19636 reg: regInfo{
19637 inputs: []inputInfo{
19638 {0, 9223372034707292160},
19639 {1, 9223372034707292160},
19640 },
19641 outputs: []outputInfo{
19642 {0, 9223372034707292160},
19643 },
19644 },
19645 },
19646 {
19647 name: "FMULS",
19648 argLen: 2,
19649 commutative: true,
19650 asm: arm64.AFMULS,
19651 reg: regInfo{
19652 inputs: []inputInfo{
19653 {0, 9223372034707292160},
19654 {1, 9223372034707292160},
19655 },
19656 outputs: []outputInfo{
19657 {0, 9223372034707292160},
19658 },
19659 },
19660 },
19661 {
19662 name: "FMULD",
19663 argLen: 2,
19664 commutative: true,
19665 asm: arm64.AFMULD,
19666 reg: regInfo{
19667 inputs: []inputInfo{
19668 {0, 9223372034707292160},
19669 {1, 9223372034707292160},
19670 },
19671 outputs: []outputInfo{
19672 {0, 9223372034707292160},
19673 },
19674 },
19675 },
19676 {
19677 name: "FNMULS",
19678 argLen: 2,
19679 commutative: true,
19680 asm: arm64.AFNMULS,
19681 reg: regInfo{
19682 inputs: []inputInfo{
19683 {0, 9223372034707292160},
19684 {1, 9223372034707292160},
19685 },
19686 outputs: []outputInfo{
19687 {0, 9223372034707292160},
19688 },
19689 },
19690 },
19691 {
19692 name: "FNMULD",
19693 argLen: 2,
19694 commutative: true,
19695 asm: arm64.AFNMULD,
19696 reg: regInfo{
19697 inputs: []inputInfo{
19698 {0, 9223372034707292160},
19699 {1, 9223372034707292160},
19700 },
19701 outputs: []outputInfo{
19702 {0, 9223372034707292160},
19703 },
19704 },
19705 },
19706 {
19707 name: "FDIVS",
19708 argLen: 2,
19709 asm: arm64.AFDIVS,
19710 reg: regInfo{
19711 inputs: []inputInfo{
19712 {0, 9223372034707292160},
19713 {1, 9223372034707292160},
19714 },
19715 outputs: []outputInfo{
19716 {0, 9223372034707292160},
19717 },
19718 },
19719 },
19720 {
19721 name: "FDIVD",
19722 argLen: 2,
19723 asm: arm64.AFDIVD,
19724 reg: regInfo{
19725 inputs: []inputInfo{
19726 {0, 9223372034707292160},
19727 {1, 9223372034707292160},
19728 },
19729 outputs: []outputInfo{
19730 {0, 9223372034707292160},
19731 },
19732 },
19733 },
19734 {
19735 name: "AND",
19736 argLen: 2,
19737 commutative: true,
19738 asm: arm64.AAND,
19739 reg: regInfo{
19740 inputs: []inputInfo{
19741 {0, 402653183},
19742 {1, 402653183},
19743 },
19744 outputs: []outputInfo{
19745 {0, 335544319},
19746 },
19747 },
19748 },
19749 {
19750 name: "ANDconst",
19751 auxType: auxInt64,
19752 argLen: 1,
19753 asm: arm64.AAND,
19754 reg: regInfo{
19755 inputs: []inputInfo{
19756 {0, 402653183},
19757 },
19758 outputs: []outputInfo{
19759 {0, 335544319},
19760 },
19761 },
19762 },
19763 {
19764 name: "OR",
19765 argLen: 2,
19766 commutative: true,
19767 asm: arm64.AORR,
19768 reg: regInfo{
19769 inputs: []inputInfo{
19770 {0, 402653183},
19771 {1, 402653183},
19772 },
19773 outputs: []outputInfo{
19774 {0, 335544319},
19775 },
19776 },
19777 },
19778 {
19779 name: "ORconst",
19780 auxType: auxInt64,
19781 argLen: 1,
19782 asm: arm64.AORR,
19783 reg: regInfo{
19784 inputs: []inputInfo{
19785 {0, 402653183},
19786 },
19787 outputs: []outputInfo{
19788 {0, 335544319},
19789 },
19790 },
19791 },
19792 {
19793 name: "XOR",
19794 argLen: 2,
19795 commutative: true,
19796 asm: arm64.AEOR,
19797 reg: regInfo{
19798 inputs: []inputInfo{
19799 {0, 402653183},
19800 {1, 402653183},
19801 },
19802 outputs: []outputInfo{
19803 {0, 335544319},
19804 },
19805 },
19806 },
19807 {
19808 name: "XORconst",
19809 auxType: auxInt64,
19810 argLen: 1,
19811 asm: arm64.AEOR,
19812 reg: regInfo{
19813 inputs: []inputInfo{
19814 {0, 402653183},
19815 },
19816 outputs: []outputInfo{
19817 {0, 335544319},
19818 },
19819 },
19820 },
19821 {
19822 name: "BIC",
19823 argLen: 2,
19824 asm: arm64.ABIC,
19825 reg: regInfo{
19826 inputs: []inputInfo{
19827 {0, 402653183},
19828 {1, 402653183},
19829 },
19830 outputs: []outputInfo{
19831 {0, 335544319},
19832 },
19833 },
19834 },
19835 {
19836 name: "EON",
19837 argLen: 2,
19838 asm: arm64.AEON,
19839 reg: regInfo{
19840 inputs: []inputInfo{
19841 {0, 402653183},
19842 {1, 402653183},
19843 },
19844 outputs: []outputInfo{
19845 {0, 335544319},
19846 },
19847 },
19848 },
19849 {
19850 name: "ORN",
19851 argLen: 2,
19852 asm: arm64.AORN,
19853 reg: regInfo{
19854 inputs: []inputInfo{
19855 {0, 402653183},
19856 {1, 402653183},
19857 },
19858 outputs: []outputInfo{
19859 {0, 335544319},
19860 },
19861 },
19862 },
19863 {
19864 name: "MVN",
19865 argLen: 1,
19866 asm: arm64.AMVN,
19867 reg: regInfo{
19868 inputs: []inputInfo{
19869 {0, 402653183},
19870 },
19871 outputs: []outputInfo{
19872 {0, 335544319},
19873 },
19874 },
19875 },
19876 {
19877 name: "NEG",
19878 argLen: 1,
19879 asm: arm64.ANEG,
19880 reg: regInfo{
19881 inputs: []inputInfo{
19882 {0, 402653183},
19883 },
19884 outputs: []outputInfo{
19885 {0, 335544319},
19886 },
19887 },
19888 },
19889 {
19890 name: "NEGSflags",
19891 argLen: 1,
19892 asm: arm64.ANEGS,
19893 reg: regInfo{
19894 inputs: []inputInfo{
19895 {0, 402653183},
19896 },
19897 outputs: []outputInfo{
19898 {1, 0},
19899 {0, 335544319},
19900 },
19901 },
19902 },
19903 {
19904 name: "NGCzerocarry",
19905 argLen: 1,
19906 asm: arm64.ANGC,
19907 reg: regInfo{
19908 outputs: []outputInfo{
19909 {0, 335544319},
19910 },
19911 },
19912 },
19913 {
19914 name: "FABSD",
19915 argLen: 1,
19916 asm: arm64.AFABSD,
19917 reg: regInfo{
19918 inputs: []inputInfo{
19919 {0, 9223372034707292160},
19920 },
19921 outputs: []outputInfo{
19922 {0, 9223372034707292160},
19923 },
19924 },
19925 },
19926 {
19927 name: "FNEGS",
19928 argLen: 1,
19929 asm: arm64.AFNEGS,
19930 reg: regInfo{
19931 inputs: []inputInfo{
19932 {0, 9223372034707292160},
19933 },
19934 outputs: []outputInfo{
19935 {0, 9223372034707292160},
19936 },
19937 },
19938 },
19939 {
19940 name: "FNEGD",
19941 argLen: 1,
19942 asm: arm64.AFNEGD,
19943 reg: regInfo{
19944 inputs: []inputInfo{
19945 {0, 9223372034707292160},
19946 },
19947 outputs: []outputInfo{
19948 {0, 9223372034707292160},
19949 },
19950 },
19951 },
19952 {
19953 name: "FSQRTD",
19954 argLen: 1,
19955 asm: arm64.AFSQRTD,
19956 reg: regInfo{
19957 inputs: []inputInfo{
19958 {0, 9223372034707292160},
19959 },
19960 outputs: []outputInfo{
19961 {0, 9223372034707292160},
19962 },
19963 },
19964 },
19965 {
19966 name: "FSQRTS",
19967 argLen: 1,
19968 asm: arm64.AFSQRTS,
19969 reg: regInfo{
19970 inputs: []inputInfo{
19971 {0, 9223372034707292160},
19972 },
19973 outputs: []outputInfo{
19974 {0, 9223372034707292160},
19975 },
19976 },
19977 },
19978 {
19979 name: "FMIND",
19980 argLen: 2,
19981 asm: arm64.AFMIND,
19982 reg: regInfo{
19983 inputs: []inputInfo{
19984 {0, 9223372034707292160},
19985 {1, 9223372034707292160},
19986 },
19987 outputs: []outputInfo{
19988 {0, 9223372034707292160},
19989 },
19990 },
19991 },
19992 {
19993 name: "FMINS",
19994 argLen: 2,
19995 asm: arm64.AFMINS,
19996 reg: regInfo{
19997 inputs: []inputInfo{
19998 {0, 9223372034707292160},
19999 {1, 9223372034707292160},
20000 },
20001 outputs: []outputInfo{
20002 {0, 9223372034707292160},
20003 },
20004 },
20005 },
20006 {
20007 name: "FMAXD",
20008 argLen: 2,
20009 asm: arm64.AFMAXD,
20010 reg: regInfo{
20011 inputs: []inputInfo{
20012 {0, 9223372034707292160},
20013 {1, 9223372034707292160},
20014 },
20015 outputs: []outputInfo{
20016 {0, 9223372034707292160},
20017 },
20018 },
20019 },
20020 {
20021 name: "FMAXS",
20022 argLen: 2,
20023 asm: arm64.AFMAXS,
20024 reg: regInfo{
20025 inputs: []inputInfo{
20026 {0, 9223372034707292160},
20027 {1, 9223372034707292160},
20028 },
20029 outputs: []outputInfo{
20030 {0, 9223372034707292160},
20031 },
20032 },
20033 },
20034 {
20035 name: "REV",
20036 argLen: 1,
20037 asm: arm64.AREV,
20038 reg: regInfo{
20039 inputs: []inputInfo{
20040 {0, 402653183},
20041 },
20042 outputs: []outputInfo{
20043 {0, 335544319},
20044 },
20045 },
20046 },
20047 {
20048 name: "REVW",
20049 argLen: 1,
20050 asm: arm64.AREVW,
20051 reg: regInfo{
20052 inputs: []inputInfo{
20053 {0, 402653183},
20054 },
20055 outputs: []outputInfo{
20056 {0, 335544319},
20057 },
20058 },
20059 },
20060 {
20061 name: "REV16",
20062 argLen: 1,
20063 asm: arm64.AREV16,
20064 reg: regInfo{
20065 inputs: []inputInfo{
20066 {0, 402653183},
20067 },
20068 outputs: []outputInfo{
20069 {0, 335544319},
20070 },
20071 },
20072 },
20073 {
20074 name: "REV16W",
20075 argLen: 1,
20076 asm: arm64.AREV16W,
20077 reg: regInfo{
20078 inputs: []inputInfo{
20079 {0, 402653183},
20080 },
20081 outputs: []outputInfo{
20082 {0, 335544319},
20083 },
20084 },
20085 },
20086 {
20087 name: "RBIT",
20088 argLen: 1,
20089 asm: arm64.ARBIT,
20090 reg: regInfo{
20091 inputs: []inputInfo{
20092 {0, 402653183},
20093 },
20094 outputs: []outputInfo{
20095 {0, 335544319},
20096 },
20097 },
20098 },
20099 {
20100 name: "RBITW",
20101 argLen: 1,
20102 asm: arm64.ARBITW,
20103 reg: regInfo{
20104 inputs: []inputInfo{
20105 {0, 402653183},
20106 },
20107 outputs: []outputInfo{
20108 {0, 335544319},
20109 },
20110 },
20111 },
20112 {
20113 name: "CLZ",
20114 argLen: 1,
20115 asm: arm64.ACLZ,
20116 reg: regInfo{
20117 inputs: []inputInfo{
20118 {0, 402653183},
20119 },
20120 outputs: []outputInfo{
20121 {0, 335544319},
20122 },
20123 },
20124 },
20125 {
20126 name: "CLZW",
20127 argLen: 1,
20128 asm: arm64.ACLZW,
20129 reg: regInfo{
20130 inputs: []inputInfo{
20131 {0, 402653183},
20132 },
20133 outputs: []outputInfo{
20134 {0, 335544319},
20135 },
20136 },
20137 },
20138 {
20139 name: "VCNT",
20140 argLen: 1,
20141 asm: arm64.AVCNT,
20142 reg: regInfo{
20143 inputs: []inputInfo{
20144 {0, 9223372034707292160},
20145 },
20146 outputs: []outputInfo{
20147 {0, 9223372034707292160},
20148 },
20149 },
20150 },
20151 {
20152 name: "VUADDLV",
20153 argLen: 1,
20154 asm: arm64.AVUADDLV,
20155 reg: regInfo{
20156 inputs: []inputInfo{
20157 {0, 9223372034707292160},
20158 },
20159 outputs: []outputInfo{
20160 {0, 9223372034707292160},
20161 },
20162 },
20163 },
20164 {
20165 name: "LoweredRound32F",
20166 argLen: 1,
20167 resultInArg0: true,
20168 zeroWidth: true,
20169 reg: regInfo{
20170 inputs: []inputInfo{
20171 {0, 9223372034707292160},
20172 },
20173 outputs: []outputInfo{
20174 {0, 9223372034707292160},
20175 },
20176 },
20177 },
20178 {
20179 name: "LoweredRound64F",
20180 argLen: 1,
20181 resultInArg0: true,
20182 zeroWidth: true,
20183 reg: regInfo{
20184 inputs: []inputInfo{
20185 {0, 9223372034707292160},
20186 },
20187 outputs: []outputInfo{
20188 {0, 9223372034707292160},
20189 },
20190 },
20191 },
20192 {
20193 name: "FMADDS",
20194 argLen: 3,
20195 asm: arm64.AFMADDS,
20196 reg: regInfo{
20197 inputs: []inputInfo{
20198 {0, 9223372034707292160},
20199 {1, 9223372034707292160},
20200 {2, 9223372034707292160},
20201 },
20202 outputs: []outputInfo{
20203 {0, 9223372034707292160},
20204 },
20205 },
20206 },
20207 {
20208 name: "FMADDD",
20209 argLen: 3,
20210 asm: arm64.AFMADDD,
20211 reg: regInfo{
20212 inputs: []inputInfo{
20213 {0, 9223372034707292160},
20214 {1, 9223372034707292160},
20215 {2, 9223372034707292160},
20216 },
20217 outputs: []outputInfo{
20218 {0, 9223372034707292160},
20219 },
20220 },
20221 },
20222 {
20223 name: "FNMADDS",
20224 argLen: 3,
20225 asm: arm64.AFNMADDS,
20226 reg: regInfo{
20227 inputs: []inputInfo{
20228 {0, 9223372034707292160},
20229 {1, 9223372034707292160},
20230 {2, 9223372034707292160},
20231 },
20232 outputs: []outputInfo{
20233 {0, 9223372034707292160},
20234 },
20235 },
20236 },
20237 {
20238 name: "FNMADDD",
20239 argLen: 3,
20240 asm: arm64.AFNMADDD,
20241 reg: regInfo{
20242 inputs: []inputInfo{
20243 {0, 9223372034707292160},
20244 {1, 9223372034707292160},
20245 {2, 9223372034707292160},
20246 },
20247 outputs: []outputInfo{
20248 {0, 9223372034707292160},
20249 },
20250 },
20251 },
20252 {
20253 name: "FMSUBS",
20254 argLen: 3,
20255 asm: arm64.AFMSUBS,
20256 reg: regInfo{
20257 inputs: []inputInfo{
20258 {0, 9223372034707292160},
20259 {1, 9223372034707292160},
20260 {2, 9223372034707292160},
20261 },
20262 outputs: []outputInfo{
20263 {0, 9223372034707292160},
20264 },
20265 },
20266 },
20267 {
20268 name: "FMSUBD",
20269 argLen: 3,
20270 asm: arm64.AFMSUBD,
20271 reg: regInfo{
20272 inputs: []inputInfo{
20273 {0, 9223372034707292160},
20274 {1, 9223372034707292160},
20275 {2, 9223372034707292160},
20276 },
20277 outputs: []outputInfo{
20278 {0, 9223372034707292160},
20279 },
20280 },
20281 },
20282 {
20283 name: "FNMSUBS",
20284 argLen: 3,
20285 asm: arm64.AFNMSUBS,
20286 reg: regInfo{
20287 inputs: []inputInfo{
20288 {0, 9223372034707292160},
20289 {1, 9223372034707292160},
20290 {2, 9223372034707292160},
20291 },
20292 outputs: []outputInfo{
20293 {0, 9223372034707292160},
20294 },
20295 },
20296 },
20297 {
20298 name: "FNMSUBD",
20299 argLen: 3,
20300 asm: arm64.AFNMSUBD,
20301 reg: regInfo{
20302 inputs: []inputInfo{
20303 {0, 9223372034707292160},
20304 {1, 9223372034707292160},
20305 {2, 9223372034707292160},
20306 },
20307 outputs: []outputInfo{
20308 {0, 9223372034707292160},
20309 },
20310 },
20311 },
20312 {
20313 name: "MADD",
20314 argLen: 3,
20315 asm: arm64.AMADD,
20316 reg: regInfo{
20317 inputs: []inputInfo{
20318 {0, 402653183},
20319 {1, 402653183},
20320 {2, 402653183},
20321 },
20322 outputs: []outputInfo{
20323 {0, 335544319},
20324 },
20325 },
20326 },
20327 {
20328 name: "MADDW",
20329 argLen: 3,
20330 asm: arm64.AMADDW,
20331 reg: regInfo{
20332 inputs: []inputInfo{
20333 {0, 402653183},
20334 {1, 402653183},
20335 {2, 402653183},
20336 },
20337 outputs: []outputInfo{
20338 {0, 335544319},
20339 },
20340 },
20341 },
20342 {
20343 name: "MSUB",
20344 argLen: 3,
20345 asm: arm64.AMSUB,
20346 reg: regInfo{
20347 inputs: []inputInfo{
20348 {0, 402653183},
20349 {1, 402653183},
20350 {2, 402653183},
20351 },
20352 outputs: []outputInfo{
20353 {0, 335544319},
20354 },
20355 },
20356 },
20357 {
20358 name: "MSUBW",
20359 argLen: 3,
20360 asm: arm64.AMSUBW,
20361 reg: regInfo{
20362 inputs: []inputInfo{
20363 {0, 402653183},
20364 {1, 402653183},
20365 {2, 402653183},
20366 },
20367 outputs: []outputInfo{
20368 {0, 335544319},
20369 },
20370 },
20371 },
20372 {
20373 name: "SLL",
20374 argLen: 2,
20375 asm: arm64.ALSL,
20376 reg: regInfo{
20377 inputs: []inputInfo{
20378 {0, 402653183},
20379 {1, 402653183},
20380 },
20381 outputs: []outputInfo{
20382 {0, 335544319},
20383 },
20384 },
20385 },
20386 {
20387 name: "SLLconst",
20388 auxType: auxInt64,
20389 argLen: 1,
20390 asm: arm64.ALSL,
20391 reg: regInfo{
20392 inputs: []inputInfo{
20393 {0, 402653183},
20394 },
20395 outputs: []outputInfo{
20396 {0, 335544319},
20397 },
20398 },
20399 },
20400 {
20401 name: "SRL",
20402 argLen: 2,
20403 asm: arm64.ALSR,
20404 reg: regInfo{
20405 inputs: []inputInfo{
20406 {0, 402653183},
20407 {1, 402653183},
20408 },
20409 outputs: []outputInfo{
20410 {0, 335544319},
20411 },
20412 },
20413 },
20414 {
20415 name: "SRLconst",
20416 auxType: auxInt64,
20417 argLen: 1,
20418 asm: arm64.ALSR,
20419 reg: regInfo{
20420 inputs: []inputInfo{
20421 {0, 402653183},
20422 },
20423 outputs: []outputInfo{
20424 {0, 335544319},
20425 },
20426 },
20427 },
20428 {
20429 name: "SRA",
20430 argLen: 2,
20431 asm: arm64.AASR,
20432 reg: regInfo{
20433 inputs: []inputInfo{
20434 {0, 402653183},
20435 {1, 402653183},
20436 },
20437 outputs: []outputInfo{
20438 {0, 335544319},
20439 },
20440 },
20441 },
20442 {
20443 name: "SRAconst",
20444 auxType: auxInt64,
20445 argLen: 1,
20446 asm: arm64.AASR,
20447 reg: regInfo{
20448 inputs: []inputInfo{
20449 {0, 402653183},
20450 },
20451 outputs: []outputInfo{
20452 {0, 335544319},
20453 },
20454 },
20455 },
20456 {
20457 name: "ROR",
20458 argLen: 2,
20459 asm: arm64.AROR,
20460 reg: regInfo{
20461 inputs: []inputInfo{
20462 {0, 402653183},
20463 {1, 402653183},
20464 },
20465 outputs: []outputInfo{
20466 {0, 335544319},
20467 },
20468 },
20469 },
20470 {
20471 name: "RORW",
20472 argLen: 2,
20473 asm: arm64.ARORW,
20474 reg: regInfo{
20475 inputs: []inputInfo{
20476 {0, 402653183},
20477 {1, 402653183},
20478 },
20479 outputs: []outputInfo{
20480 {0, 335544319},
20481 },
20482 },
20483 },
20484 {
20485 name: "RORconst",
20486 auxType: auxInt64,
20487 argLen: 1,
20488 asm: arm64.AROR,
20489 reg: regInfo{
20490 inputs: []inputInfo{
20491 {0, 402653183},
20492 },
20493 outputs: []outputInfo{
20494 {0, 335544319},
20495 },
20496 },
20497 },
20498 {
20499 name: "RORWconst",
20500 auxType: auxInt64,
20501 argLen: 1,
20502 asm: arm64.ARORW,
20503 reg: regInfo{
20504 inputs: []inputInfo{
20505 {0, 402653183},
20506 },
20507 outputs: []outputInfo{
20508 {0, 335544319},
20509 },
20510 },
20511 },
20512 {
20513 name: "EXTRconst",
20514 auxType: auxInt64,
20515 argLen: 2,
20516 asm: arm64.AEXTR,
20517 reg: regInfo{
20518 inputs: []inputInfo{
20519 {0, 402653183},
20520 {1, 402653183},
20521 },
20522 outputs: []outputInfo{
20523 {0, 335544319},
20524 },
20525 },
20526 },
20527 {
20528 name: "EXTRWconst",
20529 auxType: auxInt64,
20530 argLen: 2,
20531 asm: arm64.AEXTRW,
20532 reg: regInfo{
20533 inputs: []inputInfo{
20534 {0, 402653183},
20535 {1, 402653183},
20536 },
20537 outputs: []outputInfo{
20538 {0, 335544319},
20539 },
20540 },
20541 },
20542 {
20543 name: "CMP",
20544 argLen: 2,
20545 asm: arm64.ACMP,
20546 reg: regInfo{
20547 inputs: []inputInfo{
20548 {0, 402653183},
20549 {1, 402653183},
20550 },
20551 },
20552 },
20553 {
20554 name: "CMPconst",
20555 auxType: auxInt64,
20556 argLen: 1,
20557 asm: arm64.ACMP,
20558 reg: regInfo{
20559 inputs: []inputInfo{
20560 {0, 402653183},
20561 },
20562 },
20563 },
20564 {
20565 name: "CMPW",
20566 argLen: 2,
20567 asm: arm64.ACMPW,
20568 reg: regInfo{
20569 inputs: []inputInfo{
20570 {0, 402653183},
20571 {1, 402653183},
20572 },
20573 },
20574 },
20575 {
20576 name: "CMPWconst",
20577 auxType: auxInt32,
20578 argLen: 1,
20579 asm: arm64.ACMPW,
20580 reg: regInfo{
20581 inputs: []inputInfo{
20582 {0, 402653183},
20583 },
20584 },
20585 },
20586 {
20587 name: "CMN",
20588 argLen: 2,
20589 commutative: true,
20590 asm: arm64.ACMN,
20591 reg: regInfo{
20592 inputs: []inputInfo{
20593 {0, 402653183},
20594 {1, 402653183},
20595 },
20596 },
20597 },
20598 {
20599 name: "CMNconst",
20600 auxType: auxInt64,
20601 argLen: 1,
20602 asm: arm64.ACMN,
20603 reg: regInfo{
20604 inputs: []inputInfo{
20605 {0, 402653183},
20606 },
20607 },
20608 },
20609 {
20610 name: "CMNW",
20611 argLen: 2,
20612 commutative: true,
20613 asm: arm64.ACMNW,
20614 reg: regInfo{
20615 inputs: []inputInfo{
20616 {0, 402653183},
20617 {1, 402653183},
20618 },
20619 },
20620 },
20621 {
20622 name: "CMNWconst",
20623 auxType: auxInt32,
20624 argLen: 1,
20625 asm: arm64.ACMNW,
20626 reg: regInfo{
20627 inputs: []inputInfo{
20628 {0, 402653183},
20629 },
20630 },
20631 },
20632 {
20633 name: "TST",
20634 argLen: 2,
20635 commutative: true,
20636 asm: arm64.ATST,
20637 reg: regInfo{
20638 inputs: []inputInfo{
20639 {0, 402653183},
20640 {1, 402653183},
20641 },
20642 },
20643 },
20644 {
20645 name: "TSTconst",
20646 auxType: auxInt64,
20647 argLen: 1,
20648 asm: arm64.ATST,
20649 reg: regInfo{
20650 inputs: []inputInfo{
20651 {0, 402653183},
20652 },
20653 },
20654 },
20655 {
20656 name: "TSTW",
20657 argLen: 2,
20658 commutative: true,
20659 asm: arm64.ATSTW,
20660 reg: regInfo{
20661 inputs: []inputInfo{
20662 {0, 402653183},
20663 {1, 402653183},
20664 },
20665 },
20666 },
20667 {
20668 name: "TSTWconst",
20669 auxType: auxInt32,
20670 argLen: 1,
20671 asm: arm64.ATSTW,
20672 reg: regInfo{
20673 inputs: []inputInfo{
20674 {0, 402653183},
20675 },
20676 },
20677 },
20678 {
20679 name: "FCMPS",
20680 argLen: 2,
20681 asm: arm64.AFCMPS,
20682 reg: regInfo{
20683 inputs: []inputInfo{
20684 {0, 9223372034707292160},
20685 {1, 9223372034707292160},
20686 },
20687 },
20688 },
20689 {
20690 name: "FCMPD",
20691 argLen: 2,
20692 asm: arm64.AFCMPD,
20693 reg: regInfo{
20694 inputs: []inputInfo{
20695 {0, 9223372034707292160},
20696 {1, 9223372034707292160},
20697 },
20698 },
20699 },
20700 {
20701 name: "FCMPS0",
20702 argLen: 1,
20703 asm: arm64.AFCMPS,
20704 reg: regInfo{
20705 inputs: []inputInfo{
20706 {0, 9223372034707292160},
20707 },
20708 },
20709 },
20710 {
20711 name: "FCMPD0",
20712 argLen: 1,
20713 asm: arm64.AFCMPD,
20714 reg: regInfo{
20715 inputs: []inputInfo{
20716 {0, 9223372034707292160},
20717 },
20718 },
20719 },
20720 {
20721 name: "MVNshiftLL",
20722 auxType: auxInt64,
20723 argLen: 1,
20724 asm: arm64.AMVN,
20725 reg: regInfo{
20726 inputs: []inputInfo{
20727 {0, 402653183},
20728 },
20729 outputs: []outputInfo{
20730 {0, 335544319},
20731 },
20732 },
20733 },
20734 {
20735 name: "MVNshiftRL",
20736 auxType: auxInt64,
20737 argLen: 1,
20738 asm: arm64.AMVN,
20739 reg: regInfo{
20740 inputs: []inputInfo{
20741 {0, 402653183},
20742 },
20743 outputs: []outputInfo{
20744 {0, 335544319},
20745 },
20746 },
20747 },
20748 {
20749 name: "MVNshiftRA",
20750 auxType: auxInt64,
20751 argLen: 1,
20752 asm: arm64.AMVN,
20753 reg: regInfo{
20754 inputs: []inputInfo{
20755 {0, 402653183},
20756 },
20757 outputs: []outputInfo{
20758 {0, 335544319},
20759 },
20760 },
20761 },
20762 {
20763 name: "MVNshiftRO",
20764 auxType: auxInt64,
20765 argLen: 1,
20766 asm: arm64.AMVN,
20767 reg: regInfo{
20768 inputs: []inputInfo{
20769 {0, 402653183},
20770 },
20771 outputs: []outputInfo{
20772 {0, 335544319},
20773 },
20774 },
20775 },
20776 {
20777 name: "NEGshiftLL",
20778 auxType: auxInt64,
20779 argLen: 1,
20780 asm: arm64.ANEG,
20781 reg: regInfo{
20782 inputs: []inputInfo{
20783 {0, 402653183},
20784 },
20785 outputs: []outputInfo{
20786 {0, 335544319},
20787 },
20788 },
20789 },
20790 {
20791 name: "NEGshiftRL",
20792 auxType: auxInt64,
20793 argLen: 1,
20794 asm: arm64.ANEG,
20795 reg: regInfo{
20796 inputs: []inputInfo{
20797 {0, 402653183},
20798 },
20799 outputs: []outputInfo{
20800 {0, 335544319},
20801 },
20802 },
20803 },
20804 {
20805 name: "NEGshiftRA",
20806 auxType: auxInt64,
20807 argLen: 1,
20808 asm: arm64.ANEG,
20809 reg: regInfo{
20810 inputs: []inputInfo{
20811 {0, 402653183},
20812 },
20813 outputs: []outputInfo{
20814 {0, 335544319},
20815 },
20816 },
20817 },
20818 {
20819 name: "ADDshiftLL",
20820 auxType: auxInt64,
20821 argLen: 2,
20822 asm: arm64.AADD,
20823 reg: regInfo{
20824 inputs: []inputInfo{
20825 {0, 402653183},
20826 {1, 402653183},
20827 },
20828 outputs: []outputInfo{
20829 {0, 335544319},
20830 },
20831 },
20832 },
20833 {
20834 name: "ADDshiftRL",
20835 auxType: auxInt64,
20836 argLen: 2,
20837 asm: arm64.AADD,
20838 reg: regInfo{
20839 inputs: []inputInfo{
20840 {0, 402653183},
20841 {1, 402653183},
20842 },
20843 outputs: []outputInfo{
20844 {0, 335544319},
20845 },
20846 },
20847 },
20848 {
20849 name: "ADDshiftRA",
20850 auxType: auxInt64,
20851 argLen: 2,
20852 asm: arm64.AADD,
20853 reg: regInfo{
20854 inputs: []inputInfo{
20855 {0, 402653183},
20856 {1, 402653183},
20857 },
20858 outputs: []outputInfo{
20859 {0, 335544319},
20860 },
20861 },
20862 },
20863 {
20864 name: "SUBshiftLL",
20865 auxType: auxInt64,
20866 argLen: 2,
20867 asm: arm64.ASUB,
20868 reg: regInfo{
20869 inputs: []inputInfo{
20870 {0, 402653183},
20871 {1, 402653183},
20872 },
20873 outputs: []outputInfo{
20874 {0, 335544319},
20875 },
20876 },
20877 },
20878 {
20879 name: "SUBshiftRL",
20880 auxType: auxInt64,
20881 argLen: 2,
20882 asm: arm64.ASUB,
20883 reg: regInfo{
20884 inputs: []inputInfo{
20885 {0, 402653183},
20886 {1, 402653183},
20887 },
20888 outputs: []outputInfo{
20889 {0, 335544319},
20890 },
20891 },
20892 },
20893 {
20894 name: "SUBshiftRA",
20895 auxType: auxInt64,
20896 argLen: 2,
20897 asm: arm64.ASUB,
20898 reg: regInfo{
20899 inputs: []inputInfo{
20900 {0, 402653183},
20901 {1, 402653183},
20902 },
20903 outputs: []outputInfo{
20904 {0, 335544319},
20905 },
20906 },
20907 },
20908 {
20909 name: "ANDshiftLL",
20910 auxType: auxInt64,
20911 argLen: 2,
20912 asm: arm64.AAND,
20913 reg: regInfo{
20914 inputs: []inputInfo{
20915 {0, 402653183},
20916 {1, 402653183},
20917 },
20918 outputs: []outputInfo{
20919 {0, 335544319},
20920 },
20921 },
20922 },
20923 {
20924 name: "ANDshiftRL",
20925 auxType: auxInt64,
20926 argLen: 2,
20927 asm: arm64.AAND,
20928 reg: regInfo{
20929 inputs: []inputInfo{
20930 {0, 402653183},
20931 {1, 402653183},
20932 },
20933 outputs: []outputInfo{
20934 {0, 335544319},
20935 },
20936 },
20937 },
20938 {
20939 name: "ANDshiftRA",
20940 auxType: auxInt64,
20941 argLen: 2,
20942 asm: arm64.AAND,
20943 reg: regInfo{
20944 inputs: []inputInfo{
20945 {0, 402653183},
20946 {1, 402653183},
20947 },
20948 outputs: []outputInfo{
20949 {0, 335544319},
20950 },
20951 },
20952 },
20953 {
20954 name: "ANDshiftRO",
20955 auxType: auxInt64,
20956 argLen: 2,
20957 asm: arm64.AAND,
20958 reg: regInfo{
20959 inputs: []inputInfo{
20960 {0, 402653183},
20961 {1, 402653183},
20962 },
20963 outputs: []outputInfo{
20964 {0, 335544319},
20965 },
20966 },
20967 },
20968 {
20969 name: "ORshiftLL",
20970 auxType: auxInt64,
20971 argLen: 2,
20972 asm: arm64.AORR,
20973 reg: regInfo{
20974 inputs: []inputInfo{
20975 {0, 402653183},
20976 {1, 402653183},
20977 },
20978 outputs: []outputInfo{
20979 {0, 335544319},
20980 },
20981 },
20982 },
20983 {
20984 name: "ORshiftRL",
20985 auxType: auxInt64,
20986 argLen: 2,
20987 asm: arm64.AORR,
20988 reg: regInfo{
20989 inputs: []inputInfo{
20990 {0, 402653183},
20991 {1, 402653183},
20992 },
20993 outputs: []outputInfo{
20994 {0, 335544319},
20995 },
20996 },
20997 },
20998 {
20999 name: "ORshiftRA",
21000 auxType: auxInt64,
21001 argLen: 2,
21002 asm: arm64.AORR,
21003 reg: regInfo{
21004 inputs: []inputInfo{
21005 {0, 402653183},
21006 {1, 402653183},
21007 },
21008 outputs: []outputInfo{
21009 {0, 335544319},
21010 },
21011 },
21012 },
21013 {
21014 name: "ORshiftRO",
21015 auxType: auxInt64,
21016 argLen: 2,
21017 asm: arm64.AORR,
21018 reg: regInfo{
21019 inputs: []inputInfo{
21020 {0, 402653183},
21021 {1, 402653183},
21022 },
21023 outputs: []outputInfo{
21024 {0, 335544319},
21025 },
21026 },
21027 },
21028 {
21029 name: "XORshiftLL",
21030 auxType: auxInt64,
21031 argLen: 2,
21032 asm: arm64.AEOR,
21033 reg: regInfo{
21034 inputs: []inputInfo{
21035 {0, 402653183},
21036 {1, 402653183},
21037 },
21038 outputs: []outputInfo{
21039 {0, 335544319},
21040 },
21041 },
21042 },
21043 {
21044 name: "XORshiftRL",
21045 auxType: auxInt64,
21046 argLen: 2,
21047 asm: arm64.AEOR,
21048 reg: regInfo{
21049 inputs: []inputInfo{
21050 {0, 402653183},
21051 {1, 402653183},
21052 },
21053 outputs: []outputInfo{
21054 {0, 335544319},
21055 },
21056 },
21057 },
21058 {
21059 name: "XORshiftRA",
21060 auxType: auxInt64,
21061 argLen: 2,
21062 asm: arm64.AEOR,
21063 reg: regInfo{
21064 inputs: []inputInfo{
21065 {0, 402653183},
21066 {1, 402653183},
21067 },
21068 outputs: []outputInfo{
21069 {0, 335544319},
21070 },
21071 },
21072 },
21073 {
21074 name: "XORshiftRO",
21075 auxType: auxInt64,
21076 argLen: 2,
21077 asm: arm64.AEOR,
21078 reg: regInfo{
21079 inputs: []inputInfo{
21080 {0, 402653183},
21081 {1, 402653183},
21082 },
21083 outputs: []outputInfo{
21084 {0, 335544319},
21085 },
21086 },
21087 },
21088 {
21089 name: "BICshiftLL",
21090 auxType: auxInt64,
21091 argLen: 2,
21092 asm: arm64.ABIC,
21093 reg: regInfo{
21094 inputs: []inputInfo{
21095 {0, 402653183},
21096 {1, 402653183},
21097 },
21098 outputs: []outputInfo{
21099 {0, 335544319},
21100 },
21101 },
21102 },
21103 {
21104 name: "BICshiftRL",
21105 auxType: auxInt64,
21106 argLen: 2,
21107 asm: arm64.ABIC,
21108 reg: regInfo{
21109 inputs: []inputInfo{
21110 {0, 402653183},
21111 {1, 402653183},
21112 },
21113 outputs: []outputInfo{
21114 {0, 335544319},
21115 },
21116 },
21117 },
21118 {
21119 name: "BICshiftRA",
21120 auxType: auxInt64,
21121 argLen: 2,
21122 asm: arm64.ABIC,
21123 reg: regInfo{
21124 inputs: []inputInfo{
21125 {0, 402653183},
21126 {1, 402653183},
21127 },
21128 outputs: []outputInfo{
21129 {0, 335544319},
21130 },
21131 },
21132 },
21133 {
21134 name: "BICshiftRO",
21135 auxType: auxInt64,
21136 argLen: 2,
21137 asm: arm64.ABIC,
21138 reg: regInfo{
21139 inputs: []inputInfo{
21140 {0, 402653183},
21141 {1, 402653183},
21142 },
21143 outputs: []outputInfo{
21144 {0, 335544319},
21145 },
21146 },
21147 },
21148 {
21149 name: "EONshiftLL",
21150 auxType: auxInt64,
21151 argLen: 2,
21152 asm: arm64.AEON,
21153 reg: regInfo{
21154 inputs: []inputInfo{
21155 {0, 402653183},
21156 {1, 402653183},
21157 },
21158 outputs: []outputInfo{
21159 {0, 335544319},
21160 },
21161 },
21162 },
21163 {
21164 name: "EONshiftRL",
21165 auxType: auxInt64,
21166 argLen: 2,
21167 asm: arm64.AEON,
21168 reg: regInfo{
21169 inputs: []inputInfo{
21170 {0, 402653183},
21171 {1, 402653183},
21172 },
21173 outputs: []outputInfo{
21174 {0, 335544319},
21175 },
21176 },
21177 },
21178 {
21179 name: "EONshiftRA",
21180 auxType: auxInt64,
21181 argLen: 2,
21182 asm: arm64.AEON,
21183 reg: regInfo{
21184 inputs: []inputInfo{
21185 {0, 402653183},
21186 {1, 402653183},
21187 },
21188 outputs: []outputInfo{
21189 {0, 335544319},
21190 },
21191 },
21192 },
21193 {
21194 name: "EONshiftRO",
21195 auxType: auxInt64,
21196 argLen: 2,
21197 asm: arm64.AEON,
21198 reg: regInfo{
21199 inputs: []inputInfo{
21200 {0, 402653183},
21201 {1, 402653183},
21202 },
21203 outputs: []outputInfo{
21204 {0, 335544319},
21205 },
21206 },
21207 },
21208 {
21209 name: "ORNshiftLL",
21210 auxType: auxInt64,
21211 argLen: 2,
21212 asm: arm64.AORN,
21213 reg: regInfo{
21214 inputs: []inputInfo{
21215 {0, 402653183},
21216 {1, 402653183},
21217 },
21218 outputs: []outputInfo{
21219 {0, 335544319},
21220 },
21221 },
21222 },
21223 {
21224 name: "ORNshiftRL",
21225 auxType: auxInt64,
21226 argLen: 2,
21227 asm: arm64.AORN,
21228 reg: regInfo{
21229 inputs: []inputInfo{
21230 {0, 402653183},
21231 {1, 402653183},
21232 },
21233 outputs: []outputInfo{
21234 {0, 335544319},
21235 },
21236 },
21237 },
21238 {
21239 name: "ORNshiftRA",
21240 auxType: auxInt64,
21241 argLen: 2,
21242 asm: arm64.AORN,
21243 reg: regInfo{
21244 inputs: []inputInfo{
21245 {0, 402653183},
21246 {1, 402653183},
21247 },
21248 outputs: []outputInfo{
21249 {0, 335544319},
21250 },
21251 },
21252 },
21253 {
21254 name: "ORNshiftRO",
21255 auxType: auxInt64,
21256 argLen: 2,
21257 asm: arm64.AORN,
21258 reg: regInfo{
21259 inputs: []inputInfo{
21260 {0, 402653183},
21261 {1, 402653183},
21262 },
21263 outputs: []outputInfo{
21264 {0, 335544319},
21265 },
21266 },
21267 },
21268 {
21269 name: "CMPshiftLL",
21270 auxType: auxInt64,
21271 argLen: 2,
21272 asm: arm64.ACMP,
21273 reg: regInfo{
21274 inputs: []inputInfo{
21275 {0, 402653183},
21276 {1, 402653183},
21277 },
21278 },
21279 },
21280 {
21281 name: "CMPshiftRL",
21282 auxType: auxInt64,
21283 argLen: 2,
21284 asm: arm64.ACMP,
21285 reg: regInfo{
21286 inputs: []inputInfo{
21287 {0, 402653183},
21288 {1, 402653183},
21289 },
21290 },
21291 },
21292 {
21293 name: "CMPshiftRA",
21294 auxType: auxInt64,
21295 argLen: 2,
21296 asm: arm64.ACMP,
21297 reg: regInfo{
21298 inputs: []inputInfo{
21299 {0, 402653183},
21300 {1, 402653183},
21301 },
21302 },
21303 },
21304 {
21305 name: "CMNshiftLL",
21306 auxType: auxInt64,
21307 argLen: 2,
21308 asm: arm64.ACMN,
21309 reg: regInfo{
21310 inputs: []inputInfo{
21311 {0, 402653183},
21312 {1, 402653183},
21313 },
21314 },
21315 },
21316 {
21317 name: "CMNshiftRL",
21318 auxType: auxInt64,
21319 argLen: 2,
21320 asm: arm64.ACMN,
21321 reg: regInfo{
21322 inputs: []inputInfo{
21323 {0, 402653183},
21324 {1, 402653183},
21325 },
21326 },
21327 },
21328 {
21329 name: "CMNshiftRA",
21330 auxType: auxInt64,
21331 argLen: 2,
21332 asm: arm64.ACMN,
21333 reg: regInfo{
21334 inputs: []inputInfo{
21335 {0, 402653183},
21336 {1, 402653183},
21337 },
21338 },
21339 },
21340 {
21341 name: "TSTshiftLL",
21342 auxType: auxInt64,
21343 argLen: 2,
21344 asm: arm64.ATST,
21345 reg: regInfo{
21346 inputs: []inputInfo{
21347 {0, 402653183},
21348 {1, 402653183},
21349 },
21350 },
21351 },
21352 {
21353 name: "TSTshiftRL",
21354 auxType: auxInt64,
21355 argLen: 2,
21356 asm: arm64.ATST,
21357 reg: regInfo{
21358 inputs: []inputInfo{
21359 {0, 402653183},
21360 {1, 402653183},
21361 },
21362 },
21363 },
21364 {
21365 name: "TSTshiftRA",
21366 auxType: auxInt64,
21367 argLen: 2,
21368 asm: arm64.ATST,
21369 reg: regInfo{
21370 inputs: []inputInfo{
21371 {0, 402653183},
21372 {1, 402653183},
21373 },
21374 },
21375 },
21376 {
21377 name: "TSTshiftRO",
21378 auxType: auxInt64,
21379 argLen: 2,
21380 asm: arm64.ATST,
21381 reg: regInfo{
21382 inputs: []inputInfo{
21383 {0, 402653183},
21384 {1, 402653183},
21385 },
21386 },
21387 },
21388 {
21389 name: "BFI",
21390 auxType: auxARM64BitField,
21391 argLen: 2,
21392 resultInArg0: true,
21393 asm: arm64.ABFI,
21394 reg: regInfo{
21395 inputs: []inputInfo{
21396 {0, 335544319},
21397 {1, 335544319},
21398 },
21399 outputs: []outputInfo{
21400 {0, 335544319},
21401 },
21402 },
21403 },
21404 {
21405 name: "BFXIL",
21406 auxType: auxARM64BitField,
21407 argLen: 2,
21408 resultInArg0: true,
21409 asm: arm64.ABFXIL,
21410 reg: regInfo{
21411 inputs: []inputInfo{
21412 {0, 335544319},
21413 {1, 335544319},
21414 },
21415 outputs: []outputInfo{
21416 {0, 335544319},
21417 },
21418 },
21419 },
21420 {
21421 name: "SBFIZ",
21422 auxType: auxARM64BitField,
21423 argLen: 1,
21424 asm: arm64.ASBFIZ,
21425 reg: regInfo{
21426 inputs: []inputInfo{
21427 {0, 402653183},
21428 },
21429 outputs: []outputInfo{
21430 {0, 335544319},
21431 },
21432 },
21433 },
21434 {
21435 name: "SBFX",
21436 auxType: auxARM64BitField,
21437 argLen: 1,
21438 asm: arm64.ASBFX,
21439 reg: regInfo{
21440 inputs: []inputInfo{
21441 {0, 402653183},
21442 },
21443 outputs: []outputInfo{
21444 {0, 335544319},
21445 },
21446 },
21447 },
21448 {
21449 name: "UBFIZ",
21450 auxType: auxARM64BitField,
21451 argLen: 1,
21452 asm: arm64.AUBFIZ,
21453 reg: regInfo{
21454 inputs: []inputInfo{
21455 {0, 402653183},
21456 },
21457 outputs: []outputInfo{
21458 {0, 335544319},
21459 },
21460 },
21461 },
21462 {
21463 name: "UBFX",
21464 auxType: auxARM64BitField,
21465 argLen: 1,
21466 asm: arm64.AUBFX,
21467 reg: regInfo{
21468 inputs: []inputInfo{
21469 {0, 402653183},
21470 },
21471 outputs: []outputInfo{
21472 {0, 335544319},
21473 },
21474 },
21475 },
21476 {
21477 name: "MOVDconst",
21478 auxType: auxInt64,
21479 argLen: 0,
21480 rematerializeable: true,
21481 asm: arm64.AMOVD,
21482 reg: regInfo{
21483 outputs: []outputInfo{
21484 {0, 335544319},
21485 },
21486 },
21487 },
21488 {
21489 name: "FMOVSconst",
21490 auxType: auxFloat64,
21491 argLen: 0,
21492 rematerializeable: true,
21493 asm: arm64.AFMOVS,
21494 reg: regInfo{
21495 outputs: []outputInfo{
21496 {0, 9223372034707292160},
21497 },
21498 },
21499 },
21500 {
21501 name: "FMOVDconst",
21502 auxType: auxFloat64,
21503 argLen: 0,
21504 rematerializeable: true,
21505 asm: arm64.AFMOVD,
21506 reg: regInfo{
21507 outputs: []outputInfo{
21508 {0, 9223372034707292160},
21509 },
21510 },
21511 },
21512 {
21513 name: "MOVDaddr",
21514 auxType: auxSymOff,
21515 argLen: 1,
21516 rematerializeable: true,
21517 symEffect: SymAddr,
21518 asm: arm64.AMOVD,
21519 reg: regInfo{
21520 inputs: []inputInfo{
21521 {0, 9223372037928517632},
21522 },
21523 outputs: []outputInfo{
21524 {0, 335544319},
21525 },
21526 },
21527 },
21528 {
21529 name: "MOVBload",
21530 auxType: auxSymOff,
21531 argLen: 2,
21532 faultOnNilArg0: true,
21533 symEffect: SymRead,
21534 asm: arm64.AMOVB,
21535 reg: regInfo{
21536 inputs: []inputInfo{
21537 {0, 9223372038331170815},
21538 },
21539 outputs: []outputInfo{
21540 {0, 335544319},
21541 },
21542 },
21543 },
21544 {
21545 name: "MOVBUload",
21546 auxType: auxSymOff,
21547 argLen: 2,
21548 faultOnNilArg0: true,
21549 symEffect: SymRead,
21550 asm: arm64.AMOVBU,
21551 reg: regInfo{
21552 inputs: []inputInfo{
21553 {0, 9223372038331170815},
21554 },
21555 outputs: []outputInfo{
21556 {0, 335544319},
21557 },
21558 },
21559 },
21560 {
21561 name: "MOVHload",
21562 auxType: auxSymOff,
21563 argLen: 2,
21564 faultOnNilArg0: true,
21565 symEffect: SymRead,
21566 asm: arm64.AMOVH,
21567 reg: regInfo{
21568 inputs: []inputInfo{
21569 {0, 9223372038331170815},
21570 },
21571 outputs: []outputInfo{
21572 {0, 335544319},
21573 },
21574 },
21575 },
21576 {
21577 name: "MOVHUload",
21578 auxType: auxSymOff,
21579 argLen: 2,
21580 faultOnNilArg0: true,
21581 symEffect: SymRead,
21582 asm: arm64.AMOVHU,
21583 reg: regInfo{
21584 inputs: []inputInfo{
21585 {0, 9223372038331170815},
21586 },
21587 outputs: []outputInfo{
21588 {0, 335544319},
21589 },
21590 },
21591 },
21592 {
21593 name: "MOVWload",
21594 auxType: auxSymOff,
21595 argLen: 2,
21596 faultOnNilArg0: true,
21597 symEffect: SymRead,
21598 asm: arm64.AMOVW,
21599 reg: regInfo{
21600 inputs: []inputInfo{
21601 {0, 9223372038331170815},
21602 },
21603 outputs: []outputInfo{
21604 {0, 335544319},
21605 },
21606 },
21607 },
21608 {
21609 name: "MOVWUload",
21610 auxType: auxSymOff,
21611 argLen: 2,
21612 faultOnNilArg0: true,
21613 symEffect: SymRead,
21614 asm: arm64.AMOVWU,
21615 reg: regInfo{
21616 inputs: []inputInfo{
21617 {0, 9223372038331170815},
21618 },
21619 outputs: []outputInfo{
21620 {0, 335544319},
21621 },
21622 },
21623 },
21624 {
21625 name: "MOVDload",
21626 auxType: auxSymOff,
21627 argLen: 2,
21628 faultOnNilArg0: true,
21629 symEffect: SymRead,
21630 asm: arm64.AMOVD,
21631 reg: regInfo{
21632 inputs: []inputInfo{
21633 {0, 9223372038331170815},
21634 },
21635 outputs: []outputInfo{
21636 {0, 335544319},
21637 },
21638 },
21639 },
21640 {
21641 name: "FMOVSload",
21642 auxType: auxSymOff,
21643 argLen: 2,
21644 faultOnNilArg0: true,
21645 symEffect: SymRead,
21646 asm: arm64.AFMOVS,
21647 reg: regInfo{
21648 inputs: []inputInfo{
21649 {0, 9223372038331170815},
21650 },
21651 outputs: []outputInfo{
21652 {0, 9223372034707292160},
21653 },
21654 },
21655 },
21656 {
21657 name: "FMOVDload",
21658 auxType: auxSymOff,
21659 argLen: 2,
21660 faultOnNilArg0: true,
21661 symEffect: SymRead,
21662 asm: arm64.AFMOVD,
21663 reg: regInfo{
21664 inputs: []inputInfo{
21665 {0, 9223372038331170815},
21666 },
21667 outputs: []outputInfo{
21668 {0, 9223372034707292160},
21669 },
21670 },
21671 },
21672 {
21673 name: "LDP",
21674 auxType: auxSymOff,
21675 argLen: 2,
21676 faultOnNilArg0: true,
21677 symEffect: SymRead,
21678 asm: arm64.ALDP,
21679 reg: regInfo{
21680 inputs: []inputInfo{
21681 {0, 9223372038331170815},
21682 },
21683 outputs: []outputInfo{
21684 {0, 402653183},
21685 {1, 402653183},
21686 },
21687 },
21688 },
21689 {
21690 name: "LDPW",
21691 auxType: auxSymOff,
21692 argLen: 2,
21693 faultOnNilArg0: true,
21694 symEffect: SymRead,
21695 asm: arm64.ALDPW,
21696 reg: regInfo{
21697 inputs: []inputInfo{
21698 {0, 9223372038331170815},
21699 },
21700 outputs: []outputInfo{
21701 {0, 402653183},
21702 {1, 402653183},
21703 },
21704 },
21705 },
21706 {
21707 name: "LDPSW",
21708 auxType: auxSymOff,
21709 argLen: 2,
21710 faultOnNilArg0: true,
21711 symEffect: SymRead,
21712 asm: arm64.ALDPSW,
21713 reg: regInfo{
21714 inputs: []inputInfo{
21715 {0, 9223372038331170815},
21716 },
21717 outputs: []outputInfo{
21718 {0, 402653183},
21719 {1, 402653183},
21720 },
21721 },
21722 },
21723 {
21724 name: "FLDPD",
21725 auxType: auxSymOff,
21726 argLen: 2,
21727 faultOnNilArg0: true,
21728 symEffect: SymRead,
21729 asm: arm64.AFLDPD,
21730 reg: regInfo{
21731 inputs: []inputInfo{
21732 {0, 9223372038331170815},
21733 },
21734 outputs: []outputInfo{
21735 {0, 9223372034707292160},
21736 {1, 9223372034707292160},
21737 },
21738 },
21739 },
21740 {
21741 name: "FLDPS",
21742 auxType: auxSymOff,
21743 argLen: 2,
21744 faultOnNilArg0: true,
21745 symEffect: SymRead,
21746 asm: arm64.AFLDPS,
21747 reg: regInfo{
21748 inputs: []inputInfo{
21749 {0, 9223372038331170815},
21750 },
21751 outputs: []outputInfo{
21752 {0, 9223372034707292160},
21753 {1, 9223372034707292160},
21754 },
21755 },
21756 },
21757 {
21758 name: "MOVDloadidx",
21759 argLen: 3,
21760 asm: arm64.AMOVD,
21761 reg: regInfo{
21762 inputs: []inputInfo{
21763 {1, 402653183},
21764 {0, 9223372038331170815},
21765 },
21766 outputs: []outputInfo{
21767 {0, 335544319},
21768 },
21769 },
21770 },
21771 {
21772 name: "MOVWloadidx",
21773 argLen: 3,
21774 asm: arm64.AMOVW,
21775 reg: regInfo{
21776 inputs: []inputInfo{
21777 {1, 402653183},
21778 {0, 9223372038331170815},
21779 },
21780 outputs: []outputInfo{
21781 {0, 335544319},
21782 },
21783 },
21784 },
21785 {
21786 name: "MOVWUloadidx",
21787 argLen: 3,
21788 asm: arm64.AMOVWU,
21789 reg: regInfo{
21790 inputs: []inputInfo{
21791 {1, 402653183},
21792 {0, 9223372038331170815},
21793 },
21794 outputs: []outputInfo{
21795 {0, 335544319},
21796 },
21797 },
21798 },
21799 {
21800 name: "MOVHloadidx",
21801 argLen: 3,
21802 asm: arm64.AMOVH,
21803 reg: regInfo{
21804 inputs: []inputInfo{
21805 {1, 402653183},
21806 {0, 9223372038331170815},
21807 },
21808 outputs: []outputInfo{
21809 {0, 335544319},
21810 },
21811 },
21812 },
21813 {
21814 name: "MOVHUloadidx",
21815 argLen: 3,
21816 asm: arm64.AMOVHU,
21817 reg: regInfo{
21818 inputs: []inputInfo{
21819 {1, 402653183},
21820 {0, 9223372038331170815},
21821 },
21822 outputs: []outputInfo{
21823 {0, 335544319},
21824 },
21825 },
21826 },
21827 {
21828 name: "MOVBloadidx",
21829 argLen: 3,
21830 asm: arm64.AMOVB,
21831 reg: regInfo{
21832 inputs: []inputInfo{
21833 {1, 402653183},
21834 {0, 9223372038331170815},
21835 },
21836 outputs: []outputInfo{
21837 {0, 335544319},
21838 },
21839 },
21840 },
21841 {
21842 name: "MOVBUloadidx",
21843 argLen: 3,
21844 asm: arm64.AMOVBU,
21845 reg: regInfo{
21846 inputs: []inputInfo{
21847 {1, 402653183},
21848 {0, 9223372038331170815},
21849 },
21850 outputs: []outputInfo{
21851 {0, 335544319},
21852 },
21853 },
21854 },
21855 {
21856 name: "FMOVSloadidx",
21857 argLen: 3,
21858 asm: arm64.AFMOVS,
21859 reg: regInfo{
21860 inputs: []inputInfo{
21861 {1, 402653183},
21862 {0, 9223372038331170815},
21863 },
21864 outputs: []outputInfo{
21865 {0, 9223372034707292160},
21866 },
21867 },
21868 },
21869 {
21870 name: "FMOVDloadidx",
21871 argLen: 3,
21872 asm: arm64.AFMOVD,
21873 reg: regInfo{
21874 inputs: []inputInfo{
21875 {1, 402653183},
21876 {0, 9223372038331170815},
21877 },
21878 outputs: []outputInfo{
21879 {0, 9223372034707292160},
21880 },
21881 },
21882 },
21883 {
21884 name: "MOVHloadidx2",
21885 argLen: 3,
21886 asm: arm64.AMOVH,
21887 reg: regInfo{
21888 inputs: []inputInfo{
21889 {1, 402653183},
21890 {0, 9223372038331170815},
21891 },
21892 outputs: []outputInfo{
21893 {0, 335544319},
21894 },
21895 },
21896 },
21897 {
21898 name: "MOVHUloadidx2",
21899 argLen: 3,
21900 asm: arm64.AMOVHU,
21901 reg: regInfo{
21902 inputs: []inputInfo{
21903 {1, 402653183},
21904 {0, 9223372038331170815},
21905 },
21906 outputs: []outputInfo{
21907 {0, 335544319},
21908 },
21909 },
21910 },
21911 {
21912 name: "MOVWloadidx4",
21913 argLen: 3,
21914 asm: arm64.AMOVW,
21915 reg: regInfo{
21916 inputs: []inputInfo{
21917 {1, 402653183},
21918 {0, 9223372038331170815},
21919 },
21920 outputs: []outputInfo{
21921 {0, 335544319},
21922 },
21923 },
21924 },
21925 {
21926 name: "MOVWUloadidx4",
21927 argLen: 3,
21928 asm: arm64.AMOVWU,
21929 reg: regInfo{
21930 inputs: []inputInfo{
21931 {1, 402653183},
21932 {0, 9223372038331170815},
21933 },
21934 outputs: []outputInfo{
21935 {0, 335544319},
21936 },
21937 },
21938 },
21939 {
21940 name: "MOVDloadidx8",
21941 argLen: 3,
21942 asm: arm64.AMOVD,
21943 reg: regInfo{
21944 inputs: []inputInfo{
21945 {1, 402653183},
21946 {0, 9223372038331170815},
21947 },
21948 outputs: []outputInfo{
21949 {0, 335544319},
21950 },
21951 },
21952 },
21953 {
21954 name: "FMOVSloadidx4",
21955 argLen: 3,
21956 asm: arm64.AFMOVS,
21957 reg: regInfo{
21958 inputs: []inputInfo{
21959 {1, 402653183},
21960 {0, 9223372038331170815},
21961 },
21962 outputs: []outputInfo{
21963 {0, 9223372034707292160},
21964 },
21965 },
21966 },
21967 {
21968 name: "FMOVDloadidx8",
21969 argLen: 3,
21970 asm: arm64.AFMOVD,
21971 reg: regInfo{
21972 inputs: []inputInfo{
21973 {1, 402653183},
21974 {0, 9223372038331170815},
21975 },
21976 outputs: []outputInfo{
21977 {0, 9223372034707292160},
21978 },
21979 },
21980 },
21981 {
21982 name: "MOVBstore",
21983 auxType: auxSymOff,
21984 argLen: 3,
21985 faultOnNilArg0: true,
21986 symEffect: SymWrite,
21987 asm: arm64.AMOVB,
21988 reg: regInfo{
21989 inputs: []inputInfo{
21990 {1, 939524095},
21991 {0, 9223372038331170815},
21992 },
21993 },
21994 },
21995 {
21996 name: "MOVHstore",
21997 auxType: auxSymOff,
21998 argLen: 3,
21999 faultOnNilArg0: true,
22000 symEffect: SymWrite,
22001 asm: arm64.AMOVH,
22002 reg: regInfo{
22003 inputs: []inputInfo{
22004 {1, 939524095},
22005 {0, 9223372038331170815},
22006 },
22007 },
22008 },
22009 {
22010 name: "MOVWstore",
22011 auxType: auxSymOff,
22012 argLen: 3,
22013 faultOnNilArg0: true,
22014 symEffect: SymWrite,
22015 asm: arm64.AMOVW,
22016 reg: regInfo{
22017 inputs: []inputInfo{
22018 {1, 939524095},
22019 {0, 9223372038331170815},
22020 },
22021 },
22022 },
22023 {
22024 name: "MOVDstore",
22025 auxType: auxSymOff,
22026 argLen: 3,
22027 faultOnNilArg0: true,
22028 symEffect: SymWrite,
22029 asm: arm64.AMOVD,
22030 reg: regInfo{
22031 inputs: []inputInfo{
22032 {1, 939524095},
22033 {0, 9223372038331170815},
22034 },
22035 },
22036 },
22037 {
22038 name: "FMOVSstore",
22039 auxType: auxSymOff,
22040 argLen: 3,
22041 faultOnNilArg0: true,
22042 symEffect: SymWrite,
22043 asm: arm64.AFMOVS,
22044 reg: regInfo{
22045 inputs: []inputInfo{
22046 {0, 9223372038331170815},
22047 {1, 9223372034707292160},
22048 },
22049 },
22050 },
22051 {
22052 name: "FMOVDstore",
22053 auxType: auxSymOff,
22054 argLen: 3,
22055 faultOnNilArg0: true,
22056 symEffect: SymWrite,
22057 asm: arm64.AFMOVD,
22058 reg: regInfo{
22059 inputs: []inputInfo{
22060 {0, 9223372038331170815},
22061 {1, 9223372034707292160},
22062 },
22063 },
22064 },
22065 {
22066 name: "STP",
22067 auxType: auxSymOff,
22068 argLen: 4,
22069 faultOnNilArg0: true,
22070 symEffect: SymWrite,
22071 asm: arm64.ASTP,
22072 reg: regInfo{
22073 inputs: []inputInfo{
22074 {1, 939524095},
22075 {2, 939524095},
22076 {0, 9223372038331170815},
22077 },
22078 },
22079 },
22080 {
22081 name: "STPW",
22082 auxType: auxSymOff,
22083 argLen: 4,
22084 faultOnNilArg0: true,
22085 symEffect: SymWrite,
22086 asm: arm64.ASTPW,
22087 reg: regInfo{
22088 inputs: []inputInfo{
22089 {1, 939524095},
22090 {2, 939524095},
22091 {0, 9223372038331170815},
22092 },
22093 },
22094 },
22095 {
22096 name: "FSTPD",
22097 auxType: auxSymOff,
22098 argLen: 4,
22099 faultOnNilArg0: true,
22100 symEffect: SymWrite,
22101 asm: arm64.AFSTPD,
22102 reg: regInfo{
22103 inputs: []inputInfo{
22104 {0, 9223372038331170815},
22105 {1, 9223372034707292160},
22106 {2, 9223372034707292160},
22107 },
22108 },
22109 },
22110 {
22111 name: "FSTPS",
22112 auxType: auxSymOff,
22113 argLen: 4,
22114 faultOnNilArg0: true,
22115 symEffect: SymWrite,
22116 asm: arm64.AFSTPS,
22117 reg: regInfo{
22118 inputs: []inputInfo{
22119 {0, 9223372038331170815},
22120 {1, 9223372034707292160},
22121 {2, 9223372034707292160},
22122 },
22123 },
22124 },
22125 {
22126 name: "MOVBstoreidx",
22127 argLen: 4,
22128 asm: arm64.AMOVB,
22129 reg: regInfo{
22130 inputs: []inputInfo{
22131 {1, 939524095},
22132 {2, 939524095},
22133 {0, 9223372038331170815},
22134 },
22135 },
22136 },
22137 {
22138 name: "MOVHstoreidx",
22139 argLen: 4,
22140 asm: arm64.AMOVH,
22141 reg: regInfo{
22142 inputs: []inputInfo{
22143 {1, 939524095},
22144 {2, 939524095},
22145 {0, 9223372038331170815},
22146 },
22147 },
22148 },
22149 {
22150 name: "MOVWstoreidx",
22151 argLen: 4,
22152 asm: arm64.AMOVW,
22153 reg: regInfo{
22154 inputs: []inputInfo{
22155 {1, 939524095},
22156 {2, 939524095},
22157 {0, 9223372038331170815},
22158 },
22159 },
22160 },
22161 {
22162 name: "MOVDstoreidx",
22163 argLen: 4,
22164 asm: arm64.AMOVD,
22165 reg: regInfo{
22166 inputs: []inputInfo{
22167 {1, 939524095},
22168 {2, 939524095},
22169 {0, 9223372038331170815},
22170 },
22171 },
22172 },
22173 {
22174 name: "FMOVSstoreidx",
22175 argLen: 4,
22176 asm: arm64.AFMOVS,
22177 reg: regInfo{
22178 inputs: []inputInfo{
22179 {1, 402653183},
22180 {0, 9223372038331170815},
22181 {2, 9223372034707292160},
22182 },
22183 },
22184 },
22185 {
22186 name: "FMOVDstoreidx",
22187 argLen: 4,
22188 asm: arm64.AFMOVD,
22189 reg: regInfo{
22190 inputs: []inputInfo{
22191 {1, 402653183},
22192 {0, 9223372038331170815},
22193 {2, 9223372034707292160},
22194 },
22195 },
22196 },
22197 {
22198 name: "MOVHstoreidx2",
22199 argLen: 4,
22200 asm: arm64.AMOVH,
22201 reg: regInfo{
22202 inputs: []inputInfo{
22203 {1, 939524095},
22204 {2, 939524095},
22205 {0, 9223372038331170815},
22206 },
22207 },
22208 },
22209 {
22210 name: "MOVWstoreidx4",
22211 argLen: 4,
22212 asm: arm64.AMOVW,
22213 reg: regInfo{
22214 inputs: []inputInfo{
22215 {1, 939524095},
22216 {2, 939524095},
22217 {0, 9223372038331170815},
22218 },
22219 },
22220 },
22221 {
22222 name: "MOVDstoreidx8",
22223 argLen: 4,
22224 asm: arm64.AMOVD,
22225 reg: regInfo{
22226 inputs: []inputInfo{
22227 {1, 939524095},
22228 {2, 939524095},
22229 {0, 9223372038331170815},
22230 },
22231 },
22232 },
22233 {
22234 name: "FMOVSstoreidx4",
22235 argLen: 4,
22236 asm: arm64.AFMOVS,
22237 reg: regInfo{
22238 inputs: []inputInfo{
22239 {1, 402653183},
22240 {0, 9223372038331170815},
22241 {2, 9223372034707292160},
22242 },
22243 },
22244 },
22245 {
22246 name: "FMOVDstoreidx8",
22247 argLen: 4,
22248 asm: arm64.AFMOVD,
22249 reg: regInfo{
22250 inputs: []inputInfo{
22251 {1, 402653183},
22252 {0, 9223372038331170815},
22253 {2, 9223372034707292160},
22254 },
22255 },
22256 },
22257 {
22258 name: "FMOVDgpfp",
22259 argLen: 1,
22260 asm: arm64.AFMOVD,
22261 reg: regInfo{
22262 inputs: []inputInfo{
22263 {0, 335544319},
22264 },
22265 outputs: []outputInfo{
22266 {0, 9223372034707292160},
22267 },
22268 },
22269 },
22270 {
22271 name: "FMOVDfpgp",
22272 argLen: 1,
22273 asm: arm64.AFMOVD,
22274 reg: regInfo{
22275 inputs: []inputInfo{
22276 {0, 9223372034707292160},
22277 },
22278 outputs: []outputInfo{
22279 {0, 335544319},
22280 },
22281 },
22282 },
22283 {
22284 name: "FMOVSgpfp",
22285 argLen: 1,
22286 asm: arm64.AFMOVS,
22287 reg: regInfo{
22288 inputs: []inputInfo{
22289 {0, 335544319},
22290 },
22291 outputs: []outputInfo{
22292 {0, 9223372034707292160},
22293 },
22294 },
22295 },
22296 {
22297 name: "FMOVSfpgp",
22298 argLen: 1,
22299 asm: arm64.AFMOVS,
22300 reg: regInfo{
22301 inputs: []inputInfo{
22302 {0, 9223372034707292160},
22303 },
22304 outputs: []outputInfo{
22305 {0, 335544319},
22306 },
22307 },
22308 },
22309 {
22310 name: "MOVBreg",
22311 argLen: 1,
22312 asm: arm64.AMOVB,
22313 reg: regInfo{
22314 inputs: []inputInfo{
22315 {0, 402653183},
22316 },
22317 outputs: []outputInfo{
22318 {0, 335544319},
22319 },
22320 },
22321 },
22322 {
22323 name: "MOVBUreg",
22324 argLen: 1,
22325 asm: arm64.AMOVBU,
22326 reg: regInfo{
22327 inputs: []inputInfo{
22328 {0, 402653183},
22329 },
22330 outputs: []outputInfo{
22331 {0, 335544319},
22332 },
22333 },
22334 },
22335 {
22336 name: "MOVHreg",
22337 argLen: 1,
22338 asm: arm64.AMOVH,
22339 reg: regInfo{
22340 inputs: []inputInfo{
22341 {0, 402653183},
22342 },
22343 outputs: []outputInfo{
22344 {0, 335544319},
22345 },
22346 },
22347 },
22348 {
22349 name: "MOVHUreg",
22350 argLen: 1,
22351 asm: arm64.AMOVHU,
22352 reg: regInfo{
22353 inputs: []inputInfo{
22354 {0, 402653183},
22355 },
22356 outputs: []outputInfo{
22357 {0, 335544319},
22358 },
22359 },
22360 },
22361 {
22362 name: "MOVWreg",
22363 argLen: 1,
22364 asm: arm64.AMOVW,
22365 reg: regInfo{
22366 inputs: []inputInfo{
22367 {0, 402653183},
22368 },
22369 outputs: []outputInfo{
22370 {0, 335544319},
22371 },
22372 },
22373 },
22374 {
22375 name: "MOVWUreg",
22376 argLen: 1,
22377 asm: arm64.AMOVWU,
22378 reg: regInfo{
22379 inputs: []inputInfo{
22380 {0, 402653183},
22381 },
22382 outputs: []outputInfo{
22383 {0, 335544319},
22384 },
22385 },
22386 },
22387 {
22388 name: "MOVDreg",
22389 argLen: 1,
22390 asm: arm64.AMOVD,
22391 reg: regInfo{
22392 inputs: []inputInfo{
22393 {0, 402653183},
22394 },
22395 outputs: []outputInfo{
22396 {0, 335544319},
22397 },
22398 },
22399 },
22400 {
22401 name: "MOVDnop",
22402 argLen: 1,
22403 resultInArg0: true,
22404 reg: regInfo{
22405 inputs: []inputInfo{
22406 {0, 335544319},
22407 },
22408 outputs: []outputInfo{
22409 {0, 335544319},
22410 },
22411 },
22412 },
22413 {
22414 name: "SCVTFWS",
22415 argLen: 1,
22416 asm: arm64.ASCVTFWS,
22417 reg: regInfo{
22418 inputs: []inputInfo{
22419 {0, 335544319},
22420 },
22421 outputs: []outputInfo{
22422 {0, 9223372034707292160},
22423 },
22424 },
22425 },
22426 {
22427 name: "SCVTFWD",
22428 argLen: 1,
22429 asm: arm64.ASCVTFWD,
22430 reg: regInfo{
22431 inputs: []inputInfo{
22432 {0, 335544319},
22433 },
22434 outputs: []outputInfo{
22435 {0, 9223372034707292160},
22436 },
22437 },
22438 },
22439 {
22440 name: "UCVTFWS",
22441 argLen: 1,
22442 asm: arm64.AUCVTFWS,
22443 reg: regInfo{
22444 inputs: []inputInfo{
22445 {0, 335544319},
22446 },
22447 outputs: []outputInfo{
22448 {0, 9223372034707292160},
22449 },
22450 },
22451 },
22452 {
22453 name: "UCVTFWD",
22454 argLen: 1,
22455 asm: arm64.AUCVTFWD,
22456 reg: regInfo{
22457 inputs: []inputInfo{
22458 {0, 335544319},
22459 },
22460 outputs: []outputInfo{
22461 {0, 9223372034707292160},
22462 },
22463 },
22464 },
22465 {
22466 name: "SCVTFS",
22467 argLen: 1,
22468 asm: arm64.ASCVTFS,
22469 reg: regInfo{
22470 inputs: []inputInfo{
22471 {0, 335544319},
22472 },
22473 outputs: []outputInfo{
22474 {0, 9223372034707292160},
22475 },
22476 },
22477 },
22478 {
22479 name: "SCVTFD",
22480 argLen: 1,
22481 asm: arm64.ASCVTFD,
22482 reg: regInfo{
22483 inputs: []inputInfo{
22484 {0, 335544319},
22485 },
22486 outputs: []outputInfo{
22487 {0, 9223372034707292160},
22488 },
22489 },
22490 },
22491 {
22492 name: "UCVTFS",
22493 argLen: 1,
22494 asm: arm64.AUCVTFS,
22495 reg: regInfo{
22496 inputs: []inputInfo{
22497 {0, 335544319},
22498 },
22499 outputs: []outputInfo{
22500 {0, 9223372034707292160},
22501 },
22502 },
22503 },
22504 {
22505 name: "UCVTFD",
22506 argLen: 1,
22507 asm: arm64.AUCVTFD,
22508 reg: regInfo{
22509 inputs: []inputInfo{
22510 {0, 335544319},
22511 },
22512 outputs: []outputInfo{
22513 {0, 9223372034707292160},
22514 },
22515 },
22516 },
22517 {
22518 name: "FCVTZSSW",
22519 argLen: 1,
22520 asm: arm64.AFCVTZSSW,
22521 reg: regInfo{
22522 inputs: []inputInfo{
22523 {0, 9223372034707292160},
22524 },
22525 outputs: []outputInfo{
22526 {0, 335544319},
22527 },
22528 },
22529 },
22530 {
22531 name: "FCVTZSDW",
22532 argLen: 1,
22533 asm: arm64.AFCVTZSDW,
22534 reg: regInfo{
22535 inputs: []inputInfo{
22536 {0, 9223372034707292160},
22537 },
22538 outputs: []outputInfo{
22539 {0, 335544319},
22540 },
22541 },
22542 },
22543 {
22544 name: "FCVTZUSW",
22545 argLen: 1,
22546 asm: arm64.AFCVTZUSW,
22547 reg: regInfo{
22548 inputs: []inputInfo{
22549 {0, 9223372034707292160},
22550 },
22551 outputs: []outputInfo{
22552 {0, 335544319},
22553 },
22554 },
22555 },
22556 {
22557 name: "FCVTZUDW",
22558 argLen: 1,
22559 asm: arm64.AFCVTZUDW,
22560 reg: regInfo{
22561 inputs: []inputInfo{
22562 {0, 9223372034707292160},
22563 },
22564 outputs: []outputInfo{
22565 {0, 335544319},
22566 },
22567 },
22568 },
22569 {
22570 name: "FCVTZSS",
22571 argLen: 1,
22572 asm: arm64.AFCVTZSS,
22573 reg: regInfo{
22574 inputs: []inputInfo{
22575 {0, 9223372034707292160},
22576 },
22577 outputs: []outputInfo{
22578 {0, 335544319},
22579 },
22580 },
22581 },
22582 {
22583 name: "FCVTZSD",
22584 argLen: 1,
22585 asm: arm64.AFCVTZSD,
22586 reg: regInfo{
22587 inputs: []inputInfo{
22588 {0, 9223372034707292160},
22589 },
22590 outputs: []outputInfo{
22591 {0, 335544319},
22592 },
22593 },
22594 },
22595 {
22596 name: "FCVTZUS",
22597 argLen: 1,
22598 asm: arm64.AFCVTZUS,
22599 reg: regInfo{
22600 inputs: []inputInfo{
22601 {0, 9223372034707292160},
22602 },
22603 outputs: []outputInfo{
22604 {0, 335544319},
22605 },
22606 },
22607 },
22608 {
22609 name: "FCVTZUD",
22610 argLen: 1,
22611 asm: arm64.AFCVTZUD,
22612 reg: regInfo{
22613 inputs: []inputInfo{
22614 {0, 9223372034707292160},
22615 },
22616 outputs: []outputInfo{
22617 {0, 335544319},
22618 },
22619 },
22620 },
22621 {
22622 name: "FCVTSD",
22623 argLen: 1,
22624 asm: arm64.AFCVTSD,
22625 reg: regInfo{
22626 inputs: []inputInfo{
22627 {0, 9223372034707292160},
22628 },
22629 outputs: []outputInfo{
22630 {0, 9223372034707292160},
22631 },
22632 },
22633 },
22634 {
22635 name: "FCVTDS",
22636 argLen: 1,
22637 asm: arm64.AFCVTDS,
22638 reg: regInfo{
22639 inputs: []inputInfo{
22640 {0, 9223372034707292160},
22641 },
22642 outputs: []outputInfo{
22643 {0, 9223372034707292160},
22644 },
22645 },
22646 },
22647 {
22648 name: "FRINTAD",
22649 argLen: 1,
22650 asm: arm64.AFRINTAD,
22651 reg: regInfo{
22652 inputs: []inputInfo{
22653 {0, 9223372034707292160},
22654 },
22655 outputs: []outputInfo{
22656 {0, 9223372034707292160},
22657 },
22658 },
22659 },
22660 {
22661 name: "FRINTMD",
22662 argLen: 1,
22663 asm: arm64.AFRINTMD,
22664 reg: regInfo{
22665 inputs: []inputInfo{
22666 {0, 9223372034707292160},
22667 },
22668 outputs: []outputInfo{
22669 {0, 9223372034707292160},
22670 },
22671 },
22672 },
22673 {
22674 name: "FRINTND",
22675 argLen: 1,
22676 asm: arm64.AFRINTND,
22677 reg: regInfo{
22678 inputs: []inputInfo{
22679 {0, 9223372034707292160},
22680 },
22681 outputs: []outputInfo{
22682 {0, 9223372034707292160},
22683 },
22684 },
22685 },
22686 {
22687 name: "FRINTPD",
22688 argLen: 1,
22689 asm: arm64.AFRINTPD,
22690 reg: regInfo{
22691 inputs: []inputInfo{
22692 {0, 9223372034707292160},
22693 },
22694 outputs: []outputInfo{
22695 {0, 9223372034707292160},
22696 },
22697 },
22698 },
22699 {
22700 name: "FRINTZD",
22701 argLen: 1,
22702 asm: arm64.AFRINTZD,
22703 reg: regInfo{
22704 inputs: []inputInfo{
22705 {0, 9223372034707292160},
22706 },
22707 outputs: []outputInfo{
22708 {0, 9223372034707292160},
22709 },
22710 },
22711 },
22712 {
22713 name: "CSEL",
22714 auxType: auxCCop,
22715 argLen: 3,
22716 asm: arm64.ACSEL,
22717 reg: regInfo{
22718 inputs: []inputInfo{
22719 {0, 335544319},
22720 {1, 335544319},
22721 },
22722 outputs: []outputInfo{
22723 {0, 335544319},
22724 },
22725 },
22726 },
22727 {
22728 name: "CSEL0",
22729 auxType: auxCCop,
22730 argLen: 2,
22731 asm: arm64.ACSEL,
22732 reg: regInfo{
22733 inputs: []inputInfo{
22734 {0, 402653183},
22735 },
22736 outputs: []outputInfo{
22737 {0, 335544319},
22738 },
22739 },
22740 },
22741 {
22742 name: "CSINC",
22743 auxType: auxCCop,
22744 argLen: 3,
22745 asm: arm64.ACSINC,
22746 reg: regInfo{
22747 inputs: []inputInfo{
22748 {0, 335544319},
22749 {1, 335544319},
22750 },
22751 outputs: []outputInfo{
22752 {0, 335544319},
22753 },
22754 },
22755 },
22756 {
22757 name: "CSINV",
22758 auxType: auxCCop,
22759 argLen: 3,
22760 asm: arm64.ACSINV,
22761 reg: regInfo{
22762 inputs: []inputInfo{
22763 {0, 335544319},
22764 {1, 335544319},
22765 },
22766 outputs: []outputInfo{
22767 {0, 335544319},
22768 },
22769 },
22770 },
22771 {
22772 name: "CSNEG",
22773 auxType: auxCCop,
22774 argLen: 3,
22775 asm: arm64.ACSNEG,
22776 reg: regInfo{
22777 inputs: []inputInfo{
22778 {0, 335544319},
22779 {1, 335544319},
22780 },
22781 outputs: []outputInfo{
22782 {0, 335544319},
22783 },
22784 },
22785 },
22786 {
22787 name: "CSETM",
22788 auxType: auxCCop,
22789 argLen: 1,
22790 asm: arm64.ACSETM,
22791 reg: regInfo{
22792 outputs: []outputInfo{
22793 {0, 335544319},
22794 },
22795 },
22796 },
22797 {
22798 name: "CALLstatic",
22799 auxType: auxCallOff,
22800 argLen: -1,
22801 clobberFlags: true,
22802 call: true,
22803 reg: regInfo{
22804 clobbers: 9223372035109945343,
22805 },
22806 },
22807 {
22808 name: "CALLtail",
22809 auxType: auxCallOff,
22810 argLen: -1,
22811 clobberFlags: true,
22812 call: true,
22813 tailCall: true,
22814 reg: regInfo{
22815 clobbers: 9223372035109945343,
22816 },
22817 },
22818 {
22819 name: "CALLclosure",
22820 auxType: auxCallOff,
22821 argLen: -1,
22822 clobberFlags: true,
22823 call: true,
22824 reg: regInfo{
22825 inputs: []inputInfo{
22826 {1, 33554432},
22827 {0, 1409286143},
22828 },
22829 clobbers: 9223372035109945343,
22830 },
22831 },
22832 {
22833 name: "CALLinter",
22834 auxType: auxCallOff,
22835 argLen: -1,
22836 clobberFlags: true,
22837 call: true,
22838 reg: regInfo{
22839 inputs: []inputInfo{
22840 {0, 335544319},
22841 },
22842 clobbers: 9223372035109945343,
22843 },
22844 },
22845 {
22846 name: "LoweredNilCheck",
22847 argLen: 2,
22848 nilCheck: true,
22849 faultOnNilArg0: true,
22850 reg: regInfo{
22851 inputs: []inputInfo{
22852 {0, 402653183},
22853 },
22854 },
22855 },
22856 {
22857 name: "Equal",
22858 argLen: 1,
22859 reg: regInfo{
22860 outputs: []outputInfo{
22861 {0, 335544319},
22862 },
22863 },
22864 },
22865 {
22866 name: "NotEqual",
22867 argLen: 1,
22868 reg: regInfo{
22869 outputs: []outputInfo{
22870 {0, 335544319},
22871 },
22872 },
22873 },
22874 {
22875 name: "LessThan",
22876 argLen: 1,
22877 reg: regInfo{
22878 outputs: []outputInfo{
22879 {0, 335544319},
22880 },
22881 },
22882 },
22883 {
22884 name: "LessEqual",
22885 argLen: 1,
22886 reg: regInfo{
22887 outputs: []outputInfo{
22888 {0, 335544319},
22889 },
22890 },
22891 },
22892 {
22893 name: "GreaterThan",
22894 argLen: 1,
22895 reg: regInfo{
22896 outputs: []outputInfo{
22897 {0, 335544319},
22898 },
22899 },
22900 },
22901 {
22902 name: "GreaterEqual",
22903 argLen: 1,
22904 reg: regInfo{
22905 outputs: []outputInfo{
22906 {0, 335544319},
22907 },
22908 },
22909 },
22910 {
22911 name: "LessThanU",
22912 argLen: 1,
22913 reg: regInfo{
22914 outputs: []outputInfo{
22915 {0, 335544319},
22916 },
22917 },
22918 },
22919 {
22920 name: "LessEqualU",
22921 argLen: 1,
22922 reg: regInfo{
22923 outputs: []outputInfo{
22924 {0, 335544319},
22925 },
22926 },
22927 },
22928 {
22929 name: "GreaterThanU",
22930 argLen: 1,
22931 reg: regInfo{
22932 outputs: []outputInfo{
22933 {0, 335544319},
22934 },
22935 },
22936 },
22937 {
22938 name: "GreaterEqualU",
22939 argLen: 1,
22940 reg: regInfo{
22941 outputs: []outputInfo{
22942 {0, 335544319},
22943 },
22944 },
22945 },
22946 {
22947 name: "LessThanF",
22948 argLen: 1,
22949 reg: regInfo{
22950 outputs: []outputInfo{
22951 {0, 335544319},
22952 },
22953 },
22954 },
22955 {
22956 name: "LessEqualF",
22957 argLen: 1,
22958 reg: regInfo{
22959 outputs: []outputInfo{
22960 {0, 335544319},
22961 },
22962 },
22963 },
22964 {
22965 name: "GreaterThanF",
22966 argLen: 1,
22967 reg: regInfo{
22968 outputs: []outputInfo{
22969 {0, 335544319},
22970 },
22971 },
22972 },
22973 {
22974 name: "GreaterEqualF",
22975 argLen: 1,
22976 reg: regInfo{
22977 outputs: []outputInfo{
22978 {0, 335544319},
22979 },
22980 },
22981 },
22982 {
22983 name: "NotLessThanF",
22984 argLen: 1,
22985 reg: regInfo{
22986 outputs: []outputInfo{
22987 {0, 335544319},
22988 },
22989 },
22990 },
22991 {
22992 name: "NotLessEqualF",
22993 argLen: 1,
22994 reg: regInfo{
22995 outputs: []outputInfo{
22996 {0, 335544319},
22997 },
22998 },
22999 },
23000 {
23001 name: "NotGreaterThanF",
23002 argLen: 1,
23003 reg: regInfo{
23004 outputs: []outputInfo{
23005 {0, 335544319},
23006 },
23007 },
23008 },
23009 {
23010 name: "NotGreaterEqualF",
23011 argLen: 1,
23012 reg: regInfo{
23013 outputs: []outputInfo{
23014 {0, 335544319},
23015 },
23016 },
23017 },
23018 {
23019 name: "LessThanNoov",
23020 argLen: 1,
23021 reg: regInfo{
23022 outputs: []outputInfo{
23023 {0, 335544319},
23024 },
23025 },
23026 },
23027 {
23028 name: "GreaterEqualNoov",
23029 argLen: 1,
23030 reg: regInfo{
23031 outputs: []outputInfo{
23032 {0, 335544319},
23033 },
23034 },
23035 },
23036 {
23037 name: "DUFFZERO",
23038 auxType: auxInt64,
23039 argLen: 2,
23040 unsafePoint: true,
23041 reg: regInfo{
23042 inputs: []inputInfo{
23043 {0, 524288},
23044 },
23045 clobbers: 269156352,
23046 },
23047 },
23048 {
23049 name: "LoweredZero",
23050 argLen: 3,
23051 clobberFlags: true,
23052 faultOnNilArg0: true,
23053 reg: regInfo{
23054 inputs: []inputInfo{
23055 {0, 65536},
23056 {1, 335544319},
23057 },
23058 clobbers: 65536,
23059 },
23060 },
23061 {
23062 name: "DUFFCOPY",
23063 auxType: auxInt64,
23064 argLen: 3,
23065 unsafePoint: true,
23066 reg: regInfo{
23067 inputs: []inputInfo{
23068 {0, 1048576},
23069 {1, 524288},
23070 },
23071 clobbers: 303759360,
23072 },
23073 },
23074 {
23075 name: "LoweredMove",
23076 argLen: 4,
23077 clobberFlags: true,
23078 faultOnNilArg0: true,
23079 faultOnNilArg1: true,
23080 reg: regInfo{
23081 inputs: []inputInfo{
23082 {0, 131072},
23083 {1, 65536},
23084 {2, 318767103},
23085 },
23086 clobbers: 16973824,
23087 },
23088 },
23089 {
23090 name: "LoweredGetClosurePtr",
23091 argLen: 0,
23092 zeroWidth: true,
23093 reg: regInfo{
23094 outputs: []outputInfo{
23095 {0, 33554432},
23096 },
23097 },
23098 },
23099 {
23100 name: "LoweredGetCallerSP",
23101 argLen: 1,
23102 rematerializeable: true,
23103 reg: regInfo{
23104 outputs: []outputInfo{
23105 {0, 335544319},
23106 },
23107 },
23108 },
23109 {
23110 name: "LoweredGetCallerPC",
23111 argLen: 0,
23112 rematerializeable: true,
23113 reg: regInfo{
23114 outputs: []outputInfo{
23115 {0, 335544319},
23116 },
23117 },
23118 },
23119 {
23120 name: "FlagConstant",
23121 auxType: auxFlagConstant,
23122 argLen: 0,
23123 reg: regInfo{},
23124 },
23125 {
23126 name: "InvertFlags",
23127 argLen: 1,
23128 reg: regInfo{},
23129 },
23130 {
23131 name: "LDAR",
23132 argLen: 2,
23133 faultOnNilArg0: true,
23134 asm: arm64.ALDAR,
23135 reg: regInfo{
23136 inputs: []inputInfo{
23137 {0, 9223372038331170815},
23138 },
23139 outputs: []outputInfo{
23140 {0, 335544319},
23141 },
23142 },
23143 },
23144 {
23145 name: "LDARB",
23146 argLen: 2,
23147 faultOnNilArg0: true,
23148 asm: arm64.ALDARB,
23149 reg: regInfo{
23150 inputs: []inputInfo{
23151 {0, 9223372038331170815},
23152 },
23153 outputs: []outputInfo{
23154 {0, 335544319},
23155 },
23156 },
23157 },
23158 {
23159 name: "LDARW",
23160 argLen: 2,
23161 faultOnNilArg0: true,
23162 asm: arm64.ALDARW,
23163 reg: regInfo{
23164 inputs: []inputInfo{
23165 {0, 9223372038331170815},
23166 },
23167 outputs: []outputInfo{
23168 {0, 335544319},
23169 },
23170 },
23171 },
23172 {
23173 name: "STLRB",
23174 argLen: 3,
23175 faultOnNilArg0: true,
23176 hasSideEffects: true,
23177 asm: arm64.ASTLRB,
23178 reg: regInfo{
23179 inputs: []inputInfo{
23180 {1, 939524095},
23181 {0, 9223372038331170815},
23182 },
23183 },
23184 },
23185 {
23186 name: "STLR",
23187 argLen: 3,
23188 faultOnNilArg0: true,
23189 hasSideEffects: true,
23190 asm: arm64.ASTLR,
23191 reg: regInfo{
23192 inputs: []inputInfo{
23193 {1, 939524095},
23194 {0, 9223372038331170815},
23195 },
23196 },
23197 },
23198 {
23199 name: "STLRW",
23200 argLen: 3,
23201 faultOnNilArg0: true,
23202 hasSideEffects: true,
23203 asm: arm64.ASTLRW,
23204 reg: regInfo{
23205 inputs: []inputInfo{
23206 {1, 939524095},
23207 {0, 9223372038331170815},
23208 },
23209 },
23210 },
23211 {
23212 name: "LoweredAtomicExchange64",
23213 argLen: 3,
23214 resultNotInArgs: true,
23215 faultOnNilArg0: true,
23216 hasSideEffects: true,
23217 unsafePoint: true,
23218 reg: regInfo{
23219 inputs: []inputInfo{
23220 {1, 939524095},
23221 {0, 9223372038331170815},
23222 },
23223 outputs: []outputInfo{
23224 {0, 335544319},
23225 },
23226 },
23227 },
23228 {
23229 name: "LoweredAtomicExchange32",
23230 argLen: 3,
23231 resultNotInArgs: true,
23232 faultOnNilArg0: true,
23233 hasSideEffects: true,
23234 unsafePoint: true,
23235 reg: regInfo{
23236 inputs: []inputInfo{
23237 {1, 939524095},
23238 {0, 9223372038331170815},
23239 },
23240 outputs: []outputInfo{
23241 {0, 335544319},
23242 },
23243 },
23244 },
23245 {
23246 name: "LoweredAtomicExchange8",
23247 argLen: 3,
23248 resultNotInArgs: true,
23249 faultOnNilArg0: true,
23250 hasSideEffects: true,
23251 unsafePoint: true,
23252 reg: regInfo{
23253 inputs: []inputInfo{
23254 {1, 939524095},
23255 {0, 9223372038331170815},
23256 },
23257 outputs: []outputInfo{
23258 {0, 335544319},
23259 },
23260 },
23261 },
23262 {
23263 name: "LoweredAtomicExchange64Variant",
23264 argLen: 3,
23265 resultNotInArgs: true,
23266 faultOnNilArg0: true,
23267 hasSideEffects: true,
23268 reg: regInfo{
23269 inputs: []inputInfo{
23270 {1, 939524095},
23271 {0, 9223372038331170815},
23272 },
23273 outputs: []outputInfo{
23274 {0, 335544319},
23275 },
23276 },
23277 },
23278 {
23279 name: "LoweredAtomicExchange32Variant",
23280 argLen: 3,
23281 resultNotInArgs: true,
23282 faultOnNilArg0: true,
23283 hasSideEffects: true,
23284 reg: regInfo{
23285 inputs: []inputInfo{
23286 {1, 939524095},
23287 {0, 9223372038331170815},
23288 },
23289 outputs: []outputInfo{
23290 {0, 335544319},
23291 },
23292 },
23293 },
23294 {
23295 name: "LoweredAtomicExchange8Variant",
23296 argLen: 3,
23297 resultNotInArgs: true,
23298 faultOnNilArg0: true,
23299 hasSideEffects: true,
23300 unsafePoint: true,
23301 reg: regInfo{
23302 inputs: []inputInfo{
23303 {1, 939524095},
23304 {0, 9223372038331170815},
23305 },
23306 outputs: []outputInfo{
23307 {0, 335544319},
23308 },
23309 },
23310 },
23311 {
23312 name: "LoweredAtomicAdd64",
23313 argLen: 3,
23314 resultNotInArgs: true,
23315 faultOnNilArg0: true,
23316 hasSideEffects: true,
23317 unsafePoint: true,
23318 reg: regInfo{
23319 inputs: []inputInfo{
23320 {1, 939524095},
23321 {0, 9223372038331170815},
23322 },
23323 outputs: []outputInfo{
23324 {0, 335544319},
23325 },
23326 },
23327 },
23328 {
23329 name: "LoweredAtomicAdd32",
23330 argLen: 3,
23331 resultNotInArgs: true,
23332 faultOnNilArg0: true,
23333 hasSideEffects: true,
23334 unsafePoint: true,
23335 reg: regInfo{
23336 inputs: []inputInfo{
23337 {1, 939524095},
23338 {0, 9223372038331170815},
23339 },
23340 outputs: []outputInfo{
23341 {0, 335544319},
23342 },
23343 },
23344 },
23345 {
23346 name: "LoweredAtomicAdd64Variant",
23347 argLen: 3,
23348 resultNotInArgs: true,
23349 faultOnNilArg0: true,
23350 hasSideEffects: true,
23351 reg: regInfo{
23352 inputs: []inputInfo{
23353 {1, 939524095},
23354 {0, 9223372038331170815},
23355 },
23356 outputs: []outputInfo{
23357 {0, 335544319},
23358 },
23359 },
23360 },
23361 {
23362 name: "LoweredAtomicAdd32Variant",
23363 argLen: 3,
23364 resultNotInArgs: true,
23365 faultOnNilArg0: true,
23366 hasSideEffects: true,
23367 reg: regInfo{
23368 inputs: []inputInfo{
23369 {1, 939524095},
23370 {0, 9223372038331170815},
23371 },
23372 outputs: []outputInfo{
23373 {0, 335544319},
23374 },
23375 },
23376 },
23377 {
23378 name: "LoweredAtomicCas64",
23379 argLen: 4,
23380 resultNotInArgs: true,
23381 clobberFlags: true,
23382 faultOnNilArg0: true,
23383 hasSideEffects: true,
23384 unsafePoint: true,
23385 reg: regInfo{
23386 inputs: []inputInfo{
23387 {1, 939524095},
23388 {2, 939524095},
23389 {0, 9223372038331170815},
23390 },
23391 outputs: []outputInfo{
23392 {0, 335544319},
23393 },
23394 },
23395 },
23396 {
23397 name: "LoweredAtomicCas32",
23398 argLen: 4,
23399 resultNotInArgs: true,
23400 clobberFlags: true,
23401 faultOnNilArg0: true,
23402 hasSideEffects: true,
23403 unsafePoint: true,
23404 reg: regInfo{
23405 inputs: []inputInfo{
23406 {1, 939524095},
23407 {2, 939524095},
23408 {0, 9223372038331170815},
23409 },
23410 outputs: []outputInfo{
23411 {0, 335544319},
23412 },
23413 },
23414 },
23415 {
23416 name: "LoweredAtomicCas64Variant",
23417 argLen: 4,
23418 resultNotInArgs: true,
23419 clobberFlags: true,
23420 faultOnNilArg0: true,
23421 hasSideEffects: true,
23422 unsafePoint: true,
23423 reg: regInfo{
23424 inputs: []inputInfo{
23425 {1, 939524095},
23426 {2, 939524095},
23427 {0, 9223372038331170815},
23428 },
23429 outputs: []outputInfo{
23430 {0, 335544319},
23431 },
23432 },
23433 },
23434 {
23435 name: "LoweredAtomicCas32Variant",
23436 argLen: 4,
23437 resultNotInArgs: true,
23438 clobberFlags: true,
23439 faultOnNilArg0: true,
23440 hasSideEffects: true,
23441 unsafePoint: true,
23442 reg: regInfo{
23443 inputs: []inputInfo{
23444 {1, 939524095},
23445 {2, 939524095},
23446 {0, 9223372038331170815},
23447 },
23448 outputs: []outputInfo{
23449 {0, 335544319},
23450 },
23451 },
23452 },
23453 {
23454 name: "LoweredAtomicAnd8",
23455 argLen: 3,
23456 resultNotInArgs: true,
23457 needIntTemp: true,
23458 faultOnNilArg0: true,
23459 hasSideEffects: true,
23460 unsafePoint: true,
23461 asm: arm64.AAND,
23462 reg: regInfo{
23463 inputs: []inputInfo{
23464 {1, 939524095},
23465 {0, 9223372038331170815},
23466 },
23467 outputs: []outputInfo{
23468 {0, 335544319},
23469 },
23470 },
23471 },
23472 {
23473 name: "LoweredAtomicOr8",
23474 argLen: 3,
23475 resultNotInArgs: true,
23476 needIntTemp: true,
23477 faultOnNilArg0: true,
23478 hasSideEffects: true,
23479 unsafePoint: true,
23480 asm: arm64.AORR,
23481 reg: regInfo{
23482 inputs: []inputInfo{
23483 {1, 939524095},
23484 {0, 9223372038331170815},
23485 },
23486 outputs: []outputInfo{
23487 {0, 335544319},
23488 },
23489 },
23490 },
23491 {
23492 name: "LoweredAtomicAnd64",
23493 argLen: 3,
23494 resultNotInArgs: true,
23495 needIntTemp: true,
23496 faultOnNilArg0: true,
23497 hasSideEffects: true,
23498 unsafePoint: true,
23499 asm: arm64.AAND,
23500 reg: regInfo{
23501 inputs: []inputInfo{
23502 {1, 939524095},
23503 {0, 9223372038331170815},
23504 },
23505 outputs: []outputInfo{
23506 {0, 335544319},
23507 },
23508 },
23509 },
23510 {
23511 name: "LoweredAtomicOr64",
23512 argLen: 3,
23513 resultNotInArgs: true,
23514 needIntTemp: true,
23515 faultOnNilArg0: true,
23516 hasSideEffects: true,
23517 unsafePoint: true,
23518 asm: arm64.AORR,
23519 reg: regInfo{
23520 inputs: []inputInfo{
23521 {1, 939524095},
23522 {0, 9223372038331170815},
23523 },
23524 outputs: []outputInfo{
23525 {0, 335544319},
23526 },
23527 },
23528 },
23529 {
23530 name: "LoweredAtomicAnd32",
23531 argLen: 3,
23532 resultNotInArgs: true,
23533 needIntTemp: true,
23534 faultOnNilArg0: true,
23535 hasSideEffects: true,
23536 unsafePoint: true,
23537 asm: arm64.AAND,
23538 reg: regInfo{
23539 inputs: []inputInfo{
23540 {1, 939524095},
23541 {0, 9223372038331170815},
23542 },
23543 outputs: []outputInfo{
23544 {0, 335544319},
23545 },
23546 },
23547 },
23548 {
23549 name: "LoweredAtomicOr32",
23550 argLen: 3,
23551 resultNotInArgs: true,
23552 needIntTemp: true,
23553 faultOnNilArg0: true,
23554 hasSideEffects: true,
23555 unsafePoint: true,
23556 asm: arm64.AORR,
23557 reg: regInfo{
23558 inputs: []inputInfo{
23559 {1, 939524095},
23560 {0, 9223372038331170815},
23561 },
23562 outputs: []outputInfo{
23563 {0, 335544319},
23564 },
23565 },
23566 },
23567 {
23568 name: "LoweredAtomicAnd8Variant",
23569 argLen: 3,
23570 resultNotInArgs: true,
23571 faultOnNilArg0: true,
23572 hasSideEffects: true,
23573 unsafePoint: true,
23574 reg: regInfo{
23575 inputs: []inputInfo{
23576 {1, 939524095},
23577 {0, 9223372038331170815},
23578 },
23579 outputs: []outputInfo{
23580 {0, 335544319},
23581 },
23582 },
23583 },
23584 {
23585 name: "LoweredAtomicOr8Variant",
23586 argLen: 3,
23587 resultNotInArgs: true,
23588 faultOnNilArg0: true,
23589 hasSideEffects: true,
23590 reg: regInfo{
23591 inputs: []inputInfo{
23592 {1, 939524095},
23593 {0, 9223372038331170815},
23594 },
23595 outputs: []outputInfo{
23596 {0, 335544319},
23597 },
23598 },
23599 },
23600 {
23601 name: "LoweredAtomicAnd64Variant",
23602 argLen: 3,
23603 resultNotInArgs: true,
23604 faultOnNilArg0: true,
23605 hasSideEffects: true,
23606 unsafePoint: true,
23607 reg: regInfo{
23608 inputs: []inputInfo{
23609 {1, 939524095},
23610 {0, 9223372038331170815},
23611 },
23612 outputs: []outputInfo{
23613 {0, 335544319},
23614 },
23615 },
23616 },
23617 {
23618 name: "LoweredAtomicOr64Variant",
23619 argLen: 3,
23620 resultNotInArgs: true,
23621 faultOnNilArg0: true,
23622 hasSideEffects: true,
23623 reg: regInfo{
23624 inputs: []inputInfo{
23625 {1, 939524095},
23626 {0, 9223372038331170815},
23627 },
23628 outputs: []outputInfo{
23629 {0, 335544319},
23630 },
23631 },
23632 },
23633 {
23634 name: "LoweredAtomicAnd32Variant",
23635 argLen: 3,
23636 resultNotInArgs: true,
23637 faultOnNilArg0: true,
23638 hasSideEffects: true,
23639 unsafePoint: true,
23640 reg: regInfo{
23641 inputs: []inputInfo{
23642 {1, 939524095},
23643 {0, 9223372038331170815},
23644 },
23645 outputs: []outputInfo{
23646 {0, 335544319},
23647 },
23648 },
23649 },
23650 {
23651 name: "LoweredAtomicOr32Variant",
23652 argLen: 3,
23653 resultNotInArgs: true,
23654 faultOnNilArg0: true,
23655 hasSideEffects: true,
23656 reg: regInfo{
23657 inputs: []inputInfo{
23658 {1, 939524095},
23659 {0, 9223372038331170815},
23660 },
23661 outputs: []outputInfo{
23662 {0, 335544319},
23663 },
23664 },
23665 },
23666 {
23667 name: "LoweredWB",
23668 auxType: auxInt64,
23669 argLen: 1,
23670 clobberFlags: true,
23671 reg: regInfo{
23672 clobbers: 9223372034975924224,
23673 outputs: []outputInfo{
23674 {0, 16777216},
23675 },
23676 },
23677 },
23678 {
23679 name: "LoweredPanicBoundsRR",
23680 auxType: auxInt64,
23681 argLen: 3,
23682 call: true,
23683 reg: regInfo{
23684 inputs: []inputInfo{
23685 {0, 65535},
23686 {1, 65535},
23687 },
23688 },
23689 },
23690 {
23691 name: "LoweredPanicBoundsRC",
23692 auxType: auxPanicBoundsC,
23693 argLen: 2,
23694 call: true,
23695 reg: regInfo{
23696 inputs: []inputInfo{
23697 {0, 65535},
23698 },
23699 },
23700 },
23701 {
23702 name: "LoweredPanicBoundsCR",
23703 auxType: auxPanicBoundsC,
23704 argLen: 2,
23705 call: true,
23706 reg: regInfo{
23707 inputs: []inputInfo{
23708 {0, 65535},
23709 },
23710 },
23711 },
23712 {
23713 name: "LoweredPanicBoundsCC",
23714 auxType: auxPanicBoundsCC,
23715 argLen: 1,
23716 call: true,
23717 reg: regInfo{},
23718 },
23719 {
23720 name: "PRFM",
23721 auxType: auxInt64,
23722 argLen: 2,
23723 hasSideEffects: true,
23724 asm: arm64.APRFM,
23725 reg: regInfo{
23726 inputs: []inputInfo{
23727 {0, 9223372038331170815},
23728 },
23729 },
23730 },
23731 {
23732 name: "DMB",
23733 auxType: auxInt64,
23734 argLen: 1,
23735 hasSideEffects: true,
23736 asm: arm64.ADMB,
23737 reg: regInfo{},
23738 },
23739 {
23740 name: "ZERO",
23741 argLen: 0,
23742 zeroWidth: true,
23743 fixedReg: true,
23744 reg: regInfo{},
23745 },
23746
23747 {
23748 name: "NEGV",
23749 argLen: 1,
23750 reg: regInfo{
23751 inputs: []inputInfo{
23752 {0, 1073741816},
23753 },
23754 outputs: []outputInfo{
23755 {0, 1071644664},
23756 },
23757 },
23758 },
23759 {
23760 name: "NEGF",
23761 argLen: 1,
23762 asm: loong64.ANEGF,
23763 reg: regInfo{
23764 inputs: []inputInfo{
23765 {0, 4611686017353646080},
23766 },
23767 outputs: []outputInfo{
23768 {0, 4611686017353646080},
23769 },
23770 },
23771 },
23772 {
23773 name: "NEGD",
23774 argLen: 1,
23775 asm: loong64.ANEGD,
23776 reg: regInfo{
23777 inputs: []inputInfo{
23778 {0, 4611686017353646080},
23779 },
23780 outputs: []outputInfo{
23781 {0, 4611686017353646080},
23782 },
23783 },
23784 },
23785 {
23786 name: "SQRTD",
23787 argLen: 1,
23788 asm: loong64.ASQRTD,
23789 reg: regInfo{
23790 inputs: []inputInfo{
23791 {0, 4611686017353646080},
23792 },
23793 outputs: []outputInfo{
23794 {0, 4611686017353646080},
23795 },
23796 },
23797 },
23798 {
23799 name: "SQRTF",
23800 argLen: 1,
23801 asm: loong64.ASQRTF,
23802 reg: regInfo{
23803 inputs: []inputInfo{
23804 {0, 4611686017353646080},
23805 },
23806 outputs: []outputInfo{
23807 {0, 4611686017353646080},
23808 },
23809 },
23810 },
23811 {
23812 name: "ABSD",
23813 argLen: 1,
23814 asm: loong64.AABSD,
23815 reg: regInfo{
23816 inputs: []inputInfo{
23817 {0, 4611686017353646080},
23818 },
23819 outputs: []outputInfo{
23820 {0, 4611686017353646080},
23821 },
23822 },
23823 },
23824 {
23825 name: "CLZW",
23826 argLen: 1,
23827 asm: loong64.ACLZW,
23828 reg: regInfo{
23829 inputs: []inputInfo{
23830 {0, 1073741816},
23831 },
23832 outputs: []outputInfo{
23833 {0, 1071644664},
23834 },
23835 },
23836 },
23837 {
23838 name: "CLZV",
23839 argLen: 1,
23840 asm: loong64.ACLZV,
23841 reg: regInfo{
23842 inputs: []inputInfo{
23843 {0, 1073741816},
23844 },
23845 outputs: []outputInfo{
23846 {0, 1071644664},
23847 },
23848 },
23849 },
23850 {
23851 name: "CTZW",
23852 argLen: 1,
23853 asm: loong64.ACTZW,
23854 reg: regInfo{
23855 inputs: []inputInfo{
23856 {0, 1073741816},
23857 },
23858 outputs: []outputInfo{
23859 {0, 1071644664},
23860 },
23861 },
23862 },
23863 {
23864 name: "CTZV",
23865 argLen: 1,
23866 asm: loong64.ACTZV,
23867 reg: regInfo{
23868 inputs: []inputInfo{
23869 {0, 1073741816},
23870 },
23871 outputs: []outputInfo{
23872 {0, 1071644664},
23873 },
23874 },
23875 },
23876 {
23877 name: "REVB2H",
23878 argLen: 1,
23879 asm: loong64.AREVB2H,
23880 reg: regInfo{
23881 inputs: []inputInfo{
23882 {0, 1073741816},
23883 },
23884 outputs: []outputInfo{
23885 {0, 1071644664},
23886 },
23887 },
23888 },
23889 {
23890 name: "REVB2W",
23891 argLen: 1,
23892 asm: loong64.AREVB2W,
23893 reg: regInfo{
23894 inputs: []inputInfo{
23895 {0, 1073741816},
23896 },
23897 outputs: []outputInfo{
23898 {0, 1071644664},
23899 },
23900 },
23901 },
23902 {
23903 name: "REVBV",
23904 argLen: 1,
23905 asm: loong64.AREVBV,
23906 reg: regInfo{
23907 inputs: []inputInfo{
23908 {0, 1073741816},
23909 },
23910 outputs: []outputInfo{
23911 {0, 1071644664},
23912 },
23913 },
23914 },
23915 {
23916 name: "BITREV4B",
23917 argLen: 1,
23918 asm: loong64.ABITREV4B,
23919 reg: regInfo{
23920 inputs: []inputInfo{
23921 {0, 1073741816},
23922 },
23923 outputs: []outputInfo{
23924 {0, 1071644664},
23925 },
23926 },
23927 },
23928 {
23929 name: "BITREVW",
23930 argLen: 1,
23931 asm: loong64.ABITREVW,
23932 reg: regInfo{
23933 inputs: []inputInfo{
23934 {0, 1073741816},
23935 },
23936 outputs: []outputInfo{
23937 {0, 1071644664},
23938 },
23939 },
23940 },
23941 {
23942 name: "BITREVV",
23943 argLen: 1,
23944 asm: loong64.ABITREVV,
23945 reg: regInfo{
23946 inputs: []inputInfo{
23947 {0, 1073741816},
23948 },
23949 outputs: []outputInfo{
23950 {0, 1071644664},
23951 },
23952 },
23953 },
23954 {
23955 name: "VPCNT64",
23956 argLen: 1,
23957 asm: loong64.AVPCNTV,
23958 reg: regInfo{
23959 inputs: []inputInfo{
23960 {0, 4611686017353646080},
23961 },
23962 outputs: []outputInfo{
23963 {0, 4611686017353646080},
23964 },
23965 },
23966 },
23967 {
23968 name: "VPCNT32",
23969 argLen: 1,
23970 asm: loong64.AVPCNTW,
23971 reg: regInfo{
23972 inputs: []inputInfo{
23973 {0, 4611686017353646080},
23974 },
23975 outputs: []outputInfo{
23976 {0, 4611686017353646080},
23977 },
23978 },
23979 },
23980 {
23981 name: "VPCNT16",
23982 argLen: 1,
23983 asm: loong64.AVPCNTH,
23984 reg: regInfo{
23985 inputs: []inputInfo{
23986 {0, 4611686017353646080},
23987 },
23988 outputs: []outputInfo{
23989 {0, 4611686017353646080},
23990 },
23991 },
23992 },
23993 {
23994 name: "ADDV",
23995 argLen: 2,
23996 commutative: true,
23997 asm: loong64.AADDVU,
23998 reg: regInfo{
23999 inputs: []inputInfo{
24000 {0, 1073741816},
24001 {1, 1073741816},
24002 },
24003 outputs: []outputInfo{
24004 {0, 1071644664},
24005 },
24006 },
24007 },
24008 {
24009 name: "ADDVconst",
24010 auxType: auxInt64,
24011 argLen: 1,
24012 asm: loong64.AADDVU,
24013 reg: regInfo{
24014 inputs: []inputInfo{
24015 {0, 1073741820},
24016 },
24017 outputs: []outputInfo{
24018 {0, 1071644664},
24019 },
24020 },
24021 },
24022 {
24023 name: "SUBV",
24024 argLen: 2,
24025 asm: loong64.ASUBVU,
24026 reg: regInfo{
24027 inputs: []inputInfo{
24028 {0, 1073741816},
24029 {1, 1073741816},
24030 },
24031 outputs: []outputInfo{
24032 {0, 1071644664},
24033 },
24034 },
24035 },
24036 {
24037 name: "SUBVconst",
24038 auxType: auxInt64,
24039 argLen: 1,
24040 asm: loong64.ASUBVU,
24041 reg: regInfo{
24042 inputs: []inputInfo{
24043 {0, 1073741816},
24044 },
24045 outputs: []outputInfo{
24046 {0, 1071644664},
24047 },
24048 },
24049 },
24050 {
24051 name: "MULV",
24052 argLen: 2,
24053 commutative: true,
24054 asm: loong64.AMULV,
24055 reg: regInfo{
24056 inputs: []inputInfo{
24057 {0, 1073741816},
24058 {1, 1073741816},
24059 },
24060 outputs: []outputInfo{
24061 {0, 1071644664},
24062 },
24063 },
24064 },
24065 {
24066 name: "MULHV",
24067 argLen: 2,
24068 commutative: true,
24069 asm: loong64.AMULHV,
24070 reg: regInfo{
24071 inputs: []inputInfo{
24072 {0, 1073741816},
24073 {1, 1073741816},
24074 },
24075 outputs: []outputInfo{
24076 {0, 1071644664},
24077 },
24078 },
24079 },
24080 {
24081 name: "MULHVU",
24082 argLen: 2,
24083 commutative: true,
24084 asm: loong64.AMULHVU,
24085 reg: regInfo{
24086 inputs: []inputInfo{
24087 {0, 1073741816},
24088 {1, 1073741816},
24089 },
24090 outputs: []outputInfo{
24091 {0, 1071644664},
24092 },
24093 },
24094 },
24095 {
24096 name: "DIVV",
24097 argLen: 2,
24098 asm: loong64.ADIVV,
24099 reg: regInfo{
24100 inputs: []inputInfo{
24101 {0, 1073741816},
24102 {1, 1073741816},
24103 },
24104 outputs: []outputInfo{
24105 {0, 1071644664},
24106 },
24107 },
24108 },
24109 {
24110 name: "DIVVU",
24111 argLen: 2,
24112 asm: loong64.ADIVVU,
24113 reg: regInfo{
24114 inputs: []inputInfo{
24115 {0, 1073741816},
24116 {1, 1073741816},
24117 },
24118 outputs: []outputInfo{
24119 {0, 1071644664},
24120 },
24121 },
24122 },
24123 {
24124 name: "REMV",
24125 argLen: 2,
24126 asm: loong64.AREMV,
24127 reg: regInfo{
24128 inputs: []inputInfo{
24129 {0, 1073741816},
24130 {1, 1073741816},
24131 },
24132 outputs: []outputInfo{
24133 {0, 1071644664},
24134 },
24135 },
24136 },
24137 {
24138 name: "REMVU",
24139 argLen: 2,
24140 asm: loong64.AREMVU,
24141 reg: regInfo{
24142 inputs: []inputInfo{
24143 {0, 1073741816},
24144 {1, 1073741816},
24145 },
24146 outputs: []outputInfo{
24147 {0, 1071644664},
24148 },
24149 },
24150 },
24151 {
24152 name: "ADDF",
24153 argLen: 2,
24154 commutative: true,
24155 asm: loong64.AADDF,
24156 reg: regInfo{
24157 inputs: []inputInfo{
24158 {0, 4611686017353646080},
24159 {1, 4611686017353646080},
24160 },
24161 outputs: []outputInfo{
24162 {0, 4611686017353646080},
24163 },
24164 },
24165 },
24166 {
24167 name: "ADDD",
24168 argLen: 2,
24169 commutative: true,
24170 asm: loong64.AADDD,
24171 reg: regInfo{
24172 inputs: []inputInfo{
24173 {0, 4611686017353646080},
24174 {1, 4611686017353646080},
24175 },
24176 outputs: []outputInfo{
24177 {0, 4611686017353646080},
24178 },
24179 },
24180 },
24181 {
24182 name: "SUBF",
24183 argLen: 2,
24184 asm: loong64.ASUBF,
24185 reg: regInfo{
24186 inputs: []inputInfo{
24187 {0, 4611686017353646080},
24188 {1, 4611686017353646080},
24189 },
24190 outputs: []outputInfo{
24191 {0, 4611686017353646080},
24192 },
24193 },
24194 },
24195 {
24196 name: "SUBD",
24197 argLen: 2,
24198 asm: loong64.ASUBD,
24199 reg: regInfo{
24200 inputs: []inputInfo{
24201 {0, 4611686017353646080},
24202 {1, 4611686017353646080},
24203 },
24204 outputs: []outputInfo{
24205 {0, 4611686017353646080},
24206 },
24207 },
24208 },
24209 {
24210 name: "MULF",
24211 argLen: 2,
24212 commutative: true,
24213 asm: loong64.AMULF,
24214 reg: regInfo{
24215 inputs: []inputInfo{
24216 {0, 4611686017353646080},
24217 {1, 4611686017353646080},
24218 },
24219 outputs: []outputInfo{
24220 {0, 4611686017353646080},
24221 },
24222 },
24223 },
24224 {
24225 name: "MULD",
24226 argLen: 2,
24227 commutative: true,
24228 asm: loong64.AMULD,
24229 reg: regInfo{
24230 inputs: []inputInfo{
24231 {0, 4611686017353646080},
24232 {1, 4611686017353646080},
24233 },
24234 outputs: []outputInfo{
24235 {0, 4611686017353646080},
24236 },
24237 },
24238 },
24239 {
24240 name: "DIVF",
24241 argLen: 2,
24242 asm: loong64.ADIVF,
24243 reg: regInfo{
24244 inputs: []inputInfo{
24245 {0, 4611686017353646080},
24246 {1, 4611686017353646080},
24247 },
24248 outputs: []outputInfo{
24249 {0, 4611686017353646080},
24250 },
24251 },
24252 },
24253 {
24254 name: "DIVD",
24255 argLen: 2,
24256 asm: loong64.ADIVD,
24257 reg: regInfo{
24258 inputs: []inputInfo{
24259 {0, 4611686017353646080},
24260 {1, 4611686017353646080},
24261 },
24262 outputs: []outputInfo{
24263 {0, 4611686017353646080},
24264 },
24265 },
24266 },
24267 {
24268 name: "AND",
24269 argLen: 2,
24270 commutative: true,
24271 asm: loong64.AAND,
24272 reg: regInfo{
24273 inputs: []inputInfo{
24274 {0, 1073741816},
24275 {1, 1073741816},
24276 },
24277 outputs: []outputInfo{
24278 {0, 1071644664},
24279 },
24280 },
24281 },
24282 {
24283 name: "ANDconst",
24284 auxType: auxInt64,
24285 argLen: 1,
24286 asm: loong64.AAND,
24287 reg: regInfo{
24288 inputs: []inputInfo{
24289 {0, 1073741816},
24290 },
24291 outputs: []outputInfo{
24292 {0, 1071644664},
24293 },
24294 },
24295 },
24296 {
24297 name: "OR",
24298 argLen: 2,
24299 commutative: true,
24300 asm: loong64.AOR,
24301 reg: regInfo{
24302 inputs: []inputInfo{
24303 {0, 1073741816},
24304 {1, 1073741816},
24305 },
24306 outputs: []outputInfo{
24307 {0, 1071644664},
24308 },
24309 },
24310 },
24311 {
24312 name: "ORconst",
24313 auxType: auxInt64,
24314 argLen: 1,
24315 asm: loong64.AOR,
24316 reg: regInfo{
24317 inputs: []inputInfo{
24318 {0, 1073741816},
24319 },
24320 outputs: []outputInfo{
24321 {0, 1071644664},
24322 },
24323 },
24324 },
24325 {
24326 name: "XOR",
24327 argLen: 2,
24328 commutative: true,
24329 asm: loong64.AXOR,
24330 reg: regInfo{
24331 inputs: []inputInfo{
24332 {0, 1073741816},
24333 {1, 1073741816},
24334 },
24335 outputs: []outputInfo{
24336 {0, 1071644664},
24337 },
24338 },
24339 },
24340 {
24341 name: "XORconst",
24342 auxType: auxInt64,
24343 argLen: 1,
24344 asm: loong64.AXOR,
24345 reg: regInfo{
24346 inputs: []inputInfo{
24347 {0, 1073741816},
24348 },
24349 outputs: []outputInfo{
24350 {0, 1071644664},
24351 },
24352 },
24353 },
24354 {
24355 name: "NOR",
24356 argLen: 2,
24357 commutative: true,
24358 asm: loong64.ANOR,
24359 reg: regInfo{
24360 inputs: []inputInfo{
24361 {0, 1073741816},
24362 {1, 1073741816},
24363 },
24364 outputs: []outputInfo{
24365 {0, 1071644664},
24366 },
24367 },
24368 },
24369 {
24370 name: "NORconst",
24371 auxType: auxInt64,
24372 argLen: 1,
24373 asm: loong64.ANOR,
24374 reg: regInfo{
24375 inputs: []inputInfo{
24376 {0, 1073741816},
24377 },
24378 outputs: []outputInfo{
24379 {0, 1071644664},
24380 },
24381 },
24382 },
24383 {
24384 name: "ANDN",
24385 argLen: 2,
24386 asm: loong64.AANDN,
24387 reg: regInfo{
24388 inputs: []inputInfo{
24389 {0, 1073741816},
24390 {1, 1073741816},
24391 },
24392 outputs: []outputInfo{
24393 {0, 1071644664},
24394 },
24395 },
24396 },
24397 {
24398 name: "ORN",
24399 argLen: 2,
24400 asm: loong64.AORN,
24401 reg: regInfo{
24402 inputs: []inputInfo{
24403 {0, 1073741816},
24404 {1, 1073741816},
24405 },
24406 outputs: []outputInfo{
24407 {0, 1071644664},
24408 },
24409 },
24410 },
24411 {
24412 name: "FMADDF",
24413 argLen: 3,
24414 commutative: true,
24415 asm: loong64.AFMADDF,
24416 reg: regInfo{
24417 inputs: []inputInfo{
24418 {0, 4611686017353646080},
24419 {1, 4611686017353646080},
24420 {2, 4611686017353646080},
24421 },
24422 outputs: []outputInfo{
24423 {0, 4611686017353646080},
24424 },
24425 },
24426 },
24427 {
24428 name: "FMADDD",
24429 argLen: 3,
24430 commutative: true,
24431 asm: loong64.AFMADDD,
24432 reg: regInfo{
24433 inputs: []inputInfo{
24434 {0, 4611686017353646080},
24435 {1, 4611686017353646080},
24436 {2, 4611686017353646080},
24437 },
24438 outputs: []outputInfo{
24439 {0, 4611686017353646080},
24440 },
24441 },
24442 },
24443 {
24444 name: "FMSUBF",
24445 argLen: 3,
24446 commutative: true,
24447 asm: loong64.AFMSUBF,
24448 reg: regInfo{
24449 inputs: []inputInfo{
24450 {0, 4611686017353646080},
24451 {1, 4611686017353646080},
24452 {2, 4611686017353646080},
24453 },
24454 outputs: []outputInfo{
24455 {0, 4611686017353646080},
24456 },
24457 },
24458 },
24459 {
24460 name: "FMSUBD",
24461 argLen: 3,
24462 commutative: true,
24463 asm: loong64.AFMSUBD,
24464 reg: regInfo{
24465 inputs: []inputInfo{
24466 {0, 4611686017353646080},
24467 {1, 4611686017353646080},
24468 {2, 4611686017353646080},
24469 },
24470 outputs: []outputInfo{
24471 {0, 4611686017353646080},
24472 },
24473 },
24474 },
24475 {
24476 name: "FNMADDF",
24477 argLen: 3,
24478 commutative: true,
24479 asm: loong64.AFNMADDF,
24480 reg: regInfo{
24481 inputs: []inputInfo{
24482 {0, 4611686017353646080},
24483 {1, 4611686017353646080},
24484 {2, 4611686017353646080},
24485 },
24486 outputs: []outputInfo{
24487 {0, 4611686017353646080},
24488 },
24489 },
24490 },
24491 {
24492 name: "FNMADDD",
24493 argLen: 3,
24494 commutative: true,
24495 asm: loong64.AFNMADDD,
24496 reg: regInfo{
24497 inputs: []inputInfo{
24498 {0, 4611686017353646080},
24499 {1, 4611686017353646080},
24500 {2, 4611686017353646080},
24501 },
24502 outputs: []outputInfo{
24503 {0, 4611686017353646080},
24504 },
24505 },
24506 },
24507 {
24508 name: "FNMSUBF",
24509 argLen: 3,
24510 commutative: true,
24511 asm: loong64.AFNMSUBF,
24512 reg: regInfo{
24513 inputs: []inputInfo{
24514 {0, 4611686017353646080},
24515 {1, 4611686017353646080},
24516 {2, 4611686017353646080},
24517 },
24518 outputs: []outputInfo{
24519 {0, 4611686017353646080},
24520 },
24521 },
24522 },
24523 {
24524 name: "FNMSUBD",
24525 argLen: 3,
24526 commutative: true,
24527 asm: loong64.AFNMSUBD,
24528 reg: regInfo{
24529 inputs: []inputInfo{
24530 {0, 4611686017353646080},
24531 {1, 4611686017353646080},
24532 {2, 4611686017353646080},
24533 },
24534 outputs: []outputInfo{
24535 {0, 4611686017353646080},
24536 },
24537 },
24538 },
24539 {
24540 name: "FMINF",
24541 argLen: 2,
24542 commutative: true,
24543 resultNotInArgs: true,
24544 asm: loong64.AFMINF,
24545 reg: regInfo{
24546 inputs: []inputInfo{
24547 {0, 4611686017353646080},
24548 {1, 4611686017353646080},
24549 },
24550 outputs: []outputInfo{
24551 {0, 4611686017353646080},
24552 },
24553 },
24554 },
24555 {
24556 name: "FMIND",
24557 argLen: 2,
24558 commutative: true,
24559 resultNotInArgs: true,
24560 asm: loong64.AFMIND,
24561 reg: regInfo{
24562 inputs: []inputInfo{
24563 {0, 4611686017353646080},
24564 {1, 4611686017353646080},
24565 },
24566 outputs: []outputInfo{
24567 {0, 4611686017353646080},
24568 },
24569 },
24570 },
24571 {
24572 name: "FMAXF",
24573 argLen: 2,
24574 commutative: true,
24575 resultNotInArgs: true,
24576 asm: loong64.AFMAXF,
24577 reg: regInfo{
24578 inputs: []inputInfo{
24579 {0, 4611686017353646080},
24580 {1, 4611686017353646080},
24581 },
24582 outputs: []outputInfo{
24583 {0, 4611686017353646080},
24584 },
24585 },
24586 },
24587 {
24588 name: "FMAXD",
24589 argLen: 2,
24590 commutative: true,
24591 resultNotInArgs: true,
24592 asm: loong64.AFMAXD,
24593 reg: regInfo{
24594 inputs: []inputInfo{
24595 {0, 4611686017353646080},
24596 {1, 4611686017353646080},
24597 },
24598 outputs: []outputInfo{
24599 {0, 4611686017353646080},
24600 },
24601 },
24602 },
24603 {
24604 name: "MASKEQZ",
24605 argLen: 2,
24606 asm: loong64.AMASKEQZ,
24607 reg: regInfo{
24608 inputs: []inputInfo{
24609 {0, 1073741816},
24610 {1, 1073741816},
24611 },
24612 outputs: []outputInfo{
24613 {0, 1071644664},
24614 },
24615 },
24616 },
24617 {
24618 name: "MASKNEZ",
24619 argLen: 2,
24620 asm: loong64.AMASKNEZ,
24621 reg: regInfo{
24622 inputs: []inputInfo{
24623 {0, 1073741816},
24624 {1, 1073741816},
24625 },
24626 outputs: []outputInfo{
24627 {0, 1071644664},
24628 },
24629 },
24630 },
24631 {
24632 name: "FCOPYSGD",
24633 argLen: 2,
24634 asm: loong64.AFCOPYSGD,
24635 reg: regInfo{
24636 inputs: []inputInfo{
24637 {0, 4611686017353646080},
24638 {1, 4611686017353646080},
24639 },
24640 outputs: []outputInfo{
24641 {0, 4611686017353646080},
24642 },
24643 },
24644 },
24645 {
24646 name: "SLL",
24647 argLen: 2,
24648 asm: loong64.ASLL,
24649 reg: regInfo{
24650 inputs: []inputInfo{
24651 {0, 1073741816},
24652 {1, 1073741816},
24653 },
24654 outputs: []outputInfo{
24655 {0, 1071644664},
24656 },
24657 },
24658 },
24659 {
24660 name: "SLLV",
24661 argLen: 2,
24662 asm: loong64.ASLLV,
24663 reg: regInfo{
24664 inputs: []inputInfo{
24665 {0, 1073741816},
24666 {1, 1073741816},
24667 },
24668 outputs: []outputInfo{
24669 {0, 1071644664},
24670 },
24671 },
24672 },
24673 {
24674 name: "SLLconst",
24675 auxType: auxInt64,
24676 argLen: 1,
24677 asm: loong64.ASLL,
24678 reg: regInfo{
24679 inputs: []inputInfo{
24680 {0, 1073741816},
24681 },
24682 outputs: []outputInfo{
24683 {0, 1071644664},
24684 },
24685 },
24686 },
24687 {
24688 name: "SLLVconst",
24689 auxType: auxInt64,
24690 argLen: 1,
24691 asm: loong64.ASLLV,
24692 reg: regInfo{
24693 inputs: []inputInfo{
24694 {0, 1073741816},
24695 },
24696 outputs: []outputInfo{
24697 {0, 1071644664},
24698 },
24699 },
24700 },
24701 {
24702 name: "SRL",
24703 argLen: 2,
24704 asm: loong64.ASRL,
24705 reg: regInfo{
24706 inputs: []inputInfo{
24707 {0, 1073741816},
24708 {1, 1073741816},
24709 },
24710 outputs: []outputInfo{
24711 {0, 1071644664},
24712 },
24713 },
24714 },
24715 {
24716 name: "SRLV",
24717 argLen: 2,
24718 asm: loong64.ASRLV,
24719 reg: regInfo{
24720 inputs: []inputInfo{
24721 {0, 1073741816},
24722 {1, 1073741816},
24723 },
24724 outputs: []outputInfo{
24725 {0, 1071644664},
24726 },
24727 },
24728 },
24729 {
24730 name: "SRLconst",
24731 auxType: auxInt64,
24732 argLen: 1,
24733 asm: loong64.ASRL,
24734 reg: regInfo{
24735 inputs: []inputInfo{
24736 {0, 1073741816},
24737 },
24738 outputs: []outputInfo{
24739 {0, 1071644664},
24740 },
24741 },
24742 },
24743 {
24744 name: "SRLVconst",
24745 auxType: auxInt64,
24746 argLen: 1,
24747 asm: loong64.ASRLV,
24748 reg: regInfo{
24749 inputs: []inputInfo{
24750 {0, 1073741816},
24751 },
24752 outputs: []outputInfo{
24753 {0, 1071644664},
24754 },
24755 },
24756 },
24757 {
24758 name: "SRA",
24759 argLen: 2,
24760 asm: loong64.ASRA,
24761 reg: regInfo{
24762 inputs: []inputInfo{
24763 {0, 1073741816},
24764 {1, 1073741816},
24765 },
24766 outputs: []outputInfo{
24767 {0, 1071644664},
24768 },
24769 },
24770 },
24771 {
24772 name: "SRAV",
24773 argLen: 2,
24774 asm: loong64.ASRAV,
24775 reg: regInfo{
24776 inputs: []inputInfo{
24777 {0, 1073741816},
24778 {1, 1073741816},
24779 },
24780 outputs: []outputInfo{
24781 {0, 1071644664},
24782 },
24783 },
24784 },
24785 {
24786 name: "SRAconst",
24787 auxType: auxInt64,
24788 argLen: 1,
24789 asm: loong64.ASRA,
24790 reg: regInfo{
24791 inputs: []inputInfo{
24792 {0, 1073741816},
24793 },
24794 outputs: []outputInfo{
24795 {0, 1071644664},
24796 },
24797 },
24798 },
24799 {
24800 name: "SRAVconst",
24801 auxType: auxInt64,
24802 argLen: 1,
24803 asm: loong64.ASRAV,
24804 reg: regInfo{
24805 inputs: []inputInfo{
24806 {0, 1073741816},
24807 },
24808 outputs: []outputInfo{
24809 {0, 1071644664},
24810 },
24811 },
24812 },
24813 {
24814 name: "ROTR",
24815 argLen: 2,
24816 asm: loong64.AROTR,
24817 reg: regInfo{
24818 inputs: []inputInfo{
24819 {0, 1073741816},
24820 {1, 1073741816},
24821 },
24822 outputs: []outputInfo{
24823 {0, 1071644664},
24824 },
24825 },
24826 },
24827 {
24828 name: "ROTRV",
24829 argLen: 2,
24830 asm: loong64.AROTRV,
24831 reg: regInfo{
24832 inputs: []inputInfo{
24833 {0, 1073741816},
24834 {1, 1073741816},
24835 },
24836 outputs: []outputInfo{
24837 {0, 1071644664},
24838 },
24839 },
24840 },
24841 {
24842 name: "ROTRconst",
24843 auxType: auxInt64,
24844 argLen: 1,
24845 asm: loong64.AROTR,
24846 reg: regInfo{
24847 inputs: []inputInfo{
24848 {0, 1073741816},
24849 },
24850 outputs: []outputInfo{
24851 {0, 1071644664},
24852 },
24853 },
24854 },
24855 {
24856 name: "ROTRVconst",
24857 auxType: auxInt64,
24858 argLen: 1,
24859 asm: loong64.AROTRV,
24860 reg: regInfo{
24861 inputs: []inputInfo{
24862 {0, 1073741816},
24863 },
24864 outputs: []outputInfo{
24865 {0, 1071644664},
24866 },
24867 },
24868 },
24869 {
24870 name: "SGT",
24871 argLen: 2,
24872 asm: loong64.ASGT,
24873 reg: regInfo{
24874 inputs: []inputInfo{
24875 {0, 1073741816},
24876 {1, 1073741816},
24877 },
24878 outputs: []outputInfo{
24879 {0, 1071644664},
24880 },
24881 },
24882 },
24883 {
24884 name: "SGTconst",
24885 auxType: auxInt64,
24886 argLen: 1,
24887 asm: loong64.ASGT,
24888 reg: regInfo{
24889 inputs: []inputInfo{
24890 {0, 1073741816},
24891 },
24892 outputs: []outputInfo{
24893 {0, 1071644664},
24894 },
24895 },
24896 },
24897 {
24898 name: "SGTU",
24899 argLen: 2,
24900 asm: loong64.ASGTU,
24901 reg: regInfo{
24902 inputs: []inputInfo{
24903 {0, 1073741816},
24904 {1, 1073741816},
24905 },
24906 outputs: []outputInfo{
24907 {0, 1071644664},
24908 },
24909 },
24910 },
24911 {
24912 name: "SGTUconst",
24913 auxType: auxInt64,
24914 argLen: 1,
24915 asm: loong64.ASGTU,
24916 reg: regInfo{
24917 inputs: []inputInfo{
24918 {0, 1073741816},
24919 },
24920 outputs: []outputInfo{
24921 {0, 1071644664},
24922 },
24923 },
24924 },
24925 {
24926 name: "CMPEQF",
24927 argLen: 2,
24928 asm: loong64.ACMPEQF,
24929 reg: regInfo{
24930 inputs: []inputInfo{
24931 {0, 4611686017353646080},
24932 {1, 4611686017353646080},
24933 },
24934 },
24935 },
24936 {
24937 name: "CMPEQD",
24938 argLen: 2,
24939 asm: loong64.ACMPEQD,
24940 reg: regInfo{
24941 inputs: []inputInfo{
24942 {0, 4611686017353646080},
24943 {1, 4611686017353646080},
24944 },
24945 },
24946 },
24947 {
24948 name: "CMPGEF",
24949 argLen: 2,
24950 asm: loong64.ACMPGEF,
24951 reg: regInfo{
24952 inputs: []inputInfo{
24953 {0, 4611686017353646080},
24954 {1, 4611686017353646080},
24955 },
24956 },
24957 },
24958 {
24959 name: "CMPGED",
24960 argLen: 2,
24961 asm: loong64.ACMPGED,
24962 reg: regInfo{
24963 inputs: []inputInfo{
24964 {0, 4611686017353646080},
24965 {1, 4611686017353646080},
24966 },
24967 },
24968 },
24969 {
24970 name: "CMPGTF",
24971 argLen: 2,
24972 asm: loong64.ACMPGTF,
24973 reg: regInfo{
24974 inputs: []inputInfo{
24975 {0, 4611686017353646080},
24976 {1, 4611686017353646080},
24977 },
24978 },
24979 },
24980 {
24981 name: "CMPGTD",
24982 argLen: 2,
24983 asm: loong64.ACMPGTD,
24984 reg: regInfo{
24985 inputs: []inputInfo{
24986 {0, 4611686017353646080},
24987 {1, 4611686017353646080},
24988 },
24989 },
24990 },
24991 {
24992 name: "BSTRPICKW",
24993 auxType: auxInt64,
24994 argLen: 1,
24995 asm: loong64.ABSTRPICKW,
24996 reg: regInfo{
24997 inputs: []inputInfo{
24998 {0, 1073741816},
24999 },
25000 outputs: []outputInfo{
25001 {0, 1071644664},
25002 },
25003 },
25004 },
25005 {
25006 name: "BSTRPICKV",
25007 auxType: auxInt64,
25008 argLen: 1,
25009 asm: loong64.ABSTRPICKV,
25010 reg: regInfo{
25011 inputs: []inputInfo{
25012 {0, 1073741816},
25013 },
25014 outputs: []outputInfo{
25015 {0, 1071644664},
25016 },
25017 },
25018 },
25019 {
25020 name: "MOVVconst",
25021 auxType: auxInt64,
25022 argLen: 0,
25023 rematerializeable: true,
25024 asm: loong64.AMOVV,
25025 reg: regInfo{
25026 outputs: []outputInfo{
25027 {0, 1071644664},
25028 },
25029 },
25030 },
25031 {
25032 name: "MOVFconst",
25033 auxType: auxFloat64,
25034 argLen: 0,
25035 rematerializeable: true,
25036 asm: loong64.AMOVF,
25037 reg: regInfo{
25038 outputs: []outputInfo{
25039 {0, 4611686017353646080},
25040 },
25041 },
25042 },
25043 {
25044 name: "MOVDconst",
25045 auxType: auxFloat64,
25046 argLen: 0,
25047 rematerializeable: true,
25048 asm: loong64.AMOVD,
25049 reg: regInfo{
25050 outputs: []outputInfo{
25051 {0, 4611686017353646080},
25052 },
25053 },
25054 },
25055 {
25056 name: "MOVVaddr",
25057 auxType: auxSymOff,
25058 argLen: 1,
25059 rematerializeable: true,
25060 symEffect: SymAddr,
25061 asm: loong64.AMOVV,
25062 reg: regInfo{
25063 inputs: []inputInfo{
25064 {0, 4611686018427387908},
25065 },
25066 outputs: []outputInfo{
25067 {0, 1071644664},
25068 },
25069 },
25070 },
25071 {
25072 name: "MOVBload",
25073 auxType: auxSymOff,
25074 argLen: 2,
25075 faultOnNilArg0: true,
25076 symEffect: SymRead,
25077 asm: loong64.AMOVB,
25078 reg: regInfo{
25079 inputs: []inputInfo{
25080 {0, 4611686019501129724},
25081 },
25082 outputs: []outputInfo{
25083 {0, 1071644664},
25084 },
25085 },
25086 },
25087 {
25088 name: "MOVBUload",
25089 auxType: auxSymOff,
25090 argLen: 2,
25091 faultOnNilArg0: true,
25092 symEffect: SymRead,
25093 asm: loong64.AMOVBU,
25094 reg: regInfo{
25095 inputs: []inputInfo{
25096 {0, 4611686019501129724},
25097 },
25098 outputs: []outputInfo{
25099 {0, 1071644664},
25100 },
25101 },
25102 },
25103 {
25104 name: "MOVHload",
25105 auxType: auxSymOff,
25106 argLen: 2,
25107 faultOnNilArg0: true,
25108 symEffect: SymRead,
25109 asm: loong64.AMOVH,
25110 reg: regInfo{
25111 inputs: []inputInfo{
25112 {0, 4611686019501129724},
25113 },
25114 outputs: []outputInfo{
25115 {0, 1071644664},
25116 },
25117 },
25118 },
25119 {
25120 name: "MOVHUload",
25121 auxType: auxSymOff,
25122 argLen: 2,
25123 faultOnNilArg0: true,
25124 symEffect: SymRead,
25125 asm: loong64.AMOVHU,
25126 reg: regInfo{
25127 inputs: []inputInfo{
25128 {0, 4611686019501129724},
25129 },
25130 outputs: []outputInfo{
25131 {0, 1071644664},
25132 },
25133 },
25134 },
25135 {
25136 name: "MOVWload",
25137 auxType: auxSymOff,
25138 argLen: 2,
25139 faultOnNilArg0: true,
25140 symEffect: SymRead,
25141 asm: loong64.AMOVW,
25142 reg: regInfo{
25143 inputs: []inputInfo{
25144 {0, 4611686019501129724},
25145 },
25146 outputs: []outputInfo{
25147 {0, 1071644664},
25148 },
25149 },
25150 },
25151 {
25152 name: "MOVWUload",
25153 auxType: auxSymOff,
25154 argLen: 2,
25155 faultOnNilArg0: true,
25156 symEffect: SymRead,
25157 asm: loong64.AMOVWU,
25158 reg: regInfo{
25159 inputs: []inputInfo{
25160 {0, 4611686019501129724},
25161 },
25162 outputs: []outputInfo{
25163 {0, 1071644664},
25164 },
25165 },
25166 },
25167 {
25168 name: "MOVVload",
25169 auxType: auxSymOff,
25170 argLen: 2,
25171 faultOnNilArg0: true,
25172 symEffect: SymRead,
25173 asm: loong64.AMOVV,
25174 reg: regInfo{
25175 inputs: []inputInfo{
25176 {0, 4611686019501129724},
25177 },
25178 outputs: []outputInfo{
25179 {0, 1071644664},
25180 },
25181 },
25182 },
25183 {
25184 name: "MOVFload",
25185 auxType: auxSymOff,
25186 argLen: 2,
25187 faultOnNilArg0: true,
25188 symEffect: SymRead,
25189 asm: loong64.AMOVF,
25190 reg: regInfo{
25191 inputs: []inputInfo{
25192 {0, 4611686019501129724},
25193 },
25194 outputs: []outputInfo{
25195 {0, 4611686017353646080},
25196 },
25197 },
25198 },
25199 {
25200 name: "MOVDload",
25201 auxType: auxSymOff,
25202 argLen: 2,
25203 faultOnNilArg0: true,
25204 symEffect: SymRead,
25205 asm: loong64.AMOVD,
25206 reg: regInfo{
25207 inputs: []inputInfo{
25208 {0, 4611686019501129724},
25209 },
25210 outputs: []outputInfo{
25211 {0, 4611686017353646080},
25212 },
25213 },
25214 },
25215 {
25216 name: "MOVVloadidx",
25217 argLen: 3,
25218 asm: loong64.AMOVV,
25219 reg: regInfo{
25220 inputs: []inputInfo{
25221 {1, 1073741816},
25222 {0, 4611686019501129724},
25223 },
25224 outputs: []outputInfo{
25225 {0, 1071644664},
25226 },
25227 },
25228 },
25229 {
25230 name: "MOVWloadidx",
25231 argLen: 3,
25232 asm: loong64.AMOVW,
25233 reg: regInfo{
25234 inputs: []inputInfo{
25235 {1, 1073741816},
25236 {0, 4611686019501129724},
25237 },
25238 outputs: []outputInfo{
25239 {0, 1071644664},
25240 },
25241 },
25242 },
25243 {
25244 name: "MOVWUloadidx",
25245 argLen: 3,
25246 asm: loong64.AMOVWU,
25247 reg: regInfo{
25248 inputs: []inputInfo{
25249 {1, 1073741816},
25250 {0, 4611686019501129724},
25251 },
25252 outputs: []outputInfo{
25253 {0, 1071644664},
25254 },
25255 },
25256 },
25257 {
25258 name: "MOVHloadidx",
25259 argLen: 3,
25260 asm: loong64.AMOVH,
25261 reg: regInfo{
25262 inputs: []inputInfo{
25263 {1, 1073741816},
25264 {0, 4611686019501129724},
25265 },
25266 outputs: []outputInfo{
25267 {0, 1071644664},
25268 },
25269 },
25270 },
25271 {
25272 name: "MOVHUloadidx",
25273 argLen: 3,
25274 asm: loong64.AMOVHU,
25275 reg: regInfo{
25276 inputs: []inputInfo{
25277 {1, 1073741816},
25278 {0, 4611686019501129724},
25279 },
25280 outputs: []outputInfo{
25281 {0, 1071644664},
25282 },
25283 },
25284 },
25285 {
25286 name: "MOVBloadidx",
25287 argLen: 3,
25288 asm: loong64.AMOVB,
25289 reg: regInfo{
25290 inputs: []inputInfo{
25291 {1, 1073741816},
25292 {0, 4611686019501129724},
25293 },
25294 outputs: []outputInfo{
25295 {0, 1071644664},
25296 },
25297 },
25298 },
25299 {
25300 name: "MOVBUloadidx",
25301 argLen: 3,
25302 asm: loong64.AMOVBU,
25303 reg: regInfo{
25304 inputs: []inputInfo{
25305 {1, 1073741816},
25306 {0, 4611686019501129724},
25307 },
25308 outputs: []outputInfo{
25309 {0, 1071644664},
25310 },
25311 },
25312 },
25313 {
25314 name: "MOVFloadidx",
25315 argLen: 3,
25316 asm: loong64.AMOVF,
25317 reg: regInfo{
25318 inputs: []inputInfo{
25319 {1, 1073741816},
25320 {0, 4611686019501129724},
25321 },
25322 outputs: []outputInfo{
25323 {0, 4611686017353646080},
25324 },
25325 },
25326 },
25327 {
25328 name: "MOVDloadidx",
25329 argLen: 3,
25330 asm: loong64.AMOVD,
25331 reg: regInfo{
25332 inputs: []inputInfo{
25333 {1, 1073741816},
25334 {0, 4611686019501129724},
25335 },
25336 outputs: []outputInfo{
25337 {0, 4611686017353646080},
25338 },
25339 },
25340 },
25341 {
25342 name: "MOVBstore",
25343 auxType: auxSymOff,
25344 argLen: 3,
25345 faultOnNilArg0: true,
25346 symEffect: SymWrite,
25347 asm: loong64.AMOVB,
25348 reg: regInfo{
25349 inputs: []inputInfo{
25350 {1, 1073741816},
25351 {0, 4611686019501129724},
25352 },
25353 },
25354 },
25355 {
25356 name: "MOVHstore",
25357 auxType: auxSymOff,
25358 argLen: 3,
25359 faultOnNilArg0: true,
25360 symEffect: SymWrite,
25361 asm: loong64.AMOVH,
25362 reg: regInfo{
25363 inputs: []inputInfo{
25364 {1, 1073741816},
25365 {0, 4611686019501129724},
25366 },
25367 },
25368 },
25369 {
25370 name: "MOVWstore",
25371 auxType: auxSymOff,
25372 argLen: 3,
25373 faultOnNilArg0: true,
25374 symEffect: SymWrite,
25375 asm: loong64.AMOVW,
25376 reg: regInfo{
25377 inputs: []inputInfo{
25378 {1, 1073741816},
25379 {0, 4611686019501129724},
25380 },
25381 },
25382 },
25383 {
25384 name: "MOVVstore",
25385 auxType: auxSymOff,
25386 argLen: 3,
25387 faultOnNilArg0: true,
25388 symEffect: SymWrite,
25389 asm: loong64.AMOVV,
25390 reg: regInfo{
25391 inputs: []inputInfo{
25392 {1, 1073741816},
25393 {0, 4611686019501129724},
25394 },
25395 },
25396 },
25397 {
25398 name: "MOVFstore",
25399 auxType: auxSymOff,
25400 argLen: 3,
25401 faultOnNilArg0: true,
25402 symEffect: SymWrite,
25403 asm: loong64.AMOVF,
25404 reg: regInfo{
25405 inputs: []inputInfo{
25406 {0, 4611686019501129724},
25407 {1, 4611686017353646080},
25408 },
25409 },
25410 },
25411 {
25412 name: "MOVDstore",
25413 auxType: auxSymOff,
25414 argLen: 3,
25415 faultOnNilArg0: true,
25416 symEffect: SymWrite,
25417 asm: loong64.AMOVD,
25418 reg: regInfo{
25419 inputs: []inputInfo{
25420 {0, 4611686019501129724},
25421 {1, 4611686017353646080},
25422 },
25423 },
25424 },
25425 {
25426 name: "MOVBstoreidx",
25427 argLen: 4,
25428 asm: loong64.AMOVB,
25429 reg: regInfo{
25430 inputs: []inputInfo{
25431 {1, 1073741816},
25432 {2, 1073741816},
25433 {0, 4611686019501129724},
25434 },
25435 },
25436 },
25437 {
25438 name: "MOVHstoreidx",
25439 argLen: 4,
25440 asm: loong64.AMOVH,
25441 reg: regInfo{
25442 inputs: []inputInfo{
25443 {1, 1073741816},
25444 {2, 1073741816},
25445 {0, 4611686019501129724},
25446 },
25447 },
25448 },
25449 {
25450 name: "MOVWstoreidx",
25451 argLen: 4,
25452 asm: loong64.AMOVW,
25453 reg: regInfo{
25454 inputs: []inputInfo{
25455 {1, 1073741816},
25456 {2, 1073741816},
25457 {0, 4611686019501129724},
25458 },
25459 },
25460 },
25461 {
25462 name: "MOVVstoreidx",
25463 argLen: 4,
25464 asm: loong64.AMOVV,
25465 reg: regInfo{
25466 inputs: []inputInfo{
25467 {1, 1073741816},
25468 {2, 1073741816},
25469 {0, 4611686019501129724},
25470 },
25471 },
25472 },
25473 {
25474 name: "MOVFstoreidx",
25475 argLen: 4,
25476 asm: loong64.AMOVF,
25477 reg: regInfo{
25478 inputs: []inputInfo{
25479 {1, 1073741816},
25480 {0, 4611686019501129724},
25481 {2, 4611686017353646080},
25482 },
25483 },
25484 },
25485 {
25486 name: "MOVDstoreidx",
25487 argLen: 4,
25488 asm: loong64.AMOVD,
25489 reg: regInfo{
25490 inputs: []inputInfo{
25491 {1, 1073741816},
25492 {0, 4611686019501129724},
25493 {2, 4611686017353646080},
25494 },
25495 },
25496 },
25497 {
25498 name: "MOVBstorezero",
25499 auxType: auxSymOff,
25500 argLen: 2,
25501 faultOnNilArg0: true,
25502 symEffect: SymWrite,
25503 asm: loong64.AMOVB,
25504 reg: regInfo{
25505 inputs: []inputInfo{
25506 {0, 4611686019501129724},
25507 },
25508 },
25509 },
25510 {
25511 name: "MOVHstorezero",
25512 auxType: auxSymOff,
25513 argLen: 2,
25514 faultOnNilArg0: true,
25515 symEffect: SymWrite,
25516 asm: loong64.AMOVH,
25517 reg: regInfo{
25518 inputs: []inputInfo{
25519 {0, 4611686019501129724},
25520 },
25521 },
25522 },
25523 {
25524 name: "MOVWstorezero",
25525 auxType: auxSymOff,
25526 argLen: 2,
25527 faultOnNilArg0: true,
25528 symEffect: SymWrite,
25529 asm: loong64.AMOVW,
25530 reg: regInfo{
25531 inputs: []inputInfo{
25532 {0, 4611686019501129724},
25533 },
25534 },
25535 },
25536 {
25537 name: "MOVVstorezero",
25538 auxType: auxSymOff,
25539 argLen: 2,
25540 faultOnNilArg0: true,
25541 symEffect: SymWrite,
25542 asm: loong64.AMOVV,
25543 reg: regInfo{
25544 inputs: []inputInfo{
25545 {0, 4611686019501129724},
25546 },
25547 },
25548 },
25549 {
25550 name: "MOVBstorezeroidx",
25551 argLen: 3,
25552 asm: loong64.AMOVB,
25553 reg: regInfo{
25554 inputs: []inputInfo{
25555 {1, 1073741816},
25556 {0, 4611686019501129724},
25557 },
25558 },
25559 },
25560 {
25561 name: "MOVHstorezeroidx",
25562 argLen: 3,
25563 asm: loong64.AMOVH,
25564 reg: regInfo{
25565 inputs: []inputInfo{
25566 {1, 1073741816},
25567 {0, 4611686019501129724},
25568 },
25569 },
25570 },
25571 {
25572 name: "MOVWstorezeroidx",
25573 argLen: 3,
25574 asm: loong64.AMOVW,
25575 reg: regInfo{
25576 inputs: []inputInfo{
25577 {1, 1073741816},
25578 {0, 4611686019501129724},
25579 },
25580 },
25581 },
25582 {
25583 name: "MOVVstorezeroidx",
25584 argLen: 3,
25585 asm: loong64.AMOVV,
25586 reg: regInfo{
25587 inputs: []inputInfo{
25588 {1, 1073741816},
25589 {0, 4611686019501129724},
25590 },
25591 },
25592 },
25593 {
25594 name: "MOVWfpgp",
25595 argLen: 1,
25596 asm: loong64.AMOVW,
25597 reg: regInfo{
25598 inputs: []inputInfo{
25599 {0, 4611686017353646080},
25600 },
25601 outputs: []outputInfo{
25602 {0, 1071644664},
25603 },
25604 },
25605 },
25606 {
25607 name: "MOVWgpfp",
25608 argLen: 1,
25609 asm: loong64.AMOVW,
25610 reg: regInfo{
25611 inputs: []inputInfo{
25612 {0, 1071644664},
25613 },
25614 outputs: []outputInfo{
25615 {0, 4611686017353646080},
25616 },
25617 },
25618 },
25619 {
25620 name: "MOVVfpgp",
25621 argLen: 1,
25622 asm: loong64.AMOVV,
25623 reg: regInfo{
25624 inputs: []inputInfo{
25625 {0, 4611686017353646080},
25626 },
25627 outputs: []outputInfo{
25628 {0, 1071644664},
25629 },
25630 },
25631 },
25632 {
25633 name: "MOVVgpfp",
25634 argLen: 1,
25635 asm: loong64.AMOVV,
25636 reg: regInfo{
25637 inputs: []inputInfo{
25638 {0, 1071644664},
25639 },
25640 outputs: []outputInfo{
25641 {0, 4611686017353646080},
25642 },
25643 },
25644 },
25645 {
25646 name: "MOVBreg",
25647 argLen: 1,
25648 asm: loong64.AMOVB,
25649 reg: regInfo{
25650 inputs: []inputInfo{
25651 {0, 1073741816},
25652 },
25653 outputs: []outputInfo{
25654 {0, 1071644664},
25655 },
25656 },
25657 },
25658 {
25659 name: "MOVBUreg",
25660 argLen: 1,
25661 asm: loong64.AMOVBU,
25662 reg: regInfo{
25663 inputs: []inputInfo{
25664 {0, 1073741816},
25665 },
25666 outputs: []outputInfo{
25667 {0, 1071644664},
25668 },
25669 },
25670 },
25671 {
25672 name: "MOVHreg",
25673 argLen: 1,
25674 asm: loong64.AMOVH,
25675 reg: regInfo{
25676 inputs: []inputInfo{
25677 {0, 1073741816},
25678 },
25679 outputs: []outputInfo{
25680 {0, 1071644664},
25681 },
25682 },
25683 },
25684 {
25685 name: "MOVHUreg",
25686 argLen: 1,
25687 asm: loong64.AMOVHU,
25688 reg: regInfo{
25689 inputs: []inputInfo{
25690 {0, 1073741816},
25691 },
25692 outputs: []outputInfo{
25693 {0, 1071644664},
25694 },
25695 },
25696 },
25697 {
25698 name: "MOVWreg",
25699 argLen: 1,
25700 asm: loong64.AMOVW,
25701 reg: regInfo{
25702 inputs: []inputInfo{
25703 {0, 1073741816},
25704 },
25705 outputs: []outputInfo{
25706 {0, 1071644664},
25707 },
25708 },
25709 },
25710 {
25711 name: "MOVWUreg",
25712 argLen: 1,
25713 asm: loong64.AMOVWU,
25714 reg: regInfo{
25715 inputs: []inputInfo{
25716 {0, 1073741816},
25717 },
25718 outputs: []outputInfo{
25719 {0, 1071644664},
25720 },
25721 },
25722 },
25723 {
25724 name: "MOVVreg",
25725 argLen: 1,
25726 asm: loong64.AMOVV,
25727 reg: regInfo{
25728 inputs: []inputInfo{
25729 {0, 1073741816},
25730 },
25731 outputs: []outputInfo{
25732 {0, 1071644664},
25733 },
25734 },
25735 },
25736 {
25737 name: "MOVVnop",
25738 argLen: 1,
25739 resultInArg0: true,
25740 reg: regInfo{
25741 inputs: []inputInfo{
25742 {0, 1071644664},
25743 },
25744 outputs: []outputInfo{
25745 {0, 1071644664},
25746 },
25747 },
25748 },
25749 {
25750 name: "MOVWF",
25751 argLen: 1,
25752 asm: loong64.AMOVWF,
25753 reg: regInfo{
25754 inputs: []inputInfo{
25755 {0, 4611686017353646080},
25756 },
25757 outputs: []outputInfo{
25758 {0, 4611686017353646080},
25759 },
25760 },
25761 },
25762 {
25763 name: "MOVWD",
25764 argLen: 1,
25765 asm: loong64.AMOVWD,
25766 reg: regInfo{
25767 inputs: []inputInfo{
25768 {0, 4611686017353646080},
25769 },
25770 outputs: []outputInfo{
25771 {0, 4611686017353646080},
25772 },
25773 },
25774 },
25775 {
25776 name: "MOVVF",
25777 argLen: 1,
25778 asm: loong64.AMOVVF,
25779 reg: regInfo{
25780 inputs: []inputInfo{
25781 {0, 4611686017353646080},
25782 },
25783 outputs: []outputInfo{
25784 {0, 4611686017353646080},
25785 },
25786 },
25787 },
25788 {
25789 name: "MOVVD",
25790 argLen: 1,
25791 asm: loong64.AMOVVD,
25792 reg: regInfo{
25793 inputs: []inputInfo{
25794 {0, 4611686017353646080},
25795 },
25796 outputs: []outputInfo{
25797 {0, 4611686017353646080},
25798 },
25799 },
25800 },
25801 {
25802 name: "TRUNCFW",
25803 argLen: 1,
25804 asm: loong64.ATRUNCFW,
25805 reg: regInfo{
25806 inputs: []inputInfo{
25807 {0, 4611686017353646080},
25808 },
25809 outputs: []outputInfo{
25810 {0, 4611686017353646080},
25811 },
25812 },
25813 },
25814 {
25815 name: "TRUNCDW",
25816 argLen: 1,
25817 asm: loong64.ATRUNCDW,
25818 reg: regInfo{
25819 inputs: []inputInfo{
25820 {0, 4611686017353646080},
25821 },
25822 outputs: []outputInfo{
25823 {0, 4611686017353646080},
25824 },
25825 },
25826 },
25827 {
25828 name: "TRUNCFV",
25829 argLen: 1,
25830 asm: loong64.ATRUNCFV,
25831 reg: regInfo{
25832 inputs: []inputInfo{
25833 {0, 4611686017353646080},
25834 },
25835 outputs: []outputInfo{
25836 {0, 4611686017353646080},
25837 },
25838 },
25839 },
25840 {
25841 name: "TRUNCDV",
25842 argLen: 1,
25843 asm: loong64.ATRUNCDV,
25844 reg: regInfo{
25845 inputs: []inputInfo{
25846 {0, 4611686017353646080},
25847 },
25848 outputs: []outputInfo{
25849 {0, 4611686017353646080},
25850 },
25851 },
25852 },
25853 {
25854 name: "MOVFD",
25855 argLen: 1,
25856 asm: loong64.AMOVFD,
25857 reg: regInfo{
25858 inputs: []inputInfo{
25859 {0, 4611686017353646080},
25860 },
25861 outputs: []outputInfo{
25862 {0, 4611686017353646080},
25863 },
25864 },
25865 },
25866 {
25867 name: "MOVDF",
25868 argLen: 1,
25869 asm: loong64.AMOVDF,
25870 reg: regInfo{
25871 inputs: []inputInfo{
25872 {0, 4611686017353646080},
25873 },
25874 outputs: []outputInfo{
25875 {0, 4611686017353646080},
25876 },
25877 },
25878 },
25879 {
25880 name: "LoweredRound32F",
25881 argLen: 1,
25882 resultInArg0: true,
25883 reg: regInfo{
25884 inputs: []inputInfo{
25885 {0, 4611686017353646080},
25886 },
25887 outputs: []outputInfo{
25888 {0, 4611686017353646080},
25889 },
25890 },
25891 },
25892 {
25893 name: "LoweredRound64F",
25894 argLen: 1,
25895 resultInArg0: true,
25896 reg: regInfo{
25897 inputs: []inputInfo{
25898 {0, 4611686017353646080},
25899 },
25900 outputs: []outputInfo{
25901 {0, 4611686017353646080},
25902 },
25903 },
25904 },
25905 {
25906 name: "CALLstatic",
25907 auxType: auxCallOff,
25908 argLen: -1,
25909 clobberFlags: true,
25910 call: true,
25911 reg: regInfo{
25912 clobbers: 4611686018427387896,
25913 },
25914 },
25915 {
25916 name: "CALLtail",
25917 auxType: auxCallOff,
25918 argLen: -1,
25919 clobberFlags: true,
25920 call: true,
25921 tailCall: true,
25922 reg: regInfo{
25923 clobbers: 4611686018427387896,
25924 },
25925 },
25926 {
25927 name: "CALLclosure",
25928 auxType: auxCallOff,
25929 argLen: -1,
25930 clobberFlags: true,
25931 call: true,
25932 reg: regInfo{
25933 inputs: []inputInfo{
25934 {1, 268435456},
25935 {0, 1071644668},
25936 },
25937 clobbers: 4611686018427387896,
25938 },
25939 },
25940 {
25941 name: "CALLinter",
25942 auxType: auxCallOff,
25943 argLen: -1,
25944 clobberFlags: true,
25945 call: true,
25946 reg: regInfo{
25947 inputs: []inputInfo{
25948 {0, 1071644664},
25949 },
25950 clobbers: 4611686018427387896,
25951 },
25952 },
25953 {
25954 name: "DUFFZERO",
25955 auxType: auxInt64,
25956 argLen: 2,
25957 faultOnNilArg0: true,
25958 reg: regInfo{
25959 inputs: []inputInfo{
25960 {0, 524288},
25961 },
25962 clobbers: 524290,
25963 },
25964 },
25965 {
25966 name: "DUFFCOPY",
25967 auxType: auxInt64,
25968 argLen: 3,
25969 faultOnNilArg0: true,
25970 faultOnNilArg1: true,
25971 reg: regInfo{
25972 inputs: []inputInfo{
25973 {0, 1048576},
25974 {1, 524288},
25975 },
25976 clobbers: 1572866,
25977 },
25978 },
25979 {
25980 name: "LoweredZero",
25981 auxType: auxInt64,
25982 argLen: 3,
25983 faultOnNilArg0: true,
25984 reg: regInfo{
25985 inputs: []inputInfo{
25986 {0, 524288},
25987 {1, 1071644664},
25988 },
25989 clobbers: 524288,
25990 },
25991 },
25992 {
25993 name: "LoweredMove",
25994 auxType: auxInt64,
25995 argLen: 4,
25996 faultOnNilArg0: true,
25997 faultOnNilArg1: true,
25998 reg: regInfo{
25999 inputs: []inputInfo{
26000 {0, 1048576},
26001 {1, 524288},
26002 {2, 1071644664},
26003 },
26004 clobbers: 1572864,
26005 },
26006 },
26007 {
26008 name: "LoweredAtomicLoad8",
26009 argLen: 2,
26010 faultOnNilArg0: true,
26011 reg: regInfo{
26012 inputs: []inputInfo{
26013 {0, 4611686019501129724},
26014 },
26015 outputs: []outputInfo{
26016 {0, 1071644664},
26017 },
26018 },
26019 },
26020 {
26021 name: "LoweredAtomicLoad32",
26022 argLen: 2,
26023 faultOnNilArg0: true,
26024 reg: regInfo{
26025 inputs: []inputInfo{
26026 {0, 4611686019501129724},
26027 },
26028 outputs: []outputInfo{
26029 {0, 1071644664},
26030 },
26031 },
26032 },
26033 {
26034 name: "LoweredAtomicLoad64",
26035 argLen: 2,
26036 faultOnNilArg0: true,
26037 reg: regInfo{
26038 inputs: []inputInfo{
26039 {0, 4611686019501129724},
26040 },
26041 outputs: []outputInfo{
26042 {0, 1071644664},
26043 },
26044 },
26045 },
26046 {
26047 name: "LoweredAtomicStore8",
26048 argLen: 3,
26049 faultOnNilArg0: true,
26050 hasSideEffects: true,
26051 reg: regInfo{
26052 inputs: []inputInfo{
26053 {1, 1073741816},
26054 {0, 4611686019501129724},
26055 },
26056 },
26057 },
26058 {
26059 name: "LoweredAtomicStore32",
26060 argLen: 3,
26061 faultOnNilArg0: true,
26062 hasSideEffects: true,
26063 reg: regInfo{
26064 inputs: []inputInfo{
26065 {1, 1073741816},
26066 {0, 4611686019501129724},
26067 },
26068 },
26069 },
26070 {
26071 name: "LoweredAtomicStore64",
26072 argLen: 3,
26073 faultOnNilArg0: true,
26074 hasSideEffects: true,
26075 reg: regInfo{
26076 inputs: []inputInfo{
26077 {1, 1073741816},
26078 {0, 4611686019501129724},
26079 },
26080 },
26081 },
26082 {
26083 name: "LoweredAtomicStore8Variant",
26084 argLen: 3,
26085 faultOnNilArg0: true,
26086 hasSideEffects: true,
26087 reg: regInfo{
26088 inputs: []inputInfo{
26089 {1, 1073741816},
26090 {0, 4611686019501129724},
26091 },
26092 },
26093 },
26094 {
26095 name: "LoweredAtomicStore32Variant",
26096 argLen: 3,
26097 faultOnNilArg0: true,
26098 hasSideEffects: true,
26099 reg: regInfo{
26100 inputs: []inputInfo{
26101 {1, 1073741816},
26102 {0, 4611686019501129724},
26103 },
26104 },
26105 },
26106 {
26107 name: "LoweredAtomicStore64Variant",
26108 argLen: 3,
26109 faultOnNilArg0: true,
26110 hasSideEffects: true,
26111 reg: regInfo{
26112 inputs: []inputInfo{
26113 {1, 1073741816},
26114 {0, 4611686019501129724},
26115 },
26116 },
26117 },
26118 {
26119 name: "LoweredAtomicExchange32",
26120 argLen: 3,
26121 resultNotInArgs: true,
26122 faultOnNilArg0: true,
26123 hasSideEffects: true,
26124 reg: regInfo{
26125 inputs: []inputInfo{
26126 {1, 1073741816},
26127 {0, 4611686019501129724},
26128 },
26129 outputs: []outputInfo{
26130 {0, 1071644664},
26131 },
26132 },
26133 },
26134 {
26135 name: "LoweredAtomicExchange64",
26136 argLen: 3,
26137 resultNotInArgs: true,
26138 faultOnNilArg0: true,
26139 hasSideEffects: true,
26140 reg: regInfo{
26141 inputs: []inputInfo{
26142 {1, 1073741816},
26143 {0, 4611686019501129724},
26144 },
26145 outputs: []outputInfo{
26146 {0, 1071644664},
26147 },
26148 },
26149 },
26150 {
26151 name: "LoweredAtomicExchange8Variant",
26152 argLen: 3,
26153 resultNotInArgs: true,
26154 faultOnNilArg0: true,
26155 hasSideEffects: true,
26156 reg: regInfo{
26157 inputs: []inputInfo{
26158 {1, 1073741816},
26159 {0, 4611686019501129724},
26160 },
26161 outputs: []outputInfo{
26162 {0, 1071644664},
26163 },
26164 },
26165 },
26166 {
26167 name: "LoweredAtomicAdd32",
26168 argLen: 3,
26169 resultNotInArgs: true,
26170 faultOnNilArg0: true,
26171 hasSideEffects: true,
26172 reg: regInfo{
26173 inputs: []inputInfo{
26174 {1, 1073741816},
26175 {0, 4611686019501129724},
26176 },
26177 outputs: []outputInfo{
26178 {0, 1071644664},
26179 },
26180 },
26181 },
26182 {
26183 name: "LoweredAtomicAdd64",
26184 argLen: 3,
26185 resultNotInArgs: true,
26186 faultOnNilArg0: true,
26187 hasSideEffects: true,
26188 reg: regInfo{
26189 inputs: []inputInfo{
26190 {1, 1073741816},
26191 {0, 4611686019501129724},
26192 },
26193 outputs: []outputInfo{
26194 {0, 1071644664},
26195 },
26196 },
26197 },
26198 {
26199 name: "LoweredAtomicCas32",
26200 argLen: 4,
26201 resultNotInArgs: true,
26202 faultOnNilArg0: true,
26203 hasSideEffects: true,
26204 unsafePoint: true,
26205 reg: regInfo{
26206 inputs: []inputInfo{
26207 {1, 1073741816},
26208 {2, 1073741816},
26209 {0, 4611686019501129724},
26210 },
26211 outputs: []outputInfo{
26212 {0, 1071644664},
26213 },
26214 },
26215 },
26216 {
26217 name: "LoweredAtomicCas64",
26218 argLen: 4,
26219 resultNotInArgs: true,
26220 faultOnNilArg0: true,
26221 hasSideEffects: true,
26222 unsafePoint: true,
26223 reg: regInfo{
26224 inputs: []inputInfo{
26225 {1, 1073741816},
26226 {2, 1073741816},
26227 {0, 4611686019501129724},
26228 },
26229 outputs: []outputInfo{
26230 {0, 1071644664},
26231 },
26232 },
26233 },
26234 {
26235 name: "LoweredAtomicCas64Variant",
26236 argLen: 4,
26237 resultNotInArgs: true,
26238 faultOnNilArg0: true,
26239 hasSideEffects: true,
26240 unsafePoint: true,
26241 reg: regInfo{
26242 inputs: []inputInfo{
26243 {1, 1073741816},
26244 {2, 1073741816},
26245 {0, 4611686019501129724},
26246 },
26247 outputs: []outputInfo{
26248 {0, 1071644664},
26249 },
26250 },
26251 },
26252 {
26253 name: "LoweredAtomicCas32Variant",
26254 argLen: 4,
26255 resultNotInArgs: true,
26256 faultOnNilArg0: true,
26257 hasSideEffects: true,
26258 unsafePoint: true,
26259 reg: regInfo{
26260 inputs: []inputInfo{
26261 {1, 1073741816},
26262 {2, 1073741816},
26263 {0, 4611686019501129724},
26264 },
26265 outputs: []outputInfo{
26266 {0, 1071644664},
26267 },
26268 },
26269 },
26270 {
26271 name: "LoweredAtomicAnd32",
26272 argLen: 3,
26273 resultNotInArgs: true,
26274 faultOnNilArg0: true,
26275 hasSideEffects: true,
26276 asm: loong64.AAMANDDBW,
26277 reg: regInfo{
26278 inputs: []inputInfo{
26279 {1, 1073741816},
26280 {0, 4611686019501129724},
26281 },
26282 outputs: []outputInfo{
26283 {0, 1071644664},
26284 },
26285 },
26286 },
26287 {
26288 name: "LoweredAtomicOr32",
26289 argLen: 3,
26290 resultNotInArgs: true,
26291 faultOnNilArg0: true,
26292 hasSideEffects: true,
26293 asm: loong64.AAMORDBW,
26294 reg: regInfo{
26295 inputs: []inputInfo{
26296 {1, 1073741816},
26297 {0, 4611686019501129724},
26298 },
26299 outputs: []outputInfo{
26300 {0, 1071644664},
26301 },
26302 },
26303 },
26304 {
26305 name: "LoweredAtomicAnd32value",
26306 argLen: 3,
26307 resultNotInArgs: true,
26308 faultOnNilArg0: true,
26309 hasSideEffects: true,
26310 asm: loong64.AAMANDDBW,
26311 reg: regInfo{
26312 inputs: []inputInfo{
26313 {1, 1073741816},
26314 {0, 4611686019501129724},
26315 },
26316 outputs: []outputInfo{
26317 {0, 1071644664},
26318 },
26319 },
26320 },
26321 {
26322 name: "LoweredAtomicAnd64value",
26323 argLen: 3,
26324 resultNotInArgs: true,
26325 faultOnNilArg0: true,
26326 hasSideEffects: true,
26327 asm: loong64.AAMANDDBV,
26328 reg: regInfo{
26329 inputs: []inputInfo{
26330 {1, 1073741816},
26331 {0, 4611686019501129724},
26332 },
26333 outputs: []outputInfo{
26334 {0, 1071644664},
26335 },
26336 },
26337 },
26338 {
26339 name: "LoweredAtomicOr32value",
26340 argLen: 3,
26341 resultNotInArgs: true,
26342 faultOnNilArg0: true,
26343 hasSideEffects: true,
26344 asm: loong64.AAMORDBW,
26345 reg: regInfo{
26346 inputs: []inputInfo{
26347 {1, 1073741816},
26348 {0, 4611686019501129724},
26349 },
26350 outputs: []outputInfo{
26351 {0, 1071644664},
26352 },
26353 },
26354 },
26355 {
26356 name: "LoweredAtomicOr64value",
26357 argLen: 3,
26358 resultNotInArgs: true,
26359 faultOnNilArg0: true,
26360 hasSideEffects: true,
26361 asm: loong64.AAMORDBV,
26362 reg: regInfo{
26363 inputs: []inputInfo{
26364 {1, 1073741816},
26365 {0, 4611686019501129724},
26366 },
26367 outputs: []outputInfo{
26368 {0, 1071644664},
26369 },
26370 },
26371 },
26372 {
26373 name: "LoweredNilCheck",
26374 argLen: 2,
26375 nilCheck: true,
26376 faultOnNilArg0: true,
26377 reg: regInfo{
26378 inputs: []inputInfo{
26379 {0, 1073741816},
26380 },
26381 },
26382 },
26383 {
26384 name: "FPFlagTrue",
26385 argLen: 1,
26386 reg: regInfo{
26387 outputs: []outputInfo{
26388 {0, 1071644664},
26389 },
26390 },
26391 },
26392 {
26393 name: "FPFlagFalse",
26394 argLen: 1,
26395 reg: regInfo{
26396 outputs: []outputInfo{
26397 {0, 1071644664},
26398 },
26399 },
26400 },
26401 {
26402 name: "LoweredGetClosurePtr",
26403 argLen: 0,
26404 zeroWidth: true,
26405 reg: regInfo{
26406 outputs: []outputInfo{
26407 {0, 268435456},
26408 },
26409 },
26410 },
26411 {
26412 name: "LoweredGetCallerSP",
26413 argLen: 1,
26414 rematerializeable: true,
26415 reg: regInfo{
26416 outputs: []outputInfo{
26417 {0, 1071644664},
26418 },
26419 },
26420 },
26421 {
26422 name: "LoweredGetCallerPC",
26423 argLen: 0,
26424 rematerializeable: true,
26425 reg: regInfo{
26426 outputs: []outputInfo{
26427 {0, 1071644664},
26428 },
26429 },
26430 },
26431 {
26432 name: "LoweredWB",
26433 auxType: auxInt64,
26434 argLen: 1,
26435 clobberFlags: true,
26436 reg: regInfo{
26437 clobbers: 4611686017353646082,
26438 outputs: []outputInfo{
26439 {0, 268435456},
26440 },
26441 },
26442 },
26443 {
26444 name: "LoweredPubBarrier",
26445 argLen: 1,
26446 hasSideEffects: true,
26447 asm: loong64.ADBAR,
26448 reg: regInfo{},
26449 },
26450 {
26451 name: "LoweredPanicBoundsA",
26452 auxType: auxInt64,
26453 argLen: 3,
26454 call: true,
26455 reg: regInfo{
26456 inputs: []inputInfo{
26457 {0, 4194304},
26458 {1, 8388608},
26459 },
26460 },
26461 },
26462 {
26463 name: "LoweredPanicBoundsB",
26464 auxType: auxInt64,
26465 argLen: 3,
26466 call: true,
26467 reg: regInfo{
26468 inputs: []inputInfo{
26469 {0, 1048576},
26470 {1, 4194304},
26471 },
26472 },
26473 },
26474 {
26475 name: "LoweredPanicBoundsC",
26476 auxType: auxInt64,
26477 argLen: 3,
26478 call: true,
26479 reg: regInfo{
26480 inputs: []inputInfo{
26481 {0, 524288},
26482 {1, 1048576},
26483 },
26484 },
26485 },
26486 {
26487 name: "PRELD",
26488 auxType: auxInt64,
26489 argLen: 2,
26490 hasSideEffects: true,
26491 asm: loong64.APRELD,
26492 reg: regInfo{
26493 inputs: []inputInfo{
26494 {0, 1073741820},
26495 },
26496 },
26497 },
26498 {
26499 name: "PRELDX",
26500 auxType: auxInt64,
26501 argLen: 2,
26502 hasSideEffects: true,
26503 asm: loong64.APRELDX,
26504 reg: regInfo{
26505 inputs: []inputInfo{
26506 {0, 1073741820},
26507 },
26508 },
26509 },
26510
26511 {
26512 name: "ADD",
26513 argLen: 2,
26514 commutative: true,
26515 asm: mips.AADDU,
26516 reg: regInfo{
26517 inputs: []inputInfo{
26518 {0, 469762046},
26519 {1, 469762046},
26520 },
26521 outputs: []outputInfo{
26522 {0, 335544318},
26523 },
26524 },
26525 },
26526 {
26527 name: "ADDconst",
26528 auxType: auxInt32,
26529 argLen: 1,
26530 asm: mips.AADDU,
26531 reg: regInfo{
26532 inputs: []inputInfo{
26533 {0, 536870910},
26534 },
26535 outputs: []outputInfo{
26536 {0, 335544318},
26537 },
26538 },
26539 },
26540 {
26541 name: "SUB",
26542 argLen: 2,
26543 asm: mips.ASUBU,
26544 reg: regInfo{
26545 inputs: []inputInfo{
26546 {0, 469762046},
26547 {1, 469762046},
26548 },
26549 outputs: []outputInfo{
26550 {0, 335544318},
26551 },
26552 },
26553 },
26554 {
26555 name: "SUBconst",
26556 auxType: auxInt32,
26557 argLen: 1,
26558 asm: mips.ASUBU,
26559 reg: regInfo{
26560 inputs: []inputInfo{
26561 {0, 469762046},
26562 },
26563 outputs: []outputInfo{
26564 {0, 335544318},
26565 },
26566 },
26567 },
26568 {
26569 name: "MUL",
26570 argLen: 2,
26571 commutative: true,
26572 asm: mips.AMUL,
26573 reg: regInfo{
26574 inputs: []inputInfo{
26575 {0, 469762046},
26576 {1, 469762046},
26577 },
26578 clobbers: 105553116266496,
26579 outputs: []outputInfo{
26580 {0, 335544318},
26581 },
26582 },
26583 },
26584 {
26585 name: "MULT",
26586 argLen: 2,
26587 commutative: true,
26588 asm: mips.AMUL,
26589 reg: regInfo{
26590 inputs: []inputInfo{
26591 {0, 469762046},
26592 {1, 469762046},
26593 },
26594 outputs: []outputInfo{
26595 {0, 35184372088832},
26596 {1, 70368744177664},
26597 },
26598 },
26599 },
26600 {
26601 name: "MULTU",
26602 argLen: 2,
26603 commutative: true,
26604 asm: mips.AMULU,
26605 reg: regInfo{
26606 inputs: []inputInfo{
26607 {0, 469762046},
26608 {1, 469762046},
26609 },
26610 outputs: []outputInfo{
26611 {0, 35184372088832},
26612 {1, 70368744177664},
26613 },
26614 },
26615 },
26616 {
26617 name: "DIV",
26618 argLen: 2,
26619 asm: mips.ADIV,
26620 reg: regInfo{
26621 inputs: []inputInfo{
26622 {0, 469762046},
26623 {1, 469762046},
26624 },
26625 outputs: []outputInfo{
26626 {0, 35184372088832},
26627 {1, 70368744177664},
26628 },
26629 },
26630 },
26631 {
26632 name: "DIVU",
26633 argLen: 2,
26634 asm: mips.ADIVU,
26635 reg: regInfo{
26636 inputs: []inputInfo{
26637 {0, 469762046},
26638 {1, 469762046},
26639 },
26640 outputs: []outputInfo{
26641 {0, 35184372088832},
26642 {1, 70368744177664},
26643 },
26644 },
26645 },
26646 {
26647 name: "ADDF",
26648 argLen: 2,
26649 commutative: true,
26650 asm: mips.AADDF,
26651 reg: regInfo{
26652 inputs: []inputInfo{
26653 {0, 35183835217920},
26654 {1, 35183835217920},
26655 },
26656 outputs: []outputInfo{
26657 {0, 35183835217920},
26658 },
26659 },
26660 },
26661 {
26662 name: "ADDD",
26663 argLen: 2,
26664 commutative: true,
26665 asm: mips.AADDD,
26666 reg: regInfo{
26667 inputs: []inputInfo{
26668 {0, 35183835217920},
26669 {1, 35183835217920},
26670 },
26671 outputs: []outputInfo{
26672 {0, 35183835217920},
26673 },
26674 },
26675 },
26676 {
26677 name: "SUBF",
26678 argLen: 2,
26679 asm: mips.ASUBF,
26680 reg: regInfo{
26681 inputs: []inputInfo{
26682 {0, 35183835217920},
26683 {1, 35183835217920},
26684 },
26685 outputs: []outputInfo{
26686 {0, 35183835217920},
26687 },
26688 },
26689 },
26690 {
26691 name: "SUBD",
26692 argLen: 2,
26693 asm: mips.ASUBD,
26694 reg: regInfo{
26695 inputs: []inputInfo{
26696 {0, 35183835217920},
26697 {1, 35183835217920},
26698 },
26699 outputs: []outputInfo{
26700 {0, 35183835217920},
26701 },
26702 },
26703 },
26704 {
26705 name: "MULF",
26706 argLen: 2,
26707 commutative: true,
26708 asm: mips.AMULF,
26709 reg: regInfo{
26710 inputs: []inputInfo{
26711 {0, 35183835217920},
26712 {1, 35183835217920},
26713 },
26714 outputs: []outputInfo{
26715 {0, 35183835217920},
26716 },
26717 },
26718 },
26719 {
26720 name: "MULD",
26721 argLen: 2,
26722 commutative: true,
26723 asm: mips.AMULD,
26724 reg: regInfo{
26725 inputs: []inputInfo{
26726 {0, 35183835217920},
26727 {1, 35183835217920},
26728 },
26729 outputs: []outputInfo{
26730 {0, 35183835217920},
26731 },
26732 },
26733 },
26734 {
26735 name: "DIVF",
26736 argLen: 2,
26737 asm: mips.ADIVF,
26738 reg: regInfo{
26739 inputs: []inputInfo{
26740 {0, 35183835217920},
26741 {1, 35183835217920},
26742 },
26743 outputs: []outputInfo{
26744 {0, 35183835217920},
26745 },
26746 },
26747 },
26748 {
26749 name: "DIVD",
26750 argLen: 2,
26751 asm: mips.ADIVD,
26752 reg: regInfo{
26753 inputs: []inputInfo{
26754 {0, 35183835217920},
26755 {1, 35183835217920},
26756 },
26757 outputs: []outputInfo{
26758 {0, 35183835217920},
26759 },
26760 },
26761 },
26762 {
26763 name: "AND",
26764 argLen: 2,
26765 commutative: true,
26766 asm: mips.AAND,
26767 reg: regInfo{
26768 inputs: []inputInfo{
26769 {0, 469762046},
26770 {1, 469762046},
26771 },
26772 outputs: []outputInfo{
26773 {0, 335544318},
26774 },
26775 },
26776 },
26777 {
26778 name: "ANDconst",
26779 auxType: auxInt32,
26780 argLen: 1,
26781 asm: mips.AAND,
26782 reg: regInfo{
26783 inputs: []inputInfo{
26784 {0, 469762046},
26785 },
26786 outputs: []outputInfo{
26787 {0, 335544318},
26788 },
26789 },
26790 },
26791 {
26792 name: "OR",
26793 argLen: 2,
26794 commutative: true,
26795 asm: mips.AOR,
26796 reg: regInfo{
26797 inputs: []inputInfo{
26798 {0, 469762046},
26799 {1, 469762046},
26800 },
26801 outputs: []outputInfo{
26802 {0, 335544318},
26803 },
26804 },
26805 },
26806 {
26807 name: "ORconst",
26808 auxType: auxInt32,
26809 argLen: 1,
26810 asm: mips.AOR,
26811 reg: regInfo{
26812 inputs: []inputInfo{
26813 {0, 469762046},
26814 },
26815 outputs: []outputInfo{
26816 {0, 335544318},
26817 },
26818 },
26819 },
26820 {
26821 name: "XOR",
26822 argLen: 2,
26823 commutative: true,
26824 asm: mips.AXOR,
26825 reg: regInfo{
26826 inputs: []inputInfo{
26827 {0, 469762046},
26828 {1, 469762046},
26829 },
26830 outputs: []outputInfo{
26831 {0, 335544318},
26832 },
26833 },
26834 },
26835 {
26836 name: "XORconst",
26837 auxType: auxInt32,
26838 argLen: 1,
26839 asm: mips.AXOR,
26840 reg: regInfo{
26841 inputs: []inputInfo{
26842 {0, 469762046},
26843 },
26844 outputs: []outputInfo{
26845 {0, 335544318},
26846 },
26847 },
26848 },
26849 {
26850 name: "NOR",
26851 argLen: 2,
26852 commutative: true,
26853 asm: mips.ANOR,
26854 reg: regInfo{
26855 inputs: []inputInfo{
26856 {0, 469762046},
26857 {1, 469762046},
26858 },
26859 outputs: []outputInfo{
26860 {0, 335544318},
26861 },
26862 },
26863 },
26864 {
26865 name: "NORconst",
26866 auxType: auxInt32,
26867 argLen: 1,
26868 asm: mips.ANOR,
26869 reg: regInfo{
26870 inputs: []inputInfo{
26871 {0, 469762046},
26872 },
26873 outputs: []outputInfo{
26874 {0, 335544318},
26875 },
26876 },
26877 },
26878 {
26879 name: "NEG",
26880 argLen: 1,
26881 reg: regInfo{
26882 inputs: []inputInfo{
26883 {0, 469762046},
26884 },
26885 outputs: []outputInfo{
26886 {0, 335544318},
26887 },
26888 },
26889 },
26890 {
26891 name: "NEGF",
26892 argLen: 1,
26893 asm: mips.ANEGF,
26894 reg: regInfo{
26895 inputs: []inputInfo{
26896 {0, 35183835217920},
26897 },
26898 outputs: []outputInfo{
26899 {0, 35183835217920},
26900 },
26901 },
26902 },
26903 {
26904 name: "NEGD",
26905 argLen: 1,
26906 asm: mips.ANEGD,
26907 reg: regInfo{
26908 inputs: []inputInfo{
26909 {0, 35183835217920},
26910 },
26911 outputs: []outputInfo{
26912 {0, 35183835217920},
26913 },
26914 },
26915 },
26916 {
26917 name: "ABSD",
26918 argLen: 1,
26919 asm: mips.AABSD,
26920 reg: regInfo{
26921 inputs: []inputInfo{
26922 {0, 35183835217920},
26923 },
26924 outputs: []outputInfo{
26925 {0, 35183835217920},
26926 },
26927 },
26928 },
26929 {
26930 name: "SQRTD",
26931 argLen: 1,
26932 asm: mips.ASQRTD,
26933 reg: regInfo{
26934 inputs: []inputInfo{
26935 {0, 35183835217920},
26936 },
26937 outputs: []outputInfo{
26938 {0, 35183835217920},
26939 },
26940 },
26941 },
26942 {
26943 name: "SQRTF",
26944 argLen: 1,
26945 asm: mips.ASQRTF,
26946 reg: regInfo{
26947 inputs: []inputInfo{
26948 {0, 35183835217920},
26949 },
26950 outputs: []outputInfo{
26951 {0, 35183835217920},
26952 },
26953 },
26954 },
26955 {
26956 name: "SLL",
26957 argLen: 2,
26958 asm: mips.ASLL,
26959 reg: regInfo{
26960 inputs: []inputInfo{
26961 {0, 469762046},
26962 {1, 469762046},
26963 },
26964 outputs: []outputInfo{
26965 {0, 335544318},
26966 },
26967 },
26968 },
26969 {
26970 name: "SLLconst",
26971 auxType: auxInt32,
26972 argLen: 1,
26973 asm: mips.ASLL,
26974 reg: regInfo{
26975 inputs: []inputInfo{
26976 {0, 469762046},
26977 },
26978 outputs: []outputInfo{
26979 {0, 335544318},
26980 },
26981 },
26982 },
26983 {
26984 name: "SRL",
26985 argLen: 2,
26986 asm: mips.ASRL,
26987 reg: regInfo{
26988 inputs: []inputInfo{
26989 {0, 469762046},
26990 {1, 469762046},
26991 },
26992 outputs: []outputInfo{
26993 {0, 335544318},
26994 },
26995 },
26996 },
26997 {
26998 name: "SRLconst",
26999 auxType: auxInt32,
27000 argLen: 1,
27001 asm: mips.ASRL,
27002 reg: regInfo{
27003 inputs: []inputInfo{
27004 {0, 469762046},
27005 },
27006 outputs: []outputInfo{
27007 {0, 335544318},
27008 },
27009 },
27010 },
27011 {
27012 name: "SRA",
27013 argLen: 2,
27014 asm: mips.ASRA,
27015 reg: regInfo{
27016 inputs: []inputInfo{
27017 {0, 469762046},
27018 {1, 469762046},
27019 },
27020 outputs: []outputInfo{
27021 {0, 335544318},
27022 },
27023 },
27024 },
27025 {
27026 name: "SRAconst",
27027 auxType: auxInt32,
27028 argLen: 1,
27029 asm: mips.ASRA,
27030 reg: regInfo{
27031 inputs: []inputInfo{
27032 {0, 469762046},
27033 },
27034 outputs: []outputInfo{
27035 {0, 335544318},
27036 },
27037 },
27038 },
27039 {
27040 name: "CLZ",
27041 argLen: 1,
27042 asm: mips.ACLZ,
27043 reg: regInfo{
27044 inputs: []inputInfo{
27045 {0, 469762046},
27046 },
27047 outputs: []outputInfo{
27048 {0, 335544318},
27049 },
27050 },
27051 },
27052 {
27053 name: "SGT",
27054 argLen: 2,
27055 asm: mips.ASGT,
27056 reg: regInfo{
27057 inputs: []inputInfo{
27058 {0, 469762046},
27059 {1, 469762046},
27060 },
27061 outputs: []outputInfo{
27062 {0, 335544318},
27063 },
27064 },
27065 },
27066 {
27067 name: "SGTconst",
27068 auxType: auxInt32,
27069 argLen: 1,
27070 asm: mips.ASGT,
27071 reg: regInfo{
27072 inputs: []inputInfo{
27073 {0, 469762046},
27074 },
27075 outputs: []outputInfo{
27076 {0, 335544318},
27077 },
27078 },
27079 },
27080 {
27081 name: "SGTzero",
27082 argLen: 1,
27083 asm: mips.ASGT,
27084 reg: regInfo{
27085 inputs: []inputInfo{
27086 {0, 469762046},
27087 },
27088 outputs: []outputInfo{
27089 {0, 335544318},
27090 },
27091 },
27092 },
27093 {
27094 name: "SGTU",
27095 argLen: 2,
27096 asm: mips.ASGTU,
27097 reg: regInfo{
27098 inputs: []inputInfo{
27099 {0, 469762046},
27100 {1, 469762046},
27101 },
27102 outputs: []outputInfo{
27103 {0, 335544318},
27104 },
27105 },
27106 },
27107 {
27108 name: "SGTUconst",
27109 auxType: auxInt32,
27110 argLen: 1,
27111 asm: mips.ASGTU,
27112 reg: regInfo{
27113 inputs: []inputInfo{
27114 {0, 469762046},
27115 },
27116 outputs: []outputInfo{
27117 {0, 335544318},
27118 },
27119 },
27120 },
27121 {
27122 name: "SGTUzero",
27123 argLen: 1,
27124 asm: mips.ASGTU,
27125 reg: regInfo{
27126 inputs: []inputInfo{
27127 {0, 469762046},
27128 },
27129 outputs: []outputInfo{
27130 {0, 335544318},
27131 },
27132 },
27133 },
27134 {
27135 name: "CMPEQF",
27136 argLen: 2,
27137 asm: mips.ACMPEQF,
27138 reg: regInfo{
27139 inputs: []inputInfo{
27140 {0, 35183835217920},
27141 {1, 35183835217920},
27142 },
27143 },
27144 },
27145 {
27146 name: "CMPEQD",
27147 argLen: 2,
27148 asm: mips.ACMPEQD,
27149 reg: regInfo{
27150 inputs: []inputInfo{
27151 {0, 35183835217920},
27152 {1, 35183835217920},
27153 },
27154 },
27155 },
27156 {
27157 name: "CMPGEF",
27158 argLen: 2,
27159 asm: mips.ACMPGEF,
27160 reg: regInfo{
27161 inputs: []inputInfo{
27162 {0, 35183835217920},
27163 {1, 35183835217920},
27164 },
27165 },
27166 },
27167 {
27168 name: "CMPGED",
27169 argLen: 2,
27170 asm: mips.ACMPGED,
27171 reg: regInfo{
27172 inputs: []inputInfo{
27173 {0, 35183835217920},
27174 {1, 35183835217920},
27175 },
27176 },
27177 },
27178 {
27179 name: "CMPGTF",
27180 argLen: 2,
27181 asm: mips.ACMPGTF,
27182 reg: regInfo{
27183 inputs: []inputInfo{
27184 {0, 35183835217920},
27185 {1, 35183835217920},
27186 },
27187 },
27188 },
27189 {
27190 name: "CMPGTD",
27191 argLen: 2,
27192 asm: mips.ACMPGTD,
27193 reg: regInfo{
27194 inputs: []inputInfo{
27195 {0, 35183835217920},
27196 {1, 35183835217920},
27197 },
27198 },
27199 },
27200 {
27201 name: "MOVWconst",
27202 auxType: auxInt32,
27203 argLen: 0,
27204 rematerializeable: true,
27205 asm: mips.AMOVW,
27206 reg: regInfo{
27207 outputs: []outputInfo{
27208 {0, 335544318},
27209 },
27210 },
27211 },
27212 {
27213 name: "MOVFconst",
27214 auxType: auxFloat32,
27215 argLen: 0,
27216 rematerializeable: true,
27217 asm: mips.AMOVF,
27218 reg: regInfo{
27219 outputs: []outputInfo{
27220 {0, 35183835217920},
27221 },
27222 },
27223 },
27224 {
27225 name: "MOVDconst",
27226 auxType: auxFloat64,
27227 argLen: 0,
27228 rematerializeable: true,
27229 asm: mips.AMOVD,
27230 reg: regInfo{
27231 outputs: []outputInfo{
27232 {0, 35183835217920},
27233 },
27234 },
27235 },
27236 {
27237 name: "MOVWaddr",
27238 auxType: auxSymOff,
27239 argLen: 1,
27240 rematerializeable: true,
27241 symEffect: SymAddr,
27242 asm: mips.AMOVW,
27243 reg: regInfo{
27244 inputs: []inputInfo{
27245 {0, 140737555464192},
27246 },
27247 outputs: []outputInfo{
27248 {0, 335544318},
27249 },
27250 },
27251 },
27252 {
27253 name: "MOVBload",
27254 auxType: auxSymOff,
27255 argLen: 2,
27256 faultOnNilArg0: true,
27257 symEffect: SymRead,
27258 asm: mips.AMOVB,
27259 reg: regInfo{
27260 inputs: []inputInfo{
27261 {0, 140738025226238},
27262 },
27263 outputs: []outputInfo{
27264 {0, 335544318},
27265 },
27266 },
27267 },
27268 {
27269 name: "MOVBUload",
27270 auxType: auxSymOff,
27271 argLen: 2,
27272 faultOnNilArg0: true,
27273 symEffect: SymRead,
27274 asm: mips.AMOVBU,
27275 reg: regInfo{
27276 inputs: []inputInfo{
27277 {0, 140738025226238},
27278 },
27279 outputs: []outputInfo{
27280 {0, 335544318},
27281 },
27282 },
27283 },
27284 {
27285 name: "MOVHload",
27286 auxType: auxSymOff,
27287 argLen: 2,
27288 faultOnNilArg0: true,
27289 symEffect: SymRead,
27290 asm: mips.AMOVH,
27291 reg: regInfo{
27292 inputs: []inputInfo{
27293 {0, 140738025226238},
27294 },
27295 outputs: []outputInfo{
27296 {0, 335544318},
27297 },
27298 },
27299 },
27300 {
27301 name: "MOVHUload",
27302 auxType: auxSymOff,
27303 argLen: 2,
27304 faultOnNilArg0: true,
27305 symEffect: SymRead,
27306 asm: mips.AMOVHU,
27307 reg: regInfo{
27308 inputs: []inputInfo{
27309 {0, 140738025226238},
27310 },
27311 outputs: []outputInfo{
27312 {0, 335544318},
27313 },
27314 },
27315 },
27316 {
27317 name: "MOVWload",
27318 auxType: auxSymOff,
27319 argLen: 2,
27320 faultOnNilArg0: true,
27321 symEffect: SymRead,
27322 asm: mips.AMOVW,
27323 reg: regInfo{
27324 inputs: []inputInfo{
27325 {0, 140738025226238},
27326 },
27327 outputs: []outputInfo{
27328 {0, 335544318},
27329 },
27330 },
27331 },
27332 {
27333 name: "MOVFload",
27334 auxType: auxSymOff,
27335 argLen: 2,
27336 faultOnNilArg0: true,
27337 symEffect: SymRead,
27338 asm: mips.AMOVF,
27339 reg: regInfo{
27340 inputs: []inputInfo{
27341 {0, 140738025226238},
27342 },
27343 outputs: []outputInfo{
27344 {0, 35183835217920},
27345 },
27346 },
27347 },
27348 {
27349 name: "MOVDload",
27350 auxType: auxSymOff,
27351 argLen: 2,
27352 faultOnNilArg0: true,
27353 symEffect: SymRead,
27354 asm: mips.AMOVD,
27355 reg: regInfo{
27356 inputs: []inputInfo{
27357 {0, 140738025226238},
27358 },
27359 outputs: []outputInfo{
27360 {0, 35183835217920},
27361 },
27362 },
27363 },
27364 {
27365 name: "MOVBstore",
27366 auxType: auxSymOff,
27367 argLen: 3,
27368 faultOnNilArg0: true,
27369 symEffect: SymWrite,
27370 asm: mips.AMOVB,
27371 reg: regInfo{
27372 inputs: []inputInfo{
27373 {1, 469762046},
27374 {0, 140738025226238},
27375 },
27376 },
27377 },
27378 {
27379 name: "MOVHstore",
27380 auxType: auxSymOff,
27381 argLen: 3,
27382 faultOnNilArg0: true,
27383 symEffect: SymWrite,
27384 asm: mips.AMOVH,
27385 reg: regInfo{
27386 inputs: []inputInfo{
27387 {1, 469762046},
27388 {0, 140738025226238},
27389 },
27390 },
27391 },
27392 {
27393 name: "MOVWstore",
27394 auxType: auxSymOff,
27395 argLen: 3,
27396 faultOnNilArg0: true,
27397 symEffect: SymWrite,
27398 asm: mips.AMOVW,
27399 reg: regInfo{
27400 inputs: []inputInfo{
27401 {1, 469762046},
27402 {0, 140738025226238},
27403 },
27404 },
27405 },
27406 {
27407 name: "MOVFstore",
27408 auxType: auxSymOff,
27409 argLen: 3,
27410 faultOnNilArg0: true,
27411 symEffect: SymWrite,
27412 asm: mips.AMOVF,
27413 reg: regInfo{
27414 inputs: []inputInfo{
27415 {1, 35183835217920},
27416 {0, 140738025226238},
27417 },
27418 },
27419 },
27420 {
27421 name: "MOVDstore",
27422 auxType: auxSymOff,
27423 argLen: 3,
27424 faultOnNilArg0: true,
27425 symEffect: SymWrite,
27426 asm: mips.AMOVD,
27427 reg: regInfo{
27428 inputs: []inputInfo{
27429 {1, 35183835217920},
27430 {0, 140738025226238},
27431 },
27432 },
27433 },
27434 {
27435 name: "MOVBstorezero",
27436 auxType: auxSymOff,
27437 argLen: 2,
27438 faultOnNilArg0: true,
27439 symEffect: SymWrite,
27440 asm: mips.AMOVB,
27441 reg: regInfo{
27442 inputs: []inputInfo{
27443 {0, 140738025226238},
27444 },
27445 },
27446 },
27447 {
27448 name: "MOVHstorezero",
27449 auxType: auxSymOff,
27450 argLen: 2,
27451 faultOnNilArg0: true,
27452 symEffect: SymWrite,
27453 asm: mips.AMOVH,
27454 reg: regInfo{
27455 inputs: []inputInfo{
27456 {0, 140738025226238},
27457 },
27458 },
27459 },
27460 {
27461 name: "MOVWstorezero",
27462 auxType: auxSymOff,
27463 argLen: 2,
27464 faultOnNilArg0: true,
27465 symEffect: SymWrite,
27466 asm: mips.AMOVW,
27467 reg: regInfo{
27468 inputs: []inputInfo{
27469 {0, 140738025226238},
27470 },
27471 },
27472 },
27473 {
27474 name: "MOVWfpgp",
27475 argLen: 1,
27476 asm: mips.AMOVW,
27477 reg: regInfo{
27478 inputs: []inputInfo{
27479 {0, 35183835217920},
27480 },
27481 outputs: []outputInfo{
27482 {0, 335544318},
27483 },
27484 },
27485 },
27486 {
27487 name: "MOVWgpfp",
27488 argLen: 1,
27489 asm: mips.AMOVW,
27490 reg: regInfo{
27491 inputs: []inputInfo{
27492 {0, 335544318},
27493 },
27494 outputs: []outputInfo{
27495 {0, 35183835217920},
27496 },
27497 },
27498 },
27499 {
27500 name: "MOVBreg",
27501 argLen: 1,
27502 asm: mips.AMOVB,
27503 reg: regInfo{
27504 inputs: []inputInfo{
27505 {0, 469762046},
27506 },
27507 outputs: []outputInfo{
27508 {0, 335544318},
27509 },
27510 },
27511 },
27512 {
27513 name: "MOVBUreg",
27514 argLen: 1,
27515 asm: mips.AMOVBU,
27516 reg: regInfo{
27517 inputs: []inputInfo{
27518 {0, 469762046},
27519 },
27520 outputs: []outputInfo{
27521 {0, 335544318},
27522 },
27523 },
27524 },
27525 {
27526 name: "MOVHreg",
27527 argLen: 1,
27528 asm: mips.AMOVH,
27529 reg: regInfo{
27530 inputs: []inputInfo{
27531 {0, 469762046},
27532 },
27533 outputs: []outputInfo{
27534 {0, 335544318},
27535 },
27536 },
27537 },
27538 {
27539 name: "MOVHUreg",
27540 argLen: 1,
27541 asm: mips.AMOVHU,
27542 reg: regInfo{
27543 inputs: []inputInfo{
27544 {0, 469762046},
27545 },
27546 outputs: []outputInfo{
27547 {0, 335544318},
27548 },
27549 },
27550 },
27551 {
27552 name: "MOVWreg",
27553 argLen: 1,
27554 asm: mips.AMOVW,
27555 reg: regInfo{
27556 inputs: []inputInfo{
27557 {0, 469762046},
27558 },
27559 outputs: []outputInfo{
27560 {0, 335544318},
27561 },
27562 },
27563 },
27564 {
27565 name: "MOVWnop",
27566 argLen: 1,
27567 resultInArg0: true,
27568 reg: regInfo{
27569 inputs: []inputInfo{
27570 {0, 335544318},
27571 },
27572 outputs: []outputInfo{
27573 {0, 335544318},
27574 },
27575 },
27576 },
27577 {
27578 name: "CMOVZ",
27579 argLen: 3,
27580 resultInArg0: true,
27581 asm: mips.ACMOVZ,
27582 reg: regInfo{
27583 inputs: []inputInfo{
27584 {0, 335544318},
27585 {1, 335544318},
27586 {2, 335544318},
27587 },
27588 outputs: []outputInfo{
27589 {0, 335544318},
27590 },
27591 },
27592 },
27593 {
27594 name: "CMOVZzero",
27595 argLen: 2,
27596 resultInArg0: true,
27597 asm: mips.ACMOVZ,
27598 reg: regInfo{
27599 inputs: []inputInfo{
27600 {0, 335544318},
27601 {1, 469762046},
27602 },
27603 outputs: []outputInfo{
27604 {0, 335544318},
27605 },
27606 },
27607 },
27608 {
27609 name: "MOVWF",
27610 argLen: 1,
27611 asm: mips.AMOVWF,
27612 reg: regInfo{
27613 inputs: []inputInfo{
27614 {0, 35183835217920},
27615 },
27616 outputs: []outputInfo{
27617 {0, 35183835217920},
27618 },
27619 },
27620 },
27621 {
27622 name: "MOVWD",
27623 argLen: 1,
27624 asm: mips.AMOVWD,
27625 reg: regInfo{
27626 inputs: []inputInfo{
27627 {0, 35183835217920},
27628 },
27629 outputs: []outputInfo{
27630 {0, 35183835217920},
27631 },
27632 },
27633 },
27634 {
27635 name: "TRUNCFW",
27636 argLen: 1,
27637 asm: mips.ATRUNCFW,
27638 reg: regInfo{
27639 inputs: []inputInfo{
27640 {0, 35183835217920},
27641 },
27642 outputs: []outputInfo{
27643 {0, 35183835217920},
27644 },
27645 },
27646 },
27647 {
27648 name: "TRUNCDW",
27649 argLen: 1,
27650 asm: mips.ATRUNCDW,
27651 reg: regInfo{
27652 inputs: []inputInfo{
27653 {0, 35183835217920},
27654 },
27655 outputs: []outputInfo{
27656 {0, 35183835217920},
27657 },
27658 },
27659 },
27660 {
27661 name: "MOVFD",
27662 argLen: 1,
27663 asm: mips.AMOVFD,
27664 reg: regInfo{
27665 inputs: []inputInfo{
27666 {0, 35183835217920},
27667 },
27668 outputs: []outputInfo{
27669 {0, 35183835217920},
27670 },
27671 },
27672 },
27673 {
27674 name: "MOVDF",
27675 argLen: 1,
27676 asm: mips.AMOVDF,
27677 reg: regInfo{
27678 inputs: []inputInfo{
27679 {0, 35183835217920},
27680 },
27681 outputs: []outputInfo{
27682 {0, 35183835217920},
27683 },
27684 },
27685 },
27686 {
27687 name: "CALLstatic",
27688 auxType: auxCallOff,
27689 argLen: 1,
27690 clobberFlags: true,
27691 call: true,
27692 reg: regInfo{
27693 clobbers: 140737421246462,
27694 },
27695 },
27696 {
27697 name: "CALLtail",
27698 auxType: auxCallOff,
27699 argLen: 1,
27700 clobberFlags: true,
27701 call: true,
27702 tailCall: true,
27703 reg: regInfo{
27704 clobbers: 140737421246462,
27705 },
27706 },
27707 {
27708 name: "CALLclosure",
27709 auxType: auxCallOff,
27710 argLen: 3,
27711 clobberFlags: true,
27712 call: true,
27713 reg: regInfo{
27714 inputs: []inputInfo{
27715 {1, 4194304},
27716 {0, 402653182},
27717 },
27718 clobbers: 140737421246462,
27719 },
27720 },
27721 {
27722 name: "CALLinter",
27723 auxType: auxCallOff,
27724 argLen: 2,
27725 clobberFlags: true,
27726 call: true,
27727 reg: regInfo{
27728 inputs: []inputInfo{
27729 {0, 335544318},
27730 },
27731 clobbers: 140737421246462,
27732 },
27733 },
27734 {
27735 name: "LoweredAtomicLoad8",
27736 argLen: 2,
27737 faultOnNilArg0: true,
27738 reg: regInfo{
27739 inputs: []inputInfo{
27740 {0, 140738025226238},
27741 },
27742 outputs: []outputInfo{
27743 {0, 335544318},
27744 },
27745 },
27746 },
27747 {
27748 name: "LoweredAtomicLoad32",
27749 argLen: 2,
27750 faultOnNilArg0: true,
27751 reg: regInfo{
27752 inputs: []inputInfo{
27753 {0, 140738025226238},
27754 },
27755 outputs: []outputInfo{
27756 {0, 335544318},
27757 },
27758 },
27759 },
27760 {
27761 name: "LoweredAtomicStore8",
27762 argLen: 3,
27763 faultOnNilArg0: true,
27764 hasSideEffects: true,
27765 reg: regInfo{
27766 inputs: []inputInfo{
27767 {1, 469762046},
27768 {0, 140738025226238},
27769 },
27770 },
27771 },
27772 {
27773 name: "LoweredAtomicStore32",
27774 argLen: 3,
27775 faultOnNilArg0: true,
27776 hasSideEffects: true,
27777 reg: regInfo{
27778 inputs: []inputInfo{
27779 {1, 469762046},
27780 {0, 140738025226238},
27781 },
27782 },
27783 },
27784 {
27785 name: "LoweredAtomicStorezero",
27786 argLen: 2,
27787 faultOnNilArg0: true,
27788 hasSideEffects: true,
27789 reg: regInfo{
27790 inputs: []inputInfo{
27791 {0, 140738025226238},
27792 },
27793 },
27794 },
27795 {
27796 name: "LoweredAtomicExchange",
27797 argLen: 3,
27798 resultNotInArgs: true,
27799 faultOnNilArg0: true,
27800 hasSideEffects: true,
27801 unsafePoint: true,
27802 reg: regInfo{
27803 inputs: []inputInfo{
27804 {1, 469762046},
27805 {0, 140738025226238},
27806 },
27807 outputs: []outputInfo{
27808 {0, 335544318},
27809 },
27810 },
27811 },
27812 {
27813 name: "LoweredAtomicAdd",
27814 argLen: 3,
27815 resultNotInArgs: true,
27816 faultOnNilArg0: true,
27817 hasSideEffects: true,
27818 unsafePoint: true,
27819 reg: regInfo{
27820 inputs: []inputInfo{
27821 {1, 469762046},
27822 {0, 140738025226238},
27823 },
27824 outputs: []outputInfo{
27825 {0, 335544318},
27826 },
27827 },
27828 },
27829 {
27830 name: "LoweredAtomicAddconst",
27831 auxType: auxInt32,
27832 argLen: 2,
27833 resultNotInArgs: true,
27834 faultOnNilArg0: true,
27835 hasSideEffects: true,
27836 unsafePoint: true,
27837 reg: regInfo{
27838 inputs: []inputInfo{
27839 {0, 140738025226238},
27840 },
27841 outputs: []outputInfo{
27842 {0, 335544318},
27843 },
27844 },
27845 },
27846 {
27847 name: "LoweredAtomicCas",
27848 argLen: 4,
27849 resultNotInArgs: true,
27850 faultOnNilArg0: true,
27851 hasSideEffects: true,
27852 unsafePoint: true,
27853 reg: regInfo{
27854 inputs: []inputInfo{
27855 {1, 469762046},
27856 {2, 469762046},
27857 {0, 140738025226238},
27858 },
27859 outputs: []outputInfo{
27860 {0, 335544318},
27861 },
27862 },
27863 },
27864 {
27865 name: "LoweredAtomicAnd",
27866 argLen: 3,
27867 faultOnNilArg0: true,
27868 hasSideEffects: true,
27869 unsafePoint: true,
27870 asm: mips.AAND,
27871 reg: regInfo{
27872 inputs: []inputInfo{
27873 {1, 469762046},
27874 {0, 140738025226238},
27875 },
27876 },
27877 },
27878 {
27879 name: "LoweredAtomicOr",
27880 argLen: 3,
27881 faultOnNilArg0: true,
27882 hasSideEffects: true,
27883 unsafePoint: true,
27884 asm: mips.AOR,
27885 reg: regInfo{
27886 inputs: []inputInfo{
27887 {1, 469762046},
27888 {0, 140738025226238},
27889 },
27890 },
27891 },
27892 {
27893 name: "LoweredZero",
27894 auxType: auxInt32,
27895 argLen: 3,
27896 faultOnNilArg0: true,
27897 reg: regInfo{
27898 inputs: []inputInfo{
27899 {0, 2},
27900 {1, 335544318},
27901 },
27902 clobbers: 2,
27903 },
27904 },
27905 {
27906 name: "LoweredMove",
27907 auxType: auxInt32,
27908 argLen: 4,
27909 faultOnNilArg0: true,
27910 faultOnNilArg1: true,
27911 reg: regInfo{
27912 inputs: []inputInfo{
27913 {0, 4},
27914 {1, 2},
27915 {2, 335544318},
27916 },
27917 clobbers: 6,
27918 },
27919 },
27920 {
27921 name: "LoweredNilCheck",
27922 argLen: 2,
27923 nilCheck: true,
27924 faultOnNilArg0: true,
27925 reg: regInfo{
27926 inputs: []inputInfo{
27927 {0, 469762046},
27928 },
27929 },
27930 },
27931 {
27932 name: "FPFlagTrue",
27933 argLen: 1,
27934 reg: regInfo{
27935 outputs: []outputInfo{
27936 {0, 335544318},
27937 },
27938 },
27939 },
27940 {
27941 name: "FPFlagFalse",
27942 argLen: 1,
27943 reg: regInfo{
27944 outputs: []outputInfo{
27945 {0, 335544318},
27946 },
27947 },
27948 },
27949 {
27950 name: "LoweredGetClosurePtr",
27951 argLen: 0,
27952 zeroWidth: true,
27953 reg: regInfo{
27954 outputs: []outputInfo{
27955 {0, 4194304},
27956 },
27957 },
27958 },
27959 {
27960 name: "LoweredGetCallerSP",
27961 argLen: 1,
27962 rematerializeable: true,
27963 reg: regInfo{
27964 outputs: []outputInfo{
27965 {0, 335544318},
27966 },
27967 },
27968 },
27969 {
27970 name: "LoweredGetCallerPC",
27971 argLen: 0,
27972 rematerializeable: true,
27973 reg: regInfo{
27974 outputs: []outputInfo{
27975 {0, 335544318},
27976 },
27977 },
27978 },
27979 {
27980 name: "LoweredWB",
27981 auxType: auxInt64,
27982 argLen: 1,
27983 clobberFlags: true,
27984 reg: regInfo{
27985 clobbers: 140737219919872,
27986 outputs: []outputInfo{
27987 {0, 16777216},
27988 },
27989 },
27990 },
27991 {
27992 name: "LoweredPubBarrier",
27993 argLen: 1,
27994 hasSideEffects: true,
27995 asm: mips.ASYNC,
27996 reg: regInfo{},
27997 },
27998 {
27999 name: "LoweredPanicBoundsA",
28000 auxType: auxInt64,
28001 argLen: 3,
28002 call: true,
28003 reg: regInfo{
28004 inputs: []inputInfo{
28005 {0, 8},
28006 {1, 16},
28007 },
28008 },
28009 },
28010 {
28011 name: "LoweredPanicBoundsB",
28012 auxType: auxInt64,
28013 argLen: 3,
28014 call: true,
28015 reg: regInfo{
28016 inputs: []inputInfo{
28017 {0, 4},
28018 {1, 8},
28019 },
28020 },
28021 },
28022 {
28023 name: "LoweredPanicBoundsC",
28024 auxType: auxInt64,
28025 argLen: 3,
28026 call: true,
28027 reg: regInfo{
28028 inputs: []inputInfo{
28029 {0, 2},
28030 {1, 4},
28031 },
28032 },
28033 },
28034 {
28035 name: "LoweredPanicExtendA",
28036 auxType: auxInt64,
28037 argLen: 4,
28038 call: true,
28039 reg: regInfo{
28040 inputs: []inputInfo{
28041 {0, 32},
28042 {1, 8},
28043 {2, 16},
28044 },
28045 },
28046 },
28047 {
28048 name: "LoweredPanicExtendB",
28049 auxType: auxInt64,
28050 argLen: 4,
28051 call: true,
28052 reg: regInfo{
28053 inputs: []inputInfo{
28054 {0, 32},
28055 {1, 4},
28056 {2, 8},
28057 },
28058 },
28059 },
28060 {
28061 name: "LoweredPanicExtendC",
28062 auxType: auxInt64,
28063 argLen: 4,
28064 call: true,
28065 reg: regInfo{
28066 inputs: []inputInfo{
28067 {0, 32},
28068 {1, 2},
28069 {2, 4},
28070 },
28071 },
28072 },
28073
28074 {
28075 name: "ADDV",
28076 argLen: 2,
28077 commutative: true,
28078 asm: mips.AADDVU,
28079 reg: regInfo{
28080 inputs: []inputInfo{
28081 {0, 234881022},
28082 {1, 234881022},
28083 },
28084 outputs: []outputInfo{
28085 {0, 167772158},
28086 },
28087 },
28088 },
28089 {
28090 name: "ADDVconst",
28091 auxType: auxInt64,
28092 argLen: 1,
28093 asm: mips.AADDVU,
28094 reg: regInfo{
28095 inputs: []inputInfo{
28096 {0, 268435454},
28097 },
28098 outputs: []outputInfo{
28099 {0, 167772158},
28100 },
28101 },
28102 },
28103 {
28104 name: "SUBV",
28105 argLen: 2,
28106 asm: mips.ASUBVU,
28107 reg: regInfo{
28108 inputs: []inputInfo{
28109 {0, 234881022},
28110 {1, 234881022},
28111 },
28112 outputs: []outputInfo{
28113 {0, 167772158},
28114 },
28115 },
28116 },
28117 {
28118 name: "SUBVconst",
28119 auxType: auxInt64,
28120 argLen: 1,
28121 asm: mips.ASUBVU,
28122 reg: regInfo{
28123 inputs: []inputInfo{
28124 {0, 234881022},
28125 },
28126 outputs: []outputInfo{
28127 {0, 167772158},
28128 },
28129 },
28130 },
28131 {
28132 name: "MULV",
28133 argLen: 2,
28134 commutative: true,
28135 asm: mips.AMULV,
28136 reg: regInfo{
28137 inputs: []inputInfo{
28138 {0, 234881022},
28139 {1, 234881022},
28140 },
28141 outputs: []outputInfo{
28142 {0, 1152921504606846976},
28143 {1, 2305843009213693952},
28144 },
28145 },
28146 },
28147 {
28148 name: "MULVU",
28149 argLen: 2,
28150 commutative: true,
28151 asm: mips.AMULVU,
28152 reg: regInfo{
28153 inputs: []inputInfo{
28154 {0, 234881022},
28155 {1, 234881022},
28156 },
28157 outputs: []outputInfo{
28158 {0, 1152921504606846976},
28159 {1, 2305843009213693952},
28160 },
28161 },
28162 },
28163 {
28164 name: "DIVV",
28165 argLen: 2,
28166 asm: mips.ADIVV,
28167 reg: regInfo{
28168 inputs: []inputInfo{
28169 {0, 234881022},
28170 {1, 234881022},
28171 },
28172 outputs: []outputInfo{
28173 {0, 1152921504606846976},
28174 {1, 2305843009213693952},
28175 },
28176 },
28177 },
28178 {
28179 name: "DIVVU",
28180 argLen: 2,
28181 asm: mips.ADIVVU,
28182 reg: regInfo{
28183 inputs: []inputInfo{
28184 {0, 234881022},
28185 {1, 234881022},
28186 },
28187 outputs: []outputInfo{
28188 {0, 1152921504606846976},
28189 {1, 2305843009213693952},
28190 },
28191 },
28192 },
28193 {
28194 name: "ADDF",
28195 argLen: 2,
28196 commutative: true,
28197 asm: mips.AADDF,
28198 reg: regInfo{
28199 inputs: []inputInfo{
28200 {0, 1152921504338411520},
28201 {1, 1152921504338411520},
28202 },
28203 outputs: []outputInfo{
28204 {0, 1152921504338411520},
28205 },
28206 },
28207 },
28208 {
28209 name: "ADDD",
28210 argLen: 2,
28211 commutative: true,
28212 asm: mips.AADDD,
28213 reg: regInfo{
28214 inputs: []inputInfo{
28215 {0, 1152921504338411520},
28216 {1, 1152921504338411520},
28217 },
28218 outputs: []outputInfo{
28219 {0, 1152921504338411520},
28220 },
28221 },
28222 },
28223 {
28224 name: "SUBF",
28225 argLen: 2,
28226 asm: mips.ASUBF,
28227 reg: regInfo{
28228 inputs: []inputInfo{
28229 {0, 1152921504338411520},
28230 {1, 1152921504338411520},
28231 },
28232 outputs: []outputInfo{
28233 {0, 1152921504338411520},
28234 },
28235 },
28236 },
28237 {
28238 name: "SUBD",
28239 argLen: 2,
28240 asm: mips.ASUBD,
28241 reg: regInfo{
28242 inputs: []inputInfo{
28243 {0, 1152921504338411520},
28244 {1, 1152921504338411520},
28245 },
28246 outputs: []outputInfo{
28247 {0, 1152921504338411520},
28248 },
28249 },
28250 },
28251 {
28252 name: "MULF",
28253 argLen: 2,
28254 commutative: true,
28255 asm: mips.AMULF,
28256 reg: regInfo{
28257 inputs: []inputInfo{
28258 {0, 1152921504338411520},
28259 {1, 1152921504338411520},
28260 },
28261 outputs: []outputInfo{
28262 {0, 1152921504338411520},
28263 },
28264 },
28265 },
28266 {
28267 name: "MULD",
28268 argLen: 2,
28269 commutative: true,
28270 asm: mips.AMULD,
28271 reg: regInfo{
28272 inputs: []inputInfo{
28273 {0, 1152921504338411520},
28274 {1, 1152921504338411520},
28275 },
28276 outputs: []outputInfo{
28277 {0, 1152921504338411520},
28278 },
28279 },
28280 },
28281 {
28282 name: "DIVF",
28283 argLen: 2,
28284 asm: mips.ADIVF,
28285 reg: regInfo{
28286 inputs: []inputInfo{
28287 {0, 1152921504338411520},
28288 {1, 1152921504338411520},
28289 },
28290 outputs: []outputInfo{
28291 {0, 1152921504338411520},
28292 },
28293 },
28294 },
28295 {
28296 name: "DIVD",
28297 argLen: 2,
28298 asm: mips.ADIVD,
28299 reg: regInfo{
28300 inputs: []inputInfo{
28301 {0, 1152921504338411520},
28302 {1, 1152921504338411520},
28303 },
28304 outputs: []outputInfo{
28305 {0, 1152921504338411520},
28306 },
28307 },
28308 },
28309 {
28310 name: "AND",
28311 argLen: 2,
28312 commutative: true,
28313 asm: mips.AAND,
28314 reg: regInfo{
28315 inputs: []inputInfo{
28316 {0, 234881022},
28317 {1, 234881022},
28318 },
28319 outputs: []outputInfo{
28320 {0, 167772158},
28321 },
28322 },
28323 },
28324 {
28325 name: "ANDconst",
28326 auxType: auxInt64,
28327 argLen: 1,
28328 asm: mips.AAND,
28329 reg: regInfo{
28330 inputs: []inputInfo{
28331 {0, 234881022},
28332 },
28333 outputs: []outputInfo{
28334 {0, 167772158},
28335 },
28336 },
28337 },
28338 {
28339 name: "OR",
28340 argLen: 2,
28341 commutative: true,
28342 asm: mips.AOR,
28343 reg: regInfo{
28344 inputs: []inputInfo{
28345 {0, 234881022},
28346 {1, 234881022},
28347 },
28348 outputs: []outputInfo{
28349 {0, 167772158},
28350 },
28351 },
28352 },
28353 {
28354 name: "ORconst",
28355 auxType: auxInt64,
28356 argLen: 1,
28357 asm: mips.AOR,
28358 reg: regInfo{
28359 inputs: []inputInfo{
28360 {0, 234881022},
28361 },
28362 outputs: []outputInfo{
28363 {0, 167772158},
28364 },
28365 },
28366 },
28367 {
28368 name: "XOR",
28369 argLen: 2,
28370 commutative: true,
28371 asm: mips.AXOR,
28372 reg: regInfo{
28373 inputs: []inputInfo{
28374 {0, 234881022},
28375 {1, 234881022},
28376 },
28377 outputs: []outputInfo{
28378 {0, 167772158},
28379 },
28380 },
28381 },
28382 {
28383 name: "XORconst",
28384 auxType: auxInt64,
28385 argLen: 1,
28386 asm: mips.AXOR,
28387 reg: regInfo{
28388 inputs: []inputInfo{
28389 {0, 234881022},
28390 },
28391 outputs: []outputInfo{
28392 {0, 167772158},
28393 },
28394 },
28395 },
28396 {
28397 name: "NOR",
28398 argLen: 2,
28399 commutative: true,
28400 asm: mips.ANOR,
28401 reg: regInfo{
28402 inputs: []inputInfo{
28403 {0, 234881022},
28404 {1, 234881022},
28405 },
28406 outputs: []outputInfo{
28407 {0, 167772158},
28408 },
28409 },
28410 },
28411 {
28412 name: "NORconst",
28413 auxType: auxInt64,
28414 argLen: 1,
28415 asm: mips.ANOR,
28416 reg: regInfo{
28417 inputs: []inputInfo{
28418 {0, 234881022},
28419 },
28420 outputs: []outputInfo{
28421 {0, 167772158},
28422 },
28423 },
28424 },
28425 {
28426 name: "NEGV",
28427 argLen: 1,
28428 reg: regInfo{
28429 inputs: []inputInfo{
28430 {0, 234881022},
28431 },
28432 outputs: []outputInfo{
28433 {0, 167772158},
28434 },
28435 },
28436 },
28437 {
28438 name: "NEGF",
28439 argLen: 1,
28440 asm: mips.ANEGF,
28441 reg: regInfo{
28442 inputs: []inputInfo{
28443 {0, 1152921504338411520},
28444 },
28445 outputs: []outputInfo{
28446 {0, 1152921504338411520},
28447 },
28448 },
28449 },
28450 {
28451 name: "NEGD",
28452 argLen: 1,
28453 asm: mips.ANEGD,
28454 reg: regInfo{
28455 inputs: []inputInfo{
28456 {0, 1152921504338411520},
28457 },
28458 outputs: []outputInfo{
28459 {0, 1152921504338411520},
28460 },
28461 },
28462 },
28463 {
28464 name: "ABSD",
28465 argLen: 1,
28466 asm: mips.AABSD,
28467 reg: regInfo{
28468 inputs: []inputInfo{
28469 {0, 1152921504338411520},
28470 },
28471 outputs: []outputInfo{
28472 {0, 1152921504338411520},
28473 },
28474 },
28475 },
28476 {
28477 name: "SQRTD",
28478 argLen: 1,
28479 asm: mips.ASQRTD,
28480 reg: regInfo{
28481 inputs: []inputInfo{
28482 {0, 1152921504338411520},
28483 },
28484 outputs: []outputInfo{
28485 {0, 1152921504338411520},
28486 },
28487 },
28488 },
28489 {
28490 name: "SQRTF",
28491 argLen: 1,
28492 asm: mips.ASQRTF,
28493 reg: regInfo{
28494 inputs: []inputInfo{
28495 {0, 1152921504338411520},
28496 },
28497 outputs: []outputInfo{
28498 {0, 1152921504338411520},
28499 },
28500 },
28501 },
28502 {
28503 name: "SLLV",
28504 argLen: 2,
28505 asm: mips.ASLLV,
28506 reg: regInfo{
28507 inputs: []inputInfo{
28508 {0, 234881022},
28509 {1, 234881022},
28510 },
28511 outputs: []outputInfo{
28512 {0, 167772158},
28513 },
28514 },
28515 },
28516 {
28517 name: "SLLVconst",
28518 auxType: auxInt64,
28519 argLen: 1,
28520 asm: mips.ASLLV,
28521 reg: regInfo{
28522 inputs: []inputInfo{
28523 {0, 234881022},
28524 },
28525 outputs: []outputInfo{
28526 {0, 167772158},
28527 },
28528 },
28529 },
28530 {
28531 name: "SRLV",
28532 argLen: 2,
28533 asm: mips.ASRLV,
28534 reg: regInfo{
28535 inputs: []inputInfo{
28536 {0, 234881022},
28537 {1, 234881022},
28538 },
28539 outputs: []outputInfo{
28540 {0, 167772158},
28541 },
28542 },
28543 },
28544 {
28545 name: "SRLVconst",
28546 auxType: auxInt64,
28547 argLen: 1,
28548 asm: mips.ASRLV,
28549 reg: regInfo{
28550 inputs: []inputInfo{
28551 {0, 234881022},
28552 },
28553 outputs: []outputInfo{
28554 {0, 167772158},
28555 },
28556 },
28557 },
28558 {
28559 name: "SRAV",
28560 argLen: 2,
28561 asm: mips.ASRAV,
28562 reg: regInfo{
28563 inputs: []inputInfo{
28564 {0, 234881022},
28565 {1, 234881022},
28566 },
28567 outputs: []outputInfo{
28568 {0, 167772158},
28569 },
28570 },
28571 },
28572 {
28573 name: "SRAVconst",
28574 auxType: auxInt64,
28575 argLen: 1,
28576 asm: mips.ASRAV,
28577 reg: regInfo{
28578 inputs: []inputInfo{
28579 {0, 234881022},
28580 },
28581 outputs: []outputInfo{
28582 {0, 167772158},
28583 },
28584 },
28585 },
28586 {
28587 name: "SGT",
28588 argLen: 2,
28589 asm: mips.ASGT,
28590 reg: regInfo{
28591 inputs: []inputInfo{
28592 {0, 234881022},
28593 {1, 234881022},
28594 },
28595 outputs: []outputInfo{
28596 {0, 167772158},
28597 },
28598 },
28599 },
28600 {
28601 name: "SGTconst",
28602 auxType: auxInt64,
28603 argLen: 1,
28604 asm: mips.ASGT,
28605 reg: regInfo{
28606 inputs: []inputInfo{
28607 {0, 234881022},
28608 },
28609 outputs: []outputInfo{
28610 {0, 167772158},
28611 },
28612 },
28613 },
28614 {
28615 name: "SGTU",
28616 argLen: 2,
28617 asm: mips.ASGTU,
28618 reg: regInfo{
28619 inputs: []inputInfo{
28620 {0, 234881022},
28621 {1, 234881022},
28622 },
28623 outputs: []outputInfo{
28624 {0, 167772158},
28625 },
28626 },
28627 },
28628 {
28629 name: "SGTUconst",
28630 auxType: auxInt64,
28631 argLen: 1,
28632 asm: mips.ASGTU,
28633 reg: regInfo{
28634 inputs: []inputInfo{
28635 {0, 234881022},
28636 },
28637 outputs: []outputInfo{
28638 {0, 167772158},
28639 },
28640 },
28641 },
28642 {
28643 name: "CMPEQF",
28644 argLen: 2,
28645 asm: mips.ACMPEQF,
28646 reg: regInfo{
28647 inputs: []inputInfo{
28648 {0, 1152921504338411520},
28649 {1, 1152921504338411520},
28650 },
28651 },
28652 },
28653 {
28654 name: "CMPEQD",
28655 argLen: 2,
28656 asm: mips.ACMPEQD,
28657 reg: regInfo{
28658 inputs: []inputInfo{
28659 {0, 1152921504338411520},
28660 {1, 1152921504338411520},
28661 },
28662 },
28663 },
28664 {
28665 name: "CMPGEF",
28666 argLen: 2,
28667 asm: mips.ACMPGEF,
28668 reg: regInfo{
28669 inputs: []inputInfo{
28670 {0, 1152921504338411520},
28671 {1, 1152921504338411520},
28672 },
28673 },
28674 },
28675 {
28676 name: "CMPGED",
28677 argLen: 2,
28678 asm: mips.ACMPGED,
28679 reg: regInfo{
28680 inputs: []inputInfo{
28681 {0, 1152921504338411520},
28682 {1, 1152921504338411520},
28683 },
28684 },
28685 },
28686 {
28687 name: "CMPGTF",
28688 argLen: 2,
28689 asm: mips.ACMPGTF,
28690 reg: regInfo{
28691 inputs: []inputInfo{
28692 {0, 1152921504338411520},
28693 {1, 1152921504338411520},
28694 },
28695 },
28696 },
28697 {
28698 name: "CMPGTD",
28699 argLen: 2,
28700 asm: mips.ACMPGTD,
28701 reg: regInfo{
28702 inputs: []inputInfo{
28703 {0, 1152921504338411520},
28704 {1, 1152921504338411520},
28705 },
28706 },
28707 },
28708 {
28709 name: "MOVVconst",
28710 auxType: auxInt64,
28711 argLen: 0,
28712 rematerializeable: true,
28713 asm: mips.AMOVV,
28714 reg: regInfo{
28715 outputs: []outputInfo{
28716 {0, 167772158},
28717 },
28718 },
28719 },
28720 {
28721 name: "MOVFconst",
28722 auxType: auxFloat64,
28723 argLen: 0,
28724 rematerializeable: true,
28725 asm: mips.AMOVF,
28726 reg: regInfo{
28727 outputs: []outputInfo{
28728 {0, 1152921504338411520},
28729 },
28730 },
28731 },
28732 {
28733 name: "MOVDconst",
28734 auxType: auxFloat64,
28735 argLen: 0,
28736 rematerializeable: true,
28737 asm: mips.AMOVD,
28738 reg: regInfo{
28739 outputs: []outputInfo{
28740 {0, 1152921504338411520},
28741 },
28742 },
28743 },
28744 {
28745 name: "MOVVaddr",
28746 auxType: auxSymOff,
28747 argLen: 1,
28748 rematerializeable: true,
28749 symEffect: SymAddr,
28750 asm: mips.AMOVV,
28751 reg: regInfo{
28752 inputs: []inputInfo{
28753 {0, 4611686018460942336},
28754 },
28755 outputs: []outputInfo{
28756 {0, 167772158},
28757 },
28758 },
28759 },
28760 {
28761 name: "MOVBload",
28762 auxType: auxSymOff,
28763 argLen: 2,
28764 faultOnNilArg0: true,
28765 symEffect: SymRead,
28766 asm: mips.AMOVB,
28767 reg: regInfo{
28768 inputs: []inputInfo{
28769 {0, 4611686018695823358},
28770 },
28771 outputs: []outputInfo{
28772 {0, 167772158},
28773 },
28774 },
28775 },
28776 {
28777 name: "MOVBUload",
28778 auxType: auxSymOff,
28779 argLen: 2,
28780 faultOnNilArg0: true,
28781 symEffect: SymRead,
28782 asm: mips.AMOVBU,
28783 reg: regInfo{
28784 inputs: []inputInfo{
28785 {0, 4611686018695823358},
28786 },
28787 outputs: []outputInfo{
28788 {0, 167772158},
28789 },
28790 },
28791 },
28792 {
28793 name: "MOVHload",
28794 auxType: auxSymOff,
28795 argLen: 2,
28796 faultOnNilArg0: true,
28797 symEffect: SymRead,
28798 asm: mips.AMOVH,
28799 reg: regInfo{
28800 inputs: []inputInfo{
28801 {0, 4611686018695823358},
28802 },
28803 outputs: []outputInfo{
28804 {0, 167772158},
28805 },
28806 },
28807 },
28808 {
28809 name: "MOVHUload",
28810 auxType: auxSymOff,
28811 argLen: 2,
28812 faultOnNilArg0: true,
28813 symEffect: SymRead,
28814 asm: mips.AMOVHU,
28815 reg: regInfo{
28816 inputs: []inputInfo{
28817 {0, 4611686018695823358},
28818 },
28819 outputs: []outputInfo{
28820 {0, 167772158},
28821 },
28822 },
28823 },
28824 {
28825 name: "MOVWload",
28826 auxType: auxSymOff,
28827 argLen: 2,
28828 faultOnNilArg0: true,
28829 symEffect: SymRead,
28830 asm: mips.AMOVW,
28831 reg: regInfo{
28832 inputs: []inputInfo{
28833 {0, 4611686018695823358},
28834 },
28835 outputs: []outputInfo{
28836 {0, 167772158},
28837 },
28838 },
28839 },
28840 {
28841 name: "MOVWUload",
28842 auxType: auxSymOff,
28843 argLen: 2,
28844 faultOnNilArg0: true,
28845 symEffect: SymRead,
28846 asm: mips.AMOVWU,
28847 reg: regInfo{
28848 inputs: []inputInfo{
28849 {0, 4611686018695823358},
28850 },
28851 outputs: []outputInfo{
28852 {0, 167772158},
28853 },
28854 },
28855 },
28856 {
28857 name: "MOVVload",
28858 auxType: auxSymOff,
28859 argLen: 2,
28860 faultOnNilArg0: true,
28861 symEffect: SymRead,
28862 asm: mips.AMOVV,
28863 reg: regInfo{
28864 inputs: []inputInfo{
28865 {0, 4611686018695823358},
28866 },
28867 outputs: []outputInfo{
28868 {0, 167772158},
28869 },
28870 },
28871 },
28872 {
28873 name: "MOVFload",
28874 auxType: auxSymOff,
28875 argLen: 2,
28876 faultOnNilArg0: true,
28877 symEffect: SymRead,
28878 asm: mips.AMOVF,
28879 reg: regInfo{
28880 inputs: []inputInfo{
28881 {0, 4611686018695823358},
28882 },
28883 outputs: []outputInfo{
28884 {0, 1152921504338411520},
28885 },
28886 },
28887 },
28888 {
28889 name: "MOVDload",
28890 auxType: auxSymOff,
28891 argLen: 2,
28892 faultOnNilArg0: true,
28893 symEffect: SymRead,
28894 asm: mips.AMOVD,
28895 reg: regInfo{
28896 inputs: []inputInfo{
28897 {0, 4611686018695823358},
28898 },
28899 outputs: []outputInfo{
28900 {0, 1152921504338411520},
28901 },
28902 },
28903 },
28904 {
28905 name: "MOVBstore",
28906 auxType: auxSymOff,
28907 argLen: 3,
28908 faultOnNilArg0: true,
28909 symEffect: SymWrite,
28910 asm: mips.AMOVB,
28911 reg: regInfo{
28912 inputs: []inputInfo{
28913 {1, 234881022},
28914 {0, 4611686018695823358},
28915 },
28916 },
28917 },
28918 {
28919 name: "MOVHstore",
28920 auxType: auxSymOff,
28921 argLen: 3,
28922 faultOnNilArg0: true,
28923 symEffect: SymWrite,
28924 asm: mips.AMOVH,
28925 reg: regInfo{
28926 inputs: []inputInfo{
28927 {1, 234881022},
28928 {0, 4611686018695823358},
28929 },
28930 },
28931 },
28932 {
28933 name: "MOVWstore",
28934 auxType: auxSymOff,
28935 argLen: 3,
28936 faultOnNilArg0: true,
28937 symEffect: SymWrite,
28938 asm: mips.AMOVW,
28939 reg: regInfo{
28940 inputs: []inputInfo{
28941 {1, 234881022},
28942 {0, 4611686018695823358},
28943 },
28944 },
28945 },
28946 {
28947 name: "MOVVstore",
28948 auxType: auxSymOff,
28949 argLen: 3,
28950 faultOnNilArg0: true,
28951 symEffect: SymWrite,
28952 asm: mips.AMOVV,
28953 reg: regInfo{
28954 inputs: []inputInfo{
28955 {1, 234881022},
28956 {0, 4611686018695823358},
28957 },
28958 },
28959 },
28960 {
28961 name: "MOVFstore",
28962 auxType: auxSymOff,
28963 argLen: 3,
28964 faultOnNilArg0: true,
28965 symEffect: SymWrite,
28966 asm: mips.AMOVF,
28967 reg: regInfo{
28968 inputs: []inputInfo{
28969 {0, 4611686018695823358},
28970 {1, 1152921504338411520},
28971 },
28972 },
28973 },
28974 {
28975 name: "MOVDstore",
28976 auxType: auxSymOff,
28977 argLen: 3,
28978 faultOnNilArg0: true,
28979 symEffect: SymWrite,
28980 asm: mips.AMOVD,
28981 reg: regInfo{
28982 inputs: []inputInfo{
28983 {0, 4611686018695823358},
28984 {1, 1152921504338411520},
28985 },
28986 },
28987 },
28988 {
28989 name: "MOVBstorezero",
28990 auxType: auxSymOff,
28991 argLen: 2,
28992 faultOnNilArg0: true,
28993 symEffect: SymWrite,
28994 asm: mips.AMOVB,
28995 reg: regInfo{
28996 inputs: []inputInfo{
28997 {0, 4611686018695823358},
28998 },
28999 },
29000 },
29001 {
29002 name: "MOVHstorezero",
29003 auxType: auxSymOff,
29004 argLen: 2,
29005 faultOnNilArg0: true,
29006 symEffect: SymWrite,
29007 asm: mips.AMOVH,
29008 reg: regInfo{
29009 inputs: []inputInfo{
29010 {0, 4611686018695823358},
29011 },
29012 },
29013 },
29014 {
29015 name: "MOVWstorezero",
29016 auxType: auxSymOff,
29017 argLen: 2,
29018 faultOnNilArg0: true,
29019 symEffect: SymWrite,
29020 asm: mips.AMOVW,
29021 reg: regInfo{
29022 inputs: []inputInfo{
29023 {0, 4611686018695823358},
29024 },
29025 },
29026 },
29027 {
29028 name: "MOVVstorezero",
29029 auxType: auxSymOff,
29030 argLen: 2,
29031 faultOnNilArg0: true,
29032 symEffect: SymWrite,
29033 asm: mips.AMOVV,
29034 reg: regInfo{
29035 inputs: []inputInfo{
29036 {0, 4611686018695823358},
29037 },
29038 },
29039 },
29040 {
29041 name: "MOVWfpgp",
29042 argLen: 1,
29043 asm: mips.AMOVW,
29044 reg: regInfo{
29045 inputs: []inputInfo{
29046 {0, 1152921504338411520},
29047 },
29048 outputs: []outputInfo{
29049 {0, 167772158},
29050 },
29051 },
29052 },
29053 {
29054 name: "MOVWgpfp",
29055 argLen: 1,
29056 asm: mips.AMOVW,
29057 reg: regInfo{
29058 inputs: []inputInfo{
29059 {0, 167772158},
29060 },
29061 outputs: []outputInfo{
29062 {0, 1152921504338411520},
29063 },
29064 },
29065 },
29066 {
29067 name: "MOVVfpgp",
29068 argLen: 1,
29069 asm: mips.AMOVV,
29070 reg: regInfo{
29071 inputs: []inputInfo{
29072 {0, 1152921504338411520},
29073 },
29074 outputs: []outputInfo{
29075 {0, 167772158},
29076 },
29077 },
29078 },
29079 {
29080 name: "MOVVgpfp",
29081 argLen: 1,
29082 asm: mips.AMOVV,
29083 reg: regInfo{
29084 inputs: []inputInfo{
29085 {0, 167772158},
29086 },
29087 outputs: []outputInfo{
29088 {0, 1152921504338411520},
29089 },
29090 },
29091 },
29092 {
29093 name: "MOVBreg",
29094 argLen: 1,
29095 asm: mips.AMOVB,
29096 reg: regInfo{
29097 inputs: []inputInfo{
29098 {0, 234881022},
29099 },
29100 outputs: []outputInfo{
29101 {0, 167772158},
29102 },
29103 },
29104 },
29105 {
29106 name: "MOVBUreg",
29107 argLen: 1,
29108 asm: mips.AMOVBU,
29109 reg: regInfo{
29110 inputs: []inputInfo{
29111 {0, 234881022},
29112 },
29113 outputs: []outputInfo{
29114 {0, 167772158},
29115 },
29116 },
29117 },
29118 {
29119 name: "MOVHreg",
29120 argLen: 1,
29121 asm: mips.AMOVH,
29122 reg: regInfo{
29123 inputs: []inputInfo{
29124 {0, 234881022},
29125 },
29126 outputs: []outputInfo{
29127 {0, 167772158},
29128 },
29129 },
29130 },
29131 {
29132 name: "MOVHUreg",
29133 argLen: 1,
29134 asm: mips.AMOVHU,
29135 reg: regInfo{
29136 inputs: []inputInfo{
29137 {0, 234881022},
29138 },
29139 outputs: []outputInfo{
29140 {0, 167772158},
29141 },
29142 },
29143 },
29144 {
29145 name: "MOVWreg",
29146 argLen: 1,
29147 asm: mips.AMOVW,
29148 reg: regInfo{
29149 inputs: []inputInfo{
29150 {0, 234881022},
29151 },
29152 outputs: []outputInfo{
29153 {0, 167772158},
29154 },
29155 },
29156 },
29157 {
29158 name: "MOVWUreg",
29159 argLen: 1,
29160 asm: mips.AMOVWU,
29161 reg: regInfo{
29162 inputs: []inputInfo{
29163 {0, 234881022},
29164 },
29165 outputs: []outputInfo{
29166 {0, 167772158},
29167 },
29168 },
29169 },
29170 {
29171 name: "MOVVreg",
29172 argLen: 1,
29173 asm: mips.AMOVV,
29174 reg: regInfo{
29175 inputs: []inputInfo{
29176 {0, 234881022},
29177 },
29178 outputs: []outputInfo{
29179 {0, 167772158},
29180 },
29181 },
29182 },
29183 {
29184 name: "MOVVnop",
29185 argLen: 1,
29186 resultInArg0: true,
29187 reg: regInfo{
29188 inputs: []inputInfo{
29189 {0, 167772158},
29190 },
29191 outputs: []outputInfo{
29192 {0, 167772158},
29193 },
29194 },
29195 },
29196 {
29197 name: "MOVWF",
29198 argLen: 1,
29199 asm: mips.AMOVWF,
29200 reg: regInfo{
29201 inputs: []inputInfo{
29202 {0, 1152921504338411520},
29203 },
29204 outputs: []outputInfo{
29205 {0, 1152921504338411520},
29206 },
29207 },
29208 },
29209 {
29210 name: "MOVWD",
29211 argLen: 1,
29212 asm: mips.AMOVWD,
29213 reg: regInfo{
29214 inputs: []inputInfo{
29215 {0, 1152921504338411520},
29216 },
29217 outputs: []outputInfo{
29218 {0, 1152921504338411520},
29219 },
29220 },
29221 },
29222 {
29223 name: "MOVVF",
29224 argLen: 1,
29225 asm: mips.AMOVVF,
29226 reg: regInfo{
29227 inputs: []inputInfo{
29228 {0, 1152921504338411520},
29229 },
29230 outputs: []outputInfo{
29231 {0, 1152921504338411520},
29232 },
29233 },
29234 },
29235 {
29236 name: "MOVVD",
29237 argLen: 1,
29238 asm: mips.AMOVVD,
29239 reg: regInfo{
29240 inputs: []inputInfo{
29241 {0, 1152921504338411520},
29242 },
29243 outputs: []outputInfo{
29244 {0, 1152921504338411520},
29245 },
29246 },
29247 },
29248 {
29249 name: "TRUNCFW",
29250 argLen: 1,
29251 asm: mips.ATRUNCFW,
29252 reg: regInfo{
29253 inputs: []inputInfo{
29254 {0, 1152921504338411520},
29255 },
29256 outputs: []outputInfo{
29257 {0, 1152921504338411520},
29258 },
29259 },
29260 },
29261 {
29262 name: "TRUNCDW",
29263 argLen: 1,
29264 asm: mips.ATRUNCDW,
29265 reg: regInfo{
29266 inputs: []inputInfo{
29267 {0, 1152921504338411520},
29268 },
29269 outputs: []outputInfo{
29270 {0, 1152921504338411520},
29271 },
29272 },
29273 },
29274 {
29275 name: "TRUNCFV",
29276 argLen: 1,
29277 asm: mips.ATRUNCFV,
29278 reg: regInfo{
29279 inputs: []inputInfo{
29280 {0, 1152921504338411520},
29281 },
29282 outputs: []outputInfo{
29283 {0, 1152921504338411520},
29284 },
29285 },
29286 },
29287 {
29288 name: "TRUNCDV",
29289 argLen: 1,
29290 asm: mips.ATRUNCDV,
29291 reg: regInfo{
29292 inputs: []inputInfo{
29293 {0, 1152921504338411520},
29294 },
29295 outputs: []outputInfo{
29296 {0, 1152921504338411520},
29297 },
29298 },
29299 },
29300 {
29301 name: "MOVFD",
29302 argLen: 1,
29303 asm: mips.AMOVFD,
29304 reg: regInfo{
29305 inputs: []inputInfo{
29306 {0, 1152921504338411520},
29307 },
29308 outputs: []outputInfo{
29309 {0, 1152921504338411520},
29310 },
29311 },
29312 },
29313 {
29314 name: "MOVDF",
29315 argLen: 1,
29316 asm: mips.AMOVDF,
29317 reg: regInfo{
29318 inputs: []inputInfo{
29319 {0, 1152921504338411520},
29320 },
29321 outputs: []outputInfo{
29322 {0, 1152921504338411520},
29323 },
29324 },
29325 },
29326 {
29327 name: "CALLstatic",
29328 auxType: auxCallOff,
29329 argLen: 1,
29330 clobberFlags: true,
29331 call: true,
29332 reg: regInfo{
29333 clobbers: 4611686018393833470,
29334 },
29335 },
29336 {
29337 name: "CALLtail",
29338 auxType: auxCallOff,
29339 argLen: 1,
29340 clobberFlags: true,
29341 call: true,
29342 tailCall: true,
29343 reg: regInfo{
29344 clobbers: 4611686018393833470,
29345 },
29346 },
29347 {
29348 name: "CALLclosure",
29349 auxType: auxCallOff,
29350 argLen: 3,
29351 clobberFlags: true,
29352 call: true,
29353 reg: regInfo{
29354 inputs: []inputInfo{
29355 {1, 4194304},
29356 {0, 201326590},
29357 },
29358 clobbers: 4611686018393833470,
29359 },
29360 },
29361 {
29362 name: "CALLinter",
29363 auxType: auxCallOff,
29364 argLen: 2,
29365 clobberFlags: true,
29366 call: true,
29367 reg: regInfo{
29368 inputs: []inputInfo{
29369 {0, 167772158},
29370 },
29371 clobbers: 4611686018393833470,
29372 },
29373 },
29374 {
29375 name: "DUFFZERO",
29376 auxType: auxInt64,
29377 argLen: 2,
29378 faultOnNilArg0: true,
29379 reg: regInfo{
29380 inputs: []inputInfo{
29381 {0, 167772158},
29382 },
29383 clobbers: 134217730,
29384 },
29385 },
29386 {
29387 name: "DUFFCOPY",
29388 auxType: auxInt64,
29389 argLen: 3,
29390 faultOnNilArg0: true,
29391 faultOnNilArg1: true,
29392 reg: regInfo{
29393 inputs: []inputInfo{
29394 {0, 4},
29395 {1, 2},
29396 },
29397 clobbers: 134217734,
29398 },
29399 },
29400 {
29401 name: "LoweredZero",
29402 auxType: auxInt64,
29403 argLen: 3,
29404 clobberFlags: true,
29405 faultOnNilArg0: true,
29406 reg: regInfo{
29407 inputs: []inputInfo{
29408 {0, 2},
29409 {1, 167772158},
29410 },
29411 clobbers: 2,
29412 },
29413 },
29414 {
29415 name: "LoweredMove",
29416 auxType: auxInt64,
29417 argLen: 4,
29418 clobberFlags: true,
29419 faultOnNilArg0: true,
29420 faultOnNilArg1: true,
29421 reg: regInfo{
29422 inputs: []inputInfo{
29423 {0, 4},
29424 {1, 2},
29425 {2, 167772158},
29426 },
29427 clobbers: 6,
29428 },
29429 },
29430 {
29431 name: "LoweredAtomicAnd32",
29432 argLen: 3,
29433 faultOnNilArg0: true,
29434 hasSideEffects: true,
29435 unsafePoint: true,
29436 asm: mips.AAND,
29437 reg: regInfo{
29438 inputs: []inputInfo{
29439 {1, 234881022},
29440 {0, 4611686018695823358},
29441 },
29442 },
29443 },
29444 {
29445 name: "LoweredAtomicOr32",
29446 argLen: 3,
29447 faultOnNilArg0: true,
29448 hasSideEffects: true,
29449 unsafePoint: true,
29450 asm: mips.AOR,
29451 reg: regInfo{
29452 inputs: []inputInfo{
29453 {1, 234881022},
29454 {0, 4611686018695823358},
29455 },
29456 },
29457 },
29458 {
29459 name: "LoweredAtomicLoad8",
29460 argLen: 2,
29461 faultOnNilArg0: true,
29462 reg: regInfo{
29463 inputs: []inputInfo{
29464 {0, 4611686018695823358},
29465 },
29466 outputs: []outputInfo{
29467 {0, 167772158},
29468 },
29469 },
29470 },
29471 {
29472 name: "LoweredAtomicLoad32",
29473 argLen: 2,
29474 faultOnNilArg0: true,
29475 reg: regInfo{
29476 inputs: []inputInfo{
29477 {0, 4611686018695823358},
29478 },
29479 outputs: []outputInfo{
29480 {0, 167772158},
29481 },
29482 },
29483 },
29484 {
29485 name: "LoweredAtomicLoad64",
29486 argLen: 2,
29487 faultOnNilArg0: true,
29488 reg: regInfo{
29489 inputs: []inputInfo{
29490 {0, 4611686018695823358},
29491 },
29492 outputs: []outputInfo{
29493 {0, 167772158},
29494 },
29495 },
29496 },
29497 {
29498 name: "LoweredAtomicStore8",
29499 argLen: 3,
29500 faultOnNilArg0: true,
29501 hasSideEffects: true,
29502 reg: regInfo{
29503 inputs: []inputInfo{
29504 {1, 234881022},
29505 {0, 4611686018695823358},
29506 },
29507 },
29508 },
29509 {
29510 name: "LoweredAtomicStore32",
29511 argLen: 3,
29512 faultOnNilArg0: true,
29513 hasSideEffects: true,
29514 reg: regInfo{
29515 inputs: []inputInfo{
29516 {1, 234881022},
29517 {0, 4611686018695823358},
29518 },
29519 },
29520 },
29521 {
29522 name: "LoweredAtomicStore64",
29523 argLen: 3,
29524 faultOnNilArg0: true,
29525 hasSideEffects: true,
29526 reg: regInfo{
29527 inputs: []inputInfo{
29528 {1, 234881022},
29529 {0, 4611686018695823358},
29530 },
29531 },
29532 },
29533 {
29534 name: "LoweredAtomicStorezero32",
29535 argLen: 2,
29536 faultOnNilArg0: true,
29537 hasSideEffects: true,
29538 reg: regInfo{
29539 inputs: []inputInfo{
29540 {0, 4611686018695823358},
29541 },
29542 },
29543 },
29544 {
29545 name: "LoweredAtomicStorezero64",
29546 argLen: 2,
29547 faultOnNilArg0: true,
29548 hasSideEffects: true,
29549 reg: regInfo{
29550 inputs: []inputInfo{
29551 {0, 4611686018695823358},
29552 },
29553 },
29554 },
29555 {
29556 name: "LoweredAtomicExchange32",
29557 argLen: 3,
29558 resultNotInArgs: true,
29559 faultOnNilArg0: true,
29560 hasSideEffects: true,
29561 unsafePoint: true,
29562 reg: regInfo{
29563 inputs: []inputInfo{
29564 {1, 234881022},
29565 {0, 4611686018695823358},
29566 },
29567 outputs: []outputInfo{
29568 {0, 167772158},
29569 },
29570 },
29571 },
29572 {
29573 name: "LoweredAtomicExchange64",
29574 argLen: 3,
29575 resultNotInArgs: true,
29576 faultOnNilArg0: true,
29577 hasSideEffects: true,
29578 unsafePoint: true,
29579 reg: regInfo{
29580 inputs: []inputInfo{
29581 {1, 234881022},
29582 {0, 4611686018695823358},
29583 },
29584 outputs: []outputInfo{
29585 {0, 167772158},
29586 },
29587 },
29588 },
29589 {
29590 name: "LoweredAtomicAdd32",
29591 argLen: 3,
29592 resultNotInArgs: true,
29593 faultOnNilArg0: true,
29594 hasSideEffects: true,
29595 unsafePoint: true,
29596 reg: regInfo{
29597 inputs: []inputInfo{
29598 {1, 234881022},
29599 {0, 4611686018695823358},
29600 },
29601 outputs: []outputInfo{
29602 {0, 167772158},
29603 },
29604 },
29605 },
29606 {
29607 name: "LoweredAtomicAdd64",
29608 argLen: 3,
29609 resultNotInArgs: true,
29610 faultOnNilArg0: true,
29611 hasSideEffects: true,
29612 unsafePoint: true,
29613 reg: regInfo{
29614 inputs: []inputInfo{
29615 {1, 234881022},
29616 {0, 4611686018695823358},
29617 },
29618 outputs: []outputInfo{
29619 {0, 167772158},
29620 },
29621 },
29622 },
29623 {
29624 name: "LoweredAtomicAddconst32",
29625 auxType: auxInt32,
29626 argLen: 2,
29627 resultNotInArgs: true,
29628 faultOnNilArg0: true,
29629 hasSideEffects: true,
29630 unsafePoint: true,
29631 reg: regInfo{
29632 inputs: []inputInfo{
29633 {0, 4611686018695823358},
29634 },
29635 outputs: []outputInfo{
29636 {0, 167772158},
29637 },
29638 },
29639 },
29640 {
29641 name: "LoweredAtomicAddconst64",
29642 auxType: auxInt64,
29643 argLen: 2,
29644 resultNotInArgs: true,
29645 faultOnNilArg0: true,
29646 hasSideEffects: true,
29647 unsafePoint: true,
29648 reg: regInfo{
29649 inputs: []inputInfo{
29650 {0, 4611686018695823358},
29651 },
29652 outputs: []outputInfo{
29653 {0, 167772158},
29654 },
29655 },
29656 },
29657 {
29658 name: "LoweredAtomicCas32",
29659 argLen: 4,
29660 resultNotInArgs: true,
29661 faultOnNilArg0: true,
29662 hasSideEffects: true,
29663 unsafePoint: true,
29664 reg: regInfo{
29665 inputs: []inputInfo{
29666 {1, 234881022},
29667 {2, 234881022},
29668 {0, 4611686018695823358},
29669 },
29670 outputs: []outputInfo{
29671 {0, 167772158},
29672 },
29673 },
29674 },
29675 {
29676 name: "LoweredAtomicCas64",
29677 argLen: 4,
29678 resultNotInArgs: true,
29679 faultOnNilArg0: true,
29680 hasSideEffects: true,
29681 unsafePoint: true,
29682 reg: regInfo{
29683 inputs: []inputInfo{
29684 {1, 234881022},
29685 {2, 234881022},
29686 {0, 4611686018695823358},
29687 },
29688 outputs: []outputInfo{
29689 {0, 167772158},
29690 },
29691 },
29692 },
29693 {
29694 name: "LoweredNilCheck",
29695 argLen: 2,
29696 nilCheck: true,
29697 faultOnNilArg0: true,
29698 reg: regInfo{
29699 inputs: []inputInfo{
29700 {0, 234881022},
29701 },
29702 },
29703 },
29704 {
29705 name: "FPFlagTrue",
29706 argLen: 1,
29707 reg: regInfo{
29708 outputs: []outputInfo{
29709 {0, 167772158},
29710 },
29711 },
29712 },
29713 {
29714 name: "FPFlagFalse",
29715 argLen: 1,
29716 reg: regInfo{
29717 outputs: []outputInfo{
29718 {0, 167772158},
29719 },
29720 },
29721 },
29722 {
29723 name: "LoweredGetClosurePtr",
29724 argLen: 0,
29725 zeroWidth: true,
29726 reg: regInfo{
29727 outputs: []outputInfo{
29728 {0, 4194304},
29729 },
29730 },
29731 },
29732 {
29733 name: "LoweredGetCallerSP",
29734 argLen: 1,
29735 rematerializeable: true,
29736 reg: regInfo{
29737 outputs: []outputInfo{
29738 {0, 167772158},
29739 },
29740 },
29741 },
29742 {
29743 name: "LoweredGetCallerPC",
29744 argLen: 0,
29745 rematerializeable: true,
29746 reg: regInfo{
29747 outputs: []outputInfo{
29748 {0, 167772158},
29749 },
29750 },
29751 },
29752 {
29753 name: "LoweredWB",
29754 auxType: auxInt64,
29755 argLen: 1,
29756 clobberFlags: true,
29757 reg: regInfo{
29758 clobbers: 4611686018293170176,
29759 outputs: []outputInfo{
29760 {0, 16777216},
29761 },
29762 },
29763 },
29764 {
29765 name: "LoweredPubBarrier",
29766 argLen: 1,
29767 hasSideEffects: true,
29768 asm: mips.ASYNC,
29769 reg: regInfo{},
29770 },
29771 {
29772 name: "LoweredPanicBoundsA",
29773 auxType: auxInt64,
29774 argLen: 3,
29775 call: true,
29776 reg: regInfo{
29777 inputs: []inputInfo{
29778 {0, 8},
29779 {1, 16},
29780 },
29781 },
29782 },
29783 {
29784 name: "LoweredPanicBoundsB",
29785 auxType: auxInt64,
29786 argLen: 3,
29787 call: true,
29788 reg: regInfo{
29789 inputs: []inputInfo{
29790 {0, 4},
29791 {1, 8},
29792 },
29793 },
29794 },
29795 {
29796 name: "LoweredPanicBoundsC",
29797 auxType: auxInt64,
29798 argLen: 3,
29799 call: true,
29800 reg: regInfo{
29801 inputs: []inputInfo{
29802 {0, 2},
29803 {1, 4},
29804 },
29805 },
29806 },
29807
29808 {
29809 name: "ADD",
29810 argLen: 2,
29811 commutative: true,
29812 asm: ppc64.AADD,
29813 reg: regInfo{
29814 inputs: []inputInfo{
29815 {0, 1073733630},
29816 {1, 1073733630},
29817 },
29818 outputs: []outputInfo{
29819 {0, 1073733624},
29820 },
29821 },
29822 },
29823 {
29824 name: "ADDCC",
29825 argLen: 2,
29826 commutative: true,
29827 asm: ppc64.AADDCC,
29828 reg: regInfo{
29829 inputs: []inputInfo{
29830 {0, 1073733630},
29831 {1, 1073733630},
29832 },
29833 outputs: []outputInfo{
29834 {0, 1073733624},
29835 },
29836 },
29837 },
29838 {
29839 name: "ADDconst",
29840 auxType: auxInt64,
29841 argLen: 1,
29842 asm: ppc64.AADD,
29843 reg: regInfo{
29844 inputs: []inputInfo{
29845 {0, 1073733630},
29846 },
29847 outputs: []outputInfo{
29848 {0, 1073733624},
29849 },
29850 },
29851 },
29852 {
29853 name: "ADDCCconst",
29854 auxType: auxInt64,
29855 argLen: 1,
29856 asm: ppc64.AADDCCC,
29857 reg: regInfo{
29858 inputs: []inputInfo{
29859 {0, 1073733630},
29860 },
29861 clobbers: 9223372036854775808,
29862 outputs: []outputInfo{
29863 {0, 1073733624},
29864 },
29865 },
29866 },
29867 {
29868 name: "FADD",
29869 argLen: 2,
29870 commutative: true,
29871 asm: ppc64.AFADD,
29872 reg: regInfo{
29873 inputs: []inputInfo{
29874 {0, 9223372032559808512},
29875 {1, 9223372032559808512},
29876 },
29877 outputs: []outputInfo{
29878 {0, 9223372032559808512},
29879 },
29880 },
29881 },
29882 {
29883 name: "FADDS",
29884 argLen: 2,
29885 commutative: true,
29886 asm: ppc64.AFADDS,
29887 reg: regInfo{
29888 inputs: []inputInfo{
29889 {0, 9223372032559808512},
29890 {1, 9223372032559808512},
29891 },
29892 outputs: []outputInfo{
29893 {0, 9223372032559808512},
29894 },
29895 },
29896 },
29897 {
29898 name: "SUB",
29899 argLen: 2,
29900 asm: ppc64.ASUB,
29901 reg: regInfo{
29902 inputs: []inputInfo{
29903 {0, 1073733630},
29904 {1, 1073733630},
29905 },
29906 outputs: []outputInfo{
29907 {0, 1073733624},
29908 },
29909 },
29910 },
29911 {
29912 name: "SUBCC",
29913 argLen: 2,
29914 asm: ppc64.ASUBCC,
29915 reg: regInfo{
29916 inputs: []inputInfo{
29917 {0, 1073733630},
29918 {1, 1073733630},
29919 },
29920 outputs: []outputInfo{
29921 {0, 1073733624},
29922 },
29923 },
29924 },
29925 {
29926 name: "SUBFCconst",
29927 auxType: auxInt64,
29928 argLen: 1,
29929 asm: ppc64.ASUBC,
29930 reg: regInfo{
29931 inputs: []inputInfo{
29932 {0, 1073733630},
29933 },
29934 clobbers: 9223372036854775808,
29935 outputs: []outputInfo{
29936 {0, 1073733624},
29937 },
29938 },
29939 },
29940 {
29941 name: "FSUB",
29942 argLen: 2,
29943 asm: ppc64.AFSUB,
29944 reg: regInfo{
29945 inputs: []inputInfo{
29946 {0, 9223372032559808512},
29947 {1, 9223372032559808512},
29948 },
29949 outputs: []outputInfo{
29950 {0, 9223372032559808512},
29951 },
29952 },
29953 },
29954 {
29955 name: "FSUBS",
29956 argLen: 2,
29957 asm: ppc64.AFSUBS,
29958 reg: regInfo{
29959 inputs: []inputInfo{
29960 {0, 9223372032559808512},
29961 {1, 9223372032559808512},
29962 },
29963 outputs: []outputInfo{
29964 {0, 9223372032559808512},
29965 },
29966 },
29967 },
29968 {
29969 name: "XSMINJDP",
29970 argLen: 2,
29971 asm: ppc64.AXSMINJDP,
29972 reg: regInfo{
29973 inputs: []inputInfo{
29974 {0, 9223372032559808512},
29975 {1, 9223372032559808512},
29976 },
29977 outputs: []outputInfo{
29978 {0, 9223372032559808512},
29979 },
29980 },
29981 },
29982 {
29983 name: "XSMAXJDP",
29984 argLen: 2,
29985 asm: ppc64.AXSMAXJDP,
29986 reg: regInfo{
29987 inputs: []inputInfo{
29988 {0, 9223372032559808512},
29989 {1, 9223372032559808512},
29990 },
29991 outputs: []outputInfo{
29992 {0, 9223372032559808512},
29993 },
29994 },
29995 },
29996 {
29997 name: "MULLD",
29998 argLen: 2,
29999 commutative: true,
30000 asm: ppc64.AMULLD,
30001 reg: regInfo{
30002 inputs: []inputInfo{
30003 {0, 1073733630},
30004 {1, 1073733630},
30005 },
30006 outputs: []outputInfo{
30007 {0, 1073733624},
30008 },
30009 },
30010 },
30011 {
30012 name: "MULLW",
30013 argLen: 2,
30014 commutative: true,
30015 asm: ppc64.AMULLW,
30016 reg: regInfo{
30017 inputs: []inputInfo{
30018 {0, 1073733630},
30019 {1, 1073733630},
30020 },
30021 outputs: []outputInfo{
30022 {0, 1073733624},
30023 },
30024 },
30025 },
30026 {
30027 name: "MULLDconst",
30028 auxType: auxInt32,
30029 argLen: 1,
30030 asm: ppc64.AMULLD,
30031 reg: regInfo{
30032 inputs: []inputInfo{
30033 {0, 1073733630},
30034 },
30035 outputs: []outputInfo{
30036 {0, 1073733624},
30037 },
30038 },
30039 },
30040 {
30041 name: "MULLWconst",
30042 auxType: auxInt32,
30043 argLen: 1,
30044 asm: ppc64.AMULLW,
30045 reg: regInfo{
30046 inputs: []inputInfo{
30047 {0, 1073733630},
30048 },
30049 outputs: []outputInfo{
30050 {0, 1073733624},
30051 },
30052 },
30053 },
30054 {
30055 name: "MADDLD",
30056 argLen: 3,
30057 asm: ppc64.AMADDLD,
30058 reg: regInfo{
30059 inputs: []inputInfo{
30060 {0, 1073733630},
30061 {1, 1073733630},
30062 {2, 1073733630},
30063 },
30064 outputs: []outputInfo{
30065 {0, 1073733624},
30066 },
30067 },
30068 },
30069 {
30070 name: "MULHD",
30071 argLen: 2,
30072 commutative: true,
30073 asm: ppc64.AMULHD,
30074 reg: regInfo{
30075 inputs: []inputInfo{
30076 {0, 1073733630},
30077 {1, 1073733630},
30078 },
30079 outputs: []outputInfo{
30080 {0, 1073733624},
30081 },
30082 },
30083 },
30084 {
30085 name: "MULHW",
30086 argLen: 2,
30087 commutative: true,
30088 asm: ppc64.AMULHW,
30089 reg: regInfo{
30090 inputs: []inputInfo{
30091 {0, 1073733630},
30092 {1, 1073733630},
30093 },
30094 outputs: []outputInfo{
30095 {0, 1073733624},
30096 },
30097 },
30098 },
30099 {
30100 name: "MULHDU",
30101 argLen: 2,
30102 commutative: true,
30103 asm: ppc64.AMULHDU,
30104 reg: regInfo{
30105 inputs: []inputInfo{
30106 {0, 1073733630},
30107 {1, 1073733630},
30108 },
30109 outputs: []outputInfo{
30110 {0, 1073733624},
30111 },
30112 },
30113 },
30114 {
30115 name: "MULHDUCC",
30116 argLen: 2,
30117 commutative: true,
30118 asm: ppc64.AMULHDUCC,
30119 reg: regInfo{
30120 inputs: []inputInfo{
30121 {0, 1073733630},
30122 {1, 1073733630},
30123 },
30124 outputs: []outputInfo{
30125 {0, 1073733624},
30126 },
30127 },
30128 },
30129 {
30130 name: "MULHWU",
30131 argLen: 2,
30132 commutative: true,
30133 asm: ppc64.AMULHWU,
30134 reg: regInfo{
30135 inputs: []inputInfo{
30136 {0, 1073733630},
30137 {1, 1073733630},
30138 },
30139 outputs: []outputInfo{
30140 {0, 1073733624},
30141 },
30142 },
30143 },
30144 {
30145 name: "FMUL",
30146 argLen: 2,
30147 commutative: true,
30148 asm: ppc64.AFMUL,
30149 reg: regInfo{
30150 inputs: []inputInfo{
30151 {0, 9223372032559808512},
30152 {1, 9223372032559808512},
30153 },
30154 outputs: []outputInfo{
30155 {0, 9223372032559808512},
30156 },
30157 },
30158 },
30159 {
30160 name: "FMULS",
30161 argLen: 2,
30162 commutative: true,
30163 asm: ppc64.AFMULS,
30164 reg: regInfo{
30165 inputs: []inputInfo{
30166 {0, 9223372032559808512},
30167 {1, 9223372032559808512},
30168 },
30169 outputs: []outputInfo{
30170 {0, 9223372032559808512},
30171 },
30172 },
30173 },
30174 {
30175 name: "FMADD",
30176 argLen: 3,
30177 asm: ppc64.AFMADD,
30178 reg: regInfo{
30179 inputs: []inputInfo{
30180 {0, 9223372032559808512},
30181 {1, 9223372032559808512},
30182 {2, 9223372032559808512},
30183 },
30184 outputs: []outputInfo{
30185 {0, 9223372032559808512},
30186 },
30187 },
30188 },
30189 {
30190 name: "FMADDS",
30191 argLen: 3,
30192 asm: ppc64.AFMADDS,
30193 reg: regInfo{
30194 inputs: []inputInfo{
30195 {0, 9223372032559808512},
30196 {1, 9223372032559808512},
30197 {2, 9223372032559808512},
30198 },
30199 outputs: []outputInfo{
30200 {0, 9223372032559808512},
30201 },
30202 },
30203 },
30204 {
30205 name: "FMSUB",
30206 argLen: 3,
30207 asm: ppc64.AFMSUB,
30208 reg: regInfo{
30209 inputs: []inputInfo{
30210 {0, 9223372032559808512},
30211 {1, 9223372032559808512},
30212 {2, 9223372032559808512},
30213 },
30214 outputs: []outputInfo{
30215 {0, 9223372032559808512},
30216 },
30217 },
30218 },
30219 {
30220 name: "FMSUBS",
30221 argLen: 3,
30222 asm: ppc64.AFMSUBS,
30223 reg: regInfo{
30224 inputs: []inputInfo{
30225 {0, 9223372032559808512},
30226 {1, 9223372032559808512},
30227 {2, 9223372032559808512},
30228 },
30229 outputs: []outputInfo{
30230 {0, 9223372032559808512},
30231 },
30232 },
30233 },
30234 {
30235 name: "SRAD",
30236 argLen: 2,
30237 asm: ppc64.ASRAD,
30238 reg: regInfo{
30239 inputs: []inputInfo{
30240 {0, 1073733630},
30241 {1, 1073733630},
30242 },
30243 clobbers: 9223372036854775808,
30244 outputs: []outputInfo{
30245 {0, 1073733624},
30246 },
30247 },
30248 },
30249 {
30250 name: "SRAW",
30251 argLen: 2,
30252 asm: ppc64.ASRAW,
30253 reg: regInfo{
30254 inputs: []inputInfo{
30255 {0, 1073733630},
30256 {1, 1073733630},
30257 },
30258 clobbers: 9223372036854775808,
30259 outputs: []outputInfo{
30260 {0, 1073733624},
30261 },
30262 },
30263 },
30264 {
30265 name: "SRD",
30266 argLen: 2,
30267 asm: ppc64.ASRD,
30268 reg: regInfo{
30269 inputs: []inputInfo{
30270 {0, 1073733630},
30271 {1, 1073733630},
30272 },
30273 outputs: []outputInfo{
30274 {0, 1073733624},
30275 },
30276 },
30277 },
30278 {
30279 name: "SRW",
30280 argLen: 2,
30281 asm: ppc64.ASRW,
30282 reg: regInfo{
30283 inputs: []inputInfo{
30284 {0, 1073733630},
30285 {1, 1073733630},
30286 },
30287 outputs: []outputInfo{
30288 {0, 1073733624},
30289 },
30290 },
30291 },
30292 {
30293 name: "SLD",
30294 argLen: 2,
30295 asm: ppc64.ASLD,
30296 reg: regInfo{
30297 inputs: []inputInfo{
30298 {0, 1073733630},
30299 {1, 1073733630},
30300 },
30301 outputs: []outputInfo{
30302 {0, 1073733624},
30303 },
30304 },
30305 },
30306 {
30307 name: "SLW",
30308 argLen: 2,
30309 asm: ppc64.ASLW,
30310 reg: regInfo{
30311 inputs: []inputInfo{
30312 {0, 1073733630},
30313 {1, 1073733630},
30314 },
30315 outputs: []outputInfo{
30316 {0, 1073733624},
30317 },
30318 },
30319 },
30320 {
30321 name: "ROTL",
30322 argLen: 2,
30323 asm: ppc64.AROTL,
30324 reg: regInfo{
30325 inputs: []inputInfo{
30326 {0, 1073733630},
30327 {1, 1073733630},
30328 },
30329 outputs: []outputInfo{
30330 {0, 1073733624},
30331 },
30332 },
30333 },
30334 {
30335 name: "ROTLW",
30336 argLen: 2,
30337 asm: ppc64.AROTLW,
30338 reg: regInfo{
30339 inputs: []inputInfo{
30340 {0, 1073733630},
30341 {1, 1073733630},
30342 },
30343 outputs: []outputInfo{
30344 {0, 1073733624},
30345 },
30346 },
30347 },
30348 {
30349 name: "CLRLSLWI",
30350 auxType: auxInt32,
30351 argLen: 1,
30352 asm: ppc64.ACLRLSLWI,
30353 reg: regInfo{
30354 inputs: []inputInfo{
30355 {0, 1073733630},
30356 },
30357 outputs: []outputInfo{
30358 {0, 1073733624},
30359 },
30360 },
30361 },
30362 {
30363 name: "CLRLSLDI",
30364 auxType: auxInt32,
30365 argLen: 1,
30366 asm: ppc64.ACLRLSLDI,
30367 reg: regInfo{
30368 inputs: []inputInfo{
30369 {0, 1073733630},
30370 },
30371 outputs: []outputInfo{
30372 {0, 1073733624},
30373 },
30374 },
30375 },
30376 {
30377 name: "ADDC",
30378 argLen: 2,
30379 commutative: true,
30380 asm: ppc64.AADDC,
30381 reg: regInfo{
30382 inputs: []inputInfo{
30383 {0, 1073733630},
30384 {1, 1073733630},
30385 },
30386 clobbers: 9223372036854775808,
30387 outputs: []outputInfo{
30388 {1, 9223372036854775808},
30389 {0, 1073733624},
30390 },
30391 },
30392 },
30393 {
30394 name: "SUBC",
30395 argLen: 2,
30396 asm: ppc64.ASUBC,
30397 reg: regInfo{
30398 inputs: []inputInfo{
30399 {0, 1073733630},
30400 {1, 1073733630},
30401 },
30402 clobbers: 9223372036854775808,
30403 outputs: []outputInfo{
30404 {1, 9223372036854775808},
30405 {0, 1073733624},
30406 },
30407 },
30408 },
30409 {
30410 name: "ADDCconst",
30411 auxType: auxInt64,
30412 argLen: 1,
30413 asm: ppc64.AADDC,
30414 reg: regInfo{
30415 inputs: []inputInfo{
30416 {0, 1073733630},
30417 },
30418 outputs: []outputInfo{
30419 {1, 9223372036854775808},
30420 {0, 1073733624},
30421 },
30422 },
30423 },
30424 {
30425 name: "SUBCconst",
30426 auxType: auxInt64,
30427 argLen: 1,
30428 asm: ppc64.ASUBC,
30429 reg: regInfo{
30430 inputs: []inputInfo{
30431 {0, 1073733630},
30432 },
30433 outputs: []outputInfo{
30434 {1, 9223372036854775808},
30435 {0, 1073733624},
30436 },
30437 },
30438 },
30439 {
30440 name: "ADDE",
30441 argLen: 3,
30442 commutative: true,
30443 asm: ppc64.AADDE,
30444 reg: regInfo{
30445 inputs: []inputInfo{
30446 {2, 9223372036854775808},
30447 {0, 1073733630},
30448 {1, 1073733630},
30449 },
30450 clobbers: 9223372036854775808,
30451 outputs: []outputInfo{
30452 {1, 9223372036854775808},
30453 {0, 1073733624},
30454 },
30455 },
30456 },
30457 {
30458 name: "ADDZE",
30459 argLen: 2,
30460 asm: ppc64.AADDZE,
30461 reg: regInfo{
30462 inputs: []inputInfo{
30463 {1, 9223372036854775808},
30464 {0, 1073733630},
30465 },
30466 clobbers: 9223372036854775808,
30467 outputs: []outputInfo{
30468 {1, 9223372036854775808},
30469 {0, 1073733624},
30470 },
30471 },
30472 },
30473 {
30474 name: "SUBE",
30475 argLen: 3,
30476 asm: ppc64.ASUBE,
30477 reg: regInfo{
30478 inputs: []inputInfo{
30479 {2, 9223372036854775808},
30480 {0, 1073733630},
30481 {1, 1073733630},
30482 },
30483 clobbers: 9223372036854775808,
30484 outputs: []outputInfo{
30485 {1, 9223372036854775808},
30486 {0, 1073733624},
30487 },
30488 },
30489 },
30490 {
30491 name: "ADDZEzero",
30492 argLen: 1,
30493 asm: ppc64.AADDZE,
30494 reg: regInfo{
30495 inputs: []inputInfo{
30496 {0, 9223372036854775808},
30497 },
30498 clobbers: 9223372036854775808,
30499 outputs: []outputInfo{
30500 {0, 1073733624},
30501 },
30502 },
30503 },
30504 {
30505 name: "SUBZEzero",
30506 argLen: 1,
30507 asm: ppc64.ASUBZE,
30508 reg: regInfo{
30509 inputs: []inputInfo{
30510 {0, 9223372036854775808},
30511 },
30512 clobbers: 9223372036854775808,
30513 outputs: []outputInfo{
30514 {0, 1073733624},
30515 },
30516 },
30517 },
30518 {
30519 name: "SRADconst",
30520 auxType: auxInt64,
30521 argLen: 1,
30522 asm: ppc64.ASRAD,
30523 reg: regInfo{
30524 inputs: []inputInfo{
30525 {0, 1073733630},
30526 },
30527 clobbers: 9223372036854775808,
30528 outputs: []outputInfo{
30529 {0, 1073733624},
30530 },
30531 },
30532 },
30533 {
30534 name: "SRAWconst",
30535 auxType: auxInt64,
30536 argLen: 1,
30537 asm: ppc64.ASRAW,
30538 reg: regInfo{
30539 inputs: []inputInfo{
30540 {0, 1073733630},
30541 },
30542 clobbers: 9223372036854775808,
30543 outputs: []outputInfo{
30544 {0, 1073733624},
30545 },
30546 },
30547 },
30548 {
30549 name: "SRDconst",
30550 auxType: auxInt64,
30551 argLen: 1,
30552 asm: ppc64.ASRD,
30553 reg: regInfo{
30554 inputs: []inputInfo{
30555 {0, 1073733630},
30556 },
30557 outputs: []outputInfo{
30558 {0, 1073733624},
30559 },
30560 },
30561 },
30562 {
30563 name: "SRWconst",
30564 auxType: auxInt64,
30565 argLen: 1,
30566 asm: ppc64.ASRW,
30567 reg: regInfo{
30568 inputs: []inputInfo{
30569 {0, 1073733630},
30570 },
30571 outputs: []outputInfo{
30572 {0, 1073733624},
30573 },
30574 },
30575 },
30576 {
30577 name: "SLDconst",
30578 auxType: auxInt64,
30579 argLen: 1,
30580 asm: ppc64.ASLD,
30581 reg: regInfo{
30582 inputs: []inputInfo{
30583 {0, 1073733630},
30584 },
30585 outputs: []outputInfo{
30586 {0, 1073733624},
30587 },
30588 },
30589 },
30590 {
30591 name: "SLWconst",
30592 auxType: auxInt64,
30593 argLen: 1,
30594 asm: ppc64.ASLW,
30595 reg: regInfo{
30596 inputs: []inputInfo{
30597 {0, 1073733630},
30598 },
30599 outputs: []outputInfo{
30600 {0, 1073733624},
30601 },
30602 },
30603 },
30604 {
30605 name: "ROTLconst",
30606 auxType: auxInt64,
30607 argLen: 1,
30608 asm: ppc64.AROTL,
30609 reg: regInfo{
30610 inputs: []inputInfo{
30611 {0, 1073733630},
30612 },
30613 outputs: []outputInfo{
30614 {0, 1073733624},
30615 },
30616 },
30617 },
30618 {
30619 name: "ROTLWconst",
30620 auxType: auxInt64,
30621 argLen: 1,
30622 asm: ppc64.AROTLW,
30623 reg: regInfo{
30624 inputs: []inputInfo{
30625 {0, 1073733630},
30626 },
30627 outputs: []outputInfo{
30628 {0, 1073733624},
30629 },
30630 },
30631 },
30632 {
30633 name: "EXTSWSLconst",
30634 auxType: auxInt64,
30635 argLen: 1,
30636 asm: ppc64.AEXTSWSLI,
30637 reg: regInfo{
30638 inputs: []inputInfo{
30639 {0, 1073733630},
30640 },
30641 outputs: []outputInfo{
30642 {0, 1073733624},
30643 },
30644 },
30645 },
30646 {
30647 name: "RLWINM",
30648 auxType: auxInt64,
30649 argLen: 1,
30650 asm: ppc64.ARLWNM,
30651 reg: regInfo{
30652 inputs: []inputInfo{
30653 {0, 1073733630},
30654 },
30655 outputs: []outputInfo{
30656 {0, 1073733624},
30657 },
30658 },
30659 },
30660 {
30661 name: "RLWNM",
30662 auxType: auxInt64,
30663 argLen: 2,
30664 asm: ppc64.ARLWNM,
30665 reg: regInfo{
30666 inputs: []inputInfo{
30667 {0, 1073733630},
30668 {1, 1073733630},
30669 },
30670 outputs: []outputInfo{
30671 {0, 1073733624},
30672 },
30673 },
30674 },
30675 {
30676 name: "RLWMI",
30677 auxType: auxInt64,
30678 argLen: 2,
30679 resultInArg0: true,
30680 asm: ppc64.ARLWMI,
30681 reg: regInfo{
30682 inputs: []inputInfo{
30683 {0, 1073733624},
30684 {1, 1073733630},
30685 },
30686 outputs: []outputInfo{
30687 {0, 1073733624},
30688 },
30689 },
30690 },
30691 {
30692 name: "RLDICL",
30693 auxType: auxInt64,
30694 argLen: 1,
30695 asm: ppc64.ARLDICL,
30696 reg: regInfo{
30697 inputs: []inputInfo{
30698 {0, 1073733630},
30699 },
30700 outputs: []outputInfo{
30701 {0, 1073733624},
30702 },
30703 },
30704 },
30705 {
30706 name: "RLDICLCC",
30707 auxType: auxInt64,
30708 argLen: 1,
30709 asm: ppc64.ARLDICLCC,
30710 reg: regInfo{
30711 inputs: []inputInfo{
30712 {0, 1073733630},
30713 },
30714 outputs: []outputInfo{
30715 {0, 1073733624},
30716 },
30717 },
30718 },
30719 {
30720 name: "RLDICR",
30721 auxType: auxInt64,
30722 argLen: 1,
30723 asm: ppc64.ARLDICR,
30724 reg: regInfo{
30725 inputs: []inputInfo{
30726 {0, 1073733630},
30727 },
30728 outputs: []outputInfo{
30729 {0, 1073733624},
30730 },
30731 },
30732 },
30733 {
30734 name: "CNTLZD",
30735 argLen: 1,
30736 asm: ppc64.ACNTLZD,
30737 reg: regInfo{
30738 inputs: []inputInfo{
30739 {0, 1073733630},
30740 },
30741 outputs: []outputInfo{
30742 {0, 1073733624},
30743 },
30744 },
30745 },
30746 {
30747 name: "CNTLZDCC",
30748 argLen: 1,
30749 asm: ppc64.ACNTLZDCC,
30750 reg: regInfo{
30751 inputs: []inputInfo{
30752 {0, 1073733630},
30753 },
30754 outputs: []outputInfo{
30755 {0, 1073733624},
30756 },
30757 },
30758 },
30759 {
30760 name: "CNTLZW",
30761 argLen: 1,
30762 asm: ppc64.ACNTLZW,
30763 reg: regInfo{
30764 inputs: []inputInfo{
30765 {0, 1073733630},
30766 },
30767 outputs: []outputInfo{
30768 {0, 1073733624},
30769 },
30770 },
30771 },
30772 {
30773 name: "CNTTZD",
30774 argLen: 1,
30775 asm: ppc64.ACNTTZD,
30776 reg: regInfo{
30777 inputs: []inputInfo{
30778 {0, 1073733630},
30779 },
30780 outputs: []outputInfo{
30781 {0, 1073733624},
30782 },
30783 },
30784 },
30785 {
30786 name: "CNTTZW",
30787 argLen: 1,
30788 asm: ppc64.ACNTTZW,
30789 reg: regInfo{
30790 inputs: []inputInfo{
30791 {0, 1073733630},
30792 },
30793 outputs: []outputInfo{
30794 {0, 1073733624},
30795 },
30796 },
30797 },
30798 {
30799 name: "POPCNTD",
30800 argLen: 1,
30801 asm: ppc64.APOPCNTD,
30802 reg: regInfo{
30803 inputs: []inputInfo{
30804 {0, 1073733630},
30805 },
30806 outputs: []outputInfo{
30807 {0, 1073733624},
30808 },
30809 },
30810 },
30811 {
30812 name: "POPCNTW",
30813 argLen: 1,
30814 asm: ppc64.APOPCNTW,
30815 reg: regInfo{
30816 inputs: []inputInfo{
30817 {0, 1073733630},
30818 },
30819 outputs: []outputInfo{
30820 {0, 1073733624},
30821 },
30822 },
30823 },
30824 {
30825 name: "POPCNTB",
30826 argLen: 1,
30827 asm: ppc64.APOPCNTB,
30828 reg: regInfo{
30829 inputs: []inputInfo{
30830 {0, 1073733630},
30831 },
30832 outputs: []outputInfo{
30833 {0, 1073733624},
30834 },
30835 },
30836 },
30837 {
30838 name: "FDIV",
30839 argLen: 2,
30840 asm: ppc64.AFDIV,
30841 reg: regInfo{
30842 inputs: []inputInfo{
30843 {0, 9223372032559808512},
30844 {1, 9223372032559808512},
30845 },
30846 outputs: []outputInfo{
30847 {0, 9223372032559808512},
30848 },
30849 },
30850 },
30851 {
30852 name: "FDIVS",
30853 argLen: 2,
30854 asm: ppc64.AFDIVS,
30855 reg: regInfo{
30856 inputs: []inputInfo{
30857 {0, 9223372032559808512},
30858 {1, 9223372032559808512},
30859 },
30860 outputs: []outputInfo{
30861 {0, 9223372032559808512},
30862 },
30863 },
30864 },
30865 {
30866 name: "DIVD",
30867 argLen: 2,
30868 asm: ppc64.ADIVD,
30869 reg: regInfo{
30870 inputs: []inputInfo{
30871 {0, 1073733630},
30872 {1, 1073733630},
30873 },
30874 outputs: []outputInfo{
30875 {0, 1073733624},
30876 },
30877 },
30878 },
30879 {
30880 name: "DIVW",
30881 argLen: 2,
30882 asm: ppc64.ADIVW,
30883 reg: regInfo{
30884 inputs: []inputInfo{
30885 {0, 1073733630},
30886 {1, 1073733630},
30887 },
30888 outputs: []outputInfo{
30889 {0, 1073733624},
30890 },
30891 },
30892 },
30893 {
30894 name: "DIVDU",
30895 argLen: 2,
30896 asm: ppc64.ADIVDU,
30897 reg: regInfo{
30898 inputs: []inputInfo{
30899 {0, 1073733630},
30900 {1, 1073733630},
30901 },
30902 outputs: []outputInfo{
30903 {0, 1073733624},
30904 },
30905 },
30906 },
30907 {
30908 name: "DIVWU",
30909 argLen: 2,
30910 asm: ppc64.ADIVWU,
30911 reg: regInfo{
30912 inputs: []inputInfo{
30913 {0, 1073733630},
30914 {1, 1073733630},
30915 },
30916 outputs: []outputInfo{
30917 {0, 1073733624},
30918 },
30919 },
30920 },
30921 {
30922 name: "MODUD",
30923 argLen: 2,
30924 asm: ppc64.AMODUD,
30925 reg: regInfo{
30926 inputs: []inputInfo{
30927 {0, 1073733630},
30928 {1, 1073733630},
30929 },
30930 outputs: []outputInfo{
30931 {0, 1073733624},
30932 },
30933 },
30934 },
30935 {
30936 name: "MODSD",
30937 argLen: 2,
30938 asm: ppc64.AMODSD,
30939 reg: regInfo{
30940 inputs: []inputInfo{
30941 {0, 1073733630},
30942 {1, 1073733630},
30943 },
30944 outputs: []outputInfo{
30945 {0, 1073733624},
30946 },
30947 },
30948 },
30949 {
30950 name: "MODUW",
30951 argLen: 2,
30952 asm: ppc64.AMODUW,
30953 reg: regInfo{
30954 inputs: []inputInfo{
30955 {0, 1073733630},
30956 {1, 1073733630},
30957 },
30958 outputs: []outputInfo{
30959 {0, 1073733624},
30960 },
30961 },
30962 },
30963 {
30964 name: "MODSW",
30965 argLen: 2,
30966 asm: ppc64.AMODSW,
30967 reg: regInfo{
30968 inputs: []inputInfo{
30969 {0, 1073733630},
30970 {1, 1073733630},
30971 },
30972 outputs: []outputInfo{
30973 {0, 1073733624},
30974 },
30975 },
30976 },
30977 {
30978 name: "FCTIDZ",
30979 argLen: 1,
30980 asm: ppc64.AFCTIDZ,
30981 reg: regInfo{
30982 inputs: []inputInfo{
30983 {0, 9223372032559808512},
30984 },
30985 outputs: []outputInfo{
30986 {0, 9223372032559808512},
30987 },
30988 },
30989 },
30990 {
30991 name: "FCTIWZ",
30992 argLen: 1,
30993 asm: ppc64.AFCTIWZ,
30994 reg: regInfo{
30995 inputs: []inputInfo{
30996 {0, 9223372032559808512},
30997 },
30998 outputs: []outputInfo{
30999 {0, 9223372032559808512},
31000 },
31001 },
31002 },
31003 {
31004 name: "FCFID",
31005 argLen: 1,
31006 asm: ppc64.AFCFID,
31007 reg: regInfo{
31008 inputs: []inputInfo{
31009 {0, 9223372032559808512},
31010 },
31011 outputs: []outputInfo{
31012 {0, 9223372032559808512},
31013 },
31014 },
31015 },
31016 {
31017 name: "FCFIDS",
31018 argLen: 1,
31019 asm: ppc64.AFCFIDS,
31020 reg: regInfo{
31021 inputs: []inputInfo{
31022 {0, 9223372032559808512},
31023 },
31024 outputs: []outputInfo{
31025 {0, 9223372032559808512},
31026 },
31027 },
31028 },
31029 {
31030 name: "FRSP",
31031 argLen: 1,
31032 asm: ppc64.AFRSP,
31033 reg: regInfo{
31034 inputs: []inputInfo{
31035 {0, 9223372032559808512},
31036 },
31037 outputs: []outputInfo{
31038 {0, 9223372032559808512},
31039 },
31040 },
31041 },
31042 {
31043 name: "MFVSRD",
31044 argLen: 1,
31045 asm: ppc64.AMFVSRD,
31046 reg: regInfo{
31047 inputs: []inputInfo{
31048 {0, 9223372032559808512},
31049 },
31050 outputs: []outputInfo{
31051 {0, 1073733624},
31052 },
31053 },
31054 },
31055 {
31056 name: "MTVSRD",
31057 argLen: 1,
31058 asm: ppc64.AMTVSRD,
31059 reg: regInfo{
31060 inputs: []inputInfo{
31061 {0, 1073733624},
31062 },
31063 outputs: []outputInfo{
31064 {0, 9223372032559808512},
31065 },
31066 },
31067 },
31068 {
31069 name: "AND",
31070 argLen: 2,
31071 commutative: true,
31072 asm: ppc64.AAND,
31073 reg: regInfo{
31074 inputs: []inputInfo{
31075 {0, 1073733630},
31076 {1, 1073733630},
31077 },
31078 outputs: []outputInfo{
31079 {0, 1073733624},
31080 },
31081 },
31082 },
31083 {
31084 name: "ANDN",
31085 argLen: 2,
31086 asm: ppc64.AANDN,
31087 reg: regInfo{
31088 inputs: []inputInfo{
31089 {0, 1073733630},
31090 {1, 1073733630},
31091 },
31092 outputs: []outputInfo{
31093 {0, 1073733624},
31094 },
31095 },
31096 },
31097 {
31098 name: "ANDNCC",
31099 argLen: 2,
31100 asm: ppc64.AANDNCC,
31101 reg: regInfo{
31102 inputs: []inputInfo{
31103 {0, 1073733630},
31104 {1, 1073733630},
31105 },
31106 outputs: []outputInfo{
31107 {0, 1073733624},
31108 },
31109 },
31110 },
31111 {
31112 name: "ANDCC",
31113 argLen: 2,
31114 commutative: true,
31115 asm: ppc64.AANDCC,
31116 reg: regInfo{
31117 inputs: []inputInfo{
31118 {0, 1073733630},
31119 {1, 1073733630},
31120 },
31121 outputs: []outputInfo{
31122 {0, 1073733624},
31123 },
31124 },
31125 },
31126 {
31127 name: "OR",
31128 argLen: 2,
31129 commutative: true,
31130 asm: ppc64.AOR,
31131 reg: regInfo{
31132 inputs: []inputInfo{
31133 {0, 1073733630},
31134 {1, 1073733630},
31135 },
31136 outputs: []outputInfo{
31137 {0, 1073733624},
31138 },
31139 },
31140 },
31141 {
31142 name: "ORN",
31143 argLen: 2,
31144 asm: ppc64.AORN,
31145 reg: regInfo{
31146 inputs: []inputInfo{
31147 {0, 1073733630},
31148 {1, 1073733630},
31149 },
31150 outputs: []outputInfo{
31151 {0, 1073733624},
31152 },
31153 },
31154 },
31155 {
31156 name: "ORCC",
31157 argLen: 2,
31158 commutative: true,
31159 asm: ppc64.AORCC,
31160 reg: regInfo{
31161 inputs: []inputInfo{
31162 {0, 1073733630},
31163 {1, 1073733630},
31164 },
31165 outputs: []outputInfo{
31166 {0, 1073733624},
31167 },
31168 },
31169 },
31170 {
31171 name: "NOR",
31172 argLen: 2,
31173 commutative: true,
31174 asm: ppc64.ANOR,
31175 reg: regInfo{
31176 inputs: []inputInfo{
31177 {0, 1073733630},
31178 {1, 1073733630},
31179 },
31180 outputs: []outputInfo{
31181 {0, 1073733624},
31182 },
31183 },
31184 },
31185 {
31186 name: "NORCC",
31187 argLen: 2,
31188 commutative: true,
31189 asm: ppc64.ANORCC,
31190 reg: regInfo{
31191 inputs: []inputInfo{
31192 {0, 1073733630},
31193 {1, 1073733630},
31194 },
31195 outputs: []outputInfo{
31196 {0, 1073733624},
31197 },
31198 },
31199 },
31200 {
31201 name: "XOR",
31202 argLen: 2,
31203 commutative: true,
31204 asm: ppc64.AXOR,
31205 reg: regInfo{
31206 inputs: []inputInfo{
31207 {0, 1073733630},
31208 {1, 1073733630},
31209 },
31210 outputs: []outputInfo{
31211 {0, 1073733624},
31212 },
31213 },
31214 },
31215 {
31216 name: "XORCC",
31217 argLen: 2,
31218 commutative: true,
31219 asm: ppc64.AXORCC,
31220 reg: regInfo{
31221 inputs: []inputInfo{
31222 {0, 1073733630},
31223 {1, 1073733630},
31224 },
31225 outputs: []outputInfo{
31226 {0, 1073733624},
31227 },
31228 },
31229 },
31230 {
31231 name: "EQV",
31232 argLen: 2,
31233 commutative: true,
31234 asm: ppc64.AEQV,
31235 reg: regInfo{
31236 inputs: []inputInfo{
31237 {0, 1073733630},
31238 {1, 1073733630},
31239 },
31240 outputs: []outputInfo{
31241 {0, 1073733624},
31242 },
31243 },
31244 },
31245 {
31246 name: "NEG",
31247 argLen: 1,
31248 asm: ppc64.ANEG,
31249 reg: regInfo{
31250 inputs: []inputInfo{
31251 {0, 1073733630},
31252 },
31253 outputs: []outputInfo{
31254 {0, 1073733624},
31255 },
31256 },
31257 },
31258 {
31259 name: "NEGCC",
31260 argLen: 1,
31261 asm: ppc64.ANEGCC,
31262 reg: regInfo{
31263 inputs: []inputInfo{
31264 {0, 1073733630},
31265 },
31266 outputs: []outputInfo{
31267 {0, 1073733624},
31268 },
31269 },
31270 },
31271 {
31272 name: "BRD",
31273 argLen: 1,
31274 asm: ppc64.ABRD,
31275 reg: regInfo{
31276 inputs: []inputInfo{
31277 {0, 1073733630},
31278 },
31279 outputs: []outputInfo{
31280 {0, 1073733624},
31281 },
31282 },
31283 },
31284 {
31285 name: "BRW",
31286 argLen: 1,
31287 asm: ppc64.ABRW,
31288 reg: regInfo{
31289 inputs: []inputInfo{
31290 {0, 1073733630},
31291 },
31292 outputs: []outputInfo{
31293 {0, 1073733624},
31294 },
31295 },
31296 },
31297 {
31298 name: "BRH",
31299 argLen: 1,
31300 asm: ppc64.ABRH,
31301 reg: regInfo{
31302 inputs: []inputInfo{
31303 {0, 1073733630},
31304 },
31305 outputs: []outputInfo{
31306 {0, 1073733624},
31307 },
31308 },
31309 },
31310 {
31311 name: "FNEG",
31312 argLen: 1,
31313 asm: ppc64.AFNEG,
31314 reg: regInfo{
31315 inputs: []inputInfo{
31316 {0, 9223372032559808512},
31317 },
31318 outputs: []outputInfo{
31319 {0, 9223372032559808512},
31320 },
31321 },
31322 },
31323 {
31324 name: "FSQRT",
31325 argLen: 1,
31326 asm: ppc64.AFSQRT,
31327 reg: regInfo{
31328 inputs: []inputInfo{
31329 {0, 9223372032559808512},
31330 },
31331 outputs: []outputInfo{
31332 {0, 9223372032559808512},
31333 },
31334 },
31335 },
31336 {
31337 name: "FSQRTS",
31338 argLen: 1,
31339 asm: ppc64.AFSQRTS,
31340 reg: regInfo{
31341 inputs: []inputInfo{
31342 {0, 9223372032559808512},
31343 },
31344 outputs: []outputInfo{
31345 {0, 9223372032559808512},
31346 },
31347 },
31348 },
31349 {
31350 name: "FFLOOR",
31351 argLen: 1,
31352 asm: ppc64.AFRIM,
31353 reg: regInfo{
31354 inputs: []inputInfo{
31355 {0, 9223372032559808512},
31356 },
31357 outputs: []outputInfo{
31358 {0, 9223372032559808512},
31359 },
31360 },
31361 },
31362 {
31363 name: "FCEIL",
31364 argLen: 1,
31365 asm: ppc64.AFRIP,
31366 reg: regInfo{
31367 inputs: []inputInfo{
31368 {0, 9223372032559808512},
31369 },
31370 outputs: []outputInfo{
31371 {0, 9223372032559808512},
31372 },
31373 },
31374 },
31375 {
31376 name: "FTRUNC",
31377 argLen: 1,
31378 asm: ppc64.AFRIZ,
31379 reg: regInfo{
31380 inputs: []inputInfo{
31381 {0, 9223372032559808512},
31382 },
31383 outputs: []outputInfo{
31384 {0, 9223372032559808512},
31385 },
31386 },
31387 },
31388 {
31389 name: "FROUND",
31390 argLen: 1,
31391 asm: ppc64.AFRIN,
31392 reg: regInfo{
31393 inputs: []inputInfo{
31394 {0, 9223372032559808512},
31395 },
31396 outputs: []outputInfo{
31397 {0, 9223372032559808512},
31398 },
31399 },
31400 },
31401 {
31402 name: "FABS",
31403 argLen: 1,
31404 asm: ppc64.AFABS,
31405 reg: regInfo{
31406 inputs: []inputInfo{
31407 {0, 9223372032559808512},
31408 },
31409 outputs: []outputInfo{
31410 {0, 9223372032559808512},
31411 },
31412 },
31413 },
31414 {
31415 name: "FNABS",
31416 argLen: 1,
31417 asm: ppc64.AFNABS,
31418 reg: regInfo{
31419 inputs: []inputInfo{
31420 {0, 9223372032559808512},
31421 },
31422 outputs: []outputInfo{
31423 {0, 9223372032559808512},
31424 },
31425 },
31426 },
31427 {
31428 name: "FCPSGN",
31429 argLen: 2,
31430 asm: ppc64.AFCPSGN,
31431 reg: regInfo{
31432 inputs: []inputInfo{
31433 {0, 9223372032559808512},
31434 {1, 9223372032559808512},
31435 },
31436 outputs: []outputInfo{
31437 {0, 9223372032559808512},
31438 },
31439 },
31440 },
31441 {
31442 name: "ORconst",
31443 auxType: auxInt64,
31444 argLen: 1,
31445 asm: ppc64.AOR,
31446 reg: regInfo{
31447 inputs: []inputInfo{
31448 {0, 1073733630},
31449 },
31450 outputs: []outputInfo{
31451 {0, 1073733624},
31452 },
31453 },
31454 },
31455 {
31456 name: "XORconst",
31457 auxType: auxInt64,
31458 argLen: 1,
31459 asm: ppc64.AXOR,
31460 reg: regInfo{
31461 inputs: []inputInfo{
31462 {0, 1073733630},
31463 },
31464 outputs: []outputInfo{
31465 {0, 1073733624},
31466 },
31467 },
31468 },
31469 {
31470 name: "ANDCCconst",
31471 auxType: auxInt64,
31472 argLen: 1,
31473 asm: ppc64.AANDCC,
31474 reg: regInfo{
31475 inputs: []inputInfo{
31476 {0, 1073733630},
31477 },
31478 outputs: []outputInfo{
31479 {0, 1073733624},
31480 },
31481 },
31482 },
31483 {
31484 name: "ANDconst",
31485 auxType: auxInt64,
31486 argLen: 1,
31487 clobberFlags: true,
31488 asm: ppc64.AANDCC,
31489 reg: regInfo{
31490 inputs: []inputInfo{
31491 {0, 1073733630},
31492 },
31493 outputs: []outputInfo{
31494 {0, 1073733624},
31495 },
31496 },
31497 },
31498 {
31499 name: "MOVBreg",
31500 argLen: 1,
31501 asm: ppc64.AMOVB,
31502 reg: regInfo{
31503 inputs: []inputInfo{
31504 {0, 1073733630},
31505 },
31506 outputs: []outputInfo{
31507 {0, 1073733624},
31508 },
31509 },
31510 },
31511 {
31512 name: "MOVBZreg",
31513 argLen: 1,
31514 asm: ppc64.AMOVBZ,
31515 reg: regInfo{
31516 inputs: []inputInfo{
31517 {0, 1073733630},
31518 },
31519 outputs: []outputInfo{
31520 {0, 1073733624},
31521 },
31522 },
31523 },
31524 {
31525 name: "MOVHreg",
31526 argLen: 1,
31527 asm: ppc64.AMOVH,
31528 reg: regInfo{
31529 inputs: []inputInfo{
31530 {0, 1073733630},
31531 },
31532 outputs: []outputInfo{
31533 {0, 1073733624},
31534 },
31535 },
31536 },
31537 {
31538 name: "MOVHZreg",
31539 argLen: 1,
31540 asm: ppc64.AMOVHZ,
31541 reg: regInfo{
31542 inputs: []inputInfo{
31543 {0, 1073733630},
31544 },
31545 outputs: []outputInfo{
31546 {0, 1073733624},
31547 },
31548 },
31549 },
31550 {
31551 name: "MOVWreg",
31552 argLen: 1,
31553 asm: ppc64.AMOVW,
31554 reg: regInfo{
31555 inputs: []inputInfo{
31556 {0, 1073733630},
31557 },
31558 outputs: []outputInfo{
31559 {0, 1073733624},
31560 },
31561 },
31562 },
31563 {
31564 name: "MOVWZreg",
31565 argLen: 1,
31566 asm: ppc64.AMOVWZ,
31567 reg: regInfo{
31568 inputs: []inputInfo{
31569 {0, 1073733630},
31570 },
31571 outputs: []outputInfo{
31572 {0, 1073733624},
31573 },
31574 },
31575 },
31576 {
31577 name: "MOVBZload",
31578 auxType: auxSymOff,
31579 argLen: 2,
31580 faultOnNilArg0: true,
31581 symEffect: SymRead,
31582 asm: ppc64.AMOVBZ,
31583 reg: regInfo{
31584 inputs: []inputInfo{
31585 {0, 1073733630},
31586 },
31587 outputs: []outputInfo{
31588 {0, 1073733624},
31589 },
31590 },
31591 },
31592 {
31593 name: "MOVHload",
31594 auxType: auxSymOff,
31595 argLen: 2,
31596 faultOnNilArg0: true,
31597 symEffect: SymRead,
31598 asm: ppc64.AMOVH,
31599 reg: regInfo{
31600 inputs: []inputInfo{
31601 {0, 1073733630},
31602 },
31603 outputs: []outputInfo{
31604 {0, 1073733624},
31605 },
31606 },
31607 },
31608 {
31609 name: "MOVHZload",
31610 auxType: auxSymOff,
31611 argLen: 2,
31612 faultOnNilArg0: true,
31613 symEffect: SymRead,
31614 asm: ppc64.AMOVHZ,
31615 reg: regInfo{
31616 inputs: []inputInfo{
31617 {0, 1073733630},
31618 },
31619 outputs: []outputInfo{
31620 {0, 1073733624},
31621 },
31622 },
31623 },
31624 {
31625 name: "MOVWload",
31626 auxType: auxSymOff,
31627 argLen: 2,
31628 faultOnNilArg0: true,
31629 symEffect: SymRead,
31630 asm: ppc64.AMOVW,
31631 reg: regInfo{
31632 inputs: []inputInfo{
31633 {0, 1073733630},
31634 },
31635 outputs: []outputInfo{
31636 {0, 1073733624},
31637 },
31638 },
31639 },
31640 {
31641 name: "MOVWZload",
31642 auxType: auxSymOff,
31643 argLen: 2,
31644 faultOnNilArg0: true,
31645 symEffect: SymRead,
31646 asm: ppc64.AMOVWZ,
31647 reg: regInfo{
31648 inputs: []inputInfo{
31649 {0, 1073733630},
31650 },
31651 outputs: []outputInfo{
31652 {0, 1073733624},
31653 },
31654 },
31655 },
31656 {
31657 name: "MOVDload",
31658 auxType: auxSymOff,
31659 argLen: 2,
31660 faultOnNilArg0: true,
31661 symEffect: SymRead,
31662 asm: ppc64.AMOVD,
31663 reg: regInfo{
31664 inputs: []inputInfo{
31665 {0, 1073733630},
31666 },
31667 outputs: []outputInfo{
31668 {0, 1073733624},
31669 },
31670 },
31671 },
31672 {
31673 name: "MOVDBRload",
31674 argLen: 2,
31675 faultOnNilArg0: true,
31676 asm: ppc64.AMOVDBR,
31677 reg: regInfo{
31678 inputs: []inputInfo{
31679 {0, 1073733630},
31680 },
31681 outputs: []outputInfo{
31682 {0, 1073733624},
31683 },
31684 },
31685 },
31686 {
31687 name: "MOVWBRload",
31688 argLen: 2,
31689 faultOnNilArg0: true,
31690 asm: ppc64.AMOVWBR,
31691 reg: regInfo{
31692 inputs: []inputInfo{
31693 {0, 1073733630},
31694 },
31695 outputs: []outputInfo{
31696 {0, 1073733624},
31697 },
31698 },
31699 },
31700 {
31701 name: "MOVHBRload",
31702 argLen: 2,
31703 faultOnNilArg0: true,
31704 asm: ppc64.AMOVHBR,
31705 reg: regInfo{
31706 inputs: []inputInfo{
31707 {0, 1073733630},
31708 },
31709 outputs: []outputInfo{
31710 {0, 1073733624},
31711 },
31712 },
31713 },
31714 {
31715 name: "MOVBZloadidx",
31716 argLen: 3,
31717 asm: ppc64.AMOVBZ,
31718 reg: regInfo{
31719 inputs: []inputInfo{
31720 {1, 1073733624},
31721 {0, 1073733630},
31722 },
31723 outputs: []outputInfo{
31724 {0, 1073733624},
31725 },
31726 },
31727 },
31728 {
31729 name: "MOVHloadidx",
31730 argLen: 3,
31731 asm: ppc64.AMOVH,
31732 reg: regInfo{
31733 inputs: []inputInfo{
31734 {1, 1073733624},
31735 {0, 1073733630},
31736 },
31737 outputs: []outputInfo{
31738 {0, 1073733624},
31739 },
31740 },
31741 },
31742 {
31743 name: "MOVHZloadidx",
31744 argLen: 3,
31745 asm: ppc64.AMOVHZ,
31746 reg: regInfo{
31747 inputs: []inputInfo{
31748 {1, 1073733624},
31749 {0, 1073733630},
31750 },
31751 outputs: []outputInfo{
31752 {0, 1073733624},
31753 },
31754 },
31755 },
31756 {
31757 name: "MOVWloadidx",
31758 argLen: 3,
31759 asm: ppc64.AMOVW,
31760 reg: regInfo{
31761 inputs: []inputInfo{
31762 {1, 1073733624},
31763 {0, 1073733630},
31764 },
31765 outputs: []outputInfo{
31766 {0, 1073733624},
31767 },
31768 },
31769 },
31770 {
31771 name: "MOVWZloadidx",
31772 argLen: 3,
31773 asm: ppc64.AMOVWZ,
31774 reg: regInfo{
31775 inputs: []inputInfo{
31776 {1, 1073733624},
31777 {0, 1073733630},
31778 },
31779 outputs: []outputInfo{
31780 {0, 1073733624},
31781 },
31782 },
31783 },
31784 {
31785 name: "MOVDloadidx",
31786 argLen: 3,
31787 asm: ppc64.AMOVD,
31788 reg: regInfo{
31789 inputs: []inputInfo{
31790 {1, 1073733624},
31791 {0, 1073733630},
31792 },
31793 outputs: []outputInfo{
31794 {0, 1073733624},
31795 },
31796 },
31797 },
31798 {
31799 name: "MOVHBRloadidx",
31800 argLen: 3,
31801 asm: ppc64.AMOVHBR,
31802 reg: regInfo{
31803 inputs: []inputInfo{
31804 {1, 1073733624},
31805 {0, 1073733630},
31806 },
31807 outputs: []outputInfo{
31808 {0, 1073733624},
31809 },
31810 },
31811 },
31812 {
31813 name: "MOVWBRloadidx",
31814 argLen: 3,
31815 asm: ppc64.AMOVWBR,
31816 reg: regInfo{
31817 inputs: []inputInfo{
31818 {1, 1073733624},
31819 {0, 1073733630},
31820 },
31821 outputs: []outputInfo{
31822 {0, 1073733624},
31823 },
31824 },
31825 },
31826 {
31827 name: "MOVDBRloadidx",
31828 argLen: 3,
31829 asm: ppc64.AMOVDBR,
31830 reg: regInfo{
31831 inputs: []inputInfo{
31832 {1, 1073733624},
31833 {0, 1073733630},
31834 },
31835 outputs: []outputInfo{
31836 {0, 1073733624},
31837 },
31838 },
31839 },
31840 {
31841 name: "FMOVDloadidx",
31842 argLen: 3,
31843 asm: ppc64.AFMOVD,
31844 reg: regInfo{
31845 inputs: []inputInfo{
31846 {0, 1073733630},
31847 {1, 1073733630},
31848 },
31849 outputs: []outputInfo{
31850 {0, 9223372032559808512},
31851 },
31852 },
31853 },
31854 {
31855 name: "FMOVSloadidx",
31856 argLen: 3,
31857 asm: ppc64.AFMOVS,
31858 reg: regInfo{
31859 inputs: []inputInfo{
31860 {0, 1073733630},
31861 {1, 1073733630},
31862 },
31863 outputs: []outputInfo{
31864 {0, 9223372032559808512},
31865 },
31866 },
31867 },
31868 {
31869 name: "DCBT",
31870 auxType: auxInt64,
31871 argLen: 2,
31872 hasSideEffects: true,
31873 asm: ppc64.ADCBT,
31874 reg: regInfo{
31875 inputs: []inputInfo{
31876 {0, 1073733630},
31877 },
31878 },
31879 },
31880 {
31881 name: "MOVDBRstore",
31882 argLen: 3,
31883 faultOnNilArg0: true,
31884 asm: ppc64.AMOVDBR,
31885 reg: regInfo{
31886 inputs: []inputInfo{
31887 {0, 1073733630},
31888 {1, 1073733630},
31889 },
31890 },
31891 },
31892 {
31893 name: "MOVWBRstore",
31894 argLen: 3,
31895 faultOnNilArg0: true,
31896 asm: ppc64.AMOVWBR,
31897 reg: regInfo{
31898 inputs: []inputInfo{
31899 {0, 1073733630},
31900 {1, 1073733630},
31901 },
31902 },
31903 },
31904 {
31905 name: "MOVHBRstore",
31906 argLen: 3,
31907 faultOnNilArg0: true,
31908 asm: ppc64.AMOVHBR,
31909 reg: regInfo{
31910 inputs: []inputInfo{
31911 {0, 1073733630},
31912 {1, 1073733630},
31913 },
31914 },
31915 },
31916 {
31917 name: "FMOVDload",
31918 auxType: auxSymOff,
31919 argLen: 2,
31920 faultOnNilArg0: true,
31921 symEffect: SymRead,
31922 asm: ppc64.AFMOVD,
31923 reg: regInfo{
31924 inputs: []inputInfo{
31925 {0, 1073733630},
31926 },
31927 outputs: []outputInfo{
31928 {0, 9223372032559808512},
31929 },
31930 },
31931 },
31932 {
31933 name: "FMOVSload",
31934 auxType: auxSymOff,
31935 argLen: 2,
31936 faultOnNilArg0: true,
31937 symEffect: SymRead,
31938 asm: ppc64.AFMOVS,
31939 reg: regInfo{
31940 inputs: []inputInfo{
31941 {0, 1073733630},
31942 },
31943 outputs: []outputInfo{
31944 {0, 9223372032559808512},
31945 },
31946 },
31947 },
31948 {
31949 name: "MOVBstore",
31950 auxType: auxSymOff,
31951 argLen: 3,
31952 faultOnNilArg0: true,
31953 symEffect: SymWrite,
31954 asm: ppc64.AMOVB,
31955 reg: regInfo{
31956 inputs: []inputInfo{
31957 {0, 1073733630},
31958 {1, 1073733630},
31959 },
31960 },
31961 },
31962 {
31963 name: "MOVHstore",
31964 auxType: auxSymOff,
31965 argLen: 3,
31966 faultOnNilArg0: true,
31967 symEffect: SymWrite,
31968 asm: ppc64.AMOVH,
31969 reg: regInfo{
31970 inputs: []inputInfo{
31971 {0, 1073733630},
31972 {1, 1073733630},
31973 },
31974 },
31975 },
31976 {
31977 name: "MOVWstore",
31978 auxType: auxSymOff,
31979 argLen: 3,
31980 faultOnNilArg0: true,
31981 symEffect: SymWrite,
31982 asm: ppc64.AMOVW,
31983 reg: regInfo{
31984 inputs: []inputInfo{
31985 {0, 1073733630},
31986 {1, 1073733630},
31987 },
31988 },
31989 },
31990 {
31991 name: "MOVDstore",
31992 auxType: auxSymOff,
31993 argLen: 3,
31994 faultOnNilArg0: true,
31995 symEffect: SymWrite,
31996 asm: ppc64.AMOVD,
31997 reg: regInfo{
31998 inputs: []inputInfo{
31999 {0, 1073733630},
32000 {1, 1073733630},
32001 },
32002 },
32003 },
32004 {
32005 name: "FMOVDstore",
32006 auxType: auxSymOff,
32007 argLen: 3,
32008 faultOnNilArg0: true,
32009 symEffect: SymWrite,
32010 asm: ppc64.AFMOVD,
32011 reg: regInfo{
32012 inputs: []inputInfo{
32013 {0, 1073733630},
32014 {1, 9223372032559808512},
32015 },
32016 },
32017 },
32018 {
32019 name: "FMOVSstore",
32020 auxType: auxSymOff,
32021 argLen: 3,
32022 faultOnNilArg0: true,
32023 symEffect: SymWrite,
32024 asm: ppc64.AFMOVS,
32025 reg: regInfo{
32026 inputs: []inputInfo{
32027 {0, 1073733630},
32028 {1, 9223372032559808512},
32029 },
32030 },
32031 },
32032 {
32033 name: "MOVBstoreidx",
32034 argLen: 4,
32035 asm: ppc64.AMOVB,
32036 reg: regInfo{
32037 inputs: []inputInfo{
32038 {0, 1073733630},
32039 {1, 1073733630},
32040 {2, 1073733630},
32041 },
32042 },
32043 },
32044 {
32045 name: "MOVHstoreidx",
32046 argLen: 4,
32047 asm: ppc64.AMOVH,
32048 reg: regInfo{
32049 inputs: []inputInfo{
32050 {0, 1073733630},
32051 {1, 1073733630},
32052 {2, 1073733630},
32053 },
32054 },
32055 },
32056 {
32057 name: "MOVWstoreidx",
32058 argLen: 4,
32059 asm: ppc64.AMOVW,
32060 reg: regInfo{
32061 inputs: []inputInfo{
32062 {0, 1073733630},
32063 {1, 1073733630},
32064 {2, 1073733630},
32065 },
32066 },
32067 },
32068 {
32069 name: "MOVDstoreidx",
32070 argLen: 4,
32071 asm: ppc64.AMOVD,
32072 reg: regInfo{
32073 inputs: []inputInfo{
32074 {0, 1073733630},
32075 {1, 1073733630},
32076 {2, 1073733630},
32077 },
32078 },
32079 },
32080 {
32081 name: "FMOVDstoreidx",
32082 argLen: 4,
32083 asm: ppc64.AFMOVD,
32084 reg: regInfo{
32085 inputs: []inputInfo{
32086 {0, 1073733630},
32087 {1, 1073733630},
32088 {2, 9223372032559808512},
32089 },
32090 },
32091 },
32092 {
32093 name: "FMOVSstoreidx",
32094 argLen: 4,
32095 asm: ppc64.AFMOVS,
32096 reg: regInfo{
32097 inputs: []inputInfo{
32098 {0, 1073733630},
32099 {1, 1073733630},
32100 {2, 9223372032559808512},
32101 },
32102 },
32103 },
32104 {
32105 name: "MOVHBRstoreidx",
32106 argLen: 4,
32107 asm: ppc64.AMOVHBR,
32108 reg: regInfo{
32109 inputs: []inputInfo{
32110 {0, 1073733630},
32111 {1, 1073733630},
32112 {2, 1073733630},
32113 },
32114 },
32115 },
32116 {
32117 name: "MOVWBRstoreidx",
32118 argLen: 4,
32119 asm: ppc64.AMOVWBR,
32120 reg: regInfo{
32121 inputs: []inputInfo{
32122 {0, 1073733630},
32123 {1, 1073733630},
32124 {2, 1073733630},
32125 },
32126 },
32127 },
32128 {
32129 name: "MOVDBRstoreidx",
32130 argLen: 4,
32131 asm: ppc64.AMOVDBR,
32132 reg: regInfo{
32133 inputs: []inputInfo{
32134 {0, 1073733630},
32135 {1, 1073733630},
32136 {2, 1073733630},
32137 },
32138 },
32139 },
32140 {
32141 name: "MOVBstorezero",
32142 auxType: auxSymOff,
32143 argLen: 2,
32144 faultOnNilArg0: true,
32145 symEffect: SymWrite,
32146 asm: ppc64.AMOVB,
32147 reg: regInfo{
32148 inputs: []inputInfo{
32149 {0, 1073733630},
32150 },
32151 },
32152 },
32153 {
32154 name: "MOVHstorezero",
32155 auxType: auxSymOff,
32156 argLen: 2,
32157 faultOnNilArg0: true,
32158 symEffect: SymWrite,
32159 asm: ppc64.AMOVH,
32160 reg: regInfo{
32161 inputs: []inputInfo{
32162 {0, 1073733630},
32163 },
32164 },
32165 },
32166 {
32167 name: "MOVWstorezero",
32168 auxType: auxSymOff,
32169 argLen: 2,
32170 faultOnNilArg0: true,
32171 symEffect: SymWrite,
32172 asm: ppc64.AMOVW,
32173 reg: regInfo{
32174 inputs: []inputInfo{
32175 {0, 1073733630},
32176 },
32177 },
32178 },
32179 {
32180 name: "MOVDstorezero",
32181 auxType: auxSymOff,
32182 argLen: 2,
32183 faultOnNilArg0: true,
32184 symEffect: SymWrite,
32185 asm: ppc64.AMOVD,
32186 reg: regInfo{
32187 inputs: []inputInfo{
32188 {0, 1073733630},
32189 },
32190 },
32191 },
32192 {
32193 name: "MOVDaddr",
32194 auxType: auxSymOff,
32195 argLen: 1,
32196 rematerializeable: true,
32197 symEffect: SymAddr,
32198 asm: ppc64.AMOVD,
32199 reg: regInfo{
32200 inputs: []inputInfo{
32201 {0, 1073733630},
32202 },
32203 outputs: []outputInfo{
32204 {0, 1073733624},
32205 },
32206 },
32207 },
32208 {
32209 name: "MOVDconst",
32210 auxType: auxInt64,
32211 argLen: 0,
32212 rematerializeable: true,
32213 asm: ppc64.AMOVD,
32214 reg: regInfo{
32215 outputs: []outputInfo{
32216 {0, 1073733624},
32217 },
32218 },
32219 },
32220 {
32221 name: "FMOVDconst",
32222 auxType: auxFloat64,
32223 argLen: 0,
32224 rematerializeable: true,
32225 asm: ppc64.AFMOVD,
32226 reg: regInfo{
32227 outputs: []outputInfo{
32228 {0, 9223372032559808512},
32229 },
32230 },
32231 },
32232 {
32233 name: "FMOVSconst",
32234 auxType: auxFloat32,
32235 argLen: 0,
32236 rematerializeable: true,
32237 asm: ppc64.AFMOVS,
32238 reg: regInfo{
32239 outputs: []outputInfo{
32240 {0, 9223372032559808512},
32241 },
32242 },
32243 },
32244 {
32245 name: "FCMPU",
32246 argLen: 2,
32247 asm: ppc64.AFCMPU,
32248 reg: regInfo{
32249 inputs: []inputInfo{
32250 {0, 9223372032559808512},
32251 {1, 9223372032559808512},
32252 },
32253 },
32254 },
32255 {
32256 name: "CMP",
32257 argLen: 2,
32258 asm: ppc64.ACMP,
32259 reg: regInfo{
32260 inputs: []inputInfo{
32261 {0, 1073733630},
32262 {1, 1073733630},
32263 },
32264 },
32265 },
32266 {
32267 name: "CMPU",
32268 argLen: 2,
32269 asm: ppc64.ACMPU,
32270 reg: regInfo{
32271 inputs: []inputInfo{
32272 {0, 1073733630},
32273 {1, 1073733630},
32274 },
32275 },
32276 },
32277 {
32278 name: "CMPW",
32279 argLen: 2,
32280 asm: ppc64.ACMPW,
32281 reg: regInfo{
32282 inputs: []inputInfo{
32283 {0, 1073733630},
32284 {1, 1073733630},
32285 },
32286 },
32287 },
32288 {
32289 name: "CMPWU",
32290 argLen: 2,
32291 asm: ppc64.ACMPWU,
32292 reg: regInfo{
32293 inputs: []inputInfo{
32294 {0, 1073733630},
32295 {1, 1073733630},
32296 },
32297 },
32298 },
32299 {
32300 name: "CMPconst",
32301 auxType: auxInt64,
32302 argLen: 1,
32303 asm: ppc64.ACMP,
32304 reg: regInfo{
32305 inputs: []inputInfo{
32306 {0, 1073733630},
32307 },
32308 },
32309 },
32310 {
32311 name: "CMPUconst",
32312 auxType: auxInt64,
32313 argLen: 1,
32314 asm: ppc64.ACMPU,
32315 reg: regInfo{
32316 inputs: []inputInfo{
32317 {0, 1073733630},
32318 },
32319 },
32320 },
32321 {
32322 name: "CMPWconst",
32323 auxType: auxInt32,
32324 argLen: 1,
32325 asm: ppc64.ACMPW,
32326 reg: regInfo{
32327 inputs: []inputInfo{
32328 {0, 1073733630},
32329 },
32330 },
32331 },
32332 {
32333 name: "CMPWUconst",
32334 auxType: auxInt32,
32335 argLen: 1,
32336 asm: ppc64.ACMPWU,
32337 reg: regInfo{
32338 inputs: []inputInfo{
32339 {0, 1073733630},
32340 },
32341 },
32342 },
32343 {
32344 name: "ISEL",
32345 auxType: auxInt32,
32346 argLen: 3,
32347 asm: ppc64.AISEL,
32348 reg: regInfo{
32349 inputs: []inputInfo{
32350 {0, 1073733624},
32351 {1, 1073733624},
32352 },
32353 outputs: []outputInfo{
32354 {0, 1073733624},
32355 },
32356 },
32357 },
32358 {
32359 name: "ISELZ",
32360 auxType: auxInt32,
32361 argLen: 2,
32362 asm: ppc64.AISEL,
32363 reg: regInfo{
32364 inputs: []inputInfo{
32365 {0, 1073733624},
32366 },
32367 outputs: []outputInfo{
32368 {0, 1073733624},
32369 },
32370 },
32371 },
32372 {
32373 name: "SETBC",
32374 auxType: auxInt32,
32375 argLen: 1,
32376 asm: ppc64.ASETBC,
32377 reg: regInfo{
32378 outputs: []outputInfo{
32379 {0, 1073733624},
32380 },
32381 },
32382 },
32383 {
32384 name: "SETBCR",
32385 auxType: auxInt32,
32386 argLen: 1,
32387 asm: ppc64.ASETBCR,
32388 reg: regInfo{
32389 outputs: []outputInfo{
32390 {0, 1073733624},
32391 },
32392 },
32393 },
32394 {
32395 name: "Equal",
32396 argLen: 1,
32397 reg: regInfo{
32398 outputs: []outputInfo{
32399 {0, 1073733624},
32400 },
32401 },
32402 },
32403 {
32404 name: "NotEqual",
32405 argLen: 1,
32406 reg: regInfo{
32407 outputs: []outputInfo{
32408 {0, 1073733624},
32409 },
32410 },
32411 },
32412 {
32413 name: "LessThan",
32414 argLen: 1,
32415 reg: regInfo{
32416 outputs: []outputInfo{
32417 {0, 1073733624},
32418 },
32419 },
32420 },
32421 {
32422 name: "FLessThan",
32423 argLen: 1,
32424 reg: regInfo{
32425 outputs: []outputInfo{
32426 {0, 1073733624},
32427 },
32428 },
32429 },
32430 {
32431 name: "LessEqual",
32432 argLen: 1,
32433 reg: regInfo{
32434 outputs: []outputInfo{
32435 {0, 1073733624},
32436 },
32437 },
32438 },
32439 {
32440 name: "FLessEqual",
32441 argLen: 1,
32442 reg: regInfo{
32443 outputs: []outputInfo{
32444 {0, 1073733624},
32445 },
32446 },
32447 },
32448 {
32449 name: "GreaterThan",
32450 argLen: 1,
32451 reg: regInfo{
32452 outputs: []outputInfo{
32453 {0, 1073733624},
32454 },
32455 },
32456 },
32457 {
32458 name: "FGreaterThan",
32459 argLen: 1,
32460 reg: regInfo{
32461 outputs: []outputInfo{
32462 {0, 1073733624},
32463 },
32464 },
32465 },
32466 {
32467 name: "GreaterEqual",
32468 argLen: 1,
32469 reg: regInfo{
32470 outputs: []outputInfo{
32471 {0, 1073733624},
32472 },
32473 },
32474 },
32475 {
32476 name: "FGreaterEqual",
32477 argLen: 1,
32478 reg: regInfo{
32479 outputs: []outputInfo{
32480 {0, 1073733624},
32481 },
32482 },
32483 },
32484 {
32485 name: "LoweredGetClosurePtr",
32486 argLen: 0,
32487 zeroWidth: true,
32488 reg: regInfo{
32489 outputs: []outputInfo{
32490 {0, 2048},
32491 },
32492 },
32493 },
32494 {
32495 name: "LoweredGetCallerSP",
32496 argLen: 1,
32497 rematerializeable: true,
32498 reg: regInfo{
32499 outputs: []outputInfo{
32500 {0, 1073733624},
32501 },
32502 },
32503 },
32504 {
32505 name: "LoweredGetCallerPC",
32506 argLen: 0,
32507 rematerializeable: true,
32508 reg: regInfo{
32509 outputs: []outputInfo{
32510 {0, 1073733624},
32511 },
32512 },
32513 },
32514 {
32515 name: "LoweredNilCheck",
32516 argLen: 2,
32517 clobberFlags: true,
32518 nilCheck: true,
32519 faultOnNilArg0: true,
32520 reg: regInfo{
32521 inputs: []inputInfo{
32522 {0, 1073733630},
32523 },
32524 clobbers: 2147483648,
32525 },
32526 },
32527 {
32528 name: "LoweredRound32F",
32529 argLen: 1,
32530 resultInArg0: true,
32531 zeroWidth: true,
32532 reg: regInfo{
32533 inputs: []inputInfo{
32534 {0, 9223372032559808512},
32535 },
32536 outputs: []outputInfo{
32537 {0, 9223372032559808512},
32538 },
32539 },
32540 },
32541 {
32542 name: "LoweredRound64F",
32543 argLen: 1,
32544 resultInArg0: true,
32545 zeroWidth: true,
32546 reg: regInfo{
32547 inputs: []inputInfo{
32548 {0, 9223372032559808512},
32549 },
32550 outputs: []outputInfo{
32551 {0, 9223372032559808512},
32552 },
32553 },
32554 },
32555 {
32556 name: "CALLstatic",
32557 auxType: auxCallOff,
32558 argLen: -1,
32559 clobberFlags: true,
32560 call: true,
32561 reg: regInfo{
32562 clobbers: 18446744071562059768,
32563 },
32564 },
32565 {
32566 name: "CALLtail",
32567 auxType: auxCallOff,
32568 argLen: -1,
32569 clobberFlags: true,
32570 call: true,
32571 tailCall: true,
32572 reg: regInfo{
32573 clobbers: 18446744071562059768,
32574 },
32575 },
32576 {
32577 name: "CALLclosure",
32578 auxType: auxCallOff,
32579 argLen: -1,
32580 clobberFlags: true,
32581 call: true,
32582 reg: regInfo{
32583 inputs: []inputInfo{
32584 {0, 4096},
32585 {1, 2048},
32586 },
32587 clobbers: 18446744071562059768,
32588 },
32589 },
32590 {
32591 name: "CALLinter",
32592 auxType: auxCallOff,
32593 argLen: -1,
32594 clobberFlags: true,
32595 call: true,
32596 reg: regInfo{
32597 inputs: []inputInfo{
32598 {0, 4096},
32599 },
32600 clobbers: 18446744071562059768,
32601 },
32602 },
32603 {
32604 name: "LoweredZero",
32605 auxType: auxInt64,
32606 argLen: 2,
32607 clobberFlags: true,
32608 faultOnNilArg0: true,
32609 unsafePoint: true,
32610 reg: regInfo{
32611 inputs: []inputInfo{
32612 {0, 1048576},
32613 },
32614 clobbers: 1048576,
32615 },
32616 },
32617 {
32618 name: "LoweredZeroShort",
32619 auxType: auxInt64,
32620 argLen: 2,
32621 faultOnNilArg0: true,
32622 unsafePoint: true,
32623 reg: regInfo{
32624 inputs: []inputInfo{
32625 {0, 1073733624},
32626 },
32627 },
32628 },
32629 {
32630 name: "LoweredQuadZeroShort",
32631 auxType: auxInt64,
32632 argLen: 2,
32633 faultOnNilArg0: true,
32634 unsafePoint: true,
32635 reg: regInfo{
32636 inputs: []inputInfo{
32637 {0, 1073733624},
32638 },
32639 },
32640 },
32641 {
32642 name: "LoweredQuadZero",
32643 auxType: auxInt64,
32644 argLen: 2,
32645 clobberFlags: true,
32646 faultOnNilArg0: true,
32647 unsafePoint: true,
32648 reg: regInfo{
32649 inputs: []inputInfo{
32650 {0, 1048576},
32651 },
32652 clobbers: 1048576,
32653 },
32654 },
32655 {
32656 name: "LoweredMove",
32657 auxType: auxInt64,
32658 argLen: 3,
32659 clobberFlags: true,
32660 faultOnNilArg0: true,
32661 faultOnNilArg1: true,
32662 unsafePoint: true,
32663 reg: regInfo{
32664 inputs: []inputInfo{
32665 {0, 1048576},
32666 {1, 2097152},
32667 },
32668 clobbers: 3145728,
32669 },
32670 },
32671 {
32672 name: "LoweredMoveShort",
32673 auxType: auxInt64,
32674 argLen: 3,
32675 faultOnNilArg0: true,
32676 faultOnNilArg1: true,
32677 unsafePoint: true,
32678 reg: regInfo{
32679 inputs: []inputInfo{
32680 {0, 1073733624},
32681 {1, 1073733624},
32682 },
32683 },
32684 },
32685 {
32686 name: "LoweredQuadMove",
32687 auxType: auxInt64,
32688 argLen: 3,
32689 clobberFlags: true,
32690 faultOnNilArg0: true,
32691 faultOnNilArg1: true,
32692 unsafePoint: true,
32693 reg: regInfo{
32694 inputs: []inputInfo{
32695 {0, 1048576},
32696 {1, 2097152},
32697 },
32698 clobbers: 3145728,
32699 },
32700 },
32701 {
32702 name: "LoweredQuadMoveShort",
32703 auxType: auxInt64,
32704 argLen: 3,
32705 faultOnNilArg0: true,
32706 faultOnNilArg1: true,
32707 unsafePoint: true,
32708 reg: regInfo{
32709 inputs: []inputInfo{
32710 {0, 1073733624},
32711 {1, 1073733624},
32712 },
32713 },
32714 },
32715 {
32716 name: "LoweredAtomicStore8",
32717 auxType: auxInt64,
32718 argLen: 3,
32719 faultOnNilArg0: true,
32720 hasSideEffects: true,
32721 reg: regInfo{
32722 inputs: []inputInfo{
32723 {0, 1073733630},
32724 {1, 1073733630},
32725 },
32726 },
32727 },
32728 {
32729 name: "LoweredAtomicStore32",
32730 auxType: auxInt64,
32731 argLen: 3,
32732 faultOnNilArg0: true,
32733 hasSideEffects: true,
32734 reg: regInfo{
32735 inputs: []inputInfo{
32736 {0, 1073733630},
32737 {1, 1073733630},
32738 },
32739 },
32740 },
32741 {
32742 name: "LoweredAtomicStore64",
32743 auxType: auxInt64,
32744 argLen: 3,
32745 faultOnNilArg0: true,
32746 hasSideEffects: true,
32747 reg: regInfo{
32748 inputs: []inputInfo{
32749 {0, 1073733630},
32750 {1, 1073733630},
32751 },
32752 },
32753 },
32754 {
32755 name: "LoweredAtomicLoad8",
32756 auxType: auxInt64,
32757 argLen: 2,
32758 clobberFlags: true,
32759 faultOnNilArg0: true,
32760 reg: regInfo{
32761 inputs: []inputInfo{
32762 {0, 1073733630},
32763 },
32764 outputs: []outputInfo{
32765 {0, 1073733624},
32766 },
32767 },
32768 },
32769 {
32770 name: "LoweredAtomicLoad32",
32771 auxType: auxInt64,
32772 argLen: 2,
32773 clobberFlags: true,
32774 faultOnNilArg0: true,
32775 reg: regInfo{
32776 inputs: []inputInfo{
32777 {0, 1073733630},
32778 },
32779 outputs: []outputInfo{
32780 {0, 1073733624},
32781 },
32782 },
32783 },
32784 {
32785 name: "LoweredAtomicLoad64",
32786 auxType: auxInt64,
32787 argLen: 2,
32788 clobberFlags: true,
32789 faultOnNilArg0: true,
32790 reg: regInfo{
32791 inputs: []inputInfo{
32792 {0, 1073733630},
32793 },
32794 outputs: []outputInfo{
32795 {0, 1073733624},
32796 },
32797 },
32798 },
32799 {
32800 name: "LoweredAtomicLoadPtr",
32801 auxType: auxInt64,
32802 argLen: 2,
32803 clobberFlags: true,
32804 faultOnNilArg0: true,
32805 reg: regInfo{
32806 inputs: []inputInfo{
32807 {0, 1073733630},
32808 },
32809 outputs: []outputInfo{
32810 {0, 1073733624},
32811 },
32812 },
32813 },
32814 {
32815 name: "LoweredAtomicAdd32",
32816 argLen: 3,
32817 resultNotInArgs: true,
32818 clobberFlags: true,
32819 faultOnNilArg0: true,
32820 hasSideEffects: true,
32821 reg: regInfo{
32822 inputs: []inputInfo{
32823 {1, 1073733624},
32824 {0, 1073733630},
32825 },
32826 outputs: []outputInfo{
32827 {0, 1073733624},
32828 },
32829 },
32830 },
32831 {
32832 name: "LoweredAtomicAdd64",
32833 argLen: 3,
32834 resultNotInArgs: true,
32835 clobberFlags: true,
32836 faultOnNilArg0: true,
32837 hasSideEffects: true,
32838 reg: regInfo{
32839 inputs: []inputInfo{
32840 {1, 1073733624},
32841 {0, 1073733630},
32842 },
32843 outputs: []outputInfo{
32844 {0, 1073733624},
32845 },
32846 },
32847 },
32848 {
32849 name: "LoweredAtomicExchange8",
32850 argLen: 3,
32851 resultNotInArgs: true,
32852 clobberFlags: true,
32853 faultOnNilArg0: true,
32854 hasSideEffects: true,
32855 reg: regInfo{
32856 inputs: []inputInfo{
32857 {1, 1073733624},
32858 {0, 1073733630},
32859 },
32860 outputs: []outputInfo{
32861 {0, 1073733624},
32862 },
32863 },
32864 },
32865 {
32866 name: "LoweredAtomicExchange32",
32867 argLen: 3,
32868 resultNotInArgs: true,
32869 clobberFlags: true,
32870 faultOnNilArg0: true,
32871 hasSideEffects: true,
32872 reg: regInfo{
32873 inputs: []inputInfo{
32874 {1, 1073733624},
32875 {0, 1073733630},
32876 },
32877 outputs: []outputInfo{
32878 {0, 1073733624},
32879 },
32880 },
32881 },
32882 {
32883 name: "LoweredAtomicExchange64",
32884 argLen: 3,
32885 resultNotInArgs: true,
32886 clobberFlags: true,
32887 faultOnNilArg0: true,
32888 hasSideEffects: true,
32889 reg: regInfo{
32890 inputs: []inputInfo{
32891 {1, 1073733624},
32892 {0, 1073733630},
32893 },
32894 outputs: []outputInfo{
32895 {0, 1073733624},
32896 },
32897 },
32898 },
32899 {
32900 name: "LoweredAtomicCas64",
32901 auxType: auxInt64,
32902 argLen: 4,
32903 resultNotInArgs: true,
32904 clobberFlags: true,
32905 faultOnNilArg0: true,
32906 hasSideEffects: true,
32907 reg: regInfo{
32908 inputs: []inputInfo{
32909 {1, 1073733624},
32910 {2, 1073733624},
32911 {0, 1073733630},
32912 },
32913 outputs: []outputInfo{
32914 {0, 1073733624},
32915 },
32916 },
32917 },
32918 {
32919 name: "LoweredAtomicCas32",
32920 auxType: auxInt64,
32921 argLen: 4,
32922 resultNotInArgs: true,
32923 clobberFlags: true,
32924 faultOnNilArg0: true,
32925 hasSideEffects: true,
32926 reg: regInfo{
32927 inputs: []inputInfo{
32928 {1, 1073733624},
32929 {2, 1073733624},
32930 {0, 1073733630},
32931 },
32932 outputs: []outputInfo{
32933 {0, 1073733624},
32934 },
32935 },
32936 },
32937 {
32938 name: "LoweredAtomicAnd8",
32939 argLen: 3,
32940 faultOnNilArg0: true,
32941 hasSideEffects: true,
32942 asm: ppc64.AAND,
32943 reg: regInfo{
32944 inputs: []inputInfo{
32945 {0, 1073733630},
32946 {1, 1073733630},
32947 },
32948 },
32949 },
32950 {
32951 name: "LoweredAtomicAnd32",
32952 argLen: 3,
32953 faultOnNilArg0: true,
32954 hasSideEffects: true,
32955 asm: ppc64.AAND,
32956 reg: regInfo{
32957 inputs: []inputInfo{
32958 {0, 1073733630},
32959 {1, 1073733630},
32960 },
32961 },
32962 },
32963 {
32964 name: "LoweredAtomicOr8",
32965 argLen: 3,
32966 faultOnNilArg0: true,
32967 hasSideEffects: true,
32968 asm: ppc64.AOR,
32969 reg: regInfo{
32970 inputs: []inputInfo{
32971 {0, 1073733630},
32972 {1, 1073733630},
32973 },
32974 },
32975 },
32976 {
32977 name: "LoweredAtomicOr32",
32978 argLen: 3,
32979 faultOnNilArg0: true,
32980 hasSideEffects: true,
32981 asm: ppc64.AOR,
32982 reg: regInfo{
32983 inputs: []inputInfo{
32984 {0, 1073733630},
32985 {1, 1073733630},
32986 },
32987 },
32988 },
32989 {
32990 name: "LoweredWB",
32991 auxType: auxInt64,
32992 argLen: 1,
32993 clobberFlags: true,
32994 reg: regInfo{
32995 clobbers: 18446744072632408064,
32996 outputs: []outputInfo{
32997 {0, 536870912},
32998 },
32999 },
33000 },
33001 {
33002 name: "LoweredPubBarrier",
33003 argLen: 1,
33004 hasSideEffects: true,
33005 asm: ppc64.ALWSYNC,
33006 reg: regInfo{},
33007 },
33008 {
33009 name: "LoweredPanicBoundsA",
33010 auxType: auxInt64,
33011 argLen: 3,
33012 call: true,
33013 reg: regInfo{
33014 inputs: []inputInfo{
33015 {0, 32},
33016 {1, 64},
33017 },
33018 },
33019 },
33020 {
33021 name: "LoweredPanicBoundsB",
33022 auxType: auxInt64,
33023 argLen: 3,
33024 call: true,
33025 reg: regInfo{
33026 inputs: []inputInfo{
33027 {0, 16},
33028 {1, 32},
33029 },
33030 },
33031 },
33032 {
33033 name: "LoweredPanicBoundsC",
33034 auxType: auxInt64,
33035 argLen: 3,
33036 call: true,
33037 reg: regInfo{
33038 inputs: []inputInfo{
33039 {0, 8},
33040 {1, 16},
33041 },
33042 },
33043 },
33044 {
33045 name: "InvertFlags",
33046 argLen: 1,
33047 reg: regInfo{},
33048 },
33049 {
33050 name: "FlagEQ",
33051 argLen: 0,
33052 reg: regInfo{},
33053 },
33054 {
33055 name: "FlagLT",
33056 argLen: 0,
33057 reg: regInfo{},
33058 },
33059 {
33060 name: "FlagGT",
33061 argLen: 0,
33062 reg: regInfo{},
33063 },
33064
33065 {
33066 name: "ADD",
33067 argLen: 2,
33068 commutative: true,
33069 asm: riscv.AADD,
33070 reg: regInfo{
33071 inputs: []inputInfo{
33072 {0, 1006632944},
33073 {1, 1006632944},
33074 },
33075 outputs: []outputInfo{
33076 {0, 1006632944},
33077 },
33078 },
33079 },
33080 {
33081 name: "ADDI",
33082 auxType: auxInt64,
33083 argLen: 1,
33084 asm: riscv.AADDI,
33085 reg: regInfo{
33086 inputs: []inputInfo{
33087 {0, 9223372037861408754},
33088 },
33089 outputs: []outputInfo{
33090 {0, 1006632944},
33091 },
33092 },
33093 },
33094 {
33095 name: "ADDIW",
33096 auxType: auxInt64,
33097 argLen: 1,
33098 asm: riscv.AADDIW,
33099 reg: regInfo{
33100 inputs: []inputInfo{
33101 {0, 1006632944},
33102 },
33103 outputs: []outputInfo{
33104 {0, 1006632944},
33105 },
33106 },
33107 },
33108 {
33109 name: "NEG",
33110 argLen: 1,
33111 asm: riscv.ANEG,
33112 reg: regInfo{
33113 inputs: []inputInfo{
33114 {0, 1006632944},
33115 },
33116 outputs: []outputInfo{
33117 {0, 1006632944},
33118 },
33119 },
33120 },
33121 {
33122 name: "NEGW",
33123 argLen: 1,
33124 asm: riscv.ANEGW,
33125 reg: regInfo{
33126 inputs: []inputInfo{
33127 {0, 1006632944},
33128 },
33129 outputs: []outputInfo{
33130 {0, 1006632944},
33131 },
33132 },
33133 },
33134 {
33135 name: "SUB",
33136 argLen: 2,
33137 asm: riscv.ASUB,
33138 reg: regInfo{
33139 inputs: []inputInfo{
33140 {0, 1006632944},
33141 {1, 1006632944},
33142 },
33143 outputs: []outputInfo{
33144 {0, 1006632944},
33145 },
33146 },
33147 },
33148 {
33149 name: "SUBW",
33150 argLen: 2,
33151 asm: riscv.ASUBW,
33152 reg: regInfo{
33153 inputs: []inputInfo{
33154 {0, 1006632944},
33155 {1, 1006632944},
33156 },
33157 outputs: []outputInfo{
33158 {0, 1006632944},
33159 },
33160 },
33161 },
33162 {
33163 name: "MUL",
33164 argLen: 2,
33165 commutative: true,
33166 asm: riscv.AMUL,
33167 reg: regInfo{
33168 inputs: []inputInfo{
33169 {0, 1006632944},
33170 {1, 1006632944},
33171 },
33172 outputs: []outputInfo{
33173 {0, 1006632944},
33174 },
33175 },
33176 },
33177 {
33178 name: "MULW",
33179 argLen: 2,
33180 commutative: true,
33181 asm: riscv.AMULW,
33182 reg: regInfo{
33183 inputs: []inputInfo{
33184 {0, 1006632944},
33185 {1, 1006632944},
33186 },
33187 outputs: []outputInfo{
33188 {0, 1006632944},
33189 },
33190 },
33191 },
33192 {
33193 name: "MULH",
33194 argLen: 2,
33195 commutative: true,
33196 asm: riscv.AMULH,
33197 reg: regInfo{
33198 inputs: []inputInfo{
33199 {0, 1006632944},
33200 {1, 1006632944},
33201 },
33202 outputs: []outputInfo{
33203 {0, 1006632944},
33204 },
33205 },
33206 },
33207 {
33208 name: "MULHU",
33209 argLen: 2,
33210 commutative: true,
33211 asm: riscv.AMULHU,
33212 reg: regInfo{
33213 inputs: []inputInfo{
33214 {0, 1006632944},
33215 {1, 1006632944},
33216 },
33217 outputs: []outputInfo{
33218 {0, 1006632944},
33219 },
33220 },
33221 },
33222 {
33223 name: "LoweredMuluhilo",
33224 argLen: 2,
33225 resultNotInArgs: true,
33226 reg: regInfo{
33227 inputs: []inputInfo{
33228 {0, 1006632944},
33229 {1, 1006632944},
33230 },
33231 outputs: []outputInfo{
33232 {0, 1006632944},
33233 {1, 1006632944},
33234 },
33235 },
33236 },
33237 {
33238 name: "LoweredMuluover",
33239 argLen: 2,
33240 resultNotInArgs: true,
33241 reg: regInfo{
33242 inputs: []inputInfo{
33243 {0, 1006632944},
33244 {1, 1006632944},
33245 },
33246 outputs: []outputInfo{
33247 {0, 1006632944},
33248 {1, 1006632944},
33249 },
33250 },
33251 },
33252 {
33253 name: "DIV",
33254 argLen: 2,
33255 asm: riscv.ADIV,
33256 reg: regInfo{
33257 inputs: []inputInfo{
33258 {0, 1006632944},
33259 {1, 1006632944},
33260 },
33261 outputs: []outputInfo{
33262 {0, 1006632944},
33263 },
33264 },
33265 },
33266 {
33267 name: "DIVU",
33268 argLen: 2,
33269 asm: riscv.ADIVU,
33270 reg: regInfo{
33271 inputs: []inputInfo{
33272 {0, 1006632944},
33273 {1, 1006632944},
33274 },
33275 outputs: []outputInfo{
33276 {0, 1006632944},
33277 },
33278 },
33279 },
33280 {
33281 name: "DIVW",
33282 argLen: 2,
33283 asm: riscv.ADIVW,
33284 reg: regInfo{
33285 inputs: []inputInfo{
33286 {0, 1006632944},
33287 {1, 1006632944},
33288 },
33289 outputs: []outputInfo{
33290 {0, 1006632944},
33291 },
33292 },
33293 },
33294 {
33295 name: "DIVUW",
33296 argLen: 2,
33297 asm: riscv.ADIVUW,
33298 reg: regInfo{
33299 inputs: []inputInfo{
33300 {0, 1006632944},
33301 {1, 1006632944},
33302 },
33303 outputs: []outputInfo{
33304 {0, 1006632944},
33305 },
33306 },
33307 },
33308 {
33309 name: "REM",
33310 argLen: 2,
33311 asm: riscv.AREM,
33312 reg: regInfo{
33313 inputs: []inputInfo{
33314 {0, 1006632944},
33315 {1, 1006632944},
33316 },
33317 outputs: []outputInfo{
33318 {0, 1006632944},
33319 },
33320 },
33321 },
33322 {
33323 name: "REMU",
33324 argLen: 2,
33325 asm: riscv.AREMU,
33326 reg: regInfo{
33327 inputs: []inputInfo{
33328 {0, 1006632944},
33329 {1, 1006632944},
33330 },
33331 outputs: []outputInfo{
33332 {0, 1006632944},
33333 },
33334 },
33335 },
33336 {
33337 name: "REMW",
33338 argLen: 2,
33339 asm: riscv.AREMW,
33340 reg: regInfo{
33341 inputs: []inputInfo{
33342 {0, 1006632944},
33343 {1, 1006632944},
33344 },
33345 outputs: []outputInfo{
33346 {0, 1006632944},
33347 },
33348 },
33349 },
33350 {
33351 name: "REMUW",
33352 argLen: 2,
33353 asm: riscv.AREMUW,
33354 reg: regInfo{
33355 inputs: []inputInfo{
33356 {0, 1006632944},
33357 {1, 1006632944},
33358 },
33359 outputs: []outputInfo{
33360 {0, 1006632944},
33361 },
33362 },
33363 },
33364 {
33365 name: "MOVaddr",
33366 auxType: auxSymOff,
33367 argLen: 1,
33368 rematerializeable: true,
33369 symEffect: SymAddr,
33370 asm: riscv.AMOV,
33371 reg: regInfo{
33372 inputs: []inputInfo{
33373 {0, 9223372037861408754},
33374 },
33375 outputs: []outputInfo{
33376 {0, 1006632944},
33377 },
33378 },
33379 },
33380 {
33381 name: "MOVDconst",
33382 auxType: auxInt64,
33383 argLen: 0,
33384 rematerializeable: true,
33385 asm: riscv.AMOV,
33386 reg: regInfo{
33387 outputs: []outputInfo{
33388 {0, 1006632944},
33389 },
33390 },
33391 },
33392 {
33393 name: "MOVBload",
33394 auxType: auxSymOff,
33395 argLen: 2,
33396 faultOnNilArg0: true,
33397 symEffect: SymRead,
33398 asm: riscv.AMOVB,
33399 reg: regInfo{
33400 inputs: []inputInfo{
33401 {0, 9223372037861408754},
33402 },
33403 outputs: []outputInfo{
33404 {0, 1006632944},
33405 },
33406 },
33407 },
33408 {
33409 name: "MOVHload",
33410 auxType: auxSymOff,
33411 argLen: 2,
33412 faultOnNilArg0: true,
33413 symEffect: SymRead,
33414 asm: riscv.AMOVH,
33415 reg: regInfo{
33416 inputs: []inputInfo{
33417 {0, 9223372037861408754},
33418 },
33419 outputs: []outputInfo{
33420 {0, 1006632944},
33421 },
33422 },
33423 },
33424 {
33425 name: "MOVWload",
33426 auxType: auxSymOff,
33427 argLen: 2,
33428 faultOnNilArg0: true,
33429 symEffect: SymRead,
33430 asm: riscv.AMOVW,
33431 reg: regInfo{
33432 inputs: []inputInfo{
33433 {0, 9223372037861408754},
33434 },
33435 outputs: []outputInfo{
33436 {0, 1006632944},
33437 },
33438 },
33439 },
33440 {
33441 name: "MOVDload",
33442 auxType: auxSymOff,
33443 argLen: 2,
33444 faultOnNilArg0: true,
33445 symEffect: SymRead,
33446 asm: riscv.AMOV,
33447 reg: regInfo{
33448 inputs: []inputInfo{
33449 {0, 9223372037861408754},
33450 },
33451 outputs: []outputInfo{
33452 {0, 1006632944},
33453 },
33454 },
33455 },
33456 {
33457 name: "MOVBUload",
33458 auxType: auxSymOff,
33459 argLen: 2,
33460 faultOnNilArg0: true,
33461 symEffect: SymRead,
33462 asm: riscv.AMOVBU,
33463 reg: regInfo{
33464 inputs: []inputInfo{
33465 {0, 9223372037861408754},
33466 },
33467 outputs: []outputInfo{
33468 {0, 1006632944},
33469 },
33470 },
33471 },
33472 {
33473 name: "MOVHUload",
33474 auxType: auxSymOff,
33475 argLen: 2,
33476 faultOnNilArg0: true,
33477 symEffect: SymRead,
33478 asm: riscv.AMOVHU,
33479 reg: regInfo{
33480 inputs: []inputInfo{
33481 {0, 9223372037861408754},
33482 },
33483 outputs: []outputInfo{
33484 {0, 1006632944},
33485 },
33486 },
33487 },
33488 {
33489 name: "MOVWUload",
33490 auxType: auxSymOff,
33491 argLen: 2,
33492 faultOnNilArg0: true,
33493 symEffect: SymRead,
33494 asm: riscv.AMOVWU,
33495 reg: regInfo{
33496 inputs: []inputInfo{
33497 {0, 9223372037861408754},
33498 },
33499 outputs: []outputInfo{
33500 {0, 1006632944},
33501 },
33502 },
33503 },
33504 {
33505 name: "MOVBstore",
33506 auxType: auxSymOff,
33507 argLen: 3,
33508 faultOnNilArg0: true,
33509 symEffect: SymWrite,
33510 asm: riscv.AMOVB,
33511 reg: regInfo{
33512 inputs: []inputInfo{
33513 {1, 1006632946},
33514 {0, 9223372037861408754},
33515 },
33516 },
33517 },
33518 {
33519 name: "MOVHstore",
33520 auxType: auxSymOff,
33521 argLen: 3,
33522 faultOnNilArg0: true,
33523 symEffect: SymWrite,
33524 asm: riscv.AMOVH,
33525 reg: regInfo{
33526 inputs: []inputInfo{
33527 {1, 1006632946},
33528 {0, 9223372037861408754},
33529 },
33530 },
33531 },
33532 {
33533 name: "MOVWstore",
33534 auxType: auxSymOff,
33535 argLen: 3,
33536 faultOnNilArg0: true,
33537 symEffect: SymWrite,
33538 asm: riscv.AMOVW,
33539 reg: regInfo{
33540 inputs: []inputInfo{
33541 {1, 1006632946},
33542 {0, 9223372037861408754},
33543 },
33544 },
33545 },
33546 {
33547 name: "MOVDstore",
33548 auxType: auxSymOff,
33549 argLen: 3,
33550 faultOnNilArg0: true,
33551 symEffect: SymWrite,
33552 asm: riscv.AMOV,
33553 reg: regInfo{
33554 inputs: []inputInfo{
33555 {1, 1006632946},
33556 {0, 9223372037861408754},
33557 },
33558 },
33559 },
33560 {
33561 name: "MOVBstorezero",
33562 auxType: auxSymOff,
33563 argLen: 2,
33564 faultOnNilArg0: true,
33565 symEffect: SymWrite,
33566 asm: riscv.AMOVB,
33567 reg: regInfo{
33568 inputs: []inputInfo{
33569 {0, 9223372037861408754},
33570 },
33571 },
33572 },
33573 {
33574 name: "MOVHstorezero",
33575 auxType: auxSymOff,
33576 argLen: 2,
33577 faultOnNilArg0: true,
33578 symEffect: SymWrite,
33579 asm: riscv.AMOVH,
33580 reg: regInfo{
33581 inputs: []inputInfo{
33582 {0, 9223372037861408754},
33583 },
33584 },
33585 },
33586 {
33587 name: "MOVWstorezero",
33588 auxType: auxSymOff,
33589 argLen: 2,
33590 faultOnNilArg0: true,
33591 symEffect: SymWrite,
33592 asm: riscv.AMOVW,
33593 reg: regInfo{
33594 inputs: []inputInfo{
33595 {0, 9223372037861408754},
33596 },
33597 },
33598 },
33599 {
33600 name: "MOVDstorezero",
33601 auxType: auxSymOff,
33602 argLen: 2,
33603 faultOnNilArg0: true,
33604 symEffect: SymWrite,
33605 asm: riscv.AMOV,
33606 reg: regInfo{
33607 inputs: []inputInfo{
33608 {0, 9223372037861408754},
33609 },
33610 },
33611 },
33612 {
33613 name: "MOVBreg",
33614 argLen: 1,
33615 asm: riscv.AMOVB,
33616 reg: regInfo{
33617 inputs: []inputInfo{
33618 {0, 1006632944},
33619 },
33620 outputs: []outputInfo{
33621 {0, 1006632944},
33622 },
33623 },
33624 },
33625 {
33626 name: "MOVHreg",
33627 argLen: 1,
33628 asm: riscv.AMOVH,
33629 reg: regInfo{
33630 inputs: []inputInfo{
33631 {0, 1006632944},
33632 },
33633 outputs: []outputInfo{
33634 {0, 1006632944},
33635 },
33636 },
33637 },
33638 {
33639 name: "MOVWreg",
33640 argLen: 1,
33641 asm: riscv.AMOVW,
33642 reg: regInfo{
33643 inputs: []inputInfo{
33644 {0, 1006632944},
33645 },
33646 outputs: []outputInfo{
33647 {0, 1006632944},
33648 },
33649 },
33650 },
33651 {
33652 name: "MOVDreg",
33653 argLen: 1,
33654 asm: riscv.AMOV,
33655 reg: regInfo{
33656 inputs: []inputInfo{
33657 {0, 1006632944},
33658 },
33659 outputs: []outputInfo{
33660 {0, 1006632944},
33661 },
33662 },
33663 },
33664 {
33665 name: "MOVBUreg",
33666 argLen: 1,
33667 asm: riscv.AMOVBU,
33668 reg: regInfo{
33669 inputs: []inputInfo{
33670 {0, 1006632944},
33671 },
33672 outputs: []outputInfo{
33673 {0, 1006632944},
33674 },
33675 },
33676 },
33677 {
33678 name: "MOVHUreg",
33679 argLen: 1,
33680 asm: riscv.AMOVHU,
33681 reg: regInfo{
33682 inputs: []inputInfo{
33683 {0, 1006632944},
33684 },
33685 outputs: []outputInfo{
33686 {0, 1006632944},
33687 },
33688 },
33689 },
33690 {
33691 name: "MOVWUreg",
33692 argLen: 1,
33693 asm: riscv.AMOVWU,
33694 reg: regInfo{
33695 inputs: []inputInfo{
33696 {0, 1006632944},
33697 },
33698 outputs: []outputInfo{
33699 {0, 1006632944},
33700 },
33701 },
33702 },
33703 {
33704 name: "MOVDnop",
33705 argLen: 1,
33706 resultInArg0: true,
33707 reg: regInfo{
33708 inputs: []inputInfo{
33709 {0, 1006632944},
33710 },
33711 outputs: []outputInfo{
33712 {0, 1006632944},
33713 },
33714 },
33715 },
33716 {
33717 name: "SLL",
33718 argLen: 2,
33719 asm: riscv.ASLL,
33720 reg: regInfo{
33721 inputs: []inputInfo{
33722 {0, 1006632944},
33723 {1, 1006632944},
33724 },
33725 outputs: []outputInfo{
33726 {0, 1006632944},
33727 },
33728 },
33729 },
33730 {
33731 name: "SLLW",
33732 argLen: 2,
33733 asm: riscv.ASLLW,
33734 reg: regInfo{
33735 inputs: []inputInfo{
33736 {0, 1006632944},
33737 {1, 1006632944},
33738 },
33739 outputs: []outputInfo{
33740 {0, 1006632944},
33741 },
33742 },
33743 },
33744 {
33745 name: "SRA",
33746 argLen: 2,
33747 asm: riscv.ASRA,
33748 reg: regInfo{
33749 inputs: []inputInfo{
33750 {0, 1006632944},
33751 {1, 1006632944},
33752 },
33753 outputs: []outputInfo{
33754 {0, 1006632944},
33755 },
33756 },
33757 },
33758 {
33759 name: "SRAW",
33760 argLen: 2,
33761 asm: riscv.ASRAW,
33762 reg: regInfo{
33763 inputs: []inputInfo{
33764 {0, 1006632944},
33765 {1, 1006632944},
33766 },
33767 outputs: []outputInfo{
33768 {0, 1006632944},
33769 },
33770 },
33771 },
33772 {
33773 name: "SRL",
33774 argLen: 2,
33775 asm: riscv.ASRL,
33776 reg: regInfo{
33777 inputs: []inputInfo{
33778 {0, 1006632944},
33779 {1, 1006632944},
33780 },
33781 outputs: []outputInfo{
33782 {0, 1006632944},
33783 },
33784 },
33785 },
33786 {
33787 name: "SRLW",
33788 argLen: 2,
33789 asm: riscv.ASRLW,
33790 reg: regInfo{
33791 inputs: []inputInfo{
33792 {0, 1006632944},
33793 {1, 1006632944},
33794 },
33795 outputs: []outputInfo{
33796 {0, 1006632944},
33797 },
33798 },
33799 },
33800 {
33801 name: "SLLI",
33802 auxType: auxInt64,
33803 argLen: 1,
33804 asm: riscv.ASLLI,
33805 reg: regInfo{
33806 inputs: []inputInfo{
33807 {0, 1006632944},
33808 },
33809 outputs: []outputInfo{
33810 {0, 1006632944},
33811 },
33812 },
33813 },
33814 {
33815 name: "SLLIW",
33816 auxType: auxInt64,
33817 argLen: 1,
33818 asm: riscv.ASLLIW,
33819 reg: regInfo{
33820 inputs: []inputInfo{
33821 {0, 1006632944},
33822 },
33823 outputs: []outputInfo{
33824 {0, 1006632944},
33825 },
33826 },
33827 },
33828 {
33829 name: "SRAI",
33830 auxType: auxInt64,
33831 argLen: 1,
33832 asm: riscv.ASRAI,
33833 reg: regInfo{
33834 inputs: []inputInfo{
33835 {0, 1006632944},
33836 },
33837 outputs: []outputInfo{
33838 {0, 1006632944},
33839 },
33840 },
33841 },
33842 {
33843 name: "SRAIW",
33844 auxType: auxInt64,
33845 argLen: 1,
33846 asm: riscv.ASRAIW,
33847 reg: regInfo{
33848 inputs: []inputInfo{
33849 {0, 1006632944},
33850 },
33851 outputs: []outputInfo{
33852 {0, 1006632944},
33853 },
33854 },
33855 },
33856 {
33857 name: "SRLI",
33858 auxType: auxInt64,
33859 argLen: 1,
33860 asm: riscv.ASRLI,
33861 reg: regInfo{
33862 inputs: []inputInfo{
33863 {0, 1006632944},
33864 },
33865 outputs: []outputInfo{
33866 {0, 1006632944},
33867 },
33868 },
33869 },
33870 {
33871 name: "SRLIW",
33872 auxType: auxInt64,
33873 argLen: 1,
33874 asm: riscv.ASRLIW,
33875 reg: regInfo{
33876 inputs: []inputInfo{
33877 {0, 1006632944},
33878 },
33879 outputs: []outputInfo{
33880 {0, 1006632944},
33881 },
33882 },
33883 },
33884 {
33885 name: "SH1ADD",
33886 argLen: 2,
33887 asm: riscv.ASH1ADD,
33888 reg: regInfo{
33889 inputs: []inputInfo{
33890 {0, 1006632944},
33891 {1, 1006632944},
33892 },
33893 outputs: []outputInfo{
33894 {0, 1006632944},
33895 },
33896 },
33897 },
33898 {
33899 name: "SH2ADD",
33900 argLen: 2,
33901 asm: riscv.ASH2ADD,
33902 reg: regInfo{
33903 inputs: []inputInfo{
33904 {0, 1006632944},
33905 {1, 1006632944},
33906 },
33907 outputs: []outputInfo{
33908 {0, 1006632944},
33909 },
33910 },
33911 },
33912 {
33913 name: "SH3ADD",
33914 argLen: 2,
33915 asm: riscv.ASH3ADD,
33916 reg: regInfo{
33917 inputs: []inputInfo{
33918 {0, 1006632944},
33919 {1, 1006632944},
33920 },
33921 outputs: []outputInfo{
33922 {0, 1006632944},
33923 },
33924 },
33925 },
33926 {
33927 name: "AND",
33928 argLen: 2,
33929 commutative: true,
33930 asm: riscv.AAND,
33931 reg: regInfo{
33932 inputs: []inputInfo{
33933 {0, 1006632944},
33934 {1, 1006632944},
33935 },
33936 outputs: []outputInfo{
33937 {0, 1006632944},
33938 },
33939 },
33940 },
33941 {
33942 name: "ANDN",
33943 argLen: 2,
33944 asm: riscv.AANDN,
33945 reg: regInfo{
33946 inputs: []inputInfo{
33947 {0, 1006632944},
33948 {1, 1006632944},
33949 },
33950 outputs: []outputInfo{
33951 {0, 1006632944},
33952 },
33953 },
33954 },
33955 {
33956 name: "ANDI",
33957 auxType: auxInt64,
33958 argLen: 1,
33959 asm: riscv.AANDI,
33960 reg: regInfo{
33961 inputs: []inputInfo{
33962 {0, 1006632944},
33963 },
33964 outputs: []outputInfo{
33965 {0, 1006632944},
33966 },
33967 },
33968 },
33969 {
33970 name: "CLZ",
33971 argLen: 1,
33972 asm: riscv.ACLZ,
33973 reg: regInfo{
33974 inputs: []inputInfo{
33975 {0, 1006632944},
33976 },
33977 outputs: []outputInfo{
33978 {0, 1006632944},
33979 },
33980 },
33981 },
33982 {
33983 name: "CLZW",
33984 argLen: 1,
33985 asm: riscv.ACLZW,
33986 reg: regInfo{
33987 inputs: []inputInfo{
33988 {0, 1006632944},
33989 },
33990 outputs: []outputInfo{
33991 {0, 1006632944},
33992 },
33993 },
33994 },
33995 {
33996 name: "CPOP",
33997 argLen: 1,
33998 asm: riscv.ACPOP,
33999 reg: regInfo{
34000 inputs: []inputInfo{
34001 {0, 1006632944},
34002 },
34003 outputs: []outputInfo{
34004 {0, 1006632944},
34005 },
34006 },
34007 },
34008 {
34009 name: "CPOPW",
34010 argLen: 1,
34011 asm: riscv.ACPOPW,
34012 reg: regInfo{
34013 inputs: []inputInfo{
34014 {0, 1006632944},
34015 },
34016 outputs: []outputInfo{
34017 {0, 1006632944},
34018 },
34019 },
34020 },
34021 {
34022 name: "CTZ",
34023 argLen: 1,
34024 asm: riscv.ACTZ,
34025 reg: regInfo{
34026 inputs: []inputInfo{
34027 {0, 1006632944},
34028 },
34029 outputs: []outputInfo{
34030 {0, 1006632944},
34031 },
34032 },
34033 },
34034 {
34035 name: "CTZW",
34036 argLen: 1,
34037 asm: riscv.ACTZW,
34038 reg: regInfo{
34039 inputs: []inputInfo{
34040 {0, 1006632944},
34041 },
34042 outputs: []outputInfo{
34043 {0, 1006632944},
34044 },
34045 },
34046 },
34047 {
34048 name: "NOT",
34049 argLen: 1,
34050 asm: riscv.ANOT,
34051 reg: regInfo{
34052 inputs: []inputInfo{
34053 {0, 1006632944},
34054 },
34055 outputs: []outputInfo{
34056 {0, 1006632944},
34057 },
34058 },
34059 },
34060 {
34061 name: "OR",
34062 argLen: 2,
34063 commutative: true,
34064 asm: riscv.AOR,
34065 reg: regInfo{
34066 inputs: []inputInfo{
34067 {0, 1006632944},
34068 {1, 1006632944},
34069 },
34070 outputs: []outputInfo{
34071 {0, 1006632944},
34072 },
34073 },
34074 },
34075 {
34076 name: "ORN",
34077 argLen: 2,
34078 asm: riscv.AORN,
34079 reg: regInfo{
34080 inputs: []inputInfo{
34081 {0, 1006632944},
34082 {1, 1006632944},
34083 },
34084 outputs: []outputInfo{
34085 {0, 1006632944},
34086 },
34087 },
34088 },
34089 {
34090 name: "ORI",
34091 auxType: auxInt64,
34092 argLen: 1,
34093 asm: riscv.AORI,
34094 reg: regInfo{
34095 inputs: []inputInfo{
34096 {0, 1006632944},
34097 },
34098 outputs: []outputInfo{
34099 {0, 1006632944},
34100 },
34101 },
34102 },
34103 {
34104 name: "REV8",
34105 argLen: 1,
34106 asm: riscv.AREV8,
34107 reg: regInfo{
34108 inputs: []inputInfo{
34109 {0, 1006632944},
34110 },
34111 outputs: []outputInfo{
34112 {0, 1006632944},
34113 },
34114 },
34115 },
34116 {
34117 name: "ROL",
34118 argLen: 2,
34119 asm: riscv.AROL,
34120 reg: regInfo{
34121 inputs: []inputInfo{
34122 {0, 1006632944},
34123 {1, 1006632944},
34124 },
34125 outputs: []outputInfo{
34126 {0, 1006632944},
34127 },
34128 },
34129 },
34130 {
34131 name: "ROLW",
34132 argLen: 2,
34133 asm: riscv.AROLW,
34134 reg: regInfo{
34135 inputs: []inputInfo{
34136 {0, 1006632944},
34137 {1, 1006632944},
34138 },
34139 outputs: []outputInfo{
34140 {0, 1006632944},
34141 },
34142 },
34143 },
34144 {
34145 name: "ROR",
34146 argLen: 2,
34147 asm: riscv.AROR,
34148 reg: regInfo{
34149 inputs: []inputInfo{
34150 {0, 1006632944},
34151 {1, 1006632944},
34152 },
34153 outputs: []outputInfo{
34154 {0, 1006632944},
34155 },
34156 },
34157 },
34158 {
34159 name: "RORI",
34160 auxType: auxInt64,
34161 argLen: 1,
34162 asm: riscv.ARORI,
34163 reg: regInfo{
34164 inputs: []inputInfo{
34165 {0, 1006632944},
34166 },
34167 outputs: []outputInfo{
34168 {0, 1006632944},
34169 },
34170 },
34171 },
34172 {
34173 name: "RORIW",
34174 auxType: auxInt64,
34175 argLen: 1,
34176 asm: riscv.ARORIW,
34177 reg: regInfo{
34178 inputs: []inputInfo{
34179 {0, 1006632944},
34180 },
34181 outputs: []outputInfo{
34182 {0, 1006632944},
34183 },
34184 },
34185 },
34186 {
34187 name: "RORW",
34188 argLen: 2,
34189 asm: riscv.ARORW,
34190 reg: regInfo{
34191 inputs: []inputInfo{
34192 {0, 1006632944},
34193 {1, 1006632944},
34194 },
34195 outputs: []outputInfo{
34196 {0, 1006632944},
34197 },
34198 },
34199 },
34200 {
34201 name: "XNOR",
34202 argLen: 2,
34203 commutative: true,
34204 asm: riscv.AXNOR,
34205 reg: regInfo{
34206 inputs: []inputInfo{
34207 {0, 1006632944},
34208 {1, 1006632944},
34209 },
34210 outputs: []outputInfo{
34211 {0, 1006632944},
34212 },
34213 },
34214 },
34215 {
34216 name: "XOR",
34217 argLen: 2,
34218 commutative: true,
34219 asm: riscv.AXOR,
34220 reg: regInfo{
34221 inputs: []inputInfo{
34222 {0, 1006632944},
34223 {1, 1006632944},
34224 },
34225 outputs: []outputInfo{
34226 {0, 1006632944},
34227 },
34228 },
34229 },
34230 {
34231 name: "XORI",
34232 auxType: auxInt64,
34233 argLen: 1,
34234 asm: riscv.AXORI,
34235 reg: regInfo{
34236 inputs: []inputInfo{
34237 {0, 1006632944},
34238 },
34239 outputs: []outputInfo{
34240 {0, 1006632944},
34241 },
34242 },
34243 },
34244 {
34245 name: "MIN",
34246 argLen: 2,
34247 commutative: true,
34248 asm: riscv.AMIN,
34249 reg: regInfo{
34250 inputs: []inputInfo{
34251 {0, 1006632944},
34252 {1, 1006632944},
34253 },
34254 outputs: []outputInfo{
34255 {0, 1006632944},
34256 },
34257 },
34258 },
34259 {
34260 name: "MAX",
34261 argLen: 2,
34262 commutative: true,
34263 asm: riscv.AMAX,
34264 reg: regInfo{
34265 inputs: []inputInfo{
34266 {0, 1006632944},
34267 {1, 1006632944},
34268 },
34269 outputs: []outputInfo{
34270 {0, 1006632944},
34271 },
34272 },
34273 },
34274 {
34275 name: "MINU",
34276 argLen: 2,
34277 commutative: true,
34278 asm: riscv.AMINU,
34279 reg: regInfo{
34280 inputs: []inputInfo{
34281 {0, 1006632944},
34282 {1, 1006632944},
34283 },
34284 outputs: []outputInfo{
34285 {0, 1006632944},
34286 },
34287 },
34288 },
34289 {
34290 name: "MAXU",
34291 argLen: 2,
34292 commutative: true,
34293 asm: riscv.AMAXU,
34294 reg: regInfo{
34295 inputs: []inputInfo{
34296 {0, 1006632944},
34297 {1, 1006632944},
34298 },
34299 outputs: []outputInfo{
34300 {0, 1006632944},
34301 },
34302 },
34303 },
34304 {
34305 name: "SEQZ",
34306 argLen: 1,
34307 asm: riscv.ASEQZ,
34308 reg: regInfo{
34309 inputs: []inputInfo{
34310 {0, 1006632944},
34311 },
34312 outputs: []outputInfo{
34313 {0, 1006632944},
34314 },
34315 },
34316 },
34317 {
34318 name: "SNEZ",
34319 argLen: 1,
34320 asm: riscv.ASNEZ,
34321 reg: regInfo{
34322 inputs: []inputInfo{
34323 {0, 1006632944},
34324 },
34325 outputs: []outputInfo{
34326 {0, 1006632944},
34327 },
34328 },
34329 },
34330 {
34331 name: "SLT",
34332 argLen: 2,
34333 asm: riscv.ASLT,
34334 reg: regInfo{
34335 inputs: []inputInfo{
34336 {0, 1006632944},
34337 {1, 1006632944},
34338 },
34339 outputs: []outputInfo{
34340 {0, 1006632944},
34341 },
34342 },
34343 },
34344 {
34345 name: "SLTI",
34346 auxType: auxInt64,
34347 argLen: 1,
34348 asm: riscv.ASLTI,
34349 reg: regInfo{
34350 inputs: []inputInfo{
34351 {0, 1006632944},
34352 },
34353 outputs: []outputInfo{
34354 {0, 1006632944},
34355 },
34356 },
34357 },
34358 {
34359 name: "SLTU",
34360 argLen: 2,
34361 asm: riscv.ASLTU,
34362 reg: regInfo{
34363 inputs: []inputInfo{
34364 {0, 1006632944},
34365 {1, 1006632944},
34366 },
34367 outputs: []outputInfo{
34368 {0, 1006632944},
34369 },
34370 },
34371 },
34372 {
34373 name: "SLTIU",
34374 auxType: auxInt64,
34375 argLen: 1,
34376 asm: riscv.ASLTIU,
34377 reg: regInfo{
34378 inputs: []inputInfo{
34379 {0, 1006632944},
34380 },
34381 outputs: []outputInfo{
34382 {0, 1006632944},
34383 },
34384 },
34385 },
34386 {
34387 name: "LoweredRound32F",
34388 argLen: 1,
34389 resultInArg0: true,
34390 reg: regInfo{
34391 inputs: []inputInfo{
34392 {0, 9223372034707292160},
34393 },
34394 outputs: []outputInfo{
34395 {0, 9223372034707292160},
34396 },
34397 },
34398 },
34399 {
34400 name: "LoweredRound64F",
34401 argLen: 1,
34402 resultInArg0: true,
34403 reg: regInfo{
34404 inputs: []inputInfo{
34405 {0, 9223372034707292160},
34406 },
34407 outputs: []outputInfo{
34408 {0, 9223372034707292160},
34409 },
34410 },
34411 },
34412 {
34413 name: "CALLstatic",
34414 auxType: auxCallOff,
34415 argLen: -1,
34416 call: true,
34417 reg: regInfo{
34418 clobbers: 9223372035781033968,
34419 },
34420 },
34421 {
34422 name: "CALLtail",
34423 auxType: auxCallOff,
34424 argLen: -1,
34425 call: true,
34426 tailCall: true,
34427 reg: regInfo{
34428 clobbers: 9223372035781033968,
34429 },
34430 },
34431 {
34432 name: "CALLclosure",
34433 auxType: auxCallOff,
34434 argLen: -1,
34435 call: true,
34436 reg: regInfo{
34437 inputs: []inputInfo{
34438 {1, 33554432},
34439 {0, 1006632946},
34440 },
34441 clobbers: 9223372035781033968,
34442 },
34443 },
34444 {
34445 name: "CALLinter",
34446 auxType: auxCallOff,
34447 argLen: -1,
34448 call: true,
34449 reg: regInfo{
34450 inputs: []inputInfo{
34451 {0, 1006632944},
34452 },
34453 clobbers: 9223372035781033968,
34454 },
34455 },
34456 {
34457 name: "DUFFZERO",
34458 auxType: auxInt64,
34459 argLen: 2,
34460 faultOnNilArg0: true,
34461 reg: regInfo{
34462 inputs: []inputInfo{
34463 {0, 16777216},
34464 },
34465 clobbers: 16777216,
34466 },
34467 },
34468 {
34469 name: "DUFFCOPY",
34470 auxType: auxInt64,
34471 argLen: 3,
34472 faultOnNilArg0: true,
34473 faultOnNilArg1: true,
34474 reg: regInfo{
34475 inputs: []inputInfo{
34476 {0, 16777216},
34477 {1, 8388608},
34478 },
34479 clobbers: 25165824,
34480 },
34481 },
34482 {
34483 name: "LoweredZero",
34484 auxType: auxInt64,
34485 argLen: 3,
34486 faultOnNilArg0: true,
34487 reg: regInfo{
34488 inputs: []inputInfo{
34489 {0, 16},
34490 {1, 1006632944},
34491 },
34492 clobbers: 16,
34493 },
34494 },
34495 {
34496 name: "LoweredMove",
34497 auxType: auxInt64,
34498 argLen: 4,
34499 faultOnNilArg0: true,
34500 faultOnNilArg1: true,
34501 reg: regInfo{
34502 inputs: []inputInfo{
34503 {0, 16},
34504 {1, 32},
34505 {2, 1006632880},
34506 },
34507 clobbers: 112,
34508 },
34509 },
34510 {
34511 name: "LoweredAtomicLoad8",
34512 argLen: 2,
34513 faultOnNilArg0: true,
34514 reg: regInfo{
34515 inputs: []inputInfo{
34516 {0, 9223372037861408754},
34517 },
34518 outputs: []outputInfo{
34519 {0, 1006632944},
34520 },
34521 },
34522 },
34523 {
34524 name: "LoweredAtomicLoad32",
34525 argLen: 2,
34526 faultOnNilArg0: true,
34527 reg: regInfo{
34528 inputs: []inputInfo{
34529 {0, 9223372037861408754},
34530 },
34531 outputs: []outputInfo{
34532 {0, 1006632944},
34533 },
34534 },
34535 },
34536 {
34537 name: "LoweredAtomicLoad64",
34538 argLen: 2,
34539 faultOnNilArg0: true,
34540 reg: regInfo{
34541 inputs: []inputInfo{
34542 {0, 9223372037861408754},
34543 },
34544 outputs: []outputInfo{
34545 {0, 1006632944},
34546 },
34547 },
34548 },
34549 {
34550 name: "LoweredAtomicStore8",
34551 argLen: 3,
34552 faultOnNilArg0: true,
34553 hasSideEffects: true,
34554 reg: regInfo{
34555 inputs: []inputInfo{
34556 {1, 1006632946},
34557 {0, 9223372037861408754},
34558 },
34559 },
34560 },
34561 {
34562 name: "LoweredAtomicStore32",
34563 argLen: 3,
34564 faultOnNilArg0: true,
34565 hasSideEffects: true,
34566 reg: regInfo{
34567 inputs: []inputInfo{
34568 {1, 1006632946},
34569 {0, 9223372037861408754},
34570 },
34571 },
34572 },
34573 {
34574 name: "LoweredAtomicStore64",
34575 argLen: 3,
34576 faultOnNilArg0: true,
34577 hasSideEffects: true,
34578 reg: regInfo{
34579 inputs: []inputInfo{
34580 {1, 1006632946},
34581 {0, 9223372037861408754},
34582 },
34583 },
34584 },
34585 {
34586 name: "LoweredAtomicExchange32",
34587 argLen: 3,
34588 resultNotInArgs: true,
34589 faultOnNilArg0: true,
34590 hasSideEffects: true,
34591 reg: regInfo{
34592 inputs: []inputInfo{
34593 {1, 1073741808},
34594 {0, 9223372037928517618},
34595 },
34596 outputs: []outputInfo{
34597 {0, 1006632944},
34598 },
34599 },
34600 },
34601 {
34602 name: "LoweredAtomicExchange64",
34603 argLen: 3,
34604 resultNotInArgs: true,
34605 faultOnNilArg0: true,
34606 hasSideEffects: true,
34607 reg: regInfo{
34608 inputs: []inputInfo{
34609 {1, 1073741808},
34610 {0, 9223372037928517618},
34611 },
34612 outputs: []outputInfo{
34613 {0, 1006632944},
34614 },
34615 },
34616 },
34617 {
34618 name: "LoweredAtomicAdd32",
34619 argLen: 3,
34620 resultNotInArgs: true,
34621 faultOnNilArg0: true,
34622 hasSideEffects: true,
34623 unsafePoint: true,
34624 reg: regInfo{
34625 inputs: []inputInfo{
34626 {1, 1073741808},
34627 {0, 9223372037928517618},
34628 },
34629 outputs: []outputInfo{
34630 {0, 1006632944},
34631 },
34632 },
34633 },
34634 {
34635 name: "LoweredAtomicAdd64",
34636 argLen: 3,
34637 resultNotInArgs: true,
34638 faultOnNilArg0: true,
34639 hasSideEffects: true,
34640 unsafePoint: true,
34641 reg: regInfo{
34642 inputs: []inputInfo{
34643 {1, 1073741808},
34644 {0, 9223372037928517618},
34645 },
34646 outputs: []outputInfo{
34647 {0, 1006632944},
34648 },
34649 },
34650 },
34651 {
34652 name: "LoweredAtomicCas32",
34653 argLen: 4,
34654 resultNotInArgs: true,
34655 faultOnNilArg0: true,
34656 hasSideEffects: true,
34657 unsafePoint: true,
34658 reg: regInfo{
34659 inputs: []inputInfo{
34660 {1, 1073741808},
34661 {2, 1073741808},
34662 {0, 9223372037928517618},
34663 },
34664 outputs: []outputInfo{
34665 {0, 1006632944},
34666 },
34667 },
34668 },
34669 {
34670 name: "LoweredAtomicCas64",
34671 argLen: 4,
34672 resultNotInArgs: true,
34673 faultOnNilArg0: true,
34674 hasSideEffects: true,
34675 unsafePoint: true,
34676 reg: regInfo{
34677 inputs: []inputInfo{
34678 {1, 1073741808},
34679 {2, 1073741808},
34680 {0, 9223372037928517618},
34681 },
34682 outputs: []outputInfo{
34683 {0, 1006632944},
34684 },
34685 },
34686 },
34687 {
34688 name: "LoweredAtomicAnd32",
34689 argLen: 3,
34690 faultOnNilArg0: true,
34691 hasSideEffects: true,
34692 asm: riscv.AAMOANDW,
34693 reg: regInfo{
34694 inputs: []inputInfo{
34695 {1, 1073741808},
34696 {0, 9223372037928517618},
34697 },
34698 },
34699 },
34700 {
34701 name: "LoweredAtomicOr32",
34702 argLen: 3,
34703 faultOnNilArg0: true,
34704 hasSideEffects: true,
34705 asm: riscv.AAMOORW,
34706 reg: regInfo{
34707 inputs: []inputInfo{
34708 {1, 1073741808},
34709 {0, 9223372037928517618},
34710 },
34711 },
34712 },
34713 {
34714 name: "LoweredNilCheck",
34715 argLen: 2,
34716 nilCheck: true,
34717 faultOnNilArg0: true,
34718 reg: regInfo{
34719 inputs: []inputInfo{
34720 {0, 1006632946},
34721 },
34722 },
34723 },
34724 {
34725 name: "LoweredGetClosurePtr",
34726 argLen: 0,
34727 reg: regInfo{
34728 outputs: []outputInfo{
34729 {0, 33554432},
34730 },
34731 },
34732 },
34733 {
34734 name: "LoweredGetCallerSP",
34735 argLen: 1,
34736 rematerializeable: true,
34737 reg: regInfo{
34738 outputs: []outputInfo{
34739 {0, 1006632944},
34740 },
34741 },
34742 },
34743 {
34744 name: "LoweredGetCallerPC",
34745 argLen: 0,
34746 rematerializeable: true,
34747 reg: regInfo{
34748 outputs: []outputInfo{
34749 {0, 1006632944},
34750 },
34751 },
34752 },
34753 {
34754 name: "LoweredWB",
34755 auxType: auxInt64,
34756 argLen: 1,
34757 clobberFlags: true,
34758 reg: regInfo{
34759 clobbers: 9223372034707292160,
34760 outputs: []outputInfo{
34761 {0, 8388608},
34762 },
34763 },
34764 },
34765 {
34766 name: "LoweredPubBarrier",
34767 argLen: 1,
34768 hasSideEffects: true,
34769 asm: riscv.AFENCE,
34770 reg: regInfo{},
34771 },
34772 {
34773 name: "LoweredPanicBoundsA",
34774 auxType: auxInt64,
34775 argLen: 3,
34776 call: true,
34777 reg: regInfo{
34778 inputs: []inputInfo{
34779 {0, 64},
34780 {1, 134217728},
34781 },
34782 },
34783 },
34784 {
34785 name: "LoweredPanicBoundsB",
34786 auxType: auxInt64,
34787 argLen: 3,
34788 call: true,
34789 reg: regInfo{
34790 inputs: []inputInfo{
34791 {0, 32},
34792 {1, 64},
34793 },
34794 },
34795 },
34796 {
34797 name: "LoweredPanicBoundsC",
34798 auxType: auxInt64,
34799 argLen: 3,
34800 call: true,
34801 reg: regInfo{
34802 inputs: []inputInfo{
34803 {0, 16},
34804 {1, 32},
34805 },
34806 },
34807 },
34808 {
34809 name: "FADDS",
34810 argLen: 2,
34811 commutative: true,
34812 asm: riscv.AFADDS,
34813 reg: regInfo{
34814 inputs: []inputInfo{
34815 {0, 9223372034707292160},
34816 {1, 9223372034707292160},
34817 },
34818 outputs: []outputInfo{
34819 {0, 9223372034707292160},
34820 },
34821 },
34822 },
34823 {
34824 name: "FSUBS",
34825 argLen: 2,
34826 asm: riscv.AFSUBS,
34827 reg: regInfo{
34828 inputs: []inputInfo{
34829 {0, 9223372034707292160},
34830 {1, 9223372034707292160},
34831 },
34832 outputs: []outputInfo{
34833 {0, 9223372034707292160},
34834 },
34835 },
34836 },
34837 {
34838 name: "FMULS",
34839 argLen: 2,
34840 commutative: true,
34841 asm: riscv.AFMULS,
34842 reg: regInfo{
34843 inputs: []inputInfo{
34844 {0, 9223372034707292160},
34845 {1, 9223372034707292160},
34846 },
34847 outputs: []outputInfo{
34848 {0, 9223372034707292160},
34849 },
34850 },
34851 },
34852 {
34853 name: "FDIVS",
34854 argLen: 2,
34855 asm: riscv.AFDIVS,
34856 reg: regInfo{
34857 inputs: []inputInfo{
34858 {0, 9223372034707292160},
34859 {1, 9223372034707292160},
34860 },
34861 outputs: []outputInfo{
34862 {0, 9223372034707292160},
34863 },
34864 },
34865 },
34866 {
34867 name: "FMADDS",
34868 argLen: 3,
34869 commutative: true,
34870 asm: riscv.AFMADDS,
34871 reg: regInfo{
34872 inputs: []inputInfo{
34873 {0, 9223372034707292160},
34874 {1, 9223372034707292160},
34875 {2, 9223372034707292160},
34876 },
34877 outputs: []outputInfo{
34878 {0, 9223372034707292160},
34879 },
34880 },
34881 },
34882 {
34883 name: "FMSUBS",
34884 argLen: 3,
34885 commutative: true,
34886 asm: riscv.AFMSUBS,
34887 reg: regInfo{
34888 inputs: []inputInfo{
34889 {0, 9223372034707292160},
34890 {1, 9223372034707292160},
34891 {2, 9223372034707292160},
34892 },
34893 outputs: []outputInfo{
34894 {0, 9223372034707292160},
34895 },
34896 },
34897 },
34898 {
34899 name: "FNMADDS",
34900 argLen: 3,
34901 commutative: true,
34902 asm: riscv.AFNMADDS,
34903 reg: regInfo{
34904 inputs: []inputInfo{
34905 {0, 9223372034707292160},
34906 {1, 9223372034707292160},
34907 {2, 9223372034707292160},
34908 },
34909 outputs: []outputInfo{
34910 {0, 9223372034707292160},
34911 },
34912 },
34913 },
34914 {
34915 name: "FNMSUBS",
34916 argLen: 3,
34917 commutative: true,
34918 asm: riscv.AFNMSUBS,
34919 reg: regInfo{
34920 inputs: []inputInfo{
34921 {0, 9223372034707292160},
34922 {1, 9223372034707292160},
34923 {2, 9223372034707292160},
34924 },
34925 outputs: []outputInfo{
34926 {0, 9223372034707292160},
34927 },
34928 },
34929 },
34930 {
34931 name: "FSQRTS",
34932 argLen: 1,
34933 asm: riscv.AFSQRTS,
34934 reg: regInfo{
34935 inputs: []inputInfo{
34936 {0, 9223372034707292160},
34937 },
34938 outputs: []outputInfo{
34939 {0, 9223372034707292160},
34940 },
34941 },
34942 },
34943 {
34944 name: "FNEGS",
34945 argLen: 1,
34946 asm: riscv.AFNEGS,
34947 reg: regInfo{
34948 inputs: []inputInfo{
34949 {0, 9223372034707292160},
34950 },
34951 outputs: []outputInfo{
34952 {0, 9223372034707292160},
34953 },
34954 },
34955 },
34956 {
34957 name: "FMVSX",
34958 argLen: 1,
34959 asm: riscv.AFMVSX,
34960 reg: regInfo{
34961 inputs: []inputInfo{
34962 {0, 1006632944},
34963 },
34964 outputs: []outputInfo{
34965 {0, 9223372034707292160},
34966 },
34967 },
34968 },
34969 {
34970 name: "FCVTSW",
34971 argLen: 1,
34972 asm: riscv.AFCVTSW,
34973 reg: regInfo{
34974 inputs: []inputInfo{
34975 {0, 1006632944},
34976 },
34977 outputs: []outputInfo{
34978 {0, 9223372034707292160},
34979 },
34980 },
34981 },
34982 {
34983 name: "FCVTSL",
34984 argLen: 1,
34985 asm: riscv.AFCVTSL,
34986 reg: regInfo{
34987 inputs: []inputInfo{
34988 {0, 1006632944},
34989 },
34990 outputs: []outputInfo{
34991 {0, 9223372034707292160},
34992 },
34993 },
34994 },
34995 {
34996 name: "FCVTWS",
34997 argLen: 1,
34998 asm: riscv.AFCVTWS,
34999 reg: regInfo{
35000 inputs: []inputInfo{
35001 {0, 9223372034707292160},
35002 },
35003 outputs: []outputInfo{
35004 {0, 1006632944},
35005 },
35006 },
35007 },
35008 {
35009 name: "FCVTLS",
35010 argLen: 1,
35011 asm: riscv.AFCVTLS,
35012 reg: regInfo{
35013 inputs: []inputInfo{
35014 {0, 9223372034707292160},
35015 },
35016 outputs: []outputInfo{
35017 {0, 1006632944},
35018 },
35019 },
35020 },
35021 {
35022 name: "FMOVWload",
35023 auxType: auxSymOff,
35024 argLen: 2,
35025 faultOnNilArg0: true,
35026 symEffect: SymRead,
35027 asm: riscv.AMOVF,
35028 reg: regInfo{
35029 inputs: []inputInfo{
35030 {0, 9223372037861408754},
35031 },
35032 outputs: []outputInfo{
35033 {0, 9223372034707292160},
35034 },
35035 },
35036 },
35037 {
35038 name: "FMOVWstore",
35039 auxType: auxSymOff,
35040 argLen: 3,
35041 faultOnNilArg0: true,
35042 symEffect: SymWrite,
35043 asm: riscv.AMOVF,
35044 reg: regInfo{
35045 inputs: []inputInfo{
35046 {0, 9223372037861408754},
35047 {1, 9223372034707292160},
35048 },
35049 },
35050 },
35051 {
35052 name: "FEQS",
35053 argLen: 2,
35054 commutative: true,
35055 asm: riscv.AFEQS,
35056 reg: regInfo{
35057 inputs: []inputInfo{
35058 {0, 9223372034707292160},
35059 {1, 9223372034707292160},
35060 },
35061 outputs: []outputInfo{
35062 {0, 1006632944},
35063 },
35064 },
35065 },
35066 {
35067 name: "FNES",
35068 argLen: 2,
35069 commutative: true,
35070 asm: riscv.AFNES,
35071 reg: regInfo{
35072 inputs: []inputInfo{
35073 {0, 9223372034707292160},
35074 {1, 9223372034707292160},
35075 },
35076 outputs: []outputInfo{
35077 {0, 1006632944},
35078 },
35079 },
35080 },
35081 {
35082 name: "FLTS",
35083 argLen: 2,
35084 asm: riscv.AFLTS,
35085 reg: regInfo{
35086 inputs: []inputInfo{
35087 {0, 9223372034707292160},
35088 {1, 9223372034707292160},
35089 },
35090 outputs: []outputInfo{
35091 {0, 1006632944},
35092 },
35093 },
35094 },
35095 {
35096 name: "FLES",
35097 argLen: 2,
35098 asm: riscv.AFLES,
35099 reg: regInfo{
35100 inputs: []inputInfo{
35101 {0, 9223372034707292160},
35102 {1, 9223372034707292160},
35103 },
35104 outputs: []outputInfo{
35105 {0, 1006632944},
35106 },
35107 },
35108 },
35109 {
35110 name: "LoweredFMAXS",
35111 argLen: 2,
35112 commutative: true,
35113 resultNotInArgs: true,
35114 asm: riscv.AFMAXS,
35115 reg: regInfo{
35116 inputs: []inputInfo{
35117 {0, 9223372034707292160},
35118 {1, 9223372034707292160},
35119 },
35120 outputs: []outputInfo{
35121 {0, 9223372034707292160},
35122 },
35123 },
35124 },
35125 {
35126 name: "LoweredFMINS",
35127 argLen: 2,
35128 commutative: true,
35129 resultNotInArgs: true,
35130 asm: riscv.AFMINS,
35131 reg: regInfo{
35132 inputs: []inputInfo{
35133 {0, 9223372034707292160},
35134 {1, 9223372034707292160},
35135 },
35136 outputs: []outputInfo{
35137 {0, 9223372034707292160},
35138 },
35139 },
35140 },
35141 {
35142 name: "FADDD",
35143 argLen: 2,
35144 commutative: true,
35145 asm: riscv.AFADDD,
35146 reg: regInfo{
35147 inputs: []inputInfo{
35148 {0, 9223372034707292160},
35149 {1, 9223372034707292160},
35150 },
35151 outputs: []outputInfo{
35152 {0, 9223372034707292160},
35153 },
35154 },
35155 },
35156 {
35157 name: "FSUBD",
35158 argLen: 2,
35159 asm: riscv.AFSUBD,
35160 reg: regInfo{
35161 inputs: []inputInfo{
35162 {0, 9223372034707292160},
35163 {1, 9223372034707292160},
35164 },
35165 outputs: []outputInfo{
35166 {0, 9223372034707292160},
35167 },
35168 },
35169 },
35170 {
35171 name: "FMULD",
35172 argLen: 2,
35173 commutative: true,
35174 asm: riscv.AFMULD,
35175 reg: regInfo{
35176 inputs: []inputInfo{
35177 {0, 9223372034707292160},
35178 {1, 9223372034707292160},
35179 },
35180 outputs: []outputInfo{
35181 {0, 9223372034707292160},
35182 },
35183 },
35184 },
35185 {
35186 name: "FDIVD",
35187 argLen: 2,
35188 asm: riscv.AFDIVD,
35189 reg: regInfo{
35190 inputs: []inputInfo{
35191 {0, 9223372034707292160},
35192 {1, 9223372034707292160},
35193 },
35194 outputs: []outputInfo{
35195 {0, 9223372034707292160},
35196 },
35197 },
35198 },
35199 {
35200 name: "FMADDD",
35201 argLen: 3,
35202 commutative: true,
35203 asm: riscv.AFMADDD,
35204 reg: regInfo{
35205 inputs: []inputInfo{
35206 {0, 9223372034707292160},
35207 {1, 9223372034707292160},
35208 {2, 9223372034707292160},
35209 },
35210 outputs: []outputInfo{
35211 {0, 9223372034707292160},
35212 },
35213 },
35214 },
35215 {
35216 name: "FMSUBD",
35217 argLen: 3,
35218 commutative: true,
35219 asm: riscv.AFMSUBD,
35220 reg: regInfo{
35221 inputs: []inputInfo{
35222 {0, 9223372034707292160},
35223 {1, 9223372034707292160},
35224 {2, 9223372034707292160},
35225 },
35226 outputs: []outputInfo{
35227 {0, 9223372034707292160},
35228 },
35229 },
35230 },
35231 {
35232 name: "FNMADDD",
35233 argLen: 3,
35234 commutative: true,
35235 asm: riscv.AFNMADDD,
35236 reg: regInfo{
35237 inputs: []inputInfo{
35238 {0, 9223372034707292160},
35239 {1, 9223372034707292160},
35240 {2, 9223372034707292160},
35241 },
35242 outputs: []outputInfo{
35243 {0, 9223372034707292160},
35244 },
35245 },
35246 },
35247 {
35248 name: "FNMSUBD",
35249 argLen: 3,
35250 commutative: true,
35251 asm: riscv.AFNMSUBD,
35252 reg: regInfo{
35253 inputs: []inputInfo{
35254 {0, 9223372034707292160},
35255 {1, 9223372034707292160},
35256 {2, 9223372034707292160},
35257 },
35258 outputs: []outputInfo{
35259 {0, 9223372034707292160},
35260 },
35261 },
35262 },
35263 {
35264 name: "FSQRTD",
35265 argLen: 1,
35266 asm: riscv.AFSQRTD,
35267 reg: regInfo{
35268 inputs: []inputInfo{
35269 {0, 9223372034707292160},
35270 },
35271 outputs: []outputInfo{
35272 {0, 9223372034707292160},
35273 },
35274 },
35275 },
35276 {
35277 name: "FNEGD",
35278 argLen: 1,
35279 asm: riscv.AFNEGD,
35280 reg: regInfo{
35281 inputs: []inputInfo{
35282 {0, 9223372034707292160},
35283 },
35284 outputs: []outputInfo{
35285 {0, 9223372034707292160},
35286 },
35287 },
35288 },
35289 {
35290 name: "FABSD",
35291 argLen: 1,
35292 asm: riscv.AFABSD,
35293 reg: regInfo{
35294 inputs: []inputInfo{
35295 {0, 9223372034707292160},
35296 },
35297 outputs: []outputInfo{
35298 {0, 9223372034707292160},
35299 },
35300 },
35301 },
35302 {
35303 name: "FSGNJD",
35304 argLen: 2,
35305 asm: riscv.AFSGNJD,
35306 reg: regInfo{
35307 inputs: []inputInfo{
35308 {0, 9223372034707292160},
35309 {1, 9223372034707292160},
35310 },
35311 outputs: []outputInfo{
35312 {0, 9223372034707292160},
35313 },
35314 },
35315 },
35316 {
35317 name: "FMVDX",
35318 argLen: 1,
35319 asm: riscv.AFMVDX,
35320 reg: regInfo{
35321 inputs: []inputInfo{
35322 {0, 1006632944},
35323 },
35324 outputs: []outputInfo{
35325 {0, 9223372034707292160},
35326 },
35327 },
35328 },
35329 {
35330 name: "FCVTDW",
35331 argLen: 1,
35332 asm: riscv.AFCVTDW,
35333 reg: regInfo{
35334 inputs: []inputInfo{
35335 {0, 1006632944},
35336 },
35337 outputs: []outputInfo{
35338 {0, 9223372034707292160},
35339 },
35340 },
35341 },
35342 {
35343 name: "FCVTDL",
35344 argLen: 1,
35345 asm: riscv.AFCVTDL,
35346 reg: regInfo{
35347 inputs: []inputInfo{
35348 {0, 1006632944},
35349 },
35350 outputs: []outputInfo{
35351 {0, 9223372034707292160},
35352 },
35353 },
35354 },
35355 {
35356 name: "FCVTWD",
35357 argLen: 1,
35358 asm: riscv.AFCVTWD,
35359 reg: regInfo{
35360 inputs: []inputInfo{
35361 {0, 9223372034707292160},
35362 },
35363 outputs: []outputInfo{
35364 {0, 1006632944},
35365 },
35366 },
35367 },
35368 {
35369 name: "FCVTLD",
35370 argLen: 1,
35371 asm: riscv.AFCVTLD,
35372 reg: regInfo{
35373 inputs: []inputInfo{
35374 {0, 9223372034707292160},
35375 },
35376 outputs: []outputInfo{
35377 {0, 1006632944},
35378 },
35379 },
35380 },
35381 {
35382 name: "FCVTDS",
35383 argLen: 1,
35384 asm: riscv.AFCVTDS,
35385 reg: regInfo{
35386 inputs: []inputInfo{
35387 {0, 9223372034707292160},
35388 },
35389 outputs: []outputInfo{
35390 {0, 9223372034707292160},
35391 },
35392 },
35393 },
35394 {
35395 name: "FCVTSD",
35396 argLen: 1,
35397 asm: riscv.AFCVTSD,
35398 reg: regInfo{
35399 inputs: []inputInfo{
35400 {0, 9223372034707292160},
35401 },
35402 outputs: []outputInfo{
35403 {0, 9223372034707292160},
35404 },
35405 },
35406 },
35407 {
35408 name: "FMOVDload",
35409 auxType: auxSymOff,
35410 argLen: 2,
35411 faultOnNilArg0: true,
35412 symEffect: SymRead,
35413 asm: riscv.AMOVD,
35414 reg: regInfo{
35415 inputs: []inputInfo{
35416 {0, 9223372037861408754},
35417 },
35418 outputs: []outputInfo{
35419 {0, 9223372034707292160},
35420 },
35421 },
35422 },
35423 {
35424 name: "FMOVDstore",
35425 auxType: auxSymOff,
35426 argLen: 3,
35427 faultOnNilArg0: true,
35428 symEffect: SymWrite,
35429 asm: riscv.AMOVD,
35430 reg: regInfo{
35431 inputs: []inputInfo{
35432 {0, 9223372037861408754},
35433 {1, 9223372034707292160},
35434 },
35435 },
35436 },
35437 {
35438 name: "FEQD",
35439 argLen: 2,
35440 commutative: true,
35441 asm: riscv.AFEQD,
35442 reg: regInfo{
35443 inputs: []inputInfo{
35444 {0, 9223372034707292160},
35445 {1, 9223372034707292160},
35446 },
35447 outputs: []outputInfo{
35448 {0, 1006632944},
35449 },
35450 },
35451 },
35452 {
35453 name: "FNED",
35454 argLen: 2,
35455 commutative: true,
35456 asm: riscv.AFNED,
35457 reg: regInfo{
35458 inputs: []inputInfo{
35459 {0, 9223372034707292160},
35460 {1, 9223372034707292160},
35461 },
35462 outputs: []outputInfo{
35463 {0, 1006632944},
35464 },
35465 },
35466 },
35467 {
35468 name: "FLTD",
35469 argLen: 2,
35470 asm: riscv.AFLTD,
35471 reg: regInfo{
35472 inputs: []inputInfo{
35473 {0, 9223372034707292160},
35474 {1, 9223372034707292160},
35475 },
35476 outputs: []outputInfo{
35477 {0, 1006632944},
35478 },
35479 },
35480 },
35481 {
35482 name: "FLED",
35483 argLen: 2,
35484 asm: riscv.AFLED,
35485 reg: regInfo{
35486 inputs: []inputInfo{
35487 {0, 9223372034707292160},
35488 {1, 9223372034707292160},
35489 },
35490 outputs: []outputInfo{
35491 {0, 1006632944},
35492 },
35493 },
35494 },
35495 {
35496 name: "LoweredFMIND",
35497 argLen: 2,
35498 commutative: true,
35499 resultNotInArgs: true,
35500 asm: riscv.AFMIND,
35501 reg: regInfo{
35502 inputs: []inputInfo{
35503 {0, 9223372034707292160},
35504 {1, 9223372034707292160},
35505 },
35506 outputs: []outputInfo{
35507 {0, 9223372034707292160},
35508 },
35509 },
35510 },
35511 {
35512 name: "LoweredFMAXD",
35513 argLen: 2,
35514 commutative: true,
35515 resultNotInArgs: true,
35516 asm: riscv.AFMAXD,
35517 reg: regInfo{
35518 inputs: []inputInfo{
35519 {0, 9223372034707292160},
35520 {1, 9223372034707292160},
35521 },
35522 outputs: []outputInfo{
35523 {0, 9223372034707292160},
35524 },
35525 },
35526 },
35527
35528 {
35529 name: "FADDS",
35530 argLen: 2,
35531 commutative: true,
35532 resultInArg0: true,
35533 asm: s390x.AFADDS,
35534 reg: regInfo{
35535 inputs: []inputInfo{
35536 {0, 4294901760},
35537 {1, 4294901760},
35538 },
35539 outputs: []outputInfo{
35540 {0, 4294901760},
35541 },
35542 },
35543 },
35544 {
35545 name: "FADD",
35546 argLen: 2,
35547 commutative: true,
35548 resultInArg0: true,
35549 asm: s390x.AFADD,
35550 reg: regInfo{
35551 inputs: []inputInfo{
35552 {0, 4294901760},
35553 {1, 4294901760},
35554 },
35555 outputs: []outputInfo{
35556 {0, 4294901760},
35557 },
35558 },
35559 },
35560 {
35561 name: "FSUBS",
35562 argLen: 2,
35563 resultInArg0: true,
35564 asm: s390x.AFSUBS,
35565 reg: regInfo{
35566 inputs: []inputInfo{
35567 {0, 4294901760},
35568 {1, 4294901760},
35569 },
35570 outputs: []outputInfo{
35571 {0, 4294901760},
35572 },
35573 },
35574 },
35575 {
35576 name: "FSUB",
35577 argLen: 2,
35578 resultInArg0: true,
35579 asm: s390x.AFSUB,
35580 reg: regInfo{
35581 inputs: []inputInfo{
35582 {0, 4294901760},
35583 {1, 4294901760},
35584 },
35585 outputs: []outputInfo{
35586 {0, 4294901760},
35587 },
35588 },
35589 },
35590 {
35591 name: "FMULS",
35592 argLen: 2,
35593 commutative: true,
35594 resultInArg0: true,
35595 asm: s390x.AFMULS,
35596 reg: regInfo{
35597 inputs: []inputInfo{
35598 {0, 4294901760},
35599 {1, 4294901760},
35600 },
35601 outputs: []outputInfo{
35602 {0, 4294901760},
35603 },
35604 },
35605 },
35606 {
35607 name: "FMUL",
35608 argLen: 2,
35609 commutative: true,
35610 resultInArg0: true,
35611 asm: s390x.AFMUL,
35612 reg: regInfo{
35613 inputs: []inputInfo{
35614 {0, 4294901760},
35615 {1, 4294901760},
35616 },
35617 outputs: []outputInfo{
35618 {0, 4294901760},
35619 },
35620 },
35621 },
35622 {
35623 name: "FDIVS",
35624 argLen: 2,
35625 resultInArg0: true,
35626 asm: s390x.AFDIVS,
35627 reg: regInfo{
35628 inputs: []inputInfo{
35629 {0, 4294901760},
35630 {1, 4294901760},
35631 },
35632 outputs: []outputInfo{
35633 {0, 4294901760},
35634 },
35635 },
35636 },
35637 {
35638 name: "FDIV",
35639 argLen: 2,
35640 resultInArg0: true,
35641 asm: s390x.AFDIV,
35642 reg: regInfo{
35643 inputs: []inputInfo{
35644 {0, 4294901760},
35645 {1, 4294901760},
35646 },
35647 outputs: []outputInfo{
35648 {0, 4294901760},
35649 },
35650 },
35651 },
35652 {
35653 name: "FNEGS",
35654 argLen: 1,
35655 clobberFlags: true,
35656 asm: s390x.AFNEGS,
35657 reg: regInfo{
35658 inputs: []inputInfo{
35659 {0, 4294901760},
35660 },
35661 outputs: []outputInfo{
35662 {0, 4294901760},
35663 },
35664 },
35665 },
35666 {
35667 name: "FNEG",
35668 argLen: 1,
35669 clobberFlags: true,
35670 asm: s390x.AFNEG,
35671 reg: regInfo{
35672 inputs: []inputInfo{
35673 {0, 4294901760},
35674 },
35675 outputs: []outputInfo{
35676 {0, 4294901760},
35677 },
35678 },
35679 },
35680 {
35681 name: "FMADDS",
35682 argLen: 3,
35683 resultInArg0: true,
35684 asm: s390x.AFMADDS,
35685 reg: regInfo{
35686 inputs: []inputInfo{
35687 {0, 4294901760},
35688 {1, 4294901760},
35689 {2, 4294901760},
35690 },
35691 outputs: []outputInfo{
35692 {0, 4294901760},
35693 },
35694 },
35695 },
35696 {
35697 name: "FMADD",
35698 argLen: 3,
35699 resultInArg0: true,
35700 asm: s390x.AFMADD,
35701 reg: regInfo{
35702 inputs: []inputInfo{
35703 {0, 4294901760},
35704 {1, 4294901760},
35705 {2, 4294901760},
35706 },
35707 outputs: []outputInfo{
35708 {0, 4294901760},
35709 },
35710 },
35711 },
35712 {
35713 name: "FMSUBS",
35714 argLen: 3,
35715 resultInArg0: true,
35716 asm: s390x.AFMSUBS,
35717 reg: regInfo{
35718 inputs: []inputInfo{
35719 {0, 4294901760},
35720 {1, 4294901760},
35721 {2, 4294901760},
35722 },
35723 outputs: []outputInfo{
35724 {0, 4294901760},
35725 },
35726 },
35727 },
35728 {
35729 name: "FMSUB",
35730 argLen: 3,
35731 resultInArg0: true,
35732 asm: s390x.AFMSUB,
35733 reg: regInfo{
35734 inputs: []inputInfo{
35735 {0, 4294901760},
35736 {1, 4294901760},
35737 {2, 4294901760},
35738 },
35739 outputs: []outputInfo{
35740 {0, 4294901760},
35741 },
35742 },
35743 },
35744 {
35745 name: "LPDFR",
35746 argLen: 1,
35747 asm: s390x.ALPDFR,
35748 reg: regInfo{
35749 inputs: []inputInfo{
35750 {0, 4294901760},
35751 },
35752 outputs: []outputInfo{
35753 {0, 4294901760},
35754 },
35755 },
35756 },
35757 {
35758 name: "LNDFR",
35759 argLen: 1,
35760 asm: s390x.ALNDFR,
35761 reg: regInfo{
35762 inputs: []inputInfo{
35763 {0, 4294901760},
35764 },
35765 outputs: []outputInfo{
35766 {0, 4294901760},
35767 },
35768 },
35769 },
35770 {
35771 name: "CPSDR",
35772 argLen: 2,
35773 asm: s390x.ACPSDR,
35774 reg: regInfo{
35775 inputs: []inputInfo{
35776 {0, 4294901760},
35777 {1, 4294901760},
35778 },
35779 outputs: []outputInfo{
35780 {0, 4294901760},
35781 },
35782 },
35783 },
35784 {
35785 name: "FIDBR",
35786 auxType: auxInt8,
35787 argLen: 1,
35788 asm: s390x.AFIDBR,
35789 reg: regInfo{
35790 inputs: []inputInfo{
35791 {0, 4294901760},
35792 },
35793 outputs: []outputInfo{
35794 {0, 4294901760},
35795 },
35796 },
35797 },
35798 {
35799 name: "FMOVSload",
35800 auxType: auxSymOff,
35801 argLen: 2,
35802 faultOnNilArg0: true,
35803 symEffect: SymRead,
35804 asm: s390x.AFMOVS,
35805 reg: regInfo{
35806 inputs: []inputInfo{
35807 {0, 4295023614},
35808 },
35809 outputs: []outputInfo{
35810 {0, 4294901760},
35811 },
35812 },
35813 },
35814 {
35815 name: "FMOVDload",
35816 auxType: auxSymOff,
35817 argLen: 2,
35818 faultOnNilArg0: true,
35819 symEffect: SymRead,
35820 asm: s390x.AFMOVD,
35821 reg: regInfo{
35822 inputs: []inputInfo{
35823 {0, 4295023614},
35824 },
35825 outputs: []outputInfo{
35826 {0, 4294901760},
35827 },
35828 },
35829 },
35830 {
35831 name: "FMOVSconst",
35832 auxType: auxFloat32,
35833 argLen: 0,
35834 rematerializeable: true,
35835 asm: s390x.AFMOVS,
35836 reg: regInfo{
35837 outputs: []outputInfo{
35838 {0, 4294901760},
35839 },
35840 },
35841 },
35842 {
35843 name: "FMOVDconst",
35844 auxType: auxFloat64,
35845 argLen: 0,
35846 rematerializeable: true,
35847 asm: s390x.AFMOVD,
35848 reg: regInfo{
35849 outputs: []outputInfo{
35850 {0, 4294901760},
35851 },
35852 },
35853 },
35854 {
35855 name: "FMOVSloadidx",
35856 auxType: auxSymOff,
35857 argLen: 3,
35858 symEffect: SymRead,
35859 asm: s390x.AFMOVS,
35860 reg: regInfo{
35861 inputs: []inputInfo{
35862 {0, 56318},
35863 {1, 56318},
35864 },
35865 outputs: []outputInfo{
35866 {0, 4294901760},
35867 },
35868 },
35869 },
35870 {
35871 name: "FMOVDloadidx",
35872 auxType: auxSymOff,
35873 argLen: 3,
35874 symEffect: SymRead,
35875 asm: s390x.AFMOVD,
35876 reg: regInfo{
35877 inputs: []inputInfo{
35878 {0, 56318},
35879 {1, 56318},
35880 },
35881 outputs: []outputInfo{
35882 {0, 4294901760},
35883 },
35884 },
35885 },
35886 {
35887 name: "FMOVSstore",
35888 auxType: auxSymOff,
35889 argLen: 3,
35890 faultOnNilArg0: true,
35891 symEffect: SymWrite,
35892 asm: s390x.AFMOVS,
35893 reg: regInfo{
35894 inputs: []inputInfo{
35895 {0, 4295023614},
35896 {1, 4294901760},
35897 },
35898 },
35899 },
35900 {
35901 name: "FMOVDstore",
35902 auxType: auxSymOff,
35903 argLen: 3,
35904 faultOnNilArg0: true,
35905 symEffect: SymWrite,
35906 asm: s390x.AFMOVD,
35907 reg: regInfo{
35908 inputs: []inputInfo{
35909 {0, 4295023614},
35910 {1, 4294901760},
35911 },
35912 },
35913 },
35914 {
35915 name: "FMOVSstoreidx",
35916 auxType: auxSymOff,
35917 argLen: 4,
35918 symEffect: SymWrite,
35919 asm: s390x.AFMOVS,
35920 reg: regInfo{
35921 inputs: []inputInfo{
35922 {0, 56318},
35923 {1, 56318},
35924 {2, 4294901760},
35925 },
35926 },
35927 },
35928 {
35929 name: "FMOVDstoreidx",
35930 auxType: auxSymOff,
35931 argLen: 4,
35932 symEffect: SymWrite,
35933 asm: s390x.AFMOVD,
35934 reg: regInfo{
35935 inputs: []inputInfo{
35936 {0, 56318},
35937 {1, 56318},
35938 {2, 4294901760},
35939 },
35940 },
35941 },
35942 {
35943 name: "ADD",
35944 argLen: 2,
35945 commutative: true,
35946 clobberFlags: true,
35947 asm: s390x.AADD,
35948 reg: regInfo{
35949 inputs: []inputInfo{
35950 {1, 23551},
35951 {0, 56319},
35952 },
35953 outputs: []outputInfo{
35954 {0, 23551},
35955 },
35956 },
35957 },
35958 {
35959 name: "ADDW",
35960 argLen: 2,
35961 commutative: true,
35962 clobberFlags: true,
35963 asm: s390x.AADDW,
35964 reg: regInfo{
35965 inputs: []inputInfo{
35966 {1, 23551},
35967 {0, 56319},
35968 },
35969 outputs: []outputInfo{
35970 {0, 23551},
35971 },
35972 },
35973 },
35974 {
35975 name: "ADDconst",
35976 auxType: auxInt32,
35977 argLen: 1,
35978 clobberFlags: true,
35979 asm: s390x.AADD,
35980 reg: regInfo{
35981 inputs: []inputInfo{
35982 {0, 56319},
35983 },
35984 outputs: []outputInfo{
35985 {0, 23551},
35986 },
35987 },
35988 },
35989 {
35990 name: "ADDWconst",
35991 auxType: auxInt32,
35992 argLen: 1,
35993 clobberFlags: true,
35994 asm: s390x.AADDW,
35995 reg: regInfo{
35996 inputs: []inputInfo{
35997 {0, 56319},
35998 },
35999 outputs: []outputInfo{
36000 {0, 23551},
36001 },
36002 },
36003 },
36004 {
36005 name: "ADDload",
36006 auxType: auxSymOff,
36007 argLen: 3,
36008 resultInArg0: true,
36009 clobberFlags: true,
36010 faultOnNilArg1: true,
36011 symEffect: SymRead,
36012 asm: s390x.AADD,
36013 reg: regInfo{
36014 inputs: []inputInfo{
36015 {0, 23551},
36016 {1, 56318},
36017 },
36018 outputs: []outputInfo{
36019 {0, 23551},
36020 },
36021 },
36022 },
36023 {
36024 name: "ADDWload",
36025 auxType: auxSymOff,
36026 argLen: 3,
36027 resultInArg0: true,
36028 clobberFlags: true,
36029 faultOnNilArg1: true,
36030 symEffect: SymRead,
36031 asm: s390x.AADDW,
36032 reg: regInfo{
36033 inputs: []inputInfo{
36034 {0, 23551},
36035 {1, 56318},
36036 },
36037 outputs: []outputInfo{
36038 {0, 23551},
36039 },
36040 },
36041 },
36042 {
36043 name: "SUB",
36044 argLen: 2,
36045 clobberFlags: true,
36046 asm: s390x.ASUB,
36047 reg: regInfo{
36048 inputs: []inputInfo{
36049 {0, 23551},
36050 {1, 23551},
36051 },
36052 outputs: []outputInfo{
36053 {0, 23551},
36054 },
36055 },
36056 },
36057 {
36058 name: "SUBW",
36059 argLen: 2,
36060 clobberFlags: true,
36061 asm: s390x.ASUBW,
36062 reg: regInfo{
36063 inputs: []inputInfo{
36064 {0, 23551},
36065 {1, 23551},
36066 },
36067 outputs: []outputInfo{
36068 {0, 23551},
36069 },
36070 },
36071 },
36072 {
36073 name: "SUBconst",
36074 auxType: auxInt32,
36075 argLen: 1,
36076 resultInArg0: true,
36077 clobberFlags: true,
36078 asm: s390x.ASUB,
36079 reg: regInfo{
36080 inputs: []inputInfo{
36081 {0, 23551},
36082 },
36083 outputs: []outputInfo{
36084 {0, 23551},
36085 },
36086 },
36087 },
36088 {
36089 name: "SUBWconst",
36090 auxType: auxInt32,
36091 argLen: 1,
36092 resultInArg0: true,
36093 clobberFlags: true,
36094 asm: s390x.ASUBW,
36095 reg: regInfo{
36096 inputs: []inputInfo{
36097 {0, 23551},
36098 },
36099 outputs: []outputInfo{
36100 {0, 23551},
36101 },
36102 },
36103 },
36104 {
36105 name: "SUBload",
36106 auxType: auxSymOff,
36107 argLen: 3,
36108 resultInArg0: true,
36109 clobberFlags: true,
36110 faultOnNilArg1: true,
36111 symEffect: SymRead,
36112 asm: s390x.ASUB,
36113 reg: regInfo{
36114 inputs: []inputInfo{
36115 {0, 23551},
36116 {1, 56318},
36117 },
36118 outputs: []outputInfo{
36119 {0, 23551},
36120 },
36121 },
36122 },
36123 {
36124 name: "SUBWload",
36125 auxType: auxSymOff,
36126 argLen: 3,
36127 resultInArg0: true,
36128 clobberFlags: true,
36129 faultOnNilArg1: true,
36130 symEffect: SymRead,
36131 asm: s390x.ASUBW,
36132 reg: regInfo{
36133 inputs: []inputInfo{
36134 {0, 23551},
36135 {1, 56318},
36136 },
36137 outputs: []outputInfo{
36138 {0, 23551},
36139 },
36140 },
36141 },
36142 {
36143 name: "MULLD",
36144 argLen: 2,
36145 commutative: true,
36146 resultInArg0: true,
36147 clobberFlags: true,
36148 asm: s390x.AMULLD,
36149 reg: regInfo{
36150 inputs: []inputInfo{
36151 {0, 23551},
36152 {1, 23551},
36153 },
36154 outputs: []outputInfo{
36155 {0, 23551},
36156 },
36157 },
36158 },
36159 {
36160 name: "MULLW",
36161 argLen: 2,
36162 commutative: true,
36163 resultInArg0: true,
36164 clobberFlags: true,
36165 asm: s390x.AMULLW,
36166 reg: regInfo{
36167 inputs: []inputInfo{
36168 {0, 23551},
36169 {1, 23551},
36170 },
36171 outputs: []outputInfo{
36172 {0, 23551},
36173 },
36174 },
36175 },
36176 {
36177 name: "MULLDconst",
36178 auxType: auxInt32,
36179 argLen: 1,
36180 resultInArg0: true,
36181 clobberFlags: true,
36182 asm: s390x.AMULLD,
36183 reg: regInfo{
36184 inputs: []inputInfo{
36185 {0, 23551},
36186 },
36187 outputs: []outputInfo{
36188 {0, 23551},
36189 },
36190 },
36191 },
36192 {
36193 name: "MULLWconst",
36194 auxType: auxInt32,
36195 argLen: 1,
36196 resultInArg0: true,
36197 clobberFlags: true,
36198 asm: s390x.AMULLW,
36199 reg: regInfo{
36200 inputs: []inputInfo{
36201 {0, 23551},
36202 },
36203 outputs: []outputInfo{
36204 {0, 23551},
36205 },
36206 },
36207 },
36208 {
36209 name: "MULLDload",
36210 auxType: auxSymOff,
36211 argLen: 3,
36212 resultInArg0: true,
36213 clobberFlags: true,
36214 faultOnNilArg1: true,
36215 symEffect: SymRead,
36216 asm: s390x.AMULLD,
36217 reg: regInfo{
36218 inputs: []inputInfo{
36219 {0, 23551},
36220 {1, 56318},
36221 },
36222 outputs: []outputInfo{
36223 {0, 23551},
36224 },
36225 },
36226 },
36227 {
36228 name: "MULLWload",
36229 auxType: auxSymOff,
36230 argLen: 3,
36231 resultInArg0: true,
36232 clobberFlags: true,
36233 faultOnNilArg1: true,
36234 symEffect: SymRead,
36235 asm: s390x.AMULLW,
36236 reg: regInfo{
36237 inputs: []inputInfo{
36238 {0, 23551},
36239 {1, 56318},
36240 },
36241 outputs: []outputInfo{
36242 {0, 23551},
36243 },
36244 },
36245 },
36246 {
36247 name: "MULHD",
36248 argLen: 2,
36249 commutative: true,
36250 resultInArg0: true,
36251 clobberFlags: true,
36252 asm: s390x.AMULHD,
36253 reg: regInfo{
36254 inputs: []inputInfo{
36255 {0, 21503},
36256 {1, 21503},
36257 },
36258 clobbers: 2048,
36259 outputs: []outputInfo{
36260 {0, 21503},
36261 },
36262 },
36263 },
36264 {
36265 name: "MULHDU",
36266 argLen: 2,
36267 commutative: true,
36268 resultInArg0: true,
36269 clobberFlags: true,
36270 asm: s390x.AMULHDU,
36271 reg: regInfo{
36272 inputs: []inputInfo{
36273 {0, 21503},
36274 {1, 21503},
36275 },
36276 clobbers: 2048,
36277 outputs: []outputInfo{
36278 {0, 21503},
36279 },
36280 },
36281 },
36282 {
36283 name: "DIVD",
36284 argLen: 2,
36285 resultInArg0: true,
36286 clobberFlags: true,
36287 asm: s390x.ADIVD,
36288 reg: regInfo{
36289 inputs: []inputInfo{
36290 {0, 21503},
36291 {1, 21503},
36292 },
36293 clobbers: 2048,
36294 outputs: []outputInfo{
36295 {0, 21503},
36296 },
36297 },
36298 },
36299 {
36300 name: "DIVW",
36301 argLen: 2,
36302 resultInArg0: true,
36303 clobberFlags: true,
36304 asm: s390x.ADIVW,
36305 reg: regInfo{
36306 inputs: []inputInfo{
36307 {0, 21503},
36308 {1, 21503},
36309 },
36310 clobbers: 2048,
36311 outputs: []outputInfo{
36312 {0, 21503},
36313 },
36314 },
36315 },
36316 {
36317 name: "DIVDU",
36318 argLen: 2,
36319 resultInArg0: true,
36320 clobberFlags: true,
36321 asm: s390x.ADIVDU,
36322 reg: regInfo{
36323 inputs: []inputInfo{
36324 {0, 21503},
36325 {1, 21503},
36326 },
36327 clobbers: 2048,
36328 outputs: []outputInfo{
36329 {0, 21503},
36330 },
36331 },
36332 },
36333 {
36334 name: "DIVWU",
36335 argLen: 2,
36336 resultInArg0: true,
36337 clobberFlags: true,
36338 asm: s390x.ADIVWU,
36339 reg: regInfo{
36340 inputs: []inputInfo{
36341 {0, 21503},
36342 {1, 21503},
36343 },
36344 clobbers: 2048,
36345 outputs: []outputInfo{
36346 {0, 21503},
36347 },
36348 },
36349 },
36350 {
36351 name: "MODD",
36352 argLen: 2,
36353 resultInArg0: true,
36354 clobberFlags: true,
36355 asm: s390x.AMODD,
36356 reg: regInfo{
36357 inputs: []inputInfo{
36358 {0, 21503},
36359 {1, 21503},
36360 },
36361 clobbers: 2048,
36362 outputs: []outputInfo{
36363 {0, 21503},
36364 },
36365 },
36366 },
36367 {
36368 name: "MODW",
36369 argLen: 2,
36370 resultInArg0: true,
36371 clobberFlags: true,
36372 asm: s390x.AMODW,
36373 reg: regInfo{
36374 inputs: []inputInfo{
36375 {0, 21503},
36376 {1, 21503},
36377 },
36378 clobbers: 2048,
36379 outputs: []outputInfo{
36380 {0, 21503},
36381 },
36382 },
36383 },
36384 {
36385 name: "MODDU",
36386 argLen: 2,
36387 resultInArg0: true,
36388 clobberFlags: true,
36389 asm: s390x.AMODDU,
36390 reg: regInfo{
36391 inputs: []inputInfo{
36392 {0, 21503},
36393 {1, 21503},
36394 },
36395 clobbers: 2048,
36396 outputs: []outputInfo{
36397 {0, 21503},
36398 },
36399 },
36400 },
36401 {
36402 name: "MODWU",
36403 argLen: 2,
36404 resultInArg0: true,
36405 clobberFlags: true,
36406 asm: s390x.AMODWU,
36407 reg: regInfo{
36408 inputs: []inputInfo{
36409 {0, 21503},
36410 {1, 21503},
36411 },
36412 clobbers: 2048,
36413 outputs: []outputInfo{
36414 {0, 21503},
36415 },
36416 },
36417 },
36418 {
36419 name: "AND",
36420 argLen: 2,
36421 commutative: true,
36422 clobberFlags: true,
36423 asm: s390x.AAND,
36424 reg: regInfo{
36425 inputs: []inputInfo{
36426 {0, 23551},
36427 {1, 23551},
36428 },
36429 outputs: []outputInfo{
36430 {0, 23551},
36431 },
36432 },
36433 },
36434 {
36435 name: "ANDW",
36436 argLen: 2,
36437 commutative: true,
36438 clobberFlags: true,
36439 asm: s390x.AANDW,
36440 reg: regInfo{
36441 inputs: []inputInfo{
36442 {0, 23551},
36443 {1, 23551},
36444 },
36445 outputs: []outputInfo{
36446 {0, 23551},
36447 },
36448 },
36449 },
36450 {
36451 name: "ANDconst",
36452 auxType: auxInt64,
36453 argLen: 1,
36454 resultInArg0: true,
36455 clobberFlags: true,
36456 asm: s390x.AAND,
36457 reg: regInfo{
36458 inputs: []inputInfo{
36459 {0, 23551},
36460 },
36461 outputs: []outputInfo{
36462 {0, 23551},
36463 },
36464 },
36465 },
36466 {
36467 name: "ANDWconst",
36468 auxType: auxInt32,
36469 argLen: 1,
36470 resultInArg0: true,
36471 clobberFlags: true,
36472 asm: s390x.AANDW,
36473 reg: regInfo{
36474 inputs: []inputInfo{
36475 {0, 23551},
36476 },
36477 outputs: []outputInfo{
36478 {0, 23551},
36479 },
36480 },
36481 },
36482 {
36483 name: "ANDload",
36484 auxType: auxSymOff,
36485 argLen: 3,
36486 resultInArg0: true,
36487 clobberFlags: true,
36488 faultOnNilArg1: true,
36489 symEffect: SymRead,
36490 asm: s390x.AAND,
36491 reg: regInfo{
36492 inputs: []inputInfo{
36493 {0, 23551},
36494 {1, 56318},
36495 },
36496 outputs: []outputInfo{
36497 {0, 23551},
36498 },
36499 },
36500 },
36501 {
36502 name: "ANDWload",
36503 auxType: auxSymOff,
36504 argLen: 3,
36505 resultInArg0: true,
36506 clobberFlags: true,
36507 faultOnNilArg1: true,
36508 symEffect: SymRead,
36509 asm: s390x.AANDW,
36510 reg: regInfo{
36511 inputs: []inputInfo{
36512 {0, 23551},
36513 {1, 56318},
36514 },
36515 outputs: []outputInfo{
36516 {0, 23551},
36517 },
36518 },
36519 },
36520 {
36521 name: "OR",
36522 argLen: 2,
36523 commutative: true,
36524 clobberFlags: true,
36525 asm: s390x.AOR,
36526 reg: regInfo{
36527 inputs: []inputInfo{
36528 {0, 23551},
36529 {1, 23551},
36530 },
36531 outputs: []outputInfo{
36532 {0, 23551},
36533 },
36534 },
36535 },
36536 {
36537 name: "ORW",
36538 argLen: 2,
36539 commutative: true,
36540 clobberFlags: true,
36541 asm: s390x.AORW,
36542 reg: regInfo{
36543 inputs: []inputInfo{
36544 {0, 23551},
36545 {1, 23551},
36546 },
36547 outputs: []outputInfo{
36548 {0, 23551},
36549 },
36550 },
36551 },
36552 {
36553 name: "ORconst",
36554 auxType: auxInt64,
36555 argLen: 1,
36556 resultInArg0: true,
36557 clobberFlags: true,
36558 asm: s390x.AOR,
36559 reg: regInfo{
36560 inputs: []inputInfo{
36561 {0, 23551},
36562 },
36563 outputs: []outputInfo{
36564 {0, 23551},
36565 },
36566 },
36567 },
36568 {
36569 name: "ORWconst",
36570 auxType: auxInt32,
36571 argLen: 1,
36572 resultInArg0: true,
36573 clobberFlags: true,
36574 asm: s390x.AORW,
36575 reg: regInfo{
36576 inputs: []inputInfo{
36577 {0, 23551},
36578 },
36579 outputs: []outputInfo{
36580 {0, 23551},
36581 },
36582 },
36583 },
36584 {
36585 name: "ORload",
36586 auxType: auxSymOff,
36587 argLen: 3,
36588 resultInArg0: true,
36589 clobberFlags: true,
36590 faultOnNilArg1: true,
36591 symEffect: SymRead,
36592 asm: s390x.AOR,
36593 reg: regInfo{
36594 inputs: []inputInfo{
36595 {0, 23551},
36596 {1, 56318},
36597 },
36598 outputs: []outputInfo{
36599 {0, 23551},
36600 },
36601 },
36602 },
36603 {
36604 name: "ORWload",
36605 auxType: auxSymOff,
36606 argLen: 3,
36607 resultInArg0: true,
36608 clobberFlags: true,
36609 faultOnNilArg1: true,
36610 symEffect: SymRead,
36611 asm: s390x.AORW,
36612 reg: regInfo{
36613 inputs: []inputInfo{
36614 {0, 23551},
36615 {1, 56318},
36616 },
36617 outputs: []outputInfo{
36618 {0, 23551},
36619 },
36620 },
36621 },
36622 {
36623 name: "XOR",
36624 argLen: 2,
36625 commutative: true,
36626 clobberFlags: true,
36627 asm: s390x.AXOR,
36628 reg: regInfo{
36629 inputs: []inputInfo{
36630 {0, 23551},
36631 {1, 23551},
36632 },
36633 outputs: []outputInfo{
36634 {0, 23551},
36635 },
36636 },
36637 },
36638 {
36639 name: "XORW",
36640 argLen: 2,
36641 commutative: true,
36642 clobberFlags: true,
36643 asm: s390x.AXORW,
36644 reg: regInfo{
36645 inputs: []inputInfo{
36646 {0, 23551},
36647 {1, 23551},
36648 },
36649 outputs: []outputInfo{
36650 {0, 23551},
36651 },
36652 },
36653 },
36654 {
36655 name: "XORconst",
36656 auxType: auxInt64,
36657 argLen: 1,
36658 resultInArg0: true,
36659 clobberFlags: true,
36660 asm: s390x.AXOR,
36661 reg: regInfo{
36662 inputs: []inputInfo{
36663 {0, 23551},
36664 },
36665 outputs: []outputInfo{
36666 {0, 23551},
36667 },
36668 },
36669 },
36670 {
36671 name: "XORWconst",
36672 auxType: auxInt32,
36673 argLen: 1,
36674 resultInArg0: true,
36675 clobberFlags: true,
36676 asm: s390x.AXORW,
36677 reg: regInfo{
36678 inputs: []inputInfo{
36679 {0, 23551},
36680 },
36681 outputs: []outputInfo{
36682 {0, 23551},
36683 },
36684 },
36685 },
36686 {
36687 name: "XORload",
36688 auxType: auxSymOff,
36689 argLen: 3,
36690 resultInArg0: true,
36691 clobberFlags: true,
36692 faultOnNilArg1: true,
36693 symEffect: SymRead,
36694 asm: s390x.AXOR,
36695 reg: regInfo{
36696 inputs: []inputInfo{
36697 {0, 23551},
36698 {1, 56318},
36699 },
36700 outputs: []outputInfo{
36701 {0, 23551},
36702 },
36703 },
36704 },
36705 {
36706 name: "XORWload",
36707 auxType: auxSymOff,
36708 argLen: 3,
36709 resultInArg0: true,
36710 clobberFlags: true,
36711 faultOnNilArg1: true,
36712 symEffect: SymRead,
36713 asm: s390x.AXORW,
36714 reg: regInfo{
36715 inputs: []inputInfo{
36716 {0, 23551},
36717 {1, 56318},
36718 },
36719 outputs: []outputInfo{
36720 {0, 23551},
36721 },
36722 },
36723 },
36724 {
36725 name: "ADDC",
36726 argLen: 2,
36727 commutative: true,
36728 asm: s390x.AADDC,
36729 reg: regInfo{
36730 inputs: []inputInfo{
36731 {0, 23551},
36732 {1, 23551},
36733 },
36734 outputs: []outputInfo{
36735 {0, 23551},
36736 },
36737 },
36738 },
36739 {
36740 name: "ADDCconst",
36741 auxType: auxInt16,
36742 argLen: 1,
36743 asm: s390x.AADDC,
36744 reg: regInfo{
36745 inputs: []inputInfo{
36746 {0, 23551},
36747 },
36748 outputs: []outputInfo{
36749 {0, 23551},
36750 },
36751 },
36752 },
36753 {
36754 name: "ADDE",
36755 argLen: 3,
36756 commutative: true,
36757 resultInArg0: true,
36758 asm: s390x.AADDE,
36759 reg: regInfo{
36760 inputs: []inputInfo{
36761 {0, 23551},
36762 {1, 23551},
36763 },
36764 outputs: []outputInfo{
36765 {0, 23551},
36766 },
36767 },
36768 },
36769 {
36770 name: "SUBC",
36771 argLen: 2,
36772 asm: s390x.ASUBC,
36773 reg: regInfo{
36774 inputs: []inputInfo{
36775 {0, 23551},
36776 {1, 23551},
36777 },
36778 outputs: []outputInfo{
36779 {0, 23551},
36780 },
36781 },
36782 },
36783 {
36784 name: "SUBE",
36785 argLen: 3,
36786 resultInArg0: true,
36787 asm: s390x.ASUBE,
36788 reg: regInfo{
36789 inputs: []inputInfo{
36790 {0, 23551},
36791 {1, 23551},
36792 },
36793 outputs: []outputInfo{
36794 {0, 23551},
36795 },
36796 },
36797 },
36798 {
36799 name: "CMP",
36800 argLen: 2,
36801 asm: s390x.ACMP,
36802 reg: regInfo{
36803 inputs: []inputInfo{
36804 {0, 56319},
36805 {1, 56319},
36806 },
36807 },
36808 },
36809 {
36810 name: "CMPW",
36811 argLen: 2,
36812 asm: s390x.ACMPW,
36813 reg: regInfo{
36814 inputs: []inputInfo{
36815 {0, 56319},
36816 {1, 56319},
36817 },
36818 },
36819 },
36820 {
36821 name: "CMPU",
36822 argLen: 2,
36823 asm: s390x.ACMPU,
36824 reg: regInfo{
36825 inputs: []inputInfo{
36826 {0, 56319},
36827 {1, 56319},
36828 },
36829 },
36830 },
36831 {
36832 name: "CMPWU",
36833 argLen: 2,
36834 asm: s390x.ACMPWU,
36835 reg: regInfo{
36836 inputs: []inputInfo{
36837 {0, 56319},
36838 {1, 56319},
36839 },
36840 },
36841 },
36842 {
36843 name: "CMPconst",
36844 auxType: auxInt32,
36845 argLen: 1,
36846 asm: s390x.ACMP,
36847 reg: regInfo{
36848 inputs: []inputInfo{
36849 {0, 56319},
36850 },
36851 },
36852 },
36853 {
36854 name: "CMPWconst",
36855 auxType: auxInt32,
36856 argLen: 1,
36857 asm: s390x.ACMPW,
36858 reg: regInfo{
36859 inputs: []inputInfo{
36860 {0, 56319},
36861 },
36862 },
36863 },
36864 {
36865 name: "CMPUconst",
36866 auxType: auxInt32,
36867 argLen: 1,
36868 asm: s390x.ACMPU,
36869 reg: regInfo{
36870 inputs: []inputInfo{
36871 {0, 56319},
36872 },
36873 },
36874 },
36875 {
36876 name: "CMPWUconst",
36877 auxType: auxInt32,
36878 argLen: 1,
36879 asm: s390x.ACMPWU,
36880 reg: regInfo{
36881 inputs: []inputInfo{
36882 {0, 56319},
36883 },
36884 },
36885 },
36886 {
36887 name: "FCMPS",
36888 argLen: 2,
36889 asm: s390x.ACEBR,
36890 reg: regInfo{
36891 inputs: []inputInfo{
36892 {0, 4294901760},
36893 {1, 4294901760},
36894 },
36895 },
36896 },
36897 {
36898 name: "FCMP",
36899 argLen: 2,
36900 asm: s390x.AFCMPU,
36901 reg: regInfo{
36902 inputs: []inputInfo{
36903 {0, 4294901760},
36904 {1, 4294901760},
36905 },
36906 },
36907 },
36908 {
36909 name: "LTDBR",
36910 argLen: 1,
36911 asm: s390x.ALTDBR,
36912 reg: regInfo{
36913 inputs: []inputInfo{
36914 {0, 4294901760},
36915 },
36916 },
36917 },
36918 {
36919 name: "LTEBR",
36920 argLen: 1,
36921 asm: s390x.ALTEBR,
36922 reg: regInfo{
36923 inputs: []inputInfo{
36924 {0, 4294901760},
36925 },
36926 },
36927 },
36928 {
36929 name: "SLD",
36930 argLen: 2,
36931 asm: s390x.ASLD,
36932 reg: regInfo{
36933 inputs: []inputInfo{
36934 {1, 23550},
36935 {0, 23551},
36936 },
36937 outputs: []outputInfo{
36938 {0, 23551},
36939 },
36940 },
36941 },
36942 {
36943 name: "SLW",
36944 argLen: 2,
36945 asm: s390x.ASLW,
36946 reg: regInfo{
36947 inputs: []inputInfo{
36948 {1, 23550},
36949 {0, 23551},
36950 },
36951 outputs: []outputInfo{
36952 {0, 23551},
36953 },
36954 },
36955 },
36956 {
36957 name: "SLDconst",
36958 auxType: auxUInt8,
36959 argLen: 1,
36960 asm: s390x.ASLD,
36961 reg: regInfo{
36962 inputs: []inputInfo{
36963 {0, 23551},
36964 },
36965 outputs: []outputInfo{
36966 {0, 23551},
36967 },
36968 },
36969 },
36970 {
36971 name: "SLWconst",
36972 auxType: auxUInt8,
36973 argLen: 1,
36974 asm: s390x.ASLW,
36975 reg: regInfo{
36976 inputs: []inputInfo{
36977 {0, 23551},
36978 },
36979 outputs: []outputInfo{
36980 {0, 23551},
36981 },
36982 },
36983 },
36984 {
36985 name: "SRD",
36986 argLen: 2,
36987 asm: s390x.ASRD,
36988 reg: regInfo{
36989 inputs: []inputInfo{
36990 {1, 23550},
36991 {0, 23551},
36992 },
36993 outputs: []outputInfo{
36994 {0, 23551},
36995 },
36996 },
36997 },
36998 {
36999 name: "SRW",
37000 argLen: 2,
37001 asm: s390x.ASRW,
37002 reg: regInfo{
37003 inputs: []inputInfo{
37004 {1, 23550},
37005 {0, 23551},
37006 },
37007 outputs: []outputInfo{
37008 {0, 23551},
37009 },
37010 },
37011 },
37012 {
37013 name: "SRDconst",
37014 auxType: auxUInt8,
37015 argLen: 1,
37016 asm: s390x.ASRD,
37017 reg: regInfo{
37018 inputs: []inputInfo{
37019 {0, 23551},
37020 },
37021 outputs: []outputInfo{
37022 {0, 23551},
37023 },
37024 },
37025 },
37026 {
37027 name: "SRWconst",
37028 auxType: auxUInt8,
37029 argLen: 1,
37030 asm: s390x.ASRW,
37031 reg: regInfo{
37032 inputs: []inputInfo{
37033 {0, 23551},
37034 },
37035 outputs: []outputInfo{
37036 {0, 23551},
37037 },
37038 },
37039 },
37040 {
37041 name: "SRAD",
37042 argLen: 2,
37043 clobberFlags: true,
37044 asm: s390x.ASRAD,
37045 reg: regInfo{
37046 inputs: []inputInfo{
37047 {1, 23550},
37048 {0, 23551},
37049 },
37050 outputs: []outputInfo{
37051 {0, 23551},
37052 },
37053 },
37054 },
37055 {
37056 name: "SRAW",
37057 argLen: 2,
37058 clobberFlags: true,
37059 asm: s390x.ASRAW,
37060 reg: regInfo{
37061 inputs: []inputInfo{
37062 {1, 23550},
37063 {0, 23551},
37064 },
37065 outputs: []outputInfo{
37066 {0, 23551},
37067 },
37068 },
37069 },
37070 {
37071 name: "SRADconst",
37072 auxType: auxUInt8,
37073 argLen: 1,
37074 clobberFlags: true,
37075 asm: s390x.ASRAD,
37076 reg: regInfo{
37077 inputs: []inputInfo{
37078 {0, 23551},
37079 },
37080 outputs: []outputInfo{
37081 {0, 23551},
37082 },
37083 },
37084 },
37085 {
37086 name: "SRAWconst",
37087 auxType: auxUInt8,
37088 argLen: 1,
37089 clobberFlags: true,
37090 asm: s390x.ASRAW,
37091 reg: regInfo{
37092 inputs: []inputInfo{
37093 {0, 23551},
37094 },
37095 outputs: []outputInfo{
37096 {0, 23551},
37097 },
37098 },
37099 },
37100 {
37101 name: "RLLG",
37102 argLen: 2,
37103 asm: s390x.ARLLG,
37104 reg: regInfo{
37105 inputs: []inputInfo{
37106 {1, 23550},
37107 {0, 23551},
37108 },
37109 outputs: []outputInfo{
37110 {0, 23551},
37111 },
37112 },
37113 },
37114 {
37115 name: "RLL",
37116 argLen: 2,
37117 asm: s390x.ARLL,
37118 reg: regInfo{
37119 inputs: []inputInfo{
37120 {1, 23550},
37121 {0, 23551},
37122 },
37123 outputs: []outputInfo{
37124 {0, 23551},
37125 },
37126 },
37127 },
37128 {
37129 name: "RLLconst",
37130 auxType: auxUInt8,
37131 argLen: 1,
37132 asm: s390x.ARLL,
37133 reg: regInfo{
37134 inputs: []inputInfo{
37135 {0, 23551},
37136 },
37137 outputs: []outputInfo{
37138 {0, 23551},
37139 },
37140 },
37141 },
37142 {
37143 name: "RXSBG",
37144 auxType: auxS390XRotateParams,
37145 argLen: 2,
37146 resultInArg0: true,
37147 clobberFlags: true,
37148 asm: s390x.ARXSBG,
37149 reg: regInfo{
37150 inputs: []inputInfo{
37151 {0, 23551},
37152 {1, 23551},
37153 },
37154 outputs: []outputInfo{
37155 {0, 23551},
37156 },
37157 },
37158 },
37159 {
37160 name: "RISBGZ",
37161 auxType: auxS390XRotateParams,
37162 argLen: 1,
37163 clobberFlags: true,
37164 asm: s390x.ARISBGZ,
37165 reg: regInfo{
37166 inputs: []inputInfo{
37167 {0, 23551},
37168 },
37169 outputs: []outputInfo{
37170 {0, 23551},
37171 },
37172 },
37173 },
37174 {
37175 name: "NEG",
37176 argLen: 1,
37177 clobberFlags: true,
37178 asm: s390x.ANEG,
37179 reg: regInfo{
37180 inputs: []inputInfo{
37181 {0, 23551},
37182 },
37183 outputs: []outputInfo{
37184 {0, 23551},
37185 },
37186 },
37187 },
37188 {
37189 name: "NEGW",
37190 argLen: 1,
37191 clobberFlags: true,
37192 asm: s390x.ANEGW,
37193 reg: regInfo{
37194 inputs: []inputInfo{
37195 {0, 23551},
37196 },
37197 outputs: []outputInfo{
37198 {0, 23551},
37199 },
37200 },
37201 },
37202 {
37203 name: "NOT",
37204 argLen: 1,
37205 resultInArg0: true,
37206 clobberFlags: true,
37207 reg: regInfo{
37208 inputs: []inputInfo{
37209 {0, 23551},
37210 },
37211 outputs: []outputInfo{
37212 {0, 23551},
37213 },
37214 },
37215 },
37216 {
37217 name: "NOTW",
37218 argLen: 1,
37219 resultInArg0: true,
37220 clobberFlags: true,
37221 reg: regInfo{
37222 inputs: []inputInfo{
37223 {0, 23551},
37224 },
37225 outputs: []outputInfo{
37226 {0, 23551},
37227 },
37228 },
37229 },
37230 {
37231 name: "FSQRT",
37232 argLen: 1,
37233 asm: s390x.AFSQRT,
37234 reg: regInfo{
37235 inputs: []inputInfo{
37236 {0, 4294901760},
37237 },
37238 outputs: []outputInfo{
37239 {0, 4294901760},
37240 },
37241 },
37242 },
37243 {
37244 name: "FSQRTS",
37245 argLen: 1,
37246 asm: s390x.AFSQRTS,
37247 reg: regInfo{
37248 inputs: []inputInfo{
37249 {0, 4294901760},
37250 },
37251 outputs: []outputInfo{
37252 {0, 4294901760},
37253 },
37254 },
37255 },
37256 {
37257 name: "LOCGR",
37258 auxType: auxS390XCCMask,
37259 argLen: 3,
37260 resultInArg0: true,
37261 asm: s390x.ALOCGR,
37262 reg: regInfo{
37263 inputs: []inputInfo{
37264 {0, 23551},
37265 {1, 23551},
37266 },
37267 outputs: []outputInfo{
37268 {0, 23551},
37269 },
37270 },
37271 },
37272 {
37273 name: "MOVBreg",
37274 argLen: 1,
37275 asm: s390x.AMOVB,
37276 reg: regInfo{
37277 inputs: []inputInfo{
37278 {0, 56319},
37279 },
37280 outputs: []outputInfo{
37281 {0, 23551},
37282 },
37283 },
37284 },
37285 {
37286 name: "MOVBZreg",
37287 argLen: 1,
37288 asm: s390x.AMOVBZ,
37289 reg: regInfo{
37290 inputs: []inputInfo{
37291 {0, 56319},
37292 },
37293 outputs: []outputInfo{
37294 {0, 23551},
37295 },
37296 },
37297 },
37298 {
37299 name: "MOVHreg",
37300 argLen: 1,
37301 asm: s390x.AMOVH,
37302 reg: regInfo{
37303 inputs: []inputInfo{
37304 {0, 56319},
37305 },
37306 outputs: []outputInfo{
37307 {0, 23551},
37308 },
37309 },
37310 },
37311 {
37312 name: "MOVHZreg",
37313 argLen: 1,
37314 asm: s390x.AMOVHZ,
37315 reg: regInfo{
37316 inputs: []inputInfo{
37317 {0, 56319},
37318 },
37319 outputs: []outputInfo{
37320 {0, 23551},
37321 },
37322 },
37323 },
37324 {
37325 name: "MOVWreg",
37326 argLen: 1,
37327 asm: s390x.AMOVW,
37328 reg: regInfo{
37329 inputs: []inputInfo{
37330 {0, 56319},
37331 },
37332 outputs: []outputInfo{
37333 {0, 23551},
37334 },
37335 },
37336 },
37337 {
37338 name: "MOVWZreg",
37339 argLen: 1,
37340 asm: s390x.AMOVWZ,
37341 reg: regInfo{
37342 inputs: []inputInfo{
37343 {0, 56319},
37344 },
37345 outputs: []outputInfo{
37346 {0, 23551},
37347 },
37348 },
37349 },
37350 {
37351 name: "MOVDconst",
37352 auxType: auxInt64,
37353 argLen: 0,
37354 rematerializeable: true,
37355 asm: s390x.AMOVD,
37356 reg: regInfo{
37357 outputs: []outputInfo{
37358 {0, 23551},
37359 },
37360 },
37361 },
37362 {
37363 name: "LDGR",
37364 argLen: 1,
37365 asm: s390x.ALDGR,
37366 reg: regInfo{
37367 inputs: []inputInfo{
37368 {0, 23551},
37369 },
37370 outputs: []outputInfo{
37371 {0, 4294901760},
37372 },
37373 },
37374 },
37375 {
37376 name: "LGDR",
37377 argLen: 1,
37378 asm: s390x.ALGDR,
37379 reg: regInfo{
37380 inputs: []inputInfo{
37381 {0, 4294901760},
37382 },
37383 outputs: []outputInfo{
37384 {0, 23551},
37385 },
37386 },
37387 },
37388 {
37389 name: "CFDBRA",
37390 argLen: 1,
37391 clobberFlags: true,
37392 asm: s390x.ACFDBRA,
37393 reg: regInfo{
37394 inputs: []inputInfo{
37395 {0, 4294901760},
37396 },
37397 outputs: []outputInfo{
37398 {0, 23551},
37399 },
37400 },
37401 },
37402 {
37403 name: "CGDBRA",
37404 argLen: 1,
37405 clobberFlags: true,
37406 asm: s390x.ACGDBRA,
37407 reg: regInfo{
37408 inputs: []inputInfo{
37409 {0, 4294901760},
37410 },
37411 outputs: []outputInfo{
37412 {0, 23551},
37413 },
37414 },
37415 },
37416 {
37417 name: "CFEBRA",
37418 argLen: 1,
37419 clobberFlags: true,
37420 asm: s390x.ACFEBRA,
37421 reg: regInfo{
37422 inputs: []inputInfo{
37423 {0, 4294901760},
37424 },
37425 outputs: []outputInfo{
37426 {0, 23551},
37427 },
37428 },
37429 },
37430 {
37431 name: "CGEBRA",
37432 argLen: 1,
37433 clobberFlags: true,
37434 asm: s390x.ACGEBRA,
37435 reg: regInfo{
37436 inputs: []inputInfo{
37437 {0, 4294901760},
37438 },
37439 outputs: []outputInfo{
37440 {0, 23551},
37441 },
37442 },
37443 },
37444 {
37445 name: "CEFBRA",
37446 argLen: 1,
37447 clobberFlags: true,
37448 asm: s390x.ACEFBRA,
37449 reg: regInfo{
37450 inputs: []inputInfo{
37451 {0, 23551},
37452 },
37453 outputs: []outputInfo{
37454 {0, 4294901760},
37455 },
37456 },
37457 },
37458 {
37459 name: "CDFBRA",
37460 argLen: 1,
37461 clobberFlags: true,
37462 asm: s390x.ACDFBRA,
37463 reg: regInfo{
37464 inputs: []inputInfo{
37465 {0, 23551},
37466 },
37467 outputs: []outputInfo{
37468 {0, 4294901760},
37469 },
37470 },
37471 },
37472 {
37473 name: "CEGBRA",
37474 argLen: 1,
37475 clobberFlags: true,
37476 asm: s390x.ACEGBRA,
37477 reg: regInfo{
37478 inputs: []inputInfo{
37479 {0, 23551},
37480 },
37481 outputs: []outputInfo{
37482 {0, 4294901760},
37483 },
37484 },
37485 },
37486 {
37487 name: "CDGBRA",
37488 argLen: 1,
37489 clobberFlags: true,
37490 asm: s390x.ACDGBRA,
37491 reg: regInfo{
37492 inputs: []inputInfo{
37493 {0, 23551},
37494 },
37495 outputs: []outputInfo{
37496 {0, 4294901760},
37497 },
37498 },
37499 },
37500 {
37501 name: "CLFEBR",
37502 argLen: 1,
37503 clobberFlags: true,
37504 asm: s390x.ACLFEBR,
37505 reg: regInfo{
37506 inputs: []inputInfo{
37507 {0, 4294901760},
37508 },
37509 outputs: []outputInfo{
37510 {0, 23551},
37511 },
37512 },
37513 },
37514 {
37515 name: "CLFDBR",
37516 argLen: 1,
37517 clobberFlags: true,
37518 asm: s390x.ACLFDBR,
37519 reg: regInfo{
37520 inputs: []inputInfo{
37521 {0, 4294901760},
37522 },
37523 outputs: []outputInfo{
37524 {0, 23551},
37525 },
37526 },
37527 },
37528 {
37529 name: "CLGEBR",
37530 argLen: 1,
37531 clobberFlags: true,
37532 asm: s390x.ACLGEBR,
37533 reg: regInfo{
37534 inputs: []inputInfo{
37535 {0, 4294901760},
37536 },
37537 outputs: []outputInfo{
37538 {0, 23551},
37539 },
37540 },
37541 },
37542 {
37543 name: "CLGDBR",
37544 argLen: 1,
37545 clobberFlags: true,
37546 asm: s390x.ACLGDBR,
37547 reg: regInfo{
37548 inputs: []inputInfo{
37549 {0, 4294901760},
37550 },
37551 outputs: []outputInfo{
37552 {0, 23551},
37553 },
37554 },
37555 },
37556 {
37557 name: "CELFBR",
37558 argLen: 1,
37559 clobberFlags: true,
37560 asm: s390x.ACELFBR,
37561 reg: regInfo{
37562 inputs: []inputInfo{
37563 {0, 23551},
37564 },
37565 outputs: []outputInfo{
37566 {0, 4294901760},
37567 },
37568 },
37569 },
37570 {
37571 name: "CDLFBR",
37572 argLen: 1,
37573 clobberFlags: true,
37574 asm: s390x.ACDLFBR,
37575 reg: regInfo{
37576 inputs: []inputInfo{
37577 {0, 23551},
37578 },
37579 outputs: []outputInfo{
37580 {0, 4294901760},
37581 },
37582 },
37583 },
37584 {
37585 name: "CELGBR",
37586 argLen: 1,
37587 clobberFlags: true,
37588 asm: s390x.ACELGBR,
37589 reg: regInfo{
37590 inputs: []inputInfo{
37591 {0, 23551},
37592 },
37593 outputs: []outputInfo{
37594 {0, 4294901760},
37595 },
37596 },
37597 },
37598 {
37599 name: "CDLGBR",
37600 argLen: 1,
37601 clobberFlags: true,
37602 asm: s390x.ACDLGBR,
37603 reg: regInfo{
37604 inputs: []inputInfo{
37605 {0, 23551},
37606 },
37607 outputs: []outputInfo{
37608 {0, 4294901760},
37609 },
37610 },
37611 },
37612 {
37613 name: "LEDBR",
37614 argLen: 1,
37615 asm: s390x.ALEDBR,
37616 reg: regInfo{
37617 inputs: []inputInfo{
37618 {0, 4294901760},
37619 },
37620 outputs: []outputInfo{
37621 {0, 4294901760},
37622 },
37623 },
37624 },
37625 {
37626 name: "LDEBR",
37627 argLen: 1,
37628 asm: s390x.ALDEBR,
37629 reg: regInfo{
37630 inputs: []inputInfo{
37631 {0, 4294901760},
37632 },
37633 outputs: []outputInfo{
37634 {0, 4294901760},
37635 },
37636 },
37637 },
37638 {
37639 name: "MOVDaddr",
37640 auxType: auxSymOff,
37641 argLen: 1,
37642 rematerializeable: true,
37643 symEffect: SymAddr,
37644 reg: regInfo{
37645 inputs: []inputInfo{
37646 {0, 4295000064},
37647 },
37648 outputs: []outputInfo{
37649 {0, 23551},
37650 },
37651 },
37652 },
37653 {
37654 name: "MOVDaddridx",
37655 auxType: auxSymOff,
37656 argLen: 2,
37657 symEffect: SymAddr,
37658 reg: regInfo{
37659 inputs: []inputInfo{
37660 {0, 4295000064},
37661 {1, 56318},
37662 },
37663 outputs: []outputInfo{
37664 {0, 23551},
37665 },
37666 },
37667 },
37668 {
37669 name: "MOVBZload",
37670 auxType: auxSymOff,
37671 argLen: 2,
37672 faultOnNilArg0: true,
37673 symEffect: SymRead,
37674 asm: s390x.AMOVBZ,
37675 reg: regInfo{
37676 inputs: []inputInfo{
37677 {0, 4295023614},
37678 },
37679 outputs: []outputInfo{
37680 {0, 23551},
37681 },
37682 },
37683 },
37684 {
37685 name: "MOVBload",
37686 auxType: auxSymOff,
37687 argLen: 2,
37688 faultOnNilArg0: true,
37689 symEffect: SymRead,
37690 asm: s390x.AMOVB,
37691 reg: regInfo{
37692 inputs: []inputInfo{
37693 {0, 4295023614},
37694 },
37695 outputs: []outputInfo{
37696 {0, 23551},
37697 },
37698 },
37699 },
37700 {
37701 name: "MOVHZload",
37702 auxType: auxSymOff,
37703 argLen: 2,
37704 faultOnNilArg0: true,
37705 symEffect: SymRead,
37706 asm: s390x.AMOVHZ,
37707 reg: regInfo{
37708 inputs: []inputInfo{
37709 {0, 4295023614},
37710 },
37711 outputs: []outputInfo{
37712 {0, 23551},
37713 },
37714 },
37715 },
37716 {
37717 name: "MOVHload",
37718 auxType: auxSymOff,
37719 argLen: 2,
37720 faultOnNilArg0: true,
37721 symEffect: SymRead,
37722 asm: s390x.AMOVH,
37723 reg: regInfo{
37724 inputs: []inputInfo{
37725 {0, 4295023614},
37726 },
37727 outputs: []outputInfo{
37728 {0, 23551},
37729 },
37730 },
37731 },
37732 {
37733 name: "MOVWZload",
37734 auxType: auxSymOff,
37735 argLen: 2,
37736 faultOnNilArg0: true,
37737 symEffect: SymRead,
37738 asm: s390x.AMOVWZ,
37739 reg: regInfo{
37740 inputs: []inputInfo{
37741 {0, 4295023614},
37742 },
37743 outputs: []outputInfo{
37744 {0, 23551},
37745 },
37746 },
37747 },
37748 {
37749 name: "MOVWload",
37750 auxType: auxSymOff,
37751 argLen: 2,
37752 faultOnNilArg0: true,
37753 symEffect: SymRead,
37754 asm: s390x.AMOVW,
37755 reg: regInfo{
37756 inputs: []inputInfo{
37757 {0, 4295023614},
37758 },
37759 outputs: []outputInfo{
37760 {0, 23551},
37761 },
37762 },
37763 },
37764 {
37765 name: "MOVDload",
37766 auxType: auxSymOff,
37767 argLen: 2,
37768 faultOnNilArg0: true,
37769 symEffect: SymRead,
37770 asm: s390x.AMOVD,
37771 reg: regInfo{
37772 inputs: []inputInfo{
37773 {0, 4295023614},
37774 },
37775 outputs: []outputInfo{
37776 {0, 23551},
37777 },
37778 },
37779 },
37780 {
37781 name: "MOVWBR",
37782 argLen: 1,
37783 asm: s390x.AMOVWBR,
37784 reg: regInfo{
37785 inputs: []inputInfo{
37786 {0, 23551},
37787 },
37788 outputs: []outputInfo{
37789 {0, 23551},
37790 },
37791 },
37792 },
37793 {
37794 name: "MOVDBR",
37795 argLen: 1,
37796 asm: s390x.AMOVDBR,
37797 reg: regInfo{
37798 inputs: []inputInfo{
37799 {0, 23551},
37800 },
37801 outputs: []outputInfo{
37802 {0, 23551},
37803 },
37804 },
37805 },
37806 {
37807 name: "MOVHBRload",
37808 auxType: auxSymOff,
37809 argLen: 2,
37810 faultOnNilArg0: true,
37811 symEffect: SymRead,
37812 asm: s390x.AMOVHBR,
37813 reg: regInfo{
37814 inputs: []inputInfo{
37815 {0, 4295023614},
37816 },
37817 outputs: []outputInfo{
37818 {0, 23551},
37819 },
37820 },
37821 },
37822 {
37823 name: "MOVWBRload",
37824 auxType: auxSymOff,
37825 argLen: 2,
37826 faultOnNilArg0: true,
37827 symEffect: SymRead,
37828 asm: s390x.AMOVWBR,
37829 reg: regInfo{
37830 inputs: []inputInfo{
37831 {0, 4295023614},
37832 },
37833 outputs: []outputInfo{
37834 {0, 23551},
37835 },
37836 },
37837 },
37838 {
37839 name: "MOVDBRload",
37840 auxType: auxSymOff,
37841 argLen: 2,
37842 faultOnNilArg0: true,
37843 symEffect: SymRead,
37844 asm: s390x.AMOVDBR,
37845 reg: regInfo{
37846 inputs: []inputInfo{
37847 {0, 4295023614},
37848 },
37849 outputs: []outputInfo{
37850 {0, 23551},
37851 },
37852 },
37853 },
37854 {
37855 name: "MOVBstore",
37856 auxType: auxSymOff,
37857 argLen: 3,
37858 faultOnNilArg0: true,
37859 symEffect: SymWrite,
37860 asm: s390x.AMOVB,
37861 reg: regInfo{
37862 inputs: []inputInfo{
37863 {0, 4295023614},
37864 {1, 56319},
37865 },
37866 },
37867 },
37868 {
37869 name: "MOVHstore",
37870 auxType: auxSymOff,
37871 argLen: 3,
37872 faultOnNilArg0: true,
37873 symEffect: SymWrite,
37874 asm: s390x.AMOVH,
37875 reg: regInfo{
37876 inputs: []inputInfo{
37877 {0, 4295023614},
37878 {1, 56319},
37879 },
37880 },
37881 },
37882 {
37883 name: "MOVWstore",
37884 auxType: auxSymOff,
37885 argLen: 3,
37886 faultOnNilArg0: true,
37887 symEffect: SymWrite,
37888 asm: s390x.AMOVW,
37889 reg: regInfo{
37890 inputs: []inputInfo{
37891 {0, 4295023614},
37892 {1, 56319},
37893 },
37894 },
37895 },
37896 {
37897 name: "MOVDstore",
37898 auxType: auxSymOff,
37899 argLen: 3,
37900 faultOnNilArg0: true,
37901 symEffect: SymWrite,
37902 asm: s390x.AMOVD,
37903 reg: regInfo{
37904 inputs: []inputInfo{
37905 {0, 4295023614},
37906 {1, 56319},
37907 },
37908 },
37909 },
37910 {
37911 name: "MOVHBRstore",
37912 auxType: auxSymOff,
37913 argLen: 3,
37914 faultOnNilArg0: true,
37915 symEffect: SymWrite,
37916 asm: s390x.AMOVHBR,
37917 reg: regInfo{
37918 inputs: []inputInfo{
37919 {0, 56318},
37920 {1, 56319},
37921 },
37922 },
37923 },
37924 {
37925 name: "MOVWBRstore",
37926 auxType: auxSymOff,
37927 argLen: 3,
37928 faultOnNilArg0: true,
37929 symEffect: SymWrite,
37930 asm: s390x.AMOVWBR,
37931 reg: regInfo{
37932 inputs: []inputInfo{
37933 {0, 56318},
37934 {1, 56319},
37935 },
37936 },
37937 },
37938 {
37939 name: "MOVDBRstore",
37940 auxType: auxSymOff,
37941 argLen: 3,
37942 faultOnNilArg0: true,
37943 symEffect: SymWrite,
37944 asm: s390x.AMOVDBR,
37945 reg: regInfo{
37946 inputs: []inputInfo{
37947 {0, 56318},
37948 {1, 56319},
37949 },
37950 },
37951 },
37952 {
37953 name: "MVC",
37954 auxType: auxSymValAndOff,
37955 argLen: 3,
37956 clobberFlags: true,
37957 faultOnNilArg0: true,
37958 faultOnNilArg1: true,
37959 symEffect: SymNone,
37960 asm: s390x.AMVC,
37961 reg: regInfo{
37962 inputs: []inputInfo{
37963 {0, 56318},
37964 {1, 56318},
37965 },
37966 },
37967 },
37968 {
37969 name: "MOVBZloadidx",
37970 auxType: auxSymOff,
37971 argLen: 3,
37972 commutative: true,
37973 symEffect: SymRead,
37974 asm: s390x.AMOVBZ,
37975 reg: regInfo{
37976 inputs: []inputInfo{
37977 {1, 56318},
37978 {0, 4295023614},
37979 },
37980 outputs: []outputInfo{
37981 {0, 23551},
37982 },
37983 },
37984 },
37985 {
37986 name: "MOVBloadidx",
37987 auxType: auxSymOff,
37988 argLen: 3,
37989 commutative: true,
37990 symEffect: SymRead,
37991 asm: s390x.AMOVB,
37992 reg: regInfo{
37993 inputs: []inputInfo{
37994 {1, 56318},
37995 {0, 4295023614},
37996 },
37997 outputs: []outputInfo{
37998 {0, 23551},
37999 },
38000 },
38001 },
38002 {
38003 name: "MOVHZloadidx",
38004 auxType: auxSymOff,
38005 argLen: 3,
38006 commutative: true,
38007 symEffect: SymRead,
38008 asm: s390x.AMOVHZ,
38009 reg: regInfo{
38010 inputs: []inputInfo{
38011 {1, 56318},
38012 {0, 4295023614},
38013 },
38014 outputs: []outputInfo{
38015 {0, 23551},
38016 },
38017 },
38018 },
38019 {
38020 name: "MOVHloadidx",
38021 auxType: auxSymOff,
38022 argLen: 3,
38023 commutative: true,
38024 symEffect: SymRead,
38025 asm: s390x.AMOVH,
38026 reg: regInfo{
38027 inputs: []inputInfo{
38028 {1, 56318},
38029 {0, 4295023614},
38030 },
38031 outputs: []outputInfo{
38032 {0, 23551},
38033 },
38034 },
38035 },
38036 {
38037 name: "MOVWZloadidx",
38038 auxType: auxSymOff,
38039 argLen: 3,
38040 commutative: true,
38041 symEffect: SymRead,
38042 asm: s390x.AMOVWZ,
38043 reg: regInfo{
38044 inputs: []inputInfo{
38045 {1, 56318},
38046 {0, 4295023614},
38047 },
38048 outputs: []outputInfo{
38049 {0, 23551},
38050 },
38051 },
38052 },
38053 {
38054 name: "MOVWloadidx",
38055 auxType: auxSymOff,
38056 argLen: 3,
38057 commutative: true,
38058 symEffect: SymRead,
38059 asm: s390x.AMOVW,
38060 reg: regInfo{
38061 inputs: []inputInfo{
38062 {1, 56318},
38063 {0, 4295023614},
38064 },
38065 outputs: []outputInfo{
38066 {0, 23551},
38067 },
38068 },
38069 },
38070 {
38071 name: "MOVDloadidx",
38072 auxType: auxSymOff,
38073 argLen: 3,
38074 commutative: true,
38075 symEffect: SymRead,
38076 asm: s390x.AMOVD,
38077 reg: regInfo{
38078 inputs: []inputInfo{
38079 {1, 56318},
38080 {0, 4295023614},
38081 },
38082 outputs: []outputInfo{
38083 {0, 23551},
38084 },
38085 },
38086 },
38087 {
38088 name: "MOVHBRloadidx",
38089 auxType: auxSymOff,
38090 argLen: 3,
38091 commutative: true,
38092 symEffect: SymRead,
38093 asm: s390x.AMOVHBR,
38094 reg: regInfo{
38095 inputs: []inputInfo{
38096 {1, 56318},
38097 {0, 4295023614},
38098 },
38099 outputs: []outputInfo{
38100 {0, 23551},
38101 },
38102 },
38103 },
38104 {
38105 name: "MOVWBRloadidx",
38106 auxType: auxSymOff,
38107 argLen: 3,
38108 commutative: true,
38109 symEffect: SymRead,
38110 asm: s390x.AMOVWBR,
38111 reg: regInfo{
38112 inputs: []inputInfo{
38113 {1, 56318},
38114 {0, 4295023614},
38115 },
38116 outputs: []outputInfo{
38117 {0, 23551},
38118 },
38119 },
38120 },
38121 {
38122 name: "MOVDBRloadidx",
38123 auxType: auxSymOff,
38124 argLen: 3,
38125 commutative: true,
38126 symEffect: SymRead,
38127 asm: s390x.AMOVDBR,
38128 reg: regInfo{
38129 inputs: []inputInfo{
38130 {1, 56318},
38131 {0, 4295023614},
38132 },
38133 outputs: []outputInfo{
38134 {0, 23551},
38135 },
38136 },
38137 },
38138 {
38139 name: "MOVBstoreidx",
38140 auxType: auxSymOff,
38141 argLen: 4,
38142 commutative: true,
38143 symEffect: SymWrite,
38144 asm: s390x.AMOVB,
38145 reg: regInfo{
38146 inputs: []inputInfo{
38147 {0, 56318},
38148 {1, 56318},
38149 {2, 56319},
38150 },
38151 },
38152 },
38153 {
38154 name: "MOVHstoreidx",
38155 auxType: auxSymOff,
38156 argLen: 4,
38157 commutative: true,
38158 symEffect: SymWrite,
38159 asm: s390x.AMOVH,
38160 reg: regInfo{
38161 inputs: []inputInfo{
38162 {0, 56318},
38163 {1, 56318},
38164 {2, 56319},
38165 },
38166 },
38167 },
38168 {
38169 name: "MOVWstoreidx",
38170 auxType: auxSymOff,
38171 argLen: 4,
38172 commutative: true,
38173 symEffect: SymWrite,
38174 asm: s390x.AMOVW,
38175 reg: regInfo{
38176 inputs: []inputInfo{
38177 {0, 56318},
38178 {1, 56318},
38179 {2, 56319},
38180 },
38181 },
38182 },
38183 {
38184 name: "MOVDstoreidx",
38185 auxType: auxSymOff,
38186 argLen: 4,
38187 commutative: true,
38188 symEffect: SymWrite,
38189 asm: s390x.AMOVD,
38190 reg: regInfo{
38191 inputs: []inputInfo{
38192 {0, 56318},
38193 {1, 56318},
38194 {2, 56319},
38195 },
38196 },
38197 },
38198 {
38199 name: "MOVHBRstoreidx",
38200 auxType: auxSymOff,
38201 argLen: 4,
38202 commutative: true,
38203 symEffect: SymWrite,
38204 asm: s390x.AMOVHBR,
38205 reg: regInfo{
38206 inputs: []inputInfo{
38207 {0, 56318},
38208 {1, 56318},
38209 {2, 56319},
38210 },
38211 },
38212 },
38213 {
38214 name: "MOVWBRstoreidx",
38215 auxType: auxSymOff,
38216 argLen: 4,
38217 commutative: true,
38218 symEffect: SymWrite,
38219 asm: s390x.AMOVWBR,
38220 reg: regInfo{
38221 inputs: []inputInfo{
38222 {0, 56318},
38223 {1, 56318},
38224 {2, 56319},
38225 },
38226 },
38227 },
38228 {
38229 name: "MOVDBRstoreidx",
38230 auxType: auxSymOff,
38231 argLen: 4,
38232 commutative: true,
38233 symEffect: SymWrite,
38234 asm: s390x.AMOVDBR,
38235 reg: regInfo{
38236 inputs: []inputInfo{
38237 {0, 56318},
38238 {1, 56318},
38239 {2, 56319},
38240 },
38241 },
38242 },
38243 {
38244 name: "MOVBstoreconst",
38245 auxType: auxSymValAndOff,
38246 argLen: 2,
38247 faultOnNilArg0: true,
38248 symEffect: SymWrite,
38249 asm: s390x.AMOVB,
38250 reg: regInfo{
38251 inputs: []inputInfo{
38252 {0, 4295023614},
38253 },
38254 },
38255 },
38256 {
38257 name: "MOVHstoreconst",
38258 auxType: auxSymValAndOff,
38259 argLen: 2,
38260 faultOnNilArg0: true,
38261 symEffect: SymWrite,
38262 asm: s390x.AMOVH,
38263 reg: regInfo{
38264 inputs: []inputInfo{
38265 {0, 4295023614},
38266 },
38267 },
38268 },
38269 {
38270 name: "MOVWstoreconst",
38271 auxType: auxSymValAndOff,
38272 argLen: 2,
38273 faultOnNilArg0: true,
38274 symEffect: SymWrite,
38275 asm: s390x.AMOVW,
38276 reg: regInfo{
38277 inputs: []inputInfo{
38278 {0, 4295023614},
38279 },
38280 },
38281 },
38282 {
38283 name: "MOVDstoreconst",
38284 auxType: auxSymValAndOff,
38285 argLen: 2,
38286 faultOnNilArg0: true,
38287 symEffect: SymWrite,
38288 asm: s390x.AMOVD,
38289 reg: regInfo{
38290 inputs: []inputInfo{
38291 {0, 4295023614},
38292 },
38293 },
38294 },
38295 {
38296 name: "CLEAR",
38297 auxType: auxSymValAndOff,
38298 argLen: 2,
38299 clobberFlags: true,
38300 faultOnNilArg0: true,
38301 symEffect: SymWrite,
38302 asm: s390x.ACLEAR,
38303 reg: regInfo{
38304 inputs: []inputInfo{
38305 {0, 23550},
38306 },
38307 },
38308 },
38309 {
38310 name: "CALLstatic",
38311 auxType: auxCallOff,
38312 argLen: 1,
38313 clobberFlags: true,
38314 call: true,
38315 reg: regInfo{
38316 clobbers: 4294933503,
38317 },
38318 },
38319 {
38320 name: "CALLtail",
38321 auxType: auxCallOff,
38322 argLen: 1,
38323 clobberFlags: true,
38324 call: true,
38325 tailCall: true,
38326 reg: regInfo{
38327 clobbers: 4294933503,
38328 },
38329 },
38330 {
38331 name: "CALLclosure",
38332 auxType: auxCallOff,
38333 argLen: 3,
38334 clobberFlags: true,
38335 call: true,
38336 reg: regInfo{
38337 inputs: []inputInfo{
38338 {1, 4096},
38339 {0, 56318},
38340 },
38341 clobbers: 4294933503,
38342 },
38343 },
38344 {
38345 name: "CALLinter",
38346 auxType: auxCallOff,
38347 argLen: 2,
38348 clobberFlags: true,
38349 call: true,
38350 reg: regInfo{
38351 inputs: []inputInfo{
38352 {0, 23550},
38353 },
38354 clobbers: 4294933503,
38355 },
38356 },
38357 {
38358 name: "InvertFlags",
38359 argLen: 1,
38360 reg: regInfo{},
38361 },
38362 {
38363 name: "LoweredGetG",
38364 argLen: 1,
38365 reg: regInfo{
38366 outputs: []outputInfo{
38367 {0, 23551},
38368 },
38369 },
38370 },
38371 {
38372 name: "LoweredGetClosurePtr",
38373 argLen: 0,
38374 zeroWidth: true,
38375 reg: regInfo{
38376 outputs: []outputInfo{
38377 {0, 4096},
38378 },
38379 },
38380 },
38381 {
38382 name: "LoweredGetCallerSP",
38383 argLen: 1,
38384 rematerializeable: true,
38385 reg: regInfo{
38386 outputs: []outputInfo{
38387 {0, 23551},
38388 },
38389 },
38390 },
38391 {
38392 name: "LoweredGetCallerPC",
38393 argLen: 0,
38394 rematerializeable: true,
38395 reg: regInfo{
38396 outputs: []outputInfo{
38397 {0, 23551},
38398 },
38399 },
38400 },
38401 {
38402 name: "LoweredNilCheck",
38403 argLen: 2,
38404 clobberFlags: true,
38405 nilCheck: true,
38406 faultOnNilArg0: true,
38407 reg: regInfo{
38408 inputs: []inputInfo{
38409 {0, 56318},
38410 },
38411 },
38412 },
38413 {
38414 name: "LoweredRound32F",
38415 argLen: 1,
38416 resultInArg0: true,
38417 zeroWidth: true,
38418 reg: regInfo{
38419 inputs: []inputInfo{
38420 {0, 4294901760},
38421 },
38422 outputs: []outputInfo{
38423 {0, 4294901760},
38424 },
38425 },
38426 },
38427 {
38428 name: "LoweredRound64F",
38429 argLen: 1,
38430 resultInArg0: true,
38431 zeroWidth: true,
38432 reg: regInfo{
38433 inputs: []inputInfo{
38434 {0, 4294901760},
38435 },
38436 outputs: []outputInfo{
38437 {0, 4294901760},
38438 },
38439 },
38440 },
38441 {
38442 name: "LoweredWB",
38443 auxType: auxInt64,
38444 argLen: 1,
38445 clobberFlags: true,
38446 reg: regInfo{
38447 clobbers: 4294918146,
38448 outputs: []outputInfo{
38449 {0, 512},
38450 },
38451 },
38452 },
38453 {
38454 name: "LoweredPanicBoundsA",
38455 auxType: auxInt64,
38456 argLen: 3,
38457 call: true,
38458 reg: regInfo{
38459 inputs: []inputInfo{
38460 {0, 4},
38461 {1, 8},
38462 },
38463 },
38464 },
38465 {
38466 name: "LoweredPanicBoundsB",
38467 auxType: auxInt64,
38468 argLen: 3,
38469 call: true,
38470 reg: regInfo{
38471 inputs: []inputInfo{
38472 {0, 2},
38473 {1, 4},
38474 },
38475 },
38476 },
38477 {
38478 name: "LoweredPanicBoundsC",
38479 auxType: auxInt64,
38480 argLen: 3,
38481 call: true,
38482 reg: regInfo{
38483 inputs: []inputInfo{
38484 {0, 1},
38485 {1, 2},
38486 },
38487 },
38488 },
38489 {
38490 name: "FlagEQ",
38491 argLen: 0,
38492 reg: regInfo{},
38493 },
38494 {
38495 name: "FlagLT",
38496 argLen: 0,
38497 reg: regInfo{},
38498 },
38499 {
38500 name: "FlagGT",
38501 argLen: 0,
38502 reg: regInfo{},
38503 },
38504 {
38505 name: "FlagOV",
38506 argLen: 0,
38507 reg: regInfo{},
38508 },
38509 {
38510 name: "SYNC",
38511 argLen: 1,
38512 asm: s390x.ASYNC,
38513 reg: regInfo{},
38514 },
38515 {
38516 name: "MOVBZatomicload",
38517 auxType: auxSymOff,
38518 argLen: 2,
38519 faultOnNilArg0: true,
38520 symEffect: SymRead,
38521 asm: s390x.AMOVBZ,
38522 reg: regInfo{
38523 inputs: []inputInfo{
38524 {0, 4295023614},
38525 },
38526 outputs: []outputInfo{
38527 {0, 23551},
38528 },
38529 },
38530 },
38531 {
38532 name: "MOVWZatomicload",
38533 auxType: auxSymOff,
38534 argLen: 2,
38535 faultOnNilArg0: true,
38536 symEffect: SymRead,
38537 asm: s390x.AMOVWZ,
38538 reg: regInfo{
38539 inputs: []inputInfo{
38540 {0, 4295023614},
38541 },
38542 outputs: []outputInfo{
38543 {0, 23551},
38544 },
38545 },
38546 },
38547 {
38548 name: "MOVDatomicload",
38549 auxType: auxSymOff,
38550 argLen: 2,
38551 faultOnNilArg0: true,
38552 symEffect: SymRead,
38553 asm: s390x.AMOVD,
38554 reg: regInfo{
38555 inputs: []inputInfo{
38556 {0, 4295023614},
38557 },
38558 outputs: []outputInfo{
38559 {0, 23551},
38560 },
38561 },
38562 },
38563 {
38564 name: "MOVBatomicstore",
38565 auxType: auxSymOff,
38566 argLen: 3,
38567 clobberFlags: true,
38568 faultOnNilArg0: true,
38569 hasSideEffects: true,
38570 symEffect: SymWrite,
38571 asm: s390x.AMOVB,
38572 reg: regInfo{
38573 inputs: []inputInfo{
38574 {0, 4295023614},
38575 {1, 56319},
38576 },
38577 },
38578 },
38579 {
38580 name: "MOVWatomicstore",
38581 auxType: auxSymOff,
38582 argLen: 3,
38583 clobberFlags: true,
38584 faultOnNilArg0: true,
38585 hasSideEffects: true,
38586 symEffect: SymWrite,
38587 asm: s390x.AMOVW,
38588 reg: regInfo{
38589 inputs: []inputInfo{
38590 {0, 4295023614},
38591 {1, 56319},
38592 },
38593 },
38594 },
38595 {
38596 name: "MOVDatomicstore",
38597 auxType: auxSymOff,
38598 argLen: 3,
38599 clobberFlags: true,
38600 faultOnNilArg0: true,
38601 hasSideEffects: true,
38602 symEffect: SymWrite,
38603 asm: s390x.AMOVD,
38604 reg: regInfo{
38605 inputs: []inputInfo{
38606 {0, 4295023614},
38607 {1, 56319},
38608 },
38609 },
38610 },
38611 {
38612 name: "LAA",
38613 auxType: auxSymOff,
38614 argLen: 3,
38615 clobberFlags: true,
38616 faultOnNilArg0: true,
38617 hasSideEffects: true,
38618 symEffect: SymRdWr,
38619 asm: s390x.ALAA,
38620 reg: regInfo{
38621 inputs: []inputInfo{
38622 {0, 4295023614},
38623 {1, 56319},
38624 },
38625 outputs: []outputInfo{
38626 {0, 23551},
38627 },
38628 },
38629 },
38630 {
38631 name: "LAAG",
38632 auxType: auxSymOff,
38633 argLen: 3,
38634 clobberFlags: true,
38635 faultOnNilArg0: true,
38636 hasSideEffects: true,
38637 symEffect: SymRdWr,
38638 asm: s390x.ALAAG,
38639 reg: regInfo{
38640 inputs: []inputInfo{
38641 {0, 4295023614},
38642 {1, 56319},
38643 },
38644 outputs: []outputInfo{
38645 {0, 23551},
38646 },
38647 },
38648 },
38649 {
38650 name: "AddTupleFirst32",
38651 argLen: 2,
38652 reg: regInfo{},
38653 },
38654 {
38655 name: "AddTupleFirst64",
38656 argLen: 2,
38657 reg: regInfo{},
38658 },
38659 {
38660 name: "LAN",
38661 argLen: 3,
38662 clobberFlags: true,
38663 hasSideEffects: true,
38664 asm: s390x.ALAN,
38665 reg: regInfo{
38666 inputs: []inputInfo{
38667 {0, 4295023614},
38668 {1, 56319},
38669 },
38670 },
38671 },
38672 {
38673 name: "LANfloor",
38674 argLen: 3,
38675 clobberFlags: true,
38676 hasSideEffects: true,
38677 asm: s390x.ALAN,
38678 reg: regInfo{
38679 inputs: []inputInfo{
38680 {0, 2},
38681 {1, 56319},
38682 },
38683 clobbers: 2,
38684 },
38685 },
38686 {
38687 name: "LAO",
38688 argLen: 3,
38689 clobberFlags: true,
38690 hasSideEffects: true,
38691 asm: s390x.ALAO,
38692 reg: regInfo{
38693 inputs: []inputInfo{
38694 {0, 4295023614},
38695 {1, 56319},
38696 },
38697 },
38698 },
38699 {
38700 name: "LAOfloor",
38701 argLen: 3,
38702 clobberFlags: true,
38703 hasSideEffects: true,
38704 asm: s390x.ALAO,
38705 reg: regInfo{
38706 inputs: []inputInfo{
38707 {0, 2},
38708 {1, 56319},
38709 },
38710 clobbers: 2,
38711 },
38712 },
38713 {
38714 name: "LoweredAtomicCas32",
38715 auxType: auxSymOff,
38716 argLen: 4,
38717 clobberFlags: true,
38718 faultOnNilArg0: true,
38719 hasSideEffects: true,
38720 symEffect: SymRdWr,
38721 asm: s390x.ACS,
38722 reg: regInfo{
38723 inputs: []inputInfo{
38724 {1, 1},
38725 {0, 56318},
38726 {2, 56319},
38727 },
38728 clobbers: 1,
38729 outputs: []outputInfo{
38730 {1, 0},
38731 {0, 23551},
38732 },
38733 },
38734 },
38735 {
38736 name: "LoweredAtomicCas64",
38737 auxType: auxSymOff,
38738 argLen: 4,
38739 clobberFlags: true,
38740 faultOnNilArg0: true,
38741 hasSideEffects: true,
38742 symEffect: SymRdWr,
38743 asm: s390x.ACSG,
38744 reg: regInfo{
38745 inputs: []inputInfo{
38746 {1, 1},
38747 {0, 56318},
38748 {2, 56319},
38749 },
38750 clobbers: 1,
38751 outputs: []outputInfo{
38752 {1, 0},
38753 {0, 23551},
38754 },
38755 },
38756 },
38757 {
38758 name: "LoweredAtomicExchange32",
38759 auxType: auxSymOff,
38760 argLen: 3,
38761 clobberFlags: true,
38762 faultOnNilArg0: true,
38763 hasSideEffects: true,
38764 symEffect: SymRdWr,
38765 asm: s390x.ACS,
38766 reg: regInfo{
38767 inputs: []inputInfo{
38768 {0, 56318},
38769 {1, 56318},
38770 },
38771 outputs: []outputInfo{
38772 {1, 0},
38773 {0, 1},
38774 },
38775 },
38776 },
38777 {
38778 name: "LoweredAtomicExchange64",
38779 auxType: auxSymOff,
38780 argLen: 3,
38781 clobberFlags: true,
38782 faultOnNilArg0: true,
38783 hasSideEffects: true,
38784 symEffect: SymRdWr,
38785 asm: s390x.ACSG,
38786 reg: regInfo{
38787 inputs: []inputInfo{
38788 {0, 56318},
38789 {1, 56318},
38790 },
38791 outputs: []outputInfo{
38792 {1, 0},
38793 {0, 1},
38794 },
38795 },
38796 },
38797 {
38798 name: "FLOGR",
38799 argLen: 1,
38800 clobberFlags: true,
38801 asm: s390x.AFLOGR,
38802 reg: regInfo{
38803 inputs: []inputInfo{
38804 {0, 23551},
38805 },
38806 clobbers: 2,
38807 outputs: []outputInfo{
38808 {0, 1},
38809 },
38810 },
38811 },
38812 {
38813 name: "POPCNT",
38814 argLen: 1,
38815 clobberFlags: true,
38816 asm: s390x.APOPCNT,
38817 reg: regInfo{
38818 inputs: []inputInfo{
38819 {0, 23551},
38820 },
38821 outputs: []outputInfo{
38822 {0, 23551},
38823 },
38824 },
38825 },
38826 {
38827 name: "MLGR",
38828 argLen: 2,
38829 asm: s390x.AMLGR,
38830 reg: regInfo{
38831 inputs: []inputInfo{
38832 {1, 8},
38833 {0, 23551},
38834 },
38835 outputs: []outputInfo{
38836 {0, 4},
38837 {1, 8},
38838 },
38839 },
38840 },
38841 {
38842 name: "SumBytes2",
38843 argLen: 1,
38844 reg: regInfo{},
38845 },
38846 {
38847 name: "SumBytes4",
38848 argLen: 1,
38849 reg: regInfo{},
38850 },
38851 {
38852 name: "SumBytes8",
38853 argLen: 1,
38854 reg: regInfo{},
38855 },
38856 {
38857 name: "STMG2",
38858 auxType: auxSymOff,
38859 argLen: 4,
38860 clobberFlags: true,
38861 faultOnNilArg0: true,
38862 symEffect: SymWrite,
38863 asm: s390x.ASTMG,
38864 reg: regInfo{
38865 inputs: []inputInfo{
38866 {1, 2},
38867 {2, 4},
38868 {0, 56318},
38869 },
38870 },
38871 },
38872 {
38873 name: "STMG3",
38874 auxType: auxSymOff,
38875 argLen: 5,
38876 clobberFlags: true,
38877 faultOnNilArg0: true,
38878 symEffect: SymWrite,
38879 asm: s390x.ASTMG,
38880 reg: regInfo{
38881 inputs: []inputInfo{
38882 {1, 2},
38883 {2, 4},
38884 {3, 8},
38885 {0, 56318},
38886 },
38887 },
38888 },
38889 {
38890 name: "STMG4",
38891 auxType: auxSymOff,
38892 argLen: 6,
38893 clobberFlags: true,
38894 faultOnNilArg0: true,
38895 symEffect: SymWrite,
38896 asm: s390x.ASTMG,
38897 reg: regInfo{
38898 inputs: []inputInfo{
38899 {1, 2},
38900 {2, 4},
38901 {3, 8},
38902 {4, 16},
38903 {0, 56318},
38904 },
38905 },
38906 },
38907 {
38908 name: "STM2",
38909 auxType: auxSymOff,
38910 argLen: 4,
38911 clobberFlags: true,
38912 faultOnNilArg0: true,
38913 symEffect: SymWrite,
38914 asm: s390x.ASTMY,
38915 reg: regInfo{
38916 inputs: []inputInfo{
38917 {1, 2},
38918 {2, 4},
38919 {0, 56318},
38920 },
38921 },
38922 },
38923 {
38924 name: "STM3",
38925 auxType: auxSymOff,
38926 argLen: 5,
38927 clobberFlags: true,
38928 faultOnNilArg0: true,
38929 symEffect: SymWrite,
38930 asm: s390x.ASTMY,
38931 reg: regInfo{
38932 inputs: []inputInfo{
38933 {1, 2},
38934 {2, 4},
38935 {3, 8},
38936 {0, 56318},
38937 },
38938 },
38939 },
38940 {
38941 name: "STM4",
38942 auxType: auxSymOff,
38943 argLen: 6,
38944 clobberFlags: true,
38945 faultOnNilArg0: true,
38946 symEffect: SymWrite,
38947 asm: s390x.ASTMY,
38948 reg: regInfo{
38949 inputs: []inputInfo{
38950 {1, 2},
38951 {2, 4},
38952 {3, 8},
38953 {4, 16},
38954 {0, 56318},
38955 },
38956 },
38957 },
38958 {
38959 name: "LoweredMove",
38960 auxType: auxInt64,
38961 argLen: 4,
38962 clobberFlags: true,
38963 faultOnNilArg0: true,
38964 faultOnNilArg1: true,
38965 reg: regInfo{
38966 inputs: []inputInfo{
38967 {0, 2},
38968 {1, 4},
38969 {2, 56319},
38970 },
38971 clobbers: 6,
38972 },
38973 },
38974 {
38975 name: "LoweredZero",
38976 auxType: auxInt64,
38977 argLen: 3,
38978 clobberFlags: true,
38979 faultOnNilArg0: true,
38980 reg: regInfo{
38981 inputs: []inputInfo{
38982 {0, 2},
38983 {1, 56319},
38984 },
38985 clobbers: 2,
38986 },
38987 },
38988
38989 {
38990 name: "LoweredStaticCall",
38991 auxType: auxCallOff,
38992 argLen: 1,
38993 call: true,
38994 reg: regInfo{
38995 clobbers: 844424930131967,
38996 },
38997 },
38998 {
38999 name: "LoweredTailCall",
39000 auxType: auxCallOff,
39001 argLen: 1,
39002 call: true,
39003 tailCall: true,
39004 reg: regInfo{
39005 clobbers: 844424930131967,
39006 },
39007 },
39008 {
39009 name: "LoweredClosureCall",
39010 auxType: auxCallOff,
39011 argLen: 3,
39012 call: true,
39013 reg: regInfo{
39014 inputs: []inputInfo{
39015 {0, 65535},
39016 {1, 65535},
39017 },
39018 clobbers: 844424930131967,
39019 },
39020 },
39021 {
39022 name: "LoweredInterCall",
39023 auxType: auxCallOff,
39024 argLen: 2,
39025 call: true,
39026 reg: regInfo{
39027 inputs: []inputInfo{
39028 {0, 65535},
39029 },
39030 clobbers: 844424930131967,
39031 },
39032 },
39033 {
39034 name: "LoweredAddr",
39035 auxType: auxSymOff,
39036 argLen: 1,
39037 rematerializeable: true,
39038 symEffect: SymAddr,
39039 reg: regInfo{
39040 inputs: []inputInfo{
39041 {0, 281474976776191},
39042 },
39043 outputs: []outputInfo{
39044 {0, 65535},
39045 },
39046 },
39047 },
39048 {
39049 name: "LoweredMove",
39050 auxType: auxInt64,
39051 argLen: 3,
39052 reg: regInfo{
39053 inputs: []inputInfo{
39054 {0, 65535},
39055 {1, 65535},
39056 },
39057 },
39058 },
39059 {
39060 name: "LoweredZero",
39061 auxType: auxInt64,
39062 argLen: 2,
39063 reg: regInfo{
39064 inputs: []inputInfo{
39065 {0, 65535},
39066 },
39067 },
39068 },
39069 {
39070 name: "LoweredGetClosurePtr",
39071 argLen: 0,
39072 reg: regInfo{
39073 outputs: []outputInfo{
39074 {0, 65535},
39075 },
39076 },
39077 },
39078 {
39079 name: "LoweredGetCallerPC",
39080 argLen: 0,
39081 rematerializeable: true,
39082 reg: regInfo{
39083 outputs: []outputInfo{
39084 {0, 65535},
39085 },
39086 },
39087 },
39088 {
39089 name: "LoweredGetCallerSP",
39090 argLen: 1,
39091 rematerializeable: true,
39092 reg: regInfo{
39093 outputs: []outputInfo{
39094 {0, 65535},
39095 },
39096 },
39097 },
39098 {
39099 name: "LoweredNilCheck",
39100 argLen: 2,
39101 nilCheck: true,
39102 faultOnNilArg0: true,
39103 reg: regInfo{
39104 inputs: []inputInfo{
39105 {0, 65535},
39106 },
39107 },
39108 },
39109 {
39110 name: "LoweredWB",
39111 auxType: auxInt64,
39112 argLen: 1,
39113 reg: regInfo{
39114 clobbers: 844424930131967,
39115 outputs: []outputInfo{
39116 {0, 65535},
39117 },
39118 },
39119 },
39120 {
39121 name: "LoweredConvert",
39122 argLen: 2,
39123 reg: regInfo{
39124 inputs: []inputInfo{
39125 {0, 65535},
39126 },
39127 outputs: []outputInfo{
39128 {0, 65535},
39129 },
39130 },
39131 },
39132 {
39133 name: "Select",
39134 argLen: 3,
39135 asm: wasm.ASelect,
39136 reg: regInfo{
39137 inputs: []inputInfo{
39138 {0, 281474976776191},
39139 {1, 281474976776191},
39140 {2, 281474976776191},
39141 },
39142 outputs: []outputInfo{
39143 {0, 65535},
39144 },
39145 },
39146 },
39147 {
39148 name: "I64Load8U",
39149 auxType: auxInt64,
39150 argLen: 2,
39151 asm: wasm.AI64Load8U,
39152 reg: regInfo{
39153 inputs: []inputInfo{
39154 {0, 1407374883618815},
39155 },
39156 outputs: []outputInfo{
39157 {0, 65535},
39158 },
39159 },
39160 },
39161 {
39162 name: "I64Load8S",
39163 auxType: auxInt64,
39164 argLen: 2,
39165 asm: wasm.AI64Load8S,
39166 reg: regInfo{
39167 inputs: []inputInfo{
39168 {0, 1407374883618815},
39169 },
39170 outputs: []outputInfo{
39171 {0, 65535},
39172 },
39173 },
39174 },
39175 {
39176 name: "I64Load16U",
39177 auxType: auxInt64,
39178 argLen: 2,
39179 asm: wasm.AI64Load16U,
39180 reg: regInfo{
39181 inputs: []inputInfo{
39182 {0, 1407374883618815},
39183 },
39184 outputs: []outputInfo{
39185 {0, 65535},
39186 },
39187 },
39188 },
39189 {
39190 name: "I64Load16S",
39191 auxType: auxInt64,
39192 argLen: 2,
39193 asm: wasm.AI64Load16S,
39194 reg: regInfo{
39195 inputs: []inputInfo{
39196 {0, 1407374883618815},
39197 },
39198 outputs: []outputInfo{
39199 {0, 65535},
39200 },
39201 },
39202 },
39203 {
39204 name: "I64Load32U",
39205 auxType: auxInt64,
39206 argLen: 2,
39207 asm: wasm.AI64Load32U,
39208 reg: regInfo{
39209 inputs: []inputInfo{
39210 {0, 1407374883618815},
39211 },
39212 outputs: []outputInfo{
39213 {0, 65535},
39214 },
39215 },
39216 },
39217 {
39218 name: "I64Load32S",
39219 auxType: auxInt64,
39220 argLen: 2,
39221 asm: wasm.AI64Load32S,
39222 reg: regInfo{
39223 inputs: []inputInfo{
39224 {0, 1407374883618815},
39225 },
39226 outputs: []outputInfo{
39227 {0, 65535},
39228 },
39229 },
39230 },
39231 {
39232 name: "I64Load",
39233 auxType: auxInt64,
39234 argLen: 2,
39235 asm: wasm.AI64Load,
39236 reg: regInfo{
39237 inputs: []inputInfo{
39238 {0, 1407374883618815},
39239 },
39240 outputs: []outputInfo{
39241 {0, 65535},
39242 },
39243 },
39244 },
39245 {
39246 name: "I64Store8",
39247 auxType: auxInt64,
39248 argLen: 3,
39249 asm: wasm.AI64Store8,
39250 reg: regInfo{
39251 inputs: []inputInfo{
39252 {1, 281474976776191},
39253 {0, 1407374883618815},
39254 },
39255 },
39256 },
39257 {
39258 name: "I64Store16",
39259 auxType: auxInt64,
39260 argLen: 3,
39261 asm: wasm.AI64Store16,
39262 reg: regInfo{
39263 inputs: []inputInfo{
39264 {1, 281474976776191},
39265 {0, 1407374883618815},
39266 },
39267 },
39268 },
39269 {
39270 name: "I64Store32",
39271 auxType: auxInt64,
39272 argLen: 3,
39273 asm: wasm.AI64Store32,
39274 reg: regInfo{
39275 inputs: []inputInfo{
39276 {1, 281474976776191},
39277 {0, 1407374883618815},
39278 },
39279 },
39280 },
39281 {
39282 name: "I64Store",
39283 auxType: auxInt64,
39284 argLen: 3,
39285 asm: wasm.AI64Store,
39286 reg: regInfo{
39287 inputs: []inputInfo{
39288 {1, 281474976776191},
39289 {0, 1407374883618815},
39290 },
39291 },
39292 },
39293 {
39294 name: "F32Load",
39295 auxType: auxInt64,
39296 argLen: 2,
39297 asm: wasm.AF32Load,
39298 reg: regInfo{
39299 inputs: []inputInfo{
39300 {0, 1407374883618815},
39301 },
39302 outputs: []outputInfo{
39303 {0, 4294901760},
39304 },
39305 },
39306 },
39307 {
39308 name: "F64Load",
39309 auxType: auxInt64,
39310 argLen: 2,
39311 asm: wasm.AF64Load,
39312 reg: regInfo{
39313 inputs: []inputInfo{
39314 {0, 1407374883618815},
39315 },
39316 outputs: []outputInfo{
39317 {0, 281470681743360},
39318 },
39319 },
39320 },
39321 {
39322 name: "F32Store",
39323 auxType: auxInt64,
39324 argLen: 3,
39325 asm: wasm.AF32Store,
39326 reg: regInfo{
39327 inputs: []inputInfo{
39328 {1, 4294901760},
39329 {0, 1407374883618815},
39330 },
39331 },
39332 },
39333 {
39334 name: "F64Store",
39335 auxType: auxInt64,
39336 argLen: 3,
39337 asm: wasm.AF64Store,
39338 reg: regInfo{
39339 inputs: []inputInfo{
39340 {1, 281470681743360},
39341 {0, 1407374883618815},
39342 },
39343 },
39344 },
39345 {
39346 name: "I64Const",
39347 auxType: auxInt64,
39348 argLen: 0,
39349 rematerializeable: true,
39350 reg: regInfo{
39351 outputs: []outputInfo{
39352 {0, 65535},
39353 },
39354 },
39355 },
39356 {
39357 name: "F32Const",
39358 auxType: auxFloat32,
39359 argLen: 0,
39360 rematerializeable: true,
39361 reg: regInfo{
39362 outputs: []outputInfo{
39363 {0, 4294901760},
39364 },
39365 },
39366 },
39367 {
39368 name: "F64Const",
39369 auxType: auxFloat64,
39370 argLen: 0,
39371 rematerializeable: true,
39372 reg: regInfo{
39373 outputs: []outputInfo{
39374 {0, 281470681743360},
39375 },
39376 },
39377 },
39378 {
39379 name: "I64Eqz",
39380 argLen: 1,
39381 asm: wasm.AI64Eqz,
39382 reg: regInfo{
39383 inputs: []inputInfo{
39384 {0, 281474976776191},
39385 },
39386 outputs: []outputInfo{
39387 {0, 65535},
39388 },
39389 },
39390 },
39391 {
39392 name: "I64Eq",
39393 argLen: 2,
39394 asm: wasm.AI64Eq,
39395 reg: regInfo{
39396 inputs: []inputInfo{
39397 {0, 281474976776191},
39398 {1, 281474976776191},
39399 },
39400 outputs: []outputInfo{
39401 {0, 65535},
39402 },
39403 },
39404 },
39405 {
39406 name: "I64Ne",
39407 argLen: 2,
39408 asm: wasm.AI64Ne,
39409 reg: regInfo{
39410 inputs: []inputInfo{
39411 {0, 281474976776191},
39412 {1, 281474976776191},
39413 },
39414 outputs: []outputInfo{
39415 {0, 65535},
39416 },
39417 },
39418 },
39419 {
39420 name: "I64LtS",
39421 argLen: 2,
39422 asm: wasm.AI64LtS,
39423 reg: regInfo{
39424 inputs: []inputInfo{
39425 {0, 281474976776191},
39426 {1, 281474976776191},
39427 },
39428 outputs: []outputInfo{
39429 {0, 65535},
39430 },
39431 },
39432 },
39433 {
39434 name: "I64LtU",
39435 argLen: 2,
39436 asm: wasm.AI64LtU,
39437 reg: regInfo{
39438 inputs: []inputInfo{
39439 {0, 281474976776191},
39440 {1, 281474976776191},
39441 },
39442 outputs: []outputInfo{
39443 {0, 65535},
39444 },
39445 },
39446 },
39447 {
39448 name: "I64GtS",
39449 argLen: 2,
39450 asm: wasm.AI64GtS,
39451 reg: regInfo{
39452 inputs: []inputInfo{
39453 {0, 281474976776191},
39454 {1, 281474976776191},
39455 },
39456 outputs: []outputInfo{
39457 {0, 65535},
39458 },
39459 },
39460 },
39461 {
39462 name: "I64GtU",
39463 argLen: 2,
39464 asm: wasm.AI64GtU,
39465 reg: regInfo{
39466 inputs: []inputInfo{
39467 {0, 281474976776191},
39468 {1, 281474976776191},
39469 },
39470 outputs: []outputInfo{
39471 {0, 65535},
39472 },
39473 },
39474 },
39475 {
39476 name: "I64LeS",
39477 argLen: 2,
39478 asm: wasm.AI64LeS,
39479 reg: regInfo{
39480 inputs: []inputInfo{
39481 {0, 281474976776191},
39482 {1, 281474976776191},
39483 },
39484 outputs: []outputInfo{
39485 {0, 65535},
39486 },
39487 },
39488 },
39489 {
39490 name: "I64LeU",
39491 argLen: 2,
39492 asm: wasm.AI64LeU,
39493 reg: regInfo{
39494 inputs: []inputInfo{
39495 {0, 281474976776191},
39496 {1, 281474976776191},
39497 },
39498 outputs: []outputInfo{
39499 {0, 65535},
39500 },
39501 },
39502 },
39503 {
39504 name: "I64GeS",
39505 argLen: 2,
39506 asm: wasm.AI64GeS,
39507 reg: regInfo{
39508 inputs: []inputInfo{
39509 {0, 281474976776191},
39510 {1, 281474976776191},
39511 },
39512 outputs: []outputInfo{
39513 {0, 65535},
39514 },
39515 },
39516 },
39517 {
39518 name: "I64GeU",
39519 argLen: 2,
39520 asm: wasm.AI64GeU,
39521 reg: regInfo{
39522 inputs: []inputInfo{
39523 {0, 281474976776191},
39524 {1, 281474976776191},
39525 },
39526 outputs: []outputInfo{
39527 {0, 65535},
39528 },
39529 },
39530 },
39531 {
39532 name: "F32Eq",
39533 argLen: 2,
39534 asm: wasm.AF32Eq,
39535 reg: regInfo{
39536 inputs: []inputInfo{
39537 {0, 4294901760},
39538 {1, 4294901760},
39539 },
39540 outputs: []outputInfo{
39541 {0, 65535},
39542 },
39543 },
39544 },
39545 {
39546 name: "F32Ne",
39547 argLen: 2,
39548 asm: wasm.AF32Ne,
39549 reg: regInfo{
39550 inputs: []inputInfo{
39551 {0, 4294901760},
39552 {1, 4294901760},
39553 },
39554 outputs: []outputInfo{
39555 {0, 65535},
39556 },
39557 },
39558 },
39559 {
39560 name: "F32Lt",
39561 argLen: 2,
39562 asm: wasm.AF32Lt,
39563 reg: regInfo{
39564 inputs: []inputInfo{
39565 {0, 4294901760},
39566 {1, 4294901760},
39567 },
39568 outputs: []outputInfo{
39569 {0, 65535},
39570 },
39571 },
39572 },
39573 {
39574 name: "F32Gt",
39575 argLen: 2,
39576 asm: wasm.AF32Gt,
39577 reg: regInfo{
39578 inputs: []inputInfo{
39579 {0, 4294901760},
39580 {1, 4294901760},
39581 },
39582 outputs: []outputInfo{
39583 {0, 65535},
39584 },
39585 },
39586 },
39587 {
39588 name: "F32Le",
39589 argLen: 2,
39590 asm: wasm.AF32Le,
39591 reg: regInfo{
39592 inputs: []inputInfo{
39593 {0, 4294901760},
39594 {1, 4294901760},
39595 },
39596 outputs: []outputInfo{
39597 {0, 65535},
39598 },
39599 },
39600 },
39601 {
39602 name: "F32Ge",
39603 argLen: 2,
39604 asm: wasm.AF32Ge,
39605 reg: regInfo{
39606 inputs: []inputInfo{
39607 {0, 4294901760},
39608 {1, 4294901760},
39609 },
39610 outputs: []outputInfo{
39611 {0, 65535},
39612 },
39613 },
39614 },
39615 {
39616 name: "F64Eq",
39617 argLen: 2,
39618 asm: wasm.AF64Eq,
39619 reg: regInfo{
39620 inputs: []inputInfo{
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40530 {
40531 name: "Mul8",
40532 argLen: 2,
40533 commutative: true,
40534 generic: true,
40535 },
40536 {
40537 name: "Mul16",
40538 argLen: 2,
40539 commutative: true,
40540 generic: true,
40541 },
40542 {
40543 name: "Mul32",
40544 argLen: 2,
40545 commutative: true,
40546 generic: true,
40547 },
40548 {
40549 name: "Mul64",
40550 argLen: 2,
40551 commutative: true,
40552 generic: true,
40553 },
40554 {
40555 name: "Mul32F",
40556 argLen: 2,
40557 commutative: true,
40558 generic: true,
40559 },
40560 {
40561 name: "Mul64F",
40562 argLen: 2,
40563 commutative: true,
40564 generic: true,
40565 },
40566 {
40567 name: "Div32F",
40568 argLen: 2,
40569 generic: true,
40570 },
40571 {
40572 name: "Div64F",
40573 argLen: 2,
40574 generic: true,
40575 },
40576 {
40577 name: "Hmul32",
40578 argLen: 2,
40579 commutative: true,
40580 generic: true,
40581 },
40582 {
40583 name: "Hmul32u",
40584 argLen: 2,
40585 commutative: true,
40586 generic: true,
40587 },
40588 {
40589 name: "Hmul64",
40590 argLen: 2,
40591 commutative: true,
40592 generic: true,
40593 },
40594 {
40595 name: "Hmul64u",
40596 argLen: 2,
40597 commutative: true,
40598 generic: true,
40599 },
40600 {
40601 name: "Mul32uhilo",
40602 argLen: 2,
40603 commutative: true,
40604 generic: true,
40605 },
40606 {
40607 name: "Mul64uhilo",
40608 argLen: 2,
40609 commutative: true,
40610 generic: true,
40611 },
40612 {
40613 name: "Mul32uover",
40614 argLen: 2,
40615 commutative: true,
40616 generic: true,
40617 },
40618 {
40619 name: "Mul64uover",
40620 argLen: 2,
40621 commutative: true,
40622 generic: true,
40623 },
40624 {
40625 name: "Avg32u",
40626 argLen: 2,
40627 generic: true,
40628 },
40629 {
40630 name: "Avg64u",
40631 argLen: 2,
40632 generic: true,
40633 },
40634 {
40635 name: "Div8",
40636 argLen: 2,
40637 generic: true,
40638 },
40639 {
40640 name: "Div8u",
40641 argLen: 2,
40642 generic: true,
40643 },
40644 {
40645 name: "Div16",
40646 auxType: auxBool,
40647 argLen: 2,
40648 generic: true,
40649 },
40650 {
40651 name: "Div16u",
40652 argLen: 2,
40653 generic: true,
40654 },
40655 {
40656 name: "Div32",
40657 auxType: auxBool,
40658 argLen: 2,
40659 generic: true,
40660 },
40661 {
40662 name: "Div32u",
40663 argLen: 2,
40664 generic: true,
40665 },
40666 {
40667 name: "Div64",
40668 auxType: auxBool,
40669 argLen: 2,
40670 generic: true,
40671 },
40672 {
40673 name: "Div64u",
40674 argLen: 2,
40675 generic: true,
40676 },
40677 {
40678 name: "Div128u",
40679 argLen: 3,
40680 generic: true,
40681 },
40682 {
40683 name: "Mod8",
40684 argLen: 2,
40685 generic: true,
40686 },
40687 {
40688 name: "Mod8u",
40689 argLen: 2,
40690 generic: true,
40691 },
40692 {
40693 name: "Mod16",
40694 auxType: auxBool,
40695 argLen: 2,
40696 generic: true,
40697 },
40698 {
40699 name: "Mod16u",
40700 argLen: 2,
40701 generic: true,
40702 },
40703 {
40704 name: "Mod32",
40705 auxType: auxBool,
40706 argLen: 2,
40707 generic: true,
40708 },
40709 {
40710 name: "Mod32u",
40711 argLen: 2,
40712 generic: true,
40713 },
40714 {
40715 name: "Mod64",
40716 auxType: auxBool,
40717 argLen: 2,
40718 generic: true,
40719 },
40720 {
40721 name: "Mod64u",
40722 argLen: 2,
40723 generic: true,
40724 },
40725 {
40726 name: "And8",
40727 argLen: 2,
40728 commutative: true,
40729 generic: true,
40730 },
40731 {
40732 name: "And16",
40733 argLen: 2,
40734 commutative: true,
40735 generic: true,
40736 },
40737 {
40738 name: "And32",
40739 argLen: 2,
40740 commutative: true,
40741 generic: true,
40742 },
40743 {
40744 name: "And64",
40745 argLen: 2,
40746 commutative: true,
40747 generic: true,
40748 },
40749 {
40750 name: "Or8",
40751 argLen: 2,
40752 commutative: true,
40753 generic: true,
40754 },
40755 {
40756 name: "Or16",
40757 argLen: 2,
40758 commutative: true,
40759 generic: true,
40760 },
40761 {
40762 name: "Or32",
40763 argLen: 2,
40764 commutative: true,
40765 generic: true,
40766 },
40767 {
40768 name: "Or64",
40769 argLen: 2,
40770 commutative: true,
40771 generic: true,
40772 },
40773 {
40774 name: "Xor8",
40775 argLen: 2,
40776 commutative: true,
40777 generic: true,
40778 },
40779 {
40780 name: "Xor16",
40781 argLen: 2,
40782 commutative: true,
40783 generic: true,
40784 },
40785 {
40786 name: "Xor32",
40787 argLen: 2,
40788 commutative: true,
40789 generic: true,
40790 },
40791 {
40792 name: "Xor64",
40793 argLen: 2,
40794 commutative: true,
40795 generic: true,
40796 },
40797 {
40798 name: "Lsh8x8",
40799 auxType: auxBool,
40800 argLen: 2,
40801 generic: true,
40802 },
40803 {
40804 name: "Lsh8x16",
40805 auxType: auxBool,
40806 argLen: 2,
40807 generic: true,
40808 },
40809 {
40810 name: "Lsh8x32",
40811 auxType: auxBool,
40812 argLen: 2,
40813 generic: true,
40814 },
40815 {
40816 name: "Lsh8x64",
40817 auxType: auxBool,
40818 argLen: 2,
40819 generic: true,
40820 },
40821 {
40822 name: "Lsh16x8",
40823 auxType: auxBool,
40824 argLen: 2,
40825 generic: true,
40826 },
40827 {
40828 name: "Lsh16x16",
40829 auxType: auxBool,
40830 argLen: 2,
40831 generic: true,
40832 },
40833 {
40834 name: "Lsh16x32",
40835 auxType: auxBool,
40836 argLen: 2,
40837 generic: true,
40838 },
40839 {
40840 name: "Lsh16x64",
40841 auxType: auxBool,
40842 argLen: 2,
40843 generic: true,
40844 },
40845 {
40846 name: "Lsh32x8",
40847 auxType: auxBool,
40848 argLen: 2,
40849 generic: true,
40850 },
40851 {
40852 name: "Lsh32x16",
40853 auxType: auxBool,
40854 argLen: 2,
40855 generic: true,
40856 },
40857 {
40858 name: "Lsh32x32",
40859 auxType: auxBool,
40860 argLen: 2,
40861 generic: true,
40862 },
40863 {
40864 name: "Lsh32x64",
40865 auxType: auxBool,
40866 argLen: 2,
40867 generic: true,
40868 },
40869 {
40870 name: "Lsh64x8",
40871 auxType: auxBool,
40872 argLen: 2,
40873 generic: true,
40874 },
40875 {
40876 name: "Lsh64x16",
40877 auxType: auxBool,
40878 argLen: 2,
40879 generic: true,
40880 },
40881 {
40882 name: "Lsh64x32",
40883 auxType: auxBool,
40884 argLen: 2,
40885 generic: true,
40886 },
40887 {
40888 name: "Lsh64x64",
40889 auxType: auxBool,
40890 argLen: 2,
40891 generic: true,
40892 },
40893 {
40894 name: "Rsh8x8",
40895 auxType: auxBool,
40896 argLen: 2,
40897 generic: true,
40898 },
40899 {
40900 name: "Rsh8x16",
40901 auxType: auxBool,
40902 argLen: 2,
40903 generic: true,
40904 },
40905 {
40906 name: "Rsh8x32",
40907 auxType: auxBool,
40908 argLen: 2,
40909 generic: true,
40910 },
40911 {
40912 name: "Rsh8x64",
40913 auxType: auxBool,
40914 argLen: 2,
40915 generic: true,
40916 },
40917 {
40918 name: "Rsh16x8",
40919 auxType: auxBool,
40920 argLen: 2,
40921 generic: true,
40922 },
40923 {
40924 name: "Rsh16x16",
40925 auxType: auxBool,
40926 argLen: 2,
40927 generic: true,
40928 },
40929 {
40930 name: "Rsh16x32",
40931 auxType: auxBool,
40932 argLen: 2,
40933 generic: true,
40934 },
40935 {
40936 name: "Rsh16x64",
40937 auxType: auxBool,
40938 argLen: 2,
40939 generic: true,
40940 },
40941 {
40942 name: "Rsh32x8",
40943 auxType: auxBool,
40944 argLen: 2,
40945 generic: true,
40946 },
40947 {
40948 name: "Rsh32x16",
40949 auxType: auxBool,
40950 argLen: 2,
40951 generic: true,
40952 },
40953 {
40954 name: "Rsh32x32",
40955 auxType: auxBool,
40956 argLen: 2,
40957 generic: true,
40958 },
40959 {
40960 name: "Rsh32x64",
40961 auxType: auxBool,
40962 argLen: 2,
40963 generic: true,
40964 },
40965 {
40966 name: "Rsh64x8",
40967 auxType: auxBool,
40968 argLen: 2,
40969 generic: true,
40970 },
40971 {
40972 name: "Rsh64x16",
40973 auxType: auxBool,
40974 argLen: 2,
40975 generic: true,
40976 },
40977 {
40978 name: "Rsh64x32",
40979 auxType: auxBool,
40980 argLen: 2,
40981 generic: true,
40982 },
40983 {
40984 name: "Rsh64x64",
40985 auxType: auxBool,
40986 argLen: 2,
40987 generic: true,
40988 },
40989 {
40990 name: "Rsh8Ux8",
40991 auxType: auxBool,
40992 argLen: 2,
40993 generic: true,
40994 },
40995 {
40996 name: "Rsh8Ux16",
40997 auxType: auxBool,
40998 argLen: 2,
40999 generic: true,
41000 },
41001 {
41002 name: "Rsh8Ux32",
41003 auxType: auxBool,
41004 argLen: 2,
41005 generic: true,
41006 },
41007 {
41008 name: "Rsh8Ux64",
41009 auxType: auxBool,
41010 argLen: 2,
41011 generic: true,
41012 },
41013 {
41014 name: "Rsh16Ux8",
41015 auxType: auxBool,
41016 argLen: 2,
41017 generic: true,
41018 },
41019 {
41020 name: "Rsh16Ux16",
41021 auxType: auxBool,
41022 argLen: 2,
41023 generic: true,
41024 },
41025 {
41026 name: "Rsh16Ux32",
41027 auxType: auxBool,
41028 argLen: 2,
41029 generic: true,
41030 },
41031 {
41032 name: "Rsh16Ux64",
41033 auxType: auxBool,
41034 argLen: 2,
41035 generic: true,
41036 },
41037 {
41038 name: "Rsh32Ux8",
41039 auxType: auxBool,
41040 argLen: 2,
41041 generic: true,
41042 },
41043 {
41044 name: "Rsh32Ux16",
41045 auxType: auxBool,
41046 argLen: 2,
41047 generic: true,
41048 },
41049 {
41050 name: "Rsh32Ux32",
41051 auxType: auxBool,
41052 argLen: 2,
41053 generic: true,
41054 },
41055 {
41056 name: "Rsh32Ux64",
41057 auxType: auxBool,
41058 argLen: 2,
41059 generic: true,
41060 },
41061 {
41062 name: "Rsh64Ux8",
41063 auxType: auxBool,
41064 argLen: 2,
41065 generic: true,
41066 },
41067 {
41068 name: "Rsh64Ux16",
41069 auxType: auxBool,
41070 argLen: 2,
41071 generic: true,
41072 },
41073 {
41074 name: "Rsh64Ux32",
41075 auxType: auxBool,
41076 argLen: 2,
41077 generic: true,
41078 },
41079 {
41080 name: "Rsh64Ux64",
41081 auxType: auxBool,
41082 argLen: 2,
41083 generic: true,
41084 },
41085 {
41086 name: "Eq8",
41087 argLen: 2,
41088 commutative: true,
41089 generic: true,
41090 },
41091 {
41092 name: "Eq16",
41093 argLen: 2,
41094 commutative: true,
41095 generic: true,
41096 },
41097 {
41098 name: "Eq32",
41099 argLen: 2,
41100 commutative: true,
41101 generic: true,
41102 },
41103 {
41104 name: "Eq64",
41105 argLen: 2,
41106 commutative: true,
41107 generic: true,
41108 },
41109 {
41110 name: "EqPtr",
41111 argLen: 2,
41112 commutative: true,
41113 generic: true,
41114 },
41115 {
41116 name: "EqInter",
41117 argLen: 2,
41118 generic: true,
41119 },
41120 {
41121 name: "EqSlice",
41122 argLen: 2,
41123 generic: true,
41124 },
41125 {
41126 name: "Eq32F",
41127 argLen: 2,
41128 commutative: true,
41129 generic: true,
41130 },
41131 {
41132 name: "Eq64F",
41133 argLen: 2,
41134 commutative: true,
41135 generic: true,
41136 },
41137 {
41138 name: "Neq8",
41139 argLen: 2,
41140 commutative: true,
41141 generic: true,
41142 },
41143 {
41144 name: "Neq16",
41145 argLen: 2,
41146 commutative: true,
41147 generic: true,
41148 },
41149 {
41150 name: "Neq32",
41151 argLen: 2,
41152 commutative: true,
41153 generic: true,
41154 },
41155 {
41156 name: "Neq64",
41157 argLen: 2,
41158 commutative: true,
41159 generic: true,
41160 },
41161 {
41162 name: "NeqPtr",
41163 argLen: 2,
41164 commutative: true,
41165 generic: true,
41166 },
41167 {
41168 name: "NeqInter",
41169 argLen: 2,
41170 generic: true,
41171 },
41172 {
41173 name: "NeqSlice",
41174 argLen: 2,
41175 generic: true,
41176 },
41177 {
41178 name: "Neq32F",
41179 argLen: 2,
41180 commutative: true,
41181 generic: true,
41182 },
41183 {
41184 name: "Neq64F",
41185 argLen: 2,
41186 commutative: true,
41187 generic: true,
41188 },
41189 {
41190 name: "Less8",
41191 argLen: 2,
41192 generic: true,
41193 },
41194 {
41195 name: "Less8U",
41196 argLen: 2,
41197 generic: true,
41198 },
41199 {
41200 name: "Less16",
41201 argLen: 2,
41202 generic: true,
41203 },
41204 {
41205 name: "Less16U",
41206 argLen: 2,
41207 generic: true,
41208 },
41209 {
41210 name: "Less32",
41211 argLen: 2,
41212 generic: true,
41213 },
41214 {
41215 name: "Less32U",
41216 argLen: 2,
41217 generic: true,
41218 },
41219 {
41220 name: "Less64",
41221 argLen: 2,
41222 generic: true,
41223 },
41224 {
41225 name: "Less64U",
41226 argLen: 2,
41227 generic: true,
41228 },
41229 {
41230 name: "Less32F",
41231 argLen: 2,
41232 generic: true,
41233 },
41234 {
41235 name: "Less64F",
41236 argLen: 2,
41237 generic: true,
41238 },
41239 {
41240 name: "Leq8",
41241 argLen: 2,
41242 generic: true,
41243 },
41244 {
41245 name: "Leq8U",
41246 argLen: 2,
41247 generic: true,
41248 },
41249 {
41250 name: "Leq16",
41251 argLen: 2,
41252 generic: true,
41253 },
41254 {
41255 name: "Leq16U",
41256 argLen: 2,
41257 generic: true,
41258 },
41259 {
41260 name: "Leq32",
41261 argLen: 2,
41262 generic: true,
41263 },
41264 {
41265 name: "Leq32U",
41266 argLen: 2,
41267 generic: true,
41268 },
41269 {
41270 name: "Leq64",
41271 argLen: 2,
41272 generic: true,
41273 },
41274 {
41275 name: "Leq64U",
41276 argLen: 2,
41277 generic: true,
41278 },
41279 {
41280 name: "Leq32F",
41281 argLen: 2,
41282 generic: true,
41283 },
41284 {
41285 name: "Leq64F",
41286 argLen: 2,
41287 generic: true,
41288 },
41289 {
41290 name: "CondSelect",
41291 argLen: 3,
41292 generic: true,
41293 },
41294 {
41295 name: "AndB",
41296 argLen: 2,
41297 commutative: true,
41298 generic: true,
41299 },
41300 {
41301 name: "OrB",
41302 argLen: 2,
41303 commutative: true,
41304 generic: true,
41305 },
41306 {
41307 name: "EqB",
41308 argLen: 2,
41309 commutative: true,
41310 generic: true,
41311 },
41312 {
41313 name: "NeqB",
41314 argLen: 2,
41315 commutative: true,
41316 generic: true,
41317 },
41318 {
41319 name: "Not",
41320 argLen: 1,
41321 generic: true,
41322 },
41323 {
41324 name: "Neg8",
41325 argLen: 1,
41326 generic: true,
41327 },
41328 {
41329 name: "Neg16",
41330 argLen: 1,
41331 generic: true,
41332 },
41333 {
41334 name: "Neg32",
41335 argLen: 1,
41336 generic: true,
41337 },
41338 {
41339 name: "Neg64",
41340 argLen: 1,
41341 generic: true,
41342 },
41343 {
41344 name: "Neg32F",
41345 argLen: 1,
41346 generic: true,
41347 },
41348 {
41349 name: "Neg64F",
41350 argLen: 1,
41351 generic: true,
41352 },
41353 {
41354 name: "Com8",
41355 argLen: 1,
41356 generic: true,
41357 },
41358 {
41359 name: "Com16",
41360 argLen: 1,
41361 generic: true,
41362 },
41363 {
41364 name: "Com32",
41365 argLen: 1,
41366 generic: true,
41367 },
41368 {
41369 name: "Com64",
41370 argLen: 1,
41371 generic: true,
41372 },
41373 {
41374 name: "Ctz8",
41375 argLen: 1,
41376 generic: true,
41377 },
41378 {
41379 name: "Ctz16",
41380 argLen: 1,
41381 generic: true,
41382 },
41383 {
41384 name: "Ctz32",
41385 argLen: 1,
41386 generic: true,
41387 },
41388 {
41389 name: "Ctz64",
41390 argLen: 1,
41391 generic: true,
41392 },
41393 {
41394 name: "Ctz64On32",
41395 argLen: 2,
41396 generic: true,
41397 },
41398 {
41399 name: "Ctz8NonZero",
41400 argLen: 1,
41401 generic: true,
41402 },
41403 {
41404 name: "Ctz16NonZero",
41405 argLen: 1,
41406 generic: true,
41407 },
41408 {
41409 name: "Ctz32NonZero",
41410 argLen: 1,
41411 generic: true,
41412 },
41413 {
41414 name: "Ctz64NonZero",
41415 argLen: 1,
41416 generic: true,
41417 },
41418 {
41419 name: "BitLen8",
41420 argLen: 1,
41421 generic: true,
41422 },
41423 {
41424 name: "BitLen16",
41425 argLen: 1,
41426 generic: true,
41427 },
41428 {
41429 name: "BitLen32",
41430 argLen: 1,
41431 generic: true,
41432 },
41433 {
41434 name: "BitLen64",
41435 argLen: 1,
41436 generic: true,
41437 },
41438 {
41439 name: "Bswap16",
41440 argLen: 1,
41441 generic: true,
41442 },
41443 {
41444 name: "Bswap32",
41445 argLen: 1,
41446 generic: true,
41447 },
41448 {
41449 name: "Bswap64",
41450 argLen: 1,
41451 generic: true,
41452 },
41453 {
41454 name: "BitRev8",
41455 argLen: 1,
41456 generic: true,
41457 },
41458 {
41459 name: "BitRev16",
41460 argLen: 1,
41461 generic: true,
41462 },
41463 {
41464 name: "BitRev32",
41465 argLen: 1,
41466 generic: true,
41467 },
41468 {
41469 name: "BitRev64",
41470 argLen: 1,
41471 generic: true,
41472 },
41473 {
41474 name: "PopCount8",
41475 argLen: 1,
41476 generic: true,
41477 },
41478 {
41479 name: "PopCount16",
41480 argLen: 1,
41481 generic: true,
41482 },
41483 {
41484 name: "PopCount32",
41485 argLen: 1,
41486 generic: true,
41487 },
41488 {
41489 name: "PopCount64",
41490 argLen: 1,
41491 generic: true,
41492 },
41493 {
41494 name: "RotateLeft64",
41495 argLen: 2,
41496 generic: true,
41497 },
41498 {
41499 name: "RotateLeft32",
41500 argLen: 2,
41501 generic: true,
41502 },
41503 {
41504 name: "RotateLeft16",
41505 argLen: 2,
41506 generic: true,
41507 },
41508 {
41509 name: "RotateLeft8",
41510 argLen: 2,
41511 generic: true,
41512 },
41513 {
41514 name: "Sqrt",
41515 argLen: 1,
41516 generic: true,
41517 },
41518 {
41519 name: "Sqrt32",
41520 argLen: 1,
41521 generic: true,
41522 },
41523 {
41524 name: "Floor",
41525 argLen: 1,
41526 generic: true,
41527 },
41528 {
41529 name: "Ceil",
41530 argLen: 1,
41531 generic: true,
41532 },
41533 {
41534 name: "Trunc",
41535 argLen: 1,
41536 generic: true,
41537 },
41538 {
41539 name: "Round",
41540 argLen: 1,
41541 generic: true,
41542 },
41543 {
41544 name: "RoundToEven",
41545 argLen: 1,
41546 generic: true,
41547 },
41548 {
41549 name: "Abs",
41550 argLen: 1,
41551 generic: true,
41552 },
41553 {
41554 name: "Copysign",
41555 argLen: 2,
41556 generic: true,
41557 },
41558 {
41559 name: "Min64",
41560 argLen: 2,
41561 generic: true,
41562 },
41563 {
41564 name: "Max64",
41565 argLen: 2,
41566 generic: true,
41567 },
41568 {
41569 name: "Min64u",
41570 argLen: 2,
41571 generic: true,
41572 },
41573 {
41574 name: "Max64u",
41575 argLen: 2,
41576 generic: true,
41577 },
41578 {
41579 name: "Min64F",
41580 argLen: 2,
41581 generic: true,
41582 },
41583 {
41584 name: "Min32F",
41585 argLen: 2,
41586 generic: true,
41587 },
41588 {
41589 name: "Max64F",
41590 argLen: 2,
41591 generic: true,
41592 },
41593 {
41594 name: "Max32F",
41595 argLen: 2,
41596 generic: true,
41597 },
41598 {
41599 name: "FMA",
41600 argLen: 3,
41601 generic: true,
41602 },
41603 {
41604 name: "Phi",
41605 argLen: -1,
41606 zeroWidth: true,
41607 generic: true,
41608 },
41609 {
41610 name: "Copy",
41611 argLen: 1,
41612 generic: true,
41613 },
41614 {
41615 name: "Convert",
41616 argLen: 2,
41617 resultInArg0: true,
41618 zeroWidth: true,
41619 generic: true,
41620 },
41621 {
41622 name: "ConstBool",
41623 auxType: auxBool,
41624 argLen: 0,
41625 generic: true,
41626 },
41627 {
41628 name: "ConstString",
41629 auxType: auxString,
41630 argLen: 0,
41631 generic: true,
41632 },
41633 {
41634 name: "ConstNil",
41635 argLen: 0,
41636 generic: true,
41637 },
41638 {
41639 name: "Const8",
41640 auxType: auxInt8,
41641 argLen: 0,
41642 generic: true,
41643 },
41644 {
41645 name: "Const16",
41646 auxType: auxInt16,
41647 argLen: 0,
41648 generic: true,
41649 },
41650 {
41651 name: "Const32",
41652 auxType: auxInt32,
41653 argLen: 0,
41654 generic: true,
41655 },
41656 {
41657 name: "Const64",
41658 auxType: auxInt64,
41659 argLen: 0,
41660 generic: true,
41661 },
41662 {
41663 name: "Const32F",
41664 auxType: auxFloat32,
41665 argLen: 0,
41666 generic: true,
41667 },
41668 {
41669 name: "Const64F",
41670 auxType: auxFloat64,
41671 argLen: 0,
41672 generic: true,
41673 },
41674 {
41675 name: "ConstInterface",
41676 argLen: 0,
41677 generic: true,
41678 },
41679 {
41680 name: "ConstSlice",
41681 argLen: 0,
41682 generic: true,
41683 },
41684 {
41685 name: "InitMem",
41686 argLen: 0,
41687 zeroWidth: true,
41688 generic: true,
41689 },
41690 {
41691 name: "Arg",
41692 auxType: auxSymOff,
41693 argLen: 0,
41694 zeroWidth: true,
41695 symEffect: SymRead,
41696 generic: true,
41697 },
41698 {
41699 name: "ArgIntReg",
41700 auxType: auxNameOffsetInt8,
41701 argLen: 0,
41702 zeroWidth: true,
41703 generic: true,
41704 },
41705 {
41706 name: "ArgFloatReg",
41707 auxType: auxNameOffsetInt8,
41708 argLen: 0,
41709 zeroWidth: true,
41710 generic: true,
41711 },
41712 {
41713 name: "Addr",
41714 auxType: auxSym,
41715 argLen: 1,
41716 symEffect: SymAddr,
41717 generic: true,
41718 },
41719 {
41720 name: "LocalAddr",
41721 auxType: auxSym,
41722 argLen: 2,
41723 symEffect: SymAddr,
41724 generic: true,
41725 },
41726 {
41727 name: "SP",
41728 argLen: 0,
41729 zeroWidth: true,
41730 fixedReg: true,
41731 generic: true,
41732 },
41733 {
41734 name: "SB",
41735 argLen: 0,
41736 zeroWidth: true,
41737 fixedReg: true,
41738 generic: true,
41739 },
41740 {
41741 name: "SPanchored",
41742 argLen: 2,
41743 zeroWidth: true,
41744 generic: true,
41745 },
41746 {
41747 name: "Load",
41748 argLen: 2,
41749 generic: true,
41750 },
41751 {
41752 name: "Dereference",
41753 argLen: 2,
41754 generic: true,
41755 },
41756 {
41757 name: "Store",
41758 auxType: auxTyp,
41759 argLen: 3,
41760 generic: true,
41761 },
41762 {
41763 name: "Move",
41764 auxType: auxTypSize,
41765 argLen: 3,
41766 generic: true,
41767 },
41768 {
41769 name: "Zero",
41770 auxType: auxTypSize,
41771 argLen: 2,
41772 generic: true,
41773 },
41774 {
41775 name: "StoreWB",
41776 auxType: auxTyp,
41777 argLen: 3,
41778 generic: true,
41779 },
41780 {
41781 name: "MoveWB",
41782 auxType: auxTypSize,
41783 argLen: 3,
41784 generic: true,
41785 },
41786 {
41787 name: "ZeroWB",
41788 auxType: auxTypSize,
41789 argLen: 2,
41790 generic: true,
41791 },
41792 {
41793 name: "WBend",
41794 argLen: 1,
41795 generic: true,
41796 },
41797 {
41798 name: "WB",
41799 auxType: auxInt64,
41800 argLen: 1,
41801 generic: true,
41802 },
41803 {
41804 name: "HasCPUFeature",
41805 auxType: auxSym,
41806 argLen: 0,
41807 symEffect: SymNone,
41808 generic: true,
41809 },
41810 {
41811 name: "PanicBounds",
41812 auxType: auxInt64,
41813 argLen: 3,
41814 call: true,
41815 generic: true,
41816 },
41817 {
41818 name: "PanicExtend",
41819 auxType: auxInt64,
41820 argLen: 4,
41821 call: true,
41822 generic: true,
41823 },
41824 {
41825 name: "ClosureCall",
41826 auxType: auxCallOff,
41827 argLen: -1,
41828 call: true,
41829 generic: true,
41830 },
41831 {
41832 name: "StaticCall",
41833 auxType: auxCallOff,
41834 argLen: -1,
41835 call: true,
41836 generic: true,
41837 },
41838 {
41839 name: "InterCall",
41840 auxType: auxCallOff,
41841 argLen: -1,
41842 call: true,
41843 generic: true,
41844 },
41845 {
41846 name: "TailCall",
41847 auxType: auxCallOff,
41848 argLen: -1,
41849 call: true,
41850 generic: true,
41851 },
41852 {
41853 name: "ClosureLECall",
41854 auxType: auxCallOff,
41855 argLen: -1,
41856 call: true,
41857 generic: true,
41858 },
41859 {
41860 name: "StaticLECall",
41861 auxType: auxCallOff,
41862 argLen: -1,
41863 call: true,
41864 generic: true,
41865 },
41866 {
41867 name: "InterLECall",
41868 auxType: auxCallOff,
41869 argLen: -1,
41870 call: true,
41871 generic: true,
41872 },
41873 {
41874 name: "TailLECall",
41875 auxType: auxCallOff,
41876 argLen: -1,
41877 call: true,
41878 generic: true,
41879 },
41880 {
41881 name: "SignExt8to16",
41882 argLen: 1,
41883 generic: true,
41884 },
41885 {
41886 name: "SignExt8to32",
41887 argLen: 1,
41888 generic: true,
41889 },
41890 {
41891 name: "SignExt8to64",
41892 argLen: 1,
41893 generic: true,
41894 },
41895 {
41896 name: "SignExt16to32",
41897 argLen: 1,
41898 generic: true,
41899 },
41900 {
41901 name: "SignExt16to64",
41902 argLen: 1,
41903 generic: true,
41904 },
41905 {
41906 name: "SignExt32to64",
41907 argLen: 1,
41908 generic: true,
41909 },
41910 {
41911 name: "ZeroExt8to16",
41912 argLen: 1,
41913 generic: true,
41914 },
41915 {
41916 name: "ZeroExt8to32",
41917 argLen: 1,
41918 generic: true,
41919 },
41920 {
41921 name: "ZeroExt8to64",
41922 argLen: 1,
41923 generic: true,
41924 },
41925 {
41926 name: "ZeroExt16to32",
41927 argLen: 1,
41928 generic: true,
41929 },
41930 {
41931 name: "ZeroExt16to64",
41932 argLen: 1,
41933 generic: true,
41934 },
41935 {
41936 name: "ZeroExt32to64",
41937 argLen: 1,
41938 generic: true,
41939 },
41940 {
41941 name: "Trunc16to8",
41942 argLen: 1,
41943 generic: true,
41944 },
41945 {
41946 name: "Trunc32to8",
41947 argLen: 1,
41948 generic: true,
41949 },
41950 {
41951 name: "Trunc32to16",
41952 argLen: 1,
41953 generic: true,
41954 },
41955 {
41956 name: "Trunc64to8",
41957 argLen: 1,
41958 generic: true,
41959 },
41960 {
41961 name: "Trunc64to16",
41962 argLen: 1,
41963 generic: true,
41964 },
41965 {
41966 name: "Trunc64to32",
41967 argLen: 1,
41968 generic: true,
41969 },
41970 {
41971 name: "Cvt32to32F",
41972 argLen: 1,
41973 generic: true,
41974 },
41975 {
41976 name: "Cvt32to64F",
41977 argLen: 1,
41978 generic: true,
41979 },
41980 {
41981 name: "Cvt64to32F",
41982 argLen: 1,
41983 generic: true,
41984 },
41985 {
41986 name: "Cvt64to64F",
41987 argLen: 1,
41988 generic: true,
41989 },
41990 {
41991 name: "Cvt32Fto32",
41992 argLen: 1,
41993 generic: true,
41994 },
41995 {
41996 name: "Cvt32Fto64",
41997 argLen: 1,
41998 generic: true,
41999 },
42000 {
42001 name: "Cvt64Fto32",
42002 argLen: 1,
42003 generic: true,
42004 },
42005 {
42006 name: "Cvt64Fto64",
42007 argLen: 1,
42008 generic: true,
42009 },
42010 {
42011 name: "Cvt32Fto64F",
42012 argLen: 1,
42013 generic: true,
42014 },
42015 {
42016 name: "Cvt64Fto32F",
42017 argLen: 1,
42018 generic: true,
42019 },
42020 {
42021 name: "CvtBoolToUint8",
42022 argLen: 1,
42023 generic: true,
42024 },
42025 {
42026 name: "Round32F",
42027 argLen: 1,
42028 generic: true,
42029 },
42030 {
42031 name: "Round64F",
42032 argLen: 1,
42033 generic: true,
42034 },
42035 {
42036 name: "IsNonNil",
42037 argLen: 1,
42038 generic: true,
42039 },
42040 {
42041 name: "IsInBounds",
42042 argLen: 2,
42043 generic: true,
42044 },
42045 {
42046 name: "IsSliceInBounds",
42047 argLen: 2,
42048 generic: true,
42049 },
42050 {
42051 name: "NilCheck",
42052 argLen: 2,
42053 nilCheck: true,
42054 generic: true,
42055 },
42056 {
42057 name: "GetG",
42058 argLen: 1,
42059 zeroWidth: true,
42060 generic: true,
42061 },
42062 {
42063 name: "GetClosurePtr",
42064 argLen: 0,
42065 generic: true,
42066 },
42067 {
42068 name: "GetCallerPC",
42069 argLen: 0,
42070 generic: true,
42071 },
42072 {
42073 name: "GetCallerSP",
42074 argLen: 1,
42075 generic: true,
42076 },
42077 {
42078 name: "PtrIndex",
42079 argLen: 2,
42080 generic: true,
42081 },
42082 {
42083 name: "OffPtr",
42084 auxType: auxInt64,
42085 argLen: 1,
42086 generic: true,
42087 },
42088 {
42089 name: "SliceMake",
42090 argLen: 3,
42091 generic: true,
42092 },
42093 {
42094 name: "SlicePtr",
42095 argLen: 1,
42096 generic: true,
42097 },
42098 {
42099 name: "SliceLen",
42100 argLen: 1,
42101 generic: true,
42102 },
42103 {
42104 name: "SliceCap",
42105 argLen: 1,
42106 generic: true,
42107 },
42108 {
42109 name: "SlicePtrUnchecked",
42110 argLen: 1,
42111 generic: true,
42112 },
42113 {
42114 name: "ComplexMake",
42115 argLen: 2,
42116 generic: true,
42117 },
42118 {
42119 name: "ComplexReal",
42120 argLen: 1,
42121 generic: true,
42122 },
42123 {
42124 name: "ComplexImag",
42125 argLen: 1,
42126 generic: true,
42127 },
42128 {
42129 name: "StringMake",
42130 argLen: 2,
42131 generic: true,
42132 },
42133 {
42134 name: "StringPtr",
42135 argLen: 1,
42136 generic: true,
42137 },
42138 {
42139 name: "StringLen",
42140 argLen: 1,
42141 generic: true,
42142 },
42143 {
42144 name: "IMake",
42145 argLen: 2,
42146 generic: true,
42147 },
42148 {
42149 name: "ITab",
42150 argLen: 1,
42151 generic: true,
42152 },
42153 {
42154 name: "IData",
42155 argLen: 1,
42156 generic: true,
42157 },
42158 {
42159 name: "StructMake",
42160 argLen: -1,
42161 generic: true,
42162 },
42163 {
42164 name: "StructSelect",
42165 auxType: auxInt64,
42166 argLen: 1,
42167 generic: true,
42168 },
42169 {
42170 name: "ArrayMake0",
42171 argLen: 0,
42172 generic: true,
42173 },
42174 {
42175 name: "ArrayMake1",
42176 argLen: 1,
42177 generic: true,
42178 },
42179 {
42180 name: "ArraySelect",
42181 auxType: auxInt64,
42182 argLen: 1,
42183 generic: true,
42184 },
42185 {
42186 name: "StoreReg",
42187 argLen: 1,
42188 generic: true,
42189 },
42190 {
42191 name: "LoadReg",
42192 argLen: 1,
42193 generic: true,
42194 },
42195 {
42196 name: "FwdRef",
42197 auxType: auxSym,
42198 argLen: 0,
42199 symEffect: SymNone,
42200 generic: true,
42201 },
42202 {
42203 name: "Unknown",
42204 argLen: 0,
42205 generic: true,
42206 },
42207 {
42208 name: "VarDef",
42209 auxType: auxSym,
42210 argLen: 1,
42211 zeroWidth: true,
42212 symEffect: SymNone,
42213 generic: true,
42214 },
42215 {
42216 name: "VarLive",
42217 auxType: auxSym,
42218 argLen: 1,
42219 zeroWidth: true,
42220 symEffect: SymRead,
42221 generic: true,
42222 },
42223 {
42224 name: "KeepAlive",
42225 argLen: 2,
42226 zeroWidth: true,
42227 generic: true,
42228 },
42229 {
42230 name: "InlMark",
42231 auxType: auxInt32,
42232 argLen: 1,
42233 generic: true,
42234 },
42235 {
42236 name: "Int64Make",
42237 argLen: 2,
42238 generic: true,
42239 },
42240 {
42241 name: "Int64Hi",
42242 argLen: 1,
42243 generic: true,
42244 },
42245 {
42246 name: "Int64Lo",
42247 argLen: 1,
42248 generic: true,
42249 },
42250 {
42251 name: "Add32carry",
42252 argLen: 2,
42253 commutative: true,
42254 generic: true,
42255 },
42256 {
42257 name: "Add32withcarry",
42258 argLen: 3,
42259 commutative: true,
42260 generic: true,
42261 },
42262 {
42263 name: "Sub32carry",
42264 argLen: 2,
42265 generic: true,
42266 },
42267 {
42268 name: "Sub32withcarry",
42269 argLen: 3,
42270 generic: true,
42271 },
42272 {
42273 name: "Add64carry",
42274 argLen: 3,
42275 commutative: true,
42276 generic: true,
42277 },
42278 {
42279 name: "Sub64borrow",
42280 argLen: 3,
42281 generic: true,
42282 },
42283 {
42284 name: "Signmask",
42285 argLen: 1,
42286 generic: true,
42287 },
42288 {
42289 name: "Zeromask",
42290 argLen: 1,
42291 generic: true,
42292 },
42293 {
42294 name: "Slicemask",
42295 argLen: 1,
42296 generic: true,
42297 },
42298 {
42299 name: "SpectreIndex",
42300 argLen: 2,
42301 generic: true,
42302 },
42303 {
42304 name: "SpectreSliceIndex",
42305 argLen: 2,
42306 generic: true,
42307 },
42308 {
42309 name: "Cvt32Uto32F",
42310 argLen: 1,
42311 generic: true,
42312 },
42313 {
42314 name: "Cvt32Uto64F",
42315 argLen: 1,
42316 generic: true,
42317 },
42318 {
42319 name: "Cvt32Fto32U",
42320 argLen: 1,
42321 generic: true,
42322 },
42323 {
42324 name: "Cvt64Fto32U",
42325 argLen: 1,
42326 generic: true,
42327 },
42328 {
42329 name: "Cvt64Uto32F",
42330 argLen: 1,
42331 generic: true,
42332 },
42333 {
42334 name: "Cvt64Uto64F",
42335 argLen: 1,
42336 generic: true,
42337 },
42338 {
42339 name: "Cvt32Fto64U",
42340 argLen: 1,
42341 generic: true,
42342 },
42343 {
42344 name: "Cvt64Fto64U",
42345 argLen: 1,
42346 generic: true,
42347 },
42348 {
42349 name: "Select0",
42350 argLen: 1,
42351 zeroWidth: true,
42352 generic: true,
42353 },
42354 {
42355 name: "Select1",
42356 argLen: 1,
42357 zeroWidth: true,
42358 generic: true,
42359 },
42360 {
42361 name: "MakeTuple",
42362 argLen: 2,
42363 generic: true,
42364 },
42365 {
42366 name: "SelectN",
42367 auxType: auxInt64,
42368 argLen: 1,
42369 generic: true,
42370 },
42371 {
42372 name: "SelectNAddr",
42373 auxType: auxInt64,
42374 argLen: 1,
42375 generic: true,
42376 },
42377 {
42378 name: "MakeResult",
42379 argLen: -1,
42380 generic: true,
42381 },
42382 {
42383 name: "AtomicLoad8",
42384 argLen: 2,
42385 generic: true,
42386 },
42387 {
42388 name: "AtomicLoad32",
42389 argLen: 2,
42390 generic: true,
42391 },
42392 {
42393 name: "AtomicLoad64",
42394 argLen: 2,
42395 generic: true,
42396 },
42397 {
42398 name: "AtomicLoadPtr",
42399 argLen: 2,
42400 generic: true,
42401 },
42402 {
42403 name: "AtomicLoadAcq32",
42404 argLen: 2,
42405 generic: true,
42406 },
42407 {
42408 name: "AtomicLoadAcq64",
42409 argLen: 2,
42410 generic: true,
42411 },
42412 {
42413 name: "AtomicStore8",
42414 argLen: 3,
42415 hasSideEffects: true,
42416 generic: true,
42417 },
42418 {
42419 name: "AtomicStore32",
42420 argLen: 3,
42421 hasSideEffects: true,
42422 generic: true,
42423 },
42424 {
42425 name: "AtomicStore64",
42426 argLen: 3,
42427 hasSideEffects: true,
42428 generic: true,
42429 },
42430 {
42431 name: "AtomicStorePtrNoWB",
42432 argLen: 3,
42433 hasSideEffects: true,
42434 generic: true,
42435 },
42436 {
42437 name: "AtomicStoreRel32",
42438 argLen: 3,
42439 hasSideEffects: true,
42440 generic: true,
42441 },
42442 {
42443 name: "AtomicStoreRel64",
42444 argLen: 3,
42445 hasSideEffects: true,
42446 generic: true,
42447 },
42448 {
42449 name: "AtomicExchange8",
42450 argLen: 3,
42451 hasSideEffects: true,
42452 generic: true,
42453 },
42454 {
42455 name: "AtomicExchange32",
42456 argLen: 3,
42457 hasSideEffects: true,
42458 generic: true,
42459 },
42460 {
42461 name: "AtomicExchange64",
42462 argLen: 3,
42463 hasSideEffects: true,
42464 generic: true,
42465 },
42466 {
42467 name: "AtomicAdd32",
42468 argLen: 3,
42469 hasSideEffects: true,
42470 generic: true,
42471 },
42472 {
42473 name: "AtomicAdd64",
42474 argLen: 3,
42475 hasSideEffects: true,
42476 generic: true,
42477 },
42478 {
42479 name: "AtomicCompareAndSwap32",
42480 argLen: 4,
42481 hasSideEffects: true,
42482 generic: true,
42483 },
42484 {
42485 name: "AtomicCompareAndSwap64",
42486 argLen: 4,
42487 hasSideEffects: true,
42488 generic: true,
42489 },
42490 {
42491 name: "AtomicCompareAndSwapRel32",
42492 argLen: 4,
42493 hasSideEffects: true,
42494 generic: true,
42495 },
42496 {
42497 name: "AtomicAnd8",
42498 argLen: 3,
42499 hasSideEffects: true,
42500 generic: true,
42501 },
42502 {
42503 name: "AtomicOr8",
42504 argLen: 3,
42505 hasSideEffects: true,
42506 generic: true,
42507 },
42508 {
42509 name: "AtomicAnd32",
42510 argLen: 3,
42511 hasSideEffects: true,
42512 generic: true,
42513 },
42514 {
42515 name: "AtomicOr32",
42516 argLen: 3,
42517 hasSideEffects: true,
42518 generic: true,
42519 },
42520 {
42521 name: "AtomicAnd64value",
42522 argLen: 3,
42523 hasSideEffects: true,
42524 generic: true,
42525 },
42526 {
42527 name: "AtomicAnd32value",
42528 argLen: 3,
42529 hasSideEffects: true,
42530 generic: true,
42531 },
42532 {
42533 name: "AtomicAnd8value",
42534 argLen: 3,
42535 hasSideEffects: true,
42536 generic: true,
42537 },
42538 {
42539 name: "AtomicOr64value",
42540 argLen: 3,
42541 hasSideEffects: true,
42542 generic: true,
42543 },
42544 {
42545 name: "AtomicOr32value",
42546 argLen: 3,
42547 hasSideEffects: true,
42548 generic: true,
42549 },
42550 {
42551 name: "AtomicOr8value",
42552 argLen: 3,
42553 hasSideEffects: true,
42554 generic: true,
42555 },
42556 {
42557 name: "AtomicStore8Variant",
42558 argLen: 3,
42559 hasSideEffects: true,
42560 generic: true,
42561 },
42562 {
42563 name: "AtomicStore32Variant",
42564 argLen: 3,
42565 hasSideEffects: true,
42566 generic: true,
42567 },
42568 {
42569 name: "AtomicStore64Variant",
42570 argLen: 3,
42571 hasSideEffects: true,
42572 generic: true,
42573 },
42574 {
42575 name: "AtomicAdd32Variant",
42576 argLen: 3,
42577 hasSideEffects: true,
42578 generic: true,
42579 },
42580 {
42581 name: "AtomicAdd64Variant",
42582 argLen: 3,
42583 hasSideEffects: true,
42584 generic: true,
42585 },
42586 {
42587 name: "AtomicExchange8Variant",
42588 argLen: 3,
42589 hasSideEffects: true,
42590 generic: true,
42591 },
42592 {
42593 name: "AtomicExchange32Variant",
42594 argLen: 3,
42595 hasSideEffects: true,
42596 generic: true,
42597 },
42598 {
42599 name: "AtomicExchange64Variant",
42600 argLen: 3,
42601 hasSideEffects: true,
42602 generic: true,
42603 },
42604 {
42605 name: "AtomicCompareAndSwap32Variant",
42606 argLen: 4,
42607 hasSideEffects: true,
42608 generic: true,
42609 },
42610 {
42611 name: "AtomicCompareAndSwap64Variant",
42612 argLen: 4,
42613 hasSideEffects: true,
42614 generic: true,
42615 },
42616 {
42617 name: "AtomicAnd64valueVariant",
42618 argLen: 3,
42619 hasSideEffects: true,
42620 generic: true,
42621 },
42622 {
42623 name: "AtomicOr64valueVariant",
42624 argLen: 3,
42625 hasSideEffects: true,
42626 generic: true,
42627 },
42628 {
42629 name: "AtomicAnd32valueVariant",
42630 argLen: 3,
42631 hasSideEffects: true,
42632 generic: true,
42633 },
42634 {
42635 name: "AtomicOr32valueVariant",
42636 argLen: 3,
42637 hasSideEffects: true,
42638 generic: true,
42639 },
42640 {
42641 name: "AtomicAnd8valueVariant",
42642 argLen: 3,
42643 hasSideEffects: true,
42644 generic: true,
42645 },
42646 {
42647 name: "AtomicOr8valueVariant",
42648 argLen: 3,
42649 hasSideEffects: true,
42650 generic: true,
42651 },
42652 {
42653 name: "PubBarrier",
42654 argLen: 1,
42655 hasSideEffects: true,
42656 generic: true,
42657 },
42658 {
42659 name: "Clobber",
42660 auxType: auxSymOff,
42661 argLen: 0,
42662 symEffect: SymNone,
42663 generic: true,
42664 },
42665 {
42666 name: "ClobberReg",
42667 argLen: 0,
42668 generic: true,
42669 },
42670 {
42671 name: "PrefetchCache",
42672 argLen: 2,
42673 hasSideEffects: true,
42674 generic: true,
42675 },
42676 {
42677 name: "PrefetchCacheStreamed",
42678 argLen: 2,
42679 hasSideEffects: true,
42680 generic: true,
42681 },
42682 }
42683
42684 func (o Op) Asm() obj.As { return opcodeTable[o].asm }
42685 func (o Op) Scale() int16 { return int16(opcodeTable[o].scale) }
42686 func (o Op) String() string { return opcodeTable[o].name }
42687 func (o Op) SymEffect() SymEffect { return opcodeTable[o].symEffect }
42688 func (o Op) IsCall() bool { return opcodeTable[o].call }
42689 func (o Op) IsTailCall() bool { return opcodeTable[o].tailCall }
42690 func (o Op) HasSideEffects() bool { return opcodeTable[o].hasSideEffects }
42691 func (o Op) UnsafePoint() bool { return opcodeTable[o].unsafePoint }
42692 func (o Op) ResultInArg0() bool { return opcodeTable[o].resultInArg0 }
42693
42694 var registers386 = [...]Register{
42695 {0, x86.REG_AX, "AX"},
42696 {1, x86.REG_CX, "CX"},
42697 {2, x86.REG_DX, "DX"},
42698 {3, x86.REG_BX, "BX"},
42699 {4, x86.REGSP, "SP"},
42700 {5, x86.REG_BP, "BP"},
42701 {6, x86.REG_SI, "SI"},
42702 {7, x86.REG_DI, "DI"},
42703 {8, x86.REG_X0, "X0"},
42704 {9, x86.REG_X1, "X1"},
42705 {10, x86.REG_X2, "X2"},
42706 {11, x86.REG_X3, "X3"},
42707 {12, x86.REG_X4, "X4"},
42708 {13, x86.REG_X5, "X5"},
42709 {14, x86.REG_X6, "X6"},
42710 {15, x86.REG_X7, "X7"},
42711 {16, 0, "SB"},
42712 }
42713 var paramIntReg386 = []int8(nil)
42714 var paramFloatReg386 = []int8(nil)
42715 var gpRegMask386 = regMask(239)
42716 var fpRegMask386 = regMask(65280)
42717 var specialRegMask386 = regMask(0)
42718 var framepointerReg386 = int8(5)
42719 var linkReg386 = int8(-1)
42720 var registersAMD64 = [...]Register{
42721 {0, x86.REG_AX, "AX"},
42722 {1, x86.REG_CX, "CX"},
42723 {2, x86.REG_DX, "DX"},
42724 {3, x86.REG_BX, "BX"},
42725 {4, x86.REGSP, "SP"},
42726 {5, x86.REG_BP, "BP"},
42727 {6, x86.REG_SI, "SI"},
42728 {7, x86.REG_DI, "DI"},
42729 {8, x86.REG_R8, "R8"},
42730 {9, x86.REG_R9, "R9"},
42731 {10, x86.REG_R10, "R10"},
42732 {11, x86.REG_R11, "R11"},
42733 {12, x86.REG_R12, "R12"},
42734 {13, x86.REG_R13, "R13"},
42735 {14, x86.REGG, "g"},
42736 {15, x86.REG_R15, "R15"},
42737 {16, x86.REG_X0, "X0"},
42738 {17, x86.REG_X1, "X1"},
42739 {18, x86.REG_X2, "X2"},
42740 {19, x86.REG_X3, "X3"},
42741 {20, x86.REG_X4, "X4"},
42742 {21, x86.REG_X5, "X5"},
42743 {22, x86.REG_X6, "X6"},
42744 {23, x86.REG_X7, "X7"},
42745 {24, x86.REG_X8, "X8"},
42746 {25, x86.REG_X9, "X9"},
42747 {26, x86.REG_X10, "X10"},
42748 {27, x86.REG_X11, "X11"},
42749 {28, x86.REG_X12, "X12"},
42750 {29, x86.REG_X13, "X13"},
42751 {30, x86.REG_X14, "X14"},
42752 {31, x86.REG_X15, "X15"},
42753 {32, 0, "SB"},
42754 }
42755 var paramIntRegAMD64 = []int8{0, 3, 1, 7, 6, 8, 9, 10, 11}
42756 var paramFloatRegAMD64 = []int8{16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30}
42757 var gpRegMaskAMD64 = regMask(49135)
42758 var fpRegMaskAMD64 = regMask(2147418112)
42759 var specialRegMaskAMD64 = regMask(2147483648)
42760 var framepointerRegAMD64 = int8(5)
42761 var linkRegAMD64 = int8(-1)
42762 var registersARM = [...]Register{
42763 {0, arm.REG_R0, "R0"},
42764 {1, arm.REG_R1, "R1"},
42765 {2, arm.REG_R2, "R2"},
42766 {3, arm.REG_R3, "R3"},
42767 {4, arm.REG_R4, "R4"},
42768 {5, arm.REG_R5, "R5"},
42769 {6, arm.REG_R6, "R6"},
42770 {7, arm.REG_R7, "R7"},
42771 {8, arm.REG_R8, "R8"},
42772 {9, arm.REG_R9, "R9"},
42773 {10, arm.REGG, "g"},
42774 {11, arm.REG_R11, "R11"},
42775 {12, arm.REG_R12, "R12"},
42776 {13, arm.REGSP, "SP"},
42777 {14, arm.REG_R14, "R14"},
42778 {15, arm.REG_R15, "R15"},
42779 {16, arm.REG_F0, "F0"},
42780 {17, arm.REG_F1, "F1"},
42781 {18, arm.REG_F2, "F2"},
42782 {19, arm.REG_F3, "F3"},
42783 {20, arm.REG_F4, "F4"},
42784 {21, arm.REG_F5, "F5"},
42785 {22, arm.REG_F6, "F6"},
42786 {23, arm.REG_F7, "F7"},
42787 {24, arm.REG_F8, "F8"},
42788 {25, arm.REG_F9, "F9"},
42789 {26, arm.REG_F10, "F10"},
42790 {27, arm.REG_F11, "F11"},
42791 {28, arm.REG_F12, "F12"},
42792 {29, arm.REG_F13, "F13"},
42793 {30, arm.REG_F14, "F14"},
42794 {31, arm.REG_F15, "F15"},
42795 {32, 0, "SB"},
42796 }
42797 var paramIntRegARM = []int8(nil)
42798 var paramFloatRegARM = []int8(nil)
42799 var gpRegMaskARM = regMask(21503)
42800 var fpRegMaskARM = regMask(4294901760)
42801 var specialRegMaskARM = regMask(0)
42802 var framepointerRegARM = int8(-1)
42803 var linkRegARM = int8(14)
42804 var registersARM64 = [...]Register{
42805 {0, arm64.REG_R0, "R0"},
42806 {1, arm64.REG_R1, "R1"},
42807 {2, arm64.REG_R2, "R2"},
42808 {3, arm64.REG_R3, "R3"},
42809 {4, arm64.REG_R4, "R4"},
42810 {5, arm64.REG_R5, "R5"},
42811 {6, arm64.REG_R6, "R6"},
42812 {7, arm64.REG_R7, "R7"},
42813 {8, arm64.REG_R8, "R8"},
42814 {9, arm64.REG_R9, "R9"},
42815 {10, arm64.REG_R10, "R10"},
42816 {11, arm64.REG_R11, "R11"},
42817 {12, arm64.REG_R12, "R12"},
42818 {13, arm64.REG_R13, "R13"},
42819 {14, arm64.REG_R14, "R14"},
42820 {15, arm64.REG_R15, "R15"},
42821 {16, arm64.REG_R16, "R16"},
42822 {17, arm64.REG_R17, "R17"},
42823 {18, arm64.REG_R19, "R19"},
42824 {19, arm64.REG_R20, "R20"},
42825 {20, arm64.REG_R21, "R21"},
42826 {21, arm64.REG_R22, "R22"},
42827 {22, arm64.REG_R23, "R23"},
42828 {23, arm64.REG_R24, "R24"},
42829 {24, arm64.REG_R25, "R25"},
42830 {25, arm64.REG_R26, "R26"},
42831 {26, arm64.REGG, "g"},
42832 {27, arm64.REG_R29, "R29"},
42833 {28, arm64.REG_R30, "R30"},
42834 {29, arm64.REGZERO, "ZERO"},
42835 {30, arm64.REGSP, "SP"},
42836 {31, arm64.REG_F0, "F0"},
42837 {32, arm64.REG_F1, "F1"},
42838 {33, arm64.REG_F2, "F2"},
42839 {34, arm64.REG_F3, "F3"},
42840 {35, arm64.REG_F4, "F4"},
42841 {36, arm64.REG_F5, "F5"},
42842 {37, arm64.REG_F6, "F6"},
42843 {38, arm64.REG_F7, "F7"},
42844 {39, arm64.REG_F8, "F8"},
42845 {40, arm64.REG_F9, "F9"},
42846 {41, arm64.REG_F10, "F10"},
42847 {42, arm64.REG_F11, "F11"},
42848 {43, arm64.REG_F12, "F12"},
42849 {44, arm64.REG_F13, "F13"},
42850 {45, arm64.REG_F14, "F14"},
42851 {46, arm64.REG_F15, "F15"},
42852 {47, arm64.REG_F16, "F16"},
42853 {48, arm64.REG_F17, "F17"},
42854 {49, arm64.REG_F18, "F18"},
42855 {50, arm64.REG_F19, "F19"},
42856 {51, arm64.REG_F20, "F20"},
42857 {52, arm64.REG_F21, "F21"},
42858 {53, arm64.REG_F22, "F22"},
42859 {54, arm64.REG_F23, "F23"},
42860 {55, arm64.REG_F24, "F24"},
42861 {56, arm64.REG_F25, "F25"},
42862 {57, arm64.REG_F26, "F26"},
42863 {58, arm64.REG_F27, "F27"},
42864 {59, arm64.REG_F28, "F28"},
42865 {60, arm64.REG_F29, "F29"},
42866 {61, arm64.REG_F30, "F30"},
42867 {62, arm64.REG_F31, "F31"},
42868 {63, 0, "SB"},
42869 }
42870 var paramIntRegARM64 = []int8{0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15}
42871 var paramFloatRegARM64 = []int8{31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46}
42872 var gpRegMaskARM64 = regMask(335544319)
42873 var fpRegMaskARM64 = regMask(9223372034707292160)
42874 var specialRegMaskARM64 = regMask(0)
42875 var framepointerRegARM64 = int8(-1)
42876 var linkRegARM64 = int8(28)
42877 var registersLOONG64 = [...]Register{
42878 {0, loong64.REG_R0, "R0"},
42879 {1, loong64.REG_R1, "R1"},
42880 {2, loong64.REGSP, "SP"},
42881 {3, loong64.REG_R4, "R4"},
42882 {4, loong64.REG_R5, "R5"},
42883 {5, loong64.REG_R6, "R6"},
42884 {6, loong64.REG_R7, "R7"},
42885 {7, loong64.REG_R8, "R8"},
42886 {8, loong64.REG_R9, "R9"},
42887 {9, loong64.REG_R10, "R10"},
42888 {10, loong64.REG_R11, "R11"},
42889 {11, loong64.REG_R12, "R12"},
42890 {12, loong64.REG_R13, "R13"},
42891 {13, loong64.REG_R14, "R14"},
42892 {14, loong64.REG_R15, "R15"},
42893 {15, loong64.REG_R16, "R16"},
42894 {16, loong64.REG_R17, "R17"},
42895 {17, loong64.REG_R18, "R18"},
42896 {18, loong64.REG_R19, "R19"},
42897 {19, loong64.REG_R20, "R20"},
42898 {20, loong64.REG_R21, "R21"},
42899 {21, loong64.REGG, "g"},
42900 {22, loong64.REG_R23, "R23"},
42901 {23, loong64.REG_R24, "R24"},
42902 {24, loong64.REG_R25, "R25"},
42903 {25, loong64.REG_R26, "R26"},
42904 {26, loong64.REG_R27, "R27"},
42905 {27, loong64.REG_R28, "R28"},
42906 {28, loong64.REG_R29, "R29"},
42907 {29, loong64.REG_R31, "R31"},
42908 {30, loong64.REG_F0, "F0"},
42909 {31, loong64.REG_F1, "F1"},
42910 {32, loong64.REG_F2, "F2"},
42911 {33, loong64.REG_F3, "F3"},
42912 {34, loong64.REG_F4, "F4"},
42913 {35, loong64.REG_F5, "F5"},
42914 {36, loong64.REG_F6, "F6"},
42915 {37, loong64.REG_F7, "F7"},
42916 {38, loong64.REG_F8, "F8"},
42917 {39, loong64.REG_F9, "F9"},
42918 {40, loong64.REG_F10, "F10"},
42919 {41, loong64.REG_F11, "F11"},
42920 {42, loong64.REG_F12, "F12"},
42921 {43, loong64.REG_F13, "F13"},
42922 {44, loong64.REG_F14, "F14"},
42923 {45, loong64.REG_F15, "F15"},
42924 {46, loong64.REG_F16, "F16"},
42925 {47, loong64.REG_F17, "F17"},
42926 {48, loong64.REG_F18, "F18"},
42927 {49, loong64.REG_F19, "F19"},
42928 {50, loong64.REG_F20, "F20"},
42929 {51, loong64.REG_F21, "F21"},
42930 {52, loong64.REG_F22, "F22"},
42931 {53, loong64.REG_F23, "F23"},
42932 {54, loong64.REG_F24, "F24"},
42933 {55, loong64.REG_F25, "F25"},
42934 {56, loong64.REG_F26, "F26"},
42935 {57, loong64.REG_F27, "F27"},
42936 {58, loong64.REG_F28, "F28"},
42937 {59, loong64.REG_F29, "F29"},
42938 {60, loong64.REG_F30, "F30"},
42939 {61, loong64.REG_F31, "F31"},
42940 {62, 0, "SB"},
42941 }
42942 var paramIntRegLOONG64 = []int8{3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18}
42943 var paramFloatRegLOONG64 = []int8{30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45}
42944 var gpRegMaskLOONG64 = regMask(1071644664)
42945 var fpRegMaskLOONG64 = regMask(4611686017353646080)
42946 var specialRegMaskLOONG64 = regMask(0)
42947 var framepointerRegLOONG64 = int8(-1)
42948 var linkRegLOONG64 = int8(1)
42949 var registersMIPS = [...]Register{
42950 {0, mips.REG_R0, "R0"},
42951 {1, mips.REG_R1, "R1"},
42952 {2, mips.REG_R2, "R2"},
42953 {3, mips.REG_R3, "R3"},
42954 {4, mips.REG_R4, "R4"},
42955 {5, mips.REG_R5, "R5"},
42956 {6, mips.REG_R6, "R6"},
42957 {7, mips.REG_R7, "R7"},
42958 {8, mips.REG_R8, "R8"},
42959 {9, mips.REG_R9, "R9"},
42960 {10, mips.REG_R10, "R10"},
42961 {11, mips.REG_R11, "R11"},
42962 {12, mips.REG_R12, "R12"},
42963 {13, mips.REG_R13, "R13"},
42964 {14, mips.REG_R14, "R14"},
42965 {15, mips.REG_R15, "R15"},
42966 {16, mips.REG_R16, "R16"},
42967 {17, mips.REG_R17, "R17"},
42968 {18, mips.REG_R18, "R18"},
42969 {19, mips.REG_R19, "R19"},
42970 {20, mips.REG_R20, "R20"},
42971 {21, mips.REG_R21, "R21"},
42972 {22, mips.REG_R22, "R22"},
42973 {23, mips.REG_R24, "R24"},
42974 {24, mips.REG_R25, "R25"},
42975 {25, mips.REG_R28, "R28"},
42976 {26, mips.REGSP, "SP"},
42977 {27, mips.REGG, "g"},
42978 {28, mips.REG_R31, "R31"},
42979 {29, mips.REG_F0, "F0"},
42980 {30, mips.REG_F2, "F2"},
42981 {31, mips.REG_F4, "F4"},
42982 {32, mips.REG_F6, "F6"},
42983 {33, mips.REG_F8, "F8"},
42984 {34, mips.REG_F10, "F10"},
42985 {35, mips.REG_F12, "F12"},
42986 {36, mips.REG_F14, "F14"},
42987 {37, mips.REG_F16, "F16"},
42988 {38, mips.REG_F18, "F18"},
42989 {39, mips.REG_F20, "F20"},
42990 {40, mips.REG_F22, "F22"},
42991 {41, mips.REG_F24, "F24"},
42992 {42, mips.REG_F26, "F26"},
42993 {43, mips.REG_F28, "F28"},
42994 {44, mips.REG_F30, "F30"},
42995 {45, mips.REG_HI, "HI"},
42996 {46, mips.REG_LO, "LO"},
42997 {47, 0, "SB"},
42998 }
42999 var paramIntRegMIPS = []int8(nil)
43000 var paramFloatRegMIPS = []int8(nil)
43001 var gpRegMaskMIPS = regMask(335544318)
43002 var fpRegMaskMIPS = regMask(35183835217920)
43003 var specialRegMaskMIPS = regMask(105553116266496)
43004 var framepointerRegMIPS = int8(-1)
43005 var linkRegMIPS = int8(28)
43006 var registersMIPS64 = [...]Register{
43007 {0, mips.REG_R0, "R0"},
43008 {1, mips.REG_R1, "R1"},
43009 {2, mips.REG_R2, "R2"},
43010 {3, mips.REG_R3, "R3"},
43011 {4, mips.REG_R4, "R4"},
43012 {5, mips.REG_R5, "R5"},
43013 {6, mips.REG_R6, "R6"},
43014 {7, mips.REG_R7, "R7"},
43015 {8, mips.REG_R8, "R8"},
43016 {9, mips.REG_R9, "R9"},
43017 {10, mips.REG_R10, "R10"},
43018 {11, mips.REG_R11, "R11"},
43019 {12, mips.REG_R12, "R12"},
43020 {13, mips.REG_R13, "R13"},
43021 {14, mips.REG_R14, "R14"},
43022 {15, mips.REG_R15, "R15"},
43023 {16, mips.REG_R16, "R16"},
43024 {17, mips.REG_R17, "R17"},
43025 {18, mips.REG_R18, "R18"},
43026 {19, mips.REG_R19, "R19"},
43027 {20, mips.REG_R20, "R20"},
43028 {21, mips.REG_R21, "R21"},
43029 {22, mips.REG_R22, "R22"},
43030 {23, mips.REG_R24, "R24"},
43031 {24, mips.REG_R25, "R25"},
43032 {25, mips.REGSP, "SP"},
43033 {26, mips.REGG, "g"},
43034 {27, mips.REG_R31, "R31"},
43035 {28, mips.REG_F0, "F0"},
43036 {29, mips.REG_F1, "F1"},
43037 {30, mips.REG_F2, "F2"},
43038 {31, mips.REG_F3, "F3"},
43039 {32, mips.REG_F4, "F4"},
43040 {33, mips.REG_F5, "F5"},
43041 {34, mips.REG_F6, "F6"},
43042 {35, mips.REG_F7, "F7"},
43043 {36, mips.REG_F8, "F8"},
43044 {37, mips.REG_F9, "F9"},
43045 {38, mips.REG_F10, "F10"},
43046 {39, mips.REG_F11, "F11"},
43047 {40, mips.REG_F12, "F12"},
43048 {41, mips.REG_F13, "F13"},
43049 {42, mips.REG_F14, "F14"},
43050 {43, mips.REG_F15, "F15"},
43051 {44, mips.REG_F16, "F16"},
43052 {45, mips.REG_F17, "F17"},
43053 {46, mips.REG_F18, "F18"},
43054 {47, mips.REG_F19, "F19"},
43055 {48, mips.REG_F20, "F20"},
43056 {49, mips.REG_F21, "F21"},
43057 {50, mips.REG_F22, "F22"},
43058 {51, mips.REG_F23, "F23"},
43059 {52, mips.REG_F24, "F24"},
43060 {53, mips.REG_F25, "F25"},
43061 {54, mips.REG_F26, "F26"},
43062 {55, mips.REG_F27, "F27"},
43063 {56, mips.REG_F28, "F28"},
43064 {57, mips.REG_F29, "F29"},
43065 {58, mips.REG_F30, "F30"},
43066 {59, mips.REG_F31, "F31"},
43067 {60, mips.REG_HI, "HI"},
43068 {61, mips.REG_LO, "LO"},
43069 {62, 0, "SB"},
43070 }
43071 var paramIntRegMIPS64 = []int8(nil)
43072 var paramFloatRegMIPS64 = []int8(nil)
43073 var gpRegMaskMIPS64 = regMask(167772158)
43074 var fpRegMaskMIPS64 = regMask(1152921504338411520)
43075 var specialRegMaskMIPS64 = regMask(3458764513820540928)
43076 var framepointerRegMIPS64 = int8(-1)
43077 var linkRegMIPS64 = int8(27)
43078 var registersPPC64 = [...]Register{
43079 {0, ppc64.REG_R0, "R0"},
43080 {1, ppc64.REGSP, "SP"},
43081 {2, 0, "SB"},
43082 {3, ppc64.REG_R3, "R3"},
43083 {4, ppc64.REG_R4, "R4"},
43084 {5, ppc64.REG_R5, "R5"},
43085 {6, ppc64.REG_R6, "R6"},
43086 {7, ppc64.REG_R7, "R7"},
43087 {8, ppc64.REG_R8, "R8"},
43088 {9, ppc64.REG_R9, "R9"},
43089 {10, ppc64.REG_R10, "R10"},
43090 {11, ppc64.REG_R11, "R11"},
43091 {12, ppc64.REG_R12, "R12"},
43092 {13, ppc64.REG_R13, "R13"},
43093 {14, ppc64.REG_R14, "R14"},
43094 {15, ppc64.REG_R15, "R15"},
43095 {16, ppc64.REG_R16, "R16"},
43096 {17, ppc64.REG_R17, "R17"},
43097 {18, ppc64.REG_R18, "R18"},
43098 {19, ppc64.REG_R19, "R19"},
43099 {20, ppc64.REG_R20, "R20"},
43100 {21, ppc64.REG_R21, "R21"},
43101 {22, ppc64.REG_R22, "R22"},
43102 {23, ppc64.REG_R23, "R23"},
43103 {24, ppc64.REG_R24, "R24"},
43104 {25, ppc64.REG_R25, "R25"},
43105 {26, ppc64.REG_R26, "R26"},
43106 {27, ppc64.REG_R27, "R27"},
43107 {28, ppc64.REG_R28, "R28"},
43108 {29, ppc64.REG_R29, "R29"},
43109 {30, ppc64.REGG, "g"},
43110 {31, ppc64.REG_R31, "R31"},
43111 {32, ppc64.REG_F0, "F0"},
43112 {33, ppc64.REG_F1, "F1"},
43113 {34, ppc64.REG_F2, "F2"},
43114 {35, ppc64.REG_F3, "F3"},
43115 {36, ppc64.REG_F4, "F4"},
43116 {37, ppc64.REG_F5, "F5"},
43117 {38, ppc64.REG_F6, "F6"},
43118 {39, ppc64.REG_F7, "F7"},
43119 {40, ppc64.REG_F8, "F8"},
43120 {41, ppc64.REG_F9, "F9"},
43121 {42, ppc64.REG_F10, "F10"},
43122 {43, ppc64.REG_F11, "F11"},
43123 {44, ppc64.REG_F12, "F12"},
43124 {45, ppc64.REG_F13, "F13"},
43125 {46, ppc64.REG_F14, "F14"},
43126 {47, ppc64.REG_F15, "F15"},
43127 {48, ppc64.REG_F16, "F16"},
43128 {49, ppc64.REG_F17, "F17"},
43129 {50, ppc64.REG_F18, "F18"},
43130 {51, ppc64.REG_F19, "F19"},
43131 {52, ppc64.REG_F20, "F20"},
43132 {53, ppc64.REG_F21, "F21"},
43133 {54, ppc64.REG_F22, "F22"},
43134 {55, ppc64.REG_F23, "F23"},
43135 {56, ppc64.REG_F24, "F24"},
43136 {57, ppc64.REG_F25, "F25"},
43137 {58, ppc64.REG_F26, "F26"},
43138 {59, ppc64.REG_F27, "F27"},
43139 {60, ppc64.REG_F28, "F28"},
43140 {61, ppc64.REG_F29, "F29"},
43141 {62, ppc64.REG_F30, "F30"},
43142 {63, ppc64.REG_XER, "XER"},
43143 }
43144 var paramIntRegPPC64 = []int8{3, 4, 5, 6, 7, 8, 9, 10, 14, 15, 16, 17}
43145 var paramFloatRegPPC64 = []int8{33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44}
43146 var gpRegMaskPPC64 = regMask(1073733624)
43147 var fpRegMaskPPC64 = regMask(9223372032559808512)
43148 var specialRegMaskPPC64 = regMask(9223372036854775808)
43149 var framepointerRegPPC64 = int8(-1)
43150 var linkRegPPC64 = int8(-1)
43151 var registersRISCV64 = [...]Register{
43152 {0, riscv.REG_X0, "X0"},
43153 {1, riscv.REGSP, "SP"},
43154 {2, riscv.REG_X3, "X3"},
43155 {3, riscv.REG_X4, "X4"},
43156 {4, riscv.REG_X5, "X5"},
43157 {5, riscv.REG_X6, "X6"},
43158 {6, riscv.REG_X7, "X7"},
43159 {7, riscv.REG_X8, "X8"},
43160 {8, riscv.REG_X9, "X9"},
43161 {9, riscv.REG_X10, "X10"},
43162 {10, riscv.REG_X11, "X11"},
43163 {11, riscv.REG_X12, "X12"},
43164 {12, riscv.REG_X13, "X13"},
43165 {13, riscv.REG_X14, "X14"},
43166 {14, riscv.REG_X15, "X15"},
43167 {15, riscv.REG_X16, "X16"},
43168 {16, riscv.REG_X17, "X17"},
43169 {17, riscv.REG_X18, "X18"},
43170 {18, riscv.REG_X19, "X19"},
43171 {19, riscv.REG_X20, "X20"},
43172 {20, riscv.REG_X21, "X21"},
43173 {21, riscv.REG_X22, "X22"},
43174 {22, riscv.REG_X23, "X23"},
43175 {23, riscv.REG_X24, "X24"},
43176 {24, riscv.REG_X25, "X25"},
43177 {25, riscv.REG_X26, "X26"},
43178 {26, riscv.REGG, "g"},
43179 {27, riscv.REG_X28, "X28"},
43180 {28, riscv.REG_X29, "X29"},
43181 {29, riscv.REG_X30, "X30"},
43182 {30, riscv.REG_X31, "X31"},
43183 {31, riscv.REG_F0, "F0"},
43184 {32, riscv.REG_F1, "F1"},
43185 {33, riscv.REG_F2, "F2"},
43186 {34, riscv.REG_F3, "F3"},
43187 {35, riscv.REG_F4, "F4"},
43188 {36, riscv.REG_F5, "F5"},
43189 {37, riscv.REG_F6, "F6"},
43190 {38, riscv.REG_F7, "F7"},
43191 {39, riscv.REG_F8, "F8"},
43192 {40, riscv.REG_F9, "F9"},
43193 {41, riscv.REG_F10, "F10"},
43194 {42, riscv.REG_F11, "F11"},
43195 {43, riscv.REG_F12, "F12"},
43196 {44, riscv.REG_F13, "F13"},
43197 {45, riscv.REG_F14, "F14"},
43198 {46, riscv.REG_F15, "F15"},
43199 {47, riscv.REG_F16, "F16"},
43200 {48, riscv.REG_F17, "F17"},
43201 {49, riscv.REG_F18, "F18"},
43202 {50, riscv.REG_F19, "F19"},
43203 {51, riscv.REG_F20, "F20"},
43204 {52, riscv.REG_F21, "F21"},
43205 {53, riscv.REG_F22, "F22"},
43206 {54, riscv.REG_F23, "F23"},
43207 {55, riscv.REG_F24, "F24"},
43208 {56, riscv.REG_F25, "F25"},
43209 {57, riscv.REG_F26, "F26"},
43210 {58, riscv.REG_F27, "F27"},
43211 {59, riscv.REG_F28, "F28"},
43212 {60, riscv.REG_F29, "F29"},
43213 {61, riscv.REG_F30, "F30"},
43214 {62, riscv.REG_F31, "F31"},
43215 {63, 0, "SB"},
43216 }
43217 var paramIntRegRISCV64 = []int8{9, 10, 11, 12, 13, 14, 15, 16, 7, 8, 17, 18, 19, 20, 21, 22}
43218 var paramFloatRegRISCV64 = []int8{41, 42, 43, 44, 45, 46, 47, 48, 39, 40, 49, 50, 51, 52, 53, 54}
43219 var gpRegMaskRISCV64 = regMask(1006632944)
43220 var fpRegMaskRISCV64 = regMask(9223372034707292160)
43221 var specialRegMaskRISCV64 = regMask(0)
43222 var framepointerRegRISCV64 = int8(-1)
43223 var linkRegRISCV64 = int8(0)
43224 var registersS390X = [...]Register{
43225 {0, s390x.REG_R0, "R0"},
43226 {1, s390x.REG_R1, "R1"},
43227 {2, s390x.REG_R2, "R2"},
43228 {3, s390x.REG_R3, "R3"},
43229 {4, s390x.REG_R4, "R4"},
43230 {5, s390x.REG_R5, "R5"},
43231 {6, s390x.REG_R6, "R6"},
43232 {7, s390x.REG_R7, "R7"},
43233 {8, s390x.REG_R8, "R8"},
43234 {9, s390x.REG_R9, "R9"},
43235 {10, s390x.REG_R10, "R10"},
43236 {11, s390x.REG_R11, "R11"},
43237 {12, s390x.REG_R12, "R12"},
43238 {13, s390x.REGG, "g"},
43239 {14, s390x.REG_R14, "R14"},
43240 {15, s390x.REGSP, "SP"},
43241 {16, s390x.REG_F0, "F0"},
43242 {17, s390x.REG_F1, "F1"},
43243 {18, s390x.REG_F2, "F2"},
43244 {19, s390x.REG_F3, "F3"},
43245 {20, s390x.REG_F4, "F4"},
43246 {21, s390x.REG_F5, "F5"},
43247 {22, s390x.REG_F6, "F6"},
43248 {23, s390x.REG_F7, "F7"},
43249 {24, s390x.REG_F8, "F8"},
43250 {25, s390x.REG_F9, "F9"},
43251 {26, s390x.REG_F10, "F10"},
43252 {27, s390x.REG_F11, "F11"},
43253 {28, s390x.REG_F12, "F12"},
43254 {29, s390x.REG_F13, "F13"},
43255 {30, s390x.REG_F14, "F14"},
43256 {31, s390x.REG_F15, "F15"},
43257 {32, 0, "SB"},
43258 }
43259 var paramIntRegS390X = []int8(nil)
43260 var paramFloatRegS390X = []int8(nil)
43261 var gpRegMaskS390X = regMask(23551)
43262 var fpRegMaskS390X = regMask(4294901760)
43263 var specialRegMaskS390X = regMask(0)
43264 var framepointerRegS390X = int8(-1)
43265 var linkRegS390X = int8(14)
43266 var registersWasm = [...]Register{
43267 {0, wasm.REG_R0, "R0"},
43268 {1, wasm.REG_R1, "R1"},
43269 {2, wasm.REG_R2, "R2"},
43270 {3, wasm.REG_R3, "R3"},
43271 {4, wasm.REG_R4, "R4"},
43272 {5, wasm.REG_R5, "R5"},
43273 {6, wasm.REG_R6, "R6"},
43274 {7, wasm.REG_R7, "R7"},
43275 {8, wasm.REG_R8, "R8"},
43276 {9, wasm.REG_R9, "R9"},
43277 {10, wasm.REG_R10, "R10"},
43278 {11, wasm.REG_R11, "R11"},
43279 {12, wasm.REG_R12, "R12"},
43280 {13, wasm.REG_R13, "R13"},
43281 {14, wasm.REG_R14, "R14"},
43282 {15, wasm.REG_R15, "R15"},
43283 {16, wasm.REG_F0, "F0"},
43284 {17, wasm.REG_F1, "F1"},
43285 {18, wasm.REG_F2, "F2"},
43286 {19, wasm.REG_F3, "F3"},
43287 {20, wasm.REG_F4, "F4"},
43288 {21, wasm.REG_F5, "F5"},
43289 {22, wasm.REG_F6, "F6"},
43290 {23, wasm.REG_F7, "F7"},
43291 {24, wasm.REG_F8, "F8"},
43292 {25, wasm.REG_F9, "F9"},
43293 {26, wasm.REG_F10, "F10"},
43294 {27, wasm.REG_F11, "F11"},
43295 {28, wasm.REG_F12, "F12"},
43296 {29, wasm.REG_F13, "F13"},
43297 {30, wasm.REG_F14, "F14"},
43298 {31, wasm.REG_F15, "F15"},
43299 {32, wasm.REG_F16, "F16"},
43300 {33, wasm.REG_F17, "F17"},
43301 {34, wasm.REG_F18, "F18"},
43302 {35, wasm.REG_F19, "F19"},
43303 {36, wasm.REG_F20, "F20"},
43304 {37, wasm.REG_F21, "F21"},
43305 {38, wasm.REG_F22, "F22"},
43306 {39, wasm.REG_F23, "F23"},
43307 {40, wasm.REG_F24, "F24"},
43308 {41, wasm.REG_F25, "F25"},
43309 {42, wasm.REG_F26, "F26"},
43310 {43, wasm.REG_F27, "F27"},
43311 {44, wasm.REG_F28, "F28"},
43312 {45, wasm.REG_F29, "F29"},
43313 {46, wasm.REG_F30, "F30"},
43314 {47, wasm.REG_F31, "F31"},
43315 {48, wasm.REGSP, "SP"},
43316 {49, wasm.REGG, "g"},
43317 {50, 0, "SB"},
43318 }
43319 var paramIntRegWasm = []int8(nil)
43320 var paramFloatRegWasm = []int8(nil)
43321 var gpRegMaskWasm = regMask(65535)
43322 var fpRegMaskWasm = regMask(281474976645120)
43323 var fp32RegMaskWasm = regMask(4294901760)
43324 var fp64RegMaskWasm = regMask(281470681743360)
43325 var specialRegMaskWasm = regMask(0)
43326 var framepointerRegWasm = int8(-1)
43327 var linkRegWasm = int8(-1)
43328
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